1: //======================================================================================== 2: // MC68060.java 3: // en:MC68060 core 4: // ja:MC68060コア 5: // Copyright (C) 2003-2026 Makoto Kamada 6: // 7: // This file is part of the XEiJ (X68000 Emulator in Java). 8: // You can use, modify and redistribute the XEiJ if the conditions are met. 9: // Read the XEiJ License for more details. 10: // https://stdkmd.net/xeij/ 11: //======================================================================================== 12: 13: package xeij; 14: 15: import java.lang.*; //Boolean,Character,Class,Comparable,Double,Exception,Float,IllegalArgumentException,Integer,Long,Math,Number,Object,Runnable,SecurityException,String,StringBuilder,System 16: import java.util.*; //ArrayList,Arrays,Calendar,GregorianCalendar,HashMap,Map,Map.Entry,Timer,TimerTask,TreeMap 17: 18: public class MC68060 { 19: 20: public static void mpuCore () { 21: 22: //例外ループ 23: // 別のメソッドで検出された例外を命令ループの外側でcatchすることで命令ループを高速化する 24: errorLoop: 25: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 26: try { 27: //命令ループ 28: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 29: int t; 30: //命令を実行する 31: m60Incremented = 0L; //アドレスレジスタの増分 32: XEiJ.mpuTraceFlag = XEiJ.regSRT1; //命令実行前のsrT1 33: XEiJ.mpuCycleCount = 0; //第1オペコードからROMのアクセスウエイトを有効にする。命令のサイクル数はすべてXEiJ.mpuCycleCount+=～で加えること 34: XEiJ.regPC0 = t = m60Address = XEiJ.regPC; //命令の先頭アドレス 35: XEiJ.regPC = t + 2; 36: //XEiJ.regOC = mmuReadWordZeroOpword (t, XEiJ.regSRS); //第1オペコード。必ずゼロ拡張すること。pcに奇数が入っていることはないのでアドレスエラーのチェックを省略する 37: if (XEiJ.regSRS != 0) { //スーパーバイザモード 38: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 39: t = mmuTranslateReadSuperCode (t); 40: XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 41: } else { //ユーザモード 42: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 43: t = mmuTranslateReadUserCode (t); 44: XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 45: } 46: 47: //命令の処理 48: // 第1オペコードの上位10ビットで分岐する 49: irpSwitch: 50: switch (XEiJ.regOC >>> 6) { //第1オペコードの上位10ビット。XEiJ.regOCはゼロ拡張されているので0b1111_111_111&を省略 51: 52: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 53: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 54: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 55: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 56: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 57: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 58: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 59: case 0b0000_000_000: 60: irpOriByte (); 61: break irpSwitch; 62: 63: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 64: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 65: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 66: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 67: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 68: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 69: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 70: case 0b0000_000_001: 71: irpOriWord (); 72: break irpSwitch; 73: 74: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 75: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 76: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 77: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 78: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 79: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 80: case 0b0000_000_010: 81: irpOriLong (); 82: break irpSwitch; 83: 84: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 85: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 86: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 87: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 88: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 89: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 90: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 91: case 0b0000_000_011: 92: irpCmp2Chk2Byte (); 93: break irpSwitch; 94: 95: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 96: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 97: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 98: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 99: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 100: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 101: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 102: case 0b0000_000_100: 103: case 0b0000_001_100: 104: case 0b0000_010_100: 105: case 0b0000_011_100: 106: case 0b0000_100_100: 107: case 0b0000_101_100: 108: case 0b0000_110_100: 109: case 0b0000_111_100: 110: irpBtstReg (); 111: break irpSwitch; 112: 113: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 114: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 115: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 116: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 117: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 118: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 119: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 120: case 0b0000_000_101: 121: case 0b0000_001_101: 122: case 0b0000_010_101: 123: case 0b0000_011_101: 124: case 0b0000_100_101: 125: case 0b0000_101_101: 126: case 0b0000_110_101: 127: case 0b0000_111_101: 128: irpBchgReg (); 129: break irpSwitch; 130: 131: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 132: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 133: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 134: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 135: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 136: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 137: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 138: case 0b0000_000_110: 139: case 0b0000_001_110: 140: case 0b0000_010_110: 141: case 0b0000_011_110: 142: case 0b0000_100_110: 143: case 0b0000_101_110: 144: case 0b0000_110_110: 145: case 0b0000_111_110: 146: irpBclrReg (); 147: break irpSwitch; 148: 149: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 150: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 151: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 152: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 153: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 154: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 155: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 156: case 0b0000_000_111: 157: case 0b0000_001_111: 158: case 0b0000_010_111: 159: case 0b0000_011_111: 160: case 0b0000_100_111: 161: case 0b0000_101_111: 162: case 0b0000_110_111: 163: case 0b0000_111_111: 164: irpBsetReg (); 165: break irpSwitch; 166: 167: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 168: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 169: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 170: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 171: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 172: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 173: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 174: case 0b0000_001_000: 175: irpAndiByte (); 176: break irpSwitch; 177: 178: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 179: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 180: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 181: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 182: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 183: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 184: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 185: case 0b0000_001_001: 186: irpAndiWord (); 187: break irpSwitch; 188: 189: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 190: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 191: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 192: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 193: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 194: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 195: case 0b0000_001_010: 196: irpAndiLong (); 197: break irpSwitch; 198: 199: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 200: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 201: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 202: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 203: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 204: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 205: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 206: case 0b0000_001_011: 207: irpCmp2Chk2Word (); 208: break irpSwitch; 209: 210: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 211: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 212: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 213: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 214: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 215: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 216: case 0b0000_010_000: 217: irpSubiByte (); 218: break irpSwitch; 219: 220: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 221: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 222: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 223: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 224: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 225: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 226: case 0b0000_010_001: 227: irpSubiWord (); 228: break irpSwitch; 229: 230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 231: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 232: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 233: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 234: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 235: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 236: case 0b0000_010_010: 237: irpSubiLong (); 238: break irpSwitch; 239: 240: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 241: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 242: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 244: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 245: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 246: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 247: case 0b0000_010_011: 248: irpCmp2Chk2Long (); 249: break irpSwitch; 250: 251: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 252: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 253: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 254: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 255: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 256: case 0b0000_011_000: 257: irpAddiByte (); 258: break irpSwitch; 259: 260: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 261: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 262: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 263: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 264: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 265: case 0b0000_011_001: 266: irpAddiWord (); 267: break irpSwitch; 268: 269: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 270: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 271: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 273: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 274: case 0b0000_011_010: 275: irpAddiLong (); 276: break irpSwitch; 277: 278: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 279: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 280: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 281: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 282: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 283: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 284: case 0b0000_100_000: 285: irpBtstImm (); 286: break irpSwitch; 287: 288: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 289: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 290: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 291: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 292: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 293: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 294: case 0b0000_100_001: 295: irpBchgImm (); 296: break irpSwitch; 297: 298: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 299: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 300: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 301: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 302: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 303: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 304: case 0b0000_100_010: 305: irpBclrImm (); 306: break irpSwitch; 307: 308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 309: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 310: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 311: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 312: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 313: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 314: case 0b0000_100_011: 315: irpBsetImm (); 316: break irpSwitch; 317: 318: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 319: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 320: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 322: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 323: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 324: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 325: case 0b0000_101_000: 326: irpEoriByte (); 327: break irpSwitch; 328: 329: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 330: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 331: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 332: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 333: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 334: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 335: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 336: case 0b0000_101_001: 337: irpEoriWord (); 338: break irpSwitch; 339: 340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 341: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 342: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 344: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 345: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 346: case 0b0000_101_010: 347: irpEoriLong (); 348: break irpSwitch; 349: 350: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 351: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 352: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 353: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 354: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 355: case 0b0000_101_011: 356: irpCasByte (); 357: break irpSwitch; 358: 359: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 360: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 361: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 362: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 363: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 364: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 365: case 0b0000_110_000: 366: irpCmpiByte (); 367: break irpSwitch; 368: 369: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 370: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 371: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 372: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 373: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 374: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 375: case 0b0000_110_001: 376: irpCmpiWord (); 377: break irpSwitch; 378: 379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 380: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 381: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 382: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 383: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 384: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 385: case 0b0000_110_010: 386: irpCmpiLong (); 387: break irpSwitch; 388: 389: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 390: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 391: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 392: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 393: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 394: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 395: case 0b0000_110_011: 396: irpCasWord (); 397: break irpSwitch; 398: 399: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 400: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 401: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 402: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 403: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 404: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 405: case 0b0000_111_000: 406: irpMovesByte (); 407: break irpSwitch; 408: 409: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 410: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 411: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 412: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 413: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 414: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 415: case 0b0000_111_001: 416: irpMovesWord (); 417: break irpSwitch; 418: 419: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 420: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 421: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 422: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 423: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 424: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 425: case 0b0000_111_010: 426: irpMovesLong (); 427: break irpSwitch; 428: 429: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 430: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 431: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 432: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 433: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 434: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 435: case 0b0000_111_011: 436: irpCasLong (); 437: break irpSwitch; 438: 439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 440: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 441: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 443: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 444: case 0b0001_000_000: 445: case 0b0001_001_000: 446: case 0b0001_010_000: 447: case 0b0001_011_000: 448: case 0b0001_100_000: 449: case 0b0001_101_000: 450: case 0b0001_110_000: 451: case 0b0001_111_000: 452: irpMoveToDRByte (); 453: break irpSwitch; 454: 455: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 456: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 457: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 459: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 460: case 0b0001_000_010: 461: case 0b0001_001_010: 462: case 0b0001_010_010: 463: case 0b0001_011_010: 464: case 0b0001_100_010: 465: case 0b0001_101_010: 466: case 0b0001_110_010: 467: case 0b0001_111_010: 468: irpMoveToMMByte (); 469: break irpSwitch; 470: 471: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 472: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 473: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 475: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 476: case 0b0001_000_011: 477: case 0b0001_001_011: 478: case 0b0001_010_011: 479: case 0b0001_011_011: 480: case 0b0001_100_011: 481: case 0b0001_101_011: 482: case 0b0001_110_011: 483: case 0b0001_111_011: 484: irpMoveToMPByte (); 485: break irpSwitch; 486: 487: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 488: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 489: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 490: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 491: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 492: case 0b0001_000_100: 493: case 0b0001_001_100: 494: case 0b0001_010_100: 495: case 0b0001_011_100: 496: case 0b0001_100_100: 497: case 0b0001_101_100: 498: case 0b0001_110_100: 499: case 0b0001_111_100: 500: irpMoveToMNByte (); 501: break irpSwitch; 502: 503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 504: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 505: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 506: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 507: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 508: case 0b0001_000_101: 509: case 0b0001_001_101: 510: case 0b0001_010_101: 511: case 0b0001_011_101: 512: case 0b0001_100_101: 513: case 0b0001_101_101: 514: case 0b0001_110_101: 515: case 0b0001_111_101: 516: irpMoveToMWByte (); 517: break irpSwitch; 518: 519: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 520: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 521: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 522: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 523: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 524: case 0b0001_000_110: 525: case 0b0001_001_110: 526: case 0b0001_010_110: 527: case 0b0001_011_110: 528: case 0b0001_100_110: 529: case 0b0001_101_110: 530: case 0b0001_110_110: 531: case 0b0001_111_110: 532: irpMoveToMXByte (); 533: break irpSwitch; 534: 535: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 536: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 537: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 538: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 539: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 540: case 0b0001_000_111: 541: irpMoveToZWByte (); 542: break irpSwitch; 543: 544: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 545: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 546: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 547: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 548: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 549: case 0b0001_001_111: 550: irpMoveToZLByte (); 551: break irpSwitch; 552: 553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 554: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 555: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 557: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 558: case 0b0010_000_000: 559: case 0b0010_001_000: 560: case 0b0010_010_000: 561: case 0b0010_011_000: 562: case 0b0010_100_000: 563: case 0b0010_101_000: 564: case 0b0010_110_000: 565: case 0b0010_111_000: 566: irpMoveToDRLong (); 567: break irpSwitch; 568: 569: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 570: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 571: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 572: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 573: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 574: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 575: case 0b0010_000_001: 576: case 0b0010_001_001: 577: case 0b0010_010_001: 578: case 0b0010_011_001: 579: case 0b0010_100_001: 580: case 0b0010_101_001: 581: case 0b0010_110_001: 582: case 0b0010_111_001: 583: irpMoveaLong (); 584: break irpSwitch; 585: 586: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 587: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 588: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 589: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 590: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 591: case 0b0010_000_010: 592: case 0b0010_001_010: 593: case 0b0010_010_010: 594: case 0b0010_011_010: 595: case 0b0010_100_010: 596: case 0b0010_101_010: 597: case 0b0010_110_010: 598: case 0b0010_111_010: 599: irpMoveToMMLong (); 600: break irpSwitch; 601: 602: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 603: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 604: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 605: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 606: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 607: case 0b0010_000_011: 608: case 0b0010_001_011: 609: case 0b0010_010_011: 610: case 0b0010_011_011: 611: case 0b0010_100_011: 612: case 0b0010_101_011: 613: case 0b0010_110_011: 614: case 0b0010_111_011: 615: irpMoveToMPLong (); 616: break irpSwitch; 617: 618: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 619: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 620: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 621: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 622: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 623: case 0b0010_000_100: 624: case 0b0010_001_100: 625: case 0b0010_010_100: 626: case 0b0010_011_100: 627: case 0b0010_100_100: 628: case 0b0010_101_100: 629: case 0b0010_110_100: 630: case 0b0010_111_100: 631: irpMoveToMNLong (); 632: break irpSwitch; 633: 634: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 635: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 636: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 637: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 638: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 639: case 0b0010_000_101: 640: case 0b0010_001_101: 641: case 0b0010_010_101: 642: case 0b0010_011_101: 643: case 0b0010_100_101: 644: case 0b0010_101_101: 645: case 0b0010_110_101: 646: case 0b0010_111_101: 647: irpMoveToMWLong (); 648: break irpSwitch; 649: 650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 651: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 652: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 653: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 654: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 655: case 0b0010_000_110: 656: case 0b0010_001_110: 657: case 0b0010_010_110: 658: case 0b0010_011_110: 659: case 0b0010_100_110: 660: case 0b0010_101_110: 661: case 0b0010_110_110: 662: case 0b0010_111_110: 663: irpMoveToMXLong (); 664: break irpSwitch; 665: 666: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 667: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 668: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 669: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 670: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 671: case 0b0010_000_111: 672: irpMoveToZWLong (); 673: break irpSwitch; 674: 675: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 676: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 677: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 678: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 679: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 680: case 0b0010_001_111: 681: irpMoveToZLLong (); 682: break irpSwitch; 683: 684: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 685: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 686: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 687: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 688: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 689: case 0b0011_000_000: 690: case 0b0011_001_000: 691: case 0b0011_010_000: 692: case 0b0011_011_000: 693: case 0b0011_100_000: 694: case 0b0011_101_000: 695: case 0b0011_110_000: 696: case 0b0011_111_000: 697: irpMoveToDRWord (); 698: break irpSwitch; 699: 700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 701: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 702: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 703: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 704: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 705: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 706: case 0b0011_000_001: 707: case 0b0011_001_001: 708: case 0b0011_010_001: 709: case 0b0011_011_001: 710: case 0b0011_100_001: 711: case 0b0011_101_001: 712: case 0b0011_110_001: 713: case 0b0011_111_001: 714: irpMoveaWord (); 715: break irpSwitch; 716: 717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 718: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 719: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 720: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 721: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 722: case 0b0011_000_010: 723: case 0b0011_001_010: 724: case 0b0011_010_010: 725: case 0b0011_011_010: 726: case 0b0011_100_010: 727: case 0b0011_101_010: 728: case 0b0011_110_010: 729: case 0b0011_111_010: 730: irpMoveToMMWord (); 731: break irpSwitch; 732: 733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 734: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 735: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 736: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 737: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 738: case 0b0011_000_011: 739: case 0b0011_001_011: 740: case 0b0011_010_011: 741: case 0b0011_011_011: 742: case 0b0011_100_011: 743: case 0b0011_101_011: 744: case 0b0011_110_011: 745: case 0b0011_111_011: 746: irpMoveToMPWord (); 747: break irpSwitch; 748: 749: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 750: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 751: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 752: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 753: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 754: case 0b0011_000_100: 755: case 0b0011_001_100: 756: case 0b0011_010_100: 757: case 0b0011_011_100: 758: case 0b0011_100_100: 759: case 0b0011_101_100: 760: case 0b0011_110_100: 761: case 0b0011_111_100: 762: irpMoveToMNWord (); 763: break irpSwitch; 764: 765: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 766: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 767: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 768: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 769: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 770: case 0b0011_000_101: 771: case 0b0011_001_101: 772: case 0b0011_010_101: 773: case 0b0011_011_101: 774: case 0b0011_100_101: 775: case 0b0011_101_101: 776: case 0b0011_110_101: 777: case 0b0011_111_101: 778: irpMoveToMWWord (); 779: break irpSwitch; 780: 781: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 782: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 783: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 784: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 785: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 786: case 0b0011_000_110: 787: case 0b0011_001_110: 788: case 0b0011_010_110: 789: case 0b0011_011_110: 790: case 0b0011_100_110: 791: case 0b0011_101_110: 792: case 0b0011_110_110: 793: case 0b0011_111_110: 794: irpMoveToMXWord (); 795: break irpSwitch; 796: 797: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 798: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 799: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 800: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 801: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 802: case 0b0011_000_111: 803: irpMoveToZWWord (); 804: break irpSwitch; 805: 806: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 807: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 808: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 810: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 811: case 0b0011_001_111: 812: irpMoveToZLWord (); 813: break irpSwitch; 814: 815: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 816: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 817: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 819: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 820: case 0b0100_000_000: 821: irpNegxByte (); 822: break irpSwitch; 823: 824: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 825: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 826: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 827: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 828: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 829: case 0b0100_000_001: 830: irpNegxWord (); 831: break irpSwitch; 832: 833: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 834: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 835: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 836: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 837: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 838: case 0b0100_000_010: 839: irpNegxLong (); 840: break irpSwitch; 841: 842: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 843: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 844: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 845: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 846: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 847: case 0b0100_000_011: 848: irpMoveFromSR (); 849: break irpSwitch; 850: 851: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 852: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 853: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 854: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 855: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 856: case 0b0100_000_100: 857: case 0b0100_001_100: 858: case 0b0100_010_100: 859: case 0b0100_011_100: 860: case 0b0100_100_100: 861: case 0b0100_101_100: 862: case 0b0100_110_100: 863: case 0b0100_111_100: 864: irpChkLong (); 865: break irpSwitch; 866: 867: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 868: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 869: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 870: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 871: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 872: case 0b0100_000_110: 873: case 0b0100_001_110: 874: case 0b0100_010_110: 875: case 0b0100_011_110: 876: case 0b0100_100_110: 877: case 0b0100_101_110: 878: case 0b0100_110_110: 879: case 0b0100_111_110: 880: irpChkWord (); 881: break irpSwitch; 882: 883: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 884: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 885: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 886: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 887: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 888: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 889: case 0b0100_000_111: 890: case 0b0100_001_111: 891: case 0b0100_010_111: 892: case 0b0100_011_111: 893: case 0b0100_100_111: 894: case 0b0100_101_111: 895: case 0b0100_110_111: 896: case 0b0100_111_111: 897: irpLea (); 898: break irpSwitch; 899: 900: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 901: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 902: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 903: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 904: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 905: case 0b0100_001_000: 906: irpClrByte (); 907: break irpSwitch; 908: 909: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 910: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 911: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 912: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 913: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 914: case 0b0100_001_001: 915: irpClrWord (); 916: break irpSwitch; 917: 918: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 919: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 920: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 922: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 923: case 0b0100_001_010: 924: irpClrLong (); 925: break irpSwitch; 926: 927: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 928: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 929: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 930: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 931: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 932: case 0b0100_001_011: 933: irpMoveFromCCR (); 934: break irpSwitch; 935: 936: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 937: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 938: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 940: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 941: case 0b0100_010_000: 942: irpNegByte (); 943: break irpSwitch; 944: 945: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 946: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 947: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 948: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 949: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 950: case 0b0100_010_001: 951: irpNegWord (); 952: break irpSwitch; 953: 954: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 955: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 956: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 957: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 958: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 959: case 0b0100_010_010: 960: irpNegLong (); 961: break irpSwitch; 962: 963: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 964: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 965: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 966: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 967: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 968: case 0b0100_010_011: 969: irpMoveToCCR (); 970: break irpSwitch; 971: 972: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 973: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 974: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 975: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 976: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 977: case 0b0100_011_000: 978: irpNotByte (); 979: break irpSwitch; 980: 981: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 982: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 983: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 984: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 985: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 986: case 0b0100_011_001: 987: irpNotWord (); 988: break irpSwitch; 989: 990: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 991: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 992: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 993: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 994: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 995: case 0b0100_011_010: 996: irpNotLong (); 997: break irpSwitch; 998: 999: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1000: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1001: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1002: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1003: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 1004: case 0b0100_011_011: 1005: irpMoveToSR (); 1006: break irpSwitch; 1007: 1008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1009: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1010: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1011: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1012: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 1013: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 1014: case 0b0100_100_000: 1015: irpNbcd (); 1016: break irpSwitch; 1017: 1018: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1019: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1020: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1021: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1022: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 1023: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 1024: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 1025: case 0b0100_100_001: 1026: irpPea (); 1027: break irpSwitch; 1028: 1029: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1030: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1031: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1032: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1033: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 1034: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 1035: case 0b0100_100_010: 1036: irpMovemToMemWord (); 1037: break irpSwitch; 1038: 1039: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1040: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1041: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1042: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1043: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 1044: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 1045: case 0b0100_100_011: 1046: irpMovemToMemLong (); 1047: break irpSwitch; 1048: 1049: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1050: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1051: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1052: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1053: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 1054: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 1055: case 0b0100_101_000: 1056: irpTstByte (); 1057: break irpSwitch; 1058: 1059: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1060: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1061: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1063: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 1064: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 1065: case 0b0100_101_001: 1066: irpTstWord (); 1067: break irpSwitch; 1068: 1069: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1070: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1071: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1072: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1073: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 1074: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 1075: case 0b0100_101_010: 1076: irpTstLong (); 1077: break irpSwitch; 1078: 1079: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1080: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1081: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1082: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1083: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 1084: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 1085: case 0b0100_101_011: 1086: irpTas (); 1087: break irpSwitch; 1088: 1089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1090: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1091: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1092: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1093: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 1094: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 1095: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 1096: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 1097: case 0b0100_110_000: 1098: irpMuluMulsLong (); 1099: break irpSwitch; 1100: 1101: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1102: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1103: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1104: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1105: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 1106: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 1107: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 1108: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 1109: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 1110: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 1111: case 0b0100_110_001: 1112: irpDivuDivsLong (); 1113: break irpSwitch; 1114: 1115: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1116: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1117: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1118: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1119: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 1120: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 1121: case 0b0100_110_010: 1122: irpMovemToRegWord (); 1123: break irpSwitch; 1124: 1125: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1126: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1127: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1129: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 1130: case 0b0100_110_011: 1131: irpMovemToRegLong (); 1132: break irpSwitch; 1133: 1134: case 0b0100_111_001: 1135: switch (XEiJ.regOC & 0b111_111) { 1136: 1137: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1138: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1139: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1140: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1141: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 1142: case 0b000_000: 1143: case 0b000_001: 1144: case 0b000_010: 1145: case 0b000_011: 1146: case 0b000_100: 1147: case 0b000_101: 1148: case 0b000_110: 1149: case 0b000_111: 1150: case 0b001_000: 1151: case 0b001_001: 1152: case 0b001_010: 1153: case 0b001_011: 1154: case 0b001_100: 1155: case 0b001_101: 1156: case 0b001_110: 1157: irpTrap (); 1158: break irpSwitch; 1159: case 0b001_111: 1160: irpTrap15 (); 1161: break irpSwitch; 1162: 1163: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1164: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1165: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1166: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1167: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 1168: case 0b010_000: 1169: case 0b010_001: 1170: case 0b010_010: 1171: case 0b010_011: 1172: case 0b010_100: 1173: case 0b010_101: 1174: case 0b010_110: 1175: case 0b010_111: 1176: irpLinkWord (); 1177: break irpSwitch; 1178: 1179: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1180: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1181: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1182: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1183: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 1184: case 0b011_000: 1185: case 0b011_001: 1186: case 0b011_010: 1187: case 0b011_011: 1188: case 0b011_100: 1189: case 0b011_101: 1190: case 0b011_110: 1191: case 0b011_111: 1192: irpUnlk (); 1193: break irpSwitch; 1194: 1195: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1196: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1197: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1198: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1199: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 1200: case 0b100_000: 1201: case 0b100_001: 1202: case 0b100_010: 1203: case 0b100_011: 1204: case 0b100_100: 1205: case 0b100_101: 1206: case 0b100_110: 1207: case 0b100_111: 1208: irpMoveToUsp (); 1209: break irpSwitch; 1210: 1211: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1212: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1213: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1214: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1215: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 1216: case 0b101_000: 1217: case 0b101_001: 1218: case 0b101_010: 1219: case 0b101_011: 1220: case 0b101_100: 1221: case 0b101_101: 1222: case 0b101_110: 1223: case 0b101_111: 1224: irpMoveFromUsp (); 1225: break irpSwitch; 1226: 1227: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1228: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1229: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1231: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 1232: case 0b110_000: 1233: irpReset (); 1234: break irpSwitch; 1235: 1236: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1237: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1238: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1239: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1240: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 1241: case 0b110_001: 1242: irpNop (); 1243: break irpSwitch; 1244: 1245: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1246: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1247: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1248: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1249: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 1250: case 0b110_010: 1251: irpStop (); 1252: break irpSwitch; 1253: 1254: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1255: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1256: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1257: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1258: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 1259: case 0b110_011: 1260: irpRte (); 1261: break irpSwitch; 1262: 1263: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1264: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1265: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1266: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1267: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 1268: case 0b110_100: 1269: irpRtd (); 1270: break irpSwitch; 1271: 1272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1273: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1274: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1275: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1276: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 1277: case 0b110_101: 1278: irpRts (); 1279: break irpSwitch; 1280: 1281: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1282: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1283: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1284: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1285: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 1286: case 0b110_110: 1287: irpTrapv (); 1288: break irpSwitch; 1289: 1290: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1291: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1292: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1293: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1294: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 1295: case 0b110_111: 1296: irpRtr (); 1297: break irpSwitch; 1298: 1299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1300: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1301: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1303: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 1304: case 0b111_010: 1305: irpMovecFromControl (); 1306: break irpSwitch; 1307: 1308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1309: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1310: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1311: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1312: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 1313: case 0b111_011: 1314: irpMovecToControl (); 1315: break irpSwitch; 1316: 1317: default: 1318: irpIllegal (); 1319: 1320: } //switch XEiJ.regOC & 0b111_111 1321: break irpSwitch; 1322: 1323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1324: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1325: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1326: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1327: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 1328: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 1329: case 0b0100_111_010: 1330: irpJsr (); 1331: break irpSwitch; 1332: 1333: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1334: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1335: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1336: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1337: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 1338: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 1339: case 0b0100_111_011: 1340: irpJmp (); 1341: break irpSwitch; 1342: 1343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1344: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1345: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1346: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1347: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 1348: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 1349: case 0b0101_000_000: 1350: case 0b0101_001_000: 1351: case 0b0101_010_000: 1352: case 0b0101_011_000: 1353: case 0b0101_100_000: 1354: case 0b0101_101_000: 1355: case 0b0101_110_000: 1356: case 0b0101_111_000: 1357: irpAddqByte (); 1358: break irpSwitch; 1359: 1360: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1361: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1362: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1363: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1364: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 1365: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 1366: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 1367: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 1368: case 0b0101_000_001: 1369: case 0b0101_001_001: 1370: case 0b0101_010_001: 1371: case 0b0101_011_001: 1372: case 0b0101_100_001: 1373: case 0b0101_101_001: 1374: case 0b0101_110_001: 1375: case 0b0101_111_001: 1376: irpAddqWord (); 1377: break irpSwitch; 1378: 1379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1380: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1381: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1382: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1383: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 1384: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 1385: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 1386: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 1387: case 0b0101_000_010: 1388: case 0b0101_001_010: 1389: case 0b0101_010_010: 1390: case 0b0101_011_010: 1391: case 0b0101_100_010: 1392: case 0b0101_101_010: 1393: case 0b0101_110_010: 1394: case 0b0101_111_010: 1395: irpAddqLong (); 1396: break irpSwitch; 1397: 1398: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1399: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1400: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1401: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1402: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 1403: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 1404: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 1405: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 1406: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 1407: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1408: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1409: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1410: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 1411: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1412: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1413: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1414: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 1415: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1416: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1417: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1418: case 0b0101_000_011: 1419: irpSt (); 1420: break irpSwitch; 1421: 1422: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1423: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1424: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1425: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1426: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 1427: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 1428: case 0b0101_000_100: 1429: case 0b0101_001_100: 1430: case 0b0101_010_100: 1431: case 0b0101_011_100: 1432: case 0b0101_100_100: 1433: case 0b0101_101_100: 1434: case 0b0101_110_100: 1435: case 0b0101_111_100: 1436: irpSubqByte (); 1437: break irpSwitch; 1438: 1439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1440: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1441: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1443: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 1444: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 1445: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 1446: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 1447: case 0b0101_000_101: 1448: case 0b0101_001_101: 1449: case 0b0101_010_101: 1450: case 0b0101_011_101: 1451: case 0b0101_100_101: 1452: case 0b0101_101_101: 1453: case 0b0101_110_101: 1454: case 0b0101_111_101: 1455: irpSubqWord (); 1456: break irpSwitch; 1457: 1458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1459: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1460: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1461: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1462: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 1463: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 1464: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 1465: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 1466: case 0b0101_000_110: 1467: case 0b0101_001_110: 1468: case 0b0101_010_110: 1469: case 0b0101_011_110: 1470: case 0b0101_100_110: 1471: case 0b0101_101_110: 1472: case 0b0101_110_110: 1473: case 0b0101_111_110: 1474: irpSubqLong (); 1475: break irpSwitch; 1476: 1477: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1478: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1479: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1480: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1481: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 1482: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 1483: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 1484: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1485: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1486: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 1487: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1488: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1489: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1490: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 1491: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1492: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1493: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1494: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 1495: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1496: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1497: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1498: case 0b0101_000_111: 1499: irpSf (); 1500: break irpSwitch; 1501: 1502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1503: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1504: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1506: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 1507: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 1508: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 1509: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 1510: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 1511: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1512: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1513: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1514: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 1515: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1516: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1517: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1518: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 1519: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1520: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1521: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1522: case 0b0101_001_011: 1523: irpShi (); 1524: break irpSwitch; 1525: 1526: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1527: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1528: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1529: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1530: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 1531: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 1532: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 1533: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 1534: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1535: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1536: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1537: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1538: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1539: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1540: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1541: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1542: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 1543: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1544: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1545: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1546: case 0b0101_001_111: 1547: irpSls (); 1548: break irpSwitch; 1549: 1550: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1551: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1552: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1554: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 1555: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1556: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1557: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1558: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 1559: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1560: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1561: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1562: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 1563: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1564: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1565: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1566: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1567: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1568: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1569: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1570: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 1571: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1572: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1573: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1574: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1575: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1576: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1577: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1578: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 1579: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1580: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1581: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1582: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1583: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1584: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1585: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1586: case 0b0101_010_011: 1587: irpShs (); 1588: break irpSwitch; 1589: 1590: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1591: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1592: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1593: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1594: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 1595: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1596: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1597: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1598: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 1599: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1600: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1601: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1602: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 1603: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1604: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1605: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1606: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1607: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1608: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1609: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1610: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 1611: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1612: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1613: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1614: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1615: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1616: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1617: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1618: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 1619: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1620: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1621: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1622: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1623: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1624: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1625: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1626: case 0b0101_010_111: 1627: irpSlo (); 1628: break irpSwitch; 1629: 1630: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1631: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1632: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1633: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1634: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 1635: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1636: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1637: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1638: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 1639: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1640: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1641: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1642: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 1643: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1644: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1645: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1646: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1647: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1648: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1649: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1650: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 1651: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1652: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1653: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1654: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1655: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1656: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1657: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1658: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 1659: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1660: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1661: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1662: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1663: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1664: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1665: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1666: case 0b0101_011_011: 1667: irpSne (); 1668: break irpSwitch; 1669: 1670: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1671: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1672: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1673: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1674: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 1675: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1676: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1677: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1678: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 1679: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1680: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1681: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1682: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 1683: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1684: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1685: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1686: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1687: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1688: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1689: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1690: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 1691: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1692: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1693: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1694: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1695: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1696: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1697: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1698: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 1699: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1700: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1701: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1702: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1703: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1704: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1705: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1706: case 0b0101_011_111: 1707: irpSeq (); 1708: break irpSwitch; 1709: 1710: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1711: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1712: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1713: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1714: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 1715: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 1716: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 1717: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 1718: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 1719: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1720: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1721: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1722: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 1723: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1724: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1725: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1726: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 1727: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1728: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1729: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1730: case 0b0101_100_011: 1731: irpSvc (); 1732: break irpSwitch; 1733: 1734: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1735: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1736: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1737: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1738: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 1739: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 1740: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 1741: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 1742: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 1743: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1744: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1745: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1746: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 1747: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1748: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1749: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1750: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 1751: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1752: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1753: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1754: case 0b0101_100_111: 1755: irpSvs (); 1756: break irpSwitch; 1757: 1758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1759: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1760: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1762: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 1763: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 1764: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 1765: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 1766: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 1767: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1768: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1769: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1770: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 1771: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1772: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1773: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1774: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 1775: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1776: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1777: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1778: case 0b0101_101_011: 1779: irpSpl (); 1780: break irpSwitch; 1781: 1782: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1783: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1784: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1785: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1786: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 1787: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 1788: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 1789: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 1790: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 1791: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1792: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1793: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1794: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 1795: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1796: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1797: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1798: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 1799: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1800: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1801: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1802: case 0b0101_101_111: 1803: irpSmi (); 1804: break irpSwitch; 1805: 1806: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1807: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1808: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1810: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 1811: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 1812: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 1813: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 1814: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 1815: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1816: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1817: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1818: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 1819: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1820: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1821: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1822: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 1823: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1824: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1825: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1826: case 0b0101_110_011: 1827: irpSge (); 1828: break irpSwitch; 1829: 1830: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1831: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1832: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1833: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1834: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 1835: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 1836: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 1837: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 1838: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 1839: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1840: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1841: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1842: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 1843: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1844: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1845: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1846: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 1847: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1848: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1849: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1850: case 0b0101_110_111: 1851: irpSlt (); 1852: break irpSwitch; 1853: 1854: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1855: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1856: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1857: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1858: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 1859: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 1860: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 1861: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 1862: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 1863: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1864: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1865: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1866: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 1867: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1868: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1869: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1870: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 1871: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1872: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1873: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1874: case 0b0101_111_011: 1875: irpSgt (); 1876: break irpSwitch; 1877: 1878: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1879: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1880: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1882: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 1883: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 1884: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 1885: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 1886: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 1887: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1888: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1889: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1890: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 1891: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1892: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1893: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1894: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 1895: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1896: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1897: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1898: case 0b0101_111_111: 1899: irpSle (); 1900: break irpSwitch; 1901: 1902: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1903: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1904: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1905: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1906: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 1907: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 1908: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 1909: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 1910: case 0b0110_000_000: 1911: irpBrasw (); 1912: break irpSwitch; 1913: 1914: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1915: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1916: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1917: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1918: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 1919: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 1920: case 0b0110_000_001: 1921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1922: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1923: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1924: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1925: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 1926: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 1927: case 0b0110_000_010: 1928: irpBras (); 1929: break irpSwitch; 1930: 1931: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1932: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1933: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1935: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 1936: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 1937: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 1938: case 0b0110_000_011: 1939: irpBrasl (); 1940: break irpSwitch; 1941: 1942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1943: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1944: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1945: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1946: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 1947: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 1948: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 1949: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 1950: case 0b0110_000_100: 1951: irpBsrsw (); 1952: break irpSwitch; 1953: 1954: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1955: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1956: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1957: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1958: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 1959: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 1960: case 0b0110_000_101: 1961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1962: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1963: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1964: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1965: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 1966: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 1967: case 0b0110_000_110: 1968: irpBsrs (); 1969: break irpSwitch; 1970: 1971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1972: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1973: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1974: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1975: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 1976: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 1977: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 1978: case 0b0110_000_111: 1979: irpBsrsl (); 1980: break irpSwitch; 1981: 1982: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1983: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1984: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1986: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 1987: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1988: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1989: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1990: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 1991: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1992: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1993: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1994: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1995: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1996: case 0b0110_001_000: 1997: irpBhisw (); 1998: break irpSwitch; 1999: 2000: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2001: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2002: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2003: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2004: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 2005: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2006: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2007: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2008: case 0b0110_001_001: 2009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2010: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2011: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2012: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2013: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 2014: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2015: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2016: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2017: case 0b0110_001_010: 2018: irpBhis (); 2019: break irpSwitch; 2020: 2021: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2022: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2023: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2024: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2025: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 2026: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2027: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2028: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2029: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 2030: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 2031: case 0b0110_001_011: 2032: irpBhisl (); 2033: break irpSwitch; 2034: 2035: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2036: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2037: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2038: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2039: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 2040: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2041: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2042: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2043: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 2044: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2045: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2046: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2047: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2048: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2049: case 0b0110_001_100: 2050: irpBlssw (); 2051: break irpSwitch; 2052: 2053: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2054: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2055: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2056: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2057: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 2058: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2059: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2060: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2061: case 0b0110_001_101: 2062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2063: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2064: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2065: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2066: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 2067: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2068: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2069: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2070: case 0b0110_001_110: 2071: irpBlss (); 2072: break irpSwitch; 2073: 2074: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2075: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2076: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2078: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 2079: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2080: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2081: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2082: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 2083: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 2084: case 0b0110_001_111: 2085: irpBlssl (); 2086: break irpSwitch; 2087: 2088: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2089: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2090: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2091: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2092: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 2093: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2094: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2095: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2096: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2097: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2098: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2099: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2100: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 2101: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2102: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2103: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2104: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2105: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2106: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2107: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2108: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2109: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2110: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2111: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2112: case 0b0110_010_000: 2113: irpBhssw (); 2114: break irpSwitch; 2115: 2116: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2117: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2118: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2119: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2120: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 2121: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2122: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2123: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2124: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2125: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2126: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2127: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2128: case 0b0110_010_001: 2129: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2130: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2131: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2132: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2133: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 2134: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2135: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2136: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2137: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2138: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2139: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2140: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2141: case 0b0110_010_010: 2142: irpBhss (); 2143: break irpSwitch; 2144: 2145: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2146: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2147: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2148: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2149: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 2150: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2151: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2152: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2153: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2154: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2155: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2156: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2157: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 2158: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2159: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2160: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2161: case 0b0110_010_011: 2162: irpBhssl (); 2163: break irpSwitch; 2164: 2165: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2166: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2167: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2168: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2169: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 2170: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2171: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2172: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2173: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2174: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2175: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2176: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2177: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 2178: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2179: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2180: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2181: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2182: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2183: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2184: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2185: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2186: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2187: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2188: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2189: case 0b0110_010_100: 2190: irpBlosw (); 2191: break irpSwitch; 2192: 2193: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2194: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2195: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2196: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2197: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 2198: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2199: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2200: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2201: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2202: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2203: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2204: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2205: case 0b0110_010_101: 2206: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2207: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2208: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2210: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 2211: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2212: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2213: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2214: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2215: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2216: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2217: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2218: case 0b0110_010_110: 2219: irpBlos (); 2220: break irpSwitch; 2221: 2222: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2223: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2224: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2225: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2226: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 2227: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2228: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2229: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2230: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2231: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2232: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2233: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2234: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 2235: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2236: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2237: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2238: case 0b0110_010_111: 2239: irpBlosl (); 2240: break irpSwitch; 2241: 2242: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2243: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2244: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2245: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2246: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 2247: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2248: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2249: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2250: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2251: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2252: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2253: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2254: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 2255: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2256: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2257: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2258: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2259: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2260: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2261: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2262: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2263: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2264: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2265: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2266: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2267: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2268: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2269: case 0b0110_011_000: 2270: irpBnesw (); 2271: break irpSwitch; 2272: 2273: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2274: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2275: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2276: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2277: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 2278: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2279: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2280: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2281: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2282: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2283: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2284: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2285: case 0b0110_011_001: 2286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2287: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2288: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2290: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 2291: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2292: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2293: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2294: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2295: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2296: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2297: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2298: case 0b0110_011_010: 2299: irpBnes (); 2300: break irpSwitch; 2301: 2302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2303: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2304: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2306: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 2307: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2308: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2309: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2310: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2311: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2312: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2313: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2314: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 2315: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2316: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2317: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2318: case 0b0110_011_011: 2319: irpBnesl (); 2320: break irpSwitch; 2321: 2322: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2323: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2324: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2325: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2326: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 2327: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2328: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2329: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2330: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2331: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2332: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2333: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2334: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 2335: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2336: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2337: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2338: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2339: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2340: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2341: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2342: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 2343: case 0b0110_011_100: 2344: irpBeqsw (); 2345: break irpSwitch; 2346: 2347: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2348: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2349: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2350: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2351: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 2352: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2353: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2354: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2355: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2356: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2357: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2358: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2359: case 0b0110_011_101: 2360: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2361: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2362: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2363: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2364: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 2365: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2366: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2367: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2368: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2369: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2370: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2371: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2372: case 0b0110_011_110: 2373: irpBeqs (); 2374: break irpSwitch; 2375: 2376: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2377: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2378: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2380: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 2381: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2382: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2383: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2384: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2385: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2386: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2387: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2388: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 2389: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2390: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2391: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2392: case 0b0110_011_111: 2393: irpBeqsl (); 2394: break irpSwitch; 2395: 2396: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2397: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2398: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2399: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2400: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 2401: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2402: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2403: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2404: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 2405: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2406: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2407: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2408: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2409: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2410: case 0b0110_100_000: 2411: irpBvcsw (); 2412: break irpSwitch; 2413: 2414: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2415: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2416: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2417: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2418: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 2419: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2420: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2421: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2422: case 0b0110_100_001: 2423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2424: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2425: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2426: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2427: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 2428: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2429: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2430: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2431: case 0b0110_100_010: 2432: irpBvcs (); 2433: break irpSwitch; 2434: 2435: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2436: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2437: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2438: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2439: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 2440: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2441: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2442: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2443: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 2444: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 2445: case 0b0110_100_011: 2446: irpBvcsl (); 2447: break irpSwitch; 2448: 2449: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2450: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2451: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2452: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2453: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 2454: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2455: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2456: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2457: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 2458: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2459: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2460: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2461: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2462: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2463: case 0b0110_100_100: 2464: irpBvssw (); 2465: break irpSwitch; 2466: 2467: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2468: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2469: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2470: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2471: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 2472: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2473: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2474: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2475: case 0b0110_100_101: 2476: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2477: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2478: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2479: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2480: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 2481: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2482: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2483: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2484: case 0b0110_100_110: 2485: irpBvss (); 2486: break irpSwitch; 2487: 2488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2489: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2490: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2491: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2492: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 2493: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2494: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2495: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2496: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 2497: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 2498: case 0b0110_100_111: 2499: irpBvssl (); 2500: break irpSwitch; 2501: 2502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2503: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2504: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2506: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 2507: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2508: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2509: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2510: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 2511: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2512: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2513: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2514: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2515: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2516: case 0b0110_101_000: 2517: irpBplsw (); 2518: break irpSwitch; 2519: 2520: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2521: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2522: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2523: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2524: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 2525: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2526: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2527: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2528: case 0b0110_101_001: 2529: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2530: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2531: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2532: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2533: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 2534: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2535: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2536: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2537: case 0b0110_101_010: 2538: irpBpls (); 2539: break irpSwitch; 2540: 2541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2542: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2543: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2544: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2545: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 2546: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2547: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2548: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2549: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 2550: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 2551: case 0b0110_101_011: 2552: irpBplsl (); 2553: break irpSwitch; 2554: 2555: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2556: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2557: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2558: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2559: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 2560: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2561: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2562: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2563: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 2564: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2565: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2566: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2567: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2568: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2569: case 0b0110_101_100: 2570: irpBmisw (); 2571: break irpSwitch; 2572: 2573: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2574: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2575: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2576: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2577: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 2578: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2579: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2580: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2581: case 0b0110_101_101: 2582: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2583: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2584: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2585: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2586: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 2587: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2588: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2589: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2590: case 0b0110_101_110: 2591: irpBmis (); 2592: break irpSwitch; 2593: 2594: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2595: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2596: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2597: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2598: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 2599: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2600: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2601: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2602: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 2603: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 2604: case 0b0110_101_111: 2605: irpBmisl (); 2606: break irpSwitch; 2607: 2608: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2609: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2610: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2611: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2612: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 2613: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2614: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2615: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2616: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 2617: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2618: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2619: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2620: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2621: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2622: case 0b0110_110_000: 2623: irpBgesw (); 2624: break irpSwitch; 2625: 2626: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2627: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2628: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2629: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2630: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 2631: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2632: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2633: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2634: case 0b0110_110_001: 2635: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2636: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2637: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2638: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2639: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 2640: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2641: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2642: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2643: case 0b0110_110_010: 2644: irpBges (); 2645: break irpSwitch; 2646: 2647: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2648: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2649: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2651: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 2652: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2653: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2654: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2655: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 2656: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 2657: case 0b0110_110_011: 2658: irpBgesl (); 2659: break irpSwitch; 2660: 2661: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2662: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2663: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2664: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2665: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 2666: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2667: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2668: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2669: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 2670: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2671: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2672: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2673: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2674: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2675: case 0b0110_110_100: 2676: irpBltsw (); 2677: break irpSwitch; 2678: 2679: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2680: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2681: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2682: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2683: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 2684: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2685: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2686: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2687: case 0b0110_110_101: 2688: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2689: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2690: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2691: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2692: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 2693: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2694: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2695: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2696: case 0b0110_110_110: 2697: irpBlts (); 2698: break irpSwitch; 2699: 2700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2701: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2702: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2703: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2704: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 2705: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2706: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2707: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2708: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 2709: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 2710: case 0b0110_110_111: 2711: irpBltsl (); 2712: break irpSwitch; 2713: 2714: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2715: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2716: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2718: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 2719: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2720: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2721: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2722: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 2723: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2724: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2725: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2726: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2727: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2728: case 0b0110_111_000: 2729: irpBgtsw (); 2730: break irpSwitch; 2731: 2732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2733: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2734: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2736: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 2737: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2738: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2739: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2740: case 0b0110_111_001: 2741: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2742: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2743: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2744: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2745: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 2746: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2747: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2748: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2749: case 0b0110_111_010: 2750: irpBgts (); 2751: break irpSwitch; 2752: 2753: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2754: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2755: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2756: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2757: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 2758: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2759: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2760: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2761: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 2762: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 2763: case 0b0110_111_011: 2764: irpBgtsl (); 2765: break irpSwitch; 2766: 2767: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2768: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2769: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2770: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2771: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 2772: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2773: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2774: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2775: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 2776: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2777: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2778: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2779: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2780: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2781: case 0b0110_111_100: 2782: irpBlesw (); 2783: break irpSwitch; 2784: 2785: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2786: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2787: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2788: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2789: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 2790: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2791: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2792: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2793: case 0b0110_111_101: 2794: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2795: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2796: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2797: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2798: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 2799: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2800: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2801: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2802: case 0b0110_111_110: 2803: irpBles (); 2804: break irpSwitch; 2805: 2806: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2807: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2808: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2810: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 2811: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2812: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2813: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2814: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 2815: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 2816: case 0b0110_111_111: 2817: irpBlesl (); 2818: break irpSwitch; 2819: 2820: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2821: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2822: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2823: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2824: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 2825: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 2826: case 0b0111_000_000: 2827: case 0b0111_000_001: 2828: case 0b0111_000_010: 2829: case 0b0111_000_011: 2830: case 0b0111_001_000: 2831: case 0b0111_001_001: 2832: case 0b0111_001_010: 2833: case 0b0111_001_011: 2834: case 0b0111_010_000: 2835: case 0b0111_010_001: 2836: case 0b0111_010_010: 2837: case 0b0111_010_011: 2838: case 0b0111_011_000: 2839: case 0b0111_011_001: 2840: case 0b0111_011_010: 2841: case 0b0111_011_011: 2842: case 0b0111_100_000: 2843: case 0b0111_100_001: 2844: case 0b0111_100_010: 2845: case 0b0111_100_011: 2846: case 0b0111_101_000: 2847: case 0b0111_101_001: 2848: case 0b0111_101_010: 2849: case 0b0111_101_011: 2850: case 0b0111_110_000: 2851: case 0b0111_110_001: 2852: case 0b0111_110_010: 2853: case 0b0111_110_011: 2854: case 0b0111_111_000: 2855: case 0b0111_111_001: 2856: case 0b0111_111_010: 2857: case 0b0111_111_011: 2858: irpMoveq (); 2859: break irpSwitch; 2860: 2861: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2862: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2863: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2864: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2865: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 2866: case 0b0111_000_100: 2867: case 0b0111_001_100: 2868: case 0b0111_010_100: 2869: case 0b0111_011_100: 2870: case 0b0111_100_100: 2871: case 0b0111_101_100: 2872: case 0b0111_110_100: 2873: case 0b0111_111_100: 2874: irpMvsByte (); 2875: break irpSwitch; 2876: 2877: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2878: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2879: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2880: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2881: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 2882: case 0b0111_000_101: 2883: case 0b0111_001_101: 2884: case 0b0111_010_101: 2885: case 0b0111_011_101: 2886: case 0b0111_100_101: 2887: case 0b0111_101_101: 2888: case 0b0111_110_101: 2889: case 0b0111_111_101: 2890: irpMvsWord (); 2891: break irpSwitch; 2892: 2893: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2894: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2895: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2896: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2897: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 2898: case 0b0111_000_110: 2899: case 0b0111_001_110: 2900: case 0b0111_010_110: 2901: case 0b0111_011_110: 2902: case 0b0111_100_110: 2903: case 0b0111_101_110: 2904: case 0b0111_110_110: 2905: case 0b0111_111_110: 2906: irpMvzByte (); 2907: break irpSwitch; 2908: 2909: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2910: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2911: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2912: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2913: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 2914: case 0b0111_000_111: 2915: case 0b0111_001_111: 2916: case 0b0111_010_111: 2917: case 0b0111_011_111: 2918: case 0b0111_100_111: 2919: case 0b0111_101_111: 2920: case 0b0111_110_111: 2921: case 0b0111_111_111: 2922: irpMvzWord (); 2923: break irpSwitch; 2924: 2925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2926: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2927: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2928: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2929: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 2930: case 0b1000_000_000: 2931: case 0b1000_001_000: 2932: case 0b1000_010_000: 2933: case 0b1000_011_000: 2934: case 0b1000_100_000: 2935: case 0b1000_101_000: 2936: case 0b1000_110_000: 2937: case 0b1000_111_000: 2938: irpOrToRegByte (); 2939: break irpSwitch; 2940: 2941: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2942: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2943: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2944: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2945: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 2946: case 0b1000_000_001: 2947: case 0b1000_001_001: 2948: case 0b1000_010_001: 2949: case 0b1000_011_001: 2950: case 0b1000_100_001: 2951: case 0b1000_101_001: 2952: case 0b1000_110_001: 2953: case 0b1000_111_001: 2954: irpOrToRegWord (); 2955: break irpSwitch; 2956: 2957: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2958: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2959: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2960: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2961: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 2962: case 0b1000_000_010: 2963: case 0b1000_001_010: 2964: case 0b1000_010_010: 2965: case 0b1000_011_010: 2966: case 0b1000_100_010: 2967: case 0b1000_101_010: 2968: case 0b1000_110_010: 2969: case 0b1000_111_010: 2970: irpOrToRegLong (); 2971: break irpSwitch; 2972: 2973: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2974: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2975: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2976: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2977: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 2978: case 0b1000_000_011: 2979: case 0b1000_001_011: 2980: case 0b1000_010_011: 2981: case 0b1000_011_011: 2982: case 0b1000_100_011: 2983: case 0b1000_101_011: 2984: case 0b1000_110_011: 2985: case 0b1000_111_011: 2986: irpDivuWord (); 2987: break irpSwitch; 2988: 2989: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2990: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2991: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2992: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2993: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 2994: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 2995: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 2996: case 0b1000_000_100: 2997: case 0b1000_001_100: 2998: case 0b1000_010_100: 2999: case 0b1000_011_100: 3000: case 0b1000_100_100: 3001: case 0b1000_101_100: 3002: case 0b1000_110_100: 3003: case 0b1000_111_100: 3004: irpOrToMemByte (); 3005: break irpSwitch; 3006: 3007: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3008: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3009: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3010: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3011: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 3012: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 3013: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 3014: case 0b1000_000_101: 3015: case 0b1000_001_101: 3016: case 0b1000_010_101: 3017: case 0b1000_011_101: 3018: case 0b1000_100_101: 3019: case 0b1000_101_101: 3020: case 0b1000_110_101: 3021: case 0b1000_111_101: 3022: irpOrToMemWord (); 3023: break irpSwitch; 3024: 3025: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3026: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3027: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3028: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3029: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 3030: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 3031: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 3032: case 0b1000_000_110: 3033: case 0b1000_001_110: 3034: case 0b1000_010_110: 3035: case 0b1000_011_110: 3036: case 0b1000_100_110: 3037: case 0b1000_101_110: 3038: case 0b1000_110_110: 3039: case 0b1000_111_110: 3040: irpOrToMemLong (); 3041: break irpSwitch; 3042: 3043: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3044: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3045: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3046: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3047: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 3048: case 0b1000_000_111: 3049: case 0b1000_001_111: 3050: case 0b1000_010_111: 3051: case 0b1000_011_111: 3052: case 0b1000_100_111: 3053: case 0b1000_101_111: 3054: case 0b1000_110_111: 3055: case 0b1000_111_111: 3056: irpDivsWord (); 3057: break irpSwitch; 3058: 3059: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3060: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3061: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3063: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 3064: case 0b1001_000_000: 3065: case 0b1001_001_000: 3066: case 0b1001_010_000: 3067: case 0b1001_011_000: 3068: case 0b1001_100_000: 3069: case 0b1001_101_000: 3070: case 0b1001_110_000: 3071: case 0b1001_111_000: 3072: irpSubToRegByte (); 3073: break irpSwitch; 3074: 3075: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3076: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3077: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3078: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3079: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 3080: case 0b1001_000_001: 3081: case 0b1001_001_001: 3082: case 0b1001_010_001: 3083: case 0b1001_011_001: 3084: case 0b1001_100_001: 3085: case 0b1001_101_001: 3086: case 0b1001_110_001: 3087: case 0b1001_111_001: 3088: irpSubToRegWord (); 3089: break irpSwitch; 3090: 3091: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3092: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3093: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3094: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3095: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 3096: case 0b1001_000_010: 3097: case 0b1001_001_010: 3098: case 0b1001_010_010: 3099: case 0b1001_011_010: 3100: case 0b1001_100_010: 3101: case 0b1001_101_010: 3102: case 0b1001_110_010: 3103: case 0b1001_111_010: 3104: irpSubToRegLong (); 3105: break irpSwitch; 3106: 3107: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3108: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3109: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3110: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3111: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 3112: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 3113: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 3114: case 0b1001_000_011: 3115: case 0b1001_001_011: 3116: case 0b1001_010_011: 3117: case 0b1001_011_011: 3118: case 0b1001_100_011: 3119: case 0b1001_101_011: 3120: case 0b1001_110_011: 3121: case 0b1001_111_011: 3122: irpSubaWord (); 3123: break irpSwitch; 3124: 3125: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3126: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3127: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3129: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 3130: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 3131: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 3132: case 0b1001_000_100: 3133: case 0b1001_001_100: 3134: case 0b1001_010_100: 3135: case 0b1001_011_100: 3136: case 0b1001_100_100: 3137: case 0b1001_101_100: 3138: case 0b1001_110_100: 3139: case 0b1001_111_100: 3140: irpSubToMemByte (); 3141: break irpSwitch; 3142: 3143: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3144: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3145: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3146: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3147: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 3148: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 3149: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 3150: case 0b1001_000_101: 3151: case 0b1001_001_101: 3152: case 0b1001_010_101: 3153: case 0b1001_011_101: 3154: case 0b1001_100_101: 3155: case 0b1001_101_101: 3156: case 0b1001_110_101: 3157: case 0b1001_111_101: 3158: irpSubToMemWord (); 3159: break irpSwitch; 3160: 3161: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3162: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3163: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3164: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3165: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 3166: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 3167: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 3168: case 0b1001_000_110: 3169: case 0b1001_001_110: 3170: case 0b1001_010_110: 3171: case 0b1001_011_110: 3172: case 0b1001_100_110: 3173: case 0b1001_101_110: 3174: case 0b1001_110_110: 3175: case 0b1001_111_110: 3176: irpSubToMemLong (); 3177: break irpSwitch; 3178: 3179: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3180: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3181: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3182: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3183: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 3184: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 3185: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 3186: case 0b1001_000_111: 3187: case 0b1001_001_111: 3188: case 0b1001_010_111: 3189: case 0b1001_011_111: 3190: case 0b1001_100_111: 3191: case 0b1001_101_111: 3192: case 0b1001_110_111: 3193: case 0b1001_111_111: 3194: irpSubaLong (); 3195: break irpSwitch; 3196: 3197: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3198: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3199: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3200: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3201: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 3202: case 0b1010_000_000: 3203: case 0b1010_000_001: 3204: case 0b1010_000_010: 3205: case 0b1010_000_011: 3206: case 0b1010_000_100: 3207: case 0b1010_000_101: 3208: case 0b1010_000_110: 3209: case 0b1010_000_111: 3210: case 0b1010_001_000: 3211: case 0b1010_001_001: 3212: case 0b1010_001_010: 3213: case 0b1010_001_011: 3214: case 0b1010_001_100: 3215: case 0b1010_001_101: 3216: case 0b1010_001_110: 3217: case 0b1010_001_111: 3218: case 0b1010_010_000: 3219: case 0b1010_010_001: 3220: case 0b1010_010_010: 3221: case 0b1010_010_011: 3222: case 0b1010_010_100: 3223: case 0b1010_010_101: 3224: case 0b1010_010_110: 3225: case 0b1010_010_111: 3226: case 0b1010_011_000: 3227: case 0b1010_011_001: 3228: case 0b1010_011_010: 3229: case 0b1010_011_011: 3230: case 0b1010_011_100: 3231: case 0b1010_011_101: 3232: case 0b1010_011_110: 3233: case 0b1010_011_111: 3234: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3235: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3236: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3237: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3238: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 3239: case 0b1010_100_000: 3240: case 0b1010_100_001: 3241: case 0b1010_100_010: 3242: case 0b1010_100_011: 3243: case 0b1010_100_100: 3244: case 0b1010_100_101: 3245: case 0b1010_100_110: 3246: case 0b1010_100_111: 3247: case 0b1010_101_000: 3248: case 0b1010_101_001: 3249: case 0b1010_101_010: 3250: case 0b1010_101_011: 3251: case 0b1010_101_100: 3252: case 0b1010_101_101: 3253: case 0b1010_101_110: 3254: case 0b1010_101_111: 3255: case 0b1010_110_000: 3256: case 0b1010_110_001: 3257: case 0b1010_110_010: 3258: case 0b1010_110_011: 3259: case 0b1010_110_100: 3260: case 0b1010_110_101: 3261: case 0b1010_110_110: 3262: case 0b1010_110_111: 3263: case 0b1010_111_000: 3264: case 0b1010_111_001: 3265: case 0b1010_111_010: 3266: case 0b1010_111_011: 3267: case 0b1010_111_100: 3268: case 0b1010_111_101: 3269: case 0b1010_111_110: 3270: case 0b1010_111_111: 3271: irpAline (); 3272: break irpSwitch; 3273: 3274: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3275: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3276: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3277: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3278: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 3279: case 0b1011_000_000: 3280: case 0b1011_001_000: 3281: case 0b1011_010_000: 3282: case 0b1011_011_000: 3283: case 0b1011_100_000: 3284: case 0b1011_101_000: 3285: case 0b1011_110_000: 3286: case 0b1011_111_000: 3287: irpCmpByte (); 3288: break irpSwitch; 3289: 3290: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3291: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3292: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3293: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3294: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 3295: case 0b1011_000_001: 3296: case 0b1011_001_001: 3297: case 0b1011_010_001: 3298: case 0b1011_011_001: 3299: case 0b1011_100_001: 3300: case 0b1011_101_001: 3301: case 0b1011_110_001: 3302: case 0b1011_111_001: 3303: irpCmpWord (); 3304: break irpSwitch; 3305: 3306: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3307: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3308: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3310: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 3311: case 0b1011_000_010: 3312: case 0b1011_001_010: 3313: case 0b1011_010_010: 3314: case 0b1011_011_010: 3315: case 0b1011_100_010: 3316: case 0b1011_101_010: 3317: case 0b1011_110_010: 3318: case 0b1011_111_010: 3319: irpCmpLong (); 3320: break irpSwitch; 3321: 3322: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3323: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3324: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3325: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3326: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 3327: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 3328: case 0b1011_000_011: 3329: case 0b1011_001_011: 3330: case 0b1011_010_011: 3331: case 0b1011_011_011: 3332: case 0b1011_100_011: 3333: case 0b1011_101_011: 3334: case 0b1011_110_011: 3335: case 0b1011_111_011: 3336: irpCmpaWord (); 3337: break irpSwitch; 3338: 3339: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3340: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3341: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3342: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3343: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 3344: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 3345: case 0b1011_000_100: 3346: case 0b1011_001_100: 3347: case 0b1011_010_100: 3348: case 0b1011_011_100: 3349: case 0b1011_100_100: 3350: case 0b1011_101_100: 3351: case 0b1011_110_100: 3352: case 0b1011_111_100: 3353: irpEorByte (); 3354: break irpSwitch; 3355: 3356: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3357: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3358: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3359: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3360: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 3361: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 3362: case 0b1011_000_101: 3363: case 0b1011_001_101: 3364: case 0b1011_010_101: 3365: case 0b1011_011_101: 3366: case 0b1011_100_101: 3367: case 0b1011_101_101: 3368: case 0b1011_110_101: 3369: case 0b1011_111_101: 3370: irpEorWord (); 3371: break irpSwitch; 3372: 3373: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3374: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3375: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3376: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3377: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 3378: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 3379: case 0b1011_000_110: 3380: case 0b1011_001_110: 3381: case 0b1011_010_110: 3382: case 0b1011_011_110: 3383: case 0b1011_100_110: 3384: case 0b1011_101_110: 3385: case 0b1011_110_110: 3386: case 0b1011_111_110: 3387: irpEorLong (); 3388: break irpSwitch; 3389: 3390: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3391: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3392: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3393: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3394: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 3395: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 3396: case 0b1011_000_111: 3397: case 0b1011_001_111: 3398: case 0b1011_010_111: 3399: case 0b1011_011_111: 3400: case 0b1011_100_111: 3401: case 0b1011_101_111: 3402: case 0b1011_110_111: 3403: case 0b1011_111_111: 3404: irpCmpaLong (); 3405: break irpSwitch; 3406: 3407: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3408: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3409: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3410: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3411: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 3412: case 0b1100_000_000: 3413: case 0b1100_001_000: 3414: case 0b1100_010_000: 3415: case 0b1100_011_000: 3416: case 0b1100_100_000: 3417: case 0b1100_101_000: 3418: case 0b1100_110_000: 3419: case 0b1100_111_000: 3420: irpAndToRegByte (); 3421: break irpSwitch; 3422: 3423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3424: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3425: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3426: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3427: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 3428: case 0b1100_000_001: 3429: case 0b1100_001_001: 3430: case 0b1100_010_001: 3431: case 0b1100_011_001: 3432: case 0b1100_100_001: 3433: case 0b1100_101_001: 3434: case 0b1100_110_001: 3435: case 0b1100_111_001: 3436: irpAndToRegWord (); 3437: break irpSwitch; 3438: 3439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3440: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3441: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3443: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 3444: case 0b1100_000_010: 3445: case 0b1100_001_010: 3446: case 0b1100_010_010: 3447: case 0b1100_011_010: 3448: case 0b1100_100_010: 3449: case 0b1100_101_010: 3450: case 0b1100_110_010: 3451: case 0b1100_111_010: 3452: irpAndToRegLong (); 3453: break irpSwitch; 3454: 3455: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3456: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3457: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3459: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 3460: case 0b1100_000_011: 3461: case 0b1100_001_011: 3462: case 0b1100_010_011: 3463: case 0b1100_011_011: 3464: case 0b1100_100_011: 3465: case 0b1100_101_011: 3466: case 0b1100_110_011: 3467: case 0b1100_111_011: 3468: irpMuluWord (); 3469: break irpSwitch; 3470: 3471: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3472: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3473: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3475: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 3476: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 3477: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 3478: case 0b1100_000_100: 3479: case 0b1100_001_100: 3480: case 0b1100_010_100: 3481: case 0b1100_011_100: 3482: case 0b1100_100_100: 3483: case 0b1100_101_100: 3484: case 0b1100_110_100: 3485: case 0b1100_111_100: 3486: irpAndToMemByte (); 3487: break irpSwitch; 3488: 3489: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3490: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3491: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3492: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3493: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 3494: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 3495: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 3496: case 0b1100_000_101: 3497: case 0b1100_001_101: 3498: case 0b1100_010_101: 3499: case 0b1100_011_101: 3500: case 0b1100_100_101: 3501: case 0b1100_101_101: 3502: case 0b1100_110_101: 3503: case 0b1100_111_101: 3504: irpAndToMemWord (); 3505: break irpSwitch; 3506: 3507: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3508: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3509: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3510: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3511: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 3512: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 3513: case 0b1100_000_110: 3514: case 0b1100_001_110: 3515: case 0b1100_010_110: 3516: case 0b1100_011_110: 3517: case 0b1100_100_110: 3518: case 0b1100_101_110: 3519: case 0b1100_110_110: 3520: case 0b1100_111_110: 3521: irpAndToMemLong (); 3522: break irpSwitch; 3523: 3524: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3525: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3526: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3528: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 3529: case 0b1100_000_111: 3530: case 0b1100_001_111: 3531: case 0b1100_010_111: 3532: case 0b1100_011_111: 3533: case 0b1100_100_111: 3534: case 0b1100_101_111: 3535: case 0b1100_110_111: 3536: case 0b1100_111_111: 3537: irpMulsWord (); 3538: break irpSwitch; 3539: 3540: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3541: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3542: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3543: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3544: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 3545: case 0b1101_000_000: 3546: case 0b1101_001_000: 3547: case 0b1101_010_000: 3548: case 0b1101_011_000: 3549: case 0b1101_100_000: 3550: case 0b1101_101_000: 3551: case 0b1101_110_000: 3552: case 0b1101_111_000: 3553: irpAddToRegByte (); 3554: break irpSwitch; 3555: 3556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3557: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3558: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3559: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3560: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 3561: case 0b1101_000_001: 3562: case 0b1101_001_001: 3563: case 0b1101_010_001: 3564: case 0b1101_011_001: 3565: case 0b1101_100_001: 3566: case 0b1101_101_001: 3567: case 0b1101_110_001: 3568: case 0b1101_111_001: 3569: irpAddToRegWord (); 3570: break irpSwitch; 3571: 3572: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3573: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3574: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3575: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3576: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 3577: case 0b1101_000_010: 3578: case 0b1101_001_010: 3579: case 0b1101_010_010: 3580: case 0b1101_011_010: 3581: case 0b1101_100_010: 3582: case 0b1101_101_010: 3583: case 0b1101_110_010: 3584: case 0b1101_111_010: 3585: irpAddToRegLong (); 3586: break irpSwitch; 3587: 3588: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3589: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3590: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3591: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3592: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 3593: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 3594: case 0b1101_000_011: 3595: case 0b1101_001_011: 3596: case 0b1101_010_011: 3597: case 0b1101_011_011: 3598: case 0b1101_100_011: 3599: case 0b1101_101_011: 3600: case 0b1101_110_011: 3601: case 0b1101_111_011: 3602: irpAddaWord (); 3603: break irpSwitch; 3604: 3605: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3606: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3607: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3608: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3609: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 3610: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 3611: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 3612: case 0b1101_000_100: 3613: case 0b1101_001_100: 3614: case 0b1101_010_100: 3615: case 0b1101_011_100: 3616: case 0b1101_100_100: 3617: case 0b1101_101_100: 3618: case 0b1101_110_100: 3619: case 0b1101_111_100: 3620: irpAddToMemByte (); 3621: break irpSwitch; 3622: 3623: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3624: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3625: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3626: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3627: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 3628: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 3629: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 3630: case 0b1101_000_101: 3631: case 0b1101_001_101: 3632: case 0b1101_010_101: 3633: case 0b1101_011_101: 3634: case 0b1101_100_101: 3635: case 0b1101_101_101: 3636: case 0b1101_110_101: 3637: case 0b1101_111_101: 3638: irpAddToMemWord (); 3639: break irpSwitch; 3640: 3641: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3642: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3643: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3644: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3645: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 3646: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 3647: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 3648: case 0b1101_000_110: 3649: case 0b1101_001_110: 3650: case 0b1101_010_110: 3651: case 0b1101_011_110: 3652: case 0b1101_100_110: 3653: case 0b1101_101_110: 3654: case 0b1101_110_110: 3655: case 0b1101_111_110: 3656: irpAddToMemLong (); 3657: break irpSwitch; 3658: 3659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3660: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3661: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3663: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 3664: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 3665: case 0b1101_000_111: 3666: case 0b1101_001_111: 3667: case 0b1101_010_111: 3668: case 0b1101_011_111: 3669: case 0b1101_100_111: 3670: case 0b1101_101_111: 3671: case 0b1101_110_111: 3672: case 0b1101_111_111: 3673: irpAddaLong (); 3674: break irpSwitch; 3675: 3676: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3677: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3678: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3679: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3680: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 3681: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 3682: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 3683: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 3684: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 3685: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 3686: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 3687: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 3688: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 3689: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 3690: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 3691: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 3692: case 0b1110_000_000: 3693: case 0b1110_001_000: 3694: case 0b1110_010_000: 3695: case 0b1110_011_000: 3696: case 0b1110_100_000: 3697: case 0b1110_101_000: 3698: case 0b1110_110_000: 3699: case 0b1110_111_000: 3700: irpXxrToRegByte (); 3701: break irpSwitch; 3702: 3703: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3704: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3705: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3706: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3707: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 3708: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 3709: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 3710: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 3711: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 3712: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 3713: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 3714: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 3715: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 3716: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 3717: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 3718: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 3719: case 0b1110_000_001: 3720: case 0b1110_001_001: 3721: case 0b1110_010_001: 3722: case 0b1110_011_001: 3723: case 0b1110_100_001: 3724: case 0b1110_101_001: 3725: case 0b1110_110_001: 3726: case 0b1110_111_001: 3727: irpXxrToRegWord (); 3728: break irpSwitch; 3729: 3730: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3731: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3732: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3734: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 3735: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 3736: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 3737: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 3738: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 3739: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 3740: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 3741: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 3742: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 3743: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 3744: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 3745: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 3746: case 0b1110_000_010: 3747: case 0b1110_001_010: 3748: case 0b1110_010_010: 3749: case 0b1110_011_010: 3750: case 0b1110_100_010: 3751: case 0b1110_101_010: 3752: case 0b1110_110_010: 3753: case 0b1110_111_010: 3754: irpXxrToRegLong (); 3755: break irpSwitch; 3756: 3757: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3758: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3759: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3760: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3761: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 3762: case 0b1110_000_011: 3763: irpAsrToMem (); 3764: break irpSwitch; 3765: 3766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3767: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3768: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3769: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3770: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 3771: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 3772: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 3773: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 3774: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 3775: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 3776: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 3777: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 3778: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 3779: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 3780: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 3781: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 3782: case 0b1110_000_100: 3783: case 0b1110_001_100: 3784: case 0b1110_010_100: 3785: case 0b1110_011_100: 3786: case 0b1110_100_100: 3787: case 0b1110_101_100: 3788: case 0b1110_110_100: 3789: case 0b1110_111_100: 3790: irpXxlToRegByte (); 3791: break irpSwitch; 3792: 3793: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3794: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3795: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3796: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3797: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 3798: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 3799: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 3800: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 3801: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 3802: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 3803: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 3804: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 3805: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 3806: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 3807: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 3808: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 3809: case 0b1110_000_101: 3810: case 0b1110_001_101: 3811: case 0b1110_010_101: 3812: case 0b1110_011_101: 3813: case 0b1110_100_101: 3814: case 0b1110_101_101: 3815: case 0b1110_110_101: 3816: case 0b1110_111_101: 3817: irpXxlToRegWord (); 3818: break irpSwitch; 3819: 3820: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3821: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3822: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3823: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3824: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 3825: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 3826: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 3827: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 3828: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 3829: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 3830: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 3831: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 3832: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 3833: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 3834: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 3835: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 3836: case 0b1110_000_110: 3837: case 0b1110_001_110: 3838: case 0b1110_010_110: 3839: case 0b1110_011_110: 3840: case 0b1110_100_110: 3841: case 0b1110_101_110: 3842: case 0b1110_110_110: 3843: case 0b1110_111_110: 3844: irpXxlToRegLong (); 3845: break irpSwitch; 3846: 3847: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3848: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3849: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3850: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3851: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 3852: case 0b1110_000_111: 3853: irpAslToMem (); 3854: break irpSwitch; 3855: 3856: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3857: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3858: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3859: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3860: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 3861: case 0b1110_001_011: 3862: irpLsrToMem (); 3863: break irpSwitch; 3864: 3865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3869: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 3870: case 0b1110_001_111: 3871: irpLslToMem (); 3872: break irpSwitch; 3873: 3874: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3875: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3876: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3877: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3878: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 3879: case 0b1110_010_011: 3880: irpRoxrToMem (); 3881: break irpSwitch; 3882: 3883: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3884: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3885: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3886: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3887: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 3888: case 0b1110_010_111: 3889: irpRoxlToMem (); 3890: break irpSwitch; 3891: 3892: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3893: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3894: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3895: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3896: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 3897: case 0b1110_011_011: 3898: irpRorToMem (); 3899: break irpSwitch; 3900: 3901: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3902: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3903: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3904: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3905: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 3906: case 0b1110_011_111: 3907: irpRolToMem (); 3908: break irpSwitch; 3909: 3910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3911: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3912: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3913: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3914: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 3915: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 3916: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 3917: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 3918: case 0b1110_100_011: 3919: irpBftst (); 3920: break irpSwitch; 3921: 3922: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3923: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3924: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3926: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 3927: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 3928: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 3929: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 3930: case 0b1110_100_111: 3931: irpBfextu (); 3932: break irpSwitch; 3933: 3934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3935: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3936: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3938: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 3939: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 3940: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 3941: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 3942: case 0b1110_101_011: 3943: irpBfchg (); 3944: break irpSwitch; 3945: 3946: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3947: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3948: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3949: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3950: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 3951: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 3952: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 3953: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 3954: case 0b1110_101_111: 3955: irpBfexts (); 3956: break irpSwitch; 3957: 3958: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3959: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3960: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3962: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 3963: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 3964: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 3965: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 3966: case 0b1110_110_011: 3967: irpBfclr (); 3968: break irpSwitch; 3969: 3970: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3971: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3972: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3973: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3974: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 3975: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 3976: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 3977: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 3978: case 0b1110_110_111: 3979: irpBfffo (); 3980: break irpSwitch; 3981: 3982: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3983: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3984: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3986: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 3987: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 3988: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 3989: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 3990: case 0b1110_111_011: 3991: irpBfset (); 3992: break irpSwitch; 3993: 3994: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3995: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3996: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3997: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3998: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 3999: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 4000: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 4001: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 4002: case 0b1110_111_111: 4003: irpBfins (); 4004: break irpSwitch; 4005: 4006: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4007: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4008: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4010: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 4011: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 4012: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 4013: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 4014: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 4015: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 4016: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 4017: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 4018: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 4019: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 4020: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 4021: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 4022: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 4023: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 4024: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 4025: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 4026: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 4027: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 4028: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 4029: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 4030: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 4031: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 4032: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 4033: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 4034: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 4035: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 4036: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 4037: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 4038: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 4039: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 4040: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 4041: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 4042: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 4043: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 4044: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 4045: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 4046: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 4047: //FSMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000000 4048: //FSSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000001 4049: //FDMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000100 4050: //FDSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000101 4051: //FSABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011000 4052: //FSNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011010 4053: //FDABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011100 4054: //FDNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011110 4055: //FSDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100000 4056: //FSADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100010 4057: //FSMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100011 4058: //FDDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100100 4059: //FDADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100110 4060: //FDMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100111 4061: //FSSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101000 4062: //FDSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101100 4063: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 4064: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 4065: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 4066: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 4067: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 4068: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 4069: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4070: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4071: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4072: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4073: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4074: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4075: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 4076: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 4077: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 4078: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 4079: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 4080: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 4081: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 4082: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 4083: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 4084: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 4085: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 4086: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 4087: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 4088: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 4089: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 4090: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 4091: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 4092: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 4093: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 4094: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 4095: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 4096: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 4097: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 4098: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 4099: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 4100: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 4101: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 4102: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 4103: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 4104: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 4105: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 4106: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 4107: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 4108: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 4109: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 4110: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 4111: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 4112: //FSMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000 4113: //FSSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001 4114: //FDMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100 4115: //FDSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101 4116: //FSABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000 4117: //FSNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010 4118: //FDABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100 4119: //FDNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110 4120: //FSDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000 4121: //FSADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010 4122: //FSMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011 4123: //FDDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100 4124: //FDADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110 4125: //FDMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111 4126: //FSSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000 4127: //FDSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100 4128: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 4129: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 4130: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 4131: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 4132: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 4133: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 4134: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 4135: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 4136: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 4137: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 4138: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 4139: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 4140: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 4141: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 4142: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 4143: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 4144: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 4145: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 4146: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 4147: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 4148: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 4149: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 4150: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 4151: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 4152: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 4153: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 4154: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 4155: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 4156: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 4157: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 4158: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 4159: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 4160: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 4161: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 4162: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 4163: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 4164: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 4165: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 4166: //FSMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000 4167: //FSSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001 4168: //FDMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100 4169: //FDSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101 4170: //FSABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000 4171: //FSNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010 4172: //FDABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100 4173: //FDNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110 4174: //FSDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000 4175: //FSADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010 4176: //FSMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011 4177: //FDDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100 4178: //FDADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110 4179: //FDMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111 4180: //FSSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000 4181: //FDSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100 4182: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 4183: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 4184: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 4185: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 4186: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 4187: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 4188: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 4189: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 4190: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 4191: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 4192: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 4193: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 4194: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 4195: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 4196: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 4197: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 4198: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 4199: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 4200: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 4201: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 4202: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 4203: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 4204: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 4205: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 4206: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 4207: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 4208: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 4209: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 4210: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 4211: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 4212: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 4213: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 4214: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 4215: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 4216: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 4217: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 4218: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 4219: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 4220: //FSMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000 4221: //FSSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001 4222: //FDMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100 4223: //FDSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101 4224: //FSABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000 4225: //FSNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010 4226: //FDABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100 4227: //FDNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110 4228: //FSDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000 4229: //FSADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010 4230: //FSMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011 4231: //FDDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100 4232: //FDADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110 4233: //FDMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111 4234: //FSSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000 4235: //FDSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100 4236: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 4237: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 4238: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 4239: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 4240: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 4241: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 4242: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 4243: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 4244: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 4245: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 4246: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 4247: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 4248: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 4249: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 4250: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 4251: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 4252: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 4253: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 4254: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 4255: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 4256: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 4257: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 4258: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 4259: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 4260: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 4261: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 4262: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 4263: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 4264: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 4265: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 4266: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 4267: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 4268: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 4269: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 4270: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 4271: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 4272: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 4273: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 4274: //FSMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000 4275: //FSSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001 4276: //FDMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100 4277: //FDSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101 4278: //FSABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000 4279: //FSNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010 4280: //FDABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100 4281: //FDNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110 4282: //FSDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000 4283: //FSADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010 4284: //FSMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011 4285: //FDDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100 4286: //FDADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110 4287: //FDMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111 4288: //FSSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000 4289: //FDSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100 4290: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 4291: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4292: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4293: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4294: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4295: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4296: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4297: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 4298: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 4299: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 4300: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 4301: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 4302: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 4303: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 4304: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 4305: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 4306: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 4307: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 4308: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 4309: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 4310: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 4311: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 4312: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 4313: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 4314: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 4315: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 4316: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 4317: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 4318: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 4319: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 4320: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 4321: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 4322: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 4323: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 4324: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 4325: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 4326: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 4327: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 4328: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 4329: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 4330: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 4331: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 4332: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 4333: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 4334: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 4335: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 4336: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 4337: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 4338: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 4339: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 4340: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 4341: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 4342: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 4343: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 4344: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 4345: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 4346: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 4347: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 4348: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 4349: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 4350: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 4351: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 4352: //FSMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000 4353: //FSSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001 4354: //FDMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100 4355: //FDSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101 4356: //FSABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000 4357: //FSNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010 4358: //FDABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100 4359: //FDNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110 4360: //FSDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000 4361: //FSADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010 4362: //FSMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011 4363: //FDDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100 4364: //FDADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110 4365: //FDMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111 4366: //FSSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000 4367: //FDSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100 4368: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 4369: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 4370: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 4371: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 4372: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 4373: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 4374: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 4375: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 4376: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 4377: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 4378: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 4379: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 4380: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 4381: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 4382: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 4383: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 4384: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 4385: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 4386: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 4387: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 4388: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 4389: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 4390: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 4391: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 4392: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 4393: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 4394: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 4395: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 4396: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 4397: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 4398: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 4399: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 4400: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 4401: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 4402: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 4403: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 4404: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 4405: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 4406: //FSMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000 4407: //FSSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001 4408: //FDMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100 4409: //FDSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101 4410: //FSABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000 4411: //FSNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010 4412: //FDABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100 4413: //FDNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110 4414: //FSDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000 4415: //FSADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010 4416: //FSMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011 4417: //FDDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100 4418: //FDADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110 4419: //FDMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111 4420: //FSSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000 4421: //FDSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100 4422: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 4423: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 4424: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 4425: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 4426: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 4427: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 4428: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 4429: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 4430: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 4431: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 4432: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 4433: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 4434: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 4435: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 4436: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 4437: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 4438: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 4439: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 4440: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 4441: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 4442: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 4443: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 4444: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 4445: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 4446: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 4447: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 4448: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 4449: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 4450: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 4451: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 4452: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 4453: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 4454: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 4455: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 4456: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 4457: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 4458: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 4459: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 4460: //FSMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000 4461: //FSSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001 4462: //FDMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100 4463: //FDSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101 4464: //FSABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000 4465: //FSNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010 4466: //FDABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100 4467: //FDNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110 4468: //FSDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000 4469: //FSADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010 4470: //FSMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011 4471: //FDDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100 4472: //FDADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110 4473: //FDMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111 4474: //FSSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000 4475: //FDSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100 4476: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 4477: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 4478: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 4479: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 4480: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 4481: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 4482: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 4483: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 4484: case 0b1111_001_000: 4485: irpFgen (); 4486: break irpSwitch; 4487: 4488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4489: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4490: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4491: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4492: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 4493: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 4494: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 4495: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 4496: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 4497: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 4498: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 4499: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 4500: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 4501: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 4502: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 4503: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 4504: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 4505: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 4506: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 4507: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 4508: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 4509: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 4510: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 4511: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 4512: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 4513: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 4514: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 4515: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 4516: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 4517: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 4518: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 4519: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 4520: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 4521: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 4522: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 4523: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 4524: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 4525: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 4526: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 4527: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 4528: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 4529: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 4530: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 4531: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 4532: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 4533: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 4534: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 4535: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 4536: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 4537: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 4538: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 4539: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 4540: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 4541: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 4542: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 4543: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 4544: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 4545: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 4546: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 4547: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 4548: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 4549: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 4550: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 4551: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 4552: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 4553: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 4554: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 4555: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 4556: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 4557: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 4558: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 4559: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 4560: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 4561: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 4562: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 4563: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 4564: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 4565: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 4566: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 4567: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 4568: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 4569: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 4570: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 4571: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 4572: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 4573: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 4574: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 4575: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 4576: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 4577: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 4578: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 4579: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 4580: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 4581: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 4582: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 4583: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 4584: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 4585: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 4586: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 4587: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 4588: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 4589: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 4590: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 4591: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 4592: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 4593: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 4594: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 4595: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 4596: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 4597: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 4598: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 4599: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 4600: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 4601: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 4602: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 4603: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 4604: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 4605: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 4606: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 4607: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 4608: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 4609: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 4610: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 4611: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 4612: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 4613: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 4614: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 4615: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 4616: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 4617: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 4618: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 4619: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 4620: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 4621: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 4622: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 4623: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 4624: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 4625: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 4626: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 4627: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 4628: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 4629: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 4630: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 4631: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 4632: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 4633: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 4634: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 4635: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 4636: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 4637: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 4638: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 4639: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 4640: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 4641: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 4642: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 4643: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 4644: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 4645: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 4646: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 4647: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 4648: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 4649: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 4650: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 4651: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 4652: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 4653: case 0b1111_001_001: 4654: irpFscc (); 4655: break irpSwitch; 4656: 4657: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4658: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4659: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4660: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4661: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 4662: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 4663: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 4664: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 4665: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 4666: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 4667: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 4668: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 4669: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 4670: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 4671: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 4672: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 4673: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 4674: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 4675: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 4676: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 4677: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 4678: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 4679: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 4680: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 4681: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 4682: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 4683: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 4684: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 4685: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 4686: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 4687: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 4688: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 4689: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 4690: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 4691: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 4692: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 4693: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 4694: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 4695: case 0b1111_001_010: 4696: irpFbccWord (); 4697: break irpSwitch; 4698: 4699: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4700: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4701: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4702: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4703: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 4704: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 4705: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 4706: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 4707: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 4708: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 4709: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 4710: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 4711: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 4712: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 4713: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 4714: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 4715: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 4716: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 4717: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 4718: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 4719: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 4720: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 4721: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 4722: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 4723: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 4724: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 4725: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 4726: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 4727: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 4728: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 4729: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 4730: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 4731: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 4732: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 4733: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 4734: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 4735: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 4736: case 0b1111_001_011: 4737: irpFbccLong (); 4738: break irpSwitch; 4739: 4740: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4741: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4742: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4743: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4744: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 4745: case 0b1111_001_100: 4746: irpFsave (); 4747: break irpSwitch; 4748: 4749: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4750: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4751: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4752: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4753: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 4754: case 0b1111_001_101: 4755: irpFrestore (); 4756: break irpSwitch; 4757: 4758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4759: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4760: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4762: //CINVL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_001_rrr 4763: //CINVP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_010_rrr 4764: //CINVA NC |-|----46|P|-----|-----| |1111_010_000_011_000 4765: //CPUSHL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_101_rrr 4766: //CPUSHP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_110_rrr 4767: //CPUSHA NC |-|----46|P|-----|-----| |1111_010_000_111_000 4768: case 0b1111_010_000: 4769: irpCinvCpushNC (); 4770: break irpSwitch; 4771: 4772: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4773: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4774: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4775: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4776: //CINVL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_001_rrr 4777: //CINVP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_010_rrr 4778: //CINVA DC |-|----46|P|-----|-----| |1111_010_001_011_000 4779: //CPUSHL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_101_rrr 4780: //CPUSHP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_110_rrr 4781: //CPUSHA DC |-|----46|P|-----|-----| |1111_010_001_111_000 4782: case 0b1111_010_001: 4783: irpCinvCpushDC (); 4784: break irpSwitch; 4785: 4786: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4787: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4788: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4789: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4790: //CINVL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_001_rrr 4791: //CINVP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_010_rrr 4792: //CINVA IC |-|----46|P|-----|-----| |1111_010_010_011_000 4793: //CPUSHL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_101_rrr 4794: //CPUSHP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_110_rrr 4795: //CPUSHA IC |-|----46|P|-----|-----| |1111_010_010_111_000 4796: case 0b1111_010_010: 4797: irpCinvCpushIC (); 4798: break irpSwitch; 4799: 4800: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4801: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4802: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4803: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4804: //CINVL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_001_rrr 4805: //CINVP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_010_rrr 4806: //CINVA BC |-|----46|P|-----|-----| |1111_010_011_011_000 4807: //CPUSHL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_101_rrr 4808: //CPUSHP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_110_rrr 4809: //CPUSHA BC |-|----46|P|-----|-----| |1111_010_011_111_000 4810: case 0b1111_010_011: 4811: irpCinvCpushBC (); 4812: break irpSwitch; 4813: 4814: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4815: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4816: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4817: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4818: //PFLUSHN (Ar) |-|----46|P|-----|-----| |1111_010_100_000_rrr 4819: //PFLUSH (Ar) |-|----46|P|-----|-----| |1111_010_100_001_rrr 4820: //PFLUSHAN |-|----46|P|-----|-----| |1111_010_100_010_000 4821: //PFLUSHA |-|----46|P|-----|-----| |1111_010_100_011_000 4822: case 0b1111_010_100: 4823: irpPflush (); 4824: break irpSwitch; 4825: 4826: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4827: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4828: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4829: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4830: //PLPAW (Ar) |-|-----6|P|-----|-----| |1111_010_110_001_rrr 4831: case 0b1111_010_110: 4832: irpPlpaw (); 4833: break irpSwitch; 4834: 4835: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4836: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4837: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4838: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4839: //PLPAR (Ar) |-|-----6|P|-----|-----| |1111_010_111_001_rrr 4840: case 0b1111_010_111: 4841: irpPlpar (); 4842: break irpSwitch; 4843: 4844: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4845: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4846: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4847: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4848: //MOVE16 (Ar)+,xxx.L |-|----46|-|-----|-----| |1111_011_000_000_rrr-{address} 4849: //MOVE16 xxx.L,(Ar)+ |-|----46|-|-----|-----| |1111_011_000_001_rrr-{address} 4850: //MOVE16 (Ar),xxx.L |-|----46|-|-----|-----| |1111_011_000_010_rrr-{address} 4851: //MOVE16 xxx.L,(Ar) |-|----46|-|-----|-----| |1111_011_000_011_rrr-{address} 4852: //MOVE16 (Ar)+,(An)+ |-|----46|-|-----|-----| |1111_011_000_100_rrr-1nnn000000000000 4853: case 0b1111_011_000: 4854: irpMove16 (); 4855: break irpSwitch; 4856: 4857: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4858: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4859: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4860: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4861: //LPSTOP.W #<data> |-|-----6|P|-----|-----| |1111_100_000_000_000-0000000111000000-{data} 4862: case 0b1111_100_000: 4863: irpLpstop (); 4864: break irpSwitch; 4865: 4866: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4867: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4868: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4869: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4870: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 4871: case 0b1111_111_000: 4872: case 0b1111_111_001: 4873: case 0b1111_111_010: 4874: case 0b1111_111_011: 4875: irpFpack (); 4876: break irpSwitch; 4877: 4878: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4879: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4880: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4882: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 4883: case 0b1111_111_100: 4884: case 0b1111_111_101: 4885: case 0b1111_111_110: 4886: case 0b1111_111_111: 4887: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4888: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4889: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4890: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4891: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 4892: case 0b1111_000_000: 4893: case 0b1111_000_001: 4894: case 0b1111_000_010: 4895: case 0b1111_000_011: 4896: case 0b1111_000_100: 4897: case 0b1111_000_101: 4898: case 0b1111_000_110: 4899: case 0b1111_000_111: 4900: case 0b1111_001_110: 4901: case 0b1111_001_111: 4902: case 0b1111_010_101: 4903: case 0b1111_011_001: 4904: case 0b1111_011_010: 4905: case 0b1111_011_011: 4906: case 0b1111_011_100: 4907: case 0b1111_011_101: 4908: case 0b1111_011_110: 4909: case 0b1111_011_111: 4910: case 0b1111_100_001: 4911: case 0b1111_100_010: 4912: case 0b1111_100_011: 4913: case 0b1111_100_100: 4914: case 0b1111_100_101: 4915: case 0b1111_100_110: 4916: case 0b1111_100_111: 4917: case 0b1111_101_000: 4918: case 0b1111_101_001: 4919: case 0b1111_101_010: 4920: case 0b1111_101_011: 4921: case 0b1111_101_100: 4922: case 0b1111_101_101: 4923: case 0b1111_101_110: 4924: case 0b1111_101_111: 4925: case 0b1111_110_000: 4926: case 0b1111_110_001: 4927: case 0b1111_110_010: 4928: case 0b1111_110_011: 4929: case 0b1111_110_100: 4930: case 0b1111_110_101: 4931: case 0b1111_110_110: 4932: case 0b1111_110_111: 4933: irpFline (); 4934: break irpSwitch; 4935: 4936: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4937: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4938: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4940: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 4941: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 4942: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 4943: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 4944: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 4945: case 0b0100_111_000: 4946: irpEmx (); 4947: break; 4948: 4949: default: 4950: irpIllegal (); 4951: 4952: } //switch XEiJ.regOC >>> 6 4953: 4954: //トレース例外 4955: // 命令実行前にsrのTビットがセットされていたとき命令実行後にトレース例外が発生する 4956: // トレース例外の発動は命令の機能拡張であり、他の例外処理で命令が中断されたときはトレース例外は発生しない 4957: // 命令例外はトレース例外の前に、割り込み例外はトレース例外の後に処理される 4958: // 未実装命令のエミュレーションルーチンはrteの直前にsrのTビットを復元することで未実装命令が1個の命令としてトレースされたように見せる 4959: // ;DOSコールの終了 4960: // ~008616: 4961: // btst.b #$07,(sp) 4962: // bne.s ~00861E 4963: // rte 4964: // ~00861E: 4965: // ori.w #$8000,sr 4966: // rte 4967: if (XEiJ.mpuTraceFlag != 0) { //命令実行前にsrのTビットがセットされていた 4968: irpExceptionFormat2 (M68kException.M6E_TRACE << 2, XEiJ.regPC, XEiJ.regPC0); //pcは次の命令 4969: } 4970: //クロックをカウントアップする 4971: // オペランドをアクセスした時点ではまだXEiJ.mpuClockTimeが更新されていないのでXEiJ.mpuClockTime<xxxClock 4972: // xxxTickを呼び出すときはXEiJ.mpuClockTime>=xxxClock 4973: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * XEiJ.mpuCycleCount; 4974: //デバイスを呼び出す 4975: TickerQueue.tkqRun (XEiJ.mpuClockTime); 4976: //割り込みを受け付ける 4977: if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) { //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき 4978: if (XEiJ.MPU_INTERRUPT_SWITCH) { 4979: switch (t) { 4980: case 0b00000001: 4981: case 0b00000011: 4982: case 0b00000101: 4983: case 0b00000111: 4984: case 0b00001001: 4985: case 0b00001011: 4986: case 0b00001101: 4987: case 0b00001111: 4988: case 0b00010001: 4989: case 0b00010011: 4990: case 0b00010101: 4991: case 0b00010111: 4992: case 0b00011001: 4993: case 0b00011011: 4994: case 0b00011101: 4995: case 0b00011111: 4996: case 0b00100001: 4997: case 0b00100011: 4998: case 0b00100101: 4999: case 0b00100111: 5000: case 0b00101001: 5001: case 0b00101011: 5002: case 0b00101101: 5003: case 0b00101111: 5004: case 0b00110001: 5005: case 0b00110011: 5006: case 0b00110101: 5007: case 0b00110111: 5008: case 0b00111001: 5009: case 0b00111011: 5010: case 0b00111101: 5011: case 0b00111111: 5012: case 0b01000001: 5013: case 0b01000011: 5014: case 0b01000101: 5015: case 0b01000111: 5016: case 0b01001001: 5017: case 0b01001011: 5018: case 0b01001101: 5019: case 0b01001111: 5020: case 0b01010001: 5021: case 0b01010011: 5022: case 0b01010101: 5023: case 0b01010111: 5024: case 0b01011001: 5025: case 0b01011011: 5026: case 0b01011101: 5027: case 0b01011111: 5028: case 0b01100001: 5029: case 0b01100011: 5030: case 0b01100101: 5031: case 0b01100111: 5032: case 0b01101001: 5033: case 0b01101011: 5034: case 0b01101101: 5035: case 0b01101111: 5036: case 0b01110001: 5037: case 0b01110011: 5038: case 0b01110101: 5039: case 0b01110111: 5040: case 0b01111001: 5041: case 0b01111011: 5042: case 0b01111101: 5043: case 0b01111111: 5044: case 0b10000001: 5045: case 0b10000011: 5046: case 0b10000101: 5047: case 0b10000111: 5048: case 0b10001001: 5049: case 0b10001011: 5050: case 0b10001101: 5051: case 0b10001111: 5052: case 0b10010001: 5053: case 0b10010011: 5054: case 0b10010101: 5055: case 0b10010111: 5056: case 0b10011001: 5057: case 0b10011011: 5058: case 0b10011101: 5059: case 0b10011111: 5060: case 0b10100001: 5061: case 0b10100011: 5062: case 0b10100101: 5063: case 0b10100111: 5064: case 0b10101001: 5065: case 0b10101011: 5066: case 0b10101101: 5067: case 0b10101111: 5068: case 0b10110001: 5069: case 0b10110011: 5070: case 0b10110101: 5071: case 0b10110111: 5072: case 0b10111001: 5073: case 0b10111011: 5074: case 0b10111101: 5075: case 0b10111111: 5076: case 0b11000001: 5077: case 0b11000011: 5078: case 0b11000101: 5079: case 0b11000111: 5080: case 0b11001001: 5081: case 0b11001011: 5082: case 0b11001101: 5083: case 0b11001111: 5084: case 0b11010001: 5085: case 0b11010011: 5086: case 0b11010101: 5087: case 0b11010111: 5088: case 0b11011001: 5089: case 0b11011011: 5090: case 0b11011101: 5091: case 0b11011111: 5092: case 0b11100001: 5093: case 0b11100011: 5094: case 0b11100101: 5095: case 0b11100111: 5096: case 0b11101001: 5097: case 0b11101011: 5098: case 0b11101101: 5099: case 0b11101111: 5100: case 0b11110001: 5101: case 0b11110011: 5102: case 0b11110101: 5103: case 0b11110111: 5104: case 0b11111001: 5105: case 0b11111011: 5106: case 0b11111101: 5107: case 0b11111111: 5108: //レベル7 5109: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5110: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5111: irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5112: } 5113: break; 5114: case 0b00000010: 5115: case 0b00000110: 5116: case 0b00001010: 5117: case 0b00001110: 5118: case 0b00010010: 5119: case 0b00010110: 5120: case 0b00011010: 5121: case 0b00011110: 5122: case 0b00100010: 5123: case 0b00100110: 5124: case 0b00101010: 5125: case 0b00101110: 5126: case 0b00110010: 5127: case 0b00110110: 5128: case 0b00111010: 5129: case 0b00111110: 5130: case 0b01000010: 5131: case 0b01000110: 5132: case 0b01001010: 5133: case 0b01001110: 5134: case 0b01010010: 5135: case 0b01010110: 5136: case 0b01011010: 5137: case 0b01011110: 5138: case 0b01100010: 5139: case 0b01100110: 5140: case 0b01101010: 5141: case 0b01101110: 5142: case 0b01110010: 5143: case 0b01110110: 5144: case 0b01111010: 5145: case 0b01111110: 5146: case 0b10000010: 5147: case 0b10000110: 5148: case 0b10001010: 5149: case 0b10001110: 5150: case 0b10010010: 5151: case 0b10010110: 5152: case 0b10011010: 5153: case 0b10011110: 5154: case 0b10100010: 5155: case 0b10100110: 5156: case 0b10101010: 5157: case 0b10101110: 5158: case 0b10110010: 5159: case 0b10110110: 5160: case 0b10111010: 5161: case 0b10111110: 5162: case 0b11000010: 5163: case 0b11000110: 5164: case 0b11001010: 5165: case 0b11001110: 5166: case 0b11010010: 5167: case 0b11010110: 5168: case 0b11011010: 5169: case 0b11011110: 5170: case 0b11100010: 5171: case 0b11100110: 5172: case 0b11101010: 5173: case 0b11101110: 5174: case 0b11110010: 5175: case 0b11110110: 5176: case 0b11111010: 5177: case 0b11111110: 5178: //レベル6 5179: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5180: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5181: irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5182: } 5183: break; 5184: case 0b00000100: 5185: case 0b00001100: 5186: case 0b00010100: 5187: case 0b00011100: 5188: case 0b00100100: 5189: case 0b00101100: 5190: case 0b00110100: 5191: case 0b00111100: 5192: case 0b01000100: 5193: case 0b01001100: 5194: case 0b01010100: 5195: case 0b01011100: 5196: case 0b01100100: 5197: case 0b01101100: 5198: case 0b01110100: 5199: case 0b01111100: 5200: case 0b10000100: 5201: case 0b10001100: 5202: case 0b10010100: 5203: case 0b10011100: 5204: case 0b10100100: 5205: case 0b10101100: 5206: case 0b10110100: 5207: case 0b10111100: 5208: case 0b11000100: 5209: case 0b11001100: 5210: case 0b11010100: 5211: case 0b11011100: 5212: case 0b11100100: 5213: case 0b11101100: 5214: case 0b11110100: 5215: case 0b11111100: 5216: //レベル5 5217: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5218: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5219: irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5220: } 5221: break; 5222: case 0b00010000: 5223: case 0b00110000: 5224: case 0b01010000: 5225: case 0b01110000: 5226: case 0b10010000: 5227: case 0b10110000: 5228: case 0b11010000: 5229: case 0b11110000: 5230: //レベル3 5231: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5232: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5233: irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5234: } 5235: break; 5236: case 0b00100000: 5237: case 0b01100000: 5238: case 0b10100000: 5239: case 0b11100000: 5240: //レベル2 5241: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5242: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5243: irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5244: } 5245: break; 5246: case 0b01000000: 5247: case 0b11000000: 5248: //レベル1 5249: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5250: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5251: irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5252: } 5253: break; 5254: } 5255: } else { 5256: t &= -t; 5257: // x&=-xはxの最下位の1のビットだけを残す演算 5258: // すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る 5259: // 最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる 5260: // MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない 5261: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { 5262: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5263: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5264: irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5265: } 5266: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { 5267: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5268: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5269: irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5270: } 5271: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { 5272: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5273: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5274: irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5275: } 5276: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { 5277: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5278: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5279: irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5280: } 5281: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { 5282: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5283: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5284: irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5285: } 5286: } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) { 5287: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5288: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5289: irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5290: } 5291: } 5292: } 5293: } //if t!=0 5294: if (MC68901.MFP_DELAYED_INTERRUPT) { 5295: XEiJ.mpuIRR |= XEiJ.mpuDIRR; //遅延割り込み要求 5296: XEiJ.mpuDIRR = 0; 5297: } 5298: } //命令ループ 5299: } catch (M68kException e) { 5300: if (CAT_ON) { 5301: catMove16End (); 5302: } 5303: if (M68kException.m6eNumber == M68kException.M6E_WAIT_EXCEPTION) { //待機例外 5304: if (irpWaitException ()) { 5305: continue; 5306: } else { 5307: break errorLoop; 5308: } 5309: } 5310: if (M68kException.m6eNumber == M68kException.M6E_INSTRUCTION_BREAK_POINT) { //命令ブレークポイントによる停止 5311: XEiJ.regPC = XEiJ.regPC0; 5312: XEiJ.mpuStop1 (null); //"Instruction Break Point" 5313: break errorLoop; 5314: } 5315: //例外処理 5316: // ここで処理するのはベクタ番号が2～63の例外に限る 5317: // 例外処理のサイクル数はACCESS_FAULTとADDRESS_ERROR以外は19になっているので必要ならば補正してからthrowする 5318: // 使用頻度が高いと思われる例外はインライン展開するのでここには来ない 5319: // セーブされるpcは以下の例外は命令の先頭、これ以外は次の命令 5320: // 2 ACCESS_FAULT 5321: // 3 ADDRESS_ERROR 5322: // 4 ILLEGAL_INSTRUCTION 5323: // 8 PRIVILEGE_VIOLATION 5324: // 10 LINE_1010_EMULATOR 5325: // 11 LINE_1111_EMULATOR 5326: // 14 FORMAT_ERROR 5327: // 48 FP_BRANCH_SET_UNORDERED 5328: // 60 UNIMPLEMENTED_EFFECTIVE 5329: // 61 UNIMPLEMENTED_INSTRUCTION 5330: // 111111111122222222223333333333444444444455555555556666 5331: // 0123456789012345678901234567890123456789012345678901234567890123 5332: if (0b0011100010110010000000000000000000000000000000001000000000001100L << M68kException.m6eNumber < 0L) { 5333: XEiJ.regPC = XEiJ.regPC0; //セーブされるpcは命令の先頭 5334: //アドレスレジスタを巻き戻す 5335: // A7を含むのでユーザモードのときはスーパーバイザモードに移行する前に巻き戻すこと 5336: for (int arr = 8; m60Incremented != 0L; arr++) { 5337: XEiJ.regRn[arr] -= (byte) m60Incremented; 5338: m60Incremented = (m60Incremented + 0x80L) >> 8; 5339: } 5340: } 5341: //FSLWのTTRを設定する 5342: // 透過変換でアドレス変換キャッシュがヒットしてバスエラーが発生したときFSLWのTTRが設定されていない 5343: //!!! SECONDのときFIRSTと同じページか確認していない。ページフォルトのときは次のページだがバスエラーのときは同じページかもしれない 5344: if ((m60FSLW & (M60_FSLW_BUS_ERROR_ON_READ | M60_FSLW_BUS_ERROR_ON_WRITE)) != 0) { //バスエラーのとき 5345: if (((m60FSLW & M60_FSLW_TM_SUPERVISOR) != 0 ? 5346: (m60FSLW & M60_FSLW_TM_CODE) != 0 ? mmuTTSuperCode1 : mmuTTSuperData1 : 5347: (m60FSLW & M60_FSLW_TM_CODE) != 0 ? mmuTTUserCode1 : mmuTTUserData1) 5348: [m60Address >>> 24] != 0) { //透過変換 5349: m60FSLW |= M60_FSLW_TRANSPARENT; 5350: } 5351: } 5352: if (false) { 5353: System.out.println (m60ErrorToString ()); //srを表示するのでsrを更新する前に呼び出すこと 5354: } 5355: try { 5356: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 5357: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 5358: int sp; 5359: if (XEiJ.regSRS != 0) { //スーパーバイザモード 5360: sp = XEiJ.regRn[15]; 5361: } else { //ユーザモード 5362: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 5363: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 5364: sp = XEiJ.mpuISP; //SSPを復元 5365: if (DataBreakPoint.DBP_ON) { 5366: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 5367: } else { 5368: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 5369: } 5370: if (InstructionBreakPoint.IBP_ON) { 5371: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 5372: } 5373: } 5374: //以下はスーパーバイザモード 5375: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19; 5376: // 同じオフセットで異なるフォーマットになるものはここでは処理できない 5377: if (M68kException.m6eNumber == M68kException.M6E_ACCESS_FAULT) { 5378: //ホストファイルシステムのデバイスコマンドを強制終了させる 5379: HFS.hfsState = HFS.HFS_STATE_IDLE; 5380: //FORMAT $4の例外スタックフレームを作る 5381: XEiJ.regRn[15] = sp -= 16; 5382: mmuWriteLongData (sp + 12, m60FSLW, 1); //15-12:フォルトステータスロングワード(FSLW) 5383: mmuWriteLongData (sp + 8, m60Address, 1); //11-8:フォルトアドレス 5384: mmuWriteWordData (sp + 6, 0x4000 | M68kException.M6E_ACCESS_FAULT << 2, 1); //7-6:フォーマットとベクタオフセット 5385: // 111111111122222222223333333333444444444455555555556666 5386: // 0123456789012345678901234567890123456789012345678901234567890123 5387: } else if (0b0001011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) { 5388: //FORMAT $2の例外スタックフレームを作る 5389: XEiJ.regRn[15] = sp -= 12; 5390: mmuWriteLongData (sp + 8, m60Address, 1); //11-8:命令アドレス 5391: mmuWriteWordData (sp + 6, 0x2000 | M68kException.m6eNumber << 2, 1); //7-6:フォーマットとベクタオフセット 5392: } else { 5393: //FORMAT $0の例外スタックフレームを作る 5394: XEiJ.regRn[15] = sp -= 8; 5395: mmuWriteWordData (sp + 6, M68kException.m6eNumber << 2, 1); //7-6:フォーマットとベクタオフセット 5396: } 5397: mmuWriteLongData (sp + 2, XEiJ.regPC, 1); //5-2:プログラムカウンタ 5398: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 5399: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + (M68kException.m6eNumber << 2), 1)); //例外ベクタを取り出してジャンプする 5400: if (XEiJ.dbgStopOnError) { //エラーで停止する場合 5401: if (XEiJ.dbgDoStopOnError ()) { 5402: break errorLoop; 5403: } 5404: } 5405: } catch (M68kException ee) { //ダブルバスフォルト 5406: XEiJ.dbgDoubleBusFault (); 5407: break errorLoop; 5408: } 5409: } //catch M68kException 5410: } //例外ループ 5411: 5412: // 通常 5413: // pc0 最後に実行した命令 5414: // pc 次に実行する命令 5415: // バスエラー、アドレスエラー、不当命令、特権違反で停止したとき 5416: // pc0 エラーを発生させた命令 5417: // pc 例外処理ルーチンの先頭 5418: // ダブルバスフォルトで停止したとき 5419: // pc0 エラーを発生させた命令 5420: // pc エラーを発生させた命令 5421: // 命令ブレークポイントで停止したとき 5422: // pc0 命令ブレークポイントが設定された、次に実行する命令 5423: // pc 命令ブレークポイントが設定された、次に実行する命令 5424: // データブレークポイントで停止したとき 5425: // pc0 データを書き換えた、最後に実行した命令 5426: // pc 次に実行する命令 5427: 5428: //分岐ログに停止レコードを記録する 5429: if (BranchLog.BLG_ON) { 5430: BranchLog.blgStop (); 5431: } 5432: 5433: } //mpuCore() 5434: 5435: 5436: 5437: //cont = irpWaitException () 5438: // 待機例外をキャッチしたとき 5439: public static boolean irpWaitException () { 5440: XEiJ.regPC = XEiJ.regPC0; //PCを巻き戻す 5441: XEiJ.regRn[8 + (XEiJ.regOC & 7)] += WaitInstruction.REWIND_AR[XEiJ.regOC >> 3]; //(Ar)+|-(Ar)で変化したArを巻き戻す 5442: try { 5443: //トレース例外を処理する 5444: if (XEiJ.mpuTraceFlag != 0) { //命令実行前にsrのTビットがセットされていた 5445: irpExceptionFormat2 (M68kException.M6E_TRACE << 2, XEiJ.regPC, XEiJ.regPC0); //pcは次の命令 5446: } 5447: //デバイスを呼び出す 5448: TickerQueue.tkqRun (XEiJ.mpuClockTime); 5449: //割り込みを受け付ける 5450: int t; 5451: if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) { //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき 5452: t &= -t; 5453: // x&=-xはxの最下位の1のビットだけを残す演算 5454: // すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る 5455: // 最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる 5456: // MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない 5457: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { 5458: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5459: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5460: irpInterrupt (t << 2, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5461: } 5462: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { 5463: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5464: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5465: irpInterrupt (t << 2, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5466: } 5467: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { 5468: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5469: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5470: irpInterrupt (t << 2, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5471: } 5472: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { 5473: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5474: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5475: irpInterrupt (t << 2, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5476: } 5477: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { 5478: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5479: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5480: irpInterrupt (t << 2, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5481: } 5482: } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) { 5483: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5484: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5485: irpInterrupt (t << 2, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5486: } 5487: } 5488: } //if t!=0 5489: if (MC68901.MFP_DELAYED_INTERRUPT) { 5490: XEiJ.mpuIRR |= XEiJ.mpuDIRR; //遅延割り込み要求 5491: XEiJ.mpuDIRR = 0; 5492: } 5493: } catch (M68kException e) { 5494: //!!! 待機例外処理中のバスエラーの処理は省略 5495: XEiJ.dbgDoubleBusFault (); 5496: return false; 5497: } //catch M68kException 5498: return true; 5499: } //irpWaitException 5500: 5501: 5502: 5503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5504: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5505: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5506: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5507: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 5508: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 5509: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 5510: public static void irpOriByte () throws M68kException { 5511: int ea = XEiJ.regOC & 63; 5512: int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5513: if (ea < XEiJ.EA_AR) { //ORI.B #<data>,Dr 5514: if (XEiJ.DBG_ORI_BYTE_ZERO_D0) { 5515: if (z == 0 && ea == 0 && XEiJ.dbgOriByteZeroD0) { //ORI.B #$00,D0 5516: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 5517: throw M68kException.m6eSignal; 5518: } 5519: } 5520: XEiJ.mpuCycleCount++; 5521: z = XEiJ.regRn[ea] |= 255 & z; //0拡張してからOR 5522: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5523: } else if (ea == XEiJ.EA_IM) { //ORI.B #<data>,CCR 5524: XEiJ.mpuCycleCount++; 5525: XEiJ.regCCR |= XEiJ.REG_CCR_MASK & z; 5526: } else { //ORI.B #<data>,<mem> 5527: XEiJ.mpuCycleCount++; 5528: int a = efaMltByte (ea); 5529: mmuWriteByteData (a, z |= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5530: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5531: } 5532: } //irpOriByte 5533: 5534: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5535: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5536: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5537: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5538: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 5539: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 5540: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 5541: public static void irpOriWord () throws M68kException { 5542: int ea = XEiJ.regOC & 63; 5543: if (ea < XEiJ.EA_AR) { //ORI.W #<data>,Dr 5544: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5545: XEiJ.mpuCycleCount++; 5546: z = XEiJ.regRn[ea] |= (char) z; //0拡張してからOR 5547: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5548: } else if (ea == XEiJ.EA_IM) { //ORI.W #<data>,SR 5549: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5550: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5551: throw M68kException.m6eSignal; 5552: } 5553: //以下はスーパーバイザモード 5554: XEiJ.mpuCycleCount += 5; 5555: irpSetSR (XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 5556: } else { //ORI.W #<data>,<mem> 5557: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5558: XEiJ.mpuCycleCount++; 5559: int a = efaMltWord (ea); 5560: mmuWriteWordData (a, z |= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5561: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5562: } 5563: } //irpOriWord 5564: 5565: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5566: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5567: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5568: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5569: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 5570: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 5571: public static void irpOriLong () throws M68kException { 5572: int ea = XEiJ.regOC & 63; 5573: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 5574: int z; 5575: if (ea < XEiJ.EA_AR) { //ORI.L #<data>,Dr 5576: XEiJ.mpuCycleCount++; 5577: z = XEiJ.regRn[ea] |= y; 5578: } else { //ORI.L #<data>,<mem> 5579: XEiJ.mpuCycleCount++; 5580: int a = efaMltLong (ea); 5581: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) | y, XEiJ.regSRS); 5582: } 5583: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5584: } //irpOriLong 5585: 5586: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5587: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5588: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5589: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5590: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 5591: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 5592: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 5593: // 5594: //BITREV.L Dr 5595: // Drのビットの並びを逆順にする。CCRは変化しない 5596: // 5597: //CHK2.B <ea>,Rn 5598: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5599: // CHK2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5600: // Rnが下限または上限と等しいときZをセットする 5601: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5602: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5603: // CCR 5604: // X 変化しない 5605: // N 変化しない(M68000PRMでは未定義) 5606: // Z Rn-LB==0||Rn-LB==UB-LB 5607: // V 変化しない(M68000PRMでは未定義) 5608: // C Rn-LB>UB-LB(符号なし比較) 5609: // 5610: //CMP2.B <ea>,Rn 5611: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5612: // CMP2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5613: // Rnが下限または上限と等しいときZをセットする 5614: // Rnが範囲外のときCをセットする 5615: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5616: // CCR 5617: // X 変化しない 5618: // N 変化しない(M68000PRMでは未定義) 5619: // Z Rn-LB==0||Rn-LB==UB-LB 5620: // V 変化しない(M68000PRMでは未定義) 5621: // C Rn-LB>UB-LB(符号なし比較) 5622: public static void irpCmp2Chk2Byte () throws M68kException { 5623: int ea = XEiJ.regOC & 63; 5624: if (ea < XEiJ.EA_AR) { //BITREV.L Dr 5625: XEiJ.mpuCycleCount++; 5626: int x = XEiJ.regRn[ea]; 5627: XEiJ.regRn[ea] = XEiJ.MPU_BITREV_TABLE_0[x & 2047] | XEiJ.MPU_BITREV_TABLE_1[x << 10 >>> 21] | XEiJ.MPU_BITREV_TABLE_2[x >>> 22]; 5628: } else { //CMP2/CHK2.B <ea>,Rn 5629: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5630: throw M68kException.m6eSignal; 5631: } 5632: } //irpCmp2Chk2Byte 5633: 5634: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5635: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5636: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5637: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5638: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 5639: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 5640: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 5641: public static void irpBtstReg () throws M68kException { 5642: int ea = XEiJ.regOC & 63; 5643: int qqq = XEiJ.regOC >> 9; //qqq 5644: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W (d16,Ar),Dq 5645: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5646: throw M68kException.m6eSignal; 5647: } else { //BTST.L Dq,Dr/<ea> 5648: int y = XEiJ.regRn[qqq]; 5649: if (ea < XEiJ.EA_AR) { //BTST.L Dq,Dr 5650: XEiJ.mpuCycleCount++; 5651: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 5652: } else { //BTST.B Dq,<ea> 5653: XEiJ.mpuCycleCount++; 5654: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~(ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)) >>> (y & 7) & 1) << 2; //ccr_btst。pcbs。イミディエイトを分離 5655: } 5656: } 5657: } //irpBtstReg 5658: 5659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5660: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5661: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5663: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 5664: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 5665: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 5666: public static void irpBchgReg () throws M68kException { 5667: int ea = XEiJ.regOC & 63; 5668: int qqq = XEiJ.regOC >> 9; //qqq 5669: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L (d16,Ar),Dq 5670: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5671: throw M68kException.m6eSignal; 5672: } else { //BCHG.L Dq,Dr/<ea> 5673: int x; 5674: int y = XEiJ.regRn[qqq]; 5675: if (ea < XEiJ.EA_AR) { //BCHG.L Dq,Dr 5676: XEiJ.mpuCycleCount++; 5677: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5678: } else { //BCHG.B Dq,<ea> 5679: XEiJ.mpuCycleCount++; 5680: int a = efaMltByte (ea); 5681: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS); 5682: } 5683: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5684: } 5685: } //irpBchgReg 5686: 5687: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5688: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5689: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5690: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5691: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 5692: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 5693: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 5694: public static void irpBclrReg () throws M68kException { 5695: int ea = XEiJ.regOC & 63; 5696: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5697: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W Dq,(d16,Ar) 5698: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5699: throw M68kException.m6eSignal; 5700: } else { //BCLR.L Dq,Dr/<ea> 5701: int x; 5702: if (ea < XEiJ.EA_AR) { //BCLR.L Dq,Dr 5703: XEiJ.mpuCycleCount++; 5704: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5705: } else { //BCLR.B Dq,<ea> 5706: XEiJ.mpuCycleCount++; 5707: int a = efaMltByte (ea); 5708: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS); 5709: } 5710: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5711: } 5712: } //irpBclrReg 5713: 5714: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5715: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5716: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5718: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 5719: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 5720: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 5721: public static void irpBsetReg () throws M68kException { 5722: int ea = XEiJ.regOC & 63; 5723: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5724: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L Dq,(d16,Ar) 5725: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5726: throw M68kException.m6eSignal; 5727: } else { //BSET.L Dq,Dr/<ea> 5728: int x; 5729: if (ea < XEiJ.EA_AR) { //BSET.L Dq,Dr 5730: XEiJ.mpuCycleCount++; 5731: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5732: } else { //BSET.B Dq,<ea> 5733: XEiJ.mpuCycleCount++; 5734: int a = efaMltByte (ea); 5735: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS); 5736: } 5737: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5738: } 5739: } //irpBsetReg 5740: 5741: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5742: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5743: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5744: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5745: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 5746: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 5747: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 5748: public static void irpAndiByte () throws M68kException { 5749: int ea = XEiJ.regOC & 63; 5750: int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5751: if (ea < XEiJ.EA_AR) { //ANDI.B #<data>,Dr 5752: XEiJ.mpuCycleCount++; 5753: z = XEiJ.regRn[ea] &= ~255 | z; //1拡張してからAND 5754: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5755: } else if (ea == XEiJ.EA_IM) { //ANDI.B #<data>,CCR 5756: XEiJ.mpuCycleCount++; 5757: XEiJ.regCCR &= z; 5758: } else { //ANDI.B #<data>,<mem> 5759: XEiJ.mpuCycleCount++; 5760: int a = efaMltByte (ea); 5761: mmuWriteByteData (a, z &= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5762: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5763: } 5764: } //irpAndiByte 5765: 5766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5767: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5768: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5769: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5770: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 5771: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 5772: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 5773: public static void irpAndiWord () throws M68kException { 5774: int ea = XEiJ.regOC & 63; 5775: if (ea < XEiJ.EA_AR) { //ANDI.W #<data>,Dr 5776: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5777: XEiJ.mpuCycleCount++; 5778: z = XEiJ.regRn[ea] &= ~65535 | z; //1拡張してからAND 5779: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5780: } else if (ea == XEiJ.EA_IM) { //ANDI.W #<data>,SR 5781: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5782: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5783: throw M68kException.m6eSignal; 5784: } 5785: //以下はスーパーバイザモード 5786: XEiJ.mpuCycleCount += 12; 5787: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 5788: } else { //ANDI.W #<data>,<mem> 5789: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5790: XEiJ.mpuCycleCount++; 5791: int a = efaMltWord (ea); 5792: mmuWriteWordData (a, z &= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 5793: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5794: } 5795: } //irpAndiWord 5796: 5797: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5798: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5799: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5800: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5801: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 5802: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 5803: public static void irpAndiLong () throws M68kException { 5804: int ea = XEiJ.regOC & 63; 5805: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 5806: int z; 5807: if (ea < XEiJ.EA_AR) { //ANDI.L #<data>,Dr 5808: XEiJ.mpuCycleCount++; 5809: z = XEiJ.regRn[ea] &= y; 5810: } else { //ANDI.L #<data>,<mem> 5811: XEiJ.mpuCycleCount++; 5812: int a = efaMltLong (ea); 5813: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & y, XEiJ.regSRS); 5814: } 5815: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5816: } //irpAndiLong 5817: 5818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5822: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 5823: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 5824: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 5825: // 5826: //BYTEREV.L Dr 5827: // Drのバイトの並びを逆順にする。CCRは変化しない 5828: // 5829: //CHK2.W <ea>,Rn 5830: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5831: // CHK2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5832: // Rnが下限または上限と等しいときZをセットする 5833: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5834: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5835: // CCR 5836: // X 変化しない 5837: // N 変化しない(M68000PRMでは未定義) 5838: // Z Rn-LB==0||Rn-LB==UB-LB 5839: // V 変化しない(M68000PRMでは未定義) 5840: // C Rn-LB>UB-LB(符号なし比較) 5841: // 5842: //CMP2.W <ea>,Rn 5843: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5844: // CMP2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5845: // Rnが下限または上限と等しいときZをセットする 5846: // Rnが範囲外のときCをセットする 5847: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5848: // CCR 5849: // X 変化しない 5850: // N 変化しない(M68000PRMでは未定義) 5851: // Z Rn-LB==0||Rn-LB==UB-LB 5852: // V 変化しない(M68000PRMでは未定義) 5853: // C Rn-LB>UB-LB(符号なし比較) 5854: public static void irpCmp2Chk2Word () throws M68kException { 5855: int ea = XEiJ.regOC & 63; 5856: if (ea < XEiJ.EA_AR) { //BYTEREV.L Dr 5857: XEiJ.mpuCycleCount++; 5858: XEiJ.regRn[ea] = Integer.reverseBytes (XEiJ.regRn[ea]); 5859: } else { //CMP2/CHK2.W <ea>,Rn 5860: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5861: throw M68kException.m6eSignal; 5862: } 5863: } //irpCmp2Chk2Word 5864: 5865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5869: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 5870: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 5871: public static void irpSubiByte () throws M68kException { 5872: int ea = XEiJ.regOC & 63; 5873: int x; 5874: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5875: int z; 5876: if (ea < XEiJ.EA_AR) { //SUBI.B #<data>,Dr 5877: XEiJ.mpuCycleCount++; 5878: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 5879: } else { //SUBI.B #<data>,<mem> 5880: XEiJ.mpuCycleCount++; 5881: int a = efaMltByte (ea); 5882: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 5883: } 5884: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5885: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5886: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5887: } //irpSubiByte 5888: 5889: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5890: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5891: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5892: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5893: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 5894: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 5895: public static void irpSubiWord () throws M68kException { 5896: int ea = XEiJ.regOC & 63; 5897: int x; 5898: int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 5899: int z; 5900: if (ea < XEiJ.EA_AR) { //SUBI.W #<data>,Dr 5901: XEiJ.mpuCycleCount++; 5902: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 5903: } else { //SUBI.W #<data>,<mem> 5904: XEiJ.mpuCycleCount++; 5905: int a = efaMltWord (ea); 5906: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 5907: } 5908: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5909: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5910: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5911: } //irpSubiWord 5912: 5913: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5914: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5915: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5916: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5917: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 5918: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 5919: public static void irpSubiLong () throws M68kException { 5920: int ea = XEiJ.regOC & 63; 5921: int x; 5922: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 5923: int z; 5924: if (ea < XEiJ.EA_AR) { //SUBI.L #<data>,Dr 5925: XEiJ.mpuCycleCount++; 5926: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 5927: } else { //SUBI.L #<data>,<mem> 5928: XEiJ.mpuCycleCount++; 5929: int a = efaMltLong (ea); 5930: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS); 5931: } 5932: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5933: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5934: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5935: } //irpSubiLong 5936: 5937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5938: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5939: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5940: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5941: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 5942: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 5943: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 5944: // 5945: //CHK2.L <ea>,Rn 5946: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5947: // Rnが下限または上限と等しいときZをセットする 5948: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5949: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5950: // CCR 5951: // X 変化しない 5952: // N 変化しない(M68000PRMでは未定義) 5953: // Z Rn-LB==0||Rn-LB==UB-LB 5954: // V 変化しない(M68000PRMでは未定義) 5955: // C Rn-LB>UB-LB(符号なし比較) 5956: // 5957: //CMP2.L <ea>,Rn 5958: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5959: // Rnが下限または上限と等しいときZをセットする 5960: // Rnが範囲外のときCをセットする 5961: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5962: // CCR 5963: // X 変化しない 5964: // N 変化しない(M68000PRMでは未定義) 5965: // Z Rn-LB==0||Rn-LB==UB-LB 5966: // V 変化しない(M68000PRMでは未定義) 5967: // C Rn-LB>UB-LB(符号なし比較) 5968: // 5969: //FF1.L Dr 5970: // Drの最上位の1のbit31からのオフセットをDrに格納する 5971: // Drが0のときは32になる 5972: public static void irpCmp2Chk2Long () throws M68kException { 5973: int ea = XEiJ.regOC & 63; 5974: if (ea < XEiJ.EA_AR) { //FF1.L Dr 5975: XEiJ.mpuCycleCount++; 5976: int z = XEiJ.regRn[ea]; 5977: XEiJ.regRn[ea] = Integer.numberOfLeadingZeros (z); 5978: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5979: } else { //CMP2/CHK2.L <ea>,Rn 5980: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 5981: throw M68kException.m6eSignal; 5982: } 5983: } //irpCmp2Chk2Long 5984: 5985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5986: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5987: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5988: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5989: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 5990: public static void irpAddiByte () throws M68kException { 5991: int ea = XEiJ.regOC & 63; 5992: int x; 5993: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 5994: int z; 5995: if (ea < XEiJ.EA_AR) { //ADDI.B #<data>,Dr 5996: XEiJ.mpuCycleCount++; 5997: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 5998: } else { //ADDI.B #<data>,<mem> 5999: XEiJ.mpuCycleCount++; 6000: int a = efaMltByte (ea); 6001: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 6002: } 6003: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6004: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6005: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6006: } //irpAddiByte 6007: 6008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6009: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6010: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6011: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6012: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 6013: public static void irpAddiWord () throws M68kException { 6014: int ea = XEiJ.regOC & 63; 6015: int x; 6016: int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6017: int z; 6018: if (ea < XEiJ.EA_AR) { //ADDI.W #<data>,Dr 6019: XEiJ.mpuCycleCount++; 6020: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 6021: } else { //ADDI.W #<data>,<mem> 6022: XEiJ.mpuCycleCount++; 6023: int a = efaMltWord (ea); 6024: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 6025: } 6026: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6027: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6028: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6029: } //irpAddiWord 6030: 6031: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6032: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6033: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6034: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6035: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 6036: public static void irpAddiLong () throws M68kException { 6037: int ea = XEiJ.regOC & 63; 6038: int x; 6039: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 6040: int z; 6041: if (ea < XEiJ.EA_AR) { //ADDI.L #<data>,Dr 6042: XEiJ.mpuCycleCount++; 6043: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 6044: } else { //ADDI.L #<data>,<mem> 6045: XEiJ.mpuCycleCount++; 6046: int a = efaMltLong (ea); 6047: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS); 6048: } 6049: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6050: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6051: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6052: } //irpAddiLong 6053: 6054: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6055: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6056: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6057: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6058: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 6059: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 6060: public static void irpBtstImm () throws M68kException { 6061: int ea = XEiJ.regOC & 63; 6062: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6063: if (ea < XEiJ.EA_AR) { //BTST.L #<data>,Dr 6064: XEiJ.mpuCycleCount++; 6065: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 6066: } else { //BTST.B #<data>,<ea> 6067: XEiJ.mpuCycleCount++; 6068: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS) >>> (y & 7) & 1) << 2; //ccr_btst 6069: } 6070: } //irpBtstImm 6071: 6072: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6073: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6074: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6075: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6076: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 6077: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 6078: public static void irpBchgImm () throws M68kException { 6079: int ea = XEiJ.regOC & 63; 6080: int x; 6081: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6082: if (ea < XEiJ.EA_AR) { //BCHG.L #<data>,Dr 6083: XEiJ.mpuCycleCount++; 6084: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6085: } else { //BCHG.B #<data>,<ea> 6086: XEiJ.mpuCycleCount++; 6087: int a = efaMltByte (ea); 6088: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) ^ (y = 1 << (y & 7)), XEiJ.regSRS); 6089: } 6090: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6091: } //irpBchgImm 6092: 6093: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6094: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6095: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6096: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6097: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 6098: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 6099: public static void irpBclrImm () throws M68kException { 6100: int ea = XEiJ.regOC & 63; 6101: int x; 6102: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6103: if (ea < XEiJ.EA_AR) { //BCLR.L #<data>,Dr 6104: XEiJ.mpuCycleCount++; 6105: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6106: } else { //BCLR.B #<data>,<ea> 6107: XEiJ.mpuCycleCount++; 6108: int a = efaMltByte (ea); 6109: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) & ~(y = 1 << (y & 7)), XEiJ.regSRS); 6110: } 6111: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6112: } //irpBclrImm 6113: 6114: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6115: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6116: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6117: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6118: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 6119: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 6120: public static void irpBsetImm () throws M68kException { 6121: int ea = XEiJ.regOC & 63; 6122: int x; 6123: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6124: if (ea < XEiJ.EA_AR) { //BSET.L #<data>,Dr 6125: XEiJ.mpuCycleCount++; 6126: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6127: } else { //BSET.B #<data>,<ea> 6128: XEiJ.mpuCycleCount++; 6129: int a = efaMltByte (ea); 6130: mmuWriteByteData (a, (x = mmuModifyByteSignData (a, XEiJ.regSRS)) | (y = 1 << (y & 7)), XEiJ.regSRS); 6131: } 6132: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6133: } //irpBsetImm 6134: 6135: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6136: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6137: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6138: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6139: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 6140: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 6141: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 6142: public static void irpEoriByte () throws M68kException { 6143: int ea = XEiJ.regOC & 63; 6144: int z = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6145: if (ea < XEiJ.EA_AR) { //EORI.B #<data>,Dr 6146: XEiJ.mpuCycleCount++; 6147: z = XEiJ.regRn[ea] ^= 255 & z; //0拡張してからEOR 6148: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6149: } else if (ea == XEiJ.EA_IM) { //EORI.B #<data>,CCR 6150: XEiJ.mpuCycleCount++; 6151: XEiJ.regCCR ^= XEiJ.REG_CCR_MASK & z; 6152: } else { //EORI.B #<data>,<mem> 6153: XEiJ.mpuCycleCount++; 6154: int a = efaMltByte (ea); 6155: mmuWriteByteData (a, z ^= mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 6156: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6157: } 6158: } //irpEoriByte 6159: 6160: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6161: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6162: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6163: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6164: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 6165: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 6166: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 6167: public static void irpEoriWord () throws M68kException { 6168: int ea = XEiJ.regOC & 63; 6169: if (ea < XEiJ.EA_AR) { //EORI.W #<data>,Dr 6170: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6171: XEiJ.mpuCycleCount++; 6172: z = XEiJ.regRn[ea] ^= (char) z; //0拡張してからEOR 6173: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6174: } else if (ea == XEiJ.EA_IM) { //EORI.W #<data>,SR 6175: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6176: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6177: throw M68kException.m6eSignal; 6178: } 6179: //以下はスーパーバイザモード 6180: XEiJ.mpuCycleCount += 12; 6181: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 6182: } else { //EORI.W #<data>,<mem> 6183: int z = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6184: XEiJ.mpuCycleCount++; 6185: int a = efaMltWord (ea); 6186: mmuWriteWordData (a, z ^= mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 6187: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6188: } 6189: } //irpEoriWord 6190: 6191: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6192: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6193: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6194: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6195: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 6196: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 6197: public static void irpEoriLong () throws M68kException { 6198: int ea = XEiJ.regOC & 63; 6199: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 6200: int z; 6201: if (ea < XEiJ.EA_AR) { //EORI.L #<data>,Dr 6202: XEiJ.mpuCycleCount++; 6203: z = XEiJ.regRn[ea] ^= y; 6204: } else { //EORI.L #<data>,<mem> 6205: XEiJ.mpuCycleCount++; 6206: int a = efaMltLong (ea); 6207: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ y, XEiJ.regSRS); 6208: } 6209: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 6210: } //irpEoriLong 6211: 6212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6213: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6214: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6215: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6216: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 6217: public static void irpCasByte () throws M68kException { 6218: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 6219: if ((w & ~0b0000_000_111_000_111) != 0) { 6220: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6221: throw M68kException.m6eSignal; 6222: } 6223: int c = w & 7; 6224: int y = (byte) XEiJ.regRn[c]; //y=Dc 6225: int a = efaMltByte (XEiJ.regOC & 63); 6226: int x = mmuReadByteSignData (a, XEiJ.regSRS); //x=<ea> 6227: int z = (byte) (x - y); //z=<ea>-Dc 6228: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6229: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6230: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6231: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6232: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6233: if (z == 0) { //<ea>==Dc 6234: XEiJ.mpuCycleCount += 19; 6235: mmuWriteByteData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS); //Du→<ea> 6236: } else { //<ea>!=Dc 6237: XEiJ.mpuCycleCount += 19; 6238: XEiJ.regRn[c] = ~0xff & XEiJ.regRn[c] | 0xff & x; //<ea>→Dc 6239: } 6240: } //irpCasByte 6241: 6242: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6243: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6244: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6245: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6246: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 6247: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 6248: public static void irpCmpiByte () throws M68kException { 6249: XEiJ.mpuCycleCount++; 6250: int ea = XEiJ.regOC & 63; 6251: int x; 6252: int y = mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS); //pcbs 6253: int z = (byte) ((x = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : mmuReadByteSignData (efaMemByte (ea), XEiJ.regSRS)) - y); //アドレッシングモードに注意 6254: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6255: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6256: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6257: } //irpCmpiByte 6258: 6259: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6260: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6261: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6262: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6263: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 6264: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 6265: public static void irpCmpiWord () throws M68kException { 6266: XEiJ.mpuCycleCount++; 6267: int ea = XEiJ.regOC & 63; 6268: int x; 6269: int y = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 6270: int z = (short) ((x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : mmuReadWordSignData (efaMemWord (ea), XEiJ.regSRS)) - y); //アドレッシングモードに注意 6271: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6272: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6273: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6274: } //irpCmpiWord 6275: 6276: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6277: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6278: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6279: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6280: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 6281: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 6282: public static void irpCmpiLong () throws M68kException { 6283: int ea = XEiJ.regOC & 63; 6284: int x; 6285: int y = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 6286: int z; 6287: if (ea < XEiJ.EA_AR) { //CMPI.L #<data>,Dr 6288: XEiJ.mpuCycleCount++; 6289: z = (x = XEiJ.regRn[ea]) - y; 6290: } else { //CMPI.L #<data>,<mem> 6291: XEiJ.mpuCycleCount++; 6292: z = (x = mmuReadLongData (efaMemLong (ea), XEiJ.regSRS)) - y; //アドレッシングモードに注意 6293: } 6294: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6295: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6296: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6297: } //irpCmpiLong 6298: 6299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6300: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6301: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6303: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6304: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6305: public static void irpCasWord () throws M68kException { 6306: int ea = XEiJ.regOC & 63; 6307: if (ea == XEiJ.EA_IM) { //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6308: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6309: throw M68kException.m6eSignal; 6310: } else { //CAS.W Dc,Du,<ea> 6311: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6312: if ((w & ~0b0000_000_111_000_111) != 0) { 6313: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6314: throw M68kException.m6eSignal; 6315: } 6316: int a = efaMltWord (ea); //a=ea 6317: if ((a & 1) != 0) { //misaligned <ea> 6318: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6319: throw M68kException.m6eSignal; 6320: } 6321: int c = w & 7; 6322: int y = (short) XEiJ.regRn[c]; //y=Dc 6323: int x = mmuReadWordSignData (a, XEiJ.regSRS); //x=<ea> 6324: int z = (short) (x - y); //z=<ea>-Dc 6325: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6326: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6327: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6328: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6329: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6330: if (z == 0) { //<ea>==Dc 6331: XEiJ.mpuCycleCount += 19; 6332: mmuWriteWordData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS); //Du→<ea> 6333: } else { //<ea>!=Dc 6334: XEiJ.mpuCycleCount += 19; 6335: XEiJ.regRn[c] = ~0xffff & XEiJ.regRn[c] | (char) x; //<ea>→Dc 6336: } 6337: } 6338: } //irpCasWord 6339: 6340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6341: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6342: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6344: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 6345: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 6346: // 6347: //MOVES.B <ea>,Rn 6348: // MOVES.B <ea>,DnはDnの最下位バイトだけ更新する 6349: // MOVES.B <ea>,Anはバイトデータをロングに符号拡張してAnの全体を更新する 6350: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6351: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6352: // 6353: //MOVES.B Rn,<ea> 6354: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6355: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6356: public static void irpMovesByte () throws M68kException { 6357: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6358: if (w << -11 != 0) { 6359: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6360: throw M68kException.m6eSignal; 6361: } 6362: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6363: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6364: throw M68kException.m6eSignal; 6365: } 6366: //以下はスーパーバイザモード 6367: //MC68060UM 4-20 6368: // MOVESは命令空間2,6をデータ空間1,5とみなす 6369: // 例外スタックにもデータ空間1,5が記録される 6370: // 命令空間2,6に書き込むとき不整合が生じるので命令キャッシュラインを無効化する必要がある 6371: int sfc = (XEiJ.mpuSFC & 3) == 2 ? XEiJ.mpuSFC ^ 3 : XEiJ.mpuSFC; 6372: int dfc = (XEiJ.mpuDFC & 3) == 2 ? XEiJ.mpuDFC ^ 3 : XEiJ.mpuDFC; 6373: XEiJ.mpuCycleCount++; 6374: int a = efaMltByte (XEiJ.regOC & 63); 6375: int n = w >>> 12; //n 6376: if (w << 31 - 11 >= 0) { //MOVES.B <ea>,Rn。リード 6377: boolean supervisor = (0b10011111 << 24 << sfc) < 0; 6378: boolean instruction = (0b00101010 << 24 << sfc) < 0; 6379: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6380: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6381: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6382: int z; 6383: // 01234567 6384: if (0b01100110 << 24 << sfc < 0) { //SFC=1,2,5,6。アドレス変換あり 6385: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | sfc << 16; 6386: int pa = (supervisor ? 6387: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6388: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6389: //z = XEiJ.busRbz (pa); 6390: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa); 6391: } else if (sfc != 7) { //SFC=0,3,4。アドレス変換なし 6392: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | sfc << 16; 6393: //z = XEiJ.busRbz (a); 6394: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6395: } else { //SFC=7。CPU空間 6396: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6397: z = XEiJ.fpuMotherboardCoprocessor.cirReadByteZero (a); 6398: } else { 6399: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | sfc << 16 | M60_FSLW_BUS_ERROR_ON_READ; 6400: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6401: M68kException.m6eAddress = a; 6402: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6403: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6404: throw M68kException.m6eSignal; 6405: } 6406: } 6407: if (n < 8) { //MOVES.B <ea>,Dn 6408: XEiJ.regRn[n] = XEiJ.regRn[n] & ~255 | z; 6409: } else { //MOVES.B <ea>,An 6410: XEiJ.regRn[n] = (byte) z; 6411: } 6412: if (MMU_DEBUG_COMMAND) { 6413: System.out.printf ("%08x movesReadByte(%d,0x%08x)=0x%02x\n", XEiJ.regPC0, sfc, a, XEiJ.regRn[n] & 255); 6414: } 6415: } else { //MOVES.B Rn,<ea>。ライト 6416: if (MMU_DEBUG_COMMAND) { 6417: System.out.printf ("%08x movesWriteByte(%d,0x%08x,0x%02x)\n", XEiJ.regPC0, dfc, a, XEiJ.regRn[n] & 255); 6418: } 6419: boolean supervisor = (0b10011111 << 24 << dfc) < 0; 6420: boolean instruction = (0b00101010 << 24 << dfc) < 0; 6421: MemoryMappedDevice mm[] = (DataBreakPoint.DBP_ON ? 6422: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6423: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6424: int z = XEiJ.regRn[n]; 6425: // 01234567 6426: if (0b01100110 << 24 << dfc < 0) { //DFC=1,2,5,6。アドレス変換あり 6427: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | dfc << 16; 6428: int pa = (supervisor ? 6429: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6430: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6431: //XEiJ.busWb (pa, z); 6432: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z); 6433: } else if (dfc != 7) { //DFC=0,3,4。アドレス変換なし 6434: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | dfc << 16; 6435: //XEiJ.busWb (a, z); 6436: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6437: } else { //DFC=7。CPU空間 6438: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6439: XEiJ.fpuMotherboardCoprocessor.cirWriteByte (a, z); 6440: } else { 6441: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | dfc << 16 | M60_FSLW_BUS_ERROR_ON_WRITE; 6442: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6443: M68kException.m6eAddress = a; 6444: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6445: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6446: throw M68kException.m6eSignal; 6447: } 6448: } 6449: } 6450: } //irpMovesByte 6451: 6452: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6453: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6454: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6455: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6456: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 6457: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 6458: // 6459: //MOVES.W <ea>,Rn 6460: // MOVES.W <ea>,DnはDnの下位ワードだけ更新する 6461: // MOVES.W <ea>,Anはワードデータをロングに符号拡張してAnの全体を更新する 6462: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6463: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6464: // 6465: //MOVES.W Rn,<ea> 6466: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6467: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6468: public static void irpMovesWord () throws M68kException { 6469: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6470: if (w << -11 != 0) { 6471: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6472: throw M68kException.m6eSignal; 6473: } 6474: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6475: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6476: throw M68kException.m6eSignal; 6477: } 6478: //以下はスーパーバイザモード 6479: //MC68060UM 4-20 6480: // MOVESは命令空間2,6をデータ空間1,5とみなす 6481: // 例外スタックにもデータ空間1,5が記録される 6482: // 命令空間2,6に書き込むとき不整合が生じるので命令キャッシュラインを無効化する必要がある 6483: int sfc = (XEiJ.mpuSFC & 3) == 2 ? XEiJ.mpuSFC ^ 3 : XEiJ.mpuSFC; 6484: int dfc = (XEiJ.mpuDFC & 3) == 2 ? XEiJ.mpuDFC ^ 3 : XEiJ.mpuDFC; 6485: XEiJ.mpuCycleCount++; 6486: int a = efaMltWord (XEiJ.regOC & 63); 6487: int n = w >>> 12; //n 6488: if (w << 31 - 11 >= 0) { //MOVES.W <ea>,Rn。リード 6489: boolean supervisor = (0b10011111 << 24 << sfc) < 0; 6490: boolean instruction = (0b00101010 << 24 << sfc) < 0; 6491: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6492: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6493: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6494: int z; 6495: // 01234567 6496: if (0b01100110 << 24 << sfc < 0) { //SFC=1,2,5,6。アドレス変換あり 6497: if ((a & 1) == 0) { //偶数 6498: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | sfc << 16; 6499: int pa = (supervisor ? 6500: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6501: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6502: //z = XEiJ.busRwze (pa); 6503: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa); 6504: } else { //奇数 6505: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | sfc << 16; 6506: int pa = (supervisor ? 6507: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6508: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6509: //z = XEiJ.busRbz (pa) << 8; 6510: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa) << 8; 6511: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6512: pa = (supervisor ? 6513: instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) : 6514: instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1)); 6515: //z |= XEiJ.busRbz (pa); 6516: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa); 6517: } 6518: } else if (sfc != 7) { //SFC=0,3,4。アドレス変換なし 6519: if ((a & 1) == 0) { //偶数 6520: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | sfc << 16; 6521: //z = XEiJ.busRwze (a); 6522: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6523: } else { //奇数 6524: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | sfc << 16; 6525: //z = XEiJ.busRbz (a) << 8; 6526: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a) << 8; 6527: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6528: a++; 6529: //z |= XEiJ.busRbz (a); 6530: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6531: } 6532: } else { //SFC=7。CPU空間 6533: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6534: z = XEiJ.fpuMotherboardCoprocessor.cirReadWordZero (a); 6535: } else { 6536: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | sfc << 16 | M60_FSLW_BUS_ERROR_ON_READ; 6537: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6538: M68kException.m6eAddress = a; 6539: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6540: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6541: throw M68kException.m6eSignal; 6542: } 6543: } 6544: if (n < 8) { //MOVES.W <ea>,Dn 6545: XEiJ.regRn[n] = XEiJ.regRn[n] & ~65535 | z; 6546: } else { //MOVES.W <ea>,An 6547: XEiJ.regRn[n] = (short) z; 6548: } 6549: if (MMU_DEBUG_COMMAND) { 6550: System.out.printf ("%08x movesReadWord(%d,0x%08x)=0x%04x\n", XEiJ.regPC0, sfc, a, XEiJ.regRn[n] & 65535); 6551: } 6552: } else { //MOVES.W Rn,<ea>。ライト 6553: if (MMU_DEBUG_COMMAND) { 6554: System.out.printf ("%08x movesWriteWord(%d,0x%08x,0x%04x)\n", XEiJ.regPC0, dfc, a, XEiJ.regRn[n] & 65535); 6555: } 6556: boolean supervisor = (0b10011111 << 24 << dfc) < 0; 6557: boolean instruction = (0b00101010 << 24 << dfc) < 0; 6558: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6559: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6560: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6561: int z = XEiJ.regRn[n]; 6562: // 01234567 6563: if (0b01100110 << 24 << dfc < 0) { //DFC=1,2,5,6。アドレス変換あり 6564: if ((a & 1) == 0) { //偶数 6565: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | dfc << 16; 6566: int pa = (supervisor ? 6567: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6568: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6569: //XEiJ.busWwe (pa, z); 6570: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z); 6571: } else { //奇数 6572: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | dfc << 16; 6573: int pa = (supervisor ? 6574: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6575: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6576: //XEiJ.busWb (pa, z >> 8); 6577: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 8); 6578: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6579: pa = (supervisor ? 6580: instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) : 6581: instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1)); 6582: //XEiJ.busWb (pa, z); 6583: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z); 6584: } 6585: } else if (dfc != 7) { //DFC=0,3,4。アドレス変換なし 6586: if ((a & 1) == 0) { //偶数 6587: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | dfc << 16; 6588: //XEiJ.busWwe (a, z); 6589: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6590: } else { //奇数 6591: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | dfc << 16; 6592: //XEiJ.busWb (a, z >> 8); 6593: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 8); 6594: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6595: a++; 6596: //XEiJ.busWb (a, z); 6597: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6598: } 6599: } else { //DFC=7。CPU空間 6600: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6601: XEiJ.fpuMotherboardCoprocessor.cirWriteWord (a, z); 6602: } else { 6603: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | dfc << 16 | M60_FSLW_BUS_ERROR_ON_WRITE; 6604: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6605: M68kException.m6eAddress = a; 6606: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6607: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6608: throw M68kException.m6eSignal; 6609: } 6610: } 6611: } 6612: } //irpMovesWord 6613: 6614: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6615: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6616: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6617: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6618: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 6619: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 6620: // 6621: //MOVES.L <ea>,Rn 6622: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6623: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6624: // 6625: //MOVES.L Rn,<ea> 6626: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6627: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6628: public static void irpMovesLong () throws M68kException { 6629: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6630: if (w << -11 != 0) { 6631: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6632: throw M68kException.m6eSignal; 6633: } 6634: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6635: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6636: throw M68kException.m6eSignal; 6637: } 6638: //以下はスーパーバイザモード 6639: //MC68060UM 4-20 6640: // MOVESは命令空間2,6をデータ空間1,5とみなす 6641: // 例外スタックにもデータ空間1,5が記録される 6642: // 命令空間2,6に書き込むとき不整合が生じるので命令キャッシュラインを無効化する必要がある 6643: int sfc = (XEiJ.mpuSFC & 3) == 2 ? XEiJ.mpuSFC ^ 3 : XEiJ.mpuSFC; 6644: int dfc = (XEiJ.mpuDFC & 3) == 2 ? XEiJ.mpuDFC ^ 3 : XEiJ.mpuDFC; 6645: XEiJ.mpuCycleCount++; 6646: int a = efaMltLong (XEiJ.regOC & 63); 6647: int n = w >>> 12; //n 6648: if (w << 31 - 11 >= 0) { //MOVES.L <ea>,Rn。リード 6649: boolean supervisor = (0b10011111 << 24 << sfc) < 0; 6650: boolean instruction = (0b00101010 << 24 << sfc) < 0; 6651: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6652: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6653: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6654: int z; 6655: // 01234567 6656: if (0b01100110 << 24 << sfc < 0) { //SFC=1,2,5,6。アドレス変換あり 6657: if ((a & 3) == 0) { //4の倍数 6658: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | sfc << 16; 6659: int pa = (supervisor ? 6660: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6661: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6662: //z = XEiJ.busRlsf (pa); 6663: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRls (pa); 6664: } else if ((a & 1) == 0) { //4の倍数+2 6665: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | sfc << 16; 6666: int pa = (supervisor ? 6667: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6668: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6669: //z = XEiJ.busRwse (pa) << 16; 6670: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRws (pa) << 16; 6671: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6672: pa = (supervisor ? 6673: instruction ? mmuTranslateReadSuperCode (a + 2) : mmuTranslateReadSuperData (a + 2) : 6674: instruction ? mmuTranslateReadUserCode (a + 2) : mmuTranslateReadUserData (a + 2)); 6675: //z |= XEiJ.busRwze (pa); 6676: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa); 6677: } else { //奇数 6678: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | sfc << 16; 6679: int pa = (supervisor ? 6680: instruction ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 6681: instruction ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 6682: //z = XEiJ.busRbs (pa) << 24; 6683: z = mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbs (pa) << 24; 6684: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6685: pa = (supervisor ? 6686: instruction ? mmuTranslateReadSuperCode (a + 1) : mmuTranslateReadSuperData (a + 1) : 6687: instruction ? mmuTranslateReadUserCode (a + 1) : mmuTranslateReadUserData (a + 1)); 6688: //z |= XEiJ.busRwze (pa) << 8; 6689: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRwz (pa) << 8; 6690: pa = (supervisor ? 6691: instruction ? mmuTranslateReadSuperCode (a + 3) : mmuTranslateReadSuperData (a + 3) : 6692: instruction ? mmuTranslateReadUserCode (a + 3) : mmuTranslateReadUserData (a + 3)); 6693: //z |= XEiJ.busRbz (pa); 6694: z |= mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdRbz (pa); 6695: } 6696: } else if (sfc != 7) { //SFC=0,3,4。アドレス変換なし 6697: if ((a & 3) == 0) { //4の倍数 6698: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | sfc << 16; 6699: //z = XEiJ.busRlsf (a); 6700: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 6701: } else if ((a & 1) == 0) { //4の倍数+2 6702: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | sfc << 16; 6703: //z = XEiJ.busRwse (a) << 16; 6704: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a) << 16; 6705: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6706: a += 2; 6707: //z |= XEiJ.busRwze (a); 6708: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6709: } else { //奇数 6710: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | sfc << 16; 6711: //z = XEiJ.busRbs (a) << 24; 6712: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a) << 24; 6713: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6714: a++; 6715: //z |= XEiJ.busRwze (a) << 8; 6716: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a) << 8; 6717: a += 2; 6718: //z |= XEiJ.busRbz (a); 6719: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6720: } 6721: } else { //SFC=7。CPU空間 6722: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6723: z = XEiJ.fpuMotherboardCoprocessor.cirReadLong (a); 6724: } else { 6725: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | sfc << 16 | M60_FSLW_BUS_ERROR_ON_READ; 6726: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6727: M68kException.m6eAddress = a; 6728: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6729: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6730: throw M68kException.m6eSignal; 6731: } 6732: } 6733: XEiJ.regRn[n] = z; 6734: if (MMU_DEBUG_COMMAND) { 6735: System.out.printf ("%08x movesReadLong(%d,0x%08x)=0x%08x\n", XEiJ.regPC0, sfc, a, XEiJ.regRn[n]); 6736: } 6737: } else { //MOVES.L Rn,<ea>。ライト 6738: if (MMU_DEBUG_COMMAND) { 6739: System.out.printf ("%08x movesWriteLong(%d,0x%08x,0x%08x)\n", XEiJ.regPC0, dfc, a, XEiJ.regRn[n]); 6740: } 6741: boolean supervisor = (0b10011111 << 24 << dfc) < 0; 6742: boolean instruction = (0b00101010 << 24 << dfc) < 0; 6743: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 6744: supervisor ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 6745: supervisor ? XEiJ.busSuperMap : XEiJ.busUserMap); 6746: int z = XEiJ.regRn[n]; 6747: // 01234567 6748: if (0b01100110 << 24 << dfc < 0) { //DFC=1,2,5,6。アドレス変換あり 6749: if ((a & 3) == 0) { //4の倍数 6750: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | dfc << 16; 6751: int pa = (supervisor ? 6752: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6753: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6754: //XEiJ.busWlf (pa, z); 6755: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWl (pa, z); 6756: } else if ((a & 1) == 0) { //4の倍数+2 6757: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | dfc << 16; 6758: int pa = (supervisor ? 6759: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6760: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6761: //XEiJ.busWwe (pa, z >> 16); 6762: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 16); 6763: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6764: pa = (supervisor ? 6765: instruction ? mmuTranslateWriteSuperCode (a + 2) : mmuTranslateWriteSuperData (a + 2) : 6766: instruction ? mmuTranslateWriteUserCode (a + 2) : mmuTranslateWriteUserData (a + 2)); 6767: //XEiJ.busWwe (pa, z); 6768: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z); 6769: } else { //奇数 6770: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | dfc << 16; 6771: int pa = (supervisor ? 6772: instruction ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 6773: instruction ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 6774: //XEiJ.busWb (pa, z >> 24); 6775: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z >> 24); 6776: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6777: pa = (supervisor ? 6778: instruction ? mmuTranslateWriteSuperCode (a + 1) : mmuTranslateWriteSuperData (a + 1) : 6779: instruction ? mmuTranslateWriteUserCode (a + 1) : mmuTranslateWriteUserData (a + 1)); 6780: //XEiJ.busWwe (pa, z >> 8); 6781: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWw (pa, z >> 8); 6782: pa = (supervisor ? 6783: instruction ? mmuTranslateWriteSuperCode (a + 3) : mmuTranslateWriteSuperData (a + 3) : 6784: instruction ? mmuTranslateWriteUserCode (a + 3) : mmuTranslateWriteUserData (a + 3)); 6785: //XEiJ.busWb (pa, z); 6786: mm[pa >>> XEiJ.BUS_PAGE_BITS].mmdWb (pa, z); 6787: } 6788: } else if (dfc != 7) { //DFC=0,3,4。アドレス変換なし 6789: if ((a & 3) == 0) { //4の倍数 6790: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | dfc << 16; 6791: //XEiJ.busWlf (a, z); 6792: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, z); 6793: } else if ((a & 1) == 0) { //4の倍数+2 6794: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | dfc << 16; 6795: //XEiJ.busWwe (a, z >> 16); 6796: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 16); 6797: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6798: a += 2; 6799: //XEiJ.busWwe (a, z); 6800: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6801: } else { //奇数 6802: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | dfc << 16; 6803: //XEiJ.busWb (a, z >> 24); 6804: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 24); 6805: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 6806: a++; 6807: //XEiJ.busWwe (a, z >> 8); 6808: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 8); 6809: a += 2; 6810: //XEiJ.busWb (a, z); 6811: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6812: } 6813: } else { //DFC=7。CPU空間 6814: if (0x00022000 <= a && a <= 0x0002201f) { //コプロセッサID=1 6815: XEiJ.fpuMotherboardCoprocessor.cirWriteLong (a, z); 6816: } else { 6817: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | dfc << 16 | M60_FSLW_BUS_ERROR_ON_WRITE; 6818: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6819: M68kException.m6eAddress = a; 6820: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6821: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6822: throw M68kException.m6eSignal; 6823: } 6824: } 6825: } 6826: } //irpMovesLong 6827: 6828: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6829: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6830: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6831: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6832: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6833: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6834: public static void irpCasLong () throws M68kException { 6835: int ea = XEiJ.regOC & 63; 6836: if (ea == XEiJ.EA_IM) { //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6837: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6838: throw M68kException.m6eSignal; 6839: } else { //CAS.L Dc,Du,<ea> 6840: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 6841: if ((w & ~0b0000_000_111_000_111) != 0) { 6842: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6843: throw M68kException.m6eSignal; 6844: } 6845: int a = efaMltLong (ea); //a=ea 6846: if ((a & 1) != 0) { //misaligned <ea> 6847: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 6848: throw M68kException.m6eSignal; 6849: } 6850: int c = w & 7; 6851: int y = XEiJ.regRn[c]; //y=Dc 6852: int x = mmuReadLongData (a, XEiJ.regSRS); //x=<ea> 6853: int z = x - y; //z=<ea>-Dc 6854: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6855: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6856: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6857: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6858: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6859: if (z == 0) { //<ea>==Dc 6860: XEiJ.mpuCycleCount += 19; 6861: mmuWriteLongData (a, XEiJ.regRn[w >> 6], XEiJ.regSRS); //Du→<ea> 6862: } else { //<ea>!=Dc 6863: XEiJ.mpuCycleCount += 19; 6864: XEiJ.regRn[c] = x; //<ea>→Dc 6865: } 6866: } 6867: } //irpCasLong 6868: 6869: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6870: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6871: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6872: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6873: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 6874: public static void irpMoveToDRByte () throws M68kException { 6875: XEiJ.mpuCycleCount++; 6876: int ea = XEiJ.regOC & 63; 6877: int qqq = XEiJ.regOC >> 9 & 7; 6878: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 6879: XEiJ.regRn[qqq] = ~255 & XEiJ.regRn[qqq] | 255 & z; 6880: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6881: } //irpMoveToDRByte 6882: 6883: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6884: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6885: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6886: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6887: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 6888: public static void irpMoveToMMByte () throws M68kException { 6889: XEiJ.mpuCycleCount++; 6890: int ea = XEiJ.regOC & 63; 6891: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6892: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6893: int a = m60Address = XEiJ.regRn[aqq]; 6894: mmuWriteByteData (a, z, XEiJ.regSRS); 6895: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6896: } //irpMoveToMMByte 6897: 6898: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6899: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6900: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6901: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6902: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 6903: public static void irpMoveToMPByte () throws M68kException { 6904: XEiJ.mpuCycleCount++; 6905: int ea = XEiJ.regOC & 63; 6906: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6907: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6908: int a; 6909: if (aqq < 15) { 6910: m60Incremented += 1L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 6911: a = m60Address = XEiJ.regRn[aqq]++; 6912: } else { 6913: m60Incremented += 2L << (7 << 3); 6914: a = m60Address = (XEiJ.regRn[15] += 2) - 2; 6915: } 6916: mmuWriteByteData (a, z, XEiJ.regSRS); 6917: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6918: } //irpMoveToMPByte 6919: 6920: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6921: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6922: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6923: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6924: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 6925: public static void irpMoveToMNByte () throws M68kException { 6926: XEiJ.mpuCycleCount++; 6927: int ea = XEiJ.regOC & 63; 6928: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6929: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6930: int a; 6931: if (aqq < 15) { 6932: m60Incremented -= 1L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 6933: a = m60Address = --XEiJ.regRn[aqq]; 6934: } else { 6935: m60Incremented -= 2L << (7 << 3); 6936: a = m60Address = XEiJ.regRn[15] -= 2; 6937: } 6938: mmuWriteByteData (a, z, XEiJ.regSRS); 6939: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6940: } //irpMoveToMNByte 6941: 6942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6943: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6944: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6945: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6946: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 6947: public static void irpMoveToMWByte () throws M68kException { 6948: XEiJ.mpuCycleCount++; 6949: int ea = XEiJ.regOC & 63; 6950: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6951: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6952: int t = XEiJ.regRn[aqq]; //ベースレジスタ 6953: int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 6954: mmuWriteByteData (a, z, XEiJ.regSRS); 6955: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6956: } //irpMoveToMWByte 6957: 6958: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6959: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6960: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6962: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 6963: public static void irpMoveToMXByte () throws M68kException { 6964: XEiJ.mpuCycleCount++; 6965: int ea = XEiJ.regOC & 63; 6966: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離。ここでAqが変化する可能性があることに注意 6967: int aqq = (XEiJ.regOC >> 9) - (0b0001_000 - 8); 6968: int a; 6969: int t = XEiJ.regRn[aqq]; //ベースレジスタ 6970: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 6971: if ((0x0100 & w) == 0) { //ブリーフフォーマット 6972: a = m60Address = 6973: (t //ベースレジスタ 6974: + (byte) w //バイトディスプレースメント 6975: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 6976: XEiJ.regRn[w >> 12]) //ロングインデックス 6977: << ((0x0600 & w) >> 9))); //スケールファクタ 6978: } else { //フルフォーマット 6979: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 6980: 3); //インダイレクトあり 6981: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 6982: t) + //ベースレジスタあり 6983: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 6984: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 6985: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 6986: int x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 6987: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 6988: XEiJ.regRn[w >> 12]) //ロングインデックス 6989: << ((0x0600 & w) >> 9)); //スケールファクタ 6990: a = m60Address = 6991: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 6992: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 6993: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 6994: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 6995: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 6996: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 6997: } 6998: mmuWriteByteData (a, z, XEiJ.regSRS); 6999: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7000: } //irpMoveToMXByte 7001: 7002: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7003: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7004: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7005: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7006: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 7007: public static void irpMoveToZWByte () throws M68kException { 7008: XEiJ.mpuCycleCount++; 7009: int ea = XEiJ.regOC & 63; 7010: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 7011: int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 7012: mmuWriteByteData (a, z, XEiJ.regSRS); 7013: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7014: } //irpMoveToZWByte 7015: 7016: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7017: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7018: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7019: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7020: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 7021: public static void irpMoveToZLByte () throws M68kException { 7022: XEiJ.mpuCycleCount++; 7023: int ea = XEiJ.regOC & 63; 7024: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 7025: int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 7026: mmuWriteByteData (a, z, XEiJ.regSRS); 7027: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7028: } //irpMoveToZLByte 7029: 7030: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7031: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7032: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7033: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7034: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 7035: public static void irpMoveToDRLong () throws M68kException { 7036: XEiJ.mpuCycleCount++; 7037: int ea = XEiJ.regOC & 63; 7038: int z; 7039: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7040: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7041: } //irpMoveToDRLong 7042: 7043: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7044: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7045: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7046: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7047: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 7048: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 7049: public static void irpMoveaLong () throws M68kException { 7050: XEiJ.mpuCycleCount++; 7051: int ea = XEiJ.regOC & 63; 7052: XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7053: } //irpMoveaLong 7054: 7055: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7056: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7057: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7058: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7059: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 7060: public static void irpMoveToMMLong () throws M68kException { 7061: XEiJ.mpuCycleCount++; 7062: int ea = XEiJ.regOC & 63; 7063: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7064: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7065: int a = m60Address = XEiJ.regRn[aqq]; 7066: mmuWriteLongData (a, z, XEiJ.regSRS); 7067: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7068: } //irpMoveToMMLong 7069: 7070: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7071: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7072: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7073: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7074: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 7075: public static void irpMoveToMPLong () throws M68kException { 7076: XEiJ.mpuCycleCount++; 7077: int ea = XEiJ.regOC & 63; 7078: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7079: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7080: m60Incremented += 4L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7081: int a = m60Address = (XEiJ.regRn[aqq] += 4) - 4; 7082: mmuWriteLongData (a, z, XEiJ.regSRS); 7083: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7084: } //irpMoveToMPLong 7085: 7086: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7087: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7088: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7090: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 7091: public static void irpMoveToMNLong () throws M68kException { 7092: XEiJ.mpuCycleCount++; 7093: int ea = XEiJ.regOC & 63; 7094: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7095: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7096: m60Incremented -= 4L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7097: int a = m60Address = XEiJ.regRn[aqq] -= 4; 7098: mmuWriteLongData (a, z, XEiJ.regSRS); 7099: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7100: } //irpMoveToMNLong 7101: 7102: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7103: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7104: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7105: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7106: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 7107: public static void irpMoveToMWLong () throws M68kException { 7108: XEiJ.mpuCycleCount++; 7109: int ea = XEiJ.regOC & 63; 7110: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7111: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7112: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7113: int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 7114: mmuWriteLongData (a, z, XEiJ.regSRS); 7115: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7116: } //irpMoveToMWLong 7117: 7118: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7119: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7120: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7121: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7122: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 7123: public static void irpMoveToMXLong () throws M68kException { 7124: XEiJ.mpuCycleCount++; 7125: int ea = XEiJ.regOC & 63; 7126: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7127: int aqq = (XEiJ.regOC >> 9) - (0b0010_000 - 8); 7128: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7129: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 7130: int a; 7131: if ((0x0100 & w) == 0) { //ブリーフフォーマット 7132: a = m60Address = 7133: (t //ベースレジスタ 7134: + (byte) w //バイトディスプレースメント 7135: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7136: XEiJ.regRn[w >> 12]) //ロングインデックス 7137: << ((0x0600 & w) >> 9))); //スケールファクタ 7138: } else { //フルフォーマット 7139: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 7140: 3); //インダイレクトあり 7141: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 7142: t) + //ベースレジスタあり 7143: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 7144: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 7145: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 7146: int x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 7147: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7148: XEiJ.regRn[w >> 12]) //ロングインデックス 7149: << ((0x0600 & w) >> 9)); //スケールファクタ 7150: a = m60Address = 7151: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 7152: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 7153: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 7154: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 7155: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 7156: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 7157: } 7158: mmuWriteLongData (a, z, XEiJ.regSRS); 7159: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7160: } //irpMoveToMXLong 7161: 7162: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7163: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7164: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7165: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7166: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 7167: public static void irpMoveToZWLong () throws M68kException { 7168: XEiJ.mpuCycleCount++; 7169: int ea = XEiJ.regOC & 63; 7170: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7171: int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 7172: mmuWriteLongData (a, z, XEiJ.regSRS); 7173: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7174: } //irpMoveToZWLong 7175: 7176: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7177: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7178: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7179: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7180: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 7181: public static void irpMoveToZLLong () throws M68kException { 7182: XEiJ.mpuCycleCount++; 7183: int ea = XEiJ.regOC & 63; 7184: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7185: int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 7186: mmuWriteLongData (a, z, XEiJ.regSRS); 7187: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7188: } //irpMoveToZLLong 7189: 7190: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7191: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7192: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7193: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7194: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 7195: public static void irpMoveToDRWord () throws M68kException { 7196: XEiJ.mpuCycleCount++; 7197: int ea = XEiJ.regOC & 63; 7198: int qqq = XEiJ.regOC >> 9 & 7; 7199: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ 7200: XEiJ.regRn[qqq] = ~65535 & XEiJ.regRn[qqq] | (char) z; 7201: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7202: } //irpMoveToDRWord 7203: 7204: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7205: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7206: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7207: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7208: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 7209: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 7210: // 7211: //MOVEA.W <ea>,Aq 7212: // ワードデータをロングに符号拡張してAqの全体を更新する 7213: public static void irpMoveaWord () throws M68kException { 7214: XEiJ.mpuCycleCount++; 7215: int ea = XEiJ.regOC & 63; 7216: XEiJ.regRn[XEiJ.regOC >> 9 & 15] = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //符号拡張して32bit全部書き換える。pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7217: } //irpMoveaWord 7218: 7219: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7220: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7221: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7222: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7223: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 7224: public static void irpMoveToMMWord () throws M68kException { 7225: XEiJ.mpuCycleCount++; 7226: int ea = XEiJ.regOC & 63; 7227: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離。このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7228: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7229: int a = m60Address = XEiJ.regRn[aqq]; 7230: mmuWriteWordData (a, z, XEiJ.regSRS); 7231: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7232: } //irpMoveToMMWord 7233: 7234: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7235: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7236: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7237: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7238: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 7239: public static void irpMoveToMPWord () throws M68kException { 7240: XEiJ.mpuCycleCount++; 7241: int ea = XEiJ.regOC & 63; 7242: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7243: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7244: m60Incremented += 2L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7245: int a = m60Address = (XEiJ.regRn[aqq] += 2) - 2; 7246: mmuWriteWordData (a, z, XEiJ.regSRS); 7247: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7248: } //irpMoveToMPWord 7249: 7250: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7251: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7252: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7253: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7254: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 7255: public static void irpMoveToMNWord () throws M68kException { 7256: XEiJ.mpuCycleCount++; 7257: int ea = XEiJ.regOC & 63; 7258: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7259: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7260: m60Incremented -= 2L << (aqq << 3); //longのシフトカウントは6bitでマスクされる 7261: int a = m60Address = XEiJ.regRn[aqq] -= 2; 7262: mmuWriteWordData (a, z, XEiJ.regSRS); 7263: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7264: } //irpMoveToMNWord 7265: 7266: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7267: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7268: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7269: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7270: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 7271: public static void irpMoveToMWWord () throws M68kException { 7272: XEiJ.mpuCycleCount++; 7273: int ea = XEiJ.regOC & 63; 7274: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7275: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7276: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7277: int a = m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 7278: mmuWriteWordData (a, z, XEiJ.regSRS); 7279: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7280: } //irpMoveToMWWord 7281: 7282: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7283: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7284: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7285: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7286: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 7287: public static void irpMoveToMXWord () throws M68kException { 7288: XEiJ.mpuCycleCount++; 7289: int ea = XEiJ.regOC & 63; 7290: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 7291: int aqq = (XEiJ.regOC >> 9) - (0b0011_000 - 8); 7292: int t = XEiJ.regRn[aqq]; //ベースレジスタ 7293: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 7294: int a; 7295: if ((0x0100 & w) == 0) { //ブリーフフォーマット 7296: a = m60Address = 7297: (t //ベースレジスタ 7298: + (byte) w //バイトディスプレースメント 7299: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7300: XEiJ.regRn[w >> 12]) //ロングインデックス 7301: << ((0x0600 & w) >> 9))); //スケールファクタ 7302: } else { //フルフォーマット 7303: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 7304: 3); //インダイレクトあり 7305: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 7306: t) + //ベースレジスタあり 7307: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 7308: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 7309: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 7310: int x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 7311: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7312: XEiJ.regRn[w >> 12]) //ロングインデックス 7313: << ((0x0600 & w) >> 9)); //スケールファクタ 7314: a = m60Address = 7315: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 7316: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 7317: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 7318: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 7319: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 7320: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 7321: } 7322: mmuWriteWordData (a, z, XEiJ.regSRS); 7323: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7324: } //irpMoveToMXWord 7325: 7326: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7327: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7328: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7329: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7330: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 7331: public static void irpMoveToZWWord () throws M68kException { 7332: XEiJ.mpuCycleCount++; 7333: int ea = XEiJ.regOC & 63; 7334: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 7335: int a = m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 7336: mmuWriteWordData (a, z, XEiJ.regSRS); 7337: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7338: } //irpMoveToZWWord 7339: 7340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7341: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7342: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7344: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 7345: public static void irpMoveToZLWord () throws M68kException { 7346: XEiJ.mpuCycleCount++; 7347: int ea = XEiJ.regOC & 63; 7348: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 7349: int a = m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 7350: mmuWriteWordData (a, z, XEiJ.regSRS); 7351: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7352: } //irpMoveToZLWord 7353: 7354: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7355: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7356: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7357: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7358: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 7359: public static void irpNegxByte () throws M68kException { 7360: int ea = XEiJ.regOC & 63; 7361: int y; 7362: int z; 7363: if (ea < XEiJ.EA_AR) { //NEGX.B Dr 7364: XEiJ.mpuCycleCount++; 7365: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y) - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 7366: } else { //NEGX.B <mem> 7367: XEiJ.mpuCycleCount++; 7368: int a = efaMltByte (ea); 7369: mmuWriteByteData (a, z = (byte) (-(y = mmuModifyByteSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 7370: } 7371: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7372: (y & z) >>> 31 << 1 | 7373: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7374: } //irpNegxByte 7375: 7376: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7377: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7378: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7380: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 7381: public static void irpNegxWord () throws M68kException { 7382: int ea = XEiJ.regOC & 63; 7383: int y; 7384: int z; 7385: if (ea < XEiJ.EA_AR) { //NEGX.W Dr 7386: XEiJ.mpuCycleCount++; 7387: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) (-(y = (short) y) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7388: } else { //NEGX.W <mem> 7389: XEiJ.mpuCycleCount++; 7390: int a = efaMltWord (ea); 7391: mmuWriteWordData (a, z = (short) (-(y = mmuModifyWordSignData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4)), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 7392: } 7393: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7394: (y & z) >>> 31 << 1 | 7395: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7396: } //irpNegxWord 7397: 7398: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7399: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7400: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7401: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7402: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 7403: public static void irpNegxLong () throws M68kException { 7404: int ea = XEiJ.regOC & 63; 7405: int y; 7406: int z; 7407: if (ea < XEiJ.EA_AR) { //NEGX.L Dr 7408: XEiJ.mpuCycleCount++; 7409: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 7410: } else { //NEGX.L <mem> 7411: XEiJ.mpuCycleCount++; 7412: int a = efaMltLong (ea); 7413: mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)) - (XEiJ.regCCR >> 4), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 7414: } 7415: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7416: (y & z) >>> 31 << 1 | 7417: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7418: } //irpNegxLong 7419: 7420: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7421: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7422: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7424: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 7425: public static void irpMoveFromSR () throws M68kException { 7426: //MC68010以上では特権命令 7427: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7428: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7429: throw M68kException.m6eSignal; 7430: } 7431: //以下はスーパーバイザモード 7432: int ea = XEiJ.regOC & 63; 7433: if (ea < XEiJ.EA_AR) { //MOVE.W SR,Dr 7434: XEiJ.mpuCycleCount++; 7435: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 7436: } else { //MOVE.W SR,<mem> 7437: XEiJ.mpuCycleCount++; 7438: mmuWriteWordData (efaMltWord (ea), XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 1); 7439: } 7440: } //irpMoveFromSR 7441: 7442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7443: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7444: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7445: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7446: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 7447: public static void irpChkLong () throws M68kException { 7448: XEiJ.mpuCycleCount += 2; 7449: int ea = XEiJ.regOC & 63; 7450: int x = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離 7451: int y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7452: int z = x - y; 7453: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | 7454: (y < 0 ? XEiJ.REG_CCR_N : 0)); 7455: if (y < 0 || x < y) { 7456: XEiJ.mpuCycleCount += 20 - 19; 7457: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 7458: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7459: throw M68kException.m6eSignal; 7460: } 7461: } //irpChkLong 7462: 7463: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7464: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7465: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7466: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7467: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 7468: public static void irpChkWord () throws M68kException { 7469: XEiJ.mpuCycleCount += 2; 7470: int ea = XEiJ.regOC & 63; 7471: int x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離 7472: int y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7473: int z = (short) (x - y); 7474: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | 7475: (y < 0 ? XEiJ.REG_CCR_N : 0)); 7476: if (y < 0 || x < y) { 7477: XEiJ.mpuCycleCount += 20 - 19; 7478: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 7479: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7480: throw M68kException.m6eSignal; 7481: } 7482: } //irpChkWord 7483: 7484: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7485: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7486: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7487: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7488: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 7489: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 7490: public static void irpLea () throws M68kException { 7491: int ea = XEiJ.regOC & 63; 7492: if (ea < XEiJ.EA_AR) { //EXTB.L Dr 7493: XEiJ.mpuCycleCount++; 7494: int z; 7495: XEiJ.regRn[ea] = z = (byte) XEiJ.regRn[ea]; 7496: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7497: } else { //LEA.L <ea>,Aq 7498: XEiJ.mpuCycleCount++; 7499: XEiJ.regRn[(XEiJ.regOC >> 9) - (32 - 8)] = efaLeaPea (ea); 7500: } 7501: } //irpLea 7502: 7503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7504: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7505: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7506: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7507: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 7508: public static void irpClrByte () throws M68kException { 7509: int ea = XEiJ.regOC & 63; 7510: if (ea < XEiJ.EA_AR) { //CLR.B Dr 7511: XEiJ.mpuCycleCount++; 7512: XEiJ.regRn[ea] &= ~0xff; 7513: } else { //CLR.B <mem> 7514: XEiJ.mpuCycleCount++; 7515: mmuWriteByteData (efaMltByte (ea), 0, XEiJ.regSRS); 7516: } 7517: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7518: } //irpClrByte 7519: 7520: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7521: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7522: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7523: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7524: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 7525: public static void irpClrWord () throws M68kException { 7526: int ea = XEiJ.regOC & 63; 7527: if (ea < XEiJ.EA_AR) { //CLR.W Dr 7528: XEiJ.mpuCycleCount++; 7529: XEiJ.regRn[ea] &= ~0xffff; 7530: } else { //CLR.W <mem> 7531: XEiJ.mpuCycleCount++; 7532: mmuWriteWordData (efaMltWord (ea), 0, XEiJ.regSRS); 7533: } 7534: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7535: } //irpClrWord 7536: 7537: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7538: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7539: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7540: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7541: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 7542: public static void irpClrLong () throws M68kException { 7543: int ea = XEiJ.regOC & 63; 7544: if (ea < XEiJ.EA_AR) { //CLR.L Dr 7545: XEiJ.mpuCycleCount++; 7546: XEiJ.regRn[ea] = 0; 7547: } else { //CLR.L <mem> 7548: XEiJ.mpuCycleCount++; 7549: mmuWriteLongData (efaMltLong (ea), 0, XEiJ.regSRS); 7550: } 7551: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7552: } //irpClrLong 7553: 7554: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7555: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7556: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7557: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7558: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 7559: public static void irpMoveFromCCR () throws M68kException { 7560: int ea = XEiJ.regOC & 63; 7561: if (ea < XEiJ.EA_AR) { //MOVE.W CCR,Dr 7562: XEiJ.mpuCycleCount++; 7563: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regCCR; 7564: } else { //MOVE.W CCR,<mem> 7565: XEiJ.mpuCycleCount++; 7566: mmuWriteWordData (efaMltWord (ea), XEiJ.regCCR, XEiJ.regSRS); 7567: } 7568: } //irpMoveFromCCR 7569: 7570: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7571: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7572: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7573: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7574: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 7575: public static void irpNegByte () throws M68kException { 7576: int ea = XEiJ.regOC & 63; 7577: int y; 7578: int z; 7579: if (ea < XEiJ.EA_AR) { //NEG.B Dr 7580: XEiJ.mpuCycleCount++; 7581: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y)); 7582: } else { //NEG.B <mem> 7583: XEiJ.mpuCycleCount++; 7584: int a = efaMltByte (ea); 7585: mmuWriteByteData (a, z = (byte) -(y = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 7586: } 7587: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7588: (y & z) >>> 31 << 1 | 7589: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7590: } //irpNegByte 7591: 7592: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7593: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7594: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7595: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7596: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 7597: public static void irpNegWord () throws M68kException { 7598: int ea = XEiJ.regOC & 63; 7599: int y; 7600: int z; 7601: if (ea < XEiJ.EA_AR) { //NEG.W Dr 7602: XEiJ.mpuCycleCount++; 7603: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) -(y = (short) y)); 7604: } else { //NEG.W <mem> 7605: XEiJ.mpuCycleCount++; 7606: int a = efaMltWord (ea); 7607: mmuWriteWordData (a, z = (short) -(y = mmuModifyWordSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 7608: } 7609: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7610: (y & z) >>> 31 << 1 | 7611: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7612: } //irpNegWord 7613: 7614: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7615: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7616: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7617: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7618: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 7619: public static void irpNegLong () throws M68kException { 7620: int ea = XEiJ.regOC & 63; 7621: int y; 7622: int z; 7623: if (ea < XEiJ.EA_AR) { //NEG.L Dr 7624: XEiJ.mpuCycleCount++; 7625: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]); 7626: } else { //NEG.L <mem> 7627: XEiJ.mpuCycleCount++; 7628: int a = efaMltLong (ea); 7629: mmuWriteLongData (a, z = -(y = mmuModifyLongData (a, XEiJ.regSRS)), XEiJ.regSRS); 7630: } 7631: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7632: (y & z) >>> 31 << 1 | 7633: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7634: } //irpNegLong 7635: 7636: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7637: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7638: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7639: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7640: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 7641: public static void irpMoveToCCR () throws M68kException { 7642: XEiJ.mpuCycleCount++; 7643: int ea = XEiJ.regOC & 63; 7644: XEiJ.regCCR = XEiJ.REG_CCR_MASK & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS)); //pcws。イミディエイトを分離 7645: } //irpMoveToCCR 7646: 7647: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7648: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7649: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7651: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 7652: public static void irpNotByte () throws M68kException { 7653: int ea = XEiJ.regOC & 63; 7654: int z; 7655: if (ea < XEiJ.EA_AR) { //NOT.B Dr 7656: XEiJ.mpuCycleCount++; 7657: z = XEiJ.regRn[ea] ^= 255; //0拡張してからEOR 7658: } else { //NOT.B <mem> 7659: XEiJ.mpuCycleCount++; 7660: int a = efaMltByte (ea); 7661: mmuWriteByteData (a, z = ~mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 7662: } 7663: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7664: } //irpNotByte 7665: 7666: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7667: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7668: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7669: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7670: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 7671: public static void irpNotWord () throws M68kException { 7672: int ea = XEiJ.regOC & 63; 7673: int z; 7674: if (ea < XEiJ.EA_AR) { //NOT.W Dr 7675: XEiJ.mpuCycleCount++; 7676: z = XEiJ.regRn[ea] ^= 65535; //0拡張してからEOR 7677: } else { //NOT.W <mem> 7678: XEiJ.mpuCycleCount++; 7679: int a = efaMltWord (ea); 7680: mmuWriteWordData (a, z = ~mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 7681: } 7682: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7683: } //irpNotWord 7684: 7685: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7686: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7687: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7688: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7689: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 7690: public static void irpNotLong () throws M68kException { 7691: int ea = XEiJ.regOC & 63; 7692: int z; 7693: if (ea < XEiJ.EA_AR) { //NOT.L Dr 7694: XEiJ.mpuCycleCount++; 7695: z = XEiJ.regRn[ea] ^= 0xffffffff; 7696: } else { //NOT.L <mem> 7697: XEiJ.mpuCycleCount++; 7698: int a = efaMltLong (ea); 7699: mmuWriteLongData (a, z = ~mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS); 7700: } 7701: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7702: } //irpNotLong 7703: 7704: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7705: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7706: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7707: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7708: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 7709: public static void irpMoveToSR () throws M68kException { 7710: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7711: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7712: throw M68kException.m6eSignal; 7713: } 7714: //以下はスーパーバイザモード 7715: XEiJ.mpuCycleCount += 12; 7716: int ea = XEiJ.regOC & 63; 7717: irpSetSR (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1) : mmuReadWordZeroData (efaAnyWord (ea), 1)); //特権違反チェックが先。pcwz。イミディエイトを分離 7718: } //irpMoveToSR 7719: 7720: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7721: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7722: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7723: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7724: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 7725: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 7726: // 7727: //LINK.L Ar,#<data> 7728: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.L #<data>,A7と同じ 7729: // LINK.L A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 7730: public static void irpNbcd () throws M68kException { 7731: int ea = XEiJ.regOC & 63; 7732: if (ea < XEiJ.EA_AR) { //NBCD.B Dr 7733: XEiJ.mpuCycleCount++; 7734: XEiJ.regRn[ea] = ~0xff & XEiJ.regRn[ea] | irpSbcd (0, XEiJ.regRn[ea]); 7735: } else if (ea < XEiJ.EA_MM) { //LINK.L Ar,#<data> 7736: XEiJ.mpuCycleCount += 2; 7737: int o = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); //pcls 7738: int arr = XEiJ.regOC - (0b0100_100_000_001_000 - 8); 7739: //評価順序に注意。LINK.L A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可 7740: int a = XEiJ.regRn[arr]; 7741: m60Incremented -= 4L << (7 << 3); 7742: int sp = m60Address = XEiJ.regRn[15] -= 4; 7743: mmuWriteLongData (sp, a, XEiJ.regSRS); //pushl 7744: XEiJ.regRn[arr] = sp; 7745: XEiJ.regRn[15] = sp + o; 7746: } else { //NBCD.B <mem> 7747: XEiJ.mpuCycleCount++; 7748: int a = efaMltByte (ea); 7749: mmuWriteByteData (a, irpSbcd (0, mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 7750: } 7751: } //irpNbcd 7752: 7753: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7754: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7755: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7756: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7757: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 7758: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 7759: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 7760: public static void irpPea () throws M68kException { 7761: int ea = XEiJ.regOC & 63; 7762: if (ea < XEiJ.EA_AR) { //SWAP.W Dr 7763: XEiJ.mpuCycleCount++; 7764: int x; 7765: int z; 7766: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) << 16 | x >>> 16; 7767: //上位ワードと下位ワードを入れ替えた後のDrをロングでテストする 7768: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7769: } else { //PEA.L <ea> 7770: XEiJ.mpuCycleCount++; 7771: //評価順序に注意。実効アドレスを求めてからspをデクリメントすること 7772: int a = efaLeaPea (ea); //BKPT #<data>はここでillegal instructionになる 7773: m60Incremented -= 4L << (7 << 3); 7774: int sp = m60Address = XEiJ.regRn[15] -= 4; 7775: mmuWriteLongData (sp, a, XEiJ.regSRS); 7776: } 7777: } //irpPea 7778: 7779: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7780: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7781: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7782: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7783: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 7784: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 7785: public static void irpMovemToMemWord () throws M68kException { 7786: int ea = XEiJ.regOC & 63; 7787: if (ea < XEiJ.EA_AR) { //EXT.W Dr 7788: XEiJ.mpuCycleCount++; 7789: int z; 7790: XEiJ.regRn[ea] = ~0xffff & (z = XEiJ.regRn[ea]) | (char) (z = (byte) z); 7791: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7792: } else { //MOVEM.W <list>,<ea> 7793: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 7794: XEiJ.regPC += 2; 7795: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 7796: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 7797: //転送するレジスタが0個のときArは変化しない 7798: int arr = ea - (XEiJ.EA_MN - 8); 7799: m60Incremented -= 2L << (arr << 3); //longのシフトカウントは6bitでマスクされる 7800: int a = m60Address = XEiJ.regRn[arr]; 7801: XEiJ.regRn[arr] = a - 2; 7802: int t = a; 7803: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7804: if ((l & 0x0001) != 0) { 7805: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[15], XEiJ.regSRS); 7806: } 7807: if ((l & 0x0002) != 0) { 7808: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[14], XEiJ.regSRS); 7809: } 7810: if ((l & 0x0004) != 0) { 7811: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[13], XEiJ.regSRS); 7812: } 7813: if ((l & 0x0008) != 0) { 7814: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[12], XEiJ.regSRS); 7815: } 7816: if ((l & 0x0010) != 0) { 7817: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[11], XEiJ.regSRS); 7818: } 7819: if ((l & 0x0020) != 0) { 7820: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[10], XEiJ.regSRS); 7821: } 7822: if ((l & 0x0040) != 0) { 7823: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 9], XEiJ.regSRS); 7824: } 7825: if ((byte) l < 0) { //(l & 0x0080) != 0 7826: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 8], XEiJ.regSRS); 7827: } 7828: if ((l & 0x0100) != 0) { 7829: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 7], XEiJ.regSRS); 7830: } 7831: if ((l & 0x0200) != 0) { 7832: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 6], XEiJ.regSRS); 7833: } 7834: if ((l & 0x0400) != 0) { 7835: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 5], XEiJ.regSRS); 7836: } 7837: if ((l & 0x0800) != 0) { 7838: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 4], XEiJ.regSRS); 7839: } 7840: if ((l & 0x1000) != 0) { 7841: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 3], XEiJ.regSRS); 7842: } 7843: if ((l & 0x2000) != 0) { 7844: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 2], XEiJ.regSRS); 7845: } 7846: if ((l & 0x4000) != 0) { 7847: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 1], XEiJ.regSRS); 7848: } 7849: if ((short) l < 0) { //(l & 0x8000) != 0 7850: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[ 0], XEiJ.regSRS); 7851: } 7852: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 7853: for (int i = 15; i >= 0; i--) { 7854: if ((l & 0x8000 >>> i) != 0) { 7855: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS); 7856: } 7857: } 7858: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 7859: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 7860: for (int i = 15; l != 0; i--, l <<= 1) { 7861: if (l < 0) { 7862: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS); 7863: } 7864: } 7865: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 7866: for (int i = 15; l != 0; i--, l >>>= 1) { 7867: if ((l & 1) != 0) { 7868: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i], XEiJ.regSRS); 7869: } 7870: } 7871: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 7872: for (int i = 15; l != 0; ) { 7873: int k = Integer.numberOfTrailingZeros (l); 7874: mmuWriteWordData (m60Address = a -= 2, XEiJ.regRn[i -= k], XEiJ.regSRS); 7875: l = l >>> k & ~1; 7876: } 7877: } 7878: m60Incremented += 2L << (arr << 3); //元に戻しておく。longのシフトカウントは6bitでマスクされる 7879: XEiJ.regRn[arr] = a; 7880: XEiJ.mpuCycleCount += t - a >> 1; //2バイト/個→1サイクル/個 7881: } else { //-(Ar)以外 7882: int a = efaCltWord (ea); 7883: int t = a; 7884: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7885: if ((l & 0x0001) != 0) { 7886: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 0], XEiJ.regSRS); 7887: a += 2; 7888: } 7889: if ((l & 0x0002) != 0) { 7890: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 1], XEiJ.regSRS); 7891: a += 2; 7892: } 7893: if ((l & 0x0004) != 0) { 7894: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 2], XEiJ.regSRS); 7895: a += 2; 7896: } 7897: if ((l & 0x0008) != 0) { 7898: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 3], XEiJ.regSRS); 7899: a += 2; 7900: } 7901: if ((l & 0x0010) != 0) { 7902: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 4], XEiJ.regSRS); 7903: a += 2; 7904: } 7905: if ((l & 0x0020) != 0) { 7906: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 5], XEiJ.regSRS); 7907: a += 2; 7908: } 7909: if ((l & 0x0040) != 0) { 7910: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 6], XEiJ.regSRS); 7911: a += 2; 7912: } 7913: if ((byte) l < 0) { //(l & 0x0080) != 0 7914: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 7], XEiJ.regSRS); 7915: a += 2; 7916: } 7917: if ((l & 0x0100) != 0) { 7918: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 8], XEiJ.regSRS); 7919: a += 2; 7920: } 7921: if ((l & 0x0200) != 0) { 7922: mmuWriteWordData (m60Address = a, XEiJ.regRn[ 9], XEiJ.regSRS); 7923: a += 2; 7924: } 7925: if ((l & 0x0400) != 0) { 7926: mmuWriteWordData (m60Address = a, XEiJ.regRn[10], XEiJ.regSRS); 7927: a += 2; 7928: } 7929: if ((l & 0x0800) != 0) { 7930: mmuWriteWordData (m60Address = a, XEiJ.regRn[11], XEiJ.regSRS); 7931: a += 2; 7932: } 7933: if ((l & 0x1000) != 0) { 7934: mmuWriteWordData (m60Address = a, XEiJ.regRn[12], XEiJ.regSRS); 7935: a += 2; 7936: } 7937: if ((l & 0x2000) != 0) { 7938: mmuWriteWordData (m60Address = a, XEiJ.regRn[13], XEiJ.regSRS); 7939: a += 2; 7940: } 7941: if ((l & 0x4000) != 0) { 7942: mmuWriteWordData (m60Address = a, XEiJ.regRn[14], XEiJ.regSRS); 7943: a += 2; 7944: } 7945: if ((short) l < 0) { //(l & 0x8000) != 0 7946: mmuWriteWordData (m60Address = a, XEiJ.regRn[15], XEiJ.regSRS); 7947: a += 2; 7948: } 7949: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 7950: for (int i = 0; i <= 15; i++) { 7951: if ((l & 0x0001 << i) != 0) { 7952: mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 7953: a += 2; 7954: } 7955: } 7956: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 7957: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 7958: for (int i = 0; l != 0; i++, l <<= 1) { 7959: if (l < 0) { 7960: mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 7961: a += 2; 7962: } 7963: } 7964: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 7965: for (int i = 0; l != 0; i++, l >>>= 1) { 7966: if ((l & 1) != 0) { 7967: mmuWriteWordData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 7968: a += 2; 7969: } 7970: } 7971: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 7972: for (int i = 0; l != 0; ) { 7973: int k = Integer.numberOfTrailingZeros (l); 7974: mmuWriteWordData (m60Address = a, XEiJ.regRn[i += k], XEiJ.regSRS); 7975: a += 2; 7976: l = l >>> k & ~1; 7977: } 7978: } 7979: XEiJ.mpuCycleCount += a - t >> 1; //2バイト/個→1サイクル/個 7980: } 7981: } 7982: } //irpMovemToMemWord 7983: 7984: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7985: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7986: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7987: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7988: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 7989: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 7990: public static void irpMovemToMemLong () throws M68kException { 7991: int ea = XEiJ.regOC & 63; 7992: if (ea < XEiJ.EA_AR) { //EXT.L Dr 7993: XEiJ.mpuCycleCount++; 7994: int z; 7995: XEiJ.regRn[ea] = z = (short) XEiJ.regRn[ea]; 7996: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7997: } else { //MOVEM.L <list>,<ea> 7998: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 7999: XEiJ.regPC += 2; 8000: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 8001: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 8002: //転送するレジスタが0個のときArは変化しない 8003: int arr = ea - (XEiJ.EA_MN - 8); 8004: m60Incremented -= 4L << (arr << 3); //longのシフトカウントは6bitでマスクされる 8005: int a = m60Address = XEiJ.regRn[arr]; 8006: XEiJ.regRn[arr] = a - 4; 8007: int t = a; 8008: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8009: if ((l & 0x0001) != 0) { 8010: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[15], XEiJ.regSRS); 8011: } 8012: if ((l & 0x0002) != 0) { 8013: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[14], XEiJ.regSRS); 8014: } 8015: if ((l & 0x0004) != 0) { 8016: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[13], XEiJ.regSRS); 8017: } 8018: if ((l & 0x0008) != 0) { 8019: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[12], XEiJ.regSRS); 8020: } 8021: if ((l & 0x0010) != 0) { 8022: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[11], XEiJ.regSRS); 8023: } 8024: if ((l & 0x0020) != 0) { 8025: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[10], XEiJ.regSRS); 8026: } 8027: if ((l & 0x0040) != 0) { 8028: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 9], XEiJ.regSRS); 8029: } 8030: if ((byte) l < 0) { //(l & 0x0080) != 0 8031: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 8], XEiJ.regSRS); 8032: } 8033: if ((l & 0x0100) != 0) { 8034: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 7], XEiJ.regSRS); 8035: } 8036: if ((l & 0x0200) != 0) { 8037: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 6], XEiJ.regSRS); 8038: } 8039: if ((l & 0x0400) != 0) { 8040: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 5], XEiJ.regSRS); 8041: } 8042: if ((l & 0x0800) != 0) { 8043: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 4], XEiJ.regSRS); 8044: } 8045: if ((l & 0x1000) != 0) { 8046: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 3], XEiJ.regSRS); 8047: } 8048: if ((l & 0x2000) != 0) { 8049: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 2], XEiJ.regSRS); 8050: } 8051: if ((l & 0x4000) != 0) { 8052: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 1], XEiJ.regSRS); 8053: } 8054: if ((short) l < 0) { //(l & 0x8000) != 0 8055: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[ 0], XEiJ.regSRS); 8056: } 8057: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8058: for (int i = 15; i >= 0; i--) { 8059: if ((l & 0x8000 >>> i) != 0) { 8060: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS); 8061: } 8062: } 8063: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8064: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8065: for (int i = 15; l != 0; i--, l <<= 1) { 8066: if (l < 0) { 8067: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS); 8068: } 8069: } 8070: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8071: for (int i = 15; l != 0; i--, l >>>= 1) { 8072: if ((l & 1) != 0) { 8073: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i], XEiJ.regSRS); 8074: } 8075: } 8076: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8077: for (int i = 15; l != 0; ) { 8078: int k = Integer.numberOfTrailingZeros (l); 8079: mmuWriteLongData (m60Address = a -= 4, XEiJ.regRn[i -= k], XEiJ.regSRS); 8080: l = l >>> k & ~1; 8081: } 8082: } 8083: m60Incremented += 4L << (arr << 3); //元に戻しておく。longのシフトカウントは6bitでマスクされる 8084: XEiJ.regRn[arr] = a; 8085: XEiJ.mpuCycleCount += t - a >> 2; //4バイト/個→1サイクル/個 8086: } else { //-(Ar)以外 8087: int a = efaCltLong (ea); 8088: int t = a; 8089: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8090: if ((l & 0x0001) != 0) { 8091: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 0], XEiJ.regSRS); 8092: a += 4; 8093: } 8094: if ((l & 0x0002) != 0) { 8095: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 1], XEiJ.regSRS); 8096: a += 4; 8097: } 8098: if ((l & 0x0004) != 0) { 8099: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 2], XEiJ.regSRS); 8100: a += 4; 8101: } 8102: if ((l & 0x0008) != 0) { 8103: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 3], XEiJ.regSRS); 8104: a += 4; 8105: } 8106: if ((l & 0x0010) != 0) { 8107: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 4], XEiJ.regSRS); 8108: a += 4; 8109: } 8110: if ((l & 0x0020) != 0) { 8111: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 5], XEiJ.regSRS); 8112: a += 4; 8113: } 8114: if ((l & 0x0040) != 0) { 8115: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 6], XEiJ.regSRS); 8116: a += 4; 8117: } 8118: if ((byte) l < 0) { //(l & 0x0080) != 0 8119: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 7], XEiJ.regSRS); 8120: a += 4; 8121: } 8122: if ((l & 0x0100) != 0) { 8123: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 8], XEiJ.regSRS); 8124: a += 4; 8125: } 8126: if ((l & 0x0200) != 0) { 8127: mmuWriteLongData (m60Address = a, XEiJ.regRn[ 9], XEiJ.regSRS); 8128: a += 4; 8129: } 8130: if ((l & 0x0400) != 0) { 8131: mmuWriteLongData (m60Address = a, XEiJ.regRn[10], XEiJ.regSRS); 8132: a += 4; 8133: } 8134: if ((l & 0x0800) != 0) { 8135: mmuWriteLongData (m60Address = a, XEiJ.regRn[11], XEiJ.regSRS); 8136: a += 4; 8137: } 8138: if ((l & 0x1000) != 0) { 8139: mmuWriteLongData (m60Address = a, XEiJ.regRn[12], XEiJ.regSRS); 8140: a += 4; 8141: } 8142: if ((l & 0x2000) != 0) { 8143: mmuWriteLongData (m60Address = a, XEiJ.regRn[13], XEiJ.regSRS); 8144: a += 4; 8145: } 8146: if ((l & 0x4000) != 0) { 8147: mmuWriteLongData (m60Address = a, XEiJ.regRn[14], XEiJ.regSRS); 8148: a += 4; 8149: } 8150: if ((short) l < 0) { //(l & 0x8000) != 0 8151: mmuWriteLongData (m60Address = a, XEiJ.regRn[15], XEiJ.regSRS); 8152: a += 4; 8153: } 8154: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8155: for (int i = 0; i <= 15; i++) { 8156: if ((l & 0x0001 << i) != 0) { 8157: mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 8158: a += 4; 8159: } 8160: } 8161: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8162: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8163: for (int i = 0; l != 0; i++, l <<= 1) { 8164: if (l < 0) { 8165: mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 8166: a += 4; 8167: } 8168: } 8169: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8170: for (int i = 0; l != 0; i++, l >>>= 1) { 8171: if ((l & 1) != 0) { 8172: mmuWriteLongData (m60Address = a, XEiJ.regRn[i], XEiJ.regSRS); 8173: a += 4; 8174: } 8175: } 8176: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8177: for (int i = 0; l != 0; ) { 8178: int k = Integer.numberOfTrailingZeros (l); 8179: mmuWriteLongData (m60Address = a, XEiJ.regRn[i += k], XEiJ.regSRS); 8180: a += 4; 8181: l = l >>> k & ~1; 8182: } 8183: } 8184: XEiJ.mpuCycleCount += a - t >> 2; //4バイト/個→1サイクル/個 8185: } 8186: } 8187: } //irpMovemToMemLong 8188: 8189: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8190: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8191: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8192: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8193: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 8194: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 8195: public static void irpTstByte () throws M68kException { 8196: XEiJ.mpuCycleCount++; 8197: int ea = XEiJ.regOC & 63; 8198: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS))]; //ccr_tst_byte。pcbs。イミディエイトを分離。アドレッシングモードに注意 8199: } //irpTstByte 8200: 8201: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8202: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8203: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8204: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8205: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 8206: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 8207: public static void irpTstWord () throws M68kException { 8208: XEiJ.mpuCycleCount++; 8209: int ea = XEiJ.regOC & 63; 8210: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8211: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 8212: } //irpTstWord 8213: 8214: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8215: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8216: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8217: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8218: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 8219: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 8220: public static void irpTstLong () throws M68kException { 8221: XEiJ.mpuCycleCount++; 8222: int ea = XEiJ.regOC & 63; 8223: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離。アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8224: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8225: } //irpTstLong 8226: 8227: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8228: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8229: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8231: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 8232: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 8233: public static void irpTas () throws M68kException { 8234: int ea = XEiJ.regOC & 63; 8235: int z; 8236: if (ea < XEiJ.EA_AR) { //TAS.B Dr 8237: XEiJ.mpuCycleCount++; 8238: XEiJ.regRn[ea] = 0x80 | (z = XEiJ.regRn[ea]); 8239: } else { //TAS.B <mem> 8240: XEiJ.mpuCycleCount += 17; 8241: int a = efaMltByte (ea); 8242: mmuWriteByteData (a, 0x80 | (z = mmuModifyByteSignData (a, XEiJ.regSRS)), XEiJ.regSRS); 8243: } 8244: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 8245: } //irpTas 8246: 8247: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8248: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8249: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8250: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8251: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 8252: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 8253: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 8254: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 8255: public static void irpMuluMulsLong () throws M68kException { 8256: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 8257: if ((w & ~0b0111_110_000_000_111) != 0) { 8258: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8259: throw M68kException.m6eSignal; 8260: } 8261: if ((w & 0b0000_010_000_000_000) != 0) { //64bit積 8262: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 8263: throw M68kException.m6eSignal; 8264: } 8265: //32bit積 8266: int s = w & 0b0000_100_000_000_000; //0=MULU,1=MULS 8267: int l = w >> 12; //被乗数,積 8268: XEiJ.mpuCycleCount += 2; 8269: int ea = XEiJ.regOC & 63; 8270: long yy = (long) (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS)); //pcls。イミディエイトを分離 8271: long xx = (long) XEiJ.regRn[l]; 8272: if (s == 0) { //MULU 8273: long zz = (0xffffffffL & xx) * (0xffffffffL & yy); 8274: int z = XEiJ.regRn[l] = (int) zz; 8275: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (zz >>> 32 != 0L ? XEiJ.REG_CCR_V : 0); 8276: } else { //MULS 8277: long zz = xx * yy; 8278: int z = XEiJ.regRn[l] = (int) zz; 8279: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (z != zz ? XEiJ.REG_CCR_V : 0); 8280: } 8281: } //irpMuluMulsLong 8282: 8283: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8284: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8285: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8287: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 8288: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 8289: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 8290: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 8291: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 8292: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 8293: // 8294: //DIVS.L <ea>,Dq 8295: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8296: // 8297: //DIVS.L <ea>,Dr:Dq 8298: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8299: // M68000PRMでDIVS.Lのアドレッシングモードがデータ可変と書かれているのはデータの間違い 8300: // 8301: //DIVSL.L <ea>,Dr:Dq 8302: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8303: // 8304: //DIVU.L <ea>,Dq 8305: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8306: // 8307: //DIVU.L <ea>,Dr:Dq 8308: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8309: // 8310: //DIVUL.L <ea>,Dr:Dq 8311: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8312: public static void irpDivuDivsLong () throws M68kException { 8313: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 8314: if ((w & ~0b0111_110_000_000_111) != 0) { 8315: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8316: throw M68kException.m6eSignal; 8317: } 8318: if ((w & 0b0000_010_000_000_000) != 0) { //64bit被除数 8319: M68kException.m6eNumber = M68kException.M6E_UNIMPLEMENTED_INSTRUCTION; 8320: throw M68kException.m6eSignal; 8321: } 8322: //32bit被除数 8323: int s = w & 0b0000_100_000_000_000; //0=DIVU,1=DIVS 8324: int h = w & 7; //余り 8325: int l = w >> 12; //被除数,商 8326: int ea = XEiJ.regOC & 63; 8327: int y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //除数。pcls。イミディエイトを分離 8328: if (s == 0) { //符号なし。DIVU.L <ea>,* 8329: XEiJ.mpuCycleCount += 38; //最大 8330: long yy = (long) y & 0xffffffffL; //除数 8331: if (y == 0) { //ゼロ除算 8332: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 8333: ); //Cは常にクリア 8334: XEiJ.mpuCycleCount += 38 - 34; 8335: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 8336: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8337: throw M68kException.m6eSignal; 8338: } //if ゼロ除算 8339: long xx = (long) XEiJ.regRn[l] & 0xffffffffL; //被除数 8340: long zz = (long) ((double) xx / (double) yy); //double→intのキャストは飽和変換で0xffffffff/0x00000001が0x7fffffffになってしまうのでdouble→longとする 8341: int z = XEiJ.regRn[l] = (int) zz; //商 8342: if (h != l) { 8343: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8344: } 8345: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8346: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8347: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8348: ); //VとCは常にクリア 8349: } else { //符号あり。DIVS.L <ea>,* 8350: XEiJ.mpuCycleCount += 38; //最大 8351: long yy = (long) y; //除数 8352: if (y == 0) { //ゼロ除算 8353: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 8354: ); //Cは常にクリア 8355: XEiJ.mpuCycleCount += 38 - 34; 8356: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 8357: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8358: throw M68kException.m6eSignal; 8359: } //if ゼロ除算 8360: long xx = (long) XEiJ.regRn[l]; //被除数 8361: long zz = xx / yy; //商 8362: if ((int) zz != zz) { //オーバーフローあり 8363: //Dqは変化しない 8364: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) | //XとNとZは変化しない 8365: XEiJ.REG_CCR_V //Vは常にセット 8366: ); //Cは常にクリア 8367: } else { //オーバーフローなし 8368: int z = XEiJ.regRn[l] = (int) zz; //商 8369: if (h != l) { //DIVSL.L <ea>,Dr:Dq 8370: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8371: } 8372: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8373: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8374: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8375: ); //VとCは常にクリア 8376: } //if オーバーフローあり/オーバーフローなし 8377: } //if 符号なし/符号あり 8378: } //irpDivuDivsLong 8379: 8380: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8381: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8382: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8383: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8384: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 8385: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 8386: // 8387: //SATS.L Dr 8388: // VがセットされていたらDrを符号が逆で絶対値が最大の値にする(直前のDrに対する演算を飽和演算にする) 8389: public static void irpMovemToRegWord () throws M68kException { 8390: int ea = XEiJ.regOC & 63; 8391: if (ea < XEiJ.EA_AR) { //SATS.L Dr 8392: XEiJ.mpuCycleCount++; 8393: int z = XEiJ.regRn[ea]; 8394: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 < 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) != 0) { //Vがセットされているとき 8395: XEiJ.regRn[ea] = z = z >> 31 ^ 0x80000000; //符号が逆で絶対値が最大の値にする 8396: } 8397: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8398: } else { //MOVEM.W <ea>,<list> 8399: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 8400: XEiJ.regPC += 2; 8401: int arr, a; 8402: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8403: arr = ea - (XEiJ.EA_MP - 8); 8404: a = m60Address = XEiJ.regRn[arr]; 8405: } else { //(Ar)+以外 8406: arr = 16; 8407: a = efaCntWord (ea); 8408: } 8409: int t = a; 8410: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8411: if ((l & 0x0001) != 0) { 8412: XEiJ.regRn[ 0] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8413: a += 2; 8414: } 8415: if ((l & 0x0002) != 0) { 8416: XEiJ.regRn[ 1] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8417: a += 2; 8418: } 8419: if ((l & 0x0004) != 0) { 8420: XEiJ.regRn[ 2] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8421: a += 2; 8422: } 8423: if ((l & 0x0008) != 0) { 8424: XEiJ.regRn[ 3] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8425: a += 2; 8426: } 8427: if ((l & 0x0010) != 0) { 8428: XEiJ.regRn[ 4] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8429: a += 2; 8430: } 8431: if ((l & 0x0020) != 0) { 8432: XEiJ.regRn[ 5] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8433: a += 2; 8434: } 8435: if ((l & 0x0040) != 0) { 8436: XEiJ.regRn[ 6] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8437: a += 2; 8438: } 8439: if ((byte) l < 0) { //(l & 0x0080) != 0 8440: XEiJ.regRn[ 7] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //データレジスタも符号拡張して32bit全部書き換える 8441: a += 2; 8442: } 8443: if ((l & 0x0100) != 0) { 8444: XEiJ.regRn[ 8] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8445: a += 2; 8446: } 8447: if ((l & 0x0200) != 0) { 8448: XEiJ.regRn[ 9] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8449: a += 2; 8450: } 8451: if ((l & 0x0400) != 0) { 8452: XEiJ.regRn[10] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8453: a += 2; 8454: } 8455: if ((l & 0x0800) != 0) { 8456: XEiJ.regRn[11] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8457: a += 2; 8458: } 8459: if ((l & 0x1000) != 0) { 8460: XEiJ.regRn[12] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8461: a += 2; 8462: } 8463: if ((l & 0x2000) != 0) { 8464: XEiJ.regRn[13] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8465: a += 2; 8466: } 8467: if ((l & 0x4000) != 0) { 8468: XEiJ.regRn[14] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8469: a += 2; 8470: } 8471: if ((short) l < 0) { //(l & 0x8000) != 0 8472: XEiJ.regRn[15] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //符号拡張して32bit全部書き換える 8473: a += 2; 8474: } 8475: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8476: for (int i = 0; i <= 15; i++) { 8477: if ((l & 0x0001 << i) != 0) { 8478: XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8479: a += 2; 8480: } 8481: } 8482: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8483: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8484: for (int i = 0; l != 0; i++, l <<= 1) { 8485: if (l < 0) { 8486: XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8487: a += 2; 8488: } 8489: } 8490: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8491: for (int i = 0; l != 0; i++, l >>>= 1) { 8492: if ((l & 1) != 0) { 8493: XEiJ.regRn[i] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8494: a += 2; 8495: } 8496: } 8497: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8498: for (int i = 0; l != 0; ) { 8499: int k = Integer.numberOfTrailingZeros (l); 8500: XEiJ.regRn[i += k] = mmuReadWordSignData (m60Address = a, XEiJ.regSRS); //(データレジスタも)符号拡張して32bit全部書き換える 8501: a += 2; 8502: l = l >>> k & ~1; 8503: } 8504: } 8505: //MOVEM.W (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8506: XEiJ.regRn[arr] = a; 8507: XEiJ.mpuCycleCount += a - t >> 1; //2バイト/個→1サイクル/個 8508: } 8509: } //irpMovemToRegWord 8510: 8511: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8512: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8513: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8514: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8515: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 8516: public static void irpMovemToRegLong () throws M68kException { 8517: int ea = XEiJ.regOC & 63; 8518: { 8519: int l = mmuReadWordZeroExword (XEiJ.regPC, XEiJ.regSRS); //pcwze。レジスタリスト。ゼロ拡張 8520: XEiJ.regPC += 2; 8521: int arr, a; 8522: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8523: arr = ea - (XEiJ.EA_MP - 8); 8524: a = m60Address = XEiJ.regRn[arr]; 8525: } else { //(Ar)+以外 8526: arr = 16; 8527: a = efaCntLong (ea); 8528: } 8529: int t = a; 8530: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8531: if ((l & 0x0001) != 0) { 8532: XEiJ.regRn[ 0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8533: a += 4; 8534: } 8535: if ((l & 0x0002) != 0) { 8536: XEiJ.regRn[ 1] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8537: a += 4; 8538: } 8539: if ((l & 0x0004) != 0) { 8540: XEiJ.regRn[ 2] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8541: a += 4; 8542: } 8543: if ((l & 0x0008) != 0) { 8544: XEiJ.regRn[ 3] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8545: a += 4; 8546: } 8547: if ((l & 0x0010) != 0) { 8548: XEiJ.regRn[ 4] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8549: a += 4; 8550: } 8551: if ((l & 0x0020) != 0) { 8552: XEiJ.regRn[ 5] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8553: a += 4; 8554: } 8555: if ((l & 0x0040) != 0) { 8556: XEiJ.regRn[ 6] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8557: a += 4; 8558: } 8559: if ((byte) l < 0) { //(l & 0x0080) != 0 8560: XEiJ.regRn[ 7] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8561: a += 4; 8562: } 8563: if ((l & 0x0100) != 0) { 8564: XEiJ.regRn[ 8] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8565: a += 4; 8566: } 8567: if ((l & 0x0200) != 0) { 8568: XEiJ.regRn[ 9] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8569: a += 4; 8570: } 8571: if ((l & 0x0400) != 0) { 8572: XEiJ.regRn[10] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8573: a += 4; 8574: } 8575: if ((l & 0x0800) != 0) { 8576: XEiJ.regRn[11] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8577: a += 4; 8578: } 8579: if ((l & 0x1000) != 0) { 8580: XEiJ.regRn[12] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8581: a += 4; 8582: } 8583: if ((l & 0x2000) != 0) { 8584: XEiJ.regRn[13] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8585: a += 4; 8586: } 8587: if ((l & 0x4000) != 0) { 8588: XEiJ.regRn[14] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8589: a += 4; 8590: } 8591: if ((short) l < 0) { //(l & 0x8000) != 0 8592: XEiJ.regRn[15] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8593: a += 4; 8594: } 8595: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8596: for (int i = 0; i <= 15; i++) { 8597: if ((l & 0x0001 << i) != 0) { 8598: XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8599: a += 4; 8600: } 8601: } 8602: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8603: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8604: for (int i = 0; l != 0; i++, l <<= 1) { 8605: if (l < 0) { 8606: XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8607: a += 4; 8608: } 8609: } 8610: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8611: for (int i = 0; l != 0; i++, l >>>= 1) { 8612: if ((l & 1) != 0) { 8613: XEiJ.regRn[i] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8614: a += 4; 8615: } 8616: } 8617: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8618: for (int i = 0; l != 0; ) { 8619: int k = Integer.numberOfTrailingZeros (l); 8620: XEiJ.regRn[i += k] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 8621: a += 4; 8622: l = l >>> k & ~1; 8623: } 8624: } 8625: //MOVEM.L (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8626: XEiJ.regRn[arr] = a; 8627: XEiJ.mpuCycleCount += a - t >> 2; //4バイト/個→1サイクル/個 8628: } 8629: } //irpMovemToRegLong 8630: 8631: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8632: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8633: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8634: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8635: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 8636: public static void irpTrap () throws M68kException { 8637: irpExceptionFormat0 (XEiJ.regOC - (0b0100_111_001_000_000 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2, XEiJ.regPC); //pcは次の命令 8638: } //irpTrap 8639: public static void irpTrap15 () throws M68kException { 8640: if ((XEiJ.regRn[0] & 255) == 0x8e) { //IOCS _BOOTINF 8641: MainMemory.mmrCheckHuman (); 8642: } 8643: irpExceptionFormat0 (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR << 2, XEiJ.regPC); //pcは次の命令 8644: } //irpTrap15 8645: 8646: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8647: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8648: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8649: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8650: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 8651: // 8652: //LINK.W Ar,#<data> 8653: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.W #<data>,A7と同じ 8654: // LINK.W A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 8655: public static void irpLinkWord () throws M68kException { 8656: XEiJ.mpuCycleCount++; 8657: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 8658: int arr = XEiJ.regOC - (0b0100_111_001_010_000 - 8); 8659: //評価順序に注意。LINK.W A7,#<data>のときプッシュするのはA7をデクリメントする前の値。wl(r[15]-=4,r[8+rrr])は不可 8660: int a = XEiJ.regRn[arr]; 8661: m60Incremented -= 4L << (7 << 3); 8662: int sp = m60Address = XEiJ.regRn[15] -= 4; 8663: mmuWriteLongData (sp, a, XEiJ.regSRS); //pushl 8664: XEiJ.regRn[arr] = sp; 8665: XEiJ.regRn[15] = sp + o; 8666: } //irpLinkWord 8667: 8668: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8669: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8670: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8671: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8672: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 8673: // 8674: //UNLK Ar 8675: // MOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ 8676: // UNLK A7はMOVEA.L A7,A7;MOVEA.L (A7)+,A7すなわちMOVEA.L (A7),A7と同じ 8677: // ソースオペランドのポストインクリメントはデスティネーションオペランドが評価される前に完了しているとみなされる 8678: // 例えばMOVE.L (A0)+,(A0)+はMOVE.L (A0),(4,A0);ADDQ.L #8,A0と同じ 8679: // MOVEA.L (A0)+,A0はポストインクリメントされたA0が(A0)から読み出された値で上書きされるのでMOVEA.L (A0),A0と同じ 8680: // M68000PRMにUNLK Anの動作はAn→SP;(SP)→An;SP+4→SPだと書かれているがこれはn=7の場合に当てはまらない 8681: // 余談だが68040の初期のマスクセットはUNLK A7を実行すると固まるらしい 8682: public static void irpUnlk () throws M68kException { 8683: XEiJ.mpuCycleCount += 2; 8684: int arr = XEiJ.regOC - (0b0100_111_001_011_000 - 8); 8685: //評価順序に注意 8686: int sp = XEiJ.regRn[arr]; 8687: // UNLK ArはMOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ 8688: // (A7)+がページフォルトになってリトライするとき 8689: // Arはまだ更新されておらず、リトライでMOVEA.L Ar,A7が再実行されるので、A7を巻き戻す必要はない 8690: m60Incremented += 4L << (7 << 3); //UNLK A7でページフォルトが発生したときA7が増えすぎないようにする 8691: XEiJ.regRn[15] = sp + 4; 8692: XEiJ.regRn[arr] = mmuReadLongData (m60Address = sp, XEiJ.regSRS); //popls 8693: } //irpUnlk 8694: 8695: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8696: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8697: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8699: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 8700: public static void irpMoveToUsp () throws M68kException { 8701: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8702: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8703: throw M68kException.m6eSignal; 8704: } 8705: //以下はスーパーバイザモード 8706: XEiJ.mpuCycleCount += 2; 8707: XEiJ.mpuUSP = XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_100_000 - 8)]; 8708: } //irpMoveToUsp 8709: 8710: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8711: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8712: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8713: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8714: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 8715: public static void irpMoveFromUsp () throws M68kException { 8716: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8717: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8718: throw M68kException.m6eSignal; 8719: } 8720: //以下はスーパーバイザモード 8721: XEiJ.mpuCycleCount++; 8722: XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_101_000 - 8)] = XEiJ.mpuUSP; 8723: } //irpMoveFromUsp 8724: 8725: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8726: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8727: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8728: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8729: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 8730: public static void irpReset () throws M68kException { 8731: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8732: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8733: throw M68kException.m6eSignal; 8734: } 8735: //以下はスーパーバイザモード 8736: XEiJ.mpuCycleCount += 45; 8737: XEiJ.irpReset (); 8738: } //irpReset 8739: 8740: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8741: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8742: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8743: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8744: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 8745: public static void irpNop () throws M68kException { 8746: XEiJ.mpuCycleCount += 9; 8747: //何もしない 8748: } //irpNop 8749: 8750: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8751: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8752: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8753: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8754: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 8755: // 8756: //STOP #<data> 8757: // 1. #<data>をsrに設定する 8758: // 2. pcを進める 8759: // 3. 以下のいずれかの条件が成立するまで停止する 8760: // 3a. トレース 8761: // 3b. マスクされているレベルよりも高い割り込み要求 8762: // 3c. リセット 8763: // コアと一緒にデバイスを止めるわけにいかないので、ここでは条件が成立するまで同じ命令を繰り返すループ命令として実装する 8764: public static void irpStop () throws M68kException { 8765: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8766: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8767: throw M68kException.m6eSignal; 8768: } 8769: //以下はスーパーバイザモード 8770: XEiJ.mpuCycleCount++; 8771: irpSetSR (mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, 1)); //pcws。特権違反チェックが先 8772: if (XEiJ.mpuTraceFlag == 0) { //トレースまたはマスクされているレベルよりも高い割り込み要求がない 8773: XEiJ.regPC = XEiJ.regPC0; //ループ 8774: //任意の負荷率を100%に設定しているときSTOP命令が軽すぎると動作周波数が大きくなりすぎて割り込みがかかったとき次に進めなくなる 8775: //負荷率の計算にSTOP命令で止まっていた時間を含めないことにする 8776: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。50MHzのとき200clk 8777: XEiJ.mpuLastNano += 4000L; 8778: } 8779: } //irpStop 8780: 8781: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8782: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8783: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8784: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8785: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 8786: public static void irpRte () throws M68kException { 8787: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8788: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8789: throw M68kException.m6eSignal; 8790: } 8791: //以下はスーパーバイザモード 8792: XEiJ.mpuCycleCount += 17; 8793: int sp = XEiJ.regRn[15]; 8794: int newSR = mmuReadWordZeroData (m60Address = sp, 1); //popwz 8795: int newPC = mmuReadLongData (m60Address = sp + 2, 1); //popls 8796: int format = mmuReadWordZeroData (m60Address = sp + 6, 1) >> 12; 8797: if (format == 0) { //010,020,030,040,060 8798: m60Incremented += 8L << (7 << 3); 8799: XEiJ.regRn[15] = sp + 8; 8800: } else if (format == 2 || //020,030,040,060 8801: format == 3) { //040,060 8802: m60Incremented += 12L << (7 << 3); 8803: XEiJ.regRn[15] = sp + 12; 8804: } else if (format == 4) { //060 8805: m60Incremented += 16L << (7 << 3); 8806: XEiJ.regRn[15] = sp + 16; 8807: } else { 8808: M68kException.m6eNumber = M68kException.M6E_FORMAT_ERROR; 8809: throw M68kException.m6eSignal; 8810: } 8811: //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと 8812: irpSetSR (newSR); //ここでユーザモードに戻る場合がある。特権違反チェックが先 8813: irpSetPC (newPC); //分岐ログが新しいsrを使う。順序に注意。ここでアドレスエラーが発生する場合がある 8814: } //irpRte 8815: 8816: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8817: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8818: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8819: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8820: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 8821: public static void irpRtd () throws M68kException { 8822: XEiJ.mpuCycleCount += 7; 8823: int sp = XEiJ.regRn[15]; 8824: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 8825: int pc = mmuReadLongData (m60Address = sp, XEiJ.regSRS); //popls 8826: m60Incremented += 4L << (7 << 3); 8827: XEiJ.regRn[15] = sp + 4 + o; 8828: irpSetPC (pc); 8829: } //irpRtd 8830: 8831: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8832: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8833: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8834: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8835: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 8836: public static void irpRts () throws M68kException { 8837: XEiJ.mpuCycleCount += 7; 8838: int sp = XEiJ.regRn[15]; 8839: int pc = mmuReadLongData (m60Address = sp, XEiJ.regSRS); //popls 8840: m60Incremented += 4L << (7 << 3); 8841: XEiJ.regRn[15] = sp + 4; 8842: irpSetPC (pc); 8843: } //irpRts 8844: 8845: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8846: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8847: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8848: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8849: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 8850: public static void irpTrapv () throws M68kException { 8851: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 >= 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) == 0) { //通過 8852: XEiJ.mpuCycleCount++; 8853: } else { 8854: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 8855: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 8856: throw M68kException.m6eSignal; 8857: } 8858: } //irpTrapv 8859: 8860: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8861: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8862: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8863: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8864: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 8865: public static void irpRtr () throws M68kException { 8866: XEiJ.mpuCycleCount += 8; 8867: int sp = XEiJ.regRn[15]; 8868: int w = mmuReadWordZeroData (m60Address = sp, XEiJ.regSRS); //popwz 8869: int pc = mmuReadLongData (m60Address = sp + 2, XEiJ.regSRS); //popls 8870: XEiJ.regCCR = XEiJ.REG_CCR_MASK & w; 8871: m60Incremented += 6L << (7 << 3); 8872: XEiJ.regRn[15] = sp + 6; 8873: irpSetPC (pc); 8874: } //irpRtr 8875: 8876: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8877: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8878: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8879: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8880: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 8881: public static void irpMovecFromControl () throws M68kException { 8882: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8883: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8884: throw M68kException.m6eSignal; 8885: } 8886: //以下はスーパーバイザモード 8887: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1); //pcwz。拡張ワード 8888: switch (w & 0x0fff) { 8889: case 0x000: //SFC 8890: XEiJ.mpuCycleCount += 12; 8891: XEiJ.regRn[w >> 12] = XEiJ.mpuSFC; 8892: break; 8893: case 0x001: //DFC 8894: XEiJ.mpuCycleCount += 12; 8895: XEiJ.regRn[w >> 12] = XEiJ.mpuDFC; 8896: break; 8897: case 0x002: //CACR 8898: XEiJ.mpuCycleCount += 15; 8899: XEiJ.regRn[w >> 12] = XEiJ.mpuCACR & 0xf880e000; //CABCとCUBCのリードは常に0 8900: break; 8901: case 0x003: //TCR 8902: XEiJ.mpuCycleCount += 15; 8903: XEiJ.regRn[w >> 12] = mmuGetTCR (); 8904: break; 8905: case 0x004: //ITT0 8906: XEiJ.mpuCycleCount += 15; 8907: XEiJ.regRn[w >> 12] = mmuGetITT0 (); 8908: break; 8909: case 0x005: //ITT1 8910: XEiJ.mpuCycleCount += 15; 8911: XEiJ.regRn[w >> 12] = mmuGetITT1 (); 8912: break; 8913: case 0x006: //DTT0 8914: XEiJ.mpuCycleCount += 15; 8915: XEiJ.regRn[w >> 12] = mmuGetDTT0 (); 8916: break; 8917: case 0x007: //DTT1 8918: XEiJ.mpuCycleCount += 15; 8919: XEiJ.regRn[w >> 12] = mmuGetDTT1 (); 8920: break; 8921: case 0x008: //BUSCR 8922: XEiJ.mpuCycleCount += 15; 8923: XEiJ.regRn[w >> 12] = XEiJ.mpuBUSCR; 8924: break; 8925: case 0x800: //USP 8926: XEiJ.mpuCycleCount += 12; 8927: XEiJ.regRn[w >> 12] = XEiJ.mpuUSP; 8928: break; 8929: case 0x801: //VBR 8930: XEiJ.mpuCycleCount += 12; 8931: XEiJ.regRn[w >> 12] = XEiJ.mpuVBR; 8932: break; 8933: case 0x806: //URP 8934: XEiJ.mpuCycleCount += 15; 8935: XEiJ.regRn[w >> 12] = mmuGetURP ();; 8936: break; 8937: case 0x807: //SRP 8938: XEiJ.mpuCycleCount += 15; 8939: XEiJ.regRn[w >> 12] = mmuGetSRP ();; 8940: break; 8941: case 0x808: //PCR 8942: XEiJ.mpuCycleCount += 12; 8943: XEiJ.regRn[w >> 12] = XEiJ.mpuPCR; 8944: break; 8945: default: 8946: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8947: throw M68kException.m6eSignal; 8948: } 8949: } //irpMovecFromControl 8950: 8951: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8952: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8953: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8954: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8955: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 8956: public static void irpMovecToControl () throws M68kException { 8957: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8958: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8959: throw M68kException.m6eSignal; 8960: } 8961: //以下はスーパーバイザモード 8962: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, 1); //pcwz。拡張ワード 8963: int d = XEiJ.regRn[w >> 12]; 8964: switch (w & 0x0fff) { 8965: case 0x000: //SFC 8966: XEiJ.mpuCycleCount += 11; 8967: XEiJ.mpuSFC = d & 0x00000007; 8968: break; 8969: case 0x001: //DFC 8970: XEiJ.mpuCycleCount += 11; 8971: XEiJ.mpuDFC = d & 0x00000007; 8972: break; 8973: case 0x002: //CACR 8974: // CACR 8975: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 8976: // EDC NAD ESB DPI FOC 0 0 0 EBC CABC CUBC 0 0 0 0 0 EIC NAI FIC 0 0 0 0 0 0 0 0 0 0 0 0 0 8977: // bit31 EDC Enable Data Cache 8978: // データキャッシュ有効 8979: // 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB 8980: // bit30 NAD No Allocate Mode (Data Cache) 8981: // データキャッシュでミスしても新しいキャッシュラインをアロケートしない 8982: // bit29 ESB Enable Store Buffer 8983: // ストアバッファ有効 8984: // ライトスルーおよびキャッシュ禁止インプリサイスのページの書き込みを4エントリ(16バイト)のFIFOバッファで遅延させる 8985: // 例えば4の倍数のアドレスから始まる4バイトに連続して書き込むと1回のロングの書き込みにまとめられる 8986: // bit28 DPI Disable CPUSH Invalidation 8987: // CPUSHでプッシュされたキャッシュラインを無効化しない 8988: // bit27 FOC 1/2 Cache Operation Mode Enable (Data Cache) 8989: // データキャッシュを1/2キャッシュモードにする 8990: // bit23 EBC Enable Branch Cache 8991: // 分岐キャッシュ有効 8992: // 256エントリの分岐キャッシュを用いて分岐予測を行う 8993: // 正しく予測された分岐は前後の命令に隠れて実質0サイクルで実行される 8994: // MC68060は最大3個の命令(1個の分岐命令と2個の整数命令)を1サイクルで実行できる 8995: // MC68000(10MHz)とMC68060(50MHz)の処理速度の比は局所的に100倍を超えることがある 8996: // bit22 CABC Clear All Entries in the Branch Cache 8997: // 分岐キャッシュのすべてのエントリをクリアする 8998: // 分岐命令以外の場所で分岐キャッシュがヒットしてしまったときに発生する分岐予測エラーから復帰するときに使う 8999: // CABCはライトオンリーでリードは常に0 9000: // bit21 CUBC Clear All User Entries in the Branch Cache 9001: // 分岐キャッシュのすべてのユーザエントリをクリアする 9002: // CUBCはライトオンリーでリードは常に0 9003: // bit15 EIC Enable Instruction Cache 9004: // 命令キャッシュ有効 9005: // 4ウェイセットアソシアティブ。16バイト/ライン*128ライン/セット*4セット=8KB 9006: // bit14 NAI No Allocate Mode (Instruction Cache) 9007: // 命令キャッシュでミスしても新しいキャッシュラインをアロケートしない 9008: // bit13 FIC 1/2 Cache Operation Mode Enable (Instruction Cache) 9009: // 命令キャッシュを1/2キャッシュモードにする 9010: //! 非対応 9011: XEiJ.mpuCycleCount += 14; 9012: XEiJ.mpuCACR = d & 0xf8e0e000; //CABCとCUBCは保存しておいてリードするときにマスクする 9013: { 9014: boolean cacheOn = (XEiJ.mpuCACR & 0x80008000) != 0; 9015: if (XEiJ.mpuCacheOn != cacheOn) { 9016: XEiJ.mpuCacheOn = cacheOn; 9017: XEiJ.mpuSetWait (); 9018: } 9019: } 9020: break; 9021: case 0x003: //TCR 9022: // TCR 9023: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 9024: // 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E P NAD NAI FOTC FITC DCO DUO DWO DCI DUI 0 9025: // bit15 E Enable 9026: // bit14 P Page Size 9027: // bit13 NAD No Allocate Mode (Data ATC) 9028: // bit12 NAI No Allocate Mode (Instruction ATC) 9029: // bit11 FOTC 1/2-Cache Mode (Data ATC) 9030: // bit10 FITC 1/2-Cache Mode (Instruction ATC) 9031: // bit9-8 DCO Default Cache Mode (Data Cache) 9032: // bit7-6 DUO Default UPA bits (Data Cache) 9033: // bit5 DWO Default Write Protect (Data Cache) 9034: // bit4-3 DCI Default Cache Mode (Instruction Cache) 9035: // bit2-1 DUI Default UPA bits (Instruction Cache) 9036: //MMUを参照 9037: XEiJ.mpuCycleCount += 14; 9038: mmuSetTCR (d); 9039: break; 9040: case 0x004: //ITT0 9041: XEiJ.mpuCycleCount += 14; 9042: mmuSetITT0 (d); 9043: break; 9044: case 0x005: //ITT1 9045: XEiJ.mpuCycleCount += 14; 9046: mmuSetITT1 (d); 9047: break; 9048: case 0x006: //DTT0 9049: XEiJ.mpuCycleCount += 14; 9050: mmuSetDTT0 (d); 9051: break; 9052: case 0x007: //DTT1 9053: XEiJ.mpuCycleCount += 14; 9054: mmuSetDTT1 (d); 9055: break; 9056: case 0x008: //BUSCR 9057: XEiJ.mpuCycleCount += 14; 9058: XEiJ.mpuBUSCR = d & 0xf0000000; 9059: break; 9060: case 0x800: //USP 9061: XEiJ.mpuCycleCount += 11; 9062: XEiJ.mpuUSP = d; 9063: break; 9064: case 0x801: //VBR 9065: XEiJ.mpuCycleCount += 11; 9066: XEiJ.mpuVBR = d & -4; //4の倍数でないと困る 9067: break; 9068: case 0x806: //URP 9069: XEiJ.mpuCycleCount += 14; 9070: mmuSetURP (d); 9071: break; 9072: case 0x807: //SRP 9073: XEiJ.mpuCycleCount += 14; 9074: mmuSetSRP (d); 9075: break; 9076: case 0x808: //PCR 9077: // PCR 9078: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 9079: // 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 0 Revision Number EDEBUG Reserved DFP ESS 9080: // bit31-16 Identification 0x0430 9081: // bit15-8 Revision Number 1=F43G,5=G65V,6=E41J。偽物もあるらしい 9082: // bit7 EDEBUG Enable Debug Features 9083: // bit6-2 Reserved 9084: // bit1 DFP Disable Floating-Point Unit。浮動小数点ユニット無効 9085: // bit0 ESS Enable Superscalar Dispatch。スーパースカラ有効 9086: XEiJ.mpuCycleCount += 11; 9087: XEiJ.mpuPCR = 0x04300000 | XEiJ.MPU_060_REV << 8 | d & 0x00000083; 9088: break; 9089: default: 9090: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 9091: throw M68kException.m6eSignal; 9092: } 9093: } //irpMovecToControl 9094: 9095: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9096: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9097: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9098: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9099: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 9100: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 9101: public static void irpJsr () throws M68kException { 9102: XEiJ.mpuCycleCount++; 9103: //評価順序に注意。実効アドレスを求めてからspをデクリメントすること 9104: int a = efaJmpJsr (XEiJ.regOC & 63); 9105: m60Incremented -= 4L << (7 << 3); 9106: int sp = m60Address = XEiJ.regRn[15] -= 4; 9107: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 9108: irpSetPC (a); 9109: } //irpJsr 9110: 9111: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9112: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9113: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9114: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9115: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 9116: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 9117: public static void irpJmp () throws M68kException { 9118: XEiJ.mpuCycleCount++; //0clkにしない 9119: irpSetPC (efaJmpJsr (XEiJ.regOC & 63)); 9120: } //irpJmp 9121: 9122: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9123: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9124: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9125: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9126: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 9127: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 9128: public static void irpAddqByte () throws M68kException { 9129: int ea = XEiJ.regOC & 63; 9130: int x; 9131: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9132: int z; 9133: if (ea < XEiJ.EA_AR) { //ADDQ.B #<data>,Dr 9134: XEiJ.mpuCycleCount++; 9135: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 9136: } else { //ADDQ.B #<data>,<mem> 9137: XEiJ.mpuCycleCount++; 9138: int a = efaMltByte (ea); 9139: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 9140: } 9141: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9142: (~x & z) >>> 31 << 1 | 9143: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9144: } //irpAddqByte 9145: 9146: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9147: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9148: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9149: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9150: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 9151: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 9152: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 9153: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 9154: // 9155: //ADDQ.W #<data>,Ar 9156: // ソースを符号拡張してロングで加算する 9157: public static void irpAddqWord () throws M68kException { 9158: int ea = XEiJ.regOC & 63; 9159: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9160: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.W #<data>,Ar 9161: XEiJ.mpuCycleCount++; 9162: XEiJ.regRn[ea] += y; //ロングで計算する。このr[ea]はアドレスレジスタ 9163: //ccrは操作しない 9164: } else { 9165: int x; 9166: int z; 9167: if (ea < XEiJ.EA_AR) { //ADDQ.W #<data>,Dr 9168: XEiJ.mpuCycleCount++; 9169: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 9170: } else { //ADDQ.W #<data>,<mem> 9171: XEiJ.mpuCycleCount++; 9172: int a = efaMltWord (ea); 9173: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) + y), XEiJ.regSRS); 9174: } 9175: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9176: (~x & z) >>> 31 << 1 | 9177: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9178: } 9179: } //irpAddqWord 9180: 9181: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9182: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9183: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9184: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9185: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 9186: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 9187: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 9188: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 9189: public static void irpAddqLong () throws M68kException { 9190: int ea = XEiJ.regOC & 63; 9191: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9192: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.L #<data>,Ar 9193: XEiJ.mpuCycleCount++; 9194: XEiJ.regRn[ea] += y; //このr[ea]はアドレスレジスタ 9195: //ccrは操作しない 9196: } else { 9197: int x; 9198: int z; 9199: if (ea < XEiJ.EA_AR) { //ADDQ.L #<data>,Dr 9200: XEiJ.mpuCycleCount++; 9201: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 9202: } else { //ADDQ.L #<data>,<mem> 9203: XEiJ.mpuCycleCount++; 9204: int a = efaMltLong (ea); 9205: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y, XEiJ.regSRS); 9206: } 9207: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9208: (~x & z) >>> 31 << 1 | 9209: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9210: } 9211: } //irpAddqLong 9212: 9213: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9214: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9215: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9216: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9217: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 9218: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 9219: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 9220: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 9221: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 9222: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9223: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9224: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9225: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 9226: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9227: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9228: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9229: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 9230: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9231: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9232: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9233: public static void irpSt () throws M68kException { 9234: int ea = XEiJ.regOC & 63; 9235: //DBT.W Dr,<label>よりもST.B Drを優先する 9236: if (ea < XEiJ.EA_AR) { //ST.B Dr 9237: XEiJ.mpuCycleCount++; 9238: XEiJ.regRn[ea] |= 0xff; 9239: } else if (ea < XEiJ.EA_MM) { //DBT.W Dr,<label> 9240: int t = XEiJ.regPC; //pc0+2 9241: XEiJ.regPC = t + 2; //pc0+4 9242: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9243: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9244: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9245: irpBccAddressError (t); 9246: } 9247: //条件が成立しているので通過 9248: XEiJ.mpuCycleCount += 2; 9249: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPT.W/TRAPT.L/TRAPT 9250: if (ea == 072) { //.W 9251: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9252: } else if (ea == 073) { //.L 9253: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9254: } 9255: //条件が成立しているのでTRAPする 9256: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9257: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9258: throw M68kException.m6eSignal; 9259: } else { //ST.B <mem> 9260: XEiJ.mpuCycleCount++; 9261: mmuWriteByteData (efaMltByte (ea), 0xff, XEiJ.regSRS); 9262: } 9263: } //irpSt 9264: 9265: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9266: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9267: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9268: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9269: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 9270: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 9271: public static void irpSubqByte () throws M68kException { 9272: int ea = XEiJ.regOC & 63; 9273: int x; 9274: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9275: int z; 9276: if (ea < XEiJ.EA_AR) { //SUBQ.B #<data>,Dr 9277: XEiJ.mpuCycleCount++; 9278: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 9279: } else { //SUBQ.B #<data>,<mem> 9280: XEiJ.mpuCycleCount++; 9281: int a = efaMltByte (ea); 9282: mmuWriteByteData (a, z = (byte) ((x = mmuModifyByteSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 9283: } 9284: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9285: (x & ~z) >>> 31 << 1 | 9286: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9287: } //irpSubqByte 9288: 9289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9290: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9291: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9292: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9293: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 9294: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 9295: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 9296: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 9297: // 9298: //SUBQ.W #<data>,Ar 9299: // ソースを符号拡張してロングで減算する 9300: public static void irpSubqWord () throws M68kException { 9301: int ea = XEiJ.regOC & 63; 9302: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9303: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.W #<data>,Ar 9304: XEiJ.mpuCycleCount++; 9305: XEiJ.regRn[ea] -= y; //ロングで計算する。このr[ea]はアドレスレジスタ 9306: //ccrは操作しない 9307: } else { 9308: int x; 9309: int z; 9310: if (ea < XEiJ.EA_AR) { //SUBQ.W #<data>,Dr 9311: XEiJ.mpuCycleCount++; 9312: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 9313: } else { //SUBQ.W #<data>,<mem> 9314: XEiJ.mpuCycleCount++; 9315: int a = efaMltWord (ea); 9316: mmuWriteWordData (a, z = (short) ((x = mmuModifyWordSignData (a, XEiJ.regSRS)) - y), XEiJ.regSRS); 9317: } 9318: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9319: (x & ~z) >>> 31 << 1 | 9320: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9321: } 9322: } //irpSubqWord 9323: 9324: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9325: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9326: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9327: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9328: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 9329: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 9330: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 9331: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 9332: public static void irpSubqLong () throws M68kException { 9333: int ea = XEiJ.regOC & 63; 9334: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9335: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.L #<data>,Ar 9336: XEiJ.mpuCycleCount++; 9337: XEiJ.regRn[ea] -= y; //このr[ea]はアドレスレジスタ 9338: //ccrは操作しない 9339: } else { 9340: int x; 9341: int z; 9342: if (ea < XEiJ.EA_AR) { //SUBQ.L #<data>,Dr 9343: XEiJ.mpuCycleCount++; 9344: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 9345: } else { //SUBQ.L #<data>,<mem> 9346: XEiJ.mpuCycleCount++; 9347: int a = efaMltLong (ea); 9348: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y, XEiJ.regSRS); 9349: } 9350: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9351: (x & ~z) >>> 31 << 1 | 9352: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9353: } 9354: } //irpSubqLong 9355: 9356: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9357: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9358: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9359: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9360: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 9361: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 9362: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 9363: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9364: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9365: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 9366: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9367: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9368: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9369: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 9370: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9371: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9372: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9373: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 9374: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9375: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9376: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9377: public static void irpSf () throws M68kException { 9378: int ea = XEiJ.regOC & 63; 9379: //DBRA.W Dr,<label>よりもSF.B Drを優先する 9380: if (ea < XEiJ.EA_AR) { //SF.B Dr 9381: XEiJ.mpuCycleCount++; 9382: XEiJ.regRn[ea] &= ~0xff; 9383: } else if (ea < XEiJ.EA_MM) { //DBRA.W Dr,<label> 9384: int t = XEiJ.regPC; //pc0+2 9385: XEiJ.regPC = t + 2; //pc0+4 9386: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9387: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9388: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9389: irpBccAddressError (t); 9390: } 9391: //条件が成立していないのでデクリメント 9392: int rrr = XEiJ.regOC & 7; 9393: int s = XEiJ.regRn[rrr]; 9394: if ((short) s == 0) { //Drの下位16bitが0なので通過 9395: XEiJ.mpuCycleCount += 2; 9396: XEiJ.regRn[rrr] = s + 65535; 9397: } else { //Drの下位16bitが0でないので分岐 9398: XEiJ.mpuCycleCount++; 9399: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9400: irpSetPC (t); 9401: } 9402: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPF.W/TRAPF.L/TRAPF 9403: if (ea == 072) { //.W 9404: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9405: } else if (ea == 073) { //.L 9406: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9407: } 9408: //条件が成立していないのでTRAPしない 9409: XEiJ.mpuCycleCount++; 9410: } else { //SF.B <mem> 9411: XEiJ.mpuCycleCount++; 9412: mmuWriteByteData (efaMltByte (ea), 0x00, XEiJ.regSRS); 9413: } 9414: } //irpSf 9415: 9416: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9417: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9418: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9419: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9420: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 9421: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 9422: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 9423: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 9424: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 9425: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9426: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9427: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9428: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 9429: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9430: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9431: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9432: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 9433: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9434: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9435: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9436: public static void irpShi () throws M68kException { 9437: int ea = XEiJ.regOC & 63; 9438: if (ea >> 3 == XEiJ.MMM_AR) { //DBHI.W Dr,<label> 9439: int t = XEiJ.regPC; //pc0+2 9440: XEiJ.regPC = t + 2; //pc0+4 9441: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9442: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9443: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9444: irpBccAddressError (t); 9445: } 9446: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //条件が成立しているので通過 9447: XEiJ.mpuCycleCount += 2; 9448: } else { //条件が成立していないのでデクリメント 9449: int rrr = XEiJ.regOC & 7; 9450: int s = XEiJ.regRn[rrr]; 9451: if ((short) s == 0) { //Drの下位16bitが0なので通過 9452: XEiJ.mpuCycleCount += 2; 9453: XEiJ.regRn[rrr] = s + 65535; 9454: } else { //Drの下位16bitが0でないので分岐 9455: XEiJ.mpuCycleCount++; 9456: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9457: irpSetPC (t); 9458: } 9459: } 9460: } else if (ea < XEiJ.EA_AR) { //SHI.B Dr 9461: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //セット 9462: XEiJ.mpuCycleCount++; 9463: XEiJ.regRn[ea] |= 0xff; 9464: } else { //クリア 9465: XEiJ.mpuCycleCount++; 9466: XEiJ.regRn[ea] &= ~0xff; 9467: } 9468: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHI.W/TRAPHI.L/TRAPHI 9469: if (ea == 072) { //.W 9470: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9471: } else if (ea == 073) { //.L 9472: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9473: } 9474: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { 9475: //条件が成立しているのでTRAPする 9476: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9477: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9478: throw M68kException.m6eSignal; 9479: } else { 9480: //条件が成立していないのでTRAPしない 9481: XEiJ.mpuCycleCount++; 9482: } 9483: } else { //SHI.B <mem> 9484: XEiJ.mpuCycleCount++; 9485: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HI << XEiJ.regCCR >> 31, XEiJ.regSRS); 9486: } 9487: } //irpShi 9488: 9489: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9490: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9491: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9492: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9493: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 9494: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 9495: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 9496: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 9497: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 9498: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9499: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9500: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9501: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 9502: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9503: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9504: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9505: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 9506: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9507: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9508: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9509: public static void irpSls () throws M68kException { 9510: int ea = XEiJ.regOC & 63; 9511: if (ea >> 3 == XEiJ.MMM_AR) { //DBLS.W Dr,<label> 9512: int t = XEiJ.regPC; //pc0+2 9513: XEiJ.regPC = t + 2; //pc0+4 9514: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9515: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9516: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9517: irpBccAddressError (t); 9518: } 9519: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //条件が成立しているので通過 9520: XEiJ.mpuCycleCount += 2; 9521: } else { //条件が成立していないのでデクリメント 9522: int rrr = XEiJ.regOC & 7; 9523: int s = XEiJ.regRn[rrr]; 9524: if ((short) s == 0) { //Drの下位16bitが0なので通過 9525: XEiJ.mpuCycleCount += 2; 9526: XEiJ.regRn[rrr] = s + 65535; 9527: } else { //Drの下位16bitが0でないので分岐 9528: XEiJ.mpuCycleCount++; 9529: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9530: irpSetPC (t); 9531: } 9532: } 9533: } else if (ea < XEiJ.EA_AR) { //SLS.B Dr 9534: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //セット 9535: XEiJ.mpuCycleCount++; 9536: XEiJ.regRn[ea] |= 0xff; 9537: } else { //クリア 9538: XEiJ.mpuCycleCount++; 9539: XEiJ.regRn[ea] &= ~0xff; 9540: } 9541: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLS.W/TRAPLS.L/TRAPLS 9542: if (ea == 072) { //.W 9543: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9544: } else if (ea == 073) { //.L 9545: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9546: } 9547: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { 9548: //条件が成立しているのでTRAPする 9549: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9550: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9551: throw M68kException.m6eSignal; 9552: } else { 9553: //条件が成立していないのでTRAPしない 9554: XEiJ.mpuCycleCount++; 9555: } 9556: } else { //SLS.B <mem> 9557: XEiJ.mpuCycleCount++; 9558: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LS << XEiJ.regCCR >> 31, XEiJ.regSRS); 9559: } 9560: } //irpSls 9561: 9562: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9563: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9564: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9565: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9566: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 9567: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9568: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9569: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9570: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 9571: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9572: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9573: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9574: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 9575: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9576: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9577: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9578: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9579: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9580: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9581: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9582: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 9583: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9584: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9585: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9586: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9587: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9588: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9589: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9590: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 9591: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9592: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9593: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9594: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9595: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9596: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9597: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9598: public static void irpShs () throws M68kException { 9599: int ea = XEiJ.regOC & 63; 9600: if (ea >> 3 == XEiJ.MMM_AR) { //DBHS.W Dr,<label> 9601: int t = XEiJ.regPC; //pc0+2 9602: XEiJ.regPC = t + 2; //pc0+4 9603: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9604: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9605: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9606: irpBccAddressError (t); 9607: } 9608: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //条件が成立しているので通過 9609: XEiJ.mpuCycleCount += 2; 9610: } else { //条件が成立していないのでデクリメント 9611: int rrr = XEiJ.regOC & 7; 9612: int s = XEiJ.regRn[rrr]; 9613: if ((short) s == 0) { //Drの下位16bitが0なので通過 9614: XEiJ.mpuCycleCount += 2; 9615: XEiJ.regRn[rrr] = s + 65535; 9616: } else { //Drの下位16bitが0でないので分岐 9617: XEiJ.mpuCycleCount++; 9618: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9619: irpSetPC (t); 9620: } 9621: } 9622: } else if (ea < XEiJ.EA_AR) { //SHS.B Dr 9623: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //セット 9624: XEiJ.mpuCycleCount++; 9625: XEiJ.regRn[ea] |= 0xff; 9626: } else { //クリア 9627: XEiJ.mpuCycleCount++; 9628: XEiJ.regRn[ea] &= ~0xff; 9629: } 9630: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHS.W/TRAPHS.L/TRAPHS 9631: if (ea == 072) { //.W 9632: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9633: } else if (ea == 073) { //.L 9634: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9635: } 9636: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { 9637: //条件が成立しているのでTRAPする 9638: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9639: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9640: throw M68kException.m6eSignal; 9641: } else { 9642: //条件が成立していないのでTRAPしない 9643: XEiJ.mpuCycleCount++; 9644: } 9645: } else { //SHS.B <mem> 9646: XEiJ.mpuCycleCount++; 9647: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_HS << XEiJ.regCCR >> 31, XEiJ.regSRS); 9648: } 9649: } //irpShs 9650: 9651: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9652: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9653: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9654: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9655: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 9656: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9657: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9658: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9659: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 9660: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9661: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9662: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9663: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 9664: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9665: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9666: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9667: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9668: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9669: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9670: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9671: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 9672: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9673: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9674: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9675: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9676: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9677: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9678: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9679: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 9680: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9681: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9682: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9683: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9684: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9685: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9686: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9687: public static void irpSlo () throws M68kException { 9688: int ea = XEiJ.regOC & 63; 9689: if (ea >> 3 == XEiJ.MMM_AR) { //DBLO.W Dr,<label> 9690: int t = XEiJ.regPC; //pc0+2 9691: XEiJ.regPC = t + 2; //pc0+4 9692: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9693: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9694: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9695: irpBccAddressError (t); 9696: } 9697: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //条件が成立しているので通過 9698: XEiJ.mpuCycleCount += 2; 9699: } else { //条件が成立していないのでデクリメント 9700: int rrr = XEiJ.regOC & 7; 9701: int s = XEiJ.regRn[rrr]; 9702: if ((short) s == 0) { //Drの下位16bitが0なので通過 9703: XEiJ.mpuCycleCount += 2; 9704: XEiJ.regRn[rrr] = s + 65535; 9705: } else { //Drの下位16bitが0でないので分岐 9706: XEiJ.mpuCycleCount++; 9707: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9708: irpSetPC (t); 9709: } 9710: } 9711: } else if (ea < XEiJ.EA_AR) { //SLO.B Dr 9712: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //セット 9713: XEiJ.mpuCycleCount++; 9714: XEiJ.regRn[ea] |= 0xff; 9715: } else { //クリア 9716: XEiJ.mpuCycleCount++; 9717: XEiJ.regRn[ea] &= ~0xff; 9718: } 9719: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLO.W/TRAPLO.L/TRAPLO 9720: if (ea == 072) { //.W 9721: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9722: } else if (ea == 073) { //.L 9723: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9724: } 9725: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { 9726: //条件が成立しているのでTRAPする 9727: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9728: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9729: throw M68kException.m6eSignal; 9730: } else { 9731: //条件が成立していないのでTRAPしない 9732: XEiJ.mpuCycleCount++; 9733: } 9734: } else { //SLO.B <mem> 9735: XEiJ.mpuCycleCount++; 9736: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LO << XEiJ.regCCR >> 31, XEiJ.regSRS); 9737: } 9738: } //irpSlo 9739: 9740: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9741: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9742: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9743: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9744: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 9745: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9746: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9747: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9748: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 9749: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9750: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9751: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9752: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 9753: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9754: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9755: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9756: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9757: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9758: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9759: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9760: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 9761: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9762: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9763: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9764: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9765: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9766: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9767: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9768: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 9769: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9770: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9771: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9772: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9773: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9774: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9775: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9776: public static void irpSne () throws M68kException { 9777: int ea = XEiJ.regOC & 63; 9778: if (ea >> 3 == XEiJ.MMM_AR) { //DBNE.W Dr,<label> 9779: int t = XEiJ.regPC; //pc0+2 9780: XEiJ.regPC = t + 2; //pc0+4 9781: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9782: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9783: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9784: irpBccAddressError (t); 9785: } 9786: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //条件が成立しているので通過 9787: XEiJ.mpuCycleCount += 2; 9788: } else { //条件が成立していないのでデクリメント 9789: int rrr = XEiJ.regOC & 7; 9790: int s = XEiJ.regRn[rrr]; 9791: if ((short) s == 0) { //Drの下位16bitが0なので通過 9792: XEiJ.mpuCycleCount += 2; 9793: XEiJ.regRn[rrr] = s + 65535; 9794: } else { //Drの下位16bitが0でないので分岐 9795: XEiJ.mpuCycleCount++; 9796: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9797: irpSetPC (t); 9798: } 9799: } 9800: } else if (ea < XEiJ.EA_AR) { //SNE.B Dr 9801: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //セット 9802: XEiJ.mpuCycleCount++; 9803: XEiJ.regRn[ea] |= 0xff; 9804: } else { //クリア 9805: XEiJ.mpuCycleCount++; 9806: XEiJ.regRn[ea] &= ~0xff; 9807: } 9808: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPNE.W/TRAPNE.L/TRAPNE 9809: if (ea == 072) { //.W 9810: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9811: } else if (ea == 073) { //.L 9812: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9813: } 9814: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { 9815: //条件が成立しているのでTRAPする 9816: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9817: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9818: throw M68kException.m6eSignal; 9819: } else { 9820: //条件が成立していないのでTRAPしない 9821: XEiJ.mpuCycleCount++; 9822: } 9823: } else { //SNE.B <mem> 9824: XEiJ.mpuCycleCount++; 9825: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_NE << XEiJ.regCCR >> 31, XEiJ.regSRS); 9826: } 9827: } //irpSne 9828: 9829: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9830: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9831: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9832: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9833: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 9834: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9835: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9836: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9837: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 9838: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9839: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9840: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9841: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 9842: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9843: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9844: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9845: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9846: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9847: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9848: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9849: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 9850: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9851: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9852: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9853: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9854: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9855: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9856: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9857: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 9858: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9859: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9860: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9861: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9862: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9863: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9864: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9865: public static void irpSeq () throws M68kException { 9866: int ea = XEiJ.regOC & 63; 9867: if (ea >> 3 == XEiJ.MMM_AR) { //DBEQ.W Dr,<label> 9868: int t = XEiJ.regPC; //pc0+2 9869: XEiJ.regPC = t + 2; //pc0+4 9870: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9871: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9872: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9873: irpBccAddressError (t); 9874: } 9875: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //条件が成立しているので通過 9876: XEiJ.mpuCycleCount += 2; 9877: } else { //条件が成立していないのでデクリメント 9878: int rrr = XEiJ.regOC & 7; 9879: int s = XEiJ.regRn[rrr]; 9880: if ((short) s == 0) { //Drの下位16bitが0なので通過 9881: XEiJ.mpuCycleCount += 2; 9882: XEiJ.regRn[rrr] = s + 65535; 9883: } else { //Drの下位16bitが0でないので分岐 9884: XEiJ.mpuCycleCount++; 9885: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9886: irpSetPC (t); 9887: } 9888: } 9889: } else if (ea < XEiJ.EA_AR) { //SEQ.B Dr 9890: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //セット 9891: XEiJ.mpuCycleCount++; 9892: XEiJ.regRn[ea] |= 0xff; 9893: } else { //クリア 9894: XEiJ.mpuCycleCount++; 9895: XEiJ.regRn[ea] &= ~0xff; 9896: } 9897: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPEQ.W/TRAPEQ.L/TRAPEQ 9898: if (ea == 072) { //.W 9899: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9900: } else if (ea == 073) { //.L 9901: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9902: } 9903: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { 9904: //条件が成立しているのでTRAPする 9905: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9906: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9907: throw M68kException.m6eSignal; 9908: } else { 9909: //条件が成立していないのでTRAPしない 9910: XEiJ.mpuCycleCount++; 9911: } 9912: } else { //SEQ.B <mem> 9913: XEiJ.mpuCycleCount++; 9914: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_EQ << XEiJ.regCCR >> 31, XEiJ.regSRS); 9915: } 9916: } //irpSeq 9917: 9918: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9919: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9920: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9922: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 9923: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 9924: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 9925: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 9926: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 9927: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 9928: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 9929: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 9930: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 9931: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 9932: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 9933: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 9934: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 9935: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 9936: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 9937: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 9938: public static void irpSvc () throws M68kException { 9939: int ea = XEiJ.regOC & 63; 9940: if (ea >> 3 == XEiJ.MMM_AR) { //DBVC.W Dr,<label> 9941: int t = XEiJ.regPC; //pc0+2 9942: XEiJ.regPC = t + 2; //pc0+4 9943: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 9944: if ((t & 1) != 0) { //分岐先のアドレスが奇数 9945: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 9946: irpBccAddressError (t); 9947: } 9948: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //条件が成立しているので通過 9949: XEiJ.mpuCycleCount += 2; 9950: } else { //条件が成立していないのでデクリメント 9951: int rrr = XEiJ.regOC & 7; 9952: int s = XEiJ.regRn[rrr]; 9953: if ((short) s == 0) { //Drの下位16bitが0なので通過 9954: XEiJ.mpuCycleCount += 2; 9955: XEiJ.regRn[rrr] = s + 65535; 9956: } else { //Drの下位16bitが0でないので分岐 9957: XEiJ.mpuCycleCount++; 9958: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 9959: irpSetPC (t); 9960: } 9961: } 9962: } else if (ea < XEiJ.EA_AR) { //SVC.B Dr 9963: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //セット 9964: XEiJ.mpuCycleCount++; 9965: XEiJ.regRn[ea] |= 0xff; 9966: } else { //クリア 9967: XEiJ.mpuCycleCount++; 9968: XEiJ.regRn[ea] &= ~0xff; 9969: } 9970: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVC.W/TRAPVC.L/TRAPVC 9971: if (ea == 072) { //.W 9972: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 9973: } else if (ea == 073) { //.L 9974: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 9975: } 9976: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { 9977: //条件が成立しているのでTRAPする 9978: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 9979: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9980: throw M68kException.m6eSignal; 9981: } else { 9982: //条件が成立していないのでTRAPしない 9983: XEiJ.mpuCycleCount++; 9984: } 9985: } else { //SVC.B <mem> 9986: XEiJ.mpuCycleCount++; 9987: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VC << XEiJ.regCCR >> 31, XEiJ.regSRS); 9988: } 9989: } //irpSvc 9990: 9991: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9992: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9993: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9994: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9995: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 9996: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 9997: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 9998: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 9999: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 10000: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10001: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10002: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10003: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 10004: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10005: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10006: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10007: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 10008: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10009: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10010: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10011: public static void irpSvs () throws M68kException { 10012: int ea = XEiJ.regOC & 63; 10013: if (ea >> 3 == XEiJ.MMM_AR) { //DBVS.W Dr,<label> 10014: int t = XEiJ.regPC; //pc0+2 10015: XEiJ.regPC = t + 2; //pc0+4 10016: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10017: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10018: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10019: irpBccAddressError (t); 10020: } 10021: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //条件が成立しているので通過 10022: XEiJ.mpuCycleCount += 2; 10023: } else { //条件が成立していないのでデクリメント 10024: int rrr = XEiJ.regOC & 7; 10025: int s = XEiJ.regRn[rrr]; 10026: if ((short) s == 0) { //Drの下位16bitが0なので通過 10027: XEiJ.mpuCycleCount += 2; 10028: XEiJ.regRn[rrr] = s + 65535; 10029: } else { //Drの下位16bitが0でないので分岐 10030: XEiJ.mpuCycleCount++; 10031: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10032: irpSetPC (t); 10033: } 10034: } 10035: } else if (ea < XEiJ.EA_AR) { //SVS.B Dr 10036: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //セット 10037: XEiJ.mpuCycleCount++; 10038: XEiJ.regRn[ea] |= 0xff; 10039: } else { //クリア 10040: XEiJ.mpuCycleCount++; 10041: XEiJ.regRn[ea] &= ~0xff; 10042: } 10043: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVS.W/TRAPVS.L/TRAPVS 10044: if (ea == 072) { //.W 10045: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10046: } else if (ea == 073) { //.L 10047: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10048: } 10049: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { 10050: //条件が成立しているのでTRAPする 10051: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10052: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10053: throw M68kException.m6eSignal; 10054: } else { 10055: //条件が成立していないのでTRAPしない 10056: XEiJ.mpuCycleCount++; 10057: } 10058: } else { //SVS.B <mem> 10059: XEiJ.mpuCycleCount++; 10060: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_VS << XEiJ.regCCR >> 31, XEiJ.regSRS); 10061: } 10062: } //irpSvs 10063: 10064: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10065: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10066: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10067: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10068: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 10069: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 10070: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 10071: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 10072: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 10073: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10074: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10075: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10076: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 10077: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10078: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10079: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10080: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 10081: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10082: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10083: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10084: public static void irpSpl () throws M68kException { 10085: int ea = XEiJ.regOC & 63; 10086: if (ea >> 3 == XEiJ.MMM_AR) { //DBPL.W Dr,<label> 10087: int t = XEiJ.regPC; //pc0+2 10088: XEiJ.regPC = t + 2; //pc0+4 10089: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10090: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10091: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10092: irpBccAddressError (t); 10093: } 10094: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //条件が成立しているので通過 10095: XEiJ.mpuCycleCount += 2; 10096: } else { //条件が成立していないのでデクリメント 10097: int rrr = XEiJ.regOC & 7; 10098: int s = XEiJ.regRn[rrr]; 10099: if ((short) s == 0) { //Drの下位16bitが0なので通過 10100: XEiJ.mpuCycleCount += 2; 10101: XEiJ.regRn[rrr] = s + 65535; 10102: } else { //Drの下位16bitが0でないので分岐 10103: XEiJ.mpuCycleCount++; 10104: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10105: irpSetPC (t); 10106: } 10107: } 10108: } else if (ea < XEiJ.EA_AR) { //SPL.B Dr 10109: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //セット 10110: XEiJ.mpuCycleCount++; 10111: XEiJ.regRn[ea] |= 0xff; 10112: } else { //クリア 10113: XEiJ.mpuCycleCount++; 10114: XEiJ.regRn[ea] &= ~0xff; 10115: } 10116: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPPL.W/TRAPPL.L/TRAPPL 10117: if (ea == 072) { //.W 10118: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10119: } else if (ea == 073) { //.L 10120: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10121: } 10122: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { 10123: //条件が成立しているのでTRAPする 10124: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10125: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10126: throw M68kException.m6eSignal; 10127: } else { 10128: //条件が成立していないのでTRAPしない 10129: XEiJ.mpuCycleCount++; 10130: } 10131: } else { //SPL.B <mem> 10132: XEiJ.mpuCycleCount++; 10133: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_PL << XEiJ.regCCR >> 31, XEiJ.regSRS); 10134: } 10135: } //irpSpl 10136: 10137: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10138: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10139: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10140: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10141: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 10142: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 10143: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 10144: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 10145: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 10146: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10147: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10148: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10149: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 10150: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10151: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10152: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10153: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 10154: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10155: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10156: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10157: public static void irpSmi () throws M68kException { 10158: int ea = XEiJ.regOC & 63; 10159: if (ea >> 3 == XEiJ.MMM_AR) { //DBMI.W Dr,<label> 10160: int t = XEiJ.regPC; //pc0+2 10161: XEiJ.regPC = t + 2; //pc0+4 10162: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10163: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10164: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10165: irpBccAddressError (t); 10166: } 10167: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //条件が成立しているので通過 10168: XEiJ.mpuCycleCount += 2; 10169: } else { //条件が成立していないのでデクリメント 10170: int rrr = XEiJ.regOC & 7; 10171: int s = XEiJ.regRn[rrr]; 10172: if ((short) s == 0) { //Drの下位16bitが0なので通過 10173: XEiJ.mpuCycleCount += 2; 10174: XEiJ.regRn[rrr] = s + 65535; 10175: } else { //Drの下位16bitが0でないので分岐 10176: XEiJ.mpuCycleCount++; 10177: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10178: irpSetPC (t); 10179: } 10180: } 10181: } else if (ea < XEiJ.EA_AR) { //SMI.B Dr 10182: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //セット 10183: XEiJ.mpuCycleCount++; 10184: XEiJ.regRn[ea] |= 0xff; 10185: } else { //クリア 10186: XEiJ.mpuCycleCount++; 10187: XEiJ.regRn[ea] &= ~0xff; 10188: } 10189: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPMI.W/TRAPMI.L/TRAPMI 10190: if (ea == 072) { //.W 10191: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10192: } else if (ea == 073) { //.L 10193: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10194: } 10195: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { 10196: //条件が成立しているのでTRAPする 10197: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10198: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10199: throw M68kException.m6eSignal; 10200: } else { 10201: //条件が成立していないのでTRAPしない 10202: XEiJ.mpuCycleCount++; 10203: } 10204: } else { //SMI.B <mem> 10205: XEiJ.mpuCycleCount++; 10206: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_MI << XEiJ.regCCR >> 31, XEiJ.regSRS); 10207: } 10208: } //irpSmi 10209: 10210: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10211: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10212: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10213: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10214: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 10215: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 10216: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 10217: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 10218: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 10219: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10220: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10221: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10222: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 10223: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10224: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10225: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10226: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 10227: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10228: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10229: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10230: public static void irpSge () throws M68kException { 10231: int ea = XEiJ.regOC & 63; 10232: if (ea >> 3 == XEiJ.MMM_AR) { //DBGE.W Dr,<label> 10233: int t = XEiJ.regPC; //pc0+2 10234: XEiJ.regPC = t + 2; //pc0+4 10235: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10236: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10237: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10238: irpBccAddressError (t); 10239: } 10240: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //条件が成立しているので通過 10241: XEiJ.mpuCycleCount += 2; 10242: } else { //条件が成立していないのでデクリメント 10243: int rrr = XEiJ.regOC & 7; 10244: int s = XEiJ.regRn[rrr]; 10245: if ((short) s == 0) { //Drの下位16bitが0なので通過 10246: XEiJ.mpuCycleCount += 2; 10247: XEiJ.regRn[rrr] = s + 65535; 10248: } else { //Drの下位16bitが0でないので分岐 10249: XEiJ.mpuCycleCount++; 10250: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10251: irpSetPC (t); 10252: } 10253: } 10254: } else if (ea < XEiJ.EA_AR) { //SGE.B Dr 10255: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //セット 10256: XEiJ.mpuCycleCount++; 10257: XEiJ.regRn[ea] |= 0xff; 10258: } else { //クリア 10259: XEiJ.mpuCycleCount++; 10260: XEiJ.regRn[ea] &= ~0xff; 10261: } 10262: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGE.W/TRAPGE.L/TRAPGE 10263: if (ea == 072) { //.W 10264: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10265: } else if (ea == 073) { //.L 10266: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10267: } 10268: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { 10269: //条件が成立しているのでTRAPする 10270: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10271: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10272: throw M68kException.m6eSignal; 10273: } else { 10274: //条件が成立していないのでTRAPしない 10275: XEiJ.mpuCycleCount++; 10276: } 10277: } else { //SGE.B <mem> 10278: XEiJ.mpuCycleCount++; 10279: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GE << XEiJ.regCCR >> 31, XEiJ.regSRS); 10280: } 10281: } //irpSge 10282: 10283: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10284: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10285: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10287: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 10288: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 10289: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 10290: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 10291: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 10292: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10293: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10294: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10295: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 10296: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10297: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10298: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10299: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 10300: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10301: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10302: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10303: public static void irpSlt () throws M68kException { 10304: int ea = XEiJ.regOC & 63; 10305: if (ea >> 3 == XEiJ.MMM_AR) { //DBLT.W Dr,<label> 10306: int t = XEiJ.regPC; //pc0+2 10307: XEiJ.regPC = t + 2; //pc0+4 10308: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10309: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10310: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10311: irpBccAddressError (t); 10312: } 10313: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //条件が成立しているので通過 10314: XEiJ.mpuCycleCount += 2; 10315: } else { //条件が成立していないのでデクリメント 10316: int rrr = XEiJ.regOC & 7; 10317: int s = XEiJ.regRn[rrr]; 10318: if ((short) s == 0) { //Drの下位16bitが0なので通過 10319: XEiJ.mpuCycleCount += 2; 10320: XEiJ.regRn[rrr] = s + 65535; 10321: } else { //Drの下位16bitが0でないので分岐 10322: XEiJ.mpuCycleCount++; 10323: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10324: irpSetPC (t); 10325: } 10326: } 10327: } else if (ea < XEiJ.EA_AR) { //SLT.B Dr 10328: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //セット 10329: XEiJ.mpuCycleCount++; 10330: XEiJ.regRn[ea] |= 0xff; 10331: } else { //クリア 10332: XEiJ.mpuCycleCount++; 10333: XEiJ.regRn[ea] &= ~0xff; 10334: } 10335: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLT.W/TRAPLT.L/TRAPLT 10336: if (ea == 072) { //.W 10337: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10338: } else if (ea == 073) { //.L 10339: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10340: } 10341: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { 10342: //条件が成立しているのでTRAPする 10343: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10344: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10345: throw M68kException.m6eSignal; 10346: } else { 10347: //条件が成立していないのでTRAPしない 10348: XEiJ.mpuCycleCount++; 10349: } 10350: } else { //SLT.B <mem> 10351: XEiJ.mpuCycleCount++; 10352: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LT << XEiJ.regCCR >> 31, XEiJ.regSRS); 10353: } 10354: } //irpSlt 10355: 10356: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10357: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10358: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10359: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10360: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 10361: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 10362: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 10363: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 10364: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 10365: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10366: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10367: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10368: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 10369: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10370: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10371: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10372: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 10373: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10374: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10375: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10376: public static void irpSgt () throws M68kException { 10377: int ea = XEiJ.regOC & 63; 10378: if (ea >> 3 == XEiJ.MMM_AR) { //DBGT.W Dr,<label> 10379: int t = XEiJ.regPC; //pc0+2 10380: XEiJ.regPC = t + 2; //pc0+4 10381: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10382: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10383: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10384: irpBccAddressError (t); 10385: } 10386: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //条件が成立しているので通過 10387: XEiJ.mpuCycleCount += 2; 10388: } else { //条件が成立していないのでデクリメント 10389: int rrr = XEiJ.regOC & 7; 10390: int s = XEiJ.regRn[rrr]; 10391: if ((short) s == 0) { //Drの下位16bitが0なので通過 10392: XEiJ.mpuCycleCount += 2; 10393: XEiJ.regRn[rrr] = s + 65535; 10394: } else { //Drの下位16bitが0でないので分岐 10395: XEiJ.mpuCycleCount++; 10396: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10397: irpSetPC (t); 10398: } 10399: } 10400: } else if (ea < XEiJ.EA_AR) { //SGT.B Dr 10401: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //セット 10402: XEiJ.mpuCycleCount++; 10403: XEiJ.regRn[ea] |= 0xff; 10404: } else { //クリア 10405: XEiJ.mpuCycleCount++; 10406: XEiJ.regRn[ea] &= ~0xff; 10407: } 10408: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGT.W/TRAPGT.L/TRAPGT 10409: if (ea == 072) { //.W 10410: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10411: } else if (ea == 073) { //.L 10412: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10413: } 10414: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { 10415: //条件が成立しているのでTRAPする 10416: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10417: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10418: throw M68kException.m6eSignal; 10419: } else { 10420: //条件が成立していないのでTRAPしない 10421: XEiJ.mpuCycleCount++; 10422: } 10423: } else { //SGT.B <mem> 10424: XEiJ.mpuCycleCount++; 10425: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_GT << XEiJ.regCCR >> 31, XEiJ.regSRS); 10426: } 10427: } //irpSgt 10428: 10429: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10430: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10431: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10432: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10433: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 10434: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 10435: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 10436: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 10437: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 10438: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10439: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10440: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10441: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 10442: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10443: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10444: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10445: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 10446: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10447: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10448: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10449: public static void irpSle () throws M68kException { 10450: int ea = XEiJ.regOC & 63; 10451: if (ea >> 3 == XEiJ.MMM_AR) { //DBLE.W Dr,<label> 10452: int t = XEiJ.regPC; //pc0+2 10453: XEiJ.regPC = t + 2; //pc0+4 10454: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 10455: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10456: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10457: irpBccAddressError (t); 10458: } 10459: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //条件が成立しているので通過 10460: XEiJ.mpuCycleCount += 2; 10461: } else { //条件が成立していないのでデクリメント 10462: int rrr = XEiJ.regOC & 7; 10463: int s = XEiJ.regRn[rrr]; 10464: if ((short) s == 0) { //Drの下位16bitが0なので通過 10465: XEiJ.mpuCycleCount += 2; 10466: XEiJ.regRn[rrr] = s + 65535; 10467: } else { //Drの下位16bitが0でないので分岐 10468: XEiJ.mpuCycleCount++; 10469: XEiJ.regRn[rrr] = s - 1; //下位16bitが0でないので上位16bitは変化しない 10470: irpSetPC (t); 10471: } 10472: } 10473: } else if (ea < XEiJ.EA_AR) { //SLE.B Dr 10474: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //セット 10475: XEiJ.mpuCycleCount++; 10476: XEiJ.regRn[ea] |= 0xff; 10477: } else { //クリア 10478: XEiJ.mpuCycleCount++; 10479: XEiJ.regRn[ea] &= ~0xff; 10480: } 10481: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLE.W/TRAPLE.L/TRAPLE 10482: if (ea == 072) { //.W 10483: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 10484: } else if (ea == 073) { //.L 10485: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 10486: } 10487: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { 10488: //条件が成立しているのでTRAPする 10489: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 10490: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10491: throw M68kException.m6eSignal; 10492: } else { 10493: //条件が成立していないのでTRAPしない 10494: XEiJ.mpuCycleCount++; 10495: } 10496: } else { //SLE.B <mem> 10497: XEiJ.mpuCycleCount++; 10498: mmuWriteByteData (efaMltByte (ea), XEiJ.MPU_CC_LE << XEiJ.regCCR >> 31, XEiJ.regSRS); 10499: } 10500: } //irpSle 10501: 10502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10503: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10504: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10506: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 10507: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 10508: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 10509: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 10510: public static void irpBrasw () throws M68kException { 10511: XEiJ.mpuCycleCount++; //0clkにしない 10512: int t = XEiJ.regPC; //pc0+2 10513: int s = (byte) XEiJ.regOC; //オフセット 10514: if (s == 0) { //BRA.W 10515: XEiJ.regPC = t + 2; 10516: s = mmuReadWordSignExword (t, XEiJ.regSRS); //pcws 10517: } 10518: irpSetPC (t + s); //pc0+2+オフセット 10519: } //irpBrasw 10520: 10521: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10522: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10523: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10524: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10525: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 10526: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 10527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10528: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10529: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10530: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10531: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 10532: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 10533: public static void irpBras () throws M68kException { 10534: XEiJ.mpuCycleCount++; //0clkにしない 10535: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10536: } //irpBras 10537: 10538: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10539: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10540: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10542: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 10543: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 10544: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 10545: public static void irpBrasl () throws M68kException { 10546: XEiJ.mpuCycleCount++; //0clkにしない 10547: int t = XEiJ.regPC; //pc0+2 10548: int s = (byte) XEiJ.regOC; //オフセット 10549: if (s == -1) { //BRA.L 10550: XEiJ.regPC = t + 4; 10551: s = mmuReadLongExword (t, XEiJ.regSRS); //pcls 10552: } 10553: irpSetPC (t + s); //pc0+2+オフセット 10554: } //irpBrasl 10555: 10556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10557: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10558: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10559: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10560: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 10561: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 10562: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 10563: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 10564: public static void irpBsrsw () throws M68kException { 10565: XEiJ.mpuCycleCount++; 10566: int t = XEiJ.regPC; //pc0+2 10567: int s = (byte) XEiJ.regOC; //オフセット 10568: if (s == 0) { //BSR.W 10569: XEiJ.regPC = t + 2; 10570: s = mmuReadWordSignExword (t, XEiJ.regSRS); //pcws 10571: } 10572: m60Incremented -= 4L << (7 << 3); 10573: int sp = m60Address = XEiJ.regRn[15] -= 4; 10574: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 10575: irpSetPC (t + s); //pc0+2+オフセット 10576: } //irpBsrsw 10577: 10578: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10579: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10580: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10581: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10582: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 10583: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 10584: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10585: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10586: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10587: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10588: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 10589: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 10590: public static void irpBsrs () throws M68kException { 10591: XEiJ.mpuCycleCount++; 10592: m60Incremented -= 4L << (7 << 3); 10593: int sp = m60Address = XEiJ.regRn[15] -= 4; 10594: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 10595: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10596: } //irpBsrs 10597: 10598: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10599: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10600: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10601: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10602: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 10603: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 10604: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 10605: public static void irpBsrsl () throws M68kException { 10606: XEiJ.mpuCycleCount++; 10607: int t = XEiJ.regPC; //pc0+2 10608: int s = (byte) XEiJ.regOC; //オフセット 10609: if (s == -1) { //BSR.L 10610: XEiJ.regPC = t + 4; 10611: s = mmuReadLongExword (t, XEiJ.regSRS); //pcls 10612: } 10613: m60Incremented -= 4L << (7 << 3); 10614: int sp = m60Address = XEiJ.regRn[15] -= 4; 10615: mmuWriteLongData (sp, XEiJ.regPC, XEiJ.regSRS); //pushl 10616: irpSetPC (t + s); //pc0+2+オフセット 10617: } //irpBsrsl 10618: 10619: //irpBccAddressError (int t) 10620: public static void irpBccAddressError (int t) throws M68kException { 10621: M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR; 10622: m60Address = t & -2; //偶数にする 10623: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 10624: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 10625: throw M68kException.m6eSignal; 10626: } 10627: 10628: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10629: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10630: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10631: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10632: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 10633: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10634: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10635: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10636: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 10637: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10638: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10639: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10640: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10641: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10642: public static void irpBhisw () throws M68kException { 10643: XEiJ.mpuCycleCount++; 10644: int t = XEiJ.regPC; //pc0+2 10645: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10646: if (s == 0) { //Bcc.W 10647: XEiJ.regPC = t + 2; //pc0+4 10648: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10649: } 10650: t += s; //pc0+2+ディスプレースメント 10651: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10652: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10653: irpBccAddressError (t); 10654: } 10655: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //分岐する 10656: irpSetPC (t); 10657: } 10658: } //irpBhisw 10659: 10660: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10661: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10662: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10663: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10664: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 10665: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10666: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10667: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10668: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10669: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10670: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10671: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10672: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 10673: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10674: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10675: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10676: public static void irpBhis () throws M68kException { 10677: XEiJ.mpuCycleCount++; 10678: int t = XEiJ.regPC; //pc0+2 10679: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10680: t += s; //pc0+2+ディスプレースメント 10681: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10682: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10683: irpBccAddressError (t); 10684: } 10685: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //分岐する 10686: irpSetPC (t); 10687: } 10688: } //irpBhis 10689: 10690: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10691: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10692: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10693: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10694: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 10695: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10696: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10697: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10698: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 10699: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 10700: public static void irpBhisl () throws M68kException { 10701: XEiJ.mpuCycleCount++; 10702: int t = XEiJ.regPC; //pc0+2 10703: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10704: if (s == -1) { //Bcc.L 10705: XEiJ.regPC = t + 4; //pc0+6 10706: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 10707: } 10708: t += s; //pc0+2+ディスプレースメント 10709: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10710: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10711: irpBccAddressError (t); 10712: } 10713: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //分岐する 10714: irpSetPC (t); 10715: } 10716: } //irpBhisl 10717: 10718: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10719: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10720: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10721: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10722: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 10723: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10724: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10725: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10726: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 10727: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10728: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10729: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10730: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10731: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10732: public static void irpBlssw () throws M68kException { 10733: XEiJ.mpuCycleCount++; 10734: int t = XEiJ.regPC; //pc0+2 10735: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10736: if (s == 0) { //Bcc.W 10737: XEiJ.regPC = t + 2; //pc0+4 10738: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10739: } 10740: t += s; //pc0+2+ディスプレースメント 10741: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10742: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10743: irpBccAddressError (t); 10744: } 10745: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //分岐する 10746: irpSetPC (t); 10747: } 10748: } //irpBlssw 10749: 10750: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10751: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10752: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10753: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10754: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 10755: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10756: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10757: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10759: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10760: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10762: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 10763: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10764: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10765: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10766: public static void irpBlss () throws M68kException { 10767: XEiJ.mpuCycleCount++; 10768: int t = XEiJ.regPC; //pc0+2 10769: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10770: t += s; //pc0+2+ディスプレースメント 10771: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10772: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10773: irpBccAddressError (t); 10774: } 10775: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //分岐する 10776: irpSetPC (t); 10777: } 10778: } //irpBlss 10779: 10780: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10781: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10782: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10783: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10784: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 10785: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10786: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10787: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10788: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 10789: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 10790: public static void irpBlssl () throws M68kException { 10791: XEiJ.mpuCycleCount++; 10792: int t = XEiJ.regPC; //pc0+2 10793: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10794: if (s == -1) { //Bcc.L 10795: XEiJ.regPC = t + 4; //pc0+6 10796: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 10797: } 10798: t += s; //pc0+2+ディスプレースメント 10799: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10800: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10801: irpBccAddressError (t); 10802: } 10803: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //分岐する 10804: irpSetPC (t); 10805: } 10806: } //irpBlssl 10807: 10808: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10809: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10810: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10811: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10812: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 10813: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10814: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10815: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10816: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10817: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10818: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10819: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10820: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 10821: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10822: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10823: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10824: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10825: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10826: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10827: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10828: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10829: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10830: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10831: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10832: public static void irpBhssw () throws M68kException { 10833: XEiJ.mpuCycleCount++; 10834: int t = XEiJ.regPC; //pc0+2 10835: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10836: if (s == 0) { //Bcc.W 10837: XEiJ.regPC = t + 2; //pc0+4 10838: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10839: } 10840: t += s; //pc0+2+ディスプレースメント 10841: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10842: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10843: irpBccAddressError (t); 10844: } 10845: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //分岐する 10846: irpSetPC (t); 10847: } 10848: } //irpBhssw 10849: 10850: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10851: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10852: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10853: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10854: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 10855: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10856: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10857: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10858: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10859: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10860: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10861: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10862: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10863: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10864: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10866: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 10867: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10868: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10869: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10870: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10871: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10872: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10873: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10874: public static void irpBhss () throws M68kException { 10875: XEiJ.mpuCycleCount++; 10876: int t = XEiJ.regPC; //pc0+2 10877: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10878: t += s; //pc0+2+ディスプレースメント 10879: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10880: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10881: irpBccAddressError (t); 10882: } 10883: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //分岐する 10884: irpSetPC (t); 10885: } 10886: } //irpBhss 10887: 10888: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10889: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10890: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10891: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10892: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 10893: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10894: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10895: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10896: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10897: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10898: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10899: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10900: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 10901: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10902: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10903: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10904: public static void irpBhssl () throws M68kException { 10905: XEiJ.mpuCycleCount++; 10906: int t = XEiJ.regPC; //pc0+2 10907: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10908: if (s == -1) { //Bcc.L 10909: XEiJ.regPC = t + 4; //pc0+6 10910: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 10911: } 10912: t += s; //pc0+2+ディスプレースメント 10913: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10914: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10915: irpBccAddressError (t); 10916: } 10917: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //分岐する 10918: irpSetPC (t); 10919: } 10920: } //irpBhssl 10921: 10922: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10923: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10924: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10926: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 10927: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10928: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10929: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10930: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10931: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10932: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10933: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10934: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 10935: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10936: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10937: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10938: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10939: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10940: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10941: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10942: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10943: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10944: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10945: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10946: public static void irpBlosw () throws M68kException { 10947: XEiJ.mpuCycleCount++; 10948: int t = XEiJ.regPC; //pc0+2 10949: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10950: if (s == 0) { //Bcc.W 10951: XEiJ.regPC = t + 2; //pc0+4 10952: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 10953: } 10954: t += s; //pc0+2+ディスプレースメント 10955: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10956: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10957: irpBccAddressError (t); 10958: } 10959: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //分岐する 10960: irpSetPC (t); 10961: } 10962: } //irpBlosw 10963: 10964: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10965: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10966: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10967: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10968: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 10969: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10970: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10971: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10972: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10973: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10974: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10975: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 10976: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10977: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10978: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10979: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10980: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 10981: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10982: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10983: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10984: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10985: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10986: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10987: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 10988: public static void irpBlos () throws M68kException { 10989: XEiJ.mpuCycleCount++; 10990: int t = XEiJ.regPC; //pc0+2 10991: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 10992: t += s; //pc0+2+ディスプレースメント 10993: if ((t & 1) != 0) { //分岐先のアドレスが奇数 10994: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 10995: irpBccAddressError (t); 10996: } 10997: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //分岐する 10998: irpSetPC (t); 10999: } 11000: } //irpBlos 11001: 11002: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11003: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11004: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11005: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11006: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 11007: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11008: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11009: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11010: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11011: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11012: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11013: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11014: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 11015: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11016: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11017: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11018: public static void irpBlosl () throws M68kException { 11019: XEiJ.mpuCycleCount++; 11020: int t = XEiJ.regPC; //pc0+2 11021: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11022: if (s == -1) { //Bcc.L 11023: XEiJ.regPC = t + 4; //pc0+6 11024: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11025: } 11026: t += s; //pc0+2+ディスプレースメント 11027: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11028: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11029: irpBccAddressError (t); 11030: } 11031: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //分岐する 11032: irpSetPC (t); 11033: } 11034: } //irpBlosl 11035: 11036: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11037: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11038: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11039: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11040: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 11041: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11042: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11043: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11044: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11045: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11046: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11047: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11048: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 11049: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11050: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11051: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11052: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11053: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11054: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11055: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11056: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11057: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11058: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11059: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11060: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11061: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11062: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11063: public static void irpBnesw () throws M68kException { 11064: XEiJ.mpuCycleCount++; 11065: int t = XEiJ.regPC; //pc0+2 11066: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11067: if (s == 0) { //Bcc.W 11068: XEiJ.regPC = t + 2; //pc0+4 11069: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11070: } 11071: t += s; //pc0+2+ディスプレースメント 11072: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11073: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11074: irpBccAddressError (t); 11075: } 11076: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //分岐する 11077: irpSetPC (t); 11078: } 11079: } //irpBnesw 11080: 11081: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11082: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11083: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11084: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11085: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 11086: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11087: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11088: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11089: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11090: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11091: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11092: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11093: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11094: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11095: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11096: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11097: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 11098: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11099: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11100: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11101: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11102: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11103: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11104: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11105: public static void irpBnes () throws M68kException { 11106: XEiJ.mpuCycleCount++; 11107: int t = XEiJ.regPC; //pc0+2 11108: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11109: t += s; //pc0+2+ディスプレースメント 11110: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11111: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11112: irpBccAddressError (t); 11113: } 11114: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //分岐する 11115: irpSetPC (t); 11116: } 11117: } //irpBnes 11118: 11119: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11120: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11121: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11122: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11123: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 11124: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11125: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11126: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11127: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11128: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11129: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11130: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11131: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 11132: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11133: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11134: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11135: public static void irpBnesl () throws M68kException { 11136: XEiJ.mpuCycleCount++; 11137: int t = XEiJ.regPC; //pc0+2 11138: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11139: if (s == -1) { //Bcc.L 11140: XEiJ.regPC = t + 4; //pc0+6 11141: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11142: } 11143: t += s; //pc0+2+ディスプレースメント 11144: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11145: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11146: irpBccAddressError (t); 11147: } 11148: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //分岐する 11149: irpSetPC (t); 11150: } 11151: } //irpBnesl 11152: 11153: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11154: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11155: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11156: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11157: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 11158: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11159: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11160: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11161: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11162: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11163: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11164: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11165: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 11166: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11167: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11168: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11169: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11170: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11171: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11172: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11173: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 11174: public static void irpBeqsw () throws M68kException { 11175: XEiJ.mpuCycleCount++; 11176: int t = XEiJ.regPC; //pc0+2 11177: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11178: if (s == 0) { //Bcc.W 11179: XEiJ.regPC = t + 2; //pc0+4 11180: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11181: } 11182: t += s; //pc0+2+ディスプレースメント 11183: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11184: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11185: irpBccAddressError (t); 11186: } 11187: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //分岐する 11188: irpSetPC (t); 11189: } 11190: } //irpBeqsw 11191: 11192: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11193: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11194: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11195: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11196: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 11197: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11198: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11199: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11200: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11201: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11202: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11203: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11204: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11205: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11206: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11207: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11208: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 11209: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11210: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11211: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11212: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11213: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11214: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11215: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11216: public static void irpBeqs () throws M68kException { 11217: XEiJ.mpuCycleCount++; 11218: int t = XEiJ.regPC; //pc0+2 11219: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11220: t += s; //pc0+2+ディスプレースメント 11221: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11222: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11223: irpBccAddressError (t); 11224: } 11225: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //分岐する 11226: irpSetPC (t); 11227: } 11228: } //irpBeqs 11229: 11230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11231: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11232: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11233: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11234: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 11235: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11236: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11237: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11238: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11239: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11240: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11241: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11242: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 11243: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11244: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11245: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11246: public static void irpBeqsl () throws M68kException { 11247: XEiJ.mpuCycleCount++; 11248: int t = XEiJ.regPC; //pc0+2 11249: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11250: if (s == -1) { //Bcc.L 11251: XEiJ.regPC = t + 4; //pc0+6 11252: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11253: } 11254: t += s; //pc0+2+ディスプレースメント 11255: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11256: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11257: irpBccAddressError (t); 11258: } 11259: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //分岐する 11260: irpSetPC (t); 11261: } 11262: } //irpBeqsl 11263: 11264: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11265: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11266: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11267: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11268: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 11269: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11270: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11271: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11272: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 11273: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11274: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11275: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11276: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11277: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11278: public static void irpBvcsw () throws M68kException { 11279: XEiJ.mpuCycleCount++; 11280: int t = XEiJ.regPC; //pc0+2 11281: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11282: if (s == 0) { //Bcc.W 11283: XEiJ.regPC = t + 2; //pc0+4 11284: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11285: } 11286: t += s; //pc0+2+ディスプレースメント 11287: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11288: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11289: irpBccAddressError (t); 11290: } 11291: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //分岐する 11292: irpSetPC (t); 11293: } 11294: } //irpBvcsw 11295: 11296: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11297: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11298: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11300: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 11301: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11302: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11303: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11304: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11305: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11306: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11307: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11308: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 11309: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11310: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11311: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11312: public static void irpBvcs () throws M68kException { 11313: XEiJ.mpuCycleCount++; 11314: int t = XEiJ.regPC; //pc0+2 11315: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11316: t += s; //pc0+2+ディスプレースメント 11317: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11318: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11319: irpBccAddressError (t); 11320: } 11321: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //分岐する 11322: irpSetPC (t); 11323: } 11324: } //irpBvcs 11325: 11326: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11327: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11328: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11329: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11330: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 11331: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11332: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11333: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11334: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 11335: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 11336: public static void irpBvcsl () throws M68kException { 11337: XEiJ.mpuCycleCount++; 11338: int t = XEiJ.regPC; //pc0+2 11339: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11340: if (s == -1) { //Bcc.L 11341: XEiJ.regPC = t + 4; //pc0+6 11342: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11343: } 11344: t += s; //pc0+2+ディスプレースメント 11345: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11346: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11347: irpBccAddressError (t); 11348: } 11349: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //分岐する 11350: irpSetPC (t); 11351: } 11352: } //irpBvcsl 11353: 11354: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11355: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11356: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11357: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11358: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 11359: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11360: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11361: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11362: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 11363: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11364: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11365: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11366: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11367: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11368: public static void irpBvssw () throws M68kException { 11369: XEiJ.mpuCycleCount++; 11370: int t = XEiJ.regPC; //pc0+2 11371: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11372: if (s == 0) { //Bcc.W 11373: XEiJ.regPC = t + 2; //pc0+4 11374: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11375: } 11376: t += s; //pc0+2+ディスプレースメント 11377: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11378: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11379: irpBccAddressError (t); 11380: } 11381: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //分岐する 11382: irpSetPC (t); 11383: } 11384: } //irpBvssw 11385: 11386: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11387: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11388: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11389: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11390: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 11391: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11392: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11393: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11394: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11395: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11396: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11398: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 11399: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11400: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11401: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11402: public static void irpBvss () throws M68kException { 11403: XEiJ.mpuCycleCount++; 11404: int t = XEiJ.regPC; //pc0+2 11405: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11406: t += s; //pc0+2+ディスプレースメント 11407: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11408: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11409: irpBccAddressError (t); 11410: } 11411: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //分岐する 11412: irpSetPC (t); 11413: } 11414: } //irpBvss 11415: 11416: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11417: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11418: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11419: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11420: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 11421: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11422: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11423: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11424: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 11425: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 11426: public static void irpBvssl () throws M68kException { 11427: XEiJ.mpuCycleCount++; 11428: int t = XEiJ.regPC; //pc0+2 11429: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11430: if (s == -1) { //Bcc.L 11431: XEiJ.regPC = t + 4; //pc0+6 11432: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11433: } 11434: t += s; //pc0+2+ディスプレースメント 11435: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11436: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11437: irpBccAddressError (t); 11438: } 11439: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //分岐する 11440: irpSetPC (t); 11441: } 11442: } //irpBvssl 11443: 11444: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11445: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11446: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11447: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11448: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 11449: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11450: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11451: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11452: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 11453: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11454: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11455: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11456: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11457: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11458: public static void irpBplsw () throws M68kException { 11459: XEiJ.mpuCycleCount++; 11460: int t = XEiJ.regPC; //pc0+2 11461: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11462: if (s == 0) { //Bcc.W 11463: XEiJ.regPC = t + 2; //pc0+4 11464: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11465: } 11466: t += s; //pc0+2+ディスプレースメント 11467: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11468: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11469: irpBccAddressError (t); 11470: } 11471: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //分岐する 11472: irpSetPC (t); 11473: } 11474: } //irpBplsw 11475: 11476: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11477: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11478: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11479: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11480: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 11481: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11482: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11483: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11484: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11485: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11486: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11487: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11488: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 11489: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11490: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11491: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11492: public static void irpBpls () throws M68kException { 11493: XEiJ.mpuCycleCount++; 11494: int t = XEiJ.regPC; //pc0+2 11495: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11496: t += s; //pc0+2+ディスプレースメント 11497: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11498: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11499: irpBccAddressError (t); 11500: } 11501: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //分岐する 11502: irpSetPC (t); 11503: } 11504: } //irpBpls 11505: 11506: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11507: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11508: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11509: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11510: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 11511: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11512: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11513: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11514: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 11515: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 11516: public static void irpBplsl () throws M68kException { 11517: XEiJ.mpuCycleCount++; 11518: int t = XEiJ.regPC; //pc0+2 11519: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11520: if (s == -1) { //Bcc.L 11521: XEiJ.regPC = t + 4; //pc0+6 11522: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11523: } 11524: t += s; //pc0+2+ディスプレースメント 11525: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11526: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11527: irpBccAddressError (t); 11528: } 11529: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //分岐する 11530: irpSetPC (t); 11531: } 11532: } //irpBplsl 11533: 11534: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11535: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11536: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11537: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11538: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 11539: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11540: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11541: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11542: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 11543: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11544: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11545: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11546: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11547: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11548: public static void irpBmisw () throws M68kException { 11549: XEiJ.mpuCycleCount++; 11550: int t = XEiJ.regPC; //pc0+2 11551: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11552: if (s == 0) { //Bcc.W 11553: XEiJ.regPC = t + 2; //pc0+4 11554: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11555: } 11556: t += s; //pc0+2+ディスプレースメント 11557: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11558: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11559: irpBccAddressError (t); 11560: } 11561: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //分岐する 11562: irpSetPC (t); 11563: } 11564: } //irpBmisw 11565: 11566: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11567: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11568: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11569: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11570: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 11571: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11572: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11573: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11574: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11575: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11576: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11577: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11578: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 11579: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11580: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11581: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11582: public static void irpBmis () throws M68kException { 11583: XEiJ.mpuCycleCount++; 11584: int t = XEiJ.regPC; //pc0+2 11585: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11586: t += s; //pc0+2+ディスプレースメント 11587: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11588: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11589: irpBccAddressError (t); 11590: } 11591: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //分岐する 11592: irpSetPC (t); 11593: } 11594: } //irpBmis 11595: 11596: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11597: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11598: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11599: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11600: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 11601: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11602: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11603: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11604: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 11605: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 11606: public static void irpBmisl () throws M68kException { 11607: XEiJ.mpuCycleCount++; 11608: int t = XEiJ.regPC; //pc0+2 11609: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11610: if (s == -1) { //Bcc.L 11611: XEiJ.regPC = t + 4; //pc0+6 11612: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11613: } 11614: t += s; //pc0+2+ディスプレースメント 11615: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11616: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11617: irpBccAddressError (t); 11618: } 11619: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //分岐する 11620: irpSetPC (t); 11621: } 11622: } //irpBmisl 11623: 11624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11625: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11626: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11627: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11628: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 11629: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11630: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11631: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11632: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 11633: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11634: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11635: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11636: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11637: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11638: public static void irpBgesw () throws M68kException { 11639: XEiJ.mpuCycleCount++; 11640: int t = XEiJ.regPC; //pc0+2 11641: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11642: if (s == 0) { //Bcc.W 11643: XEiJ.regPC = t + 2; //pc0+4 11644: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11645: } 11646: t += s; //pc0+2+ディスプレースメント 11647: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11648: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11649: irpBccAddressError (t); 11650: } 11651: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //分岐する 11652: irpSetPC (t); 11653: } 11654: } //irpBgesw 11655: 11656: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11657: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11658: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11660: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 11661: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11662: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11663: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11664: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11665: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11666: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11667: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11668: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 11669: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11670: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11671: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11672: public static void irpBges () throws M68kException { 11673: XEiJ.mpuCycleCount++; 11674: int t = XEiJ.regPC; //pc0+2 11675: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11676: t += s; //pc0+2+ディスプレースメント 11677: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11678: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11679: irpBccAddressError (t); 11680: } 11681: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //分岐する 11682: irpSetPC (t); 11683: } 11684: } //irpBges 11685: 11686: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11687: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11688: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11689: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11690: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 11691: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11692: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11693: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11694: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 11695: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 11696: public static void irpBgesl () throws M68kException { 11697: XEiJ.mpuCycleCount++; 11698: int t = XEiJ.regPC; //pc0+2 11699: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11700: if (s == -1) { //Bcc.L 11701: XEiJ.regPC = t + 4; //pc0+6 11702: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11703: } 11704: t += s; //pc0+2+ディスプレースメント 11705: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11706: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11707: irpBccAddressError (t); 11708: } 11709: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //分岐する 11710: irpSetPC (t); 11711: } 11712: } //irpBgesl 11713: 11714: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11715: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11716: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11718: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 11719: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11720: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11721: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11722: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 11723: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11724: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11725: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11726: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11727: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11728: public static void irpBltsw () throws M68kException { 11729: XEiJ.mpuCycleCount++; 11730: int t = XEiJ.regPC; //pc0+2 11731: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11732: if (s == 0) { //Bcc.W 11733: XEiJ.regPC = t + 2; //pc0+4 11734: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11735: } 11736: t += s; //pc0+2+ディスプレースメント 11737: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11738: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11739: irpBccAddressError (t); 11740: } 11741: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //分岐する 11742: irpSetPC (t); 11743: } 11744: } //irpBltsw 11745: 11746: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11747: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11748: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11749: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11750: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 11751: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11752: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11753: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11754: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11755: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11756: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11757: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11758: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 11759: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11760: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11761: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11762: public static void irpBlts () throws M68kException { 11763: XEiJ.mpuCycleCount++; 11764: int t = XEiJ.regPC; //pc0+2 11765: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11766: t += s; //pc0+2+ディスプレースメント 11767: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11768: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11769: irpBccAddressError (t); 11770: } 11771: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //分岐する 11772: irpSetPC (t); 11773: } 11774: } //irpBlts 11775: 11776: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11777: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11778: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11779: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11780: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 11781: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11782: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11783: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11784: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 11785: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 11786: public static void irpBltsl () throws M68kException { 11787: XEiJ.mpuCycleCount++; 11788: int t = XEiJ.regPC; //pc0+2 11789: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11790: if (s == -1) { //Bcc.L 11791: XEiJ.regPC = t + 4; //pc0+6 11792: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11793: } 11794: t += s; //pc0+2+ディスプレースメント 11795: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11796: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11797: irpBccAddressError (t); 11798: } 11799: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //分岐する 11800: irpSetPC (t); 11801: } 11802: } //irpBltsl 11803: 11804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11805: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11806: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11808: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 11809: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11810: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11811: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11812: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 11813: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11814: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11815: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11816: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11817: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11818: public static void irpBgtsw () throws M68kException { 11819: XEiJ.mpuCycleCount++; 11820: int t = XEiJ.regPC; //pc0+2 11821: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11822: if (s == 0) { //Bcc.W 11823: XEiJ.regPC = t + 2; //pc0+4 11824: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11825: } 11826: t += s; //pc0+2+ディスプレースメント 11827: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11828: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11829: irpBccAddressError (t); 11830: } 11831: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //分岐する 11832: irpSetPC (t); 11833: } 11834: } //irpBgtsw 11835: 11836: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11837: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11838: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11839: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11840: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 11841: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11842: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11843: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11844: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11845: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11846: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11847: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11848: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 11849: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11850: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11851: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11852: public static void irpBgts () throws M68kException { 11853: XEiJ.mpuCycleCount++; 11854: int t = XEiJ.regPC; //pc0+2 11855: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11856: t += s; //pc0+2+ディスプレースメント 11857: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11858: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11859: irpBccAddressError (t); 11860: } 11861: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //分岐する 11862: irpSetPC (t); 11863: } 11864: } //irpBgts 11865: 11866: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11867: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11868: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11869: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11870: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 11871: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11872: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11873: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11874: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 11875: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 11876: public static void irpBgtsl () throws M68kException { 11877: XEiJ.mpuCycleCount++; 11878: int t = XEiJ.regPC; //pc0+2 11879: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11880: if (s == -1) { //Bcc.L 11881: XEiJ.regPC = t + 4; //pc0+6 11882: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11883: } 11884: t += s; //pc0+2+ディスプレースメント 11885: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11886: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11887: irpBccAddressError (t); 11888: } 11889: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //分岐する 11890: irpSetPC (t); 11891: } 11892: } //irpBgtsl 11893: 11894: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11895: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11896: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11897: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11898: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 11899: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11900: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11901: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11902: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 11903: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11904: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11905: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11906: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 11907: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 11908: public static void irpBlesw () throws M68kException { 11909: XEiJ.mpuCycleCount++; 11910: int t = XEiJ.regPC; //pc0+2 11911: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11912: if (s == 0) { //Bcc.W 11913: XEiJ.regPC = t + 2; //pc0+4 11914: s = mmuReadWordSignExword (t, XEiJ.regSRS); //16bitディスプレースメント 11915: } 11916: t += s; //pc0+2+ディスプレースメント 11917: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11918: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11919: irpBccAddressError (t); 11920: } 11921: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //分岐する 11922: irpSetPC (t); 11923: } 11924: } //irpBlesw 11925: 11926: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11927: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11928: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11929: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11930: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 11931: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11932: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11933: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11935: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11936: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11938: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 11939: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11940: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11941: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11942: public static void irpBles () throws M68kException { 11943: XEiJ.mpuCycleCount++; 11944: int t = XEiJ.regPC; //pc0+2 11945: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11946: t += s; //pc0+2+ディスプレースメント 11947: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11948: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11949: irpBccAddressError (t); 11950: } 11951: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //分岐する 11952: irpSetPC (t); 11953: } 11954: } //irpBles 11955: 11956: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11957: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11958: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11959: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11960: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 11961: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11962: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11963: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11964: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 11965: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 11966: public static void irpBlesl () throws M68kException { 11967: XEiJ.mpuCycleCount++; 11968: int t = XEiJ.regPC; //pc0+2 11969: int s = (byte) XEiJ.regOC; //8bitディスプレースメント 11970: if (s == -1) { //Bcc.L 11971: XEiJ.regPC = t + 4; //pc0+6 11972: s = mmuReadLongExword (t, XEiJ.regSRS); //32bitディスプレースメント 11973: } 11974: t += s; //pc0+2+ディスプレースメント 11975: if ((t & 1) != 0) { //分岐先のアドレスが奇数 11976: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 11977: irpBccAddressError (t); 11978: } 11979: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //分岐する 11980: irpSetPC (t); 11981: } 11982: } //irpBlesl 11983: 11984: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11985: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11986: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11987: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11988: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 11989: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 11990: public static void irpMoveq () throws M68kException { 11991: XEiJ.mpuCycleCount++; 11992: int z; 11993: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = (byte) XEiJ.regOC; 11994: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 11995: } //irpMoveq 11996: 11997: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11998: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11999: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12000: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12001: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 12002: // 12003: //MVS.B <ea>,Dq 12004: // バイトデータをロングに符号拡張してDqの全体を更新する 12005: public static void irpMvsByte () throws M68kException { 12006: XEiJ.mpuCycleCount++; 12007: int ea = XEiJ.regOC & 63; 12008: int z; 12009: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 12010: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12011: } //irpMvsByte 12012: 12013: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12014: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12015: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12016: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12017: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 12018: // 12019: //MVS.W <ea>,Dq 12020: // ワードデータをロングに符号拡張してDqの全体を更新する 12021: public static void irpMvsWord () throws M68kException { 12022: XEiJ.mpuCycleCount++; 12023: int ea = XEiJ.regOC & 63; 12024: int z; 12025: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離 12026: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12027: } //irpMvsWord 12028: 12029: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12030: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12031: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12032: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12033: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 12034: // 12035: //MVZ.B <ea>,Dq 12036: // バイトデータをロングにゼロ拡張してDqの全体を更新する 12037: public static void irpMvzByte () throws M68kException { 12038: XEiJ.mpuCycleCount++; 12039: int ea = XEiJ.regOC & 63; 12040: int z; 12041: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? 0xff & XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteZeroExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteZeroData (efaAnyByte (ea), XEiJ.regSRS); //pcbz。イミディエイトを分離 12042: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12043: } //irpMvzByte 12044: 12045: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12046: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12047: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12048: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12049: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 12050: // 12051: //MVZ.W <ea>,Dq 12052: // ワードデータをロングにゼロ拡張してDqの全体を更新する 12053: public static void irpMvzWord () throws M68kException { 12054: XEiJ.mpuCycleCount++; 12055: int ea = XEiJ.regOC & 63; 12056: int z; 12057: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS); //pcwz。イミディエイトを分離 12058: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12059: } //irpMvzWord 12060: 12061: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12062: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12063: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12064: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12065: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 12066: public static void irpOrToRegByte () throws M68kException { 12067: XEiJ.mpuCycleCount++; 12068: int ea = XEiJ.regOC & 63; 12069: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= 255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))]; //ccr_tst_byte。pcbs。イミディエイトを分離。0拡張してからOR 12070: } //irpOrToRegByte 12071: 12072: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12073: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12074: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12075: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12076: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 12077: public static void irpOrToRegWord () throws M68kException { 12078: XEiJ.mpuCycleCount++; 12079: int ea = XEiJ.regOC & 63; 12080: int z = (short) (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS)); //pcwz。イミディエイトを分離。0拡張してからOR 12081: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12082: } //irpOrToRegWord 12083: 12084: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12085: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12086: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12087: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12088: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 12089: public static void irpOrToRegLong () throws M68kException { 12090: int ea = XEiJ.regOC & 63; 12091: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離 12092: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12093: } //irpOrToRegLong 12094: 12095: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12096: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12097: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12098: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12099: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 12100: // 12101: //DIVU.W <ea>,Dq 12102: // M68000PRMでDIVU.Wのオーバーフローの条件が16bit符号あり整数と書かれているのは16bit符号なし整数の間違い 12103: public static void irpDivuWord () throws M68kException { 12104: // X 変化しない 12105: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12106: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12107: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12108: // C 常にクリア 12109: XEiJ.mpuCycleCount += 22; //最大 12110: int ea = XEiJ.regOC & 63; 12111: int qqq = XEiJ.regOC >> 9 & 7; 12112: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS); //除数。pcwz。イミディエイトを分離 12113: int x = XEiJ.regRn[qqq]; //被除数 12114: if (y == 0) { //ゼロ除算 12115: //Dqは変化しない 12116: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 12117: ); //Cは常にクリア 12118: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 12119: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12120: throw M68kException.m6eSignal; 12121: } 12122: //無理にintで符号なし除算をやろうとするよりもdoubleにキャストしてから割ったほうが速い 12123: // intの除算をdoubleの除算器で行うプロセッサならばなおさら 12124: //被除数を符号なし32ビットとみなすためlongを経由してdoubleに変換する 12125: //doubleからlongやintへのキャストは小数点以下が切り捨てられ、オーバーフローは表現できる絶対値最大の値になる 12126: //doubleから直接intに戻しているので0xffffffff/0x0001=0xffffffffが絶対値最大の0x7fffffffになってしまうが、 12127: //DIVU.Wではオーバーフローになることに変わりはないのでよいことにする 12128: // 符号なし32ビットの0xffffffffにしたいときは戻すときもlongを経由すればよい 12129: int z = (int) ((double) ((long) x & 0xffffffffL) / (double) y); //商 12130: if (z >>> 16 != 0) { //オーバーフローあり 12131: //Dqは変化しない 12132: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) | //XとNとZは変化しない 12133: XEiJ.REG_CCR_V //Vは常にセット 12134: ); //Cは常にクリア 12135: } else { //オーバーフローなし 12136: XEiJ.regRn[qqq] = x - y * z << 16 | z; //余り<<16|商 12137: z = (short) z; 12138: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12139: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12140: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12141: //Vは常にクリア 12142: ); //Cは常にクリア 12143: } //if オーバーフローあり/オーバーフローなし 12144: } //irpDivuWord 12145: 12146: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12147: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12148: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12149: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12150: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 12151: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 12152: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 12153: public static void irpOrToMemByte () throws M68kException { 12154: int ea = XEiJ.regOC & 63; 12155: if (ea >= XEiJ.EA_MM) { //OR.B Dq,<ea> 12156: XEiJ.mpuCycleCount++; 12157: int a = efaMltByte (ea); 12158: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuReadByteSignData (a, XEiJ.regSRS); 12159: mmuWriteByteData (a, z, XEiJ.regSRS); 12160: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12161: } else if (ea < XEiJ.EA_AR) { //SBCD.B Dr,Dq 12162: int qqq = XEiJ.regOC >> 9 & 7; 12163: XEiJ.mpuCycleCount++; 12164: int x; 12165: XEiJ.regRn[qqq] = ~0xff & (x = XEiJ.regRn[qqq]) | irpSbcd (x, XEiJ.regRn[ea]); 12166: } else { //SBCD.B -(Ar),-(Aq) 12167: XEiJ.mpuCycleCount += 2; 12168: m60Incremented -= 1L << (ea << 3); 12169: int a = m60Address = --XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12170: int y = mmuReadByteZeroData (a, XEiJ.regSRS); 12171: int aqq = (XEiJ.regOC >> 9) - (64 - 8); 12172: m60Incremented -= 1L << (aqq << 3); 12173: a = m60Address = --XEiJ.regRn[aqq]; 12174: mmuWriteByteData (a, irpSbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS); 12175: } 12176: } //irpOrToMemByte 12177: 12178: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12179: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12180: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12181: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12182: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 12183: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 12184: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 12185: // 12186: //PACK Dr,Dq,#<data> 12187: //PACK -(Ar),-(Aq),#<data> 12188: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12189: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12190: public static void irpOrToMemWord () throws M68kException { 12191: int ea = XEiJ.regOC & 63; 12192: if (ea >= XEiJ.EA_MM) { //OR.W Dq,<ea> 12193: XEiJ.mpuCycleCount++; 12194: int a = efaMltWord (ea); 12195: int z; 12196: mmuWriteWordData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 12197: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12198: } else if (ea < XEiJ.EA_AR) { //PACK Dr,Dq,#<data> 12199: XEiJ.mpuCycleCount += 2; 12200: int qqq = XEiJ.regOC >> 9 & 7; 12201: int t = XEiJ.regRn[ea] + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 12202: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | t >> 4 & 0xf0 | t & 15; 12203: } else { //PACK -(Ar),-(Aq),#<data> 12204: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 12205: m60Incremented -= 2L << (ea << 3); 12206: int a = m60Address = XEiJ.regRn[ea] -= 2; 12207: int t = mmuReadWordSignData (a, XEiJ.regSRS) + o; //020以上なのでアドレスエラーは出ない 12208: int aqq = (XEiJ.regOC >> 9) - (64 - 8); 12209: m60Incremented -= 1L << (aqq << 3); 12210: a = m60Address = --XEiJ.regRn[aqq]; 12211: mmuWriteByteData (a, t >> 4 & 0xf0 | t & 15, XEiJ.regSRS); 12212: } 12213: } //irpOrToMemWord 12214: 12215: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12216: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12217: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12218: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12219: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 12220: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 12221: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 12222: // 12223: //UNPK Dr,Dq,#<data> 12224: //UNPK -(Ar),-(Aq),#<data> 12225: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12226: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12227: public static void irpOrToMemLong () throws M68kException { 12228: int ea = XEiJ.regOC & 63; 12229: if (ea >= XEiJ.EA_MM) { //OR.L Dq,<ea> 12230: XEiJ.mpuCycleCount++; 12231: int a = efaMltLong (ea); 12232: int z; 12233: mmuWriteLongData (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | mmuModifyLongData (a, XEiJ.regSRS), XEiJ.regSRS); 12234: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12235: } else if (ea < XEiJ.EA_AR) { //UNPK Dr,Dq,#<data> 12236: int qqq = XEiJ.regOC >> 9 & 7; 12237: int t = XEiJ.regRn[ea]; 12238: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS)); //pcws 12239: } else { //UNPK -(Ar),-(Aq),#<data> 12240: int o = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcws 12241: m60Incremented -= 1L << (ea << 3); 12242: int a = m60Address = --XEiJ.regRn[ea]; 12243: int t = mmuReadByteSignData (a, XEiJ.regSRS); 12244: int aqq = (XEiJ.regOC >> 9) - (64 - 8); 12245: m60Incremented -= 2L << (aqq << 3); 12246: a = m60Address = XEiJ.regRn[aqq] -= 2; 12247: mmuWriteWordData (a, (t << 4 & 0x0f00 | t & 15) + o, XEiJ.regSRS); //020以上なのでアドレスエラーは出ない 12248: } 12249: } //irpOrToMemLong 12250: 12251: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12252: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12253: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12254: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12255: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 12256: // 12257: //DIVS.W <ea>,Dq 12258: // DIVSの余りの符号は被除数と一致 12259: // M68000PRMでDIVS.Wのアドレッシングモードがデータ可変と書かれているのはデータの間違い 12260: public static void irpDivsWord () throws M68kException { 12261: // X 変化しない 12262: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12263: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12264: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12265: // C 常にクリア 12266: //divsの余りの符号は被除数と一致 12267: //Javaの除算演算子の挙動 12268: // 10 / 3 == 3 10 % 3 == 1 10 = 3 * 3 + 1 12269: // 10 / -3 == -3 10 % -3 == 1 10 = -3 * -3 + 1 12270: // -10 / 3 == -3 -10 % 3 == -1 -10 = 3 * -3 + -1 12271: // -10 / -3 == 3 -10 % -3 == -1 -10 = -3 * 3 + -1 12272: XEiJ.mpuCycleCount += 22; //最大 12273: int ea = XEiJ.regOC & 63; 12274: int qqq = XEiJ.regOC >> 9 & 7; 12275: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //除数。pcws。イミディエイトを分離 12276: int x = XEiJ.regRn[qqq]; //被除数 12277: if (y == 0) { //ゼロ除算 12278: //Dqは変化しない 12279: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z | XEiJ.REG_CCR_V) //XとNとZとVは変化しない 12280: ); //Cは常にクリア 12281: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 12282: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12283: throw M68kException.m6eSignal; 12284: } 12285: int z = x / y; //商 12286: if ((short) z != z) { //オーバーフローあり 12287: //Dqは変化しない 12288: XEiJ.regCCR = (XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_Z) | //XとNとZは変化しない 12289: XEiJ.REG_CCR_V //Vは常にセット 12290: ); //Cは常にクリア 12291: } else { //オーバーフローなし 12292: XEiJ.regRn[qqq] = x - y * z << 16 | (char) z; //Dqは余り<<16|商&$ffff 12293: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12294: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12295: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12296: //Vは常にクリア 12297: ); //Cは常にクリア 12298: } 12299: } //irpDivsWord 12300: 12301: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12302: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12303: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12304: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12305: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 12306: public static void irpSubToRegByte () throws M68kException { 12307: XEiJ.mpuCycleCount++; 12308: int ea = XEiJ.regOC & 63; 12309: int qqq = XEiJ.regOC >> 9 & 7; 12310: int x, y, z; 12311: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 12312: x = XEiJ.regRn[qqq]; 12313: z = x - y; 12314: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12315: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12316: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12317: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12318: } //irpSubToRegByte 12319: 12320: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12321: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12322: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12324: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 12325: public static void irpSubToRegWord () throws M68kException { 12326: XEiJ.mpuCycleCount++; 12327: int ea = XEiJ.regOC & 63; 12328: int qqq = XEiJ.regOC >> 9 & 7; 12329: int x, y, z; 12330: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 12331: x = XEiJ.regRn[qqq]; 12332: z = x - y; 12333: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12334: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12335: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12336: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12337: } //irpSubToRegWord 12338: 12339: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12340: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12341: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12342: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12343: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 12344: public static void irpSubToRegLong () throws M68kException { 12345: int ea = XEiJ.regOC & 63; 12346: int qqq = XEiJ.regOC >> 9 & 7; 12347: XEiJ.mpuCycleCount++; 12348: int x, y, z; 12349: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離 12350: x = XEiJ.regRn[qqq]; 12351: z = x - y; 12352: XEiJ.regRn[qqq] = z; 12353: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12354: ((x ^ y) & (x ^ z)) >> 30 & XEiJ.REG_CCR_V | 12355: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12356: } //irpSubToRegLong 12357: 12358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12359: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12360: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12361: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12362: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 12363: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 12364: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 12365: // 12366: //SUBA.W <ea>,Aq 12367: // ソースを符号拡張してロングで減算する 12368: public static void irpSubaWord () throws M68kException { 12369: XEiJ.mpuCycleCount++; 12370: int ea = XEiJ.regOC & 63; 12371: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 12372: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 12373: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 12374: XEiJ.mpuCycleCount++; 12375: } 12376: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12377: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 12378: //ccrは変化しない 12379: } //irpSubaWord 12380: 12381: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12382: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12383: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12384: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12385: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 12386: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 12387: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 12388: public static void irpSubToMemByte () throws M68kException { 12389: int ea = XEiJ.regOC & 63; 12390: int a, x, y, z; 12391: if (ea < XEiJ.EA_MM) { 12392: if (ea < XEiJ.EA_AR) { //SUBX.B Dr,Dq 12393: int qqq = XEiJ.regOC >> 9 & 7; 12394: XEiJ.mpuCycleCount++; 12395: y = XEiJ.regRn[ea]; 12396: x = XEiJ.regRn[qqq]; 12397: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12398: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12399: } else { //SUBX.B -(Ar),-(Aq) 12400: XEiJ.mpuCycleCount += 2; 12401: m60Incremented -= 1L << (ea << 3); 12402: a = m60Address = --XEiJ.regRn[ea]; 12403: y = mmuReadByteSignData (a, XEiJ.regSRS); //このr[ea]はアドレスレジスタ 12404: int aqq = XEiJ.regOC >> 9 & 15; //1qqq=aqq 12405: m60Incremented -= 1L << (aqq << 3); 12406: a = m60Address = --XEiJ.regRn[aqq]; 12407: x = mmuModifyByteSignData (a, XEiJ.regSRS); 12408: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12409: mmuWriteByteData (a, z, XEiJ.regSRS); 12410: } 12411: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //SUBXはZをクリアすることはあるがセットすることはない 12412: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12413: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_byte 12414: } else { //SUB.B Dq,<ea> 12415: XEiJ.mpuCycleCount++; 12416: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12417: a = efaMltByte (ea); 12418: x = mmuModifyByteSignData (a, XEiJ.regSRS); 12419: z = x - y; 12420: mmuWriteByteData (a, z, XEiJ.regSRS); 12421: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12422: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12423: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12424: } 12425: } //irpSubToMemByte 12426: 12427: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12428: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12429: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12430: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12431: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 12432: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 12433: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 12434: public static void irpSubToMemWord () throws M68kException { 12435: int ea = XEiJ.regOC & 63; 12436: int a, x, y, z; 12437: if (ea < XEiJ.EA_MM) { 12438: if (ea < XEiJ.EA_AR) { //SUBX.W Dr,Dq 12439: int qqq = XEiJ.regOC >> 9 & 7; 12440: XEiJ.mpuCycleCount++; 12441: y = XEiJ.regRn[ea]; 12442: x = XEiJ.regRn[qqq]; 12443: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12444: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12445: } else { //SUBX.W -(Ar),-(Aq) 12446: XEiJ.mpuCycleCount += 2; 12447: m60Incremented -= 2L << (ea << 3); 12448: a = m60Address = XEiJ.regRn[ea] -= 2; 12449: y = mmuReadWordSignData (a, XEiJ.regSRS); //このr[ea]はアドレスレジスタ 12450: int aqq = XEiJ.regOC >> 9 & 15; 12451: m60Incremented -= 2L << (aqq << 3); 12452: a = m60Address = XEiJ.regRn[aqq] -= 2; 12453: x = mmuModifyWordSignData (a, XEiJ.regSRS); 12454: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12455: mmuWriteWordData (a, z, XEiJ.regSRS); 12456: } 12457: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 12458: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12459: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_word 12460: } else { //SUB.W Dq,<ea> 12461: XEiJ.mpuCycleCount++; 12462: y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12463: a = efaMltWord (ea); 12464: x = mmuModifyWordSignData (a, XEiJ.regSRS); 12465: z = x - y; 12466: mmuWriteWordData (a, z, XEiJ.regSRS); 12467: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12468: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12469: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12470: } 12471: } //irpSubToMemWord 12472: 12473: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12474: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12475: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12476: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12477: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 12478: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 12479: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 12480: public static void irpSubToMemLong () throws M68kException { 12481: int ea = XEiJ.regOC & 63; 12482: if (ea < XEiJ.EA_MM) { 12483: int x; 12484: int y; 12485: int z; 12486: if (ea < XEiJ.EA_AR) { //SUBX.L Dr,Dq 12487: int qqq = XEiJ.regOC >> 9 & 7; 12488: XEiJ.mpuCycleCount++; 12489: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) - (y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12490: } else { //SUBX.L -(Ar),-(Aq) 12491: XEiJ.mpuCycleCount += 2; 12492: m60Incremented -= 4L << (ea << 3); 12493: int a = m60Address = XEiJ.regRn[ea] -= 4; //このr[ea]はアドレスレジスタ 12494: y = mmuReadLongData (a, XEiJ.regSRS); 12495: int aqq = XEiJ.regOC >> 9 & 15; 12496: m60Incremented -= 4L << (aqq << 3); 12497: a = m60Address = XEiJ.regRn[aqq] -= 4; 12498: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - y - (XEiJ.regCCR >> 4), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 12499: } 12500: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 12501: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12502: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx 12503: } else { //SUB.L Dq,<ea> 12504: XEiJ.mpuCycleCount++; 12505: int a = efaMltLong (ea); 12506: int x; 12507: int y; 12508: int z; 12509: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) - (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS); 12510: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12511: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12512: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12513: } 12514: } //irpSubToMemLong 12515: 12516: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12517: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12518: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12519: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12520: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 12521: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 12522: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 12523: public static void irpSubaLong () throws M68kException { 12524: int ea = XEiJ.regOC & 63; 12525: XEiJ.mpuCycleCount++; 12526: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 12527: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 12528: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 12529: XEiJ.mpuCycleCount++; 12530: } 12531: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12532: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 12533: //ccrは変化しない 12534: } //irpSubaLong 12535: 12536: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12537: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12538: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12539: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12540: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 12541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12542: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12543: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12544: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12545: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 12546: public static void irpAline () throws M68kException { 12547: irpExceptionFormat0 (M68kException.M6E_LINE_1010_EMULATOR << 2, XEiJ.regPC0); //pcは命令の先頭 12548: } //irpAline 12549: 12550: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12551: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12552: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12554: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 12555: public static void irpCmpByte () throws M68kException { 12556: XEiJ.mpuCycleCount++; 12557: int ea = XEiJ.regOC & 63; 12558: int x; 12559: int y; 12560: int z = (byte) ((x = (byte) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS))); //pcbs。イミディエイトを分離 12561: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12562: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12563: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12564: } //irpCmpByte 12565: 12566: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12567: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12568: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12569: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12570: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 12571: public static void irpCmpWord () throws M68kException { 12572: XEiJ.mpuCycleCount++; 12573: int ea = XEiJ.regOC & 63; 12574: int x; 12575: int y; 12576: int z = (short) ((x = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS))); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 12577: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12578: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12579: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12580: } //irpCmpWord 12581: 12582: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12583: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12584: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12585: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12586: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 12587: public static void irpCmpLong () throws M68kException { 12588: XEiJ.mpuCycleCount++; 12589: int ea = XEiJ.regOC & 63; 12590: int x; 12591: int y; 12592: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS)); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離 12593: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12594: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12595: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12596: } //irpCmpLong 12597: 12598: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12599: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12600: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12601: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12602: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 12603: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 12604: // 12605: //CMPA.W <ea>,Aq 12606: // ソースを符号拡張してロングで比較する 12607: public static void irpCmpaWord () throws M68kException { 12608: XEiJ.mpuCycleCount++; 12609: int ea = XEiJ.regOC & 63; 12610: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 12611: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 12612: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 12613: XEiJ.mpuCycleCount++; 12614: } 12615: //ソースを符号拡張してからロングで比較する 12616: int y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12617: int x; 12618: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12619: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12620: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12621: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12622: } //irpCmpaWord 12623: 12624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12625: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12626: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12627: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12628: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 12629: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 12630: public static void irpEorByte () throws M68kException { 12631: int ea = XEiJ.regOC & 63; 12632: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.B (Ar)+,(Aq)+ 12633: XEiJ.mpuCycleCount += 2; 12634: m60Incremented += 1L << (ea << 3); 12635: int a = m60Address = XEiJ.regRn[ea]++; //このr[ea]はアドレスレジスタ 12636: int y = mmuReadByteSignData (a, XEiJ.regSRS); 12637: int x; 12638: int aqq = XEiJ.regOC >> 9 & 15; 12639: m60Incremented += 1L << (aqq << 3); 12640: a = m60Address = XEiJ.regRn[aqq]++; 12641: int z = (byte) ((x = mmuReadByteSignData (a, XEiJ.regSRS)) - y); 12642: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12643: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12644: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12645: } else { 12646: int qqq = XEiJ.regOC >> 9 & 7; 12647: int z; 12648: if (ea < XEiJ.EA_AR) { //EOR.B Dq,Dr 12649: XEiJ.mpuCycleCount++; 12650: z = XEiJ.regRn[ea] ^= 255 & XEiJ.regRn[qqq]; //0拡張してからEOR 12651: } else { //EOR.B Dq,<mem> 12652: XEiJ.mpuCycleCount++; 12653: int a = efaMltByte (ea); 12654: mmuWriteByteData (a, z = XEiJ.regRn[qqq] ^ mmuModifyByteSignData (a, XEiJ.regSRS), XEiJ.regSRS); 12655: } 12656: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12657: } 12658: } //irpEorByte 12659: 12660: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12661: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12662: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12663: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12664: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 12665: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 12666: public static void irpEorWord () throws M68kException { 12667: int ea = XEiJ.regOC & 63; 12668: int rrr = XEiJ.regOC & 7; 12669: int mmm = ea >> 3; 12670: if (mmm == XEiJ.MMM_AR) { //CMPM.W (Ar)+,(Aq)+ 12671: XEiJ.mpuCycleCount += 2; 12672: m60Incremented += 2L << (ea << 3); 12673: int a = m60Address = (XEiJ.regRn[ea] += 2) - 2; //このr[ea]はアドレスレジスタ 12674: int y = mmuReadWordSignData (a, XEiJ.regSRS); 12675: int x; 12676: int aqq = XEiJ.regOC >> 9 & 15; 12677: m60Incremented += 2L << (aqq << 3); 12678: a = m60Address = (XEiJ.regRn[aqq] += 2) - 2; 12679: int z = (short) ((x = mmuReadWordSignData (a, XEiJ.regSRS)) - y); 12680: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12681: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12682: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12683: } else { 12684: int qqq = XEiJ.regOC >> 9 & 7; 12685: int z; 12686: if (ea < XEiJ.EA_AR) { //EOR.W Dq,Dr 12687: XEiJ.mpuCycleCount++; 12688: z = XEiJ.regRn[rrr] ^= (char) XEiJ.regRn[qqq]; //0拡張してからEOR 12689: } else { //EOR.W Dq,<mem> 12690: XEiJ.mpuCycleCount++; 12691: int a = efaMltWord (ea); 12692: mmuWriteWordData (a, z = XEiJ.regRn[qqq] ^ mmuModifyWordSignData (a, XEiJ.regSRS), XEiJ.regSRS); 12693: } 12694: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12695: } 12696: } //irpEorWord 12697: 12698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12699: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12700: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12702: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 12703: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 12704: public static void irpEorLong () throws M68kException { 12705: int ea = XEiJ.regOC & 63; 12706: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.L (Ar)+,(Aq)+ 12707: XEiJ.mpuCycleCount += 2; 12708: m60Incremented += 4L << (ea << 3); 12709: int a = m60Address = (XEiJ.regRn[ea] += 4) - 4; //このr[ea]はアドレスレジスタ 12710: int y = mmuReadLongData (a, XEiJ.regSRS); 12711: int x; 12712: int aqq = XEiJ.regOC >> 9 & 15; 12713: m60Incremented += 4L << (aqq << 3); 12714: a = m60Address = (XEiJ.regRn[aqq] += 4) - 4; 12715: int z = (x = mmuReadLongData (a, XEiJ.regSRS)) - y; 12716: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12717: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12718: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12719: } else { 12720: int qqq = XEiJ.regOC >> 9 & 7; 12721: int z; 12722: if (ea < XEiJ.EA_AR) { //EOR.L Dq,Dr 12723: XEiJ.mpuCycleCount++; 12724: XEiJ.regRn[ea] = z = XEiJ.regRn[ea] ^ XEiJ.regRn[qqq]; 12725: } else { //EOR.L Dq,<mem> 12726: XEiJ.mpuCycleCount++; 12727: int a = efaMltLong (ea); 12728: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) ^ XEiJ.regRn[qqq], XEiJ.regSRS); 12729: } 12730: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12731: } 12732: } //irpEorLong 12733: 12734: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12735: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12736: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12737: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12738: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 12739: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 12740: public static void irpCmpaLong () throws M68kException { 12741: XEiJ.mpuCycleCount++; 12742: int ea = XEiJ.regOC & 63; 12743: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 12744: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 12745: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 12746: XEiJ.mpuCycleCount++; 12747: } 12748: int y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12749: int x; 12750: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12751: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12752: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12753: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12754: } //irpCmpaLong 12755: 12756: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12757: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12758: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12759: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12760: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 12761: public static void irpAndToRegByte () throws M68kException { 12762: XEiJ.mpuCycleCount++; 12763: int ea = XEiJ.regOC & 63; 12764: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~255 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS)))]; //ccr_tst_byte。pcbs。イミディエイトを分離。1拡張してからAND 12765: } //irpAndToRegByte 12766: 12767: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12768: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12769: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12770: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12771: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 12772: public static void irpAndToRegWord () throws M68kException { 12773: XEiJ.mpuCycleCount++; 12774: int ea = XEiJ.regOC & 63; 12775: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~65535 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS)); //pcws。イミディエイトを分離。1拡張してからAND 12776: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12777: } //irpAndToRegWord 12778: 12779: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12780: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12781: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12782: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12783: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 12784: public static void irpAndToRegLong () throws M68kException { 12785: XEiJ.mpuCycleCount++; 12786: int ea = XEiJ.regOC & 63; 12787: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //pcls。イミディエイトを分離 12788: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12789: } //irpAndToRegLong 12790: 12791: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12792: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12793: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12794: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12795: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 12796: public static void irpMuluWord () throws M68kException { 12797: XEiJ.mpuCycleCount += 2; 12798: int ea = XEiJ.regOC & 63; 12799: int qqq = XEiJ.regOC >> 9 & 7; 12800: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordZeroData (efaAnyWord (ea), XEiJ.regSRS); //pcwz。イミディエイトを分離 12801: int z; 12802: XEiJ.regRn[qqq] = z = (char) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 12803: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12804: } //irpMuluWord 12805: 12806: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12807: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12808: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12810: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 12811: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 12812: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 12813: public static void irpAndToMemByte () throws M68kException { 12814: int ea = XEiJ.regOC & 63; 12815: if (ea >= XEiJ.EA_MM) { //AND.B Dq,<ea> 12816: XEiJ.mpuCycleCount++; 12817: int a = efaMltByte (ea); 12818: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyByteSignData (a, XEiJ.regSRS); 12819: mmuWriteByteData (a, z, XEiJ.regSRS); 12820: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12821: } else if (ea < XEiJ.EA_AR) { //ABCD.B Dr,Dq 12822: int qqq = XEiJ.regOC >> 9 & 7; 12823: XEiJ.mpuCycleCount++; 12824: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | irpAbcd (XEiJ.regRn[qqq], XEiJ.regRn[ea]); 12825: } else { //ABCD.B -(Ar),-(Aq) 12826: XEiJ.mpuCycleCount += 2; 12827: m60Incremented -= 1L << (ea << 3); 12828: int a = m60Address = --XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12829: int y = mmuReadByteZeroData (a, XEiJ.regSRS); 12830: int aqq = (XEiJ.regOC >> 9) - (96 - 8); 12831: m60Incremented -= 1L << (aqq << 3); 12832: a = m60Address = --XEiJ.regRn[aqq]; 12833: mmuWriteByteData (a, irpAbcd (mmuModifyByteZeroData (a, XEiJ.regSRS), y), XEiJ.regSRS); 12834: } 12835: } //irpAndToMemByte 12836: 12837: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12838: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12839: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12840: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12841: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 12842: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 12843: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 12844: public static void irpAndToMemWord () throws M68kException { 12845: int ea = XEiJ.regOC & 63; 12846: if (ea < XEiJ.EA_MM) { //EXG 12847: XEiJ.mpuCycleCount++; 12848: if (ea < XEiJ.EA_AR) { //EXG.L Dq,Dr 12849: int qqq = XEiJ.regOC >> 9 & 7; 12850: int t = XEiJ.regRn[qqq]; 12851: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; 12852: XEiJ.regRn[ea] = t; 12853: } else { //EXG.L Aq,Ar 12854: int aqq = (XEiJ.regOC >> 9) - (96 - 8); 12855: int t = XEiJ.regRn[aqq]; 12856: XEiJ.regRn[aqq] = XEiJ.regRn[ea]; //このr[ea]アドレスレジスタ 12857: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 12858: } 12859: } else { //AND.W Dq,<ea> 12860: XEiJ.mpuCycleCount++; 12861: int a = efaMltWord (ea); 12862: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & mmuModifyWordSignData (a, XEiJ.regSRS); 12863: mmuWriteWordData (a, z, XEiJ.regSRS); 12864: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12865: } 12866: } //irpAndToMemWord 12867: 12868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12869: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12870: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12871: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12872: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 12873: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 12874: public static void irpAndToMemLong () throws M68kException { 12875: int ea = XEiJ.regOC & 63; 12876: int qqq = XEiJ.regOC >> 9 & 7; 12877: if (ea >> 3 == XEiJ.MMM_AR) { //EXG.L Dq,Ar 12878: XEiJ.mpuCycleCount++; 12879: int t = XEiJ.regRn[qqq]; 12880: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12881: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 12882: } else { //AND.L Dq,<ea> 12883: XEiJ.mpuCycleCount++; 12884: int a = efaMltLong (ea); 12885: int z; 12886: mmuWriteLongData (a, z = mmuModifyLongData (a, XEiJ.regSRS) & XEiJ.regRn[qqq], XEiJ.regSRS); 12887: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12888: } 12889: } //irpAndToMemLong 12890: 12891: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12892: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12893: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12894: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12895: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 12896: public static void irpMulsWord () throws M68kException { 12897: XEiJ.mpuCycleCount += 2; 12898: int ea = XEiJ.regOC & 63; 12899: int qqq = XEiJ.regOC >> 9 & 7; 12900: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //pcws。イミディエイトを分離 12901: int z; 12902: XEiJ.regRn[qqq] = z = (short) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 12903: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12904: } //irpMulsWord 12905: 12906: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12907: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12908: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12909: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12910: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 12911: public static void irpAddToRegByte () throws M68kException { 12912: XEiJ.mpuCycleCount++; 12913: int ea = XEiJ.regOC & 63; 12914: int qqq = XEiJ.regOC >> 9 & 7; 12915: int x, y, z; 12916: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS) : mmuReadByteSignData (efaAnyByte (ea), XEiJ.regSRS); //pcbs。イミディエイトを分離 12917: x = XEiJ.regRn[qqq]; 12918: z = x + y; 12919: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12920: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12921: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 12922: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 12923: } //irpAddToRegByte 12924: 12925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12926: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12927: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12928: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12929: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 12930: public static void irpAddToRegWord () throws M68kException { 12931: XEiJ.mpuCycleCount++; 12932: int ea = XEiJ.regOC & 63; 12933: int qqq = XEiJ.regOC >> 9 & 7; 12934: int x, y, z; 12935: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離 12936: x = XEiJ.regRn[qqq]; 12937: z = x + y; 12938: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12939: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12940: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 12941: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 12942: } //irpAddToRegWord 12943: 12944: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12945: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12946: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12947: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12948: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 12949: public static void irpAddToRegLong () throws M68kException { 12950: XEiJ.mpuCycleCount++; 12951: int ea = XEiJ.regOC & 63; 12952: int qqq = XEiJ.regOC >> 9 & 7; 12953: int x, y, z; 12954: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離 12955: x = XEiJ.regRn[qqq]; 12956: z = x + y; 12957: XEiJ.regRn[qqq] = z; 12958: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12959: ((x ^ z) & (y ^ z)) >> 30 & XEiJ.REG_CCR_V | 12960: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 12961: } //irpAddToRegLong 12962: 12963: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12964: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12965: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12966: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12967: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 12968: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 12969: // 12970: //ADDA.W <ea>,Aq 12971: // ソースを符号拡張してロングで加算する 12972: public static void irpAddaWord () throws M68kException { 12973: XEiJ.mpuCycleCount++; 12974: int ea = XEiJ.regOC & 63; 12975: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 12976: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 12977: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 12978: XEiJ.mpuCycleCount++; 12979: } 12980: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : mmuReadWordSignData (efaAnyWord (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcws。イミディエイトを分離。ここでAqが変化する可能性があることに注意 12981: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 12982: //ccrは変化しない 12983: } //irpAddaWord 12984: 12985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12986: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12987: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12988: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12989: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 12990: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 12991: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 12992: public static void irpAddToMemByte () throws M68kException { 12993: int ea = XEiJ.regOC & 63; 12994: int a, x, y, z; 12995: if (ea < XEiJ.EA_MM) { 12996: if (ea < XEiJ.EA_AR) { //ADDX.B Dr,Dq 12997: int qqq = XEiJ.regOC >> 9 & 7; 12998: XEiJ.mpuCycleCount++; 12999: y = XEiJ.regRn[ea]; 13000: x = XEiJ.regRn[qqq]; 13001: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13002: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 13003: } else { //ADDX.B -(Ar),-(Aq) 13004: XEiJ.mpuCycleCount += 2; 13005: m60Incremented -= 1L << (ea << 3); 13006: a = m60Address = --XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 13007: y = mmuReadByteSignData (a, XEiJ.regSRS); 13008: int aqq = XEiJ.regOC >> 9 & 15; //1qqq=aqq 13009: m60Incremented -= 1L << (aqq << 3); 13010: a = m60Address = --XEiJ.regRn[aqq]; 13011: x = mmuModifyByteSignData (a, XEiJ.regSRS); 13012: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13013: mmuWriteByteData (a, z, XEiJ.regSRS); 13014: } 13015: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 13016: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 13017: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_byte 13018: } else { //ADD.B Dq,<ea> 13019: XEiJ.mpuCycleCount++; 13020: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 13021: a = efaMltByte (ea); 13022: x = mmuModifyByteSignData (a, XEiJ.regSRS); 13023: z = x + y; 13024: mmuWriteByteData (a, z, XEiJ.regSRS); 13025: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 13026: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 13027: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 13028: } 13029: } //irpAddToMemByte 13030: 13031: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13032: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13033: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13034: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13035: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 13036: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 13037: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 13038: public static void irpAddToMemWord () throws M68kException { 13039: int ea = XEiJ.regOC & 63; 13040: int a, x, y, z; 13041: if (ea < XEiJ.EA_MM) { 13042: if (ea < XEiJ.EA_AR) { //ADDX.W Dr,Dq 13043: int qqq = XEiJ.regOC >> 9 & 7; 13044: XEiJ.mpuCycleCount++; 13045: y = XEiJ.regRn[ea]; 13046: x = XEiJ.regRn[qqq]; 13047: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13048: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 13049: } else { //ADDX.W -(Ar),-(Aq) 13050: XEiJ.mpuCycleCount += 2; 13051: m60Incremented -= 2L << (ea << 3); 13052: a = m60Address = XEiJ.regRn[ea] -= 2; //このr[ea]はアドレスレジスタ 13053: y = mmuReadWordSignData (a, XEiJ.regSRS); 13054: int aqq = XEiJ.regOC >> 9 & 15; 13055: m60Incremented -= 2L << (aqq << 3); 13056: a = m60Address = XEiJ.regRn[aqq] -= 2; 13057: x = mmuModifyWordSignData (a, XEiJ.regSRS); 13058: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13059: mmuWriteWordData (a, z, XEiJ.regSRS); 13060: } 13061: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 13062: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13063: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_word 13064: } else { //ADD.W Dq,<ea> 13065: XEiJ.mpuCycleCount++; 13066: a = efaMltWord (ea); 13067: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 13068: x = mmuModifyWordSignData (a, XEiJ.regSRS); 13069: z = x + y; 13070: mmuWriteWordData (a, z, XEiJ.regSRS); 13071: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 13072: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13073: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 13074: } 13075: } //irpAddToMemWord 13076: 13077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13078: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13079: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13080: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13081: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 13082: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 13083: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 13084: public static void irpAddToMemLong () throws M68kException { 13085: int ea = XEiJ.regOC & 63; 13086: if (ea < XEiJ.EA_MM) { 13087: int x; 13088: int y; 13089: int z; 13090: if (ea < XEiJ.EA_AR) { //ADDX.L Dr,Dq 13091: int qqq = XEiJ.regOC >> 9 & 7; 13092: XEiJ.mpuCycleCount++; 13093: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) + (y = XEiJ.regRn[ea]) + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13094: } else { //ADDX.L -(Ar),-(Aq) 13095: XEiJ.mpuCycleCount += 2; 13096: m60Incremented -= 4L << (ea << 3); 13097: int a = m60Address = XEiJ.regRn[ea] -= 4; //このr[ea]はアドレスレジスタ 13098: y = mmuReadLongData (a, XEiJ.regSRS); 13099: int aqq = XEiJ.regOC >> 9 & 15; 13100: m60Incremented -= 4L << (aqq << 3); 13101: a = m60Address = XEiJ.regRn[aqq] -= 4; 13102: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + y + (XEiJ.regCCR >> 4), XEiJ.regSRS); //Xの左側はすべて0なのでCCR_X&を省略 13103: } 13104: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 13105: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13106: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx 13107: } else { //ADD.L Dq,<ea> 13108: XEiJ.mpuCycleCount++; 13109: int a = efaMltLong (ea); 13110: int x; 13111: int y; 13112: int z; 13113: mmuWriteLongData (a, z = (x = mmuModifyLongData (a, XEiJ.regSRS)) + (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]), XEiJ.regSRS); 13114: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13115: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13116: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 13117: } 13118: } //irpAddToMemLong 13119: 13120: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13121: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13122: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13123: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13124: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 13125: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 13126: public static void irpAddaLong () throws M68kException { 13127: int ea = XEiJ.regOC & 63; 13128: XEiJ.mpuCycleCount++; 13129: //ADDA/CMPA/SUBA.wl <ea>,Aqで<ea>が(Ar)+,-(Ar)でAr==Aqのとき1サイクル追加 13130: if (XEiJ.EA_MP <= ea && ea < XEiJ.EA_MW && 13131: (ea & 7) == ((XEiJ.regOC >> 9) & 7)) { 13132: XEiJ.mpuCycleCount++; 13133: } 13134: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : ea == XEiJ.EA_IM ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : mmuReadLongData (efaAnyLong (ea), XEiJ.regSRS); //このr[ea]はデータレジスタまたはアドレスレジスタ。pcls。イミディエイトを分離。ここでAqが変化する可能性があることに注意 13135: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 13136: //ccrは変化しない 13137: } //irpAddaLong 13138: 13139: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13140: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13141: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13142: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13143: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 13144: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 13145: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 13146: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 13147: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 13148: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 13149: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 13150: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 13151: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 13152: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 13153: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 13154: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 13155: // 13156: //ASR.B #<data>,Dr 13157: //ASR.B Dq,Dr 13158: // 算術右シフトバイト 13159: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13160: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13161: // 1 ........................ｱｱｲｳｴｵｶｷ ｸｱ*0ｸ Z=ｱｲｳｴｵｶｷ==0 13162: // 2 ........................ｱｱｱｲｳｴｵｶ ｷｱ*0ｷ Z=ｱｲｳｴｵｶ==0 13163: // 3 ........................ｱｱｱｱｲｳｴｵ ｶｱ*0ｶ Z=ｱｲｳｴｵ==0 13164: // 4 ........................ｱｱｱｱｱｲｳｴ ｵｱ*0ｵ Z=ｱｲｳｴ==0 13165: // 5 ........................ｱｱｱｱｱｱｲｳ ｴｱ*0ｴ Z=ｱｲｳ==0 13166: // 6 ........................ｱｱｱｱｱｱｱｲ ｳｱ*0ｳ Z=ｱｲ==0 13167: // 7 ........................ｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13168: // 8 ........................ｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13169: // CCR 13170: // X countが0のとき変化しない。他は最後に押し出されたビット 13171: // N 結果の最上位ビット 13172: // Z 結果が0のときセット。他はクリア 13173: // V 常にクリア 13174: // C countが0のときクリア。他は最後に押し出されたビット 13175: // 13176: //LSR.B #<data>,Dr 13177: //LSR.B Dq,Dr 13178: // 論理右シフトバイト 13179: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13180: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13181: // 1 ........................0ｱｲｳｴｵｶｷ ｸ0*0ｸ Z=ｱｲｳｴｵｶｷ==0 13182: // 2 ........................00ｱｲｳｴｵｶ ｷ0*0ｷ Z=ｱｲｳｴｵｶ==0 13183: // 3 ........................000ｱｲｳｴｵ ｶ0*0ｶ Z=ｱｲｳｴｵ==0 13184: // 4 ........................0000ｱｲｳｴ ｵ0*0ｵ Z=ｱｲｳｴ==0 13185: // 5 ........................00000ｱｲｳ ｴ0*0ｴ Z=ｱｲｳ==0 13186: // 6 ........................000000ｱｲ ｳ0*0ｳ Z=ｱｲ==0 13187: // 7 ........................0000000ｱ ｲ0*0ｲ Z=ｱ==0 13188: // 8 ........................00000000 ｱ010ｱ 13189: // 9 ........................00000000 00100 13190: // CCR 13191: // X countが0のとき変化しない。他は最後に押し出されたビット 13192: // N 結果の最上位ビット 13193: // Z 結果が0のときセット。他はクリア 13194: // V 常にクリア 13195: // C countが0のときクリア。他は最後に押し出されたビット 13196: // 13197: //ROR.B #<data>,Dr 13198: //ROR.B Dq,Dr 13199: // 右ローテートバイト 13200: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13201: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13202: // 1 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13203: // : 13204: // 7 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸ==0 13205: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13206: // CCR 13207: // X 常に変化しない 13208: // N 結果の最上位ビット 13209: // Z 結果が0のときセット。他はクリア 13210: // V 常にクリア 13211: // C countが0のときクリア。他は結果の最上位ビット 13212: // 13213: //ROXR.B #<data>,Dr 13214: //ROXR.B Dq,Dr 13215: // 拡張右ローテートバイト 13216: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13217: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13218: // 1 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13219: // 2 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13220: // 3 ........................ｷｸXｱｲｳｴｵ ｶｷ*0ｶ Z=ｱｲｳｴｵｷｸX==0 13221: // 4 ........................ｶｷｸXｱｲｳｴ ｵｶ*0ｵ Z=ｱｲｳｴｶｷｸX==0 13222: // 5 ........................ｵｶｷｸXｱｲｳ ｴｵ*0ｴ Z=ｱｲｳｵｶｷｸX==0 13223: // 6 ........................ｴｵｶｷｸXｱｲ ｳｴ*0ｳ Z=ｱｲｴｵｶｷｸX==0 13224: // 7 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13225: // 8 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13226: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13227: // CCR 13228: // X countが0のとき変化しない。他は最後に押し出されたビット 13229: // N 結果の最上位ビット 13230: // Z 結果が0のときセット。他はクリア 13231: // V 常にクリア 13232: // C countが0のときXのコピー。他は最後に押し出されたビット 13233: public static void irpXxrToRegByte () throws M68kException { 13234: int rrr; 13235: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13236: int y; 13237: int z; 13238: int t; 13239: XEiJ.mpuCycleCount++; 13240: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13241: case 0b000_000 >> 3: //ASR.B #<data>,Dr 13242: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13243: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> y) >> 1); 13244: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13245: break; 13246: case 0b001_000 >> 3: //LSR.B #<data>,Dr 13247: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13248: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = (0xff & x) >>> y) >>> 1); 13249: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13250: break; 13251: case 0b010_000 >> 3: //ROXR.B #<data>,Dr 13252: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13253: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13254: if (y == 1 - 1) { //y=data-1=1-1 13255: t = x; 13256: } else { //y=data-1=2-1～8-1 13257: z = x << 9 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13258: } 13259: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13260: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13261: break; 13262: case 0b011_000 >> 3: //ROR.B #<data>,Dr 13263: y = XEiJ.regOC >> 9 & 7; //y=data&7 13264: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13265: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 7 & 1; //Xは変化しない。Cは結果の最上位ビット 13266: break; 13267: case 0b100_000 >> 3: //ASR.B Dq,Dr 13268: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13269: if (y == 0) { //y=data=0 13270: z = (byte) x; 13271: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13272: } else { //y=data=1～63 13273: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> (y <= 8 ? y - 1 : 7)) >> 1); 13274: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13275: } 13276: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13277: break; 13278: case 0b101_000 >> 3: //LSR.B Dq,Dr 13279: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13280: if (y == 0) { //y=data=0 13281: z = (byte) x; 13282: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13283: } else { //y=data=1～63 13284: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = y <= 8 ? (0xff & x) >>> y - 1 : 0) >>> 1); 13285: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13286: } 13287: break; 13288: case 0b110_000 >> 3: //ROXR.B Dq,Dr 13289: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13290: //y %= 9; 13291: y = (y & 7) - (y >> 3); //y=data=-7～7 13292: y += y >> 3 & 9; //y=data=0～8 13293: if (y == 0) { //y=data=0 13294: z = (byte) x; 13295: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13296: } else { //y=data=1～8 13297: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13298: if (y == 1) { //y=data=1 13299: t = x; //Cは最後に押し出されたビット 13300: } else { //y=data=2～8 13301: z = x << 9 - y | (t = z >>> y - 2) >>> 1; 13302: } 13303: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13304: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13305: } 13306: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13307: break; 13308: case 0b111_000 >> 3: //ROR.B Dq,Dr 13309: default: 13310: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13311: if (y == 0) { 13312: z = (byte) x; 13313: t = 0; //Cはクリア 13314: } else { 13315: y &= 7; //y=data=0～7 13316: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13317: t = z >>> 7 & 1; //Cは結果の最上位ビット 13318: } 13319: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13320: } 13321: } //irpXxrToRegByte 13322: 13323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13324: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13325: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13326: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13327: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 13328: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 13329: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 13330: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 13331: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 13332: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 13333: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 13334: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 13335: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 13336: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 13337: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 13338: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 13339: // 13340: //ASR.W #<data>,Dr 13341: //ASR.W Dq,Dr 13342: //ASR.W <ea> 13343: // 算術右シフトワード 13344: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13345: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13346: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13347: // : 13348: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13349: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13350: // CCR 13351: // X countが0のとき変化しない。他は最後に押し出されたビット 13352: // N 結果の最上位ビット 13353: // Z 結果が0のときセット。他はクリア 13354: // V 常にクリア 13355: // C countが0のときクリア。他は最後に押し出されたビット 13356: // 13357: //LSR.W #<data>,Dr 13358: //LSR.W Dq,Dr 13359: //LSR.W <ea> 13360: // 論理右シフトワード 13361: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13362: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13363: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13364: // : 13365: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13366: // 16 ................0000000000000000 ｱ010ｱ 13367: // 17 ................0000000000000000 00100 13368: // CCR 13369: // X countが0のとき変化しない。他は最後に押し出されたビット 13370: // N 結果の最上位ビット 13371: // Z 結果が0のときセット。他はクリア 13372: // V 常にクリア 13373: // C countが0のときクリア。他は最後に押し出されたビット 13374: // 13375: //ROR.W #<data>,Dr 13376: //ROR.W Dq,Dr 13377: //ROR.W <ea> 13378: // 右ローテートワード 13379: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13380: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13381: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13382: // : 13383: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13384: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13385: // CCR 13386: // X 常に変化しない 13387: // N 結果の最上位ビット 13388: // Z 結果が0のときセット。他はクリア 13389: // V 常にクリア 13390: // C countが0のときクリア。他は結果の最上位ビット 13391: // 13392: //ROXR.W #<data>,Dr 13393: //ROXR.W Dq,Dr 13394: //ROXR.W <ea> 13395: // 拡張右ローテートワード 13396: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13397: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13398: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 13399: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 13400: // : 13401: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13402: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13403: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13404: // CCR 13405: // X countが0のとき変化しない。他は最後に押し出されたビット 13406: // N 結果の最上位ビット 13407: // Z 結果が0のときセット。他はクリア 13408: // V 常にクリア 13409: // C countが0のときXのコピー。他は最後に押し出されたビット 13410: public static void irpXxrToRegWord () throws M68kException { 13411: int rrr; 13412: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13413: int y; 13414: int z; 13415: int t; 13416: XEiJ.mpuCycleCount++; 13417: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13418: case 0b000_000 >> 3: //ASR.W #<data>,Dr 13419: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13420: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> y) >> 1); 13421: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13422: break; 13423: case 0b001_000 >> 3: //LSR.W #<data>,Dr 13424: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13425: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = (char) x >>> y) >>> 1); 13426: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13427: break; 13428: case 0b010_000 >> 3: //ROXR.W #<data>,Dr 13429: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13430: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13431: if (y == 1 - 1) { //y=data-1=1-1 13432: t = x; 13433: } else { //y=data-1=2-1～8-1 13434: z = x << 17 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13435: } 13436: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13437: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13438: break; 13439: case 0b011_000 >> 3: //ROR.W #<data>,Dr 13440: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13441: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - 1 - y | (char) x >>> y + 1)); 13442: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 15 & 1; //Xは変化しない。Cは結果の最上位ビット 13443: break; 13444: case 0b100_000 >> 3: //ASR.W Dq,Dr 13445: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13446: if (y == 0) { //y=data=0 13447: z = (short) x; 13448: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13449: } else { //y=data=1～63 13450: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> (y <= 16 ? y - 1 : 15)) >> 1); 13451: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13452: } 13453: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13454: break; 13455: case 0b101_000 >> 3: //LSR.W Dq,Dr 13456: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13457: if (y == 0) { //y=data=0 13458: z = (short) x; 13459: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13460: } else { //y=data=1～63 13461: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = y <= 16 ? (char) x >>> y - 1 : 0) >>> 1); 13462: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13463: } 13464: break; 13465: case 0b110_000 >> 3: //ROXR.W Dq,Dr 13466: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13467: //y %= 17; 13468: y = (y & 15) - (y >> 4); //y=data=-3～15 13469: y += y >> 4 & 17; //y=data=0～16 13470: if (y == 0) { //y=data=0 13471: z = (short) x; 13472: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13473: } else { //y=data=1～16 13474: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13475: if (y == 1) { //y=data=1 13476: t = x; //Cは最後に押し出されたビット 13477: } else { //y=data=2～16 13478: z = x << 17 - y | (t = z >>> y - 2) >>> 1; 13479: } 13480: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13481: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13482: } 13483: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13484: break; 13485: case 0b111_000 >> 3: //ROR.W Dq,Dr 13486: default: 13487: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13488: if (y == 0) { 13489: z = (short) x; 13490: t = 0; //Cはクリア 13491: } else { 13492: y &= 15; //y=data=0～15 13493: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - y | (char) x >>> y)); 13494: t = z >>> 15 & 1; //Cは結果の最上位ビット 13495: } 13496: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13497: } 13498: } //irpXxrToRegWord 13499: 13500: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13501: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13502: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13504: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 13505: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 13506: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 13507: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 13508: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 13509: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 13510: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 13511: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 13512: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 13513: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 13514: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 13515: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 13516: // 13517: //ASR.L #<data>,Dr 13518: //ASR.L Dq,Dr 13519: // 算術右シフトロング 13520: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13521: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13522: // 1 ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13523: // : 13524: // 31 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13525: // 32 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13526: // CCR 13527: // X countが0のとき変化しない。他は最後に押し出されたビット 13528: // N 結果の最上位ビット 13529: // Z 結果が0のときセット。他はクリア 13530: // V 常にクリア 13531: // C countが0のときクリア。他は最後に押し出されたビット 13532: // 13533: //LSR.L #<data>,Dr 13534: //LSR.L Dq,Dr 13535: // 論理右シフトロング 13536: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13537: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13538: // 1 0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐ0*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13539: // : 13540: // 31 0000000000000000000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13541: // 32 00000000000000000000000000000000 ｱ010ｱ 13542: // 33 00000000000000000000000000000000 00100 13543: // CCR 13544: // X countが0のとき変化しない。他は最後に押し出されたビット 13545: // N 結果の最上位ビット 13546: // Z 結果が0のときセット。他はクリア 13547: // V 常にクリア 13548: // C countが0のときクリア。他は最後に押し出されたビット 13549: // 13550: //ROR.L #<data>,Dr 13551: //ROR.L Dq,Dr 13552: // 右ローテートロング 13553: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13554: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13555: // 1 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13556: // : 13557: // 31 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13558: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13559: // CCR 13560: // X 常に変化しない 13561: // N 結果の最上位ビット 13562: // Z 結果が0のときセット。他はクリア 13563: // V 常にクリア 13564: // C countが0のときクリア。他は結果の最上位ビット 13565: // 13566: //ROXR.L #<data>,Dr 13567: //ROXR.L Dq,Dr 13568: // 拡張右ローテートロング 13569: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13570: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13571: // 1 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 13572: // 2 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 13573: // : 13574: // 31 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13575: // 32 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13576: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13577: // CCR 13578: // X countが0のとき変化しない。他は最後に押し出されたビット 13579: // N 結果の最上位ビット 13580: // Z 結果が0のときセット。他はクリア 13581: // V 常にクリア 13582: // C countが0のときXのコピー。他は最後に押し出されたビット 13583: public static void irpXxrToRegLong () throws M68kException { 13584: int rrr; 13585: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13586: int y; 13587: int z; 13588: int t; 13589: XEiJ.mpuCycleCount++; 13590: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13591: case 0b000_000 >> 3: //ASR.L #<data>,Dr 13592: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13593: XEiJ.regRn[rrr] = z = (t = x >> y) >> 1; 13594: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13595: break; 13596: case 0b001_000 >> 3: //LSR.L #<data>,Dr 13597: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13598: XEiJ.regRn[rrr] = z = (t = x >>> y) >>> 1; 13599: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13600: break; 13601: case 0b010_000 >> 3: //ROXR.L #<data>,Dr 13602: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13603: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13604: if (y == 1 - 1) { //y=data-1=1-1 13605: t = x; 13606: } else { //y=data-1=2-1～8-1 13607: z = x << -y | (t = z >>> y - (2 - 1)) >>> 1; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 13608: } 13609: XEiJ.regRn[rrr] = z; 13610: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13611: break; 13612: case 0b011_000 >> 3: //ROR.L #<data>,Dr 13613: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13614: XEiJ.regRn[rrr] = z = x << ~y | x >>> y + 1; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 13615: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 31; //Xは変化しない。Cは結果の最上位ビット 13616: break; 13617: case 0b100_000 >> 3: //ASR.L Dq,Dr 13618: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13619: if (y == 0) { //y=data=0 13620: z = x; 13621: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13622: } else { //y=data=1～63 13623: XEiJ.regRn[rrr] = z = (t = x >> (y <= 32 ? y - 1 : 31)) >> 1; 13624: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13625: } 13626: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13627: break; 13628: case 0b101_000 >> 3: //LSR.L Dq,Dr 13629: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13630: if (y == 0) { //y=data=0 13631: z = x; 13632: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13633: } else { //y=data=1～63 13634: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x >>> y - 1 : 0) >>> 1; 13635: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13636: } 13637: break; 13638: case 0b110_000 >> 3: //ROXR.L Dq,Dr 13639: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13640: //y %= 33; 13641: y -= 32 - y >> 6 & 33; //y=data=0～32 13642: if (y == 0) { //y=data=0 13643: z = x; 13644: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13645: } else { //y=data=1～32 13646: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13647: if (y == 1) { //y=data=1 13648: t = x; //Cは最後に押し出されたビット 13649: } else { //y=data=2～32 13650: z = x << 33 - y | (t = z >>> y - 2) >>> 1; 13651: } 13652: XEiJ.regRn[rrr] = z; 13653: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13654: } 13655: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13656: break; 13657: case 0b111_000 >> 3: //ROR.L Dq,Dr 13658: default: 13659: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13660: if (y == 0) { 13661: z = x; 13662: t = 0; //Cはクリア 13663: } else { 13664: y &= 31; //y=data=0～31 13665: XEiJ.regRn[rrr] = z = x << -y | x >>> y; //Javaのシフト演算子は5ビットでマスクされるので32-yを-yに省略。y=32のときx|xになるが問題ない 13666: t = z >>> 31; //Cは結果の最上位ビット 13667: } 13668: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13669: } 13670: } //irpXxrToRegLong 13671: 13672: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13673: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13674: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13675: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13676: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 13677: // 13678: //ASR.W #<data>,Dr 13679: //ASR.W Dq,Dr 13680: //ASR.W <ea> 13681: // 算術右シフトワード 13682: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13683: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13684: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13685: // : 13686: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13687: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13688: // CCR 13689: // X countが0のとき変化しない。他は最後に押し出されたビット 13690: // N 結果の最上位ビット 13691: // Z 結果が0のときセット。他はクリア 13692: // V 常にクリア 13693: // C countが0のときクリア。他は最後に押し出されたビット 13694: public static void irpAsrToMem () throws M68kException { 13695: XEiJ.mpuCycleCount++; 13696: int ea = XEiJ.regOC & 63; 13697: int a = efaMltWord (ea); 13698: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 13699: int z = x >> 1; 13700: mmuWriteWordData (a, z, XEiJ.regSRS); 13701: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 13702: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13703: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 13704: } //irpAsrToMem 13705: 13706: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13707: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13708: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13709: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13710: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 13711: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 13712: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 13713: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 13714: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 13715: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 13716: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 13717: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 13718: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 13719: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 13720: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 13721: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 13722: // 13723: //ASL.B #<data>,Dr 13724: //ASL.B Dq,Dr 13725: // 算術左シフトバイト 13726: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13727: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13728: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸ==0,V=ｱｲ!=0/-1 13729: // : 13730: // 7 ........................ｸ0000000 ｷｸ**ｷ Z=ｸ==0,V=ｱｲｳｴｵｶｷｸ!=0/-1 13731: // 8 ........................00000000 ｸ01*ｸ V=ｱｲｳｴｵｶｷｸ!=0 13732: // 9 ........................00000000 001*0 V=ｱｲｳｴｵｶｷｸ!=0 13733: // CCR 13734: // X countが0のとき変化しない。他は最後に押し出されたビット 13735: // N 結果の最上位ビット 13736: // Z 結果が0のときセット。他はクリア 13737: // V ASRで元に戻せないときセット。他はクリア 13738: // C countが0のときクリア。他は最後に押し出されたビット 13739: // 13740: //LSL.B #<data>,Dr 13741: //LSL.B Dq,Dr 13742: // 論理左シフトバイト 13743: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13744: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13745: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸ==0 13746: // : 13747: // 7 ........................ｸ0000000 ｷｸ*0ｷ Z=ｸ==0 13748: // 8 ........................00000000 ｸ010ｸ 13749: // 9 ........................00000000 00100 13750: // CCR 13751: // X countが0のとき変化しない。他は最後に押し出されたビット 13752: // N 結果の最上位ビット 13753: // Z 結果が0のときセット。他はクリア 13754: // V 常にクリア 13755: // C countが0のときクリア。他は最後に押し出されたビット 13756: // 13757: //ROL.B #<data>,Dr 13758: //ROL.B Dq,Dr 13759: // 左ローテートバイト 13760: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13761: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13762: // 1 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13763: // : 13764: // 7 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｷ Z=ｱｲｳｴｵｶｷｸ==0 13765: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13766: // CCR 13767: // X 常に変化しない 13768: // N 結果の最上位ビット 13769: // Z 結果が0のときセット。他はクリア 13770: // V 常にクリア 13771: // C countが0のときクリア。他は結果の最下位ビット 13772: // 13773: //ROXL.B #<data>,Dr 13774: //ROXL.B Dq,Dr 13775: // 拡張左ローテートバイト 13776: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13777: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13778: // 1 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13779: // 2 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13780: // : 13781: // 7 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13782: // 8 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13783: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13784: // CCR 13785: // X countが0のとき変化しない。他は最後に押し出されたビット 13786: // N 結果の最上位ビット 13787: // Z 結果が0のときセット。他はクリア 13788: // V 常にクリア 13789: // C countが0のときXのコピー。他は最後に押し出されたビット 13790: public static void irpXxlToRegByte () throws M68kException { 13791: int rrr; 13792: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13793: int y; 13794: int z; 13795: int t; 13796: XEiJ.mpuCycleCount++; 13797: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13798: case 0b000_000 >> 3: //ASL.B #<data>,Dr 13799: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13800: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13801: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13802: break; 13803: case 0b001_000 >> 3: //LSL.B #<data>,Dr 13804: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13805: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13806: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13807: break; 13808: case 0b010_000 >> 3: //ROXL.B #<data>,Dr 13809: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13810: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13811: if (y == 1 - 1) { //y=data-1=1-1 13812: t = x; 13813: } else { //y=data-1=2-1～8-1 13814: z = (t = z << y - (2 - 1)) << 1 | (0xff & x) >>> 9 - 1 - y; 13815: } 13816: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13817: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13818: break; 13819: case 0b011_000 >> 3: //ROL.B #<data>,Dr 13820: y = XEiJ.regOC >> 9 & 7; //y=data&7 13821: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 13822: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 13823: break; 13824: case 0b100_000 >> 3: //ASL.B Dq,Dr 13825: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13826: if (y <= 7) { //y=data=0～7 13827: if (y == 0) { //y=data=0 13828: z = (byte) x; 13829: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 13830: } else { //y=data=1～7 13831: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y - 1) << 1)); 13832: t = (z >> y != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13833: } 13834: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13835: } else { //y=data=8～63 13836: XEiJ.regRn[rrr] = ~0xff & x; 13837: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((byte) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 8 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 13838: } 13839: break; 13840: case 0b101_000 >> 3: //LSL.B Dq,Dr 13841: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13842: if (y == 0) { //y=data=0 13843: z = (byte) x; 13844: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13845: } else { //y=data=1～63 13846: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = y <= 8 ? x << y - 1 : 0) << 1)); 13847: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13848: } 13849: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13850: break; 13851: case 0b110_000 >> 3: //ROXL.B Dq,Dr 13852: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13853: //y %= 9; 13854: y = (y & 7) - (y >> 3); //y=data=-7～7 13855: y += y >> 3 & 9; //y=data=0～8 13856: if (y == 0) { //y=data=0 13857: z = (byte) x; 13858: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13859: } else { //y=data=1～8 13860: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13861: if (y == 1) { //y=data=1 13862: t = x; //Cは最後に押し出されたビット 13863: } else { //y=data=2～8 13864: z = (t = z << y - 2) << 1 | (0xff & x) >>> 9 - y; 13865: } 13866: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13867: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13868: } 13869: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13870: break; 13871: case 0b111_000 >> 3: //ROL.B Dq,Dr 13872: default: 13873: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13874: if (y == 0) { 13875: z = (byte) x; 13876: t = 0; //Cはクリア 13877: } else { 13878: y &= 7; //y=data=0～7 13879: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 13880: t = z & 1; //Cは結果の最下位ビット 13881: } 13882: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13883: } 13884: } //irpXxlToRegByte 13885: 13886: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13887: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13888: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13889: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13890: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 13891: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 13892: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 13893: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 13894: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 13895: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 13896: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 13897: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 13898: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 13899: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 13900: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 13901: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 13902: // 13903: //ASL.W #<data>,Dr 13904: //ASL.W Dq,Dr 13905: //ASL.W <ea> 13906: // 算術左シフトワード 13907: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13908: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13909: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 13910: // : 13911: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 13912: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 13913: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 13914: // CCR 13915: // X countが0のとき変化しない。他は最後に押し出されたビット 13916: // N 結果の最上位ビット 13917: // Z 結果が0のときセット。他はクリア 13918: // V ASRで元に戻せないときセット。他はクリア 13919: // C countが0のときクリア。他は最後に押し出されたビット 13920: // 13921: //LSL.W #<data>,Dr 13922: //LSL.W Dq,Dr 13923: //LSL.W <ea> 13924: // 論理左シフトワード 13925: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13926: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13927: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13928: // : 13929: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 13930: // 16 ................0000000000000000 ﾀ010ﾀ 13931: // 17 ................0000000000000000 00100 13932: // CCR 13933: // X countが0のとき変化しない。他は最後に押し出されたビット 13934: // N 結果の最上位ビット 13935: // Z 結果が0のときセット。他はクリア 13936: // V 常にクリア 13937: // C countが0のときクリア。他は最後に押し出されたビット 13938: // 13939: //ROL.W #<data>,Dr 13940: //ROL.W Dq,Dr 13941: //ROL.W <ea> 13942: // 左ローテートワード 13943: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13944: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13945: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13946: // : 13947: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13948: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13949: // CCR 13950: // X 常に変化しない 13951: // N 結果の最上位ビット 13952: // Z 結果が0のときセット。他はクリア 13953: // V 常にクリア 13954: // C countが0のときクリア。他は結果の最下位ビット 13955: // 13956: //ROXL.W #<data>,Dr 13957: //ROXL.W Dq,Dr 13958: //ROXL.W <ea> 13959: // 拡張左ローテートワード 13960: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13961: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13962: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13963: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13964: // : 13965: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 13966: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 13967: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13968: // CCR 13969: // X countが0のとき変化しない。他は最後に押し出されたビット 13970: // N 結果の最上位ビット 13971: // Z 結果が0のときセット。他はクリア 13972: // V 常にクリア 13973: // C countが0のときXのコピー。他は最後に押し出されたビット 13974: public static void irpXxlToRegWord () throws M68kException { 13975: int rrr; 13976: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13977: int y; 13978: int z; 13979: int t; 13980: XEiJ.mpuCycleCount++; 13981: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13982: case 0b000_000 >> 3: //ASL.W #<data>,Dr 13983: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13984: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 13985: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13986: break; 13987: case 0b001_000 >> 3: //LSL.W #<data>,Dr 13988: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13989: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 13990: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13991: break; 13992: case 0b010_000 >> 3: //ROXL.W #<data>,Dr 13993: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 13994: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13995: if (y == 1 - 1) { //y=data-1=1-1 13996: t = x; 13997: } else { //y=data-1=2-1～8-1 13998: z = (t = z << y - (2 - 1)) << 1 | (char) x >>> 17 - 1 - y; 13999: } 14000: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 14001: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14002: break; 14003: case 0b011_000 >> 3: //ROL.W #<data>,Dr 14004: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14005: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y + 1 | (char) x >>> 16 - 1 - y)); 14006: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 14007: break; 14008: case 0b100_000 >> 3: //ASL.W Dq,Dr 14009: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14010: if (y <= 15) { //y=data=0～15 14011: if (y == 0) { //y=data=0 14012: z = (short) x; 14013: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 14014: } else { //y=data=1～15 14015: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y - 1) << 1)); 14016: t = (z >> y != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14017: } 14018: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14019: } else { //y=data=16～63 14020: XEiJ.regRn[rrr] = ~0xffff & x; 14021: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((short) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 16 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 14022: } 14023: break; 14024: case 0b101_000 >> 3: //LSL.W Dq,Dr 14025: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14026: if (y == 0) { //y=data=0 14027: z = (short) x; 14028: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 14029: } else { //y=data=1～63 14030: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = y <= 16 ? x << y - 1 : 0) << 1)); 14031: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14032: } 14033: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14034: break; 14035: case 0b110_000 >> 3: //ROXL.W Dq,Dr 14036: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14037: //y %= 17; 14038: y = (y & 15) - (y >> 4); //y=data=-3～15 14039: y += y >> 4 & 17; //y=data=0～16 14040: if (y == 0) { //y=data=0 14041: z = (short) x; 14042: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 14043: } else { //y=data=1～16 14044: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14045: if (y == 1) { //y=data=1 14046: t = x; //Cは最後に押し出されたビット 14047: } else { //y=data=2～16 14048: z = (t = z << y - 2) << 1 | (char) x >>> 17 - y; 14049: } 14050: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 14051: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14052: } 14053: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14054: break; 14055: case 0b111_000 >> 3: //ROL.W Dq,Dr 14056: default: 14057: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14058: if (y == 0) { 14059: z = (short) x; 14060: t = 0; //Cはクリア 14061: } else { 14062: y &= 15; //y=data=0～15 14063: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y | (char) x >>> 16 - y)); 14064: t = z & 1; //Cは結果の最下位ビット 14065: } 14066: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14067: } 14068: } //irpXxlToRegWord 14069: 14070: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14071: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14072: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14073: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14074: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 14075: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 14076: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 14077: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 14078: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 14079: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 14080: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 14081: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 14082: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 14083: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 14084: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 14085: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 14086: // 14087: //ASL.L #<data>,Dr 14088: //ASL.L Dq,Dr 14089: // 算術左シフトロング 14090: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14091: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ**0 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14092: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0,V=ｱｲ!=0/-1 14093: // : 14094: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ**ﾏ Z=ﾐ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0/-1 14095: // 32 00000000000000000000000000000000 ﾐ01*ﾐ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14096: // 33 00000000000000000000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14097: // CCR 14098: // X countが0のとき変化しない。他は最後に押し出されたビット 14099: // N 結果の最上位ビット 14100: // Z 結果が0のときセット。他はクリア 14101: // V ASRで元に戻せないときセット。他はクリア 14102: // C countが0のときクリア。他は最後に押し出されたビット 14103: // 14104: //LSL.L #<data>,Dr 14105: //LSL.L Dq,Dr 14106: // 論理左シフトロング 14107: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14108: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14109: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14110: // : 14111: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ*0ﾏ Z=ﾐ==0 14112: // 32 00000000000000000000000000000000 ﾐ010ﾐ 14113: // 33 00000000000000000000000000000000 00100 14114: // CCR 14115: // X countが0のとき変化しない。他は最後に押し出されたビット 14116: // N 結果の最上位ビット 14117: // Z 結果が0のときセット。他はクリア 14118: // V 常にクリア 14119: // C countが0のときクリア。他は最後に押し出されたビット 14120: // 14121: //ROL.L #<data>,Dr 14122: //ROL.L Dq,Dr 14123: // 左ローテートロング 14124: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14125: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14126: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14127: // : 14128: // 31 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14129: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14130: // CCR 14131: // X 常に変化しない 14132: // N 結果の最上位ビット 14133: // Z 結果が0のときセット。他はクリア 14134: // V 常にクリア 14135: // C countが0のときクリア。他は結果の最下位ビット 14136: // 14137: //ROXL.L #<data>,Dr 14138: //ROXL.L Dq,Dr 14139: // 拡張左ローテートロング 14140: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14141: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14142: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14143: // 2 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14144: // : 14145: // 31 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 14146: // 32 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 14147: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14148: // CCR 14149: // X countが0のとき変化しない。他は最後に押し出されたビット 14150: // N 結果の最上位ビット 14151: // Z 結果が0のときセット。他はクリア 14152: // V 常にクリア 14153: // C countが0のときXのコピー。他は最後に押し出されたビット 14154: public static void irpXxlToRegLong () throws M68kException { 14155: int rrr; 14156: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 14157: int y; 14158: int z; 14159: int t; 14160: XEiJ.mpuCycleCount++; 14161: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 14162: case 0b000_000 >> 3: //ASL.L #<data>,Dr 14163: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14164: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14165: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14166: break; 14167: case 0b001_000 >> 3: //LSL.L #<data>,Dr 14168: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14169: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14170: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14171: break; 14172: case 0b010_000 >> 3: //ROXL.L #<data>,Dr 14173: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14174: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14175: if (y == 1 - 1) { //y=data-1=1-1 14176: t = x; 14177: } else { //y=data-1=2-1～8-1 14178: z = (t = z << y - (2 - 1)) << 1 | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 14179: } 14180: XEiJ.regRn[rrr] = z; 14181: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14182: break; 14183: case 0b011_000 >> 3: //ROL.L #<data>,Dr 14184: y = (XEiJ.regOC >> 9) - 1 & 7; //y=data-1=1-1～8-1 14185: XEiJ.regRn[rrr] = z = x << y + 1 | x >>> ~y; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 14186: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 14187: break; 14188: case 0b100_000 >> 3: //ASL.L Dq,Dr 14189: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14190: if (y <= 31) { //y=data=0～31 14191: if (y == 0) { //y=data=0 14192: z = x; 14193: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 14194: } else { //y=data=1～31 14195: XEiJ.regRn[rrr] = z = (t = x << y - 1) << 1; 14196: t = (z >> y != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14197: } 14198: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14199: } else { //y=data=32～63 14200: XEiJ.regRn[rrr] = 0; 14201: XEiJ.regCCR = XEiJ.REG_CCR_Z | (x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 32 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 14202: } 14203: break; 14204: case 0b101_000 >> 3: //LSL.L Dq,Dr 14205: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14206: if (y == 0) { //y=data=0 14207: z = x; 14208: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 14209: } else { //y=data=1～63 14210: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x << y - 1 : 0) << 1; 14211: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14212: } 14213: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14214: break; 14215: case 0b110_000 >> 3: //ROXL.L Dq,Dr 14216: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14217: //y %= 33; 14218: y -= 32 - y >> 6 & 33; //y=data=0～32 14219: if (y == 0) { //y=data=0 14220: z = x; 14221: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 14222: } else { //y=data=1～32 14223: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14224: if (y == 1) { //y=data=1 14225: t = x; //Cは最後に押し出されたビット 14226: } else { //y=data=2～32 14227: z = (t = z << y - 2) << 1 | x >>> 33 - y; 14228: } 14229: XEiJ.regRn[rrr] = z; 14230: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14231: } 14232: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14233: break; 14234: case 0b111_000 >> 3: //ROL.L Dq,Dr 14235: default: 14236: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14237: if (y == 0) { 14238: z = x; 14239: t = 0; //Cはクリア 14240: } else { 14241: XEiJ.regRn[rrr] = z = x << y | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるのでy&31をyに、32-(y&31)を-yに省略。y=32のときx|xになるが問題ない 14242: t = z & 1; 14243: } 14244: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14245: } 14246: } //irpXxlToRegLong 14247: 14248: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14249: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14250: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14251: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14252: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 14253: // 14254: //ASL.W #<data>,Dr 14255: //ASL.W Dq,Dr 14256: //ASL.W <ea> 14257: // 算術左シフトワード 14258: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14259: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14260: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 14261: // : 14262: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 14263: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14264: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14265: // CCR 14266: // X countが0のとき変化しない。他は最後に押し出されたビット 14267: // N 結果の最上位ビット 14268: // Z 結果が0のときセット。他はクリア 14269: // V ASRで元に戻せないときセット。他はクリア 14270: // C countが0のときクリア。他は最後に押し出されたビット 14271: public static void irpAslToMem () throws M68kException { 14272: XEiJ.mpuCycleCount++; 14273: int ea = XEiJ.regOC & 63; 14274: int a = efaMltWord (ea); 14275: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 14276: int z = (short) (x << 1); 14277: mmuWriteWordData (a, z, XEiJ.regSRS); 14278: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14279: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14280: (x ^ z) >>> 31 << 1 | //Vは最上位ビットが変化したときセット 14281: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14282: } //irpAslToMem 14283: 14284: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14285: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14286: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14287: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14288: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 14289: // 14290: //LSR.W #<data>,Dr 14291: //LSR.W Dq,Dr 14292: //LSR.W <ea> 14293: // 論理右シフトワード 14294: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14295: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14296: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 14297: // : 14298: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 14299: // 16 ................0000000000000000 ｱ010ｱ 14300: // 17 ................0000000000000000 00100 14301: // CCR 14302: // X countが0のとき変化しない。他は最後に押し出されたビット 14303: // N 結果の最上位ビット 14304: // Z 結果が0のときセット。他はクリア 14305: // V 常にクリア 14306: // C countが0のときクリア。他は最後に押し出されたビット 14307: public static void irpLsrToMem () throws M68kException { 14308: XEiJ.mpuCycleCount++; 14309: int ea = XEiJ.regOC & 63; 14310: int a = efaMltWord (ea); 14311: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14312: int z = x >>> 1; 14313: mmuWriteWordData (a, z, XEiJ.regSRS); 14314: XEiJ.regCCR = ((z == 0 ? XEiJ.REG_CCR_Z : 0) | 14315: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14316: } //irpLsrToMem 14317: 14318: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14319: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14320: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14322: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 14323: // 14324: //LSL.W #<data>,Dr 14325: //LSL.W Dq,Dr 14326: //LSL.W <ea> 14327: // 論理左シフトワード 14328: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14329: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14330: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14331: // : 14332: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 14333: // 16 ................0000000000000000 ﾀ010ﾀ 14334: // 17 ................0000000000000000 00100 14335: // CCR 14336: // X countが0のとき変化しない。他は最後に押し出されたビット 14337: // N 結果の最上位ビット 14338: // Z 結果が0のときセット。他はクリア 14339: // V 常にクリア 14340: // C countが0のときクリア。他は最後に押し出されたビット 14341: public static void irpLslToMem () throws M68kException { 14342: XEiJ.mpuCycleCount++; 14343: int ea = XEiJ.regOC & 63; 14344: int a = efaMltWord (ea); 14345: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 14346: int z = (short) (x << 1); 14347: mmuWriteWordData (a, z, XEiJ.regSRS); 14348: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14349: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14350: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14351: } //irpLslToMem 14352: 14353: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14354: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14355: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14356: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14357: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 14358: // 14359: //ROXR.W #<data>,Dr 14360: //ROXR.W Dq,Dr 14361: //ROXR.W <ea> 14362: // 拡張右ローテートワード 14363: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14364: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14365: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14366: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14367: // : 14368: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14369: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14370: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14371: // CCR 14372: // X countが0のとき変化しない。他は最後に押し出されたビット 14373: // N 結果の最上位ビット 14374: // Z 結果が0のときセット。他はクリア 14375: // V 常にクリア 14376: // C countが0のときXのコピー。他は最後に押し出されたビット 14377: public static void irpRoxrToMem () throws M68kException { 14378: XEiJ.mpuCycleCount++; 14379: int ea = XEiJ.regOC & 63; 14380: int a = efaMltWord (ea); 14381: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14382: int z = -(XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | x >>> 1; 14383: mmuWriteWordData (a, z, XEiJ.regSRS); 14384: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14385: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14386: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14387: } //irpRoxrToMem 14388: 14389: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14390: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14391: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14392: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14393: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 14394: // 14395: //ROXL.W #<data>,Dr 14396: //ROXL.W Dq,Dr 14397: //ROXL.W <ea> 14398: // 拡張左ローテートワード 14399: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14400: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14401: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14402: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14403: // : 14404: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14405: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14406: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14407: // CCR 14408: // X countが0のとき変化しない。他は最後に押し出されたビット 14409: // N 結果の最上位ビット 14410: // Z 結果が0のときセット。他はクリア 14411: // V 常にクリア 14412: // C countが0のときXのコピー。他は最後に押し出されたビット 14413: public static void irpRoxlToMem () throws M68kException { 14414: XEiJ.mpuCycleCount++; 14415: int ea = XEiJ.regOC & 63; 14416: int a = efaMltWord (ea); 14417: int x = mmuModifyWordSignData (a, XEiJ.regSRS); 14418: int z = (short) (x << 1 | XEiJ.regCCR >> 4 & 1); 14419: mmuWriteWordData (a, z, XEiJ.regSRS); 14420: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14421: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14422: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14423: } //irpRoxlToMem 14424: 14425: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14426: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14427: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14428: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14429: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 14430: // 14431: //ROR.W #<data>,Dr 14432: //ROR.W Dq,Dr 14433: //ROR.W <ea> 14434: // 右ローテートワード 14435: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14436: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14437: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14438: // : 14439: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14440: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14441: // CCR 14442: // X 常に変化しない 14443: // N 結果の最上位ビット 14444: // Z 結果が0のときセット。他はクリア 14445: // V 常にクリア 14446: // C countが0のときクリア。他は結果の最上位ビット 14447: public static void irpRorToMem () throws M68kException { 14448: XEiJ.mpuCycleCount++; 14449: int ea = XEiJ.regOC & 63; 14450: int a = efaMltWord (ea); 14451: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14452: int z = (short) (x << 15 | x >>> 1); 14453: mmuWriteWordData (a, z, XEiJ.regSRS); 14454: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14455: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14456: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14457: z >>> 31); //Cは結果の最上位ビット 14458: } //irpRorToMem 14459: 14460: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14461: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14462: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14463: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14464: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 14465: // 14466: //ROL.W #<data>,Dr 14467: //ROL.W Dq,Dr 14468: //ROL.W <ea> 14469: // 左ローテートワード 14470: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14471: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14472: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14473: // : 14474: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14475: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14476: // CCR 14477: // X 常に変化しない 14478: // N 結果の最上位ビット 14479: // Z 結果が0のときセット。他はクリア 14480: // V 常にクリア 14481: // C countが0のときクリア。他は結果の最下位ビット 14482: public static void irpRolToMem () throws M68kException { 14483: XEiJ.mpuCycleCount++; 14484: int ea = XEiJ.regOC & 63; 14485: int a = efaMltWord (ea); 14486: int x = mmuModifyWordZeroData (a, XEiJ.regSRS); 14487: int z = (short) (x << 1 | x >>> 15); 14488: mmuWriteWordData (a, z, XEiJ.regSRS); 14489: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14490: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14491: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14492: z & 1); //Cは結果の最下位ビット 14493: } //irpRolToMem 14494: 14495: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14496: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14497: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14498: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14499: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 14500: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 14501: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 14502: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 14503: public static void irpBftst () throws M68kException { 14504: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14505: if ((w & ~0b0000_111_111_111_111) != 0 || 14506: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14507: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14508: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14509: throw M68kException.m6eSignal; 14510: } 14511: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14512: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14513: XEiJ.mpuCycleCount += 6; 14514: int ea = XEiJ.regOC & 63; 14515: int z; 14516: if (ea < XEiJ.EA_AR) { //BFTST Dr{～} 14517: z = XEiJ.regRn[ea]; 14518: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14519: } else { //BFTST <mem>{～} 14520: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14521: o &= 7; 14522: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14523: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o : //不要なバイトにアクセスしない 14524: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o : //020以上なのでアドレスエラーは出ない 14525: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o : 14526: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o : 14527: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o); 14528: } 14529: z >>= w; //符号拡張。下位のゴミを消す 14530: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14531: } //irpBftst 14532: 14533: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14534: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14535: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14536: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14537: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 14538: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 14539: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 14540: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 14541: public static void irpBfextu () throws M68kException { 14542: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14543: if ((w & ~0b0111_111_111_111_111) != 0 || 14544: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14545: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14546: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14547: throw M68kException.m6eSignal; 14548: } 14549: int n = w >> 12; 14550: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14551: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14552: XEiJ.mpuCycleCount += 6; 14553: int ea = XEiJ.regOC & 63; 14554: int z; 14555: if (ea < XEiJ.EA_AR) { //BFEXTU Dr{～} 14556: z = XEiJ.regRn[ea]; 14557: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14558: } else { //BFEXTU <mem>{～} 14559: int a = efaCntLong (ea) + (o >> 3); 14560: o &= 7; 14561: z = 31 - w + o >> 3; 14562: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o : //不要なバイトにアクセスしない 14563: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o : //020以上なのでアドレスエラーは出ない 14564: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o : 14565: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o : 14566: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o); 14567: } 14568: XEiJ.regRn[n] = z >>> w; //ゼロ拡張 14569: z >>= w; //符号拡張。下位のゴミを消す 14570: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14571: } //irpBfextu 14572: 14573: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14574: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14575: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14576: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14577: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 14578: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 14579: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 14580: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 14581: public static void irpBfchg () throws M68kException { 14582: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14583: if ((w & ~0b0000_111_111_111_111) != 0 || 14584: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14585: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14586: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14587: throw M68kException.m6eSignal; 14588: } 14589: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14590: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14591: XEiJ.mpuCycleCount += 8; 14592: int ea = XEiJ.regOC & 63; 14593: int z; 14594: if (ea < XEiJ.EA_AR) { //BFCHG Dr{～} 14595: z = XEiJ.regRn[ea]; 14596: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14597: int t = z ^ -1 << w; //フィールドの幅だけ反転する 14598: XEiJ.regRn[ea] = t << -o | t >>> o; 14599: } else { //BFCHG <mem>{～} 14600: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14601: o &= 7; 14602: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14603: if (z == 0) { 14604: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14605: int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14606: z = t << o; // z abcde-00 00000000 00000000 00000000 14607: // // -1<<w 11111000 00000000 00000000 00000000 14608: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14609: // //t^-1<<w>>>o --ABCDE- 00000000 00000000 00000000 14610: mmuWriteByteData (a, (t ^ -1 << w >>> o) >>> 24, XEiJ.regSRS); // <ea> --ABCDE- 14611: } else if (z == 1) { 14612: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14613: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14614: z = t << o; // z abcde--- -0000000 00000000 00000000 14615: // // -1<<w 11111000 00000000 00000000 00000000 14616: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14617: // //t^-1<<w>>>o -------A BCDE---- 00000000 00000000 14618: mmuWriteWordData (a, (t ^ -1 << w >>> o) >>> 16, XEiJ.regSRS); // <ea> -------A BCDE---- 14619: } else if (z == 2) { 14620: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14621: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8; // t -------a bcdefghi jkl----- 00000000 14622: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14623: // // -1<<w 11111111 11110000 00000000 00000000 14624: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14625: t ^= -1 << w >>> o; // t -------A BCDEFGHI JKL----- 00000000 14626: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); // <ea> -------A BCDEFGHI jkl----- 14627: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKL----- 14628: } else if (z == 3) { 14629: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14630: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rs------ 14631: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14632: // // -1<<w 11111111 11111111 11100000 00000000 14633: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14634: mmuWriteLongData (a, t ^ -1 << w >>> o, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKLMNOPQ RS------ 14635: } else { 14636: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14637: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rstuvwxy 14638: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14639: // -1>>>o 00000001 11111111 11111111 11111111 14640: mmuWriteLongData (a, t ^ -1 >>> o, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY 14641: t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS); // t 00000000 00000000 00000000 z------- 14642: // // t>>>8-o 00000000 00000000 00000000 0z------ 14643: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14644: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14645: mmuWriteByteData (a + 4, t ^ -1 << 8 - o + w, XEiJ.regSRS); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY Z------- 14646: } 14647: } 14648: z >>= w; //符号拡張。下位のゴミを消す 14649: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14650: } //irpBfchg 14651: 14652: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14653: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14654: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14655: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14656: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 14657: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 14658: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 14659: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 14660: public static void irpBfexts () throws M68kException { 14661: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14662: if ((w & ~0b0111_111_111_111_111) != 0 || 14663: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14664: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14665: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14666: throw M68kException.m6eSignal; 14667: } 14668: int n = w >> 12; 14669: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14670: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14671: XEiJ.mpuCycleCount += 6; 14672: int ea = XEiJ.regOC & 63; 14673: int z; 14674: if (ea < XEiJ.EA_AR) { //BFEXTS Dr{～} 14675: z = XEiJ.regRn[ea]; 14676: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14677: } else { //BFEXTS <mem>{～} 14678: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14679: o &= 7; 14680: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14681: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o : //不要なバイトにアクセスしない 14682: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o : //020以上なのでアドレスエラーは出ない 14683: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o : 14684: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o : 14685: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o); 14686: } 14687: XEiJ.regRn[n] = z >>= w; //符号拡張。下位のゴミを消す 14688: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14689: } //irpBfexts 14690: 14691: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14692: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14693: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14694: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14695: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 14696: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 14697: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 14698: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 14699: public static void irpBfclr () throws M68kException { 14700: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14701: if ((w & ~0b0000_111_111_111_111) != 0 || 14702: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14703: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14704: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14705: throw M68kException.m6eSignal; 14706: } 14707: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14708: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14709: XEiJ.mpuCycleCount += 8; 14710: int ea = XEiJ.regOC & 63; 14711: int z; 14712: if (ea < XEiJ.EA_AR) { //BFCLR Dr{～} 14713: z = XEiJ.regRn[ea]; 14714: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14715: int t = z & ~(-1 << w); //フィールドの幅だけ0を並べる 14716: XEiJ.regRn[ea] = t << -o | t >>> o; 14717: } else { //BFCLR <mem>{～} 14718: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14719: o &= 7; 14720: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14721: if (z == 0) { 14722: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14723: int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14724: z = t << o; // z abcde-00 00000000 00000000 00000000 14725: // // -1<<w 11111000 00000000 00000000 00000000 14726: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14727: // //~(-1<<w>>>o) 11000001 11111111 11111111 11111111 14728: // //t&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 14729: mmuWriteByteData (a, (t & ~(-1 << w >>> o)) >>> 24, XEiJ.regSRS); // <ea> --00000- 14730: } else if (z == 1) { 14731: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14732: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14733: z = t << o; // z abcde--- -0000000 00000000 00000000 14734: // // -1<<w 11111000 00000000 00000000 00000000 14735: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14736: // //~(-1<<w>>>o) 11111110 00001111 11111111 11111111 14737: // //t&~(-1<<w>>>o) -------0 0000---- 00000000 00000000 14738: mmuWriteWordData (a, (t & ~(-1 << w >>> o)) >>> 16, XEiJ.regSRS); // <ea> -------0 0000---- 14739: } else if (z == 2) { 14740: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14741: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8; // t -------a bcdefghi jkl----- 00000000 14742: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14743: // // -1<<w 11111111 11110000 00000000 00000000 14744: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14745: // //~(-1<<w>>>o) 11111110 00000000 00011111 11111111 14746: t &= ~(-1 << w >>> o); // t -------0 00000000 000----- 00000000 14747: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); // <ea> -------0 00000000 jkl----- 14748: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); // <ea> -------0 00000000 000----- 14749: } else if (z == 3) { 14750: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14751: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rs------ 14752: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14753: // // -1<<w 11111111 11111111 11100000 00000000 14754: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14755: // //~(-1<<w>>>o) 11111110 00000000 00000000 00111111 14756: mmuWriteLongData (a, t & ~(-1 << w >>> o), XEiJ.regSRS); // <ea> -------0 00000000 00000000 00------ 14757: } else { 14758: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14759: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rstuvwxy 14760: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14761: // -1>>>o 00000001 11111111 11111111 11111111 14762: // ~(-1>>>o) 11111110 00000000 00000000 00000000 14763: mmuWriteLongData (a, t & ~(-1 >>> o), XEiJ.regSRS); // <ea> -------0 00000000 00000000 00000000 14764: t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS); // t 00000000 00000000 00000000 z------- 14765: // // t>>>8-o 00000000 00000000 00000000 0z------ 14766: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14767: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14768: // //~(-1<<8-o+w) 00000000 00000000 00000000 01111111 14769: mmuWriteByteData (a + 4, t & ~(-1 << 8 - o + w), XEiJ.regSRS); // <ea> -------0 00000000 00000000 00000000 0------- 14770: } 14771: } 14772: z >>= w; //符号拡張。下位のゴミを消す 14773: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14774: } //irpBfclr 14775: 14776: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14777: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14778: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14779: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14780: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 14781: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 14782: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 14783: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 14784: public static void irpBfffo () throws M68kException { 14785: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14786: if ((w & ~0b0111_111_111_111_111) != 0 || 14787: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14788: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14789: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14790: throw M68kException.m6eSignal; 14791: } 14792: int n = w >> 12; 14793: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14794: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14795: XEiJ.mpuCycleCount += 9; 14796: int ea = XEiJ.regOC & 63; 14797: int z; 14798: if (ea < XEiJ.EA_AR) { //BFFFO Dr{～} 14799: z = XEiJ.regRn[ea]; 14800: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14801: } else { //BFFFO <mem>{～} 14802: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14803: int o7 = o & 7; 14804: z = 31 - w + o7 >> 3; //フィールドが跨ぐバイト境界の数。0～4 14805: z = (z == 0 ? mmuReadByteSignData (m60Address = a, XEiJ.regSRS) << 24 + o7 : //不要なバイトにアクセスしない 14806: z == 1 ? mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 16 + o7 : //020以上なのでアドレスエラーは出ない 14807: z == 2 ? (mmuReadWordSignData (m60Address = a, XEiJ.regSRS) << 8 | mmuReadByteZeroData (a + 2, XEiJ.regSRS)) << 8 + o7 : 14808: z == 3 ? mmuReadLongData (m60Address = a, XEiJ.regSRS) << o7 : 14809: mmuReadLongData (m60Address = a, XEiJ.regSRS) << o7 | mmuReadByteZeroData (m60Address = a + 4, XEiJ.regSRS) >>> 8 - o7); 14810: } 14811: if (true) { 14812: XEiJ.regRn[n] = Integer.numberOfLeadingZeros (z >>> w) - w + o; //ゼロ拡張してから1のビットを探す。見つからないときはoffset+widthになる 14813: } else { 14814: int t = z >>> w; 14815: if (t == 0) { 14816: XEiJ.regRn[n] = 32 - w + o; 14817: } else { 14818: int k = -(t >>> 16) >> 16 & 16; 14819: k += -(t >>> k + 8) >> 8 & 8; 14820: k += -(t >>> k + 4) >> 4 & 4; 14821: // bit3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 14822: // bit2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 14823: // bit1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 14824: // bit0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 14825: XEiJ.regRn[n] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (t >>> k << 1)) & 3) + k - w + o; //intのシフトカウントは下位5bitだけが使用される 14826: } 14827: } 14828: z >>= w; //符号拡張。下位のゴミを消す 14829: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14830: } //irpBfffo 14831: 14832: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14833: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14834: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14835: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14836: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 14837: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 14838: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 14839: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 14840: public static void irpBfset () throws M68kException { 14841: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14842: if ((w & ~0b0000_111_111_111_111) != 0 || 14843: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14844: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14845: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14846: throw M68kException.m6eSignal; 14847: } 14848: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14849: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14850: XEiJ.mpuCycleCount += 8; 14851: int ea = XEiJ.regOC & 63; 14852: int z; 14853: if (ea < XEiJ.EA_AR) { //BFSET Dr{～} 14854: z = XEiJ.regRn[ea]; 14855: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14856: int t = z | -1 << w; //フィールドの幅だけ1を並べる 14857: XEiJ.regRn[ea] = t << -o | t >>> o; 14858: } else { //BFSET <mem>{～} 14859: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14860: o &= 7; 14861: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14862: if (z == 0) { 14863: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14864: int t = mmuModifyByteSignData (a, XEiJ.regSRS) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14865: z = t << o; // z abcde-00 00000000 00000000 00000000 14866: // // -1<<w 11111000 00000000 00000000 00000000 14867: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14868: // //t|-1<<w>>>o --11111- 00000000 00000000 00000000 14869: mmuWriteByteData (a, (t | -1 << w >>> o) >>> 24, XEiJ.regSRS); // <ea> --11111- 14870: } else if (z == 1) { 14871: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14872: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14873: z = t << o; // z abcde--- -0000000 00000000 00000000 14874: // // -1<<w 11111000 00000000 00000000 00000000 14875: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14876: // //t|-1<<w>>>o -------1 1111---- 00000000 00000000 14877: mmuWriteWordData (a, (t | -1 << w >>> o) >>> 16, XEiJ.regSRS); // <ea> -------1 1111---- 14878: } else if (z == 2) { 14879: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14880: int t = mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8; // t -------a bcdefghi jkl----- 00000000 14881: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14882: // // -1<<w 11111111 11110000 00000000 00000000 14883: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14884: t |= -1 << w >>> o; // t -------1 11111111 111----- 00000000 14885: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); // <ea> -------1 11111111 jkl----- 14886: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); // <ea> -------1 11111111 111----- 14887: } else if (z == 3) { 14888: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14889: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rs------ 14890: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14891: // // -1<<w 11111111 11111111 11100000 00000000 14892: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14893: mmuWriteLongData (a, t | -1 << w >>> o, XEiJ.regSRS); // <ea> -------1 11111111 11111111 11------ 14894: } else { 14895: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14896: int t = mmuModifyLongData (a, XEiJ.regSRS); // t -------a bcdefghi jklmnopq rstuvwxy 14897: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14898: // -1>>>o 00000001 11111111 11111111 11111111 14899: mmuWriteLongData (a, t | -1 >>> o, XEiJ.regSRS); // <ea> -------1 11111111 11111111 11111111 14900: t = mmuModifyByteZeroData (a + 4, XEiJ.regSRS); // t 00000000 00000000 00000000 z------- 14901: // // t>>>8-o 00000000 00000000 00000000 0z------ 14902: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14903: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14904: mmuWriteByteData (a + 4, t | -1 << 8 - o + w, XEiJ.regSRS); // <ea> -------1 11111111 11111111 11111111 1------- 14905: } 14906: } 14907: z >>= w; //符号拡張。下位のゴミを消す 14908: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14909: } //irpBfset 14910: 14911: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14912: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14913: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14914: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14915: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 14916: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 14917: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 14918: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 14919: public static void irpBfins () throws M68kException { 14920: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 14921: if ((w & ~0b0111_111_111_111_111) != 0 || 14922: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14923: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14924: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14925: throw M68kException.m6eSignal; 14926: } 14927: int n = w >> 12; 14928: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14929: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14930: XEiJ.mpuCycleCount += 6; 14931: int ea = XEiJ.regOC & 63; 14932: int z = XEiJ.regRn[n] << w; //z=Dn<<-width 14933: if (ea < XEiJ.EA_AR) { //BFINS Dn,Dr{～} 14934: // Dr{30,5} o=30,w=32-5=27 t=Dr cde----- -------- -------- ------ab 14935: // t<<o ab000000 00000000 00000000 00000000 14936: // t>>>-o 00cde--- -------- -------- -------- 14937: // t<<o|t>>>-o abcde--- -------- -------- -------- 14938: // -1<<w 11111000 00000000 00000000 00000000 14939: // ~(-1<<w) 00000111 11111111 11111111 11111111 14940: // (t<<o|t>>>-o)&~(-1<<w) 00000--- -------- -------- -------- 14941: // r[n] -------- -------- -------- ---ABCDE 14942: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 14943: // t=(t<<o|t>>>-o)&~(-1<<w)|z ABCDE--- -------- -------- -------- 14944: // t<<-o CDE----- -------- -------- ------00 14945: // t>>>o 00000000 00000000 00000000 000000AB 14946: // t<<-o|t>>>o CDE----- -------- -------- ------AB 14947: int t = XEiJ.regRn[ea]; 14948: t = (t << o | t >>> -o) & ~(-1 << w) | z; 14949: XEiJ.regRn[ea] = t << -o | t >>> o; 14950: } else { //BFINS Dn,<mem>{～} 14951: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14952: o &= 7; 14953: n = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14954: if (n == 0) { 14955: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14956: // XEiJ.busRbs(a)<<24 --abcde- 00000000 00000000 00000000 14957: // -1<<w 11111000 00000000 00000000 00000000 14958: // -1<<w>>>o 00111110 00000000 00000000 00000000 14959: // ~(-1<<w>>>o) 11000001 11111111 11111111 11111111 14960: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 14961: // r[n] -------- -------- -------- ---ABCDE 14962: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 14963: // z>>>o 00ABCDE0 00000000 00000000 00000000 14964: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o)|z>>>o --ABCDE- 00000000 00000000 00000000 14965: mmuWriteByteData (a, (mmuModifyByteSignData (a, XEiJ.regSRS) << 24 & ~(-1 << w >>> o) | z >>> o) >>> 24, XEiJ.regSRS); 14966: } else if (n == 1) { 14967: // <ea>{3,11} o=3,w=32-11=21 <ea> ---abcde fghijk-- 14968: // rws(a)<<16 ---abcde fghijk-- 00000000 00000000 14969: // -1<<w 11111111 11100000 00000000 00000000 14970: // -1<<w>>>o 00011111 11111100 00000000 00000000 14971: // ~(-1<<w>>>o) 11100000 00000011 11111111 11111111 14972: // rws(a)<<16&~(-1<<w>>>o) ---00000 000000-- 00000000 00000000 14973: // r[n] -------- -------- -----ABC DEFGHIJK 14974: // z=r[n]<<w ABCDEFGH IJK00000 00000000 00000000 14975: // z>>>o 000ABCDE FGHIJK00 00000000 00000000 14976: // rws(a)<<16&~(-1<<w>>>o)|z>>>o ---ABCDE FGHIJK-- 00000000 00000000 14977: mmuWriteWordData (a, (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 & ~(-1 << w >>> o) | z >>> o) >>> 16, XEiJ.regSRS); 14978: } else if (n == 2) { 14979: // <ea>{4,17} o=4,w=32-17=15 <ea> ----abcd efghijkl mnopq--- 14980: // rws(a)<<16|rbz(a+2)<<8 ----abcd efghijkl mnopq--- 00000000 14981: // -1<<w 11111111 11111111 10000000 00000000 14982: // -1<<w>>>o 00001111 11111111 11111000 00000000 14983: // ~(-1<<w>>>o) 11110000 00000000 00000111 11111111 14984: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o) ----0000 00000000 00000--- 00000000 14985: // r[n] -------- -------A BCDEFGHI JKLMNOPQ 14986: // z=r[n]<<w ABCDEFGH IJKLMNOP Q0000000 00000000 14987: // z>>>o 0000ABCD EFGHIJKL MNOPQ000 00000000 14988: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)|z>>>o ----ABCD EFGHIJKL MNOPQ--- 00000000 14989: int t = (mmuModifyWordSignData (a, XEiJ.regSRS) << 16 | mmuModifyByteZeroData (a + 2, XEiJ.regSRS) << 8) & ~(-1 << w >>> o) | z >>> o; 14990: mmuWriteWordData (a, t >>> 16, XEiJ.regSRS); 14991: mmuWriteByteData (a + 2, t >>> 8, XEiJ.regSRS); 14992: } else if (n == 3) { 14993: // <ea>{5,23} o=5,w=32-23=9 <ea> -----abc defghijk lmnopqrs tuvw---- 14994: // rls(a) -----abc defghijk lmnopqrs tuvw---- 14995: // -1<<w 11111111 11111111 11111110 00000000 14996: // -1<<w>>>o 00000111 11111111 11111111 11110000 14997: // ~(-1<<w>>>o) 11111000 00000000 00000000 00001111 14998: // rls(a)&~(-1<<w>>>o) -----000 00000000 00000000 0000---- 14999: // r[n] -------- -ABCDEFG HIJKLMNO PQRSTUVW 15000: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVW0 00000000 15001: // z>>>o 00000ABC DEFGHIJK LMNOPQRS TUVW0000 15002: // rls(a)&~(-1<<w>>>o)|z>>>o -----ABC DEFGHIJK LMNOPQRS TUVW---- 15003: mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 << w >>> o) | z >>> o, XEiJ.regSRS); 15004: } else { 15005: // <ea>{6,29} o=6,w=32-29=3 <ea> ------ab cdefghij klmnopqr stuvwxyz abc----- 15006: // rls(a) ------ab cdefghij klmnopqr stuvwxyz 15007: // -1>>>o 00000011 11111111 11111111 11111111 15008: // ~(-1>>>o) 11111100 00000000 00000000 00000000 15009: // rls(a)&~(-1>>>o) ------00 00000000 00000000 00000000 15010: // r[n] ---ABCDE FGHIJKLM NOPQRSTU VWXYZABC 15011: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVWX YZABC000 15012: // z>>>o 000000AB CDEFGHIJ KLMNOPQR STUVWXYZ 15013: // rls(a)&~(-1>>>o)|z>>>o ------AB CDEFGHIJ KLMNOPQR STUVWXYZ 15014: mmuWriteLongData (a, mmuModifyLongData (a, XEiJ.regSRS) & ~(-1 >>> o) | z >>> o, XEiJ.regSRS); 15015: // rbz(a+4) 00000000 00000000 00000000 abc----- 15016: // -1<<8-o+w 11111111 11111111 11111111 11100000 15017: // ~(-1<<8-o+w) 00000000 00000000 00000000 00011111 15018: // rbz(a+4)&~(-1<<8-o+w) 00000000 00000000 00000000 000----- 15019: // z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC00000 15020: // rbz(a+4)&~(-1<<8-o+w)|z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC----- 15021: mmuWriteByteData (a + 4, mmuModifyByteZeroData (a + 4, XEiJ.regSRS) & ~(-1 << 8 - o + w) | z << 8 - o, XEiJ.regSRS); 15022: } 15023: } 15024: //zは上位に寄ったままだが下位の空きは0なのでそのままテストする 15025: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 15026: } //irpBfins 15027: 15028: //浮動小数点例外 15029: // 48 BSUN FP分岐または比較不能状態でのセット 15030: // 49 INEX FP不正確な結果 15031: // 50 DZ FPゼロによる除算 15032: // 51 UNFL FPアンダーフロー 15033: // 52 OPERR FPオペランドエラー 15034: // 53 OVFL FPオーバーフロー 15035: // 54 SNAN FPシグナリングNAN 15036: // 55 FP未実装データ型 15037: //FPSRのビットオフセット→例外ベクタ番号 15038: /* 15039: public static final int[] FP_OFFSET_TO_NUMBER = { 15040: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15041: 48, //16 15 BSUN 48 BSUN FP分岐または比較不能状態でのセット 15042: 54, //17 14 SNAN 54 SNAN FPシグナリングNAN 15043: 52, //18 13 OPERR 52 OPERR FPオペランドエラー 15044: 53, //19 12 OVFL 53 OVFL FPオーバーフロー 15045: 51, //20 11 UNFL 51 UNFL FPアンダーフロー 15046: 50, //21 10 DZ 50 DZ FPゼロによる除算 15047: 49, //22 9 INEX2 49 INEX FP不正確な結果 15048: 49, //23 8 INEX1 49 INEX FP不正確な結果 15049: 0, 0, 0, 0, 0, 0, 0, 0, 15050: }; 15051: */ 15052: public static final byte[] FP_OFFSET_TO_NUMBER = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\00006453211\0\0\0\0\0\0\0\0".getBytes (XEiJ.ISO_8859_1); 15053: 15054: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15055: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15056: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15057: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15058: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 15059: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 15060: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 15061: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 15062: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 15063: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 15064: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 15065: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 15066: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 15067: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 15068: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 15069: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 15070: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 15071: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 15072: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 15073: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 15074: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 15075: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 15076: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 15077: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 15078: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 15079: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 15080: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 15081: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 15082: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 15083: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 15084: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 15085: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 15086: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 15087: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 15088: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 15089: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 15090: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 15091: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 15092: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 15093: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 15094: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 15095: //FSMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000000 15096: //FSSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000001 15097: //FDMOVE.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000100 15098: //FDSQRT.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1000101 15099: //FSABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011000 15100: //FSNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011010 15101: //FDABS.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011100 15102: //FDNEG.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1011110 15103: //FSDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100000 15104: //FSADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100010 15105: //FSMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100011 15106: //FDDIV.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100100 15107: //FDADD.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100110 15108: //FDMUL.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1100111 15109: //FSSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101000 15110: //FDSUB.X FPm,FPn |-|----46|-|-----|-----| |1111_001_000_000_000-000mmmnnn1101100 15111: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 15112: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 15113: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 15114: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 15115: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 15116: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 15117: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15118: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15119: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15120: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15121: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15122: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15123: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 15124: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 15125: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 15126: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 15127: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 15128: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 15129: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 15130: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 15131: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 15132: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 15133: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 15134: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 15135: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 15136: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 15137: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 15138: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 15139: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 15140: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 15141: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 15142: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 15143: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 15144: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 15145: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 15146: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 15147: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 15148: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 15149: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 15150: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 15151: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 15152: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 15153: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 15154: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 15155: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 15156: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 15157: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 15158: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 15159: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 15160: //FSMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000000 15161: //FSSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000001 15162: //FDMOVE.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000100 15163: //FDSQRT.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1000101 15164: //FSABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011000 15165: //FSNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011010 15166: //FDABS.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011100 15167: //FDNEG.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1011110 15168: //FSDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100000 15169: //FSADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100010 15170: //FSMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100011 15171: //FDDIV.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100100 15172: //FDADD.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100110 15173: //FDMUL.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1100111 15174: //FSSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101000 15175: //FDSUB.L <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn1101100 15176: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 15177: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 15178: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 15179: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 15180: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 15181: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 15182: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 15183: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 15184: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 15185: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 15186: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 15187: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 15188: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 15189: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 15190: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 15191: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 15192: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 15193: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 15194: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 15195: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 15196: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 15197: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 15198: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 15199: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 15200: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 15201: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 15202: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 15203: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 15204: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 15205: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 15206: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 15207: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 15208: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 15209: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 15210: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 15211: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 15212: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 15213: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 15214: //FSMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000000 15215: //FSSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000001 15216: //FDMOVE.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000100 15217: //FDSQRT.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1000101 15218: //FSABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011000 15219: //FSNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011010 15220: //FDABS.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011100 15221: //FDNEG.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1011110 15222: //FSDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100000 15223: //FSADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100010 15224: //FSMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100011 15225: //FDDIV.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100100 15226: //FDADD.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100110 15227: //FDMUL.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1100111 15228: //FSSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101000 15229: //FDSUB.S <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn1101100 15230: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 15231: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 15232: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 15233: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 15234: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 15235: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 15236: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 15237: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 15238: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 15239: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 15240: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 15241: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 15242: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 15243: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 15244: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 15245: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 15246: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 15247: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 15248: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 15249: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 15250: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 15251: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 15252: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 15253: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 15254: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 15255: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 15256: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 15257: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 15258: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 15259: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 15260: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 15261: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 15262: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 15263: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 15264: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 15265: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 15266: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 15267: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 15268: //FSMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000000 15269: //FSSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000001 15270: //FDMOVE.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000100 15271: //FDSQRT.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1000101 15272: //FSABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011000 15273: //FSNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011010 15274: //FDABS.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011100 15275: //FDNEG.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1011110 15276: //FSDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100000 15277: //FSADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100010 15278: //FSMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100011 15279: //FDDIV.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100100 15280: //FDADD.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100110 15281: //FDMUL.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1100111 15282: //FSSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101000 15283: //FDSUB.W <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn1101100 15284: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 15285: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 15286: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 15287: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 15288: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 15289: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 15290: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 15291: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 15292: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 15293: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 15294: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 15295: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 15296: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 15297: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 15298: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 15299: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 15300: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 15301: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 15302: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 15303: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 15304: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 15305: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 15306: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 15307: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 15308: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 15309: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 15310: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 15311: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 15312: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 15313: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 15314: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 15315: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 15316: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 15317: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 15318: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 15319: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 15320: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 15321: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 15322: //FSMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000000 15323: //FSSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000001 15324: //FDMOVE.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000100 15325: //FDSQRT.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1000101 15326: //FSABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011000 15327: //FSNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011010 15328: //FDABS.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011100 15329: //FDNEG.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1011110 15330: //FSDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100000 15331: //FSADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100010 15332: //FSMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100011 15333: //FDDIV.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100100 15334: //FDADD.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100110 15335: //FDMUL.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1100111 15336: //FSSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101000 15337: //FDSUB.B <ea>,FPn |-|----46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn1101100 15338: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 15339: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15340: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15341: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15342: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15343: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15344: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15345: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 15346: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 15347: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 15348: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 15349: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 15350: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 15351: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 15352: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 15353: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 15354: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 15355: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 15356: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 15357: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 15358: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 15359: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 15360: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 15361: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 15362: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 15363: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 15364: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 15365: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 15366: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 15367: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 15368: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 15369: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 15370: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 15371: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 15372: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 15373: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 15374: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 15375: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 15376: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 15377: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 15378: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 15379: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 15380: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 15381: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 15382: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 15383: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 15384: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 15385: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 15386: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 15387: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 15388: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 15389: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 15390: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 15391: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 15392: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 15393: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 15394: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 15395: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 15396: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 15397: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 15398: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 15399: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 15400: //FSMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000000 15401: //FSSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000001 15402: //FDMOVE.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000100 15403: //FDSQRT.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1000101 15404: //FSABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011000 15405: //FSNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011010 15406: //FDABS.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011100 15407: //FDNEG.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1011110 15408: //FSDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100000 15409: //FSADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100010 15410: //FSMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100011 15411: //FDDIV.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100100 15412: //FDADD.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100110 15413: //FDMUL.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1100111 15414: //FSSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101000 15415: //FDSUB.X <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn1101100 15416: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 15417: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 15418: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 15419: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 15420: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 15421: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 15422: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 15423: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 15424: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 15425: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 15426: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 15427: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 15428: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 15429: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 15430: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 15431: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 15432: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 15433: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 15434: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 15435: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 15436: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 15437: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 15438: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 15439: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 15440: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 15441: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 15442: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 15443: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 15444: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 15445: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 15446: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 15447: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 15448: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 15449: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 15450: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 15451: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 15452: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 15453: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 15454: //FSMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000000 15455: //FSSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000001 15456: //FDMOVE.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000100 15457: //FDSQRT.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1000101 15458: //FSABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011000 15459: //FSNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011010 15460: //FDABS.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011100 15461: //FDNEG.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1011110 15462: //FSDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100000 15463: //FSADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100010 15464: //FSMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100011 15465: //FDDIV.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100100 15466: //FDADD.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100110 15467: //FDMUL.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1100111 15468: //FSSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101000 15469: //FDSUB.P <ea>,FPn |-|----SS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn1101100 15470: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 15471: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 15472: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 15473: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 15474: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 15475: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 15476: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 15477: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 15478: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 15479: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 15480: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 15481: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 15482: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 15483: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 15484: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 15485: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 15486: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 15487: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 15488: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 15489: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 15490: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 15491: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 15492: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 15493: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 15494: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 15495: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 15496: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 15497: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 15498: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 15499: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 15500: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 15501: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 15502: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 15503: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 15504: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 15505: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 15506: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 15507: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 15508: //FSMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000000 15509: //FSSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000001 15510: //FDMOVE.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000100 15511: //FDSQRT.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1000101 15512: //FSABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011000 15513: //FSNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011010 15514: //FDABS.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011100 15515: //FDNEG.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1011110 15516: //FSDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100000 15517: //FSADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100010 15518: //FSMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100011 15519: //FDDIV.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100100 15520: //FDADD.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100110 15521: //FDMUL.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1100111 15522: //FSSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101000 15523: //FDSUB.D <ea>,FPn |-|----46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn1101100 15524: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 15525: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 15526: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 15527: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 15528: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 15529: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 15530: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 15531: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 15532: @SuppressWarnings ("fallthrough") public static void irpFgen () throws M68kException { 15533: fgen: { 15534: if ((7 & XEiJ.currentOnchipFPU) == 0) { 15535: irpFline (); 15536: break fgen; 15537: } 15538: XEiJ.mpuCycleCount++; 15539: int ea = XEiJ.regOC & 63; 15540: int a = XEiJ.regPC; 15541: XEiJ.regPC = a + 2; 15542: int w = mmuReadWordZeroExword (a, XEiJ.regSRS); //pcwz。拡張ワード 15543: int m = w >> 10 & 7; 15544: int n = w >> 7 & 7; 15545: int c = w & 0x7f; 15546: XEiJ.fpuBox.epbSetRoundingPrec (XEiJ.fpuBox.epbFpcr >> 6 & 3); //丸め桁数 15547: XEiJ.fpuBox.epbSetRoundingMode (XEiJ.fpuBox.epbFpcr >> 4 & 3); //丸めモード 15548: a = 0; //実効アドレス 15549: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 15550: 15551: 15552: switch (w >> 13) { 15553: 15554: 15555: case 0b010: //$4xxx-$5xxx: Fop.* <ea>,FPn 15556: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15557: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15558: 15559: switch (m) { 15560: 15561: case 0b000: //$40xx-$43xx: Fop.L <ea>,FPn 15562: { 15563: XEiJ.mpuCycleCount += 3; 15564: int i; 15565: if (ea < XEiJ.EA_AR) { //Dr 15566: XEiJ.mpuCycleCount += 2; 15567: //a = 0; 15568: i = XEiJ.regRn[ea]; 15569: } else if (ea == XEiJ.EA_IM) { //#<data> 15570: a = XEiJ.regPC; 15571: XEiJ.regPC = a + 4; 15572: i = mmuReadLongExword (a, XEiJ.regSRS); //pcls 15573: } else { //Dr,#<data>以外 15574: a = efaAnyLong (ea); 15575: i = mmuReadLongData (a, XEiJ.regSRS); 15576: } 15577: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i); 15578: } 15579: break; 15580: 15581: case 0b001: //$44xx-$47xx: Fop.S <ea>,FPn 15582: { 15583: int i; 15584: if (ea < XEiJ.EA_AR) { //Dr 15585: XEiJ.mpuCycleCount += 2; 15586: //a = 0; 15587: i = XEiJ.regRn[ea]; 15588: } else if (ea == XEiJ.EA_IM) { //#<data> 15589: a = XEiJ.regPC; 15590: XEiJ.regPC = a + 4; 15591: i = mmuReadLongExword (a, XEiJ.regSRS); //pcls 15592: } else { //Dr,#<data>以外 15593: a = efaAnyLong (ea); 15594: i = mmuReadLongData (a, XEiJ.regSRS); 15595: } 15596: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setf0 (i); 15597: } 15598: break; 15599: 15600: case 0b010: //$48xx-$4Bxx: Fop.X <ea>,FPn 15601: { 15602: int[] ib = new int[3]; 15603: if (ea == 074) { //#<data> 15604: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //12バイトのイミディエイト 15605: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 15606: break fgen; 15607: } 15608: a = (XEiJ.regPC += 12) - 12; 15609: ib[0] = mmuReadLongExword (a, XEiJ.regSRS); 15610: ib[1] = mmuReadLongExword (a + 4, XEiJ.regSRS); 15611: ib[2] = mmuReadLongExword (a + 8, XEiJ.regSRS); 15612: } else { //#<data>以外 15613: a = efaMemExtd (ea); 15614: if ((ea & 070) == 040) { //-(Ar) 15615: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15616: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15617: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15618: } else { //-(Ar)以外 15619: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15620: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15621: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15622: } 15623: } 15624: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 15625: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].sety012 (ib, 0); 15626: } else { //拡張精度 15627: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setx012 (ib, 0); 15628: } 15629: } 15630: break; 15631: 15632: case 0b011: //$4Cxx-$4Fxx: Fop.P <ea>,FPn 15633: { 15634: int[] ib = new int[3]; 15635: if (ea == 074) { //#<data> 15636: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //12バイトのイミディエイト 15637: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 15638: break fgen; 15639: } 15640: a = (XEiJ.regPC += 12) - 12; 15641: ib[0] = mmuReadLongExword (a, XEiJ.regSRS); 15642: ib[1] = mmuReadLongExword (a + 4, XEiJ.regSRS); 15643: ib[2] = mmuReadLongExword (a + 8, XEiJ.regSRS); 15644: } else { //#<data>以外 15645: a = efaMemExtd (ea); 15646: if ((ea & 070) == 040) { //-(Ar) 15647: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15648: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15649: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15650: } else { //-(Ar)以外 15651: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 15652: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 15653: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 15654: } 15655: } 15656: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //パックトデシマル 15657: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7; 15658: irpExceptionFormat2 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはソースオペランド 15659: break fgen; 15660: } 15661: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setp012 (ib, 0); 15662: } 15663: break; 15664: 15665: case 0b100: //$50xx-$53xx: Fop.W <ea>,FPn 15666: { 15667: XEiJ.mpuCycleCount += 3; 15668: int i; 15669: if (ea < XEiJ.EA_AR) { //Dr 15670: XEiJ.mpuCycleCount += 2; 15671: //a = 0; 15672: i = (short) XEiJ.regRn[ea]; 15673: } else if (ea == XEiJ.EA_IM) { //#<data> 15674: a = XEiJ.regPC; 15675: XEiJ.regPC = a + 2; 15676: i = mmuReadWordSignExword (a, XEiJ.regSRS); //pcws 15677: } else { //Dr,#<data>以外 15678: a = efaAnyWord (ea); 15679: i = mmuReadWordSignData (a, XEiJ.regSRS); 15680: } 15681: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i); 15682: } 15683: break; 15684: 15685: case 0b101: //$54xx-$57xx: Fop.D <ea>,FPn 15686: { 15687: long l; 15688: if (ea == XEiJ.EA_IM) { //#<data> 15689: a = XEiJ.regPC; 15690: XEiJ.regPC = a + 8; 15691: l = mmuReadQuadExword (a, XEiJ.regSRS); 15692: } else { //#<data>以外 15693: a = efaAnyQuad (ea); 15694: l = mmuReadQuadData (a, XEiJ.regSRS); 15695: } 15696: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setd01 (l); 15697: } 15698: break; 15699: 15700: case 0b110: //$58xx-$5Bxx: Fop.B <ea>,FPn 15701: { 15702: XEiJ.mpuCycleCount += 3; 15703: int i; 15704: if (ea < XEiJ.EA_AR) { //Dr 15705: XEiJ.mpuCycleCount += 2; 15706: //a = 0; 15707: i = (byte) XEiJ.regRn[ea]; 15708: } else if (ea == XEiJ.EA_IM) { //#<data> 15709: a = XEiJ.regPC; 15710: XEiJ.regPC = a + 2; 15711: i = mmuReadByteSignExword (a + 1, XEiJ.regSRS); //pcbs 15712: } else { //Dr,#<data>以外 15713: a = efaAnyByte (ea); 15714: i = mmuReadByteSignData (a, XEiJ.regSRS); 15715: } 15716: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (i); 15717: } 15718: break; 15719: 15720: case 0b111: //$5Cxx-$5Fxx: FMOVECR.X #ccc,FPn 15721: default: 15722: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15723: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2); //pcは次の命令,アドレスはベクタオフセット 15724: break fgen; 15725: } 15726: if (0x40 <= c) { 15727: //マニュアルにはFMOVECRの命令フォーマットのROMオフセットが7bitあるように書かれているが実際は6bit 15728: //MC68882で0x40以上を指定すると命令実行前例外のF-Line Emulator(レスポンス$1C0B)が返る 15729: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 15730: irpFline (); 15731: break fgen; 15732: } 15733: if (false) { 15734: m = EFPBox.EPB_CONST_START + c; //定数 15735: c = 0; //FMOVE 15736: } else { 15737: //FMOVECR 15738: XEiJ.fpuBox.epbFmovecr (XEiJ.fpuFPn[n], c); 15739: //FPSRのAEXCを設定する 15740: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 15741: //浮動小数点命令実行後例外 floating-point post-instruction exception 15742: if (irpFPPostInstruction (a)) { 15743: break fgen; 15744: } 15745: break fgen; 15746: } 15747: 15748: } 15749: //浮動小数点命令実行前例外 floating-point pre-instruction exception 15750: if (irpFPPreInstruction ()) { 15751: break fgen; 15752: } 15753: //Fop.X <ea>,FPn → Fop.X FP[EFPBox.EPB_SRC_TMP],FPn 15754: //FMOVECR.X #ccc,FPn → FMOVE.X FPc,FPn 15755: 15756: 15757: //fallthrough 15758: case 0b000: //$0xxx-$1xxx: Fop.X FPm,FPn 15759: if (w >> 13 == 0) { 15760: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15761: } 15762: //Fop.* <ea>,FPnのときFPIARは設定済み 15763: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15764: 15765: switch (c) { 15766: 15767: case 0b000_0000: //$xx00: FMOVE.* *m,FPn 15768: // BSUN 常にクリア 15769: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15770: // OPERR 常にクリア 15771: // OVFL 常にクリア 15772: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15773: // DZ 常にクリア 15774: // INEX2 結果に誤差があるときセット、それ以外はクリア 15775: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15776: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 15777: break; 15778: 15779: case 0b000_0001: //$xx01: FINT.* *m,FPn 15780: // BSUN 常にクリア 15781: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15782: // OPERR 常にクリア 15783: // OVFL 常にクリア 15784: // 正規化数の最大値は整数なので丸めても大きくなることはない 15785: // UNFL 常にクリア 15786: // 結果は整数なので非正規化数にはならない 15787: // DZ 常にクリア 15788: // INEX2 結果に誤差があるときセット、それ以外はクリア 15789: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15790: XEiJ.mpuCycleCount += 2; 15791: // FINTはsingleとdoubleの丸め処理を行わない 15792: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15793: XEiJ.fpuFPn[n].round (XEiJ.fpuFPn[m], XEiJ.fpuBox.epbRoundingMode); 15794: break; 15795: 15796: case 0b000_0010: //$xx02: FSINH.* *m,FPn 15797: // BSUN 常にクリア 15798: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15799: // OPERR 常にクリア 15800: // OVFL オーバーフローしたときセット、それ以外はクリア 15801: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15802: // DZ 常にクリア 15803: // INEX2 結果に誤差があるときセット、それ以外はクリア 15804: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15805: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15806: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15807: break fgen; 15808: } 15809: XEiJ.fpuFPn[n].sinh (XEiJ.fpuFPn[m]); 15810: break; 15811: 15812: case 0b000_0011: //$xx03: FINTRZ.* *m,FPn 15813: // BSUN 常にクリア 15814: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15815: // OPERR 常にクリア 15816: // OVFL 常にクリア 15817: // UNFL 常にクリア 15818: // 結果は整数なので非正規化数にはならない 15819: // DZ 常にクリア 15820: // INEX2 結果に誤差があるときセット、それ以外はクリア 15821: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15822: XEiJ.mpuCycleCount += 2; 15823: // FINTRZはsingleとdoubleの丸め処理を行わない 15824: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15825: XEiJ.fpuFPn[n].trunc (XEiJ.fpuFPn[m]); 15826: break; 15827: 15828: case 0b000_0100: //$xx04: FSQRT.* *m,FPn 15829: case 0b000_0101: //$xx05: FSQRT.* *m,FPn (MC68882) 15830: // BSUN 常にクリア 15831: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15832: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 15833: // OVFL 常にクリア 15834: // 1よりも大きい数は小さくなるので溢れることはない 15835: // UNFL 常にクリア 15836: // 非正規化数の平方根は正規化数なので結果が非正規化数になることはない 15837: // DZ 常にクリア 15838: // INEX2 結果に誤差があるときセット、それ以外はクリア 15839: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15840: XEiJ.mpuCycleCount += 67; 15841: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 15842: break; 15843: 15844: case 0b000_0110: //$xx06: FLOGNP1.* *m,FPn 15845: case 0b000_0111: //$xx07: FLOGNP1.* *m,FPn (MC68882) 15846: // BSUN 常にクリア 15847: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15848: // OPERR 引数が-1よりも小さいときセット、それ以外はクリア 15849: // OVFL 常にクリア 15850: // log(1+0)=0,log(1+x)<=xなので結果が引数よりも大きくなることはない 15851: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15852: // DZ 引数が-1のときセット、それ以外はクリア 15853: // INEX2 結果に誤差があるときセット、それ以外はクリア 15854: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15855: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15856: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15857: break fgen; 15858: } 15859: XEiJ.fpuFPn[n].log1p (XEiJ.fpuFPn[m]); 15860: break; 15861: 15862: case 0b000_1000: //$xx08: FETOXM1.* *m,FPn 15863: // BSUN 常にクリア 15864: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15865: // OPERR 常にクリア 15866: // OVFL オーバーフローしたときセット、それ以外はクリア 15867: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15868: // DZ 常にクリア 15869: // INEX2 結果に誤差があるときセット、それ以外はクリア 15870: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15871: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15872: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15873: break fgen; 15874: } 15875: XEiJ.fpuFPn[n].expm1 (XEiJ.fpuFPn[m]); 15876: break; 15877: 15878: case 0b000_1001: //$xx09: FTANH.* *m,FPn 15879: // BSUN 常にクリア 15880: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15881: // OPERR 常にクリア 15882: // OVFL 常にクリア 15883: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15884: // DZ 常にクリア 15885: // INEX2 結果に誤差があるときセット、それ以外はクリア 15886: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15887: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15888: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15889: break fgen; 15890: } 15891: XEiJ.fpuFPn[n].tanh (XEiJ.fpuFPn[m]); 15892: break; 15893: 15894: case 0b000_1010: //$xx0A: FATAN.* *m,FPn 15895: case 0b000_1011: //$xx0B: FATAN.* *m,FPn (MC68882) 15896: // BSUN 常にクリア 15897: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15898: // OPERR 常にクリア 15899: // OVFL 常にクリア 15900: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15901: // DZ 常にクリア 15902: // INEX2 結果に誤差があるときセット、それ以外はクリア 15903: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15904: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15905: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15906: break fgen; 15907: } 15908: XEiJ.fpuFPn[n].atan (XEiJ.fpuFPn[m]); 15909: break; 15910: 15911: case 0b000_1100: //$xx0C: FASIN.* *m,FPn 15912: // BSUN 常にクリア 15913: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15914: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15915: // OVFL 常にクリア 15916: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15917: // DZ 常にクリア 15918: // INEX2 結果に誤差があるときセット、それ以外はクリア 15919: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15920: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15921: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15922: break fgen; 15923: } 15924: XEiJ.fpuFPn[n].asin (XEiJ.fpuFPn[m]); 15925: break; 15926: 15927: case 0b000_1101: //$xx0D: FATANH.* *m,FPn 15928: // BSUN 常にクリア 15929: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15930: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15931: // OVFL 常にクリア 15932: // 1のとき無限大なのだから1の近くでオーバーフローしそうに思えるがatanh(1-2^-80)≒28.07くらい 15933: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15934: // DZ 引数の絶対値が1のときセット、それ以外はクリア 15935: // INEX2 結果に誤差があるときセット、それ以外はクリア 15936: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15937: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15938: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15939: break fgen; 15940: } 15941: XEiJ.fpuFPn[n].atanh (XEiJ.fpuFPn[m]); 15942: break; 15943: 15944: case 0b000_1110: //$xx0E: FSIN.* *m,FPn 15945: // BSUN 常にクリア 15946: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15947: // OPERR 引数が無限大のときセット、それ以外はクリア 15948: // OVFL 常にクリア 15949: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15950: // DZ 常にクリア 15951: // INEX2 結果に誤差があるときセット、それ以外はクリア 15952: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15953: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15954: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15955: break fgen; 15956: } 15957: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[m]); 15958: break; 15959: 15960: case 0b000_1111: //$xx0F: FTAN.* *m,FPn 15961: // BSUN 常にクリア 15962: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15963: // OPERR 引数が無限大のときセット、それ以外はクリア 15964: // OVFL オーバーフローしたときセット、それ以外はクリア 15965: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15966: // DZ 常にクリア 15967: // cos(x)=0を満たすxは正確に表現できないのだからsin(x)/cos(x)がゼロ除算になるのはおかしい 15968: // INEX2 結果に誤差があるときセット、それ以外はクリア 15969: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15970: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15971: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15972: break fgen; 15973: } 15974: XEiJ.fpuFPn[n].tan (XEiJ.fpuFPn[m]); 15975: break; 15976: 15977: case 0b001_0000: //$xx10: FETOX.* *m,FPn 15978: // BSUN 常にクリア 15979: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15980: // OPERR 常にクリア 15981: // OVFL オーバーフローしたときセット、それ以外はクリア 15982: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15983: // DZ 常にクリア 15984: // INEX2 結果に誤差があるときセット、それ以外はクリア 15985: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15986: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 15987: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 15988: break fgen; 15989: } 15990: XEiJ.fpuFPn[n].exp (XEiJ.fpuFPn[m]); 15991: break; 15992: 15993: case 0b001_0001: //$xx11: FTWOTOX.* *m,FPn 15994: // BSUN 常にクリア 15995: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15996: // OPERR 常にクリア 15997: // OVFL オーバーフローしたときセット、それ以外はクリア 15998: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15999: // DZ 常にクリア 16000: // INEX2 結果に誤差があるときセット、それ以外はクリア 16001: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16002: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16003: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16004: break fgen; 16005: } 16006: XEiJ.fpuFPn[n].exp2 (XEiJ.fpuFPn[m]); 16007: break; 16008: 16009: case 0b001_0010: //$xx12: FTENTOX.* *m,FPn 16010: case 0b001_0011: //$xx13: FTENTOX.* *m,FPn (MC68882) 16011: // BSUN 常にクリア 16012: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16013: // OPERR 常にクリア 16014: // OVFL オーバーフローしたときセット、それ以外はクリア 16015: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16016: // DZ 常にクリア 16017: // INEX2 結果に誤差があるときセット、それ以外はクリア 16018: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16019: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16020: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16021: break fgen; 16022: } 16023: XEiJ.fpuFPn[n].exp10 (XEiJ.fpuFPn[m]); 16024: break; 16025: 16026: case 0b001_0100: //$xx14: FLOGN.* *m,FPn 16027: // BSUN 常にクリア 16028: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16029: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 16030: // OVFL 常にクリア 16031: // log(1)=0,log(x)<=x-1なので結果が引数よりも大きくなることはない 16032: // UNFL 常にクリア 16033: // log(1+2^-80)≒2^-80 16034: // DZ 引数がゼロのときセット、それ以外はクリア 16035: // INEX2 結果に誤差があるときセット、それ以外はクリア 16036: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16037: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16038: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16039: break fgen; 16040: } 16041: XEiJ.fpuFPn[n].log (XEiJ.fpuFPn[m]); 16042: break; 16043: 16044: case 0b001_0101: //$xx15: FLOG10.* *m,FPn 16045: // BSUN 常にクリア 16046: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16047: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 16048: // OVFL 常にクリア 16049: // UNFL 常にクリア 16050: // DZ 引数がゼロのときセット、それ以外はクリア 16051: // INEX2 結果に誤差があるときセット、それ以外はクリア 16052: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16053: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16054: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16055: break fgen; 16056: } 16057: XEiJ.fpuFPn[n].log10 (XEiJ.fpuFPn[m]); 16058: break; 16059: 16060: case 0b001_0110: //$xx16: FLOG2.* *m,FPn 16061: case 0b001_0111: //$xx17: FLOG2.* *m,FPn (MC68882) 16062: // BSUN 常にクリア 16063: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16064: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 16065: // OVFL 常にクリア 16066: // UNFL 常にクリア 16067: // DZ 引数がゼロのときセット、それ以外はクリア 16068: // INEX2 結果に誤差があるときセット、それ以外はクリア 16069: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16070: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16071: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16072: break fgen; 16073: } 16074: XEiJ.fpuFPn[n].log2 (XEiJ.fpuFPn[m]); 16075: break; 16076: 16077: case 0b001_1000: //$xx18: FABS.* *m,FPn 16078: // BSUN 常にクリア 16079: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16080: // OPERR 常にクリア 16081: // OVFL 常にクリア 16082: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16083: // DZ 常にクリア 16084: // INEX2 常にクリア 16085: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16086: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16087: break; 16088: 16089: case 0b001_1001: //$xx19: FCOSH.* *m,FPn 16090: // BSUN 常にクリア 16091: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16092: // OPERR 常にクリア 16093: // OVFL オーバーフローしたときセット、それ以外はクリア 16094: // UNFL 常にクリア 16095: // DZ 常にクリア 16096: // INEX2 結果に誤差があるときセット、それ以外はクリア 16097: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16098: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16099: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16100: break fgen; 16101: } 16102: XEiJ.fpuFPn[n].cosh (XEiJ.fpuFPn[m]); 16103: break; 16104: 16105: case 0b001_1010: //$xx1A: FNEG.* *m,FPn 16106: case 0b001_1011: //$xx1B: FNEG.* *m,FPn (MC68882) 16107: // BSUN 常にクリア 16108: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16109: // OPERR 常にクリア 16110: // OVFL 常にクリア 16111: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16112: // DZ 常にクリア 16113: // INEX2 常にクリア 16114: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16115: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16116: break; 16117: 16118: case 0b001_1100: //$xx1C: FACOS.* *m,FPn 16119: // BSUN 常にクリア 16120: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16121: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 16122: // OVFL 常にクリア 16123: // UNFL 常にクリア 16124: // acos(1-ulp(1))はulp(1)よりも大きい 16125: // DZ 常にクリア 16126: // INEX2 結果に誤差があるときセット、それ以外はクリア 16127: // おそらくセットされないのはacos(1)=0だけ 16128: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16129: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16130: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16131: break fgen; 16132: } 16133: XEiJ.fpuFPn[n].acos (XEiJ.fpuFPn[m]); 16134: break; 16135: 16136: case 0b001_1101: //$xx1D: FCOS.* *m,FPn 16137: // BSUN 常にクリア 16138: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16139: // OPERR 引数が無限大のときセット、それ以外はクリア 16140: // OVFL 常にクリア 16141: // UNFL 常にクリア 16142: // cos(x)=0を満たすxは正確に表現できず、cos(pi/2)とcos(3*pi/2)が正規化数になってしまう 16143: // DZ 常にクリア 16144: // INEX2 結果に誤差があるときセット、それ以外はクリア 16145: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16146: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16147: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16148: break fgen; 16149: } 16150: XEiJ.fpuFPn[n].cos (XEiJ.fpuFPn[m]); 16151: break; 16152: 16153: case 0b001_1110: //$xx1E: FGETEXP.* *m,FPn 16154: // BSUN 常にクリア 16155: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16156: // OPERR 引数が無限大のときセット、それ以外はクリア 16157: // OVFL 常にクリア 16158: // UNFL 常にクリア 16159: // DZ 常にクリア 16160: // INEX2 常にクリア 16161: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16162: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16163: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16164: break fgen; 16165: } 16166: XEiJ.fpuFPn[n].getexp (XEiJ.fpuFPn[m]); 16167: break; 16168: 16169: case 0b001_1111: //$xx1F: FGETMAN.* *m,FPn 16170: // BSUN 常にクリア 16171: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16172: // OPERR 引数が無限大のときセット、それ以外はクリア 16173: // OVFL 常にクリア 16174: // UNFL 常にクリア 16175: // DZ 常にクリア 16176: // INEX2 常にクリア 16177: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16178: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16179: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16180: break fgen; 16181: } 16182: XEiJ.fpuFPn[n].getman (XEiJ.fpuFPn[m]); 16183: break; 16184: 16185: case 0b010_0000: //$xx20: FDIV.* *m,FPn 16186: // BSUN 常にクリア 16187: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16188: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16189: // OVFL オーバーフローしたときセット、それ以外はクリア 16190: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16191: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16192: // INEX2 結果に誤差があるときセット、それ以外はクリア 16193: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16194: XEiJ.mpuCycleCount += 36; 16195: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16196: break; 16197: 16198: case 0b010_0001: //$xx21: FMOD.* *m,FPn 16199: // BSUN 常にクリア 16200: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16201: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16202: // OVFL 常にクリア 16203: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16204: // DZ 常にクリア 16205: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16206: // INEX2 結果に誤差があるときセット、それ以外はクリア 16207: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16208: // FPSRのquotient byteに符号付き商の下位7bitが入る 16209: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16210: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16211: break fgen; 16212: } 16213: XEiJ.fpuFPn[n].rem (XEiJ.fpuFPn[m]); 16214: break; 16215: 16216: case 0b010_0010: //$xx22: FADD.* *m,FPn 16217: // BSUN 常にクリア 16218: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16219: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16220: // OVFL オーバーフローしたときセット、それ以外はクリア 16221: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16222: // DZ 常にクリア 16223: // INEX2 結果に誤差があるときセット、それ以外はクリア 16224: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16225: XEiJ.mpuCycleCount += 2; 16226: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16227: break; 16228: 16229: case 0b010_0011: //$xx23: FMUL.* *m,FPn 16230: // BSUN 常にクリア 16231: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16232: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16233: // OVFL オーバーフローしたときセット、それ以外はクリア 16234: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16235: // DZ 常にクリア 16236: // INEX2 結果に誤差があるときセット、それ以外はクリア 16237: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16238: XEiJ.mpuCycleCount += 2; 16239: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16240: break; 16241: 16242: case 0b010_0100: //$xx24: FSGLDIV.* *m,FPn 16243: // BSUN 常にクリア 16244: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16245: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16246: // OVFL オーバーフローしたときセット、それ以外はクリア 16247: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16248: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16249: // INEX2 結果に誤差があるときセット、それ以外はクリア 16250: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16251: XEiJ.mpuCycleCount += 36; 16252: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16253: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16254: break; 16255: 16256: case 0b010_0101: //$xx25: FREM.* *m,FPn 16257: // BSUN 常にクリア 16258: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16259: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16260: // OVFL 常にクリア 16261: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16262: // DZ 常にクリア 16263: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16264: // INEX2 結果に誤差があるときセット、それ以外はクリア 16265: // マニュアルにClearedと書いてあるのは間違い 16266: // 除数が無限大で被除数をそのまま返す場合でもサイズが減ればアンダーフローや不正確な結果になることはマニュアルにも書かれている 16267: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16268: // FPSRのquotient byteに符号付き商の下位7bitが入る 16269: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16270: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16271: break fgen; 16272: } 16273: XEiJ.fpuFPn[n].ieeerem (XEiJ.fpuFPn[m]); 16274: break; 16275: 16276: case 0b010_0110: //$xx26: FSCALE.* *m,FPn 16277: // BSUN 常にクリア 16278: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16279: // OPERR 引数が無限大のときセット、それ以外はクリア 16280: // OVFL オーバーフローしたときセット、それ以外はクリア 16281: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16282: // DZ 常にクリア 16283: // INEX2 常にクリア 16284: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16285: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16286: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16287: break fgen; 16288: } 16289: //! 本来はソースが整数のとき浮動小数点数を経由しないが、これは経由してしまっている。結果は同じだが効率が悪い 16290: XEiJ.fpuFPn[n].scale (XEiJ.fpuFPn[m]); 16291: break; 16292: 16293: case 0b010_0111: //$xx27: FSGLMUL.* *m,FPn 16294: // BSUN 常にクリア 16295: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16296: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16297: // OVFL オーバーフローしたときセット、それ以外はクリア 16298: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16299: // DZ 常にクリア 16300: // INEX2 結果に誤差があるときセット、それ以外はクリア 16301: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16302: XEiJ.mpuCycleCount += 2; 16303: { 16304: //引数を24bitに切り捨てるときX2をセットしない 16305: int sr = XEiJ.fpuBox.epbFpsr; 16306: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].roundmanf (XEiJ.fpuFPn[m], EFPBox.EPB_MODE_RZ); 16307: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].roundmanf (XEiJ.fpuFPn[n], EFPBox.EPB_MODE_RZ); 16308: XEiJ.fpuBox.epbFpsr = sr; 16309: } 16310: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16311: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[EFPBox.EPB_DST_TMP], XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16312: break; 16313: 16314: case 0b010_1000: //$xx28: FSUB.* *m,FPn 16315: case 0b010_1001: //$xx29: FSUB.* *m,FPn (MC68882) 16316: case 0b010_1010: //$xx2A: FSUB.* *m,FPn (MC68882) 16317: case 0b010_1011: //$xx2B: FSUB.* *m,FPn (MC68882) 16318: case 0b010_1100: //$xx2C: FSUB.* *m,FPn (MC68882) 16319: case 0b010_1101: //$xx2D: FSUB.* *m,FPn (MC68882) 16320: case 0b010_1110: //$xx2E: FSUB.* *m,FPn (MC68882) 16321: case 0b010_1111: //$xx2F: FSUB.* *m,FPn (MC68882) 16322: // BSUN 常にクリア 16323: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16324: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16325: // OVFL オーバーフローしたときセット、それ以外はクリア 16326: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16327: // DZ 常にクリア 16328: // INEX2 結果に誤差があるときセット、それ以外はクリア 16329: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16330: XEiJ.mpuCycleCount += 2; 16331: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16332: break; 16333: 16334: case 0b011_0000: //$xx30: FSINCOS.* *m,FP0:FPn (c=0,s=n) 16335: case 0b011_0001: //$xx31: FSINCOS.* *m,FP1:FPn (c=1,s=n) 16336: case 0b011_0010: //$xx32: FSINCOS.* *m,FP2:FPn (c=2,s=n) 16337: case 0b011_0011: //$xx33: FSINCOS.* *m,FP3:FPn (c=3,s=n) 16338: case 0b011_0100: //$xx34: FSINCOS.* *m,FP4:FPn (c=4,s=n) 16339: case 0b011_0101: //$xx35: FSINCOS.* *m,FP5:FPn (c=5,s=n) 16340: case 0b011_0110: //$xx36: FSINCOS.* *m,FP6:FPn (c=6,s=n) 16341: case 0b011_0111: //$xx37: FSINCOS.* *m,FP7:FPn (c=7,s=n) 16342: // BSUN 常にクリア 16343: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16344: // OPERR 引数が無限大のときセット、それ以外はクリア 16345: // OVFL 常にクリア 16346: // UNFL sin(x)の結果が非正規化数のときセット、それ以外はクリア 16347: // cos(x)の結果は非正規化数にならない 16348: // DZ 常にクリア 16349: // INEX2 結果に誤差があるときセット、それ以外はクリア 16350: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16351: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16352: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 16353: break fgen; 16354: } 16355: c &= 7; 16356: //m==EFPBox.EPB_SRC_TMP||m==n||m==cの場合があることに注意する 16357: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].sete (XEiJ.fpuFPn[m]); 16358: XEiJ.fpuFPn[c].cos (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16359: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16360: break; 16361: 16362: case 0b011_1000: //$xx38: FCMP.* *m,FPn 16363: case 0b011_1001: //$xx39: FCMP.* *m,FPn (MC68882) 16364: case 0b011_1100: //$xx3C: FCMP.* *m,FPn (MC68882) コマンドワードの不連続箇所に注意 16365: case 0b011_1101: //$xx3D: FCMP.* *m,FPn (MC68882) 16366: // BSUN 常にクリア 16367: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16368: // OPERR 常にクリア 16369: // OVFL 常にクリア 16370: // UNFL 常にクリア 16371: // DZ 常にクリア 16372: // INEX2 常にクリア 16373: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16374: // FCMPはinfinityを常にクリアする 16375: // efp.compareTo(x,y)を使う 16376: // efp.compareTo(x,y)はefp.sub(x,y)よりも速い 16377: // efp.sub(x,y)はINEX2をセットしてしまう 16378: // efp.compareTo(x,y)は-0<+0だがFCMPは-0==+0なのでこれだけ調節する 16379: { 16380: int xf = XEiJ.fpuFPn[n].flg; 16381: int yf = XEiJ.fpuFPn[m].flg; 16382: if ((xf | yf) << 3 < 0) { //どちらかがNaN 16383: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].setnan (); 16384: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.N; 16385: } else { 16386: int i = ((xf & yf) << 1 < 0 ? 0 : //両方±0 16387: XEiJ.fpuFPn[n].compareTo (XEiJ.fpuFPn[m])); //-Inf==-Inf<-x<-0<+0<+x<+Inf==+Inf<NaN==NaN 16388: if (i == 0) { 16389: if (xf < 0) { 16390: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset0 (); 16391: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.M | EFPBox.Z; 16392: } else { 16393: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set0 (); 16394: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.P | EFPBox.Z; 16395: } 16396: } else if (i < 0) { 16397: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset1 (); 16398: } else { 16399: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set1 (); 16400: } 16401: } 16402: n = EFPBox.EPB_DST_TMP; 16403: } 16404: break; 16405: 16406: case 0b011_1010: //$xx3A: FTST.* *m 16407: case 0b011_1011: //$xx3B: FTST.* *m (MC68882) 16408: case 0b011_1110: //$xx3E: FTST.* *m (MC68882) コマンドワードの不連続箇所に注意 16409: case 0b011_1111: //$xx3F: FTST.* *m (MC68882) 16410: // BSUN 常にクリア 16411: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16412: // OPERR 常にクリア 16413: // OVFL 常にクリア 16414: // UNFL 常にクリア 16415: // DZ 常にクリア 16416: // INEX2 常にクリア 16417: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16418: // ソースオペランドをダミーのデスティネーションオペランドにコピーしてテストする 16419: // デスティネーションオペランドは変化しない 16420: // デスティネーションオペランドにはFP0が指定される場合が多いがFP0である必要はない 16421: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].sete (XEiJ.fpuFPn[m]); 16422: n = EFPBox.EPB_DST_TMP; 16423: break; 16424: 16425: case 0b100_0000: //$xx40: FSMOVE.* *m,FPn 16426: // BSUN 常にクリア 16427: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16428: // OPERR 常にクリア 16429: // OVFL 常にクリア 16430: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16431: // DZ 常にクリア 16432: // INEX2 結果に誤差があるときセット、それ以外はクリア 16433: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16434: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16435: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16436: break; 16437: 16438: case 0b100_0001: //$xx41: FSSQRT.* *m,FPn 16439: // BSUN 常にクリア 16440: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16441: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16442: // OVFL 常にクリア 16443: // UNFL 常にクリア 16444: // DZ 常にクリア 16445: // INEX2 結果に誤差があるときセット、それ以外はクリア 16446: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16447: XEiJ.mpuCycleCount += 67; 16448: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16449: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16450: break; 16451: 16452: //case 0b100_0010: //$xx42: 16453: //case 0b100_0011: //$xx43: 16454: 16455: case 0b100_0100: //$xx44: FDMOVE.* *m,FPn 16456: // BSUN 常にクリア 16457: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16458: // OPERR 常にクリア 16459: // OVFL 常にクリア 16460: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16461: // DZ 常にクリア 16462: // INEX2 結果に誤差があるときセット、それ以外はクリア 16463: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16464: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16465: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16466: break; 16467: 16468: case 0b100_0101: //$xx45: FDSQRT.* *m,FPn 16469: // BSUN 常にクリア 16470: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16471: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16472: // OVFL 常にクリア 16473: // UNFL 常にクリア 16474: // DZ 常にクリア 16475: // INEX2 結果に誤差があるときセット、それ以外はクリア 16476: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16477: XEiJ.mpuCycleCount += 67; 16478: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16479: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16480: break; 16481: 16482: //case 0b100_0110: //$xx46: 16483: //case 0b100_0111: //$xx47: 16484: //case 0b100_1000: //$xx48: 16485: //case 0b100_1001: //$xx49: 16486: //case 0b100_1010: //$xx4A: 16487: //case 0b100_1011: //$xx4B: 16488: //case 0b100_1100: //$xx4C: 16489: //case 0b100_1101: //$xx4D: 16490: //case 0b100_1110: //$xx4E: 16491: //case 0b100_1111: //$xx4F: 16492: //case 0b101_0000: //$xx50: 16493: //case 0b101_0001: //$xx51: 16494: //case 0b101_0010: //$xx52: 16495: //case 0b101_0011: //$xx53: 16496: //case 0b101_0100: //$xx54: 16497: //case 0b101_0101: //$xx55: 16498: //case 0b101_0110: //$xx56: 16499: //case 0b101_0111: //$xx57: 16500: 16501: case 0b101_1000: //$xx58: FSABS.* *m,FPn 16502: // BSUN 常にクリア 16503: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16504: // OPERR 常にクリア 16505: // OVFL 常にクリア 16506: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16507: // DZ 常にクリア 16508: // INEX2 常にクリア 16509: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16510: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16511: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16512: break; 16513: 16514: //case 0b101_1001: //$xx59: 16515: 16516: case 0b101_1010: //$xx5A: FSNEG.* *m,FPn 16517: // BSUN 常にクリア 16518: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16519: // OPERR 常にクリア 16520: // OVFL 常にクリア 16521: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16522: // DZ 常にクリア 16523: // INEX2 常にクリア 16524: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16525: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16526: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16527: break; 16528: 16529: //case 0b101_1011: //$xx5B: 16530: 16531: case 0b101_1100: //$xx5C: FDABS.* *m,FPn 16532: // BSUN 常にクリア 16533: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16534: // OPERR 常にクリア 16535: // OVFL 常にクリア 16536: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16537: // DZ 常にクリア 16538: // INEX2 常にクリア 16539: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16540: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16541: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16542: break; 16543: 16544: //case 0b101_1101: //$xx5D: 16545: 16546: case 0b101_1110: //$xx5E: FDNEG.* *m,FPn 16547: // BSUN 常にクリア 16548: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16549: // OPERR 常にクリア 16550: // OVFL 常にクリア 16551: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16552: // DZ 常にクリア 16553: // INEX2 常にクリア 16554: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16555: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16556: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16557: break; 16558: 16559: //case 0b101_1111: //$xx5F: 16560: 16561: case 0b110_0000: //$xx60: FSDIV.* *m,FPn 16562: // BSUN 常にクリア 16563: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16564: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16565: // OVFL オーバーフローしたときセット、それ以外はクリア 16566: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16567: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16568: // INEX2 結果に誤差があるときセット、それ以外はクリア 16569: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16570: XEiJ.mpuCycleCount += 36; 16571: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16572: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16573: break; 16574: 16575: //case 0b110_0001: //$xx61: 16576: 16577: case 0b110_0010: //$xx62: FSADD.* *m,FPn 16578: // BSUN 常にクリア 16579: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16580: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16581: // OVFL オーバーフローしたときセット、それ以外はクリア 16582: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16583: // DZ 常にクリア 16584: // INEX2 結果に誤差があるときセット、それ以外はクリア 16585: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16586: XEiJ.mpuCycleCount += 2; 16587: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16588: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16589: break; 16590: 16591: case 0b110_0011: //$xx63: FSMUL.* *m,FPn 16592: // BSUN 常にクリア 16593: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16594: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16595: // OVFL オーバーフローしたときセット、それ以外はクリア 16596: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16597: // DZ 常にクリア 16598: // INEX2 結果に誤差があるときセット、それ以外はクリア 16599: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16600: XEiJ.mpuCycleCount += 2; 16601: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16602: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16603: break; 16604: 16605: case 0b110_0100: //$xx64: FDDIV.* *m,FPn 16606: // BSUN 常にクリア 16607: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16608: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16609: // OVFL オーバーフローしたときセット、それ以外はクリア 16610: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16611: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16612: // INEX2 結果に誤差があるときセット、それ以外はクリア 16613: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16614: XEiJ.mpuCycleCount += 36; 16615: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16616: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16617: break; 16618: 16619: //case 0b110_0101: //$xx65: 16620: 16621: case 0b110_0110: //$xx66: FDADD.* *m,FPn 16622: // BSUN 常にクリア 16623: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16624: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16625: // OVFL オーバーフローしたときセット、それ以外はクリア 16626: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16627: // DZ 常にクリア 16628: // INEX2 結果に誤差があるときセット、それ以外はクリア 16629: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16630: XEiJ.mpuCycleCount += 2; 16631: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16632: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16633: break; 16634: 16635: case 0b110_0111: //$xx67: FDMUL.* *m,FPn 16636: // BSUN 常にクリア 16637: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16638: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16639: // OVFL オーバーフローしたときセット、それ以外はクリア 16640: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16641: // DZ 常にクリア 16642: // INEX2 結果に誤差があるときセット、それ以外はクリア 16643: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16644: XEiJ.mpuCycleCount += 2; 16645: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16646: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16647: break; 16648: 16649: case 0b110_1000: //$xx68: FSSUB.* *m,FPn 16650: // BSUN 常にクリア 16651: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16652: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16653: // OVFL オーバーフローしたときセット、それ以外はクリア 16654: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16655: // DZ 常にクリア 16656: // INEX2 結果に誤差があるときセット、それ以外はクリア 16657: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16658: XEiJ.mpuCycleCount += 2; 16659: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16660: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16661: break; 16662: 16663: //case 0b110_1001: //$xx69: 16664: //case 0b110_1010: //$xx6A: 16665: //case 0b110_1011: //$xx6B: 16666: 16667: case 0b110_1100: //$xx6C: FDSUB.* *m,FPn 16668: // BSUN 常にクリア 16669: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16670: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16671: // OVFL オーバーフローしたときセット、それ以外はクリア 16672: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16673: // DZ 常にクリア 16674: // INEX2 結果に誤差があるときセット、それ以外はクリア 16675: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16676: XEiJ.mpuCycleCount += 2; 16677: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16678: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16679: break; 16680: 16681: //case 0b110_1101: //$xx6D: 16682: //case 0b110_1110: //$xx6E: 16683: //case 0b110_1111: //$xx6F: 16684: 16685: case 0b111_0000: //$xx70: FLGAMMA *m,FPn 16686: if (EFPBox.EPB_EXTRA_OPERATION) { 16687: XEiJ.fpuFPn[n].lgamma (XEiJ.fpuFPn[m]); 16688: break; 16689: } else { 16690: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16691: irpFline (); 16692: break fgen; 16693: } 16694: 16695: case 0b111_0001: //$xx71: FTGAMMA *m,FPn 16696: if (EFPBox.EPB_EXTRA_OPERATION) { 16697: XEiJ.fpuFPn[n].tgamma (XEiJ.fpuFPn[m]); 16698: break; 16699: } else { 16700: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16701: irpFline (); 16702: break fgen; 16703: } 16704: 16705: //case 0b111_0010: //$xx72: 16706: //case 0b111_0011: //$xx73: 16707: //case 0b111_0100: //$xx74: 16708: //case 0b111_0101: //$xx75: 16709: //case 0b111_0110: //$xx76: 16710: //case 0b111_0111: //$xx77: 16711: //case 0b111_1000: //$xx78: 16712: //case 0b111_1001: //$xx79: 16713: //case 0b111_1010: //$xx7A: 16714: //case 0b111_1011: //$xx7B: 16715: //case 0b111_1100: //$xx7C: 16716: //case 0b111_1101: //$xx7D: 16717: //case 0b111_1110: //$xx7E: 16718: //case 0b111_1111: //$xx7F: 16719: 16720: default: //未定義 16721: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16722: irpFline (); 16723: break fgen; 16724: } 16725: //FPSRのFPCCを設定する 16726: XEiJ.fpuBox.epbFpsr |= XEiJ.fpuFPn[n].flg >>> 4; 16727: //FPSRのAEXCを設定する 16728: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16729: //浮動小数点命令実行後例外 floating-point post-instruction exception 16730: if (irpFPPostInstruction (a)) { 16731: break fgen; 16732: } 16733: break fgen; 16734: 16735: 16736: case 0b011: //$6xxx-$7xxx: FMOVE.* FPn,<ea> 16737: // BSUN 常にクリア 16738: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16739: // OPERR byte,word,longで無限大または指定されたサイズに収まらないとき、packedでk-factorが17よりも大きいか指数部が3桁に収まらないときセット、それ以外はクリア 16740: // OVFL packedではなくてオーバーフローしたときセット、それ以外はクリア 16741: // UNFL packedではなくて結果が非正規化数のときセット、それ以外はクリア 16742: // DZ 常にクリア 16743: // INEX2 結果に誤差があるときセット、それ以外はクリア 16744: // INEX1 常にクリア 16745: XEiJ.fpuBox.epbFpsr &= 0xffff00ff; //FMOVE.* FPn,<ea>でFPSRのコンディションコードバイトは変化しない 16746: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 16747: 16748: switch (m) { 16749: 16750: case 0b000: //$60xx-$63xx: FMOVE.L FPn,<ea> 16751: { 16752: int i = XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode); 16753: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16754: XEiJ.regRn[ea] = i; 16755: } else { //Dr以外 16756: a = efaMltLong (ea); 16757: mmuWriteLongData (a, i, XEiJ.regSRS); 16758: } 16759: } 16760: break; 16761: 16762: case 0b001: //$64xx-$67xx: FMOVE.S FPn,<ea> 16763: { 16764: int i = XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode); 16765: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16766: XEiJ.regRn[ea] = i; 16767: } else { //Dr以外 16768: a = efaMltLong (ea); 16769: mmuWriteLongData (a, i, XEiJ.regSRS); 16770: } 16771: } 16772: break; 16773: 16774: case 0b010: //$68xx-$6Bxx: FMOVE.X FPn,<ea> 16775: { 16776: int[] ib = new int[3]; 16777: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16778: XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 16779: } else { //拡張精度 16780: XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 16781: } 16782: a = efaMltExtd (ea); 16783: if ((ea & 070) == 040) { //-(Ar) 16784: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16785: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16786: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16787: } else { //-(Ar)以外 16788: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16789: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16790: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16791: } 16792: } 16793: break; 16794: 16795: case 0b011: //$6Cxx-$6Fxx: FMOVE.P FPn,<ea>{#k} 16796: { 16797: a = efaMltExtd (ea); 16798: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //パックトデシマル 16799: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7; 16800: irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはデスティネーションオペランド 16801: break fgen; 16802: } 16803: int[] ib = new int[3]; 16804: XEiJ.fpuFPn[n].getp012 (ib, 0, w); //k-factor付き 16805: if ((ea & 070) == 040) { //-(Ar) 16806: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16807: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16808: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16809: } else { //-(Ar)以外 16810: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 16811: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 16812: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 16813: } 16814: } 16815: break; 16816: 16817: case 0b100: //$70xx-$73xx: FMOVE.W FPn,<ea> 16818: { 16819: int i = XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode); 16820: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16821: XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~65535 | (char) i; 16822: } else { //Dr以外 16823: a = efaMltWord (ea); 16824: mmuWriteWordData (a, i, XEiJ.regSRS); 16825: } 16826: } 16827: break; 16828: 16829: case 0b101: //$74xx-$77xx: FMOVE.D FPn,<ea> 16830: { 16831: long l = XEiJ.fpuFPn[n].getd01 (XEiJ.fpuBox.epbRoundingMode); 16832: a = efaMltQuad (ea); 16833: mmuWriteQuadData (a, l, XEiJ.regSRS); 16834: } 16835: break; 16836: 16837: case 0b110: //$78xx-$7Bxx: FMOVE.B FPn,<ea> 16838: { 16839: int i = XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode); 16840: if (ea < XEiJ.EA_AR) { //Dr。Ar不可 16841: XEiJ.regRn[ea] = XEiJ.regRn[ea] & ~255 | i & 255; 16842: } else { //Dr以外 16843: a = efaMltByte (ea); 16844: mmuWriteByteData (a, i, XEiJ.regSRS); 16845: } 16846: } 16847: break; 16848: 16849: case 0b111: //$7Cxx-$7Fxx: FMOVE.P FPn,<ea>{Dl} 16850: default: 16851: { 16852: a = efaMltExtd (ea); 16853: if (!XEiJ.fpuBox.epbIsFullSpec ()) { //パックトデシマル 16854: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE & 7; 16855: irpExceptionFormat3 (M68kException.M6E_FP_UNSUPPORTED_DATA_TYPE << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはデスティネーションオペランド 16856: break fgen; 16857: } 16858: byte[] b = new byte[12]; 16859: XEiJ.fpuFPn[n].getp012 (b, 0, XEiJ.regRn[w >> 4 & 7]); //k-factor付き 16860: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 16861: mmuWriteByteArrayDecrement (a, b, 0, 12, XEiJ.regSRS); 16862: } else { //-(Ar) 16863: mmuWriteByteArray (a, b, 0, 12, XEiJ.regSRS); 16864: } 16865: } 16866: } 16867: //FPSRのAEXCを設定する 16868: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16869: //浮動小数点命令実行後例外 floating-point post-instruction exception 16870: if (irpFPPostInstruction (a)) { 16871: break fgen; 16872: } 16873: break fgen; 16874: 16875: 16876: case 0b100: //$8xxx-$9xxx: FMOVEM.L <ea>,FPCR/FPSR/FPIAR 16877: XEiJ.mpuCycleCount += 6; 16878: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16879: // 格納順序はFPCRが下位アドレス(連結したとき上位),FPIARが上位アドレス(連結したとき下位) 16880: 16881: // レジスタリストは転送方向によらず4=FPCR,2=FPSR,1=FPIAR。0のとき1とみなす 16882: // Dr,Arは単一レジスタのみ、ArはFPIARのみ、さもなくば不当命令 16883: // (Ar)+は下位から転送した後にArをまとめて増やし、-(Ar)はArをまとめて減らした後に下位から転送する 16884: // 68060のとき#<data>は単一レジスタのみ、さもなくば未実装実効アドレス 16885: // 複数転送するときもFSLWのSIZEはLong 16886: { 16887: if (m == 0) { //レジスタリストが0のとき 16888: m = 1; //FPIARとみなす 16889: } 16890: int s = m == 7 ? 12 : m == 6 || m == 5 || m == 3 ? 8 : 4; //転送サイズ 16891: if ((ea & 070) == 000) { //Dr 16892: if (4 < s) { //複数 16893: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16894: throw M68kException.m6eSignal; 16895: } 16896: } else if ((ea & 070) == 010) { //Ar 16897: if (m != 1) { //FPIAR以外 16898: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16899: throw M68kException.m6eSignal; 16900: } 16901: } else if ((ea & 070) == 030) { //(Ar)+ 16902: a = XEiJ.regRn[ea - (030 - 8)]; 16903: } else if ((ea & 070) == 040) { //-(Ar) 16904: m60Incremented -= (long) s << (ea << 3); 16905: a = XEiJ.regRn[ea - (040 - 8)] -= s; 16906: } else if (ea == 074) { //#<data> 16907: if (4 < s && //複数 16908: !XEiJ.fpuBox.epbIsFullSpec ()) { //フルスペック以外 16909: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 16910: break fgen; 16911: } 16912: } else { //その他 16913: a = efaMemLong (ea); 16914: } 16915: for (int t = 4; 1 <= t; t >>= 1) { //4,2,1 16916: if ((m & t) == 0) { 16917: continue; 16918: } 16919: int i = (ea < 020 ? XEiJ.regRn[ea] : //Dr,Ar 16920: ea == 074 ? mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) : //#<data> 16921: mmuReadLongData (m60Address = a, XEiJ.regSRS)); 16922: if (t == 4) { //FPCR 16923: XEiJ.fpuBox.epbFpcr = i & EFPBox.EPB_FPCR_ALL; 16924: } else if (t == 2) { //FPSR 16925: XEiJ.fpuBox.epbFpsr = i & EFPBox.EPB_FPSR_ALL; 16926: // fmove.lでfpsrのEXCに書き込んだだけではAEXCは更新されない 16927: // fmove.lでfpsrに0x0000ff00を書き込んですぐに読み出しても0x0000ff00のまま 16928: } else { //FPIAR 16929: XEiJ.fpuBox.epbFpiar = i; 16930: } 16931: a += 4; 16932: } 16933: if ((ea & 070) == 030) { //(Ar)+ 16934: m60Incremented += (long) s << (ea << 3); 16935: XEiJ.regRn[ea - (030 - 8)] += s; 16936: } 16937: } 16938: break fgen; 16939: 16940: 16941: case 0b101: //$Axxx-$Bxxx: FMOVEM.L FPCR/FPSR/FPIAR,<ea> 16942: XEiJ.mpuCycleCount += 4; 16943: 16944: { 16945: if (m == 0) { //レジスタリストが0のとき 16946: m = 1; //FPIARとみなす 16947: } 16948: int s = m == 7 ? 12 : m == 6 || m == 5 || m == 3 ? 8 : 4; //転送サイズ 16949: if ((ea & 070) == 000) { //Dr 16950: if (4 < s) { //複数 16951: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16952: throw M68kException.m6eSignal; 16953: } 16954: } else if ((ea & 070) == 010) { //Ar 16955: if (m != 1) { //FPIAR以外 16956: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 16957: throw M68kException.m6eSignal; 16958: } 16959: } else if ((ea & 070) == 030) { //(Ar)+ 16960: a = XEiJ.regRn[ea - (030 - 8)]; 16961: } else if ((ea & 070) == 040) { //-(Ar) 16962: m60Incremented -= (long) s << (ea << 3); 16963: a = XEiJ.regRn[ea - (040 - 8)] -= s; 16964: } else { //その他 16965: a = efaMltLong (ea); 16966: } 16967: for (int t = 4; 1 <= t; t >>= 1) { //4,2,1 16968: if ((m & t) == 0) { 16969: continue; 16970: } 16971: int i = (t == 4 ? XEiJ.fpuBox.epbFpcr : //FPCR 16972: t == 2 ? XEiJ.fpuBox.epbFpsr : //FPSR 16973: XEiJ.fpuBox.epbFpiar); //FPIAR 16974: if (ea < 020) { //Dr,Ar 16975: XEiJ.regRn[ea] = i; 16976: } else { 16977: mmuWriteLongData (m60Address = a, i, XEiJ.regSRS); 16978: } 16979: a += 4; 16980: } 16981: if ((ea & 070) == 030) { //(Ar)+ 16982: m60Incremented += (long) s << (ea << 3); 16983: XEiJ.regRn[ea - (030 - 8)] += s; 16984: } 16985: } 16986: break fgen; 16987: 16988: 16989: case 0b110: //$Cxxx-$Dxxx: FMOVEM.X <ea>,<list> 16990: // 0 <ea>,<list> 16991: // 1 <list>,<ea> 16992: // 0 -(Ar) 76543210 16993: // 1 -(Ar)以外 01234567 16994: // 0 static 16995: // 1 dynamic 0rrr0000 16996: // mmm 16997: { 16998: if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) { //動的レジスタリスト 16999: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 17000: break fgen; 17001: } 17002: int l = 0xff & ((m & 2) == 0 ? w : XEiJ.regRn[(0x0070 & w) >> 4]); 17003: int[] ib = new int[3]; 17004: if ((ea & 070) == 030) { //(Ar)+ 17005: int arr = ea - (030 - 8); 17006: a = XEiJ.regRn[arr]; 17007: for (n = 0; n <= 7; n++) { 17008: if ((l & (0x80 >> n)) == 0) { //01234567 17009: continue; 17010: } 17011: XEiJ.mpuCycleCount += 3; 17012: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 17013: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 17014: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 17015: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 17016: XEiJ.fpuFPn[n].sety012 (ib, 0); 17017: } else { //拡張精度 17018: XEiJ.fpuFPn[n].setx012 (ib, 0); 17019: } 17020: a += 12; 17021: } 17022: m60Incremented += (long) (a - XEiJ.regRn[arr]) << (arr << 3); 17023: XEiJ.regRn[arr] = a; 17024: } else { //(Ar)+以外 17025: a = efaCntLong (ea); 17026: for (n = 0; n <= 7; n++) { 17027: if ((l & (0x80 >> n)) == 0) { //01234567 17028: continue; 17029: } 17030: XEiJ.mpuCycleCount += 3; 17031: ib[0] = mmuReadLongData (m60Address = a, XEiJ.regSRS); 17032: ib[1] = mmuReadLongData (m60Address = a + 4, XEiJ.regSRS); 17033: ib[2] = mmuReadLongData (m60Address = a + 8, XEiJ.regSRS); 17034: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 17035: XEiJ.fpuFPn[n].sety012 (ib, 0); 17036: } else { //拡張精度 17037: XEiJ.fpuFPn[n].setx012 (ib, 0); 17038: } 17039: a += 12; 17040: } 17041: } 17042: } 17043: break fgen; 17044: 17045: 17046: case 0b111: //$Exxx-$Fxxx: FMOVEM.X <list>,<ea> 17047: { 17048: if ((m & 2) != 0 && !XEiJ.fpuBox.epbIsFullSpec ()) { //動的レジスタリスト 17049: irpExceptionFormat0 (M68kException.M6E_UNIMPLEMENTED_EFFECTIVE << 2, XEiJ.regPC0); //pcは命令の先頭 17050: break fgen; 17051: } 17052: int l = 0xff & ((m & 2) == 0 ? w : XEiJ.regRn[(0x0070 & w) >> 4]); 17053: int[] ib = new int[3]; 17054: if ((ea & 070) == 040) { //-(Ar) 17055: int arr = ea - (040 - 8); 17056: a = XEiJ.regRn[arr]; 17057: for (n = 7; 0 <= n; n--) { 17058: if ((l & (0x01 << n)) == 0) { //76543210 17059: continue; 17060: } 17061: XEiJ.mpuCycleCount += 3; 17062: a -= 12; 17063: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 17064: XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17065: } else { //拡張精度 17066: XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17067: } 17068: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 17069: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 17070: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 17071: } 17072: m60Incremented -= (long) (XEiJ.regRn[arr] - a) << (arr << 3); 17073: XEiJ.regRn[arr] = a; 17074: } else { //-(Ar)以外 17075: a = efaCntLong (ea); 17076: for (n = 0; n <= 7; n++) { 17077: if ((l & (0x80 >> n)) == 0) { //01234567 17078: continue; 17079: } 17080: XEiJ.mpuCycleCount += 3; 17081: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 17082: XEiJ.fpuFPn[n].gety012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17083: } else { //拡張精度 17084: XEiJ.fpuFPn[n].getx012 (ib, 0, XEiJ.fpuBox.epbRoundingMode); 17085: } 17086: mmuWriteLongData (m60Address = a, ib[0], XEiJ.regSRS); 17087: mmuWriteLongData (m60Address = a + 4, ib[1], XEiJ.regSRS); 17088: mmuWriteLongData (m60Address = a + 8, ib[2], XEiJ.regSRS); 17089: a += 12; 17090: } 17091: } 17092: } 17093: break fgen; 17094: 17095: 17096: case 0b001: //$2xxx-$3xxx: 未定義 17097: default: //未定義 17098: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17099: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 17100: irpFline (); 17101: break fgen; 17102: } 17103: } //fgen 17104: } //irpFgen 17105: 17106: 17107: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17108: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17109: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17110: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17111: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 17112: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 17113: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 17114: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 17115: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 17116: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 17117: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 17118: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 17119: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 17120: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 17121: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 17122: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 17123: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 17124: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 17125: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 17126: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 17127: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 17128: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 17129: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 17130: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 17131: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 17132: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 17133: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 17134: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 17135: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 17136: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 17137: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 17138: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 17139: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 17140: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 17141: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 17142: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 17143: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 17144: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 17145: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 17146: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 17147: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 17148: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 17149: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 17150: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 17151: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 17152: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 17153: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 17154: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 17155: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 17156: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 17157: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 17158: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 17159: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 17160: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 17161: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 17162: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 17163: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 17164: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 17165: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 17166: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 17167: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 17168: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 17169: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 17170: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 17171: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 17172: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 17173: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 17174: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 17175: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 17176: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 17177: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 17178: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 17179: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 17180: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 17181: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 17182: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 17183: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 17184: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 17185: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 17186: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 17187: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 17188: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 17189: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 17190: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 17191: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 17192: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 17193: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 17194: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 17195: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 17196: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 17197: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 17198: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 17199: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 17200: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 17201: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 17202: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 17203: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 17204: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 17205: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 17206: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 17207: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 17208: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 17209: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 17210: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 17211: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 17212: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 17213: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 17214: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 17215: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 17216: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 17217: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 17218: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 17219: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 17220: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 17221: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 17222: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 17223: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 17224: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 17225: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 17226: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 17227: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 17228: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 17229: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 17230: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 17231: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 17232: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 17233: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 17234: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 17235: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 17236: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 17237: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 17238: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 17239: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 17240: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 17241: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 17242: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 17243: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 17244: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 17245: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 17246: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 17247: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 17248: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 17249: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 17250: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 17251: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 17252: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 17253: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 17254: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 17255: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 17256: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 17257: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 17258: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 17259: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 17260: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 17261: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 17262: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 17263: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 17264: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 17265: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 17266: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 17267: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 17268: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 17269: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 17270: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 17271: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 17272: public static void irpFscc () throws M68kException { 17273: fscc: { 17274: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 17275: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17276: irpFline (); 17277: break fscc; 17278: } 17279: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17280: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz。拡張ワード 17281: if ((w & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17282: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17283: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17284: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17285: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7; 17286: irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0); //pcは命令の先頭 17287: break fscc; 17288: } 17289: } 17290: int ea = XEiJ.regOC & 63; 17291: if (ea < XEiJ.EA_AR) { //FScc.B Dr 17292: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17293: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0); //pcは次の命令,アドレスは実効アドレス 17294: break fscc; 17295: } 17296: if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //セット 17297: XEiJ.mpuCycleCount++; 17298: XEiJ.regRn[ea] |= 0xff; 17299: } else { //クリア 17300: XEiJ.mpuCycleCount++; 17301: XEiJ.regRn[ea] &= ~0xff; 17302: } 17303: } else if (ea < XEiJ.EA_MM) { //FDBcc Dr,<label> 17304: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17305: XEiJ.regPC += 2; //オフセットを読み飛ばす 17306: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0); //pcは次の命令,アドレスは実効アドレス 17307: break fscc; 17308: } 17309: if (XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //条件が成立しているので通過 17310: XEiJ.mpuCycleCount += 2; 17311: XEiJ.regPC += 2; //オフセットを読み飛ばす 17312: } else { 17313: int rrr = XEiJ.regOC & 7; 17314: int t = XEiJ.regRn[rrr]; 17315: if ((short) t == 0) { //Drの下位16bitが0なので通過 17316: XEiJ.mpuCycleCount += 2; 17317: XEiJ.regRn[rrr] = t + 65535; 17318: XEiJ.regPC += 2; //オフセットを読み飛ばす 17319: } else { //Drの下位16bitが0でないのでジャンプ 17320: XEiJ.mpuCycleCount++; 17321: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 17322: irpSetPC (XEiJ.regPC + mmuReadWordSignExword (XEiJ.regPC, XEiJ.regSRS)); //pc==pc0+2 17323: } 17324: } 17325: } else if (ea < XEiJ.EA_PW) { //FScc.B <mem> 17326: int a = efaMltByte (ea); 17327: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17328: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, a); //pcは次の命令,アドレスは実効アドレス 17329: break fscc; 17330: } 17331: XEiJ.mpuCycleCount++; 17332: mmuWriteByteData (a, XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15] ? 0xff : 0x00, XEiJ.regSRS); 17333: } else if (ea <= XEiJ.EA_IM) { //FTRAPcc.W/FTRAPcc.L/FTRAPcc 17334: if (ea == 072) { //.W 17335: mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 17336: } else if (ea == 073) { //.L 17337: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 17338: } 17339: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 17340: irpExceptionFormat2 (M68kException.M6E_FP_UNIMPLEMENTED_INSTRUCTION << 2, XEiJ.regPC, 0); //pcは次の命令,アドレスは実効アドレス 17341: break fscc; 17342: } 17343: if (!XEiJ.FPU_CCMAP_060[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //通過 17344: XEiJ.mpuCycleCount += 2; 17345: } else { 17346: m60Address = XEiJ.regPC0; //アドレスは命令の先頭 17347: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 17348: throw M68kException.m6eSignal; 17349: } 17350: } else { 17351: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 17352: irpFline (); 17353: break fscc; 17354: } 17355: } //fscc 17356: } //irpFscc 17357: 17358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17359: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17360: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17361: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17362: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 17363: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 17364: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 17365: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 17366: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 17367: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 17368: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 17369: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 17370: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 17371: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 17372: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 17373: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 17374: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 17375: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 17376: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 17377: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 17378: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 17379: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 17380: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 17381: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 17382: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 17383: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 17384: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 17385: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 17386: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 17387: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 17388: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 17389: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 17390: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 17391: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 17392: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 17393: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 17394: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 17395: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 17396: public static void irpFbccWord () throws M68kException { 17397: fbcc: { 17398: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 17399: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17400: irpFline (); 17401: break fbcc; 17402: } 17403: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17404: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17405: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17406: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17407: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17408: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7; 17409: irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0); //pcは命令の先頭 17410: break fbcc; 17411: } 17412: } 17413: XEiJ.mpuCycleCount++; 17414: int t = XEiJ.regPC; //pc0+2 17415: XEiJ.regPC = t + 2; //pc0+4 17416: t += mmuReadWordSignExword (t, XEiJ.regSRS); //pc0+2+16bitディスプレースメント 17417: if ((t & 1) != 0) { //分岐先のアドレスが奇数 17418: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 17419: irpBccAddressError (t); 17420: } 17421: if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //分岐する 17422: irpSetPC (t); 17423: } 17424: } //fbcc 17425: } //irpFbccWord 17426: 17427: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17428: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17429: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17430: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17431: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 17432: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 17433: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 17434: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 17435: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 17436: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 17437: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 17438: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 17439: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 17440: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 17441: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 17442: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 17443: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 17444: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 17445: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 17446: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 17447: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 17448: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 17449: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 17450: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 17451: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 17452: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 17453: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 17454: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 17455: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 17456: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 17457: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 17458: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 17459: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 17460: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 17461: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 17462: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 17463: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 17464: public static void irpFbccLong () throws M68kException { 17465: fbcc: { 17466: //XEiJ.fpuBox.epbExceptionStatusWord = 0; 17467: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17468: irpFline (); 17469: break fbcc; 17470: } 17471: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17472: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17473: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17474: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17475: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17476: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | M68kException.M6E_FP_BRANCH_SET_UNORDERED & 7; 17477: irpExceptionFormat0 (M68kException.M6E_FP_BRANCH_SET_UNORDERED << 2, XEiJ.regPC0); //pcは命令の先頭 17478: break fbcc; 17479: } 17480: } 17481: XEiJ.mpuCycleCount++; 17482: int t = XEiJ.regPC; //pc0+2 17483: XEiJ.regPC = t + 4; //pc0+6 17484: t += mmuReadLongExword (t, XEiJ.regSRS); //pc0+2+32bitディスプレースメント 17485: if ((t & 1) != 0) { //分岐先のアドレスが奇数 17486: //MC68060のBcc/DBcc/FBccは分岐先のアドレスが奇数のとき分岐しなくてもアドレスエラーになる。FDBccは分岐するときだけ 17487: irpBccAddressError (t); 17488: } 17489: if (XEiJ.FPU_CCMAP_060[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //分岐する 17490: irpSetPC (t); 17491: } 17492: } //fbcc 17493: } //irpFbccLong 17494: 17495: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17496: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17497: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17498: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17499: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 17500: public static void irpFsave () throws M68kException { 17501: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17502: irpFline (); 17503: return; 17504: } 17505: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17506: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17507: throw M68kException.m6eSignal; 17508: } 17509: //以下はスーパーバイザモード 17510: XEiJ.mpuCycleCount += 3; 17511: int ea = XEiJ.regOC & 63; 17512: int a; 17513: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 17514: int arr = XEiJ.regOC & 7 | 8; 17515: m60Incremented -= 12L << (arr << 3); 17516: a = m60Address = XEiJ.regRn[arr] -= 12; 17517: } else { //-(Ar)以外 17518: a = efaCltWord (ea); 17519: } 17520: if (XEiJ.fpuBox.epbExceptionStatusWord == 0) { //例外なし 17521: mmuWriteLongData (a, 0x00006000, 1); //アイドルフレーム 17522: mmuWriteQuadSecond (a + 4, 0L, 1); 17523: } else { //例外あり 17524: mmuWriteLongData (a, XEiJ.fpuBox.epbExceptionOperandExponent | XEiJ.fpuBox.epbExceptionStatusWord, 1); //例外フレーム 17525: mmuWriteQuadSecond (a + 4, XEiJ.fpuBox.epbExceptionOperandMantissa, 1); 17526: XEiJ.fpuBox.epbExceptionStatusWord = 0; 17527: } 17528: } //irpFsave 17529: 17530: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17531: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17532: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17533: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17534: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 17535: public static void irpFrestore () throws M68kException { 17536: if ((7 & XEiJ.currentOnchipFPU) == 0) { 17537: irpFline (); 17538: return; 17539: } 17540: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17541: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17542: throw M68kException.m6eSignal; 17543: } 17544: //以下はスーパーバイザモード 17545: XEiJ.mpuCycleCount += 6; 17546: int ea = XEiJ.regOC & 63; 17547: int a; 17548: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 17549: int arr = XEiJ.regOC & 7 | 8; 17550: m60Incremented += 12L << (arr << 3); 17551: a = m60Address = (XEiJ.regRn[arr] += 12) - 12; 17552: } else { //(Ar)+以外 17553: a = efaCntWord (ea); 17554: } 17555: int i = mmuReadLongData (a, 1); 17556: long l = mmuReadQuadData (a + 4, 1); 17557: if ((i & 0xff00) == 0xe000) { //例外フレーム 17558: //例外ハンドラが0xe0xxを0x60xxに変更してFRESTOREする場合がある 17559: XEiJ.fpuBox.epbExceptionStatusWord = (char) i; 17560: XEiJ.fpuBox.epbExceptionOperandExponent = i & 0xffff0000; 17561: XEiJ.fpuBox.epbExceptionOperandMantissa = l; 17562: } else { 17563: XEiJ.fpuBox.epbExceptionStatusWord = 0; 17564: XEiJ.fpuBox.epbExceptionOperandExponent = 0; 17565: XEiJ.fpuBox.epbExceptionOperandMantissa = 0x0000000000000000L; 17566: } 17567: //FPSRのAEXCをクリアする 17568: XEiJ.fpuBox.epbFpsr = 0; 17569: //FPIARをクリアする 17570: XEiJ.fpuBox.epbFpiar = 0; 17571: } //irpFrestore 17572: 17573: //irpFPPreInstruction () 17574: // 浮動小数点命令実行前例外 floating-point pre-instruction exception 17575: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17576: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17577: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17578: public static boolean irpFPPreInstruction () throws M68kException { 17579: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17580: if (mask == 0) { 17581: return false; 17582: } 17583: int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)]; 17584: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7; 17585: irpExceptionFormat0 (number << 2, XEiJ.regPC0); //pcは命令の先頭 17586: return true; 17587: } //irpFPPreInstruction() 17588: 17589: //irpFPPostInstruction (a) 17590: // 浮動小数点命令実行後例外 floating-point post-instruction exception 17591: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17592: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17593: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17594: public static boolean irpFPPostInstruction (int a) throws M68kException { 17595: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17596: if (mask == 0) { 17597: return false; 17598: } 17599: int number = FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)]; 17600: XEiJ.fpuBox.epbExceptionStatusWord = 0xe000 | number & 7; 17601: irpExceptionFormat3 (number << 2, XEiJ.regPC, a); //pcは次の命令,アドレスはデスティネーションオペランド 17602: return true; 17603: } //irpFPPostInstruction(int) 17604: 17605: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17606: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17607: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17608: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17609: //CINVL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_001_rrr 17610: //CINVP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_010_rrr 17611: //CINVA NC |-|----46|P|-----|-----| |1111_010_000_011_000 17612: //CPUSHL NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_101_rrr 17613: //CPUSHP NC,(Ar) |-|----46|P|-----|-----| |1111_010_000_110_rrr 17614: //CPUSHA NC |-|----46|P|-----|-----| |1111_010_000_111_000 17615: public static void irpCinvCpushNC () throws M68kException { 17616: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17617: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17618: throw M68kException.m6eSignal; 17619: } 17620: //以下はスーパーバイザモード 17621: if (CAT_ON) { 17622: int a = XEiJ.regRn[8 + (XEiJ.regOC & 0b000_111)]; 17623: switch (XEiJ.regOC & 0b111_000) { 17624: case 0b001_000: 17625: catInvL (0, a); 17626: break; 17627: case 0b010_000: 17628: catInvP (0, a); 17629: break; 17630: case 0b011_000: 17631: catInvA (0); 17632: break; 17633: case 0b101_000: 17634: catPushL (0, a); 17635: break; 17636: case 0b110_000: 17637: catPushP (0, a); 17638: break; 17639: case 0b111_000: 17640: catPushA (0); 17641: break; 17642: } 17643: } else { 17644: XEiJ.mpuCycleCount++; 17645: } 17646: } //irpCinvCpushNC 17647: 17648: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17649: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17650: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17651: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17652: //CINVL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_001_rrr 17653: //CINVP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_010_rrr 17654: //CINVA DC |-|----46|P|-----|-----| |1111_010_001_011_000 17655: //CPUSHL DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_101_rrr 17656: //CPUSHP DC,(Ar) |-|----46|P|-----|-----| |1111_010_001_110_rrr 17657: //CPUSHA DC |-|----46|P|-----|-----| |1111_010_001_111_000 17658: public static void irpCinvCpushDC () throws M68kException { 17659: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17660: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17661: throw M68kException.m6eSignal; 17662: } 17663: //以下はスーパーバイザモード 17664: if (CAT_ON) { 17665: int a = XEiJ.regRn[8 + (XEiJ.regOC & 0b000_111)]; 17666: switch (XEiJ.regOC & 0b111_000) { 17667: case 0b001_000: 17668: catInvL (1, a); 17669: break; 17670: case 0b010_000: 17671: catInvP (1, a); 17672: break; 17673: case 0b011_000: 17674: catInvA (1); 17675: break; 17676: case 0b101_000: 17677: catPushL (1, a); 17678: break; 17679: case 0b110_000: 17680: catPushP (1, a); 17681: break; 17682: case 0b111_000: 17683: catPushA (1); 17684: break; 17685: } 17686: } else { 17687: XEiJ.mpuCycleCount++; 17688: } 17689: } //irpCinvCpushDC 17690: 17691: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17692: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17693: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17694: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17695: //CINVL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_001_rrr 17696: //CINVP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_010_rrr 17697: //CINVA IC |-|----46|P|-----|-----| |1111_010_010_011_000 17698: //CPUSHL IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_101_rrr 17699: //CPUSHP IC,(Ar) |-|----46|P|-----|-----| |1111_010_010_110_rrr 17700: //CPUSHA IC |-|----46|P|-----|-----| |1111_010_010_111_000 17701: public static void irpCinvCpushIC () throws M68kException { 17702: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17703: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17704: throw M68kException.m6eSignal; 17705: } 17706: //以下はスーパーバイザモード 17707: if (CAT_ON) { 17708: int a = XEiJ.regRn[8 + (XEiJ.regOC & 0b000_111)]; 17709: switch (XEiJ.regOC & 0b111_000) { 17710: case 0b001_000: 17711: catInvL (2, a); 17712: break; 17713: case 0b010_000: 17714: catInvP (2, a); 17715: break; 17716: case 0b011_000: 17717: catInvA (2); 17718: break; 17719: case 0b101_000: 17720: catPushL (2, a); 17721: break; 17722: case 0b110_000: 17723: catPushP (2, a); 17724: break; 17725: case 0b111_000: 17726: catPushA (2); 17727: break; 17728: } 17729: } else { 17730: XEiJ.mpuCycleCount++; 17731: } 17732: } //irpCinvCpushIC 17733: 17734: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17735: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17736: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17737: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17738: //CINVL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_001_rrr 17739: //CINVP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_010_rrr 17740: //CINVA BC |-|----46|P|-----|-----| |1111_010_011_011_000 17741: //CPUSHL BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_101_rrr 17742: //CPUSHP BC,(Ar) |-|----46|P|-----|-----| |1111_010_011_110_rrr 17743: //CPUSHA BC |-|----46|P|-----|-----| |1111_010_011_111_000 17744: public static void irpCinvCpushBC () throws M68kException { 17745: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17746: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17747: throw M68kException.m6eSignal; 17748: } 17749: //以下はスーパーバイザモード 17750: if (CAT_ON) { 17751: int a = XEiJ.regRn[8 + (XEiJ.regOC & 0b000_111)]; 17752: switch (XEiJ.regOC & 0b111_000) { 17753: case 0b001_000: 17754: catInvL (3, a); 17755: break; 17756: case 0b010_000: 17757: catInvP (3, a); 17758: break; 17759: case 0b011_000: 17760: catInvA (3); 17761: break; 17762: case 0b101_000: 17763: catPushL (3, a); 17764: break; 17765: case 0b110_000: 17766: catPushP (3, a); 17767: break; 17768: case 0b111_000: 17769: catPushA (3); 17770: break; 17771: } 17772: } else { 17773: XEiJ.mpuCycleCount++; 17774: } 17775: } //irpCinvCpushBC 17776: 17777: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17778: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17779: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17780: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17781: //PFLUSHN (Ar) |-|----46|P|-----|-----| |1111_010_100_000_rrr 17782: //PFLUSH (Ar) |-|----46|P|-----|-----| |1111_010_100_001_rrr 17783: //PFLUSHAN |-|----46|P|-----|-----| |1111_010_100_010_000 17784: //PFLUSHA |-|----46|P|-----|-----| |1111_010_100_011_000 17785: public static void irpPflush () throws M68kException { 17786: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17787: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17788: throw M68kException.m6eSignal; 17789: } 17790: //以下はスーパーバイザモード 17791: if (XEiJ.regOC <= 0b1111_010_100_000_111) { //PFLUSHN (An) 17792: XEiJ.mpuCycleCount += 18; 17793: mmuInvalidateNonGlobalCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_000_000 - 8)]); 17794: } else if (XEiJ.regOC <= 0b1111_010_100_001_111) { //PFLUSH (An) 17795: XEiJ.mpuCycleCount += 18; 17796: mmuInvalidateCache (XEiJ.regRn[XEiJ.regOC - (0b1111_010_100_001_000 - 8)]); 17797: } else if (XEiJ.regOC == 0b1111_010_100_010_000) { //PFLUSHAN 17798: XEiJ.mpuCycleCount += 33; 17799: mmuInvalidateAllNonGlobalCache (); 17800: } else if (XEiJ.regOC == 0b1111_010_100_011_000) { //PFLUSHA 17801: XEiJ.mpuCycleCount += 33; 17802: mmuInvalidateAllCache (); 17803: } else { 17804: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17805: throw M68kException.m6eSignal; 17806: } 17807: } //irpPflush 17808: 17809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17810: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17811: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17812: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17813: //PLPAW (Ar) |-|-----6|P|-----|-----| |1111_010_110_001_rrr 17814: public static void irpPlpaw () throws M68kException { 17815: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17816: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17817: throw M68kException.m6eSignal; 17818: } 17819: //以下はスーパーバイザモード 17820: XEiJ.mpuCycleCount += 15; 17821: int ann = XEiJ.regOC - (0b1111_010_110_001_000 - 8); //8+nnn 17822: XEiJ.regRn[ann] = mmuLoadPhysicalAddressWrite (XEiJ.regRn[ann]); 17823: } //irpPlpaw 17824: 17825: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17826: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17827: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17828: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17829: //PLPAR (Ar) |-|-----6|P|-----|-----| |1111_010_111_001_rrr 17830: // 17831: //PLPAR (Ar) 17832: // ReadだがSFCではなくDFCを使う 17833: public static void irpPlpar () throws M68kException { 17834: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17835: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17836: throw M68kException.m6eSignal; 17837: } 17838: //以下はスーパーバイザモード 17839: XEiJ.mpuCycleCount += 15; 17840: int ann = XEiJ.regOC - (0b1111_010_111_001_000 - 8); //8+nnn 17841: XEiJ.regRn[ann] = mmuLoadPhysicalAddressRead (XEiJ.regRn[ann]); 17842: } //irpPlpar 17843: 17844: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17845: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17846: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17847: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17848: //MOVE16 (Ar)+,xxx.L |-|----46|-|-----|-----| |1111_011_000_000_rrr-{address} 17849: //MOVE16 xxx.L,(Ar)+ |-|----46|-|-----|-----| |1111_011_000_001_rrr-{address} 17850: //MOVE16 (Ar),xxx.L |-|----46|-|-----|-----| |1111_011_000_010_rrr-{address} 17851: //MOVE16 xxx.L,(Ar) |-|----46|-|-----|-----| |1111_011_000_011_rrr-{address} 17852: //MOVE16 (Ar)+,(An)+ |-|----46|-|-----|-----| |1111_011_000_100_rrr-1nnn000000000000 17853: // 17854: //MOVE16 (Ar)+,xxx.L 17855: //MOVE16 xxx.L,(Ar)+ 17856: //MOVE16 (Ar),xxx.L 17857: //MOVE16 xxx.L,(Ar) 17858: //MOVE16 (Ar)+,(An)+ 17859: // アドレスの下位4bitは無視される 17860: // ポストインクリメントで16増えるとき下位4bitは変化しない 17861: // r==nのときMOVE16 (Ar)+,(Ar)+はMOVE16 (Ar),(Ar)+のような動作になる。データは動かずArは16だけ増える(M68060UM 1-21) 17862: public static void irpMove16 () throws M68kException { 17863: if (XEiJ.regOC <= 0b1111_011_000_011_111) { //どちらかがxxx.L 17864: if (CAT_ON) { 17865: catMove16Start (); 17866: } else { 17867: XEiJ.mpuCycleCount += 18; 17868: } 17869: int arr = XEiJ.regOC - (0b1111_011_000_000_000 - 8); //8+rrr 17870: int a = XEiJ.regRn[arr] & -16; 17871: int x = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS) & -16; //pcls 17872: if ((XEiJ.regOC & 0b001_000) == 0) { //(Ar)→xxx.L 17873: long l = mmuReadQuadData (m60Address = a, XEiJ.regSRS); 17874: long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS); 17875: mmuWriteQuadData (m60Address = x, l, XEiJ.regSRS); 17876: mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS); 17877: } else { //xxx.L→(An) 17878: long l = mmuReadQuadData (m60Address = x, XEiJ.regSRS); 17879: long m = mmuReadQuadSecond (x + 8, XEiJ.regSRS); 17880: mmuWriteQuadData (m60Address = a, l, XEiJ.regSRS); 17881: mmuWriteQuadSecond (a + 8, m, XEiJ.regSRS); 17882: } 17883: if ((XEiJ.regOC & 0b010_000) == 0) { //(Ar)+ 17884: XEiJ.regRn[arr] += 16; //aはマスクされているのでa+16は不可 17885: } 17886: if (CAT_ON) { 17887: catMove16End (); 17888: } 17889: } else if (XEiJ.regOC <= 0b1111_011_000_100_111) { 17890: int w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //pcwz 17891: if ((w & 0b1000111111111111) == 0b1000000000000000) { //MOVE16 (Ar)+,(As)+ 17892: if (CAT_ON) { 17893: catMove16Start (); 17894: } else { 17895: XEiJ.mpuCycleCount += 18; 17896: } 17897: int arr = XEiJ.regOC - (0b1111_011_000_100_000 - 8); //8+rrr 17898: int a = XEiJ.regRn[arr] & -16; 17899: int ass = w >> 12; //8+sss 17900: int x = XEiJ.regRn[ass] & -16; 17901: long l = mmuReadQuadData (m60Address = a, XEiJ.regSRS); 17902: long m = mmuReadQuadSecond (a + 8, XEiJ.regSRS); 17903: mmuWriteQuadData (m60Address = x, l, XEiJ.regSRS); 17904: mmuWriteQuadSecond (x + 8, m, XEiJ.regSRS); 17905: XEiJ.regRn[arr] += 16; //aはマスクされているのでa+16は不可 17906: if (arr != ass) { 17907: XEiJ.regRn[ass] += 16; //xはマスクされているのでx+16は不可 17908: } 17909: if (CAT_ON) { 17910: catMove16End (); 17911: } 17912: } else { 17913: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17914: throw M68kException.m6eSignal; 17915: } 17916: } else { 17917: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17918: throw M68kException.m6eSignal; 17919: } 17920: } //irpMove16 17921: 17922: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17923: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17924: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17926: //LPSTOP.W #<data> |-|-----6|P|-----|-----| |1111_100_000_000_000-0000000111000000-{data} 17927: public static void irpLpstop () throws M68kException { 17928: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17929: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17930: throw M68kException.m6eSignal; 17931: } 17932: //以下はスーパーバイザモード 17933: //!!! 非対応 17934: } //irpLpstop 17935: 17936: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17937: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17938: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17940: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 17941: public static void irpFpack () throws M68kException { 17942: if (!MainMemory.mmrFEfuncActivated) { 17943: irpFline (); 17944: return; 17945: } 17946: StringBuilder sb; 17947: int a0; 17948: if (FEFunction.FPK_DEBUG_TRACE) { 17949: sb = new StringBuilder (); 17950: String name = Disassembler.DIS_FPACK_NAME[XEiJ.regOC & 255]; 17951: if (name.length () == 0) { 17952: XEiJ.fmtHex4 (sb.append ('$'), XEiJ.regOC); 17953: } else { 17954: sb.append (name); 17955: } 17956: sb.append ('\n'); 17957: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 17958: a0 = XEiJ.regRn[8]; 17959: MainMemory.mmrRstr (sb.append (" (A0)=\""), a0, MainMemory.mmrStrlen (a0, 20)).append ("\"\n"); 17960: } 17961: XEiJ.mpuCycleCount += FEFunction.FPK_CLOCK; //一律にFEFunction.FPK_CLOCKサイクルかかることにする 17962: switch (XEiJ.regOC & 255) { 17963: case 0x00: FEFunction.fpkLMUL (); break; 17964: case 0x01: FEFunction.fpkLDIV (); break; 17965: case 0x02: FEFunction.fpkLMOD (); break; 17966: //case 0x03: break; 17967: case 0x04: FEFunction.fpkUMUL (); break; 17968: case 0x05: FEFunction.fpkUDIV (); break; 17969: case 0x06: FEFunction.fpkUMOD (); break; 17970: //case 0x07: break; 17971: case 0x08: FEFunction.fpkIMUL (); break; 17972: case 0x09: FEFunction.fpkIDIV (); break; 17973: //case 0x0a: break; 17974: //case 0x0b: break; 17975: case 0x0c: FEFunction.fpkRANDOMIZE (); break; 17976: case 0x0d: FEFunction.fpkSRAND (); break; 17977: case 0x0e: FEFunction.fpkRAND (); break; 17978: //case 0x0f: break; 17979: case 0x10: fpkSTOL (); break; 17980: case 0x11: fpkLTOS (); break; 17981: case 0x12: fpkSTOH (); break; 17982: case 0x13: fpkHTOS (); break; 17983: case 0x14: fpkSTOO (); break; 17984: case 0x15: fpkOTOS (); break; 17985: case 0x16: fpkSTOB (); break; 17986: case 0x17: fpkBTOS (); break; 17987: case 0x18: fpkIUSING (); break; 17988: //case 0x19: break; 17989: case 0x1a: FEFunction.fpkLTOD (); break; 17990: case 0x1b: FEFunction.fpkDTOL (); break; 17991: case 0x1c: FEFunction.fpkLTOF (); break; 17992: case 0x1d: FEFunction.fpkFTOL (); break; 17993: case 0x1e: FEFunction.fpkFTOD (); break; 17994: case 0x1f: FEFunction.fpkDTOF (); break; 17995: case 0x20: fpkVAL (); break; 17996: case 0x21: fpkUSING (); break; 17997: case 0x22: fpkSTOD (); break; 17998: case 0x23: fpkDTOS (); break; 17999: case 0x24: fpkECVT (); break; 18000: case 0x25: fpkFCVT (); break; 18001: case 0x26: fpkGCVT (); break; 18002: //case 0x27: break; 18003: case 0x28: FEFunction.fpkDTST (); break; 18004: case 0x29: FEFunction.fpkDCMP (); break; 18005: case 0x2a: FEFunction.fpkDNEG (); break; 18006: case 0x2b: FEFunction.fpkDADD (); break; 18007: case 0x2c: FEFunction.fpkDSUB (); break; 18008: case 0x2d: FEFunction.fpkDMUL (); break; 18009: case 0x2e: FEFunction.fpkDDIV (); break; 18010: case 0x2f: FEFunction.fpkDMOD (); break; 18011: case 0x30: FEFunction.fpkDABS (); break; 18012: case 0x31: FEFunction.fpkDCEIL (); break; 18013: case 0x32: FEFunction.fpkDFIX (); break; 18014: case 0x33: FEFunction.fpkDFLOOR (); break; 18015: case 0x34: FEFunction.fpkDFRAC (); break; 18016: case 0x35: FEFunction.fpkDSGN (); break; 18017: case 0x36: FEFunction.fpkSIN (); break; 18018: case 0x37: FEFunction.fpkCOS (); break; 18019: case 0x38: FEFunction.fpkTAN (); break; 18020: case 0x39: FEFunction.fpkATAN (); break; 18021: case 0x3a: FEFunction.fpkLOG (); break; 18022: case 0x3b: FEFunction.fpkEXP (); break; 18023: case 0x3c: FEFunction.fpkSQR (); break; 18024: case 0x3d: FEFunction.fpkPI (); break; 18025: case 0x3e: FEFunction.fpkNPI (); break; 18026: case 0x3f: FEFunction.fpkPOWER (); break; 18027: case 0x40: FEFunction.fpkRND (); break; 18028: case 0x41: FEFunction.fpkSINH (); break; 18029: case 0x42: FEFunction.fpkCOSH (); break; 18030: case 0x43: FEFunction.fpkTANH (); break; 18031: case 0x44: FEFunction.fpkATANH (); break; 18032: case 0x45: FEFunction.fpkASIN (); break; 18033: case 0x46: FEFunction.fpkACOS (); break; 18034: case 0x47: FEFunction.fpkLOG10 (); break; 18035: case 0x48: FEFunction.fpkLOG2 (); break; 18036: case 0x49: FEFunction.fpkDFREXP (); break; 18037: case 0x4a: FEFunction.fpkDLDEXP (); break; 18038: case 0x4b: FEFunction.fpkDADDONE (); break; 18039: case 0x4c: FEFunction.fpkDSUBONE (); break; 18040: case 0x4d: FEFunction.fpkDDIVTWO (); break; 18041: case 0x4e: FEFunction.fpkDIEECNV (); break; 18042: case 0x4f: FEFunction.fpkIEEDCNV (); break; 18043: case 0x50: fpkFVAL (); break; 18044: case 0x51: FEFunction.fpkFUSING (); break; 18045: case 0x52: FEFunction.fpkSTOF (); break; 18046: case 0x53: FEFunction.fpkFTOS (); break; 18047: case 0x54: FEFunction.fpkFECVT (); break; 18048: case 0x55: FEFunction.fpkFFCVT (); break; 18049: case 0x56: FEFunction.fpkFGCVT (); break; 18050: //case 0x57: break; 18051: case 0x58: FEFunction.fpkFTST (); break; 18052: case 0x59: FEFunction.fpkFCMP (); break; 18053: case 0x5a: FEFunction.fpkFNEG (); break; 18054: case 0x5b: FEFunction.fpkFADD (); break; 18055: case 0x5c: FEFunction.fpkFSUB (); break; 18056: case 0x5d: FEFunction.fpkFMUL (); break; 18057: case 0x5e: FEFunction.fpkFDIV (); break; 18058: case 0x5f: FEFunction.fpkFMOD (); break; 18059: case 0x60: FEFunction.fpkFABS (); break; 18060: case 0x61: FEFunction.fpkFCEIL (); break; 18061: case 0x62: FEFunction.fpkFFIX (); break; 18062: case 0x63: FEFunction.fpkFFLOOR (); break; 18063: case 0x64: FEFunction.fpkFFRAC (); break; 18064: case 0x65: FEFunction.fpkFSGN (); break; 18065: case 0x66: FEFunction.fpkFSIN (); break; 18066: case 0x67: FEFunction.fpkFCOS (); break; 18067: case 0x68: FEFunction.fpkFTAN (); break; 18068: case 0x69: FEFunction.fpkFATAN (); break; 18069: case 0x6a: FEFunction.fpkFLOG (); break; 18070: case 0x6b: FEFunction.fpkFEXP (); break; 18071: case 0x6c: FEFunction.fpkFSQR (); break; 18072: case 0x6d: FEFunction.fpkFPI (); break; 18073: case 0x6e: FEFunction.fpkFNPI (); break; 18074: case 0x6f: FEFunction.fpkFPOWER (); break; 18075: case 0x70: FEFunction.fpkFRND (); break; 18076: case 0x71: FEFunction.fpkFSINH (); break; 18077: case 0x72: FEFunction.fpkFCOSH (); break; 18078: case 0x73: FEFunction.fpkFTANH (); break; 18079: case 0x74: FEFunction.fpkFATANH (); break; 18080: case 0x75: FEFunction.fpkFASIN (); break; 18081: case 0x76: FEFunction.fpkFACOS (); break; 18082: case 0x77: FEFunction.fpkFLOG10 (); break; 18083: case 0x78: FEFunction.fpkFLOG2 (); break; 18084: case 0x79: FEFunction.fpkFFREXP (); break; 18085: case 0x7a: FEFunction.fpkFLDEXP (); break; 18086: case 0x7b: FEFunction.fpkFADDONE (); break; 18087: case 0x7c: FEFunction.fpkFSUBONE (); break; 18088: case 0x7d: FEFunction.fpkFDIVTWO (); break; 18089: case 0x7e: FEFunction.fpkFIEECNV (); break; 18090: case 0x7f: FEFunction.fpkIEEFCNV (); break; 18091: //case 0x80: break; 18092: //case 0x81: break; 18093: //case 0x82: break; 18094: //case 0x83: break; 18095: //case 0x84: break; 18096: //case 0x85: break; 18097: //case 0x86: break; 18098: //case 0x87: break; 18099: //case 0x88: break; 18100: //case 0x89: break; 18101: //case 0x8a: break; 18102: //case 0x8b: break; 18103: //case 0x8c: break; 18104: //case 0x8d: break; 18105: //case 0x8e: break; 18106: //case 0x8f: break; 18107: //case 0x90: break; 18108: //case 0x91: break; 18109: //case 0x92: break; 18110: //case 0x93: break; 18111: //case 0x94: break; 18112: //case 0x95: break; 18113: //case 0x96: break; 18114: //case 0x97: break; 18115: //case 0x98: break; 18116: //case 0x99: break; 18117: //case 0x9a: break; 18118: //case 0x9b: break; 18119: //case 0x9c: break; 18120: //case 0x9d: break; 18121: //case 0x9e: break; 18122: //case 0x9f: break; 18123: //case 0xa0: break; 18124: //case 0xa1: break; 18125: //case 0xa2: break; 18126: //case 0xa3: break; 18127: //case 0xa4: break; 18128: //case 0xa5: break; 18129: //case 0xa6: break; 18130: //case 0xa7: break; 18131: //case 0xa8: break; 18132: //case 0xa9: break; 18133: //case 0xaa: break; 18134: //case 0xab: break; 18135: //case 0xac: break; 18136: //case 0xad: break; 18137: //case 0xae: break; 18138: //case 0xaf: break; 18139: //case 0xb0: break; 18140: //case 0xb1: break; 18141: //case 0xb2: break; 18142: //case 0xb3: break; 18143: //case 0xb4: break; 18144: //case 0xb5: break; 18145: //case 0xb6: break; 18146: //case 0xb7: break; 18147: //case 0xb8: break; 18148: //case 0xb9: break; 18149: //case 0xba: break; 18150: //case 0xbb: break; 18151: //case 0xbc: break; 18152: //case 0xbd: break; 18153: //case 0xbe: break; 18154: //case 0xbf: break; 18155: //case 0xc0: break; 18156: //case 0xc1: break; 18157: //case 0xc2: break; 18158: //case 0xc3: break; 18159: //case 0xc4: break; 18160: //case 0xc5: break; 18161: //case 0xc6: break; 18162: //case 0xc7: break; 18163: //case 0xc8: break; 18164: //case 0xc9: break; 18165: //case 0xca: break; 18166: //case 0xcb: break; 18167: //case 0xcc: break; 18168: //case 0xcd: break; 18169: //case 0xce: break; 18170: //case 0xcf: break; 18171: //case 0xd0: break; 18172: //case 0xd1: break; 18173: //case 0xd2: break; 18174: //case 0xd3: break; 18175: //case 0xd4: break; 18176: //case 0xd5: break; 18177: //case 0xd6: break; 18178: //case 0xd7: break; 18179: //case 0xd8: break; 18180: //case 0xd9: break; 18181: //case 0xda: break; 18182: //case 0xdb: break; 18183: //case 0xdc: break; 18184: //case 0xdd: break; 18185: //case 0xde: break; 18186: //case 0xdf: break; 18187: case 0xe0: fpkCLMUL (); break; 18188: case 0xe1: fpkCLDIV (); break; 18189: case 0xe2: fpkCLMOD (); break; 18190: case 0xe3: fpkCUMUL (); break; 18191: case 0xe4: fpkCUDIV (); break; 18192: case 0xe5: fpkCUMOD (); break; 18193: case 0xe6: fpkCLTOD (); break; 18194: case 0xe7: fpkCDTOL (); break; 18195: case 0xe8: fpkCLTOF (); break; 18196: case 0xe9: fpkCFTOL (); break; 18197: case 0xea: fpkCFTOD (); break; 18198: case 0xeb: fpkCDTOF (); break; 18199: case 0xec: fpkCDCMP (); break; 18200: case 0xed: fpkCDADD (); break; 18201: case 0xee: fpkCDSUB (); break; 18202: case 0xef: fpkCDMUL (); break; 18203: case 0xf0: fpkCDDIV (); break; 18204: case 0xf1: fpkCDMOD (); break; 18205: case 0xf2: fpkCFCMP (); break; 18206: case 0xf3: fpkCFADD (); break; 18207: case 0xf4: fpkCFSUB (); break; 18208: case 0xf5: fpkCFMUL (); break; 18209: case 0xf6: fpkCFDIV (); break; 18210: case 0xf7: fpkCFMOD (); break; 18211: case 0xf8: fpkCDTST (); break; 18212: case 0xf9: fpkCFTST (); break; 18213: case 0xfa: fpkCDINC (); break; 18214: case 0xfb: fpkCFINC (); break; 18215: case 0xfc: fpkCDDEC (); break; 18216: case 0xfd: fpkCFDEC (); break; 18217: case 0xfe: FEFunction.fpkFEVARG (); break; 18218: //case 0xff: FEFunction.fpkFEVECS (); break; //FLOATn.Xに処理させる 18219: default: 18220: XEiJ.mpuCycleCount -= FEFunction.FPK_CLOCK; //戻す 18221: irpFline (); 18222: } 18223: if (FEFunction.FPK_DEBUG_TRACE) { 18224: int i = sb.length (); 18225: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 18226: int l = MainMemory.mmrStrlen (a0, 20); 18227: sb.append (" (A0)=\""); 18228: i = sb.length () - i; 18229: MainMemory.mmrRstr (sb, a0, l).append ("\"\n"); 18230: if (a0 <= XEiJ.regRn[8] && XEiJ.regRn[8] <= a0 + l) { 18231: for (i += sb.length () + XEiJ.regRn[8] - a0; sb.length () < i; ) { 18232: sb.append (' '); 18233: } 18234: sb.append ('^'); 18235: } 18236: System.out.println (sb.toString ()); 18237: } 18238: } //irpFpack 18239: 18240: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18241: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 18242: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 18243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18244: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 18245: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18246: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 18247: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 18248: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18249: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 18250: public static void irpFline () throws M68kException { 18251: irpExceptionFormat0 (M68kException.M6E_LINE_1111_EMULATOR << 2, XEiJ.regPC0); //pcは命令の先頭 18252: } //irpFline 18253: 18254: //irpIllegal () 18255: // オペコードの上位10bitで分類されなかった未実装命令 18256: // 命令実行回数をカウントするために分けてある 18257: // 0x4afcのILLEGAL命令はTASに分類されて未実装実効アドレスで処理されるのでここには来ない 18258: public static void irpIllegal () throws M68kException { 18259: if (true) { 18260: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18261: throw M68kException.m6eSignal; 18262: } 18263: } //irpIllegal 18264: 18265: //z = irpAbcd (x, y) 18266: // ABCD 18267: public static int irpAbcd (int x, int y) { 18268: int c = XEiJ.regCCR >> 4; 18269: int t = (x & 0xff) + (y & 0xff) + c; //仮の結果 18270: int z = t; //結果 18271: if (0x0a <= (x & 0x0f) + (y & 0x0f) + c) { //ハーフキャリー 18272: z += 0x10 - 0x0a; 18273: } 18274: //XとCはキャリーがあるときセット、さもなくばクリア 18275: if (0xa0 <= z) { //キャリー 18276: z += 0x100 - 0xa0; 18277: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 18278: } else { 18279: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 18280: } 18281: //Zは結果が0でないときクリア、さもなくば変化しない 18282: z &= 0xff; 18283: if (z != 0x00) { 18284: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 18285: } 18286: if (false) { 18287: //000/030のときNは結果の最上位ビット 18288: if ((z & 0x80) != 0) { 18289: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18290: } else { 18291: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18292: } 18293: //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア 18294: int a = z - t; //補正値 18295: if ((((t ^ z) & (a ^ z)) & 0x80) != 0) { 18296: XEiJ.regCCR |= XEiJ.REG_CCR_V; 18297: } else { 18298: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18299: } 18300: } else if (false) { 18301: //000/030のときNは結果の最上位ビット 18302: if ((z & 0x80) != 0) { 18303: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18304: } else { 18305: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18306: } 18307: //030のときVはクリア 18308: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18309: } else { 18310: //060のときNとVは変化しない 18311: } 18312: return z; 18313: } //irpAbcd 18314: 18315: //z = irpSbcd (x, y) 18316: // SBCD 18317: public static int irpSbcd (int x, int y) { 18318: int b = XEiJ.regCCR >> 4; 18319: int t = (x & 0xff) - (y & 0xff) - b; //仮の結果 18320: int z = t; //結果 18321: if ((x & 0x0f) - (y & 0x0f) - b < 0) { //ハーフボロー 18322: z -= 0x10 - 0x0a; 18323: } 18324: //XとCはボローがあるときセット、さもなくばクリア 18325: if (z < 0) { //ボロー 18326: if (t < 0) { 18327: z -= 0x100 - 0xa0; 18328: } 18329: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 18330: } else { 18331: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 18332: } 18333: //Zは結果が0でないときクリア、さもなくば変化しない 18334: z &= 0xff; 18335: if (z != 0x00) { 18336: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 18337: } 18338: if (false) { 18339: //000/030のときNは結果の最上位ビット 18340: if ((z & 0x80) != 0) { 18341: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18342: } else { 18343: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18344: } 18345: //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア 18346: int a = z - t; //補正値 18347: if ((((t ^ z) & (a ^ z)) & 0x80) != 0) { 18348: XEiJ.regCCR |= XEiJ.REG_CCR_V; 18349: } else { 18350: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18351: } 18352: } else if (false) { 18353: //000/030のときNは結果の最上位ビット 18354: if ((z & 0x80) != 0) { 18355: XEiJ.regCCR |= XEiJ.REG_CCR_N; 18356: } else { 18357: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 18358: } 18359: //030のときVはクリア 18360: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 18361: } else { 18362: //060のときNとVは変化しない 18363: } 18364: return z; 18365: } //irpSbcd 18366: 18367: 18368: 18369: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18370: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 18371: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 18372: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 18373: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 18374: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 18375: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 18376: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 18377: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 18378: // エミュレータ拡張命令 18379: public static void irpEmx () throws M68kException { 18380: switch (XEiJ.regOC & 63) { 18381: case XEiJ.EMX_OPCODE_HFSBOOT & 63: 18382: XEiJ.mpuCycleCount += 19; 18383: if (HFS.hfsIPLBoot ()) { 18384: //JMP $6800.W 18385: irpSetPC (0x00006800); 18386: } 18387: break; 18388: case XEiJ.EMX_OPCODE_HFSINST & 63: 18389: XEiJ.mpuCycleCount += 19; 18390: HFS.hfsInstall (); 18391: break; 18392: case XEiJ.EMX_OPCODE_HFSSTR & 63: 18393: XEiJ.mpuCycleCount += 19; 18394: HFS.hfsStrategy (); 18395: break; 18396: case XEiJ.EMX_OPCODE_HFSINT & 63: 18397: XEiJ.mpuCycleCount += 19; 18398: //XEiJ.mpuClockTime += TMR_FREQ / 100000L; //0.01ms 18399: if (HFS.hfsInterrupt ()) { 18400: //WAIT 18401: XEiJ.mpuTraceFlag = 0; //トレース例外を発生させない 18402: XEiJ.regPC = XEiJ.regPC0; //ループ 18403: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。10MHzのとき40clk 18404: XEiJ.mpuLastNano += 4000L; 18405: } 18406: break; 18407: case XEiJ.EMX_OPCODE_EMXNOP & 63: 18408: XEiJ.emxNop (); 18409: break; 18410: case XEiJ.EMX_OPCODE_EMXWAIT & 63: 18411: WaitInstruction.execute (); //待機命令を実行する 18412: break; 18413: default: 18414: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18415: throw M68kException.m6eSignal; 18416: } 18417: } //irpEmx 18418: 18419: 18420: 18421: //irpSetPC (a) 18422: // pcへデータを書き込む 18423: // 奇数のときはアドレスエラーが発生する 18424: public static void irpSetPC (int a) throws M68kException { 18425: if (XEiJ.TEST_BIT_0_SHIFT ? a << 31 - 0 < 0 : (a & 1) != 0) { 18426: M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR; 18427: m60Address = a & -2; //アドレスを偶数にする 18428: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 18429: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 18430: throw M68kException.m6eSignal; 18431: } 18432: if (BranchLog.BLG_ON) { 18433: BranchLog.blgJump (a); //分岐ログに分岐レコードを追加する 18434: } else { 18435: XEiJ.regPC = a; 18436: } 18437: } //irpSetPC 18438: 18439: //irpSetSR (newSr) 18440: // srへデータを書き込む 18441: // ori to sr/andi to sr/eori to sr/move to sr/stop/rteで使用される 18442: // スーパーバイザモードになっていることを確認してから呼び出すこと 18443: // rteではr[15]が指すアドレスからsrとpcを取り出してr[15]を更新してから呼び出すこと 18444: // スーパーバイザモード→ユーザモードのときは移行のための処理を行う 18445: // 新しい割り込みマスクレベルよりも高い割り込み処理の終了をデバイスに通知する 18446: public static void irpSetSR (int newSr) { 18447: XEiJ.regSRT1 = XEiJ.REG_SR_T1 & newSr; 18448: XEiJ.regSRM = XEiJ.REG_SR_M & newSr; 18449: if ((XEiJ.regSRS = XEiJ.REG_SR_S & newSr) == 0) { //スーパーバイザモード→ユーザモード 18450: XEiJ.mpuISP = XEiJ.regRn[15]; //SSPを保存 18451: XEiJ.regRn[15] = XEiJ.mpuUSP; //USPを復元 18452: if (DataBreakPoint.DBP_ON) { 18453: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpUserMap; //ユーザメモリマップに切り替える 18454: } else { 18455: XEiJ.busMemoryMap = XEiJ.busUserMap; //ユーザメモリマップに切り替える 18456: } 18457: if (InstructionBreakPoint.IBP_ON) { 18458: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1UserMap; 18459: } 18460: } 18461: int t = (XEiJ.mpuIMR = 0x7f >> ((XEiJ.regSRI = XEiJ.REG_SR_I & newSr) >> 8)) & XEiJ.mpuISR; //XEiJ.mpuISRで1→0とするビット 18462: if (t != 0) { //終了する割り込みがあるとき 18463: XEiJ.mpuISR ^= t; 18464: //デバイスに割り込み処理の終了を通知する 18465: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { //MFPのみ 18466: MC68901.mfpDone (); 18467: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { //DMAのみ 18468: HD63450.dmaDone (); 18469: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { //SCCのみ 18470: Z8530.sccDone (); 18471: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { //IOIのみ 18472: IOInterrupt.ioiDone (); 18473: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { //EB2のみ 18474: XEiJ.eb2Done (); 18475: } else { //SYSのみまたは複数 18476: if (XEiJ.TEST_BIT_1_SHIFT ? t << 24 + XEiJ.MPU_MFP_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_MFP_INTERRUPT_MASK) != 0) { 18477: MC68901.mfpDone (); 18478: } 18479: if (t << 24 + XEiJ.MPU_DMA_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_DMA_INTERRUPT_MASK) != 0 18480: HD63450.dmaDone (); 18481: } 18482: if (XEiJ.TEST_BIT_2_SHIFT ? t << 24 + XEiJ.MPU_SCC_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SCC_INTERRUPT_MASK) != 0) { 18483: Z8530.sccDone (); 18484: } 18485: if (t << 24 + XEiJ.MPU_IOI_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_IOI_INTERRUPT_MASK) != 0 18486: IOInterrupt.ioiDone (); 18487: } 18488: if (t << 24 + XEiJ.MPU_EB2_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_EB2_INTERRUPT_MASK) != 0 18489: XEiJ.eb2Done (); 18490: } 18491: if (XEiJ.TEST_BIT_0_SHIFT ? t << 24 + XEiJ.MPU_SYS_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SYS_INTERRUPT_MASK) != 0) { 18492: XEiJ.sysDone (); 18493: } 18494: } 18495: } 18496: XEiJ.mpuIMR |= ~XEiJ.mpuISR & XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みマスクレベルが7のときレベル7割り込みの処理中でなければレベル7割り込みを許可する 18497: XEiJ.regCCR = XEiJ.REG_CCR_MASK & newSr; 18498: } //irpSetSR 18499: 18500: //irpInterrupt (offset, level) 18501: // 割り込み処理を開始する 18502: public static void irpInterrupt (int offset, int level) throws M68kException { 18503: if (XEiJ.regOC == 0b0100_111_001_110_010) { //最後に実行した命令はSTOP命令 18504: XEiJ.regPC = XEiJ.regPC0 + 4; //次の命令に進む 18505: } 18506: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 19; 18507: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18508: XEiJ.regSRI = level << 8; //割り込みマスクを要求されたレベルに変更する 18509: XEiJ.mpuIMR = 0x7f >> level; 18510: XEiJ.mpuISR |= 0x80 >> level; 18511: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18512: int sp; 18513: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18514: sp = XEiJ.regRn[15]; 18515: } else { //ユーザモード 18516: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18517: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18518: sp = XEiJ.mpuISP; //SSPを復元 18519: if (DataBreakPoint.DBP_ON) { 18520: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18521: } else { 18522: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18523: } 18524: if (InstructionBreakPoint.IBP_ON) { 18525: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18526: } 18527: } 18528: //以下はスーパーバイザモード 18529: XEiJ.regRn[15] = sp -= 8; 18530: mmuWriteWordData (sp + 6, offset, 1); //7-6:フォーマットとベクタオフセット 18531: mmuWriteLongData (sp + 2, XEiJ.regPC, 1); //5-2:プログラムカウンタ 18532: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18533: //if (XEiJ.regSRM != 0) { //マスタモードのとき 18534: XEiJ.regSRM = 0; //割り込みモードへ移行する 18535: //} 18536: if (BranchLog.BLG_ON) { 18537: XEiJ.regPC0 = XEiJ.regPC; //rteによる割り込み終了と同時に次の割り込みを受け付けたとき間でpc0を更新しないと2番目の分岐レコードの終了アドレスが1番目と同じになっておかしな分岐レコードができてしまう 18538: } 18539: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18540: } //irpInterrupt 18541: 18542: //irpExceptionFormat0 (offset, save_pc) 18543: // 例外処理を開始する 18544: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18545: public static void irpExceptionFormat0 (int offset, int save_pc) throws M68kException { 18546: XEiJ.mpuCycleCount += 19; 18547: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18548: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18549: int sp; 18550: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18551: sp = XEiJ.regRn[15]; 18552: } else { //ユーザモード 18553: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18554: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18555: sp = XEiJ.mpuISP; //SSPを復元 18556: if (DataBreakPoint.DBP_ON) { 18557: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18558: } else { 18559: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18560: } 18561: if (InstructionBreakPoint.IBP_ON) { 18562: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18563: } 18564: } 18565: //以下はスーパーバイザモード 18566: XEiJ.regRn[15] = sp -= 8; 18567: mmuWriteWordData (sp + 6, offset, 1); //7-6:フォーマットとベクタオフセット 18568: mmuWriteLongData (sp + 2, save_pc, 1); //5-2:プログラムカウンタ 18569: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18570: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18571: } //irpExceptionFormat0 18572: 18573: //irpExceptionFormat2 (offset, save_pc, address) 18574: // 例外処理を開始する 18575: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18576: public static void irpExceptionFormat2 (int offset, int save_pc, int address) throws M68kException { 18577: XEiJ.mpuCycleCount += 19; 18578: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18579: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18580: int sp; 18581: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18582: sp = XEiJ.regRn[15]; 18583: } else { //ユーザモード 18584: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18585: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18586: sp = XEiJ.mpuISP; //SSPを復元 18587: if (DataBreakPoint.DBP_ON) { 18588: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18589: } else { 18590: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18591: } 18592: if (InstructionBreakPoint.IBP_ON) { 18593: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18594: } 18595: } 18596: //以下はスーパーバイザモード 18597: XEiJ.regRn[15] = sp -= 12; 18598: mmuWriteLongData (sp + 8, address, 1); //11-8:アドレス 18599: mmuWriteWordData (sp + 6, 0x2000 | offset, 1); //7-6:フォーマットとベクタオフセット 18600: mmuWriteLongData (sp + 2, save_pc, 1); //5-2:プログラムカウンタ 18601: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18602: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18603: } //irpExceptionFormat2 18604: 18605: //irpExceptionFormat3 (offset, save_pc, address) 18606: // 例外処理を開始する 18607: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18608: public static void irpExceptionFormat3 (int offset, int save_pc, int address) throws M68kException { 18609: XEiJ.mpuCycleCount += 19; 18610: int save_sr = XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18611: XEiJ.regSRT1 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18612: int sp; 18613: if (XEiJ.regSRS != 0) { //スーパーバイザモード 18614: sp = XEiJ.regRn[15]; 18615: } else { //ユーザモード 18616: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18617: XEiJ.mpuUSP = XEiJ.regRn[15]; //USPを保存 18618: sp = XEiJ.mpuISP; //SSPを復元 18619: if (DataBreakPoint.DBP_ON) { 18620: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18621: } else { 18622: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18623: } 18624: if (InstructionBreakPoint.IBP_ON) { 18625: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18626: } 18627: } 18628: //以下はスーパーバイザモード 18629: XEiJ.regRn[15] = sp -= 12; 18630: mmuWriteLongData (sp + 8, address, 1); //11-8:実効アドレス 18631: mmuWriteWordData (sp + 6, 0x3000 | offset, 1); //7-6:フォーマットとベクタオフセット 18632: mmuWriteLongData (sp + 2, save_pc, 1); //5-2:プログラムカウンタ 18633: mmuWriteWordData (sp, save_sr, 1); //1-0:ステータスレジスタ 18634: irpSetPC (mmuReadLongFour (XEiJ.mpuVBR + offset, 1)); //例外ベクタを取り出してジャンプする 18635: } //irpExceptionFormat3 18636: 18637: 18638: 18639: // 18640: // (d8,Ar,Rn.wl)と(d8,PC,Rn.wl)の拡張ワード 18641: // 0xf000 インデックスレジスタ 18642: // 0=D0,1=D1,2=D2,3=D3,4=D4,5=D5,6=D6,7=D7,8=A0,9=A1,10=A2,11=A3,12=A4,13=A5,14=A6,15=A7 18643: // 0x0800 インデックスサイズ 18644: // 0=ワードインデックス,1=ロングインデックス 18645: // 0x0600 スケールファクタ。ワードインデックスのとき符号拡張してから掛ける 18646: // 0=*1,1=*2,2=*4,3=*8 18647: // 0x0100 フォーマット 18648: // 0=ブリーフフォーマット,1=フルフォーマット 18649: // ブリーフフォーマット 18650: // 0x00ff バイトディスプレースメント 18651: // フルフォーマット 18652: // 0x0080 1=ベースレジスタなし 18653: // 0x0040 1=インデックスなし 18654: // 0x0030 ベースディスプレースメントサイズ 18655: // 1=ベースディスプレースメントなし,2=ワードベースディスプレースメント,3=ロングベースディスプレースメント 18656: // 0x0008 0 18657: // 0x0004 0=プリインデックス,1=ポストインデックス 18658: // 0x0003 インダイレクトとアウタディスプレースメントサイズ 18659: // 0=インダイレクトなし,1=アウタディスプレースメントなし,2=ワードアウタディスプレースメント,3=ロングアウタディスプレースメント 18660: // ベースディスプレースメントとアウタディスプレースメントが続く 18661: // MPUによる制限 18662: // スケールファクタは68020以上。68000と68010では無視されて*1になる 18663: // フルフォーマットは68020以上。68000と68010では不当命令になる 18664: // 18665: // (d16,PC)と(d8,PC,Rn.wl)のベースアドレス 18666: // (d16,PC)と(d8,PC,Rn.wl)のベースアドレスは、Fライン命令以外では命令の先頭アドレス+2、Fライン命令では命令の先頭アドレス+4 18667: // ベースアドレスの位置で実効アドレスを計算する 18668: // 18669: // #<data>の扱い 18670: // #<data>をそれが書かれている場所を実効アドレスとみなす方法で処理するとデータアクセスになってしまう 18671: // 命令アクセスにするためDr,Arと同様に呼び出し側で分離する 18672: // バイト 18673: // data = (ea < 020 ? (byte) XEiJ.regRn[ea] : //Dr,Ar 18674: // ea < 074 ? mmuReadByteSignData (efaMemByte (ea)) : 18675: // mmuReadByteSignExword ((XEiJ.regPC += 2) - 1, XEiJ.regSRS)); //#<data> 18676: // ワード 18677: // data = (ea < 020 ? (short) XEiJ.regRn[ea] : //Dr,Ar 18678: // ea < 074 ? mmuReadWordSignData (efaMemWord (ea)) : 18679: // mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS)); //#<data> 18680: // ロング 18681: // data = (ea < 020 ? XEiJ.regRn[ea] : //Dr,Ar 18682: // ea < 074 ? mmuReadLongData (efaMemLong (ea)) : 18683: // mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)); //#<data> 18684: // 18685: 18686: //a = efaMemByte (ea) 18687: //a = efaMemWord (ea) 18688: //a = efaMemLong (ea) 18689: //a = efaMemQuad (ea) 18690: //a = efaMemExtd (ea) 18691: // | M+-WXZP | 18692: // メモリモードの実効アドレスを求める 18693: // バイトのとき(A7)+と-(A7)はA7を奇偶に関わらず2変化させ、跨いだワードの上位バイト(アドレスの小さい方)を参照する 18694: public static int efaMemByte (int ea) throws M68kException { 18695: int t, w, x; 18696: switch (ea) { 18697: case 020: //(A0) 18698: case 021: //(A1) 18699: case 022: //(A2) 18700: case 023: //(A3) 18701: case 024: //(A4) 18702: case 025: //(A5) 18703: case 026: //(A6) 18704: case 027: //(A7) 18705: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18706: case 030: //(A0)+ 18707: case 031: //(A1)+ 18708: case 032: //(A1)+ 18709: case 033: //(A3)+ 18710: case 034: //(A4)+ 18711: case 035: //(A5)+ 18712: case 036: //(A6)+ 18713: m60Incremented += 1L << ((ea - 030) << 3); 18714: return m60Address = XEiJ.regRn[ea - (030 - 8)]++; 18715: case 037: //(A7)+ 18716: m60Incremented += 2L << (7 << 3); 18717: return m60Address = (XEiJ.regRn[15] += 2) - 2; 18718: case 040: //-(A0) 18719: case 041: //-(A1) 18720: case 042: //-(A2) 18721: case 043: //-(A3) 18722: case 044: //-(A4) 18723: case 045: //-(A5) 18724: case 046: //-(A6) 18725: m60Incremented -= 1L << ((ea - 040) << 3); 18726: return m60Address = --XEiJ.regRn[ea - (040 - 8)]; 18727: case 047: //-(A7) 18728: m60Incremented -= 2L << (7 << 3); 18729: return m60Address = XEiJ.regRn[15] -= 2; 18730: case 050: //(d16,A0) 18731: case 051: //(d16,A1) 18732: case 052: //(d16,A2) 18733: case 053: //(d16,A3) 18734: case 054: //(d16,A4) 18735: case 055: //(d16,A5) 18736: case 056: //(d16,A6) 18737: case 057: //(d16,A7) 18738: case 072: //(d16,PC) 18739: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18740: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18741: case 060: //(d8,A0,Rn.wl) 18742: case 061: //(d8,A1,Rn.wl) 18743: case 062: //(d8,A2,Rn.wl) 18744: case 063: //(d8,A3,Rn.wl) 18745: case 064: //(d8,A4,Rn.wl) 18746: case 065: //(d8,A5,Rn.wl) 18747: case 066: //(d8,A6,Rn.wl) 18748: case 067: //(d8,A7,Rn.wl) 18749: case 073: //(d8,PC,Rn.wl) 18750: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 18751: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 18752: if ((0x0100 & w) == 0) { //ブリーフフォーマット 18753: return m60Address = 18754: (t //ベースレジスタ 18755: + (byte) w //バイトディスプレースメント 18756: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18757: XEiJ.regRn[w >> 12]) //ロングインデックス 18758: << ((0x0600 & w) >> 9))); //スケールファクタ 18759: } else { //フルフォーマット 18760: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 18761: 3); //インダイレクトあり 18762: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 18763: t) + //ベースレジスタあり 18764: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 18765: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 18766: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 18767: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 18768: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18769: XEiJ.regRn[w >> 12]) //ロングインデックス 18770: << ((0x0600 & w) >> 9)); //スケールファクタ 18771: return m60Address = 18772: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 18773: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 18774: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 18775: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 18776: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 18777: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 18778: } 18779: case 070: //(xxx).W 18780: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 18781: case 071: //(xxx).L 18782: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 18783: case 074: 18784: Thread.dumpStack (); 18785: break; 18786: } //switch 18787: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18788: throw M68kException.m6eSignal; 18789: } //efaMemByte 18790: public static int efaMemWord (int ea) throws M68kException { 18791: int t, w, x; 18792: switch (ea) { 18793: case 020: //(A0) 18794: case 021: //(A1) 18795: case 022: //(A2) 18796: case 023: //(A3) 18797: case 024: //(A4) 18798: case 025: //(A5) 18799: case 026: //(A6) 18800: case 027: //(A7) 18801: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18802: case 030: //(A0)+ 18803: case 031: //(A1)+ 18804: case 032: //(A1)+ 18805: case 033: //(A3)+ 18806: case 034: //(A4)+ 18807: case 035: //(A5)+ 18808: case 036: //(A6)+ 18809: case 037: //(A7)+ 18810: m60Incremented += 2L << ((ea - 030) << 3); 18811: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 2) - 2; 18812: case 040: //-(A0) 18813: case 041: //-(A1) 18814: case 042: //-(A2) 18815: case 043: //-(A3) 18816: case 044: //-(A4) 18817: case 045: //-(A5) 18818: case 046: //-(A6) 18819: case 047: //-(A7) 18820: m60Incremented -= 2L << ((ea - 040) << 3); 18821: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 2; 18822: case 050: //(d16,A0) 18823: case 051: //(d16,A1) 18824: case 052: //(d16,A2) 18825: case 053: //(d16,A3) 18826: case 054: //(d16,A4) 18827: case 055: //(d16,A5) 18828: case 056: //(d16,A6) 18829: case 057: //(d16,A7) 18830: case 072: //(d16,PC) 18831: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18832: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18833: case 060: //(d8,A0,Rn.wl) 18834: case 061: //(d8,A1,Rn.wl) 18835: case 062: //(d8,A2,Rn.wl) 18836: case 063: //(d8,A3,Rn.wl) 18837: case 064: //(d8,A4,Rn.wl) 18838: case 065: //(d8,A5,Rn.wl) 18839: case 066: //(d8,A6,Rn.wl) 18840: case 067: //(d8,A7,Rn.wl) 18841: case 073: //(d8,PC,Rn.wl) 18842: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 18843: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 18844: if ((0x0100 & w) == 0) { //ブリーフフォーマット 18845: return m60Address = 18846: (t //ベースレジスタ 18847: + (byte) w //バイトディスプレースメント 18848: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18849: XEiJ.regRn[w >> 12]) //ロングインデックス 18850: << ((0x0600 & w) >> 9))); //スケールファクタ 18851: } else { //フルフォーマット 18852: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 18853: 3); //インダイレクトあり 18854: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 18855: t) + //ベースレジスタあり 18856: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 18857: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 18858: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 18859: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 18860: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18861: XEiJ.regRn[w >> 12]) //ロングインデックス 18862: << ((0x0600 & w) >> 9)); //スケールファクタ 18863: return m60Address = 18864: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 18865: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 18866: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 18867: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 18868: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 18869: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 18870: } 18871: case 070: //(xxx).W 18872: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 18873: case 071: //(xxx).L 18874: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 18875: case 074: 18876: Thread.dumpStack (); 18877: break; 18878: } //switch 18879: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18880: throw M68kException.m6eSignal; 18881: } //efaMemWord 18882: public static int efaMemLong (int ea) throws M68kException { 18883: int t, w, x; 18884: switch (ea) { 18885: case 020: //(A0) 18886: case 021: //(A1) 18887: case 022: //(A2) 18888: case 023: //(A3) 18889: case 024: //(A4) 18890: case 025: //(A5) 18891: case 026: //(A6) 18892: case 027: //(A7) 18893: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18894: case 030: //(A0)+ 18895: case 031: //(A1)+ 18896: case 032: //(A1)+ 18897: case 033: //(A3)+ 18898: case 034: //(A4)+ 18899: case 035: //(A5)+ 18900: case 036: //(A6)+ 18901: case 037: //(A7)+ 18902: m60Incremented += 4L << ((ea - 030) << 3); 18903: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 4) - 4; 18904: case 040: //-(A0) 18905: case 041: //-(A1) 18906: case 042: //-(A2) 18907: case 043: //-(A3) 18908: case 044: //-(A4) 18909: case 045: //-(A5) 18910: case 046: //-(A6) 18911: case 047: //-(A7) 18912: m60Incremented -= 4L << ((ea - 040) << 3); 18913: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 4; 18914: case 050: //(d16,A0) 18915: case 051: //(d16,A1) 18916: case 052: //(d16,A2) 18917: case 053: //(d16,A3) 18918: case 054: //(d16,A4) 18919: case 055: //(d16,A5) 18920: case 056: //(d16,A6) 18921: case 057: //(d16,A7) 18922: case 072: //(d16,PC) 18923: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 18924: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 18925: case 060: //(d8,A0,Rn.wl) 18926: case 061: //(d8,A1,Rn.wl) 18927: case 062: //(d8,A2,Rn.wl) 18928: case 063: //(d8,A3,Rn.wl) 18929: case 064: //(d8,A4,Rn.wl) 18930: case 065: //(d8,A5,Rn.wl) 18931: case 066: //(d8,A6,Rn.wl) 18932: case 067: //(d8,A7,Rn.wl) 18933: case 073: //(d8,PC,Rn.wl) 18934: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 18935: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 18936: if ((0x0100 & w) == 0) { //ブリーフフォーマット 18937: return m60Address = 18938: (t //ベースレジスタ 18939: + (byte) w //バイトディスプレースメント 18940: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18941: XEiJ.regRn[w >> 12]) //ロングインデックス 18942: << ((0x0600 & w) >> 9))); //スケールファクタ 18943: } else { //フルフォーマット 18944: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 18945: 3); //インダイレクトあり 18946: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 18947: t) + //ベースレジスタあり 18948: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 18949: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 18950: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 18951: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 18952: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18953: XEiJ.regRn[w >> 12]) //ロングインデックス 18954: << ((0x0600 & w) >> 9)); //スケールファクタ 18955: return m60Address = 18956: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 18957: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 18958: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 18959: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 18960: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 18961: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 18962: } 18963: case 070: //(xxx).W 18964: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 18965: case 071: //(xxx).L 18966: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 18967: case 074: 18968: Thread.dumpStack (); 18969: break; 18970: } //switch 18971: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18972: throw M68kException.m6eSignal; 18973: } //efaMemLong 18974: public static int efaMemQuad (int ea) throws M68kException { 18975: int t, w, x; 18976: switch (ea) { 18977: case 020: //(A0) 18978: case 021: //(A1) 18979: case 022: //(A2) 18980: case 023: //(A3) 18981: case 024: //(A4) 18982: case 025: //(A5) 18983: case 026: //(A6) 18984: case 027: //(A7) 18985: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 18986: case 030: //(A0)+ 18987: case 031: //(A1)+ 18988: case 032: //(A1)+ 18989: case 033: //(A3)+ 18990: case 034: //(A4)+ 18991: case 035: //(A5)+ 18992: case 036: //(A6)+ 18993: case 037: //(A7)+ 18994: m60Incremented += 8L << ((ea - 030) << 3); 18995: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 8) - 8; 18996: case 040: //-(A0) 18997: case 041: //-(A1) 18998: case 042: //-(A2) 18999: case 043: //-(A3) 19000: case 044: //-(A4) 19001: case 045: //-(A5) 19002: case 046: //-(A6) 19003: case 047: //-(A7) 19004: m60Incremented -= 8L << ((ea - 040) << 3); 19005: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 8; 19006: case 050: //(d16,A0) 19007: case 051: //(d16,A1) 19008: case 052: //(d16,A2) 19009: case 053: //(d16,A3) 19010: case 054: //(d16,A4) 19011: case 055: //(d16,A5) 19012: case 056: //(d16,A6) 19013: case 057: //(d16,A7) 19014: case 072: //(d16,PC) 19015: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 19016: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 19017: case 060: //(d8,A0,Rn.wl) 19018: case 061: //(d8,A1,Rn.wl) 19019: case 062: //(d8,A2,Rn.wl) 19020: case 063: //(d8,A3,Rn.wl) 19021: case 064: //(d8,A4,Rn.wl) 19022: case 065: //(d8,A5,Rn.wl) 19023: case 066: //(d8,A6,Rn.wl) 19024: case 067: //(d8,A7,Rn.wl) 19025: case 073: //(d8,PC,Rn.wl) 19026: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 19027: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 19028: if ((0x0100 & w) == 0) { //ブリーフフォーマット 19029: return m60Address = 19030: (t //ベースレジスタ 19031: + (byte) w //バイトディスプレースメント 19032: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19033: XEiJ.regRn[w >> 12]) //ロングインデックス 19034: << ((0x0600 & w) >> 9))); //スケールファクタ 19035: } else { //フルフォーマット 19036: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 19037: 3); //インダイレクトあり 19038: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 19039: t) + //ベースレジスタあり 19040: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 19041: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 19042: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 19043: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 19044: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19045: XEiJ.regRn[w >> 12]) //ロングインデックス 19046: << ((0x0600 & w) >> 9)); //スケールファクタ 19047: return m60Address = 19048: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 19049: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 19050: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 19051: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 19052: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 19053: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 19054: } 19055: case 070: //(xxx).W 19056: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 19057: case 071: //(xxx).L 19058: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 19059: case 074: 19060: Thread.dumpStack (); 19061: break; 19062: } //switch 19063: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19064: throw M68kException.m6eSignal; 19065: } //efaMemQuad 19066: public static int efaMemExtd (int ea) throws M68kException { 19067: int t, w, x; 19068: switch (ea) { 19069: case 020: //(A0) 19070: case 021: //(A1) 19071: case 022: //(A2) 19072: case 023: //(A3) 19073: case 024: //(A4) 19074: case 025: //(A5) 19075: case 026: //(A6) 19076: case 027: //(A7) 19077: return m60Address = XEiJ.regRn[ea - (020 - 8)]; 19078: case 030: //(A0)+ 19079: case 031: //(A1)+ 19080: case 032: //(A1)+ 19081: case 033: //(A3)+ 19082: case 034: //(A4)+ 19083: case 035: //(A5)+ 19084: case 036: //(A6)+ 19085: case 037: //(A7)+ 19086: m60Incremented += 12L << ((ea - 030) << 3); 19087: return m60Address = (XEiJ.regRn[ea - (030 - 8)] += 12) - 12; 19088: case 040: //-(A0) 19089: case 041: //-(A1) 19090: case 042: //-(A2) 19091: case 043: //-(A3) 19092: case 044: //-(A4) 19093: case 045: //-(A5) 19094: case 046: //-(A6) 19095: case 047: //-(A7) 19096: m60Incremented -= 12L << ((ea - 040) << 3); 19097: return m60Address = XEiJ.regRn[ea - (040 - 8)] -= 12; 19098: case 050: //(d16,A0) 19099: case 051: //(d16,A1) 19100: case 052: //(d16,A2) 19101: case 053: //(d16,A3) 19102: case 054: //(d16,A4) 19103: case 055: //(d16,A5) 19104: case 056: //(d16,A6) 19105: case 057: //(d16,A7) 19106: case 072: //(d16,PC) 19107: t = ea == 072 ? XEiJ.regPC : XEiJ.regRn[ea - (050 - 8)]; //ベースレジスタ 19108: return m60Address = t + mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //ワードディスプレースメント 19109: case 060: //(d8,A0,Rn.wl) 19110: case 061: //(d8,A1,Rn.wl) 19111: case 062: //(d8,A2,Rn.wl) 19112: case 063: //(d8,A3,Rn.wl) 19113: case 064: //(d8,A4,Rn.wl) 19114: case 065: //(d8,A5,Rn.wl) 19115: case 066: //(d8,A6,Rn.wl) 19116: case 067: //(d8,A7,Rn.wl) 19117: case 073: //(d8,PC,Rn.wl) 19118: t = ea == 073 ? XEiJ.regPC : XEiJ.regRn[ea - (060 - 8)]; //ベースレジスタ 19119: w = mmuReadWordZeroExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); //拡張ワード 19120: if ((0x0100 & w) == 0) { //ブリーフフォーマット 19121: return m60Address = 19122: (t //ベースレジスタ 19123: + (byte) w //バイトディスプレースメント 19124: + (((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19125: XEiJ.regRn[w >> 12]) //ロングインデックス 19126: << ((0x0600 & w) >> 9))); //スケールファクタ 19127: } else { //フルフォーマット 19128: XEiJ.mpuCycleCount += ((0x0003 & w) == 0 ? 1 : //インダイレクトなし 19129: 3); //インダイレクトあり 19130: t = (((0x0080 & w) != 0 ? 0 : //ベースレジスタなし 19131: t) + //ベースレジスタあり 19132: ((0x0020 & w) == 0 ? 0 : //ベースディスプレースメントなし 19133: (0x0010 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードベースディスプレースメント 19134: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS))); //ロングベースディスプレースメント 19135: x = ((0x0040 & w) != 0 ? 0 : //インデックスなし 19136: ((0x0800 & w) == 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19137: XEiJ.regRn[w >> 12]) //ロングインデックス 19138: << ((0x0600 & w) >> 9)); //スケールファクタ 19139: return m60Address = 19140: ((0x0003 & w) == 0 ? t + x : //インダイレクトなし 19141: (((0x0004 & w) == 0 ? mmuReadLongData (m60Address = t + x, XEiJ.regSRS) : //プリインデックス 19142: mmuReadLongData (m60Address = t, XEiJ.regSRS) + x) //ポストインデックス 19143: + ((0x0002 & w) == 0 ? 0 : //アウタディスプレースメントなし 19144: (0x0001 & w) == 0 ? mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS) : //ワードアウタディスプレースメント 19145: mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS)))); //ロングアウタディスプレースメント 19146: } 19147: case 070: //(xxx).W 19148: return m60Address = mmuReadWordSignExword ((XEiJ.regPC += 2) - 2, XEiJ.regSRS); 19149: case 071: //(xxx).L 19150: return m60Address = mmuReadLongExword ((XEiJ.regPC += 4) - 4, XEiJ.regSRS); 19151: case 074: 19152: Thread.dumpStack (); 19153: break; 19154: } //switch 19155: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19156: throw M68kException.m6eSignal; 19157: } //efaMemExtd 19158: 19159: // 7777777766666666555555554444444433333333222222221111111100000000 mmm 19160: // 7654321076543210765432107654321076543210765432107654321076543210 rrr 19161: // ...IPPZZXXXXXXXXWWWWWWWW--------++++++++MMMMMMMMAAAAAAAADDDDDDDD 19162: static final long MEM_MASK = 0b0000111111111111111111111111111111111111111111110000000000000000L; //メモリモード 19163: static final long MLT_MASK = 0b0000001111111111111111111111111111111111111111110000000000000000L; //メモリ可変モード 19164: static final long CNT_MASK = 0b0000111111111111111111110000000000000000111111110000000000000000L; //制御モード 19165: static final long CLT_MASK = 0b0000001111111111111111110000000000000000111111110000000000000000L; //制御可変モード 19166: 19167: //a = efaMltByte (ea) 19168: //a = efaMltWord (ea) 19169: //a = efaMltLong (ea) 19170: //a = efaMltQuad (ea) 19171: //a = efaMltExtd (ea) 19172: // | M+-WXZ | 19173: // メモリ可変モードの実効アドレスを求める 19174: // メモリモードとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 19175: public static int efaMltByte (int ea) throws M68kException { 19176: return efaMemByte ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19177: } //efaMltByte 19178: public static int efaMltWord (int ea) throws M68kException { 19179: return efaMemWord ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19180: } //efaMltWord 19181: public static int efaMltLong (int ea) throws M68kException { 19182: return efaMemLong ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19183: } //efaMltLong 19184: public static int efaMltQuad (int ea) throws M68kException { 19185: return efaMemQuad ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19186: } //efaMltQuad 19187: public static int efaMltExtd (int ea) throws M68kException { 19188: return efaMemExtd ((MLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19189: } //efaMltExtd 19190: 19191: //a = efaCntByte (ea) 19192: //a = efaCntWord (ea) 19193: //a = efaCntLong (ea) 19194: //a = efaCntQuad (ea) 19195: //a = efaCntExtd (ea) 19196: // | M WXZP | 19197: // 制御モードの実効アドレスを求める 19198: // メモリモードとの違いは(Ar)+と-(Ar)がないこと 19199: public static int efaCntByte (int ea) throws M68kException { 19200: return efaMemByte ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19201: } //efaCntByte 19202: public static int efaCntWord (int ea) throws M68kException { 19203: return efaMemWord ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19204: } //efaCntWord 19205: public static int efaCntLong (int ea) throws M68kException { 19206: return efaMemLong ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19207: } //efaCntLong 19208: public static int efaCntQuad (int ea) throws M68kException { 19209: return efaMemQuad ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19210: } //efaCntQuad 19211: public static int efaCntExtd (int ea) throws M68kException { 19212: return efaMemExtd ((CNT_MASK & (1L << ea)) == 0 ? 0 : ea); 19213: } //efaCntExtd 19214: 19215: //a = efaCltByte (ea) 19216: //a = efaCltWord (ea) 19217: //a = efaCltLong (ea) 19218: //a = efaCltQuad (ea) 19219: //a = efaCltExtd (ea) 19220: // | M WXZ | 19221: // 制御可変モードの実効アドレスを求める 19222: // メモリモードとの違いは(Ar)+と-(Ar)と(d16,PC)と(d8,PC,Rn.wl)がないこと 19223: public static int efaCltByte (int ea) throws M68kException { 19224: return efaMemByte ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19225: } //efaCltByte 19226: public static int efaCltWord (int ea) throws M68kException { 19227: return efaMemWord ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19228: } //efaCltWord 19229: public static int efaCltLong (int ea) throws M68kException { 19230: return efaMemLong ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19231: } //efaCltLong 19232: public static int efaCltQuad (int ea) throws M68kException { 19233: return efaMemQuad ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19234: } //efaCltQuad 19235: public static int efaCltExtd (int ea) throws M68kException { 19236: return efaMemExtd ((CLT_MASK & (1L << ea)) == 0 ? 0 : ea); 19237: } //efaCltExtd 19238: 19239: //以下廃止予定 19240: // Any* → Mem* #<data>を分離できているか確認すること 19241: // LeaPea → Cnt* 19242: // JmpJsr → Cnt* 19243: public static int efaAnyByte (int ea) throws M68kException { 19244: return efaMemByte (ea); 19245: } //efaAnyByte 19246: public static int efaAnyWord (int ea) throws M68kException { 19247: return efaMemWord (ea); 19248: } //efaAnyWord 19249: public static int efaAnyLong (int ea) throws M68kException { 19250: return efaMemLong (ea); 19251: } //efaAnyLong 19252: public static int efaAnyQuad (int ea) throws M68kException { 19253: return efaMemQuad (ea); 19254: } //efaAnyQuad 19255: public static int efaAnyExtd (int ea) throws M68kException { 19256: return efaMemExtd (ea); 19257: } //efaAnyExtd 19258: public static int efaLeaPea (int ea) throws M68kException { 19259: return efaCntLong (ea); 19260: } //efaLeaPea 19261: public static int efaJmpJsr (int ea) throws M68kException { 19262: return efaCntLong (ea); 19263: } //efaJmpJsr 19264: 19265: 19266: 19267: //fpkSTOL () 19268: // $FE10 __STOL 19269: // 10進数の文字列を32bit符号あり整数に変換する 19270: // /^[ \t]*[-+]?[0-9]+/ 19271: // 先頭の'\t'と' 'を読み飛ばす 19272: // <a0.l:10進数の文字列の先頭 19273: // >d0.l:32bit符号あり整数 19274: // >a0.l:10進数の文字列の直後('\0'とは限らない) 19275: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19276: public static void fpkSTOL () throws M68kException { 19277: int a = XEiJ.regRn[8]; //a0 19278: int c = mmuReadByteZeroData (a, 1); 19279: while (c == ' ' || c == '\t') { 19280: c = mmuReadByteZeroData (++a, 1); 19281: } 19282: int n = '7'; //'7'=正,'8'=負 19283: if (c == '-') { //負 19284: n = '8'; 19285: c = mmuReadByteZeroData (++a, 1); 19286: } else if (c == '+') { //正 19287: c = mmuReadByteZeroData (++a, 1); 19288: } 19289: if (!('0' <= c && c <= '9')) { //数字が1つもない 19290: XEiJ.regRn[8] = a; //a0 19291: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19292: return; 19293: } 19294: int x = c - '0'; //値 19295: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9'; c = mmuReadByteZeroData (++a, 1)) { 19296: if (214748364 < x || x == 214748364 && n < c) { //正のとき2147483647、負のとき2147483648より大きくなるときオーバーフロー 19297: XEiJ.regRn[8] = a; //a0 19298: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19299: return; 19300: } 19301: x = x * 10 + (c - '0'); 19302: } 19303: if (n != '7') { //負 19304: x = -x; 19305: } 19306: XEiJ.regRn[0] = x; //d0 19307: XEiJ.regRn[8] = a; //a0 19308: XEiJ.regCCR = 0; 19309: } //fpkSTOL() 19310: 19311: //fpkLTOS () 19312: // $FE11 __LTOS 19313: // 32bit符号あり整数を10進数の文字列に変換する 19314: // /^-?[1-9][0-9]*$/ 19315: // <d0.l:32bit符号あり整数 19316: // <a0.l:文字列バッファの先頭 19317: // >a0.l:10進数の文字列の直後('\0'の位置) 19318: public static void fpkLTOS () throws M68kException { 19319: int x = XEiJ.regRn[0]; //d0 19320: int a = XEiJ.regRn[8]; //a0 19321: if (x < 0) { //負 19322: mmuWriteByteData (a++, '-', 1); 19323: x = -x; 19324: } 19325: long t = XEiJ.fmtBcd12 (0xffffffffL & x); //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可 19326: XEiJ.regRn[8] = a += Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2); //a0 19327: mmuWriteByteData (a, 0, 1); 19328: do { 19329: mmuWriteByteData (--a, '0' | (int) t & 15, 1); 19330: } while ((t >>>= 4) != 0L); 19331: } //fpkLTOS() 19332: 19333: //fpkSTOH () 19334: // $FE12 __STOH 19335: // 16進数の文字列を32bit符号なし整数に変換する 19336: // /^[0-9A-Fa-f]+/ 19337: // <a0.l:16進数の文字列の先頭 19338: // >d0.l:32bit符号なし整数 19339: // >a0.l:16進数の文字列の直後('\0'とは限らない) 19340: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19341: public static void fpkSTOH () throws M68kException { 19342: int a = XEiJ.regRn[8]; //a0 19343: int c = mmuReadByteZeroData (a, 1); 19344: if (!('0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f')) { //数字が1つもない 19345: XEiJ.regRn[8] = a; //a0 19346: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19347: return; 19348: } 19349: int x = c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10); //値 19350: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '9' || 'A' <= c && c <= 'F' || 'a' <= c && c <= 'f'; c = mmuReadByteZeroData (++a, 1)) { 19351: if (0x0fffffff < x) { //0xffffffffより大きくなるときオーバーフロー 19352: XEiJ.regRn[8] = a; //a0 19353: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19354: return; 19355: } 19356: x = x << 4 | (c <= '9' ? c - '0' : c <= 'F' ? c - ('A' - 10) : c - ('a' - 10)); 19357: } 19358: XEiJ.regRn[0] = x; //d0 19359: XEiJ.regRn[8] = a; //a0 19360: XEiJ.regCCR = 0; 19361: } //fpkSTOH() 19362: 19363: //fpkHTOS () 19364: // $FE13 __HTOS 19365: // 32bit符号なし整数を16進数の文字列に変換する 19366: // /^[1-9A-F][0-9A-F]*$/ 19367: // <d0.l:32bit符号なし整数 19368: // <a0.l:文字列バッファの先頭 19369: // >a0.l:16進数の文字列の直後('\0'の位置) 19370: public static void fpkHTOS () throws M68kException { 19371: int x = XEiJ.regRn[0]; //d0 19372: int a = XEiJ.regRn[8] += Math.max (1, 35 - Integer.numberOfLeadingZeros (x) >> 2); //a0 19373: mmuWriteByteData (a, 0, 1); 19374: do { 19375: int t = x & 15; 19376: // t 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 19377: // 9-t 09 08 07 06 05 04 03 02 01 00 ff fe fd fc fb fa 19378: // 9-t>>4 00 00 00 00 00 00 00 00 00 00 ff ff ff ff ff ff 19379: // 9-t>>4&7 00 00 00 00 00 00 00 00 00 00 07 07 07 07 07 07 19380: // 9-t>>4&7|48 30 30 30 30 30 30 30 30 30 30 37 37 37 37 37 37 19381: // (9-t>>4&7|48)+t 30 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46 19382: // 0 1 2 3 4 5 6 7 8 9 A B C D E F 19383: mmuWriteByteData (--a, (9 - t >> 4 & 7 | 48) + t, 1); 19384: } while ((x >>>= 4) != 0); 19385: } //fpkHTOS() 19386: 19387: //fpkSTOO () 19388: // $FE14 __STOO 19389: // 8進数の文字列を32bit符号なし整数に変換する 19390: // /^[0-7]+/ 19391: // <a0.l:8進数の文字列の先頭 19392: // >d0.l:32bit符号なし整数 19393: // >a0.l:8進数の文字列の直後('\0'とは限らない) 19394: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19395: public static void fpkSTOO () throws M68kException { 19396: int a = XEiJ.regRn[8]; //a0 19397: int c = mmuReadByteZeroData (a, 1); 19398: if (!('0' <= c && c <= '7')) { //数字が1つもない 19399: XEiJ.regRn[8] = a; //a0 19400: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19401: return; 19402: } 19403: int x = c - '0'; //値 19404: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '7'; c = mmuReadByteZeroData (++a, 1)) { 19405: if (0x1fffffff < x) { //0xffffffffより大きくなるときオーバーフロー 19406: XEiJ.regRn[8] = a; //a0 19407: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19408: return; 19409: } 19410: x = x << 3 | c & 7; 19411: } 19412: XEiJ.regRn[0] = x; //d0 19413: XEiJ.regRn[8] = a; //a0 19414: XEiJ.regCCR = 0; 19415: } //fpkSTOO() 19416: 19417: //fpkOTOS () 19418: // $FE15 __OTOS 19419: // 32bit符号なし整数を8進数の文字列に変換する 19420: // /^[1-7][0-7]*$/ 19421: // <d0.l:32bit符号なし整数 19422: // <a0.l:文字列バッファの先頭 19423: // >a0.l:8進数の文字列の直後('\0'の位置) 19424: public static void fpkOTOS () throws M68kException { 19425: int x = XEiJ.regRn[0]; //d0 19426: //perl optdiv.pl 34 3 19427: // x/3==x*43>>>7 (0<=x<=127) [34*43==1462] 19428: int a = XEiJ.regRn[8] += Math.max (1, (34 - Integer.numberOfLeadingZeros (x)) * 43 >>> 7); //a0 19429: mmuWriteByteData (a, 0, 1); 19430: do { 19431: mmuWriteByteData (--a, '0' | x & 7, 1); 19432: } while ((x >>>= 3) != 0); 19433: } //fpkOTOS() 19434: 19435: //fpkSTOB () 19436: // $FE16 __STOB 19437: // 2進数の文字列を32bit符号なし整数に変換する 19438: // /^[01]+/ 19439: // <a0.l:2進数の文字列の先頭 19440: // >d0.l:32bit符号なし整数 19441: // >a0.l:2進数の文字列の直後('\0'とは限らない) 19442: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19443: public static void fpkSTOB () throws M68kException { 19444: int a = XEiJ.regRn[8]; //a0 19445: int c = mmuReadByteZeroData (a, 1); 19446: if (!('0' <= c && c <= '1')) { //数字が1つもない 19447: XEiJ.regRn[8] = a; //a0 19448: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; 19449: return; 19450: } 19451: int x = c - '0'; //値 19452: for (c = mmuReadByteZeroData (++a, 1); '0' <= c && c <= '1'; c = mmuReadByteZeroData (++a, 1)) { 19453: if (x < 0) { //オーバーフロー 19454: XEiJ.regRn[8] = a; //a0 19455: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; 19456: return; 19457: } 19458: x = x << 1 | c & 1; 19459: } 19460: XEiJ.regRn[0] = x; //d0 19461: XEiJ.regRn[8] = a; //a0 19462: XEiJ.regCCR = 0; 19463: } //fpkSTOB() 19464: 19465: //fpkBTOS () 19466: // $FE17 __BTOS 19467: // 32bit符号なし整数を2進数の文字列に変換する 19468: // /^1[01]*$/ 19469: // <d0.l:32bit符号なし整数 19470: // <a0.l:文字列バッファの先頭 19471: // >a0.l:2進数の文字列の直後('\0'の位置) 19472: public static void fpkBTOS () throws M68kException { 19473: int x = XEiJ.regRn[0]; //d0 19474: int a = XEiJ.regRn[8] += Math.max (1, 32 - Integer.numberOfLeadingZeros (x)); //a0 19475: mmuWriteByteData (a, 0, 1); 19476: do { 19477: mmuWriteByteData (--a, '0' | x & 1, 1); 19478: } while ((x >>>= 1) != 0); 19479: } //fpkBTOS() 19480: 19481: //fpkIUSING () 19482: // $FE18 __IUSING 19483: // 32bit符号あり整数を文字数を指定して右詰めで10進数の文字列に変換する 19484: // /^ *-?[1-9][0-9]*$/ 19485: // <d0.l:32bit符号あり整数 19486: // <d1.b:文字数 19487: // <a0.l:文字列バッファの先頭 19488: // >a0.l:10進数の文字列の直後('\0'の位置) 19489: public static void fpkIUSING () throws M68kException { 19490: int x = XEiJ.regRn[0]; //d0 19491: int n = 0; //符号の文字数 19492: if (x < 0) { //負 19493: n = 1; 19494: x = -x; 19495: } 19496: long t = XEiJ.fmtBcd12 (0xffffffffL & x); //符号は取り除いてあるがx=0x80000000の場合があるので(long)xは不可 19497: int l = n + Math.max (1, 67 - Long.numberOfLeadingZeros (t) >> 2); //符号を含めた文字数 19498: int a = XEiJ.regRn[8]; //a0 19499: for (int i = (XEiJ.regRn[1] & 255) - l; i > 0; i--) { 19500: mmuWriteByteData (a++, ' ', 1); 19501: } 19502: XEiJ.regRn[8] = a += l; //a0 19503: mmuWriteByteData (a, 0, 1); 19504: do { 19505: mmuWriteByteData (--a, '0' | (int) t & 15, 1); 19506: } while ((t >>>= 4) != 0L); 19507: if (n != 0) { 19508: mmuWriteByteData (--a, '-', 1); 19509: } 19510: } //fpkIUSING() 19511: 19512: //fpkVAL () 19513: // $FE20 __VAL 19514: // 文字列を64bit浮動小数点数に変換する 19515: // 先頭の'\t'と' 'を読み飛ばす 19516: // "&B"または"&b"で始まっているときは続きを2進数とみなして__STOBで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する 19517: // "&O"または"&o"で始まっているときは続きを8進数とみなして__STOOで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する 19518: // "&H"または"&h"で始まっているときは続きを16進数とみなして__STOHで32bit符号なし整数に変換してから__LTODで64bit浮動小数点数に変換する 19519: // それ以外は__STODと同じ 19520: // <a0.l:文字列の先頭 19521: // >d0d1.d:64bit浮動小数点数 19522: // >d2.l:(先頭が'&'でないとき)65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外 19523: // >d3.l:(先頭が'&'でないとき)d2.l==65535のとき64bit浮動小数点数をintに変換した値 19524: // >a0.l:変換された文字列の直後('\0'とは限らない) 19525: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19526: public static void fpkVAL () throws M68kException { 19527: int a = XEiJ.regRn[8]; //a0 19528: //先頭の空白を読み飛ばす 19529: int c = mmuReadByteSignData (a++, 1); 19530: while (c == ' ' || c == '\t') { 19531: c = mmuReadByteSignData (a++, 1); 19532: } 19533: if (c == '&') { //&B,&O,&H 19534: c = mmuReadByteSignData (a++, 1) & 0xdf; 19535: XEiJ.regRn[8] = a; //&?の直後 19536: if (c == 'B') { 19537: fpkSTOB (); 19538: FEFunction.fpkLTOD (); 19539: } else if (c == 'O') { 19540: fpkSTOO (); 19541: FEFunction.fpkLTOD (); 19542: } else if (c == 'H') { 19543: fpkSTOH (); 19544: FEFunction.fpkLTOD (); 19545: } else { 19546: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19547: } 19548: } else { //&B,&O,&H以外 19549: fpkSTOD (); 19550: } 19551: } //fpkVAL() 19552: 19553: //fpkUSING () 19554: // $FE21 __USING 19555: // 64bit浮動小数点数をアトリビュートを指定して文字列に変換する 19556: // メモ 19557: // bit1の'\\'とbit4の'+'を両方指定したときは'\\'が右側。先頭に"+\\"を付ける 19558: // bit1の'\\'とbit2の','とbit4の'+'は整数部の桁数が足りないとき数字を右にずらして押し込まれる 19559: // bit3で指数形式を指示しなければ指数部が極端に大きくても極端に小さくても指数形式にならない 19560: // bit3で指数形式を指定したときbit1の'\\'とbit2の','は無効 19561: // bit4とbit5とbit6はbit4>bit5>bit6の順位で1つだけ有効 19562: // 有効数字は14桁で15桁目以降はすべて0 19563: // FLOAT2.Xは整数部の0でない最初の数字から256文字目までで打ち切られてしまう 19564: // 整数部の桁数に余裕があれば左側の空白は出力されるので文字列の全体が常に256バイトに収まるわけではない 19565: // using 1234.5 5 0 0 " 1235." 19566: // using 1234.5 5 1 0 " 1234.5" 19567: // using 1234.5 5 2 0 " 1234.50" 19568: // using 1234.5 6 2 1 "**1234.50" 19569: // using 1234.5 6 2 2 " \\1234.50" 19570: // using 1234.5 6 2 3 "*\\1234.50" 19571: // using 1234.5 6 2 4 " 1,234.50" 19572: // using 1234.5 4 2 4 "1,234.50" 19573: // using 1234.5 4 2 5 "1,234.50" 19574: // using 1234.5 4 2 6 "\\1,234.50" 19575: // using 1234.5 4 2 7 "\\1,234.50" 19576: // using 1234.5 4 2 16 "+1234.50" 19577: // using 1234.5 4 2 22 "+\\1,234.50" 19578: // using 1234.5 4 2 32 "1234.50+" 19579: // using 1234.5 4 2 48 "+1234.50" 19580: // using 1234.5 4 2 64 "1234.50 " 19581: // using 1234.5 4 2 80 "+1234.50" 19582: // using 1234.5 4 2 96 "1234.50+" 19583: // using 12345678901234567890 10 1 0 "12345678901235000000.0" 19584: // using 12345678901234567890e+10 10 1 0 "123456789012350000000000000000.0" 19585: // using 0.3333 0 0 0 "." 19586: // using 0.6666 0 0 0 "1." 19587: // using 0.6666 0 3 0 ".667" 19588: // using 0.6666 3 0 0 " 1." 19589: // using 0.3333 0 0 2 "\\." 19590: // using 0.3333 0 0 16 "+." 19591: // using 0.3333 0 0 18 "+\\." 19592: // using 1e-10 3 3 0 " 0.000" 19593: // 指数形式の出力は不可解で本来の動作ではないように思えるが、 19594: // X-BASICのprint using命令が使っているのでFLOAT2.Xに合わせておいた方がよさそう 19595: // print using "###.##";1.23 " 1.23" 整数部の桁数は3 19596: // print using "+##.##";1.23 " +1.23" 整数部の桁数は3← 19597: // print using "###.##^^^^^";1.23 " 12.30E-001" 整数部の桁数は3 19598: // print using "+##.##^^^^^";1.23 "+12.30E-001" 整数部の桁数は2← 19599: // FLOAT2.Xでは#NANと#INFは4桁の整数のように出力される。末尾に小数点が付くが小数部には何も出力されない 19600: // using -#INF 7 3 23 "*-\\#,INF." 19601: // FLOAT2.Xで#NANと#INFを指数形式にするとさらに不可解。これはバグと言ってよいと思う 19602: // using #INF 10 10 8 " #INFE-005" 19603: // ここでは#NANと#INFは整数部と小数点と小数部と指数部の全体を使って右寄せにする 19604: // <d0d1.d:64bit浮動小数点数 19605: // <d2.l:整数部の桁数 19606: // <d3.l:小数部の桁数 19607: // <d4.l:アトリビュート 19608: // bit0 左側を'*'で埋める 19609: // bit1 先頭に'\\'を付ける 19610: // bit2 整数部を3桁毎に','で区切る 19611: // bit3 指数形式 19612: // bit4 先頭に符号('+'または'-')を付ける 19613: // bit5 末尾に符号('+'または'-')を付ける 19614: // bit6 末尾に符号(' 'または'-')を付ける 19615: // <a0.l:文字列バッファの先頭 19616: // a0は変化しない 19617: public static void fpkUSING () throws M68kException { 19618: fpkUSINGSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 19619: } //fpkUSING() 19620: public static void fpkUSINGSub (long l) throws M68kException { 19621: int len1 = Math.max (0, XEiJ.regRn[2]); //整数部の桁数 19622: int len2 = Math.max (0, XEiJ.regRn[3]); //小数部の桁数 19623: int attr = XEiJ.regRn[4]; //アトリビュート 19624: int a = XEiJ.regRn[8]; //文字列バッファの先頭 19625: boolean exp = (attr & 8) != 0; //true=指数形式 19626: int spc = (attr & 1) != 0 ? '*' : ' '; //先頭の空白を充填する文字 19627: int yen = (attr & 2) != 0 ? '\\' : 0; //先頭の'\\' 19628: int cmm = !exp && (attr & 4) != 0 ? ',' : 0; //3桁毎に入れる',' 19629: //符号 19630: int sgn1 = 0; //先頭の符号 19631: int sgn2 = 0; //末尾の符号 19632: if (l < 0L) { //負 19633: if ((attr & 32 + 64) == 0) { //末尾に符号を付けない 19634: sgn1 = '-'; //先頭の符号 19635: } else { //末尾に符号を付ける 19636: sgn2 = '-'; //末尾の符号 19637: } 19638: l &= 0x7fffffffffffffffL; //符号bitを消しておく 19639: } else { //正 19640: if ((attr & 16) != 0) { //先頭に符号('+'または'-')を付ける 19641: sgn1 = '+'; 19642: } else if ((attr & 16 + 32) == 32) { //末尾に符号('+'または'-')を付ける 19643: sgn2 = '+'; 19644: } else if ((attr & 16 + 32 + 64) == 64) { //末尾に符号(' 'または'-')を付ける 19645: sgn2 = ' '; 19646: } 19647: } 19648: double x = Double.longBitsToDouble (l); //絶対値 19649: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 19650: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 19651: //±0,±Inf,NaN 19652: if (e == -1023) { //±0,非正規化数 19653: if (l == 0L) { //±0 19654: for (int i = len1 - ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19655: (yen != 0 ? 1 : 0) + //'\\' 19656: 1 //数字 19657: ); 0 < i; i--) { 19658: mmuWriteByteData (a++, spc, 1); //空白 19659: } 19660: if (sgn1 != 0) { 19661: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19662: } 19663: if (yen != 0) { 19664: mmuWriteByteData (a++, yen, 1); //'\\' 19665: } 19666: if (0 < len1) { 19667: mmuWriteByteData (a++, '0', 1); //整数部 19668: } 19669: mmuWriteByteData (a++, '.', 1); //小数点 19670: for (; 0 < len2; len2--) { 19671: mmuWriteByteData (a++, '0', 1); //小数部 19672: } 19673: mmuWriteByteData (a, '\0', 1); 19674: return; 19675: } 19676: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 19677: } else if (e == 1024) { //±Inf,NaN 19678: for (int i = len1 + 1 + len2 + (exp ? 5 : 0) - //整数部と小数点と小数部と指数部の全体を使って右寄せにする 19679: ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19680: (yen != 0 ? 1 : 0) + //'\\' 19681: 4 //文字 19682: ); 0 < i; i--) { 19683: mmuWriteByteData (a++, spc, 1); //空白 19684: } 19685: if (sgn1 != 0) { 19686: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19687: } 19688: if (yen != 0) { 19689: mmuWriteByteData (a++, yen, 1); //'\\' 19690: } 19691: mmuWriteByteData (a++, '#', 1); 19692: if (l == 0L) { //±Inf 19693: mmuWriteByteData (a++, 'I', 1); 19694: mmuWriteByteData (a++, 'N', 1); 19695: mmuWriteByteData (a++, 'F', 1); 19696: } else { //NaN 19697: mmuWriteByteData (a++, 'N', 1); 19698: mmuWriteByteData (a++, 'A', 1); 19699: mmuWriteByteData (a++, 'N', 1); 19700: } 19701: mmuWriteByteData (a, '\0', 1); 19702: return; 19703: } 19704: //10進数で表現したときの指数部を求める 19705: // 10^e<=x<10^(e+1)となるeを求める 19706: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 19707: //10^-eを掛けて1<=x<10にする 19708: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 19709: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 19710: // doubleは非正規化数の逆数を表現できない 19711: if (0 < e) { //10<=x 19712: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 19713: if (16 <= e) { 19714: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 19715: if (256 <= e) { 19716: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 19717: } 19718: } 19719: } else if (e < 0) { //x<1 19720: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 19721: if (e <= -16) { 19722: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 19723: if (e <= -256) { 19724: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 19725: } 19726: } 19727: } 19728: //整数部2桁、小数部16桁の10進数に変換する 19729: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 19730: int[] w = new int[18]; 19731: { 19732: int d = (int) x; 19733: int t = XEiJ.FMT_BCD4[d]; 19734: w[0] = t >> 4; 19735: w[1] = t & 15; 19736: for (int i = 2; i < 18; i += 4) { 19737: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 19738: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 19739: //x = (x - (double) d) * 10000.0; 19740: double xh = x * 0x8000001p0; 19741: xh += x - xh; //xの上半分 19742: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 19743: d = (int) x; 19744: t = XEiJ.FMT_BCD4[d]; 19745: w[i ] = t >> 12; 19746: w[i + 1] = t >> 8 & 15; 19747: w[i + 2] = t >> 4 & 15; 19748: w[i + 3] = t & 15; 19749: } 19750: } 19751: //先頭の位置を確認する 19752: // w[h]が先頭(0でない最初の数字)の位置 19753: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 19754: //14+1桁目を四捨五入する 19755: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 19756: if (5 <= w[o]) { 19757: int i = o; 19758: while (10 <= ++w[--i]) { 19759: w[i] = 0; 19760: } 19761: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 19762: h--; //先頭を左にずらす 19763: o--; //末尾を左にずらす 19764: } 19765: } 19766: //先頭の位置に応じて指数部を更新する 19767: // w[h]が整数部、w[h+1..13]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 19768: e -= h - 1; 19769: //整数部の桁数を調節する 19770: int ee = !exp ? e : Math.max (0, sgn1 != 0 || sgn2 != 0 ? len1 : len1 - 1) - 1; //整数部の桁数-1。整数部の桁数はee+1桁。指数部はe-ee 19771: //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 19772: // あらかじめ14+1桁目で四捨五入しておかないと、 19773: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 19774: int s = h + ee + 1 + len2; //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意 19775: if (s < o) { 19776: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 19777: if (0 <= o && 5 <= w[o]) { 19778: int i = o; 19779: while (10 <= ++w[--i]) { 19780: w[i] = 0; 19781: } 19782: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 19783: h--; //先頭を左にずらす 19784: if (!exp) { //指数形式でないとき 19785: ee++; //左に1桁伸ばす。全体の桁数が1桁増える 19786: } else { //指数形式のとき 19787: e++; //指数部を1増やす 19788: o--; //末尾を左にずらす。全体の桁数は変わらない 19789: } 19790: } 19791: } 19792: } 19793: //文字列に変換する 19794: if (0 <= ee) { //1<=x 19795: for (int i = len1 - ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19796: (yen != 0 ? 1 : 0) + //'\\' 19797: (cmm != 0 ? ee / 3 : 0) + //',' 19798: ee + 1 //数字 19799: ); 0 < i; i--) { 19800: mmuWriteByteData (a++, spc, 1); //空白 19801: } 19802: if (sgn1 != 0) { 19803: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19804: } 19805: if (yen != 0) { 19806: mmuWriteByteData (a++, yen, 1); //'\\' 19807: } 19808: for (int i = ee; 0 <= i; i--) { 19809: mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1); //整数部 19810: h++; 19811: if (cmm != 0 && 0 < i && i % 3 == 0) { 19812: mmuWriteByteData (a++, cmm, 1); //',' 19813: } 19814: } 19815: mmuWriteByteData (a++, '.', 1); //小数点 19816: for (; 0 < len2; len2--) { 19817: mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1); //小数部 19818: h++; 19819: } 19820: } else { //x<1 19821: for (int i = len1 - ((sgn1 != 0 ? 1 : 0) + //先頭の符号 19822: (yen != 0 ? 1 : 0) + //'\\' 19823: 1 //数字 19824: ); 0 < i; i--) { 19825: mmuWriteByteData (a++, spc, 1); //空白 19826: } 19827: if (sgn1 != 0) { 19828: mmuWriteByteData (a++, sgn1, 1); //先頭の符号 19829: } 19830: if (yen != 0) { 19831: mmuWriteByteData (a++, yen, 1); //'\\' 19832: } 19833: if (0 < len1) { 19834: mmuWriteByteData (a++, '0', 1); //整数部 19835: } 19836: mmuWriteByteData (a++, '.', 1); //小数点 19837: for (int i = -1 - ee; 0 < len2 && 0 < i; len2--, i--) { 19838: mmuWriteByteData (a++, '0', 1); //小数部の先頭の0の並び 19839: } 19840: for (; 0 < len2; len2--) { 19841: mmuWriteByteData (a++, h < o ? '0' + w[h] : '0', 1); //小数部 19842: h++; 19843: } 19844: } 19845: if (exp) { 19846: e -= ee; 19847: mmuWriteByteData (a++, 'E', 1); //指数部の始まり 19848: if (0 <= e) { 19849: mmuWriteByteData (a++, '+', 1); //指数部の正符号。省略しない 19850: } else { 19851: mmuWriteByteData (a++, '-', 1); //指数部の負符号 19852: e = -e; 19853: } 19854: e = XEiJ.FMT_BCD4[e]; 19855: mmuWriteByteData (a++, '0' + (e >> 8 ), 1); //指数部の100の位。0でも省略しない 19856: mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1); //指数部の10の位 19857: mmuWriteByteData (a++, '0' + (e & 15), 1); //指数部の1の位 19858: } 19859: if (sgn2 != 0) { 19860: mmuWriteByteData (a++, sgn2, 1); //末尾の符号 19861: } 19862: mmuWriteByteData (a, '\0', 1); 19863: } //fpkUSINGSub6(long) 19864: 19865: //fpkSTOD () 19866: // $FE22 __STOD 19867: // 文字列を64bit浮動小数点数に変換する 19868: // 先頭の'\t'と' 'を読み飛ばす 19869: // "#INF"は無限大、"#NAN"は非数とみなす 19870: // バグ 19871: // FLOAT2.X 2.02/2.03は誤差が大きい 19872: // "1.7976931348623E+308"=0x7fefffffffffffb0が0x7fefffffffffffb3になる 19873: // "1.5707963267949"=0x3ff921fb54442d28が0x3ff921fb54442d26になる 19874: // "4.9406564584125E-324"(非正規化数の最小値よりもわずかに大きい)がエラーになる 19875: // FLOAT2.X 2.02/2.03は"-0"が+0になる 19876: // FLOAT4.X 1.02は"-0"が+0になる(実機で確認済み) 19877: // FLOAT2.X 2.02/2.03は"-#INF"が+Infになる 19878: // print val("-#INF")で再現できる 19879: // '-'を符号として解釈しておきながら結果の無限大に符号を付けるのを忘れている 19880: // FLOAT2.X 2.02/2.03は".#INF"が+Infになる 19881: // print val(".#INF")で再現できる 19882: // FLOAT4.X 1.02は"#NAN","#INF","-#INF"を読み取ったときa0が文字列の直後ではなく最後の文字を指している 19883: // <a0.l:文字列の先頭 19884: // >d0d1.d:64bit浮動小数点数 19885: // >d2.l:65535=64bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外 19886: // >d3.l:d2.l==65535のとき64bit浮動小数点数をintに変換した値 19887: // >a0.l:変換された文字列の直後('\0'とは限らない) 19888: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 19889: public static void fpkSTOD () throws M68kException { 19890: long l = Double.doubleToLongBits (fpkSTODSub ()); 19891: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 19892: l = 0x7fffffffffffffffL; 19893: } 19894: XEiJ.regRn[0] = (int) (l >> 32); //d0 19895: XEiJ.regRn[1] = (int) l; //d1 19896: } //fpkSTOD() 19897: public static double fpkSTODSub () throws M68kException { 19898: int a = XEiJ.regRn[8]; //a0 19899: //先頭の空白を読み飛ばす 19900: int c = mmuReadByteSignData (a, 1); 19901: while (c == ' ' || c == '\t') { 19902: c = mmuReadByteSignData (++a, 1); 19903: } 19904: //符号を読み取る 19905: double s = 1.0; //仮数部の符号 19906: if (c == '+') { 19907: c = mmuReadByteSignData (++a, 1); 19908: } else if (c == '-') { 19909: s = -s; 19910: c = mmuReadByteSignData (++a, 1); 19911: } 19912: //#NANと#INFを処理する 19913: if (c == '#') { 19914: c = mmuReadByteSignData (a + 1, 1); 19915: if (c == 'N' || c == 'I') { //小文字は不可 19916: c = c << 8 | mmuReadByteZeroData (a + 2, 1); 19917: if (c == ('N' << 8 | 'A') || c == ('I' << 8 | 'N')) { 19918: c = c << 8 | mmuReadByteZeroData (a + 3, 1); 19919: if (c == ('N' << 16 | 'A' << 8 | 'N') || c == ('I' << 16 | 'N' << 8 | 'F')) { 19920: XEiJ.regRn[2] = 0; //d2 19921: XEiJ.regRn[3] = 0; //d3 19922: XEiJ.regRn[8] = a + 4; //a0。"#NAN"または"#INF"のときだけ直後まで進める。それ以外は'#'の位置で止める 19923: XEiJ.regCCR = 0; //エラーなし。"#INF"はオーバーフローとみなされない 19924: return c == ('N' << 16 | 'A' << 8 | 'N') ? Double.NaN : s * Double.POSITIVE_INFINITY; 19925: } 19926: } 19927: } 19928: XEiJ.regRn[8] = a; //a0。'#'の位置で止める 19929: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19930: return 0.0; 19931: } //if c=='#' 19932: //仮数部を読み取る 19933: // 数字を1000個並べてからe-1000などと書いてあるとき途中でオーバーフローすると困るので、 19934: // 多すぎる数字の並びは先頭の有効数字だけ読み取って残りは桁数だけ数えて読み飛ばす 19935: long u = 0L; //仮数部 19936: int n = 0; //0以外の最初の数字から数えて何桁目か 19937: int e = 1; //-小数部の桁数。1=整数部 19938: if (c == '.') { //仮数部の先頭が小数点 19939: e = 0; //小数部開始 19940: c = mmuReadByteSignData (++a, 1); 19941: } 19942: if (c < '0' || '9' < c) { //仮数部に数字がない 19943: XEiJ.regRn[8] = a; //a0 19944: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19945: return 0.0; 19946: } 19947: double x = 0.0; 19948: do { 19949: if (0 < n || '0' < c) { //0以外 19950: n++; //0以外の最初の数字から数えて何桁目か 19951: } 19952: if (e <= 0 && n <= 18) { //小数部で18桁目まで 19953: e--; //-小数部の桁数 19954: } 19955: if (0 < n && n <= 18) { //1桁目から18桁目まで 19956: u = u * 10L + (long) (c - '0'); 19957: } 19958: c = mmuReadByteSignData (++a, 1); 19959: if (0 < e && c == '.') { //整数部で小数点が出てきた 19960: e = 0; //小数部開始 19961: c = mmuReadByteSignData (++a, 1); 19962: } 19963: } while ('0' <= c && c <= '9'); 19964: if (0 < e) { //小数点が出てこなかった 19965: e = 18 < n ? n - 18 : 0; //整数部を読み飛ばした桁数が(-小数部の桁数) 19966: } 19967: // 1<=u<10^18 整数なので誤差はない 19968: // 0<e 小数点がなくて整数部が19桁以上あって末尾を読み飛ばした 19969: // e==0 小数点がなくて整数部が18桁以内で末尾を読み飛ばさなかった 19970: // 小数点があって小数点で終わっていた 19971: // e<0 小数点があって小数部が1桁以上あった 19972: //指数部を読み取る 19973: if (c == 'E' || c == 'e') { 19974: c = mmuReadByteSignData (++a, 1); 19975: int t = 1; //指数部の符号 19976: if (c == '+') { 19977: c = mmuReadByteSignData (++a, 1); 19978: } else if (c == '-') { 19979: t = -t; 19980: c = mmuReadByteSignData (++a, 1); 19981: } 19982: if (c < '0' || '9' < c) { //指数部に数字がない 19983: XEiJ.regRn[8] = a; //a0 19984: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 19985: return 0.0; 19986: } 19987: while (c == '0') { //先頭の0を読み飛ばす 19988: c = mmuReadByteSignData (++a, 1); 19989: } 19990: int p = 0; 19991: for (int j = 0; '0' <= c && c <= '9' && j < 9; j++) { //0以外の数字が出てきてから最大で9桁目まで読み取る。Human68kの環境では数字を1GBも並べることはできないのでオーバーフローの判定には9桁あれば十分 19992: p = p * 10 + (c - '0'); 19993: c = mmuReadByteSignData (++a, 1); 19994: } 19995: e += t * p; 19996: } 19997: //符号と仮数部と指数部を合わせる 19998: // x=s*x*10^e 19999: // 1<=u<10^18なのでeが範囲を大きく外れている場合を先に除外する 20000: if (e < -350) { 20001: XEiJ.regRn[2] = 65535; //d2。-1ではない 20002: XEiJ.regRn[3] = 0; //d3 20003: XEiJ.regRn[8] = a; //a0 20004: XEiJ.regCCR = 0; //エラーなし。アンダーフローはエラーとみなされない 20005: return s < 0.0 ? -0.0 : 0.0; 20006: } 20007: if (350 < e) { 20008: XEiJ.regRn[2] = 0; //d2 20009: XEiJ.regRn[3] = 0; //d3 20010: XEiJ.regRn[8] = a; //a0 20011: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; //オーバーフロー 20012: return s * Double.POSITIVE_INFINITY; 20013: } 20014: if (true) { 20015: QFP xx = new QFP (s < 0.0 ? -u : u); //符号と仮数部 20016: if (0 < e) { 20017: xx.mul (QFP.QFP_TEN_P16QR[e & 15]); 20018: if (16 <= e) { 20019: xx.mul (QFP.QFP_TEN_P16QR[16 + (e >> 4 & 15)]); 20020: if (256 <= e) { 20021: xx.mul (QFP.QFP_TEN_P16QR[33]); 20022: } 20023: } 20024: } else if (e < 0) { 20025: xx.mul (QFP.QFP_TEN_M16QR[-e & 15]); 20026: if (e <= -16) { 20027: xx.mul (QFP.QFP_TEN_M16QR[16 + (-e >> 4 & 15)]); 20028: if (e <= -256) { 20029: xx.mul (QFP.QFP_TEN_M16QR[33]); 20030: } 20031: } 20032: } 20033: x = xx.getd (); 20034: } else { 20035: x = s * (double) u; //符号と仮数部 20036: if (0 < e) { 20037: x *= FEFunction.FPK_TEN_P16QR[e & 15]; 20038: if (16 <= e) { 20039: x *= FEFunction.FPK_TEN_P16QR[16 + (e >> 4 & 15)]; 20040: if (256 <= e) { 20041: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (e >> 8)] 20042: } 20043: } 20044: } else if (e < 0) { 20045: x /= FEFunction.FPK_TEN_P16QR[-e & 15]; 20046: if (e <= -16) { 20047: x /= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20048: if (e <= -256) { 20049: x /= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20050: } 20051: } 20052: } 20053: } 20054: if (Double.isInfinite (x)) { 20055: XEiJ.regRn[8] = a; //a0 20056: XEiJ.regCCR = XEiJ.REG_CCR_V | XEiJ.REG_CCR_C; //オーバーフロー 20057: return x; 20058: } 20059: // アンダーフローで0になっている場合がある 20060: if (x == (double) ((int) x)) { //intで表現できる。+0.0==-0.0==0なので±0.0を含む 20061: XEiJ.regRn[2] = 65535; //d2。-1ではない 20062: XEiJ.regRn[3] = (int) x; //d3 20063: } else { //intで表現できない 20064: XEiJ.regRn[2] = 0; //d2 20065: XEiJ.regRn[3] = 0; //d3 20066: } 20067: XEiJ.regRn[8] = a; //a0 20068: XEiJ.regCCR = 0; //エラーなし 20069: return x; 20070: } //fpkSTODSub() 20071: 20072: //fpkDTOS () 20073: // $FE23 __DTOS 20074: // 64bit浮動小数点数を文字列に変換する 20075: // 無限大は"#INF"、非数は"#NAN"になる 20076: // 指数形式の境目 20077: // x<10^-4または10^14<=xのとき指数形式にする 20078: // FLOAT2.X/FLOAT4.Xの場合 20079: // 3f2fffffffffff47 2.4414062499999E-004 20080: // 3f2fffffffffff48 0.000244140625 20081: // 42d6bcc41e8fffdf 99999999999999 20082: // 42d6bcc41e8fffe0 1E+014 20083: // <d0d1.d:64bit浮動小数点数 20084: // <a0.l:文字列バッファの先頭 20085: // >a0.l:末尾の'\0'の位置 20086: public static void fpkDTOS () throws M68kException { 20087: fpkDTOSSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 20088: } //fpkDTOS() 20089: public static void fpkDTOSSub (long l) throws M68kException { 20090: final int len3 = 14; 20091: int a = XEiJ.regRn[8]; //文字列バッファの先頭 20092: //符号と指数部の処理 20093: // ±0,±Inf,NaNはここで除外する 20094: if (l < 0L) { 20095: mmuWriteByteData (a++, '-', 1); //負符号 20096: l &= 0x7fffffffffffffffL; //符号bitを消しておく 20097: } 20098: double x = Double.longBitsToDouble (l); //絶対値 20099: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 20100: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 20101: if (e == -1023) { //±0,非正規化数 20102: if (l == 0L) { //±0 20103: mmuWriteByteData (a++, '0', 1); //0 20104: mmuWriteByteData (a, '\0', 1); 20105: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20106: return; 20107: } 20108: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 20109: } else if (e == 1024) { //±Inf,NaN 20110: mmuWriteByteData (a++, '#', 1); 20111: if (l == 0L) { //±Inf 20112: mmuWriteByteData (a++, 'I', 1); 20113: mmuWriteByteData (a++, 'N', 1); 20114: mmuWriteByteData (a++, 'F', 1); 20115: } else { //NaN 20116: mmuWriteByteData (a++, 'N', 1); 20117: mmuWriteByteData (a++, 'A', 1); 20118: mmuWriteByteData (a++, 'N', 1); 20119: } 20120: mmuWriteByteData (a, '\0', 1); 20121: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20122: return; 20123: } 20124: //10進数で表現したときの指数部を求める 20125: // 10^e<=x<10^(e+1)となるeを求める 20126: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 20127: //10^-eを掛けて1<=x<10にする 20128: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 20129: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 20130: // doubleは非正規化数の逆数を表現できない 20131: if (0 < e) { //10<=x 20132: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 20133: if (16 <= e) { 20134: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 20135: if (256 <= e) { 20136: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 20137: } 20138: } 20139: } else if (e < 0) { //x<1 20140: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 20141: if (e <= -16) { 20142: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20143: if (e <= -256) { 20144: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20145: } 20146: } 20147: } 20148: //整数部2桁、小数部16桁の10進数に変換する 20149: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 20150: int[] w = new int[18]; 20151: { 20152: int d = (int) x; 20153: int t = XEiJ.FMT_BCD4[d]; 20154: w[0] = t >> 4; 20155: w[1] = t & 15; 20156: for (int i = 2; i < 18; i += 4) { 20157: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 20158: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 20159: //x = (x - (double) d) * 10000.0; 20160: double xh = x * 0x8000001p0; 20161: xh += x - xh; //xの上半分 20162: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20163: d = (int) x; 20164: t = XEiJ.FMT_BCD4[d]; 20165: w[i ] = t >> 12; 20166: w[i + 1] = t >> 8 & 15; 20167: w[i + 2] = t >> 4 & 15; 20168: w[i + 3] = t & 15; 20169: } 20170: } 20171: //先頭の位置を確認する 20172: // w[h]が先頭(0でない最初の数字)の位置 20173: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20174: //14+1桁目を四捨五入する 20175: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20176: if (5 <= w[o]) { 20177: int i = o; 20178: while (10 <= ++w[--i]) { 20179: w[i] = 0; 20180: } 20181: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20182: h--; //先頭を左にずらす 20183: o--; //末尾を左にずらす 20184: } 20185: } 20186: //先頭の位置に応じて指数部を更新する 20187: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20188: e -= h - 1; 20189: //末尾の位置を確認する 20190: // w[o-1]が末尾(0でない最後の数字)の位置 20191: while (w[o - 1] == 0) { //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意 20192: o--; 20193: } 20194: //指数形式にするかどうか選択して文字列に変換する 20195: if (0 <= e && e < len3) { //1<=x<10^len3。指数形式にしない 20196: do { 20197: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部。末尾の位置に関係なく1の位まで書く 20198: } while (0 <= --e); 20199: if (h < o) { //小数部がある 20200: mmuWriteByteData (a++, '.', 1); //小数部があるときだけ小数点を書く 20201: do { 20202: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20203: } while (h < o); 20204: } 20205: } else if (-4 <= e && e < 0) { //10^-4<=x<1。指数形式にしない 20206: mmuWriteByteData (a++, '0', 1); //整数部の0 20207: mmuWriteByteData (a++, '.', 1); //小数点 20208: while (++e < 0) { 20209: mmuWriteByteData (a++, '0', 1); //小数部の先頭の0の並び 20210: } 20211: do { 20212: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20213: } while (h < o); 20214: } else { //x<10^-4または10^len3<=x。指数形式にする 20215: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部 20216: if (h < o) { //小数部がある 20217: mmuWriteByteData (a++, '.', 1); //小数部があるときだけ小数点を書く 20218: do { 20219: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20220: } while (h < o); 20221: } 20222: mmuWriteByteData (a++, 'E', 1); //指数部の始まり 20223: if (0 <= e) { 20224: mmuWriteByteData (a++, '+', 1); //指数部の正符号。省略しない 20225: } else { 20226: mmuWriteByteData (a++, '-', 1); //指数部の負符号 20227: e = -e; 20228: } 20229: e = XEiJ.FMT_BCD4[e]; 20230: mmuWriteByteData (a++, '0' + (e >> 8 ), 1); //指数部の100の位。0でも省略しない 20231: mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1); //指数部の10の位 20232: mmuWriteByteData (a++, '0' + (e & 15), 1); //指数部の1の位 20233: } 20234: mmuWriteByteData (a, '\0', 1); 20235: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20236: } //fpkDTOSSub6() 20237: 20238: //fpkECVT () 20239: // $FE24 __ECVT 20240: // 64bit浮動小数点数を全体の桁数を指定して文字列に変換する 20241: // 文字列に書くのは仮数部の数字のみ 20242: // 符号と小数点と指数部は文字列に書かず、小数点の位置と符号をレジスタに入れて返す 20243: // 桁数は255桁まで指定できるが、有効桁数は14桁まで 20244: // 有効桁数の次の桁で絶対値を四捨五入する 20245: // 15桁以上を指定しても14桁に丸められ、15桁目以降はすべて'0'になる 20246: // 無限大は"#INF"、非数は"#NAN"に変換する 20247: // "#INF"と"#NAN"のとき小数点の位置は4になる 20248: // "#INF"と"#NAN"で3桁以下のときは途中で打ち切る 20249: // メモ 20250: // FLOATn.Xは"#INF"と"#NAN"で1桁～3桁のとき文字列が"$","$0","$00"になってしまう 20251: // 文字数が少なすぎて"#INF"や"#NAN"が入り切らないのは仕方がないが、 20252: // 無意味な"$00"という文字列になるのは数字ではない文字列を四捨五入しようとするバグが原因 20253: // 例えば3桁のときは4桁目の'F'または'N'が'5'以上なので繰り上げて上の位をインクリメントする 20254: // 'N'+1='O'または'A'+1='B'が'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする 20255: // 'I'+1='J'または'N'+1='O'も'9'よりも大きいので'0'を上書きして繰り上げて上の位をインクリメントする 20256: // '#'+1='$'は'9'以下なので"$00"になる 20257: // X-BASICでint i2,i3:print ecvt(val("#INF"),3,i2,i3)とすると再現できる 20258: // "#INF"と"#NAN"で5桁以上のときは5桁目以降はすべて'\0'になる 20259: // メモ 20260: // FLOATn.Xは"#NAN"と"#INF"で15桁以上のとき5桁目から14桁目までは'\0'だが15桁目以降に'0'が書き込まれる 20261: // 通常は5桁目の'\0'で文字列は終了していると見なされるので実害はないが気持ち悪い 20262: // メモ 20263: // FLOAT2.X 2.02/2.03は0のとき小数点の位置が0になる 20264: // FLOAT4.X 1.02は0のとき小数点の位置が1になる 20265: // ここでは1にしている 20266: // <d0d1.d:64bit浮動小数点数 20267: // <d2.l:全体の桁数 20268: // <a0.l:文字列バッファの先頭。末尾に'\0'を書き込むので桁数+1バイト必要 20269: // >d0.l:先頭から小数点の位置までのオフセット 20270: // >d1.l:符号(0=+,1=-) 20271: // a0.lは変化しない 20272: public static void fpkECVT () throws M68kException { 20273: fpkECVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 20274: } //fpkECVT() 20275: public static void fpkECVTSub (long l) throws M68kException { 20276: int len3 = Math.max (0, XEiJ.regRn[2]); //全体の桁数 20277: int a = XEiJ.regRn[8]; //文字列バッファの先頭 20278: int b = a + len3; //文字列バッファの末尾+1。'\0'を書き込む位置 20279: //符号と指数部の処理 20280: // ±0,±Inf,NaNはここで除外する 20281: if (0L <= l) { 20282: XEiJ.regRn[1] = 0; //正符号 20283: } else { 20284: XEiJ.regRn[1] = 1; //負符号 20285: l &= 0x7fffffffffffffffL; //符号bitを消しておく 20286: } 20287: double x = Double.longBitsToDouble (l); //絶対値 20288: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 20289: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 20290: if (e == -1023) { //±0,非正規化数 20291: if (l == 0L) { //±0 20292: //指定された全体の桁数だけ'0'を並べる 20293: while (a < b) { 20294: mmuWriteByteData (a++, '0', 1); 20295: } 20296: mmuWriteByteData (a, '\0', 1); 20297: XEiJ.regRn[0] = 1; //小数点の位置 20298: return; 20299: } 20300: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 20301: } else if (e == 1024) { //±Inf,NaN 20302: for (int s = l != 0L ? '#' | 'N' << 8 | 'A' << 16 | 'N' << 24 : '#' | 'I' << 8 | 'N' << 16 | 'F' << 24; a < b && s != 0; s >>>= 8) { 20303: mmuWriteByteData (a++, s, 1); 20304: } 20305: while (a < b) { 20306: mmuWriteByteData (a++, '\0', 1); //残りは'\0' 20307: } 20308: mmuWriteByteData (a, '\0', 1); 20309: XEiJ.regRn[0] = 4; //小数点の位置 20310: return; 20311: } 20312: //10進数で表現したときの指数部を求める 20313: // 10^e<=x<10^(e+1)となるeを求める 20314: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 20315: //10^-eを掛けて1<=x<10にする 20316: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 20317: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 20318: // doubleは非正規化数の逆数を表現できない 20319: if (0 < e) { //10<=x 20320: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 20321: if (16 <= e) { 20322: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 20323: if (256 <= e) { 20324: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 20325: } 20326: } 20327: } else if (e < 0) { //x<1 20328: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 20329: if (e <= -16) { 20330: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20331: if (e <= -256) { 20332: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20333: } 20334: } 20335: } 20336: //整数部2桁、小数部16桁の10進数に変換する 20337: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 20338: int[] w = new int[18]; 20339: { 20340: int d = (int) x; 20341: int t = XEiJ.FMT_BCD4[d]; 20342: w[0] = t >> 4; 20343: w[1] = t & 15; 20344: for (int i = 2; i < 18; i += 4) { 20345: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 20346: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 20347: //x = (x - (double) d) * 10000.0; 20348: double xh = x * 0x8000001p0; 20349: xh += x - xh; //xの上半分 20350: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20351: d = (int) x; 20352: t = XEiJ.FMT_BCD4[d]; 20353: w[i ] = t >> 12; 20354: w[i + 1] = t >> 8 & 15; 20355: w[i + 2] = t >> 4 & 15; 20356: w[i + 3] = t & 15; 20357: } 20358: } 20359: //先頭の位置を確認する 20360: // w[h]が先頭(0でない最初の数字)の位置 20361: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20362: //14+1桁目を四捨五入する 20363: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20364: if (5 <= w[o]) { 20365: int i = o; 20366: while (10 <= ++w[--i]) { 20367: w[i] = 0; 20368: } 20369: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20370: h--; //先頭を左にずらす 20371: o--; //末尾を左にずらす 20372: } 20373: } 20374: //先頭の位置に応じて指数部を更新する 20375: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20376: e -= h - 1; 20377: //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 20378: // あらかじめ14+1桁目で四捨五入しておかないと、 20379: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 20380: int s = h + len3; //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意 20381: if (s < o) { 20382: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 20383: if (0 <= o && 5 <= w[o]) { 20384: int i = o; 20385: while (10 <= ++w[--i]) { 20386: w[i] = 0; 20387: } 20388: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20389: h--; //先頭を左にずらす 20390: o--; //末尾を左にずらす 20391: e++; //指数部を1増やす 20392: } 20393: } 20394: } 20395: //文字列に変換する 20396: while (a < b && h < o) { 20397: mmuWriteByteData (a++, '0' + w[h++], 1); //有効数字 20398: } 20399: while (a < b) { 20400: mmuWriteByteData (a++, '0', 1); //残りは'0' 20401: } 20402: mmuWriteByteData (a, '\0', 1); 20403: XEiJ.regRn[0] = e + 1; //小数点の位置 20404: } //fpkECVTSub6() 20405: 20406: //fpkFCVT () 20407: // $FE25 __FCVT 20408: // 64bit浮動小数点数を小数点以下の桁数を指定して文字列に変換する 20409: // メモ 20410: // 小数点の位置がpのとき[p]の左側に小数点がある 20411: // 全体の桁数が制限されないので指数部が大きいとき整数部が収まるサイズのバッファが必要 20412: // 0または1以上のとき 20413: // 整数部と小数点以下の指定された桁数までを小数部の0を省略せずに出力する 20414: // 整数部と小数点以下の指定された桁数が合わせて14桁を超えるときは15桁目が四捨五入されて15桁目以降は0になる 20415: // 小数点の位置は整数部の桁数に等しい 20416: // print fcvt(0#,4,i2,i3),i2,i3 20417: // 0000 0 0 20418: // print fcvt(2e+12/3#,4,i2,i3),i2,i3 20419: // 6666666666666700 12 0 20420: // ↑ 20421: // 1未満のとき 20422: // 小数点以下の桁数の範囲内を先頭の0を省略して出力する 20423: // 小数点以下の桁数の範囲内がすべて0のときは""になる 20424: // 小数点の位置は指数部+1に等しい 20425: // print fcvt(0.01,3,i2,i3),i2,i3 0.010 20426: // 10 -1 0 <~~ 20427: // print fcvt(0.001,3,i2,i3),i2,i3 0.001 20428: // 1 -2 0 <<~ 20429: // print fcvt(0.0001,3,i2,i3),i2,i3 0.0001 20430: // -3 0 <<< 20431: // print fcvt(0.00001,3,i2,i3),i2,i3 0.00001 20432: // -4 0 <<<< 20433: // #INFと#NAN 20434: // 小数点以下の桁数の指定に関係なく4文字出力して小数点の位置4を返す 20435: // print fcvt(val("#INF"),2,i2,i3),i2,i3 20436: // #INF 4 0 20437: // print fcvt(val("#INF"),6,i2,i3),i2,i3 20438: // #INF 4 0 20439: // バグ 20440: // FLOAT4.X 1.02は結果が整数部が大きいとき255文字で打ち切られる 20441: // FLOAT4.X 1.02はFCVT(±0)の整数部が0桁ではなく1桁になる 20442: // <d0d1.d:64bit浮動小数点数 20443: // <d2.l:小数点以下の桁数 20444: // <a0.l:文字列バッファの先頭 20445: // >d0.l:先頭から小数点の位置までのオフセット 20446: // >d1.l:符号(0=+,1=-) 20447: public static void fpkFCVT () throws M68kException { 20448: fpkFCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 20449: } //fpkFCVT() 20450: public static void fpkFCVTSub (long l) throws M68kException { 20451: int len2 = Math.max (0, XEiJ.regRn[2]); //小数部の桁数 20452: int a = XEiJ.regRn[8]; //文字列バッファの先頭 20453: //符号と指数部の処理 20454: // ±0,±Inf,NaNはここで除外する 20455: if (0L <= l) { 20456: XEiJ.regRn[1] = 0; //正符号 20457: } else { 20458: XEiJ.regRn[1] = 1; //負符号 20459: l &= 0x7fffffffffffffffL; //符号bitを消しておく 20460: } 20461: double x = Double.longBitsToDouble (l); //絶対値 20462: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 20463: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 20464: if (e == -1023) { //±0,非正規化数 20465: if (l == 0L) { //±0 20466: //指定された小数点以下の桁数だけ'0'を並べる 20467: while (len2-- > 0) { 20468: mmuWriteByteData (a++, '0', 1); 20469: } 20470: mmuWriteByteData (a, '\0', 1); 20471: XEiJ.regRn[0] = 0; //小数点の位置 20472: return; 20473: } 20474: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 20475: } else if (e == 1024) { //±Inf,NaN 20476: mmuWriteByteData (a++, '#', 1); 20477: if (l == 0L) { //±Inf 20478: mmuWriteByteData (a++, 'I', 1); 20479: mmuWriteByteData (a++, 'N', 1); 20480: mmuWriteByteData (a++, 'F', 1); 20481: } else { //NaN 20482: mmuWriteByteData (a++, 'N', 1); 20483: mmuWriteByteData (a++, 'A', 1); 20484: mmuWriteByteData (a++, 'N', 1); 20485: } 20486: mmuWriteByteData (a, '\0', 1); 20487: XEiJ.regRn[0] = 4; //小数点の位置 20488: return; 20489: } 20490: //10進数で表現したときの指数部を求める 20491: // 10^e<=x<10^(e+1)となるeを求める 20492: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 20493: //10^-eを掛けて1<=x<10にする 20494: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 20495: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 20496: // doubleは非正規化数の逆数を表現できない 20497: if (0 < e) { //10<=x 20498: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 20499: if (16 <= e) { 20500: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 20501: if (256 <= e) { 20502: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 20503: } 20504: } 20505: } else if (e < 0) { //x<1 20506: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 20507: if (e <= -16) { 20508: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20509: if (e <= -256) { 20510: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20511: } 20512: } 20513: } 20514: //整数部2桁、小数部16桁の10進数に変換する 20515: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 20516: int[] w = new int[18]; 20517: { 20518: int d = (int) x; 20519: int t = XEiJ.FMT_BCD4[d]; 20520: w[0] = t >> 4; 20521: w[1] = t & 15; 20522: for (int i = 2; i < 18; i += 4) { 20523: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 20524: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 20525: //x = (x - (double) d) * 10000.0; 20526: double xh = x * 0x8000001p0; 20527: xh += x - xh; //xの上半分 20528: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20529: d = (int) x; 20530: t = XEiJ.FMT_BCD4[d]; 20531: w[i ] = t >> 12; 20532: w[i + 1] = t >> 8 & 15; 20533: w[i + 2] = t >> 4 & 15; 20534: w[i + 3] = t & 15; 20535: } 20536: } 20537: //先頭の位置を確認する 20538: // w[h]が先頭(0でない最初の数字)の位置 20539: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20540: //14+1桁目を四捨五入する 20541: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20542: if (5 <= w[o]) { 20543: int i = o; 20544: while (10 <= ++w[--i]) { 20545: w[i] = 0; 20546: } 20547: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20548: h--; //先頭を左にずらす 20549: o--; //末尾を左にずらす 20550: } 20551: } 20552: //先頭の位置に応じて指数部を更新する 20553: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20554: e -= h - 1; 20555: //小数点以下len2+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 20556: // あらかじめ14+1桁目で四捨五入しておかないと、 20557: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 20558: int s = h + e + 1 + len2; //w[s]は小数点以下len2+1桁目の位置。w.length<=sの場合があることに注意 20559: if (s < o) { 20560: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 20561: if (0 <= o && 5 <= w[o]) { 20562: int i = o; 20563: while (10 <= ++w[--i]) { 20564: w[i] = 0; 20565: } 20566: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20567: h--; //先頭を左にずらす 20568: o--; //末尾を左にずらす 20569: e++; //指数部を1増やす 20570: } 20571: } 20572: } 20573: //文字列に変換する 20574: while (h < o) { 20575: mmuWriteByteData (a++, '0' + w[h++], 1); //有効数字 20576: } 20577: while (h++ < s) { 20578: mmuWriteByteData (a++, '0', 1); //残りは'0' 20579: } 20580: mmuWriteByteData (a, '\0', 1); 20581: XEiJ.regRn[0] = e + 1; //小数点の位置 20582: } //fpkFCVTSub6() 20583: 20584: //fpkGCVT () 20585: // $FE26 __GCVT 20586: // 64bit浮動小数点数を全体の桁数を指定して文字列に変換する 20587: // 指定された桁数で表現できないときは指数表現になる 20588: // メモ 20589: // print gcvt(1e-1,10) 20590: // 0.1 20591: // print gcvt(1e-8,10) 20592: // 0.00000001 20593: // print gcvt(1.5e-8,10) 20594: // 1.5E-008 20595: // print gcvt(1e-9,10) 20596: // 1.E-009 小数点はあるが小数部がない 20597: // print gcvt(2e-1/3#,10) 20598: // 6.666666667E-002 20599: // print gcvt(2e+0/3#,10) 20600: // 0.6666666667 20601: // print gcvt(2e+1/3#,10) 20602: // 6.666666667 20603: // print gcvt(2e+9/3#,10) 20604: // 666666666.7 20605: // print gcvt(2e+10/3#,10) 20606: // 6666666667 20607: // print gcvt(2e+11/3#,10) 20608: // 6.666666667E+010 20609: // print gcvt(0#,4) 20610: // 0. 20611: // print gcvt(val("#INF"),4) 20612: // #INF 20613: // print gcvt(val("#INF"),3) 20614: // $.E+003 20615: // print gcvt(val("#INF"),2) 20616: // $.E+003 20617: // print gcvt(val("#INF"),1) 20618: // $.E+003 20619: // FLOAT2.XのGCVTは小数部がなくても桁数の範囲内であれば小数点を書く 20620: // 桁数ちょうどのときは小数点も指数部も付かないので、整数でないことを明確にするために小数点を書いているとも言い難い 20621: // ここでは#NANと#INF以外は小数部がなくても小数点を書くことにする 20622: // バグ 20623: // FLOAT2.X 2.02/2.03は#NANと#INFにも小数点を付ける 20624: // FLOAT2.X 2.02/2.03は#NANと#INFのとき桁数が足りないと指数形式にしようとして文字列が壊れる 20625: // FLOAT4.X 1.02は#NANと#INFにも小数点を付ける 20626: // FLOAT4.X 1.02は桁数の少ない整数には小数点を付けて桁数ちょうどの整数には小数点も指数部も付けない 20627: // <d0d1.d:64bit浮動小数点数 20628: // <d2.b:全体の桁数 20629: // <a0.l:文字列バッファの先頭 20630: // >a0.l:末尾の'\0'の位置 20631: public static void fpkGCVT () throws M68kException { 20632: fpkGCVTSub ((long) XEiJ.regRn[0] << 32 | 0xffffffffL & XEiJ.regRn[1]); //64bit浮動小数点数 20633: } //fpkGCVT() 20634: public static void fpkGCVTSub (long l) throws M68kException { 20635: int len3 = Math.max (0, XEiJ.regRn[2]); //全体の桁数 20636: int a = XEiJ.regRn[8]; //文字列バッファの先頭 20637: //符号と指数部の処理 20638: // ±0,±Inf,NaNはここで除外する 20639: if (l < 0L) { 20640: mmuWriteByteData (a++, '-', 1); //負符号 20641: l &= 0x7fffffffffffffffL; //符号bitを消しておく 20642: } 20643: double x = Double.longBitsToDouble (l); //絶対値 20644: int e = (int) (l >>> 52) - 1023; //指数部。ゲタ0。符号bitは消してあるのでマスクは不要 20645: l &= 0x000fffffffffffffL; //仮数部の小数部。正規化数のとき整数部の1が付いていないことに注意 20646: if (e == -1023) { //±0,非正規化数 20647: if (l == 0L) { //±0 20648: mmuWriteByteData (a++, '0', 1); //0 20649: mmuWriteByteData (a++, '.', 1); //小数点 20650: mmuWriteByteData (a, '\0', 1); 20651: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20652: return; 20653: } 20654: e -= Long.numberOfLeadingZeros (l) - 12; //非正規化数の指数部を補正する 20655: } else if (e == 1024) { //±Inf,NaN 20656: mmuWriteByteData (a++, '#', 1); 20657: if (l == 0L) { //±Inf 20658: mmuWriteByteData (a++, 'I', 1); 20659: mmuWriteByteData (a++, 'N', 1); 20660: mmuWriteByteData (a++, 'F', 1); 20661: } else { //NaN 20662: mmuWriteByteData (a++, 'N', 1); 20663: mmuWriteByteData (a++, 'A', 1); 20664: mmuWriteByteData (a++, 'N', 1); 20665: } 20666: mmuWriteByteData (a, '\0', 1); 20667: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20668: return; 20669: } 20670: //10進数で表現したときの指数部を求める 20671: // 10^e<=x<10^(e+1)となるeを求める 20672: e = (int) Math.floor ((double) e * 0.30102999566398119521373889472); //log10(2) 20673: //10^-eを掛けて1<=x<10にする 20674: // 非正規化数の最小値から正規化数の最大値まで処理できなければならない 20675: // 10^-eを計算してからまとめて掛ける方法はxが非正規化数のとき10^-eがオーバーフローしてしまうので不可 20676: // doubleは非正規化数の逆数を表現できない 20677: if (0 < e) { //10<=x 20678: x *= FEFunction.FPK_TEN_M16QR[e & 15]; 20679: if (16 <= e) { 20680: x *= FEFunction.FPK_TEN_M16QR[16 + (e >> 4 & 15)]; 20681: if (256 <= e) { 20682: x *= FEFunction.FPK_TEN_M16QR[33]; //FEFunction.FPK_TEN_M16QR[32 + (e >> 8)] 20683: } 20684: } 20685: } else if (e < 0) { //x<1 20686: x *= FEFunction.FPK_TEN_P16QR[-e & 15]; 20687: if (e <= -16) { 20688: x *= FEFunction.FPK_TEN_P16QR[16 + (-e >> 4 & 15)]; 20689: if (e <= -256) { 20690: x *= FEFunction.FPK_TEN_P16QR[33]; //FEFunction.FPK_TEN_P16QR[32 + (-e >> 8)] 20691: } 20692: } 20693: } 20694: //整数部2桁、小数部16桁の10進数に変換する 20695: // 1<=x<10なのでw[1]が先頭になるはずだが誤差で前後にずれる可能性がある 20696: int[] w = new int[18]; 20697: { 20698: int d = (int) x; 20699: int t = XEiJ.FMT_BCD4[d]; 20700: w[0] = t >> 4; 20701: w[1] = t & 15; 20702: for (int i = 2; i < 18; i += 4) { 20703: //xを10000倍して整数部dを引くことで小数部を残すが、このとき情報落ちが発生して誤差が蓄積する 20704: //Double-Doubleの乗算の要領で10000倍を正確に行い、誤差の蓄積を回避する 20705: //x = (x - (double) d) * 10000.0; 20706: double xh = x * 0x8000001p0; 20707: xh += x - xh; //xの上半分 20708: x = (xh - (double) d) * 10000.0 + (x - xh) * 10000.0; 20709: d = (int) x; 20710: t = XEiJ.FMT_BCD4[d]; 20711: w[i ] = t >> 12; 20712: w[i + 1] = t >> 8 & 15; 20713: w[i + 2] = t >> 4 & 15; 20714: w[i + 3] = t & 15; 20715: } 20716: } 20717: //先頭の位置を確認する 20718: // w[h]が先頭(0でない最初の数字)の位置 20719: int h = w[0] != 0 ? 0 : w[1] != 0 ? 1 : 2; 20720: //14+1桁目を四捨五入する 20721: int o = h + 14; //w[o]は四捨五入する桁の位置。w[]の範囲内 20722: if (5 <= w[o]) { 20723: int i = o; 20724: while (10 <= ++w[--i]) { 20725: w[i] = 0; 20726: } 20727: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20728: h--; //先頭を左にずらす 20729: o--; //末尾を左にずらす 20730: } 20731: } 20732: //先頭の位置に応じて指数部を更新する 20733: // w[h]が整数部、w[h+1..o-1]が小数部。10^eの小数点はw[h]の右側。整数部の桁数はe+1桁 20734: e -= h - 1; 20735: //先頭からlen3+1桁目が先頭から14+1桁目よりも左側にあるときその桁で改めて四捨五入する 20736: // あらかじめ14+1桁目で四捨五入しておかないと、 20737: // 1.5の5を四捨五入しなければならないときに誤差で1.499…になったまま4を四捨五入しようとして失敗することがある 20738: int s = h + len3; //w[s]は先頭からlen3+1桁目の位置。w.length<=sの場合があることに注意 20739: if (s < o) { 20740: o = s; //w[o]は四捨五入する桁の位置。o<0の場合があることに注意 20741: if (0 <= o && 5 <= w[o]) { 20742: int i = o; 20743: while (10 <= ++w[--i]) { 20744: w[i] = 0; 20745: } 20746: if (i < h) { //先頭から繰り上がった。このとき新しい先頭は1でそれ以外はすべて0 20747: h--; //先頭を左にずらす 20748: o--; //末尾を左にずらす 20749: e++; //指数部を1増やす 20750: } 20751: } 20752: } 20753: //末尾の位置を確認する 20754: // w[o-1]が末尾(0でない最後の数字)の位置 20755: while (w[o - 1] == 0) { //全体は0ではないので必ず止まる。小数点よりも左側で止まる場合があることに注意 20756: o--; 20757: } 20758: //指数形式にするかどうか選択して文字列に変換する 20759: if (0 <= e && e < len3) { //1<=x<10^len3。指数形式にしない 20760: do { 20761: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部。末尾の位置に関係なく1の位まで書く 20762: } while (0 <= --e); 20763: mmuWriteByteData (a++, '.', 1); //小数部がなくても小数点を書く 20764: while (h < o) { 20765: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20766: } 20767: } else if (-4 <= e && e < 0) { //10^-4<=x<1。指数形式にしない 20768: mmuWriteByteData (a++, '0', 1); //整数部の0 20769: mmuWriteByteData (a++, '.', 1); //小数点 20770: while (++e < 0) { 20771: mmuWriteByteData (a++, '0', 1); //小数部の先頭の0の並び 20772: } 20773: while (h < o) { 20774: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20775: } 20776: } else { //x<10^-4または10^len3<=x。指数形式にする 20777: mmuWriteByteData (a++, '0' + w[h++], 1); //整数部 20778: mmuWriteByteData (a++, '.', 1); //小数部がなくても小数点を書く 20779: while (h < o) { 20780: mmuWriteByteData (a++, '0' + w[h++], 1); //小数部 20781: } 20782: mmuWriteByteData (a++, 'E', 1); //指数部の始まり 20783: if (0 <= e) { 20784: mmuWriteByteData (a++, '+', 1); //指数部の正符号。省略しない 20785: } else { 20786: mmuWriteByteData (a++, '-', 1); //指数部の負符号 20787: e = -e; 20788: } 20789: e = XEiJ.FMT_BCD4[e]; 20790: mmuWriteByteData (a++, '0' + (e >> 8 ), 1); //指数部の100の位。0でも省略しない 20791: mmuWriteByteData (a++, '0' + (e >> 4 & 15), 1); //指数部の10の位 20792: mmuWriteByteData (a++, '0' + (e & 15), 1); //指数部の1の位 20793: } 20794: mmuWriteByteData (a, '\0', 1); 20795: XEiJ.regRn[8] = a; //末尾の'\0'の位置 20796: } //fpkGCVTSub6() 20797: 20798: //fpkFVAL () 20799: // $FE50 __FVAL 20800: // 文字列を32bit浮動小数点数に変換する 20801: // __VALとほぼ同じ 20802: // <a0.l:文字列の先頭 20803: // >d0.s:32bit浮動小数点数 20804: // >d2.l:(先頭が'&'でないとき)65535=32bit浮動小数点数をオーバーフローなしでintに変換できる,0=それ以外 20805: // >d3.l:(先頭が'&'でないとき)d2.l==65535のとき32bit浮動小数点数をintに変換した値 20806: // >a0.l:変換された文字列の直後('\0'とは限らない) 20807: // >ccr:0=エラーなし,CCR_N|CCR_C=文法エラー,CCR_V|CCR_C=オーバーフロー 20808: public static void fpkFVAL () throws M68kException { 20809: int a = XEiJ.regRn[8]; //a0 20810: //先頭の空白を読み飛ばす 20811: int c = mmuReadByteSignData (a++, 1); 20812: while (c == ' ' || c == '\t') { 20813: c = mmuReadByteSignData (a++, 1); 20814: } 20815: if (c == '&') { //&B,&O,&H 20816: c = mmuReadByteSignData (a++, 1) & 0xdf; 20817: XEiJ.regRn[8] = a; //&?の直後 20818: if (c == 'B') { 20819: fpkSTOB (); 20820: FEFunction.fpkLTOF (); 20821: } else if (c == 'O') { 20822: fpkSTOO (); 20823: FEFunction.fpkLTOF (); 20824: } else if (c == 'H') { 20825: fpkSTOH (); 20826: FEFunction.fpkLTOF (); 20827: } else { 20828: XEiJ.regCCR = XEiJ.REG_CCR_N | XEiJ.REG_CCR_C; //文法エラー 20829: } 20830: } else { //&B,&O,&H以外 20831: FEFunction.fpkSTOF (); 20832: } 20833: } //fpkFVAL() 20834: 20835: //fpkCLMUL () 20836: // $FEE0 __CLMUL 20837: // 32bit符号あり整数乗算 20838: // <(a7).l:32bit符号あり整数。被乗数x 20839: // <4(a7).l:32bit符号あり整数。乗数y 20840: // >(a7).l:32bit符号あり整数。積x*y。オーバーフローのときは不定 20841: // >ccr:cs=オーバーフロー。C以外は不定 20842: public static void fpkCLMUL () throws M68kException { 20843: int a7 = XEiJ.regRn[15]; 20844: long l = (long) mmuReadLongData (a7, 1) * (long) mmuReadLongData (a7 + 4, 1); 20845: int h = (int) l; 20846: mmuWriteLongData (a7, h, 1); //オーバーフローのときは積の下位32bit 20847: XEiJ.regCCR = (long) h == l ? 0 : XEiJ.REG_CCR_C; 20848: } //fpkCLMUL() 20849: 20850: //fpkCLDIV () 20851: // $FEE1 __CLDIV 20852: // 32bit符号あり整数除算 20853: // <(a7).l:32bit符号あり整数。被除数x 20854: // <4(a7).l:32bit符号あり整数。除数y 20855: // >(a7).l:32bit符号あり整数。商x/y。ゼロ除算のときは不定 20856: // >ccr:cs=ゼロ除算。C以外は不定 20857: public static void fpkCLDIV () throws M68kException { 20858: int a7 = XEiJ.regRn[15]; 20859: int h = mmuReadLongData (a7 + 4, 1); 20860: if (h == 0) { 20861: //(a7).lは変化しない 20862: XEiJ.regCCR = XEiJ.REG_CCR_C; 20863: } else { 20864: mmuWriteLongData (a7, mmuReadLongData (a7, 1) / h, 1); 20865: XEiJ.regCCR = 0; 20866: } 20867: } //fpkCLDIV() 20868: 20869: //fpkCLMOD () 20870: // $FEE2 __CLMOD 20871: // 32bit符号あり整数剰余算 20872: // <(a7).l:32bit符号あり整数。被除数x 20873: // <4(a7).l:32bit符号あり整数。除数y 20874: // >(a7).l:32bit符号あり整数。余りx%y。ゼロ除算のときは不定 20875: // >ccr:cs=ゼロ除算。C以外は不定 20876: public static void fpkCLMOD () throws M68kException { 20877: int a7 = XEiJ.regRn[15]; 20878: int h = mmuReadLongData (a7 + 4, 1); 20879: if (h == 0) { 20880: //(a7).lは変化しない 20881: XEiJ.regCCR = XEiJ.REG_CCR_C; 20882: } else { 20883: mmuWriteLongData (a7, mmuReadLongData (a7, 1) % h, 1); 20884: XEiJ.regCCR = 0; 20885: } 20886: } //fpkCLMOD() 20887: 20888: //fpkCUMUL () 20889: // $FEE3 __CUMUL 20890: // 32bit符号なし整数乗算 20891: // <(a7).l:32bit符号なし整数。被乗数x 20892: // <4(a7).l:32bit符号なし整数。乗数y 20893: // >(a7).l:32bit符号なし整数。積x*y。オーバーフローのときは不定 20894: // >ccr:cs=オーバーフロー。C以外は不定 20895: public static void fpkCUMUL () throws M68kException { 20896: int a7 = XEiJ.regRn[15]; 20897: long l = (0xffffffffL & mmuReadLongData (a7, 1)) * (0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20898: int h = (int) l; 20899: mmuWriteLongData (a7, h, 1); 20900: XEiJ.regCCR = (0xffffffffL & h) == l ? 0 : XEiJ.REG_CCR_C; 20901: } //fpkCUMUL() 20902: 20903: //fpkCUDIV () 20904: // $FEE4 __CUDIV 20905: // 32bit符号なし整数除算 20906: // <(a7).l:32bit符号なし整数。被除数x 20907: // <4(a7).l:32bit符号なし整数。除数y 20908: // >(a7).l:32bit符号なし整数。商x/y。ゼロ除算のときは不定 20909: // >ccr:cs=ゼロ除算。C以外は不定 20910: public static void fpkCUDIV () throws M68kException { 20911: int a7 = XEiJ.regRn[15]; 20912: int h = mmuReadLongData (a7 + 4, 1); 20913: if (h == 0) { 20914: //(a7).lは変化しない 20915: XEiJ.regCCR = XEiJ.REG_CCR_C; 20916: } else { 20917: mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) / (0xffffffffL & h)), 1); 20918: XEiJ.regCCR = 0; 20919: } 20920: } //fpkCUDIV() 20921: 20922: //fpkCUMOD () 20923: // $FEE5 __CUMOD 20924: // 32bit符号なし整数剰余算 20925: // <(a7).l:32bit符号なし整数。被除数x 20926: // <4(a7).l:32bit符号なし整数。除数y 20927: // >(a7).l:32bit符号なし整数。余りx%y。ゼロ除算のときは不定 20928: // >ccr:cs=ゼロ除算。C以外は不定 20929: public static void fpkCUMOD () throws M68kException { 20930: int a7 = XEiJ.regRn[15]; 20931: int h = mmuReadLongData (a7 + 4, 1); 20932: if (h == 0) { 20933: //(a7).lは変化しない 20934: XEiJ.regCCR = XEiJ.REG_CCR_C; 20935: } else { 20936: mmuWriteLongData (a7, (int) ((0xffffffffL & mmuReadLongData (a7, 1)) % (0xffffffffL & h)), 1); 20937: XEiJ.regCCR = 0; 20938: } 20939: } //fpkCUMOD() 20940: 20941: //fpkCLTOD () 20942: // $FEE6 __CLTOD 20943: // 32bit符号あり整数を64bit浮動小数点数に変換する 20944: // <(a7).l:32bit符号あり整数。x 20945: // >(a7).d:64bit浮動小数点数。(double)x 20946: public static void fpkCLTOD () throws M68kException { 20947: //int→double→[long]→[int,int] 20948: int a7 = XEiJ.regRn[15]; 20949: long l = Double.doubleToLongBits ((double) mmuReadLongData (a7, 1)); 20950: mmuWriteLongData (a7, (int) (l >>> 32), 1); 20951: mmuWriteLongData (a7 + 4, (int) l, 1); 20952: } //fpkCLTOD() 20953: 20954: //fpkCDTOL () 20955: // $FEE7 __CDTOL 20956: // 64bit浮動小数点数を32bit符号あり整数に変換する 20957: // <(a7).d:64bit浮動小数点数。x 20958: // >(a7).l:32bit符号あり整数。(int)x 20959: // >ccr:cs=オーバーフロー。C以外は不定 20960: public static void fpkCDTOL () throws M68kException { 20961: //[int,int]→[long]→double→int 20962: int a7 = XEiJ.regRn[15]; 20963: double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 20964: mmuWriteLongData (a7, (int) d, 1); //オーバーフローのときは最小値または最大値 20965: XEiJ.regCCR = (double) Integer.MIN_VALUE - 1.0 < d && d < (double) Integer.MAX_VALUE + 1.0 ? 0 : XEiJ.REG_CCR_C; //NaN,±Infはエラー 20966: } //fpkCDTOL() 20967: 20968: //fpkCLTOF () 20969: // $FEE8 __CLTOF 20970: // 32bit符号あり整数を32bit浮動小数点数に変換する 20971: // <(a7).l:32bit符号あり整数。x 20972: // >(a7).s:32bit浮動小数点数。(float)x 20973: public static void fpkCLTOF () throws M68kException { 20974: //int→float→[int] 20975: int a7 = XEiJ.regRn[15]; 20976: mmuWriteLongData (a7, Float.floatToIntBits ((float) mmuReadLongData (a7, 1)), 1); 20977: } //fpkCLTOF() 20978: 20979: //fpkCFTOL () 20980: // $FEE9 __CFTOL 20981: // 32bit浮動小数点数を32bit符号あり整数に変換する 20982: // <(a7).s:32bit浮動小数点数。x 20983: // >(a7).l:32bit符号あり整数。(int)x 20984: // >ccr:cs=オーバーフロー。C以外は不定 20985: public static void fpkCFTOL () throws M68kException { 20986: //[int]→float→int 20987: int a7 = XEiJ.regRn[15]; 20988: float f = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 20989: mmuWriteLongData (a7, (int) f, 1); 20990: XEiJ.regCCR = (float) Integer.MIN_VALUE - 1.0F < f && f < (float) Integer.MAX_VALUE + 1.0F ? 0 : XEiJ.REG_CCR_C; //NaN,±Infはエラー 20991: } //fpkCFTOL() 20992: 20993: //fpkCFTOD () 20994: // $FEEA __CFTOD 20995: // 32bit浮動小数点数を64bit浮動小数点数に変換する 20996: // <(a7).s:32bit浮動小数点数。x 20997: // >(a7).d:64bit浮動小数点数。(double)x 20998: public static void fpkCFTOD () throws M68kException { 20999: //[int]→float→double→[long]→[int,int] 21000: int a7 = XEiJ.regRn[15]; 21001: long l = Double.doubleToLongBits ((double) Float.intBitsToFloat (mmuReadLongData (a7, 1))); 21002: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21003: l = 0x7fffffffffffffffL; 21004: } 21005: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21006: mmuWriteLongData (a7 + 4, (int) l, 1); 21007: } //fpkCFTOD() 21008: 21009: //fpkCDTOF () 21010: // $FEEB __CDTOF 21011: // 64bit浮動小数点数を32bit浮動小数点数に変換する 21012: // <(a7).d:64bit浮動小数点数。x 21013: // >(a7).s:32bit浮動小数点数。(float)x 21014: // >ccr:cs=オーバーフロー。C以外は不定 21015: public static void fpkCDTOF () throws M68kException { 21016: //[int,int]→[long]→double→float→[int] 21017: int a7 = XEiJ.regRn[15]; 21018: double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21019: int h = Float.floatToIntBits ((float) d); 21020: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21021: h = 0x7fffffff; 21022: } 21023: mmuWriteLongData (a7, h, 1); 21024: XEiJ.regCCR = (Double.isNaN (d) || Double.isInfinite (d) || 21025: Math.abs (d) < (double) Float.MAX_VALUE + 0.5 * (double) Math.ulp (Float.MAX_VALUE) ? 0 : XEiJ.REG_CCR_C); //アンダーフローはエラーなし 21026: } //fpkCDTOF() 21027: 21028: //fpkCDCMP () 21029: // $FEEC __CDCMP 21030: // 64bit浮動小数点数の比較 21031: // x<=>y 21032: // <(a7).d:64bit浮動小数点数。x 21033: // <8(a7).d:64bit浮動小数点数。y 21034: // >ccr:lt=x<y,eq=x==y,gt=x>y 21035: public static void fpkCDCMP () throws M68kException { 21036: //([int,int]→[long]→double)<=>([int,int]→[long]→double) 21037: int a7 = XEiJ.regRn[15]; 21038: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21039: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21040: XEiJ.regCCR = xd < yd ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xd == yd ? XEiJ.REG_CCR_Z : 0; //どちらかがNaNのときは0 21041: } //fpkCDCMP() 21042: 21043: //fpkCDADD () 21044: // $FEED __CDADD 21045: // 64bit浮動小数点数の加算 21046: // <(a7).d:64bit浮動小数点数。被加算数x 21047: // <8(a7).d:64bit浮動小数点数。加算数y 21048: // >(a7).d:64bit浮動小数点数。和x+y 21049: // >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー 21050: public static void fpkCDADD () throws M68kException { 21051: //([int,int]→[long]→double)+([int,int]→[long]→double)→[long]→[int,int] 21052: int a7 = XEiJ.regRn[15]; 21053: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21054: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21055: double zd = xd + yd; 21056: long l = Double.doubleToLongBits (zd); 21057: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21058: l = 0x7fffffffffffffffL; 21059: } 21060: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21061: mmuWriteLongData (a7 + 4, (int) l, 1); 21062: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 21063: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN 21064: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 21065: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21066: 0); 21067: } //fpkCDADD() 21068: 21069: //fpkCDSUB () 21070: // $FEEE __CDSUB 21071: // 64bit浮動小数点数の減算 21072: // <(a7).d:64bit浮動小数点数。被減算数x 21073: // <8(a7).d:64bit浮動小数点数。減算数y 21074: // >(a7).d:64bit浮動小数点数。差x-y 21075: // >ccr:cs=エラー,vs=オーバーフロー 21076: public static void fpkCDSUB () throws M68kException { 21077: //([int,int]→[long]→double)-([int,int]→[long]→double)→[long]→[int,int] 21078: int a7 = XEiJ.regRn[15]; 21079: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21080: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21081: double zd = xd - yd; 21082: long l = Double.doubleToLongBits (zd); 21083: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21084: l = 0x7fffffffffffffffL; 21085: } 21086: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21087: mmuWriteLongData (a7 + 4, (int) l, 1); 21088: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 21089: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN 21090: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 21091: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21092: 0); 21093: } //fpkCDSUB() 21094: 21095: //fpkCDMUL () 21096: // $FEEF __CDMUL 21097: // 64bit浮動小数点数の乗算 21098: // <(a7).d:64bit浮動小数点数。被乗数x 21099: // <8(a7).d:64bit浮動小数点数。乗数y 21100: // >(a7).d:64bit浮動小数点数。積x*y 21101: // >ccr:cs=エラー,vs=オーバーフロー 21102: public static void fpkCDMUL () throws M68kException { 21103: //([int,int]→[long]→double)*([int,int]→[long]→double)→[long]→[int,int] 21104: int a7 = XEiJ.regRn[15]; 21105: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21106: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21107: double zd = xd * yd; 21108: long l = Double.doubleToLongBits (zd); 21109: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21110: l = 0x7fffffffffffffffL; 21111: } 21112: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21113: mmuWriteLongData (a7 + 4, (int) l, 1); 21114: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 21115: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN 21116: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 21117: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21118: 0); 21119: } //fpkCDMUL() 21120: 21121: //fpkCDDIV () 21122: // $FEF0 __CDDIV 21123: // 64bit浮動小数点数の除算 21124: // <(a7).d:64bit浮動小数点数。被除数x 21125: // <8(a7).d:64bit浮動小数点数。除数y 21126: // >(a7).d:64bit浮動小数点数。商x/y。ゼロ除算のときは不定 21127: // >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー 21128: public static void fpkCDDIV () throws M68kException { 21129: //([int,int]→[long]→double)/([int,int]→[long]→double)→[long]→[int,int] 21130: int a7 = XEiJ.regRn[15]; 21131: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21132: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21133: double zd = xd / yd; 21134: long l = Double.doubleToLongBits (zd); 21135: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21136: l = 0x7fffffffffffffffL; 21137: } 21138: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21139: mmuWriteLongData (a7 + 4, (int) l, 1); 21140: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 21141: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN 21142: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf。(±Inf)/(±0)=(±Inf) 21143: yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が±0のときはゼロ除算 21144: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21145: 0); 21146: } //fpkCDDIV() 21147: 21148: //fpkCDMOD () 21149: // $FEF1 __CDMOD 21150: // 64bit浮動小数点数の剰余算 21151: // <(a7).d:64bit浮動小数点数。被除数x 21152: // <8(a7).d:64bit浮動小数点数。除数y 21153: // >(a7).d:64bit浮動小数点数。余りx%y。ゼロ除算のときは不定 21154: // >ccr:cs=エラー,eq=ゼロ除算 21155: public static void fpkCDMOD () throws M68kException { 21156: //([int,int]→[long]→double)%([int,int]→[long]→double)→[long]→[int,int] 21157: int a7 = XEiJ.regRn[15]; 21158: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21159: double yd = Double.longBitsToDouble ((long) mmuReadLongData (a7 + 8, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 12, 1)); 21160: double zd = xd % yd; 21161: long l = Double.doubleToLongBits (zd); 21162: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21163: l = 0x7fffffffffffffffL; 21164: } 21165: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21166: mmuWriteLongData (a7 + 4, (int) l, 1); 21167: XEiJ.regCCR = (Double.isNaN (xd) || Double.isNaN (yd) ? 0 : //引数がNaN 21168: yd == 0.0 ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf) 21169: Double.isNaN (zd) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN 21170: Double.isInfinite (xd) || Double.isInfinite (yd) ? 0 : //引数が±Inf 21171: Double.isInfinite (zd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21172: 0); 21173: } //fpkCDMOD() 21174: 21175: //fpkCFCMP () 21176: // $FEF2 __CFCMP 21177: // 32bit浮動小数点数の比較 21178: // x<=>y 21179: // <(a7).s:32bit浮動小数点数。x 21180: // <(a7).s:32bit浮動小数点数。y 21181: // >ccr:lt=x<y,eq=x==y,gt=x>y 21182: public static void fpkCFCMP () throws M68kException { 21183: //([int]→float)<=>([int]→float) 21184: int a7 = XEiJ.regRn[15]; 21185: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21186: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21187: XEiJ.regCCR = xf < yf ? XEiJ.REG_CCR_N | XEiJ.REG_CCR_C : xf == yf ? XEiJ.REG_CCR_Z : 0; //どちらかがNaNのときは0 21188: } //fpkCFCMP() 21189: 21190: //fpkCFADD () 21191: // $FEF3 __CFADD 21192: // 32bit浮動小数点数の加算 21193: // <(a7).s:32bit浮動小数点数。被加算数x 21194: // <4(a7).s:32bit浮動小数点数。加算数y 21195: // >(a7).s:32bit浮動小数点数。和x+y 21196: // >ccr:cs=エラー,vs=オーバーフロー 21197: public static void fpkCFADD () throws M68kException { 21198: //([int]→float)+([int]→float)→[int] 21199: int a7 = XEiJ.regRn[15]; 21200: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21201: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21202: float zf = xf + yf; 21203: int h = Float.floatToIntBits (zf); 21204: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21205: h = 0x7fffffff; 21206: } 21207: mmuWriteLongData (a7, h, 1); 21208: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21209: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)+(-Inf)=NaN 21210: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21211: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21212: 0); 21213: } //fpkCFADD() 21214: 21215: //fpkCFSUB () 21216: // $FEF4 __CFSUB 21217: // 32bit浮動小数点数の減算 21218: // <(a7).s:32bit浮動小数点数。被減算数x 21219: // <4(a7).s:32bit浮動小数点数。減算数y 21220: // >(a7).s:32bit浮動小数点数。差x-y 21221: // >ccr:cs=エラー,vs=オーバーフロー 21222: public static void fpkCFSUB () throws M68kException { 21223: //([int]→float)-([int]→float)→[int] 21224: int a7 = XEiJ.regRn[15]; 21225: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21226: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21227: float zf = xf - yf; 21228: int h = Float.floatToIntBits (zf); 21229: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21230: h = 0x7fffffff; 21231: } 21232: mmuWriteLongData (a7, h, 1); 21233: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21234: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(+Inf)-(+Inf)=NaN 21235: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21236: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21237: 0); 21238: } //fpkCFSUB() 21239: 21240: //fpkCFMUL () 21241: // $FEF5 __CFMUL 21242: // 32bit浮動小数点数の乗算 21243: // <(a7).s:32bit浮動小数点数。被乗数x 21244: // <4(a7).s:32bit浮動小数点数。乗数y 21245: // >(a7).s:32bit浮動小数点数。積x*y 21246: // >ccr:0=エラーなし,CCR_C=アンダーフロー,CCR_V|CCR_C=オーバーフロー 21247: public static void fpkCFMUL () throws M68kException { 21248: //([int]→float)*([int]→float)→[int] 21249: int a7 = XEiJ.regRn[15]; 21250: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21251: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21252: float zf = xf * yf; 21253: int h = Float.floatToIntBits (zf); 21254: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21255: h = 0x7fffffff; 21256: } 21257: mmuWriteLongData (a7, h, 1); 21258: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21259: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)*(±Inf)=NaN 21260: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21261: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21262: 0); 21263: } //fpkCFMUL() 21264: 21265: //fpkCFDIV () 21266: // $FEF6 __CFDIV 21267: // 32bit浮動小数点数の除算 21268: // <(a7).s:32bit浮動小数点数。被除数x 21269: // <4(a7).s:32bit浮動小数点数。除数y 21270: // >(a7).s:32bit浮動小数点数。商x/y。ゼロ除算のときは不定 21271: // >ccr:cs=エラー,eq=ゼロ除算,vs=オーバーフロー 21272: public static void fpkCFDIV () throws M68kException { 21273: //([int]→float)/([int]→float)→[int] 21274: int a7 = XEiJ.regRn[15]; 21275: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21276: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21277: float zf = xf / yf; 21278: int h = Float.floatToIntBits (zf); 21279: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21280: h = 0x7fffffff; 21281: } 21282: mmuWriteLongData (a7, h, 1); 21283: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21284: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±0)/(±0)=NaN 21285: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf。(±Inf)/(±0)=(±Inf) 21286: yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が±0のときはゼロ除算 21287: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21288: 0); 21289: } //fpkCFDIV() 21290: 21291: //fpkCFMOD () 21292: // $FEF7 __CFMOD 21293: // 32bit浮動小数点数の剰余算 21294: // <(a7).s:32bit浮動小数点数。被除数x 21295: // <4(a7).s:32bit浮動小数点数。除数y 21296: // >(a7).s:32bit浮動小数点数。余りx%y。ゼロ除算のときは不定 21297: // >ccr:cs=エラー,eq=ゼロ除算 21298: public static void fpkCFMOD () throws M68kException { 21299: //([int]→float)%([int]→float)→[int] 21300: int a7 = XEiJ.regRn[15]; 21301: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21302: float yf = Float.intBitsToFloat (mmuReadLongData (a7 + 4, 1)); 21303: float zf = xf % yf; 21304: int h = Float.floatToIntBits (zf); 21305: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21306: h = 0x7fffffff; 21307: } 21308: mmuWriteLongData (a7, h, 1); 21309: XEiJ.regCCR = (Float.isNaN (xf) || Float.isNaN (yf) ? 0 : //引数がNaN 21310: yf == 0.0F ? XEiJ.REG_CCR_Z | XEiJ.REG_CCR_C : //除数が0のときはゼロ除算。(±Inf)%(±0)=NaN, x%(±0)=(±Inf) 21311: Float.isNaN (zf) ? XEiJ.REG_CCR_C : //引数がNaNでないのに結果がNaNのときはエラー。(±Inf)%y=NaN 21312: Float.isInfinite (xf) || Float.isInfinite (yf) ? 0 : //引数が±Inf 21313: Float.isInfinite (zf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : //引数が±Infでないのに結果が±Infのときはオーバーフロー 21314: 0); 21315: } //fpkCFMOD() 21316: 21317: //fpkCDTST () 21318: // $FEF8 __CDTST 21319: // 64bit浮動小数点数と0の比較 21320: // x<=>0 21321: // <(a7).d:64bit浮動小数点数。x 21322: // >ccr:lt=x<0,eq=x==0,gt=x>0 21323: public static void fpkCDTST () throws M68kException { 21324: if (true) { 21325: int a7 = XEiJ.regRn[15]; 21326: long l = (long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1); 21327: XEiJ.regCCR = l << 1 == 0L ? XEiJ.REG_CCR_Z : 0L <= l ? 0 : XEiJ.REG_CCR_N; //NaNのときは0 21328: } else { 21329: //[int,int]→[long]→double 21330: int a7 = XEiJ.regRn[15]; 21331: double d = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21332: XEiJ.regCCR = d < 0.0 ? XEiJ.REG_CCR_N : d == 0.0 ? XEiJ.REG_CCR_Z : 0; //NaNのときは0 21333: } 21334: } //fpkCDTST() 21335: 21336: //fpkCFTST () 21337: // $FEF9 __CFTST 21338: // 32bit浮動小数点数と0の比較 21339: // x<=>0 21340: // <(a7).s:32bit浮動小数点数。x 21341: // >ccr:lt=x<0,eq=x==0,gt=x>0 21342: public static void fpkCFTST () throws M68kException { 21343: //[int]→float 21344: if (true) { 21345: int h = mmuReadLongData (XEiJ.regRn[15], 1); 21346: XEiJ.regCCR = h << 1 == 0 ? XEiJ.REG_CCR_Z : 0 <= h ? 0 : XEiJ.REG_CCR_N; //NaNのときは0 21347: } else { 21348: //([int]→float)<=>0 21349: float f = Float.intBitsToFloat (mmuReadLongData (XEiJ.regRn[15], 1)); 21350: XEiJ.regCCR = f < 0.0F ? XEiJ.REG_CCR_N : f == 0.0F ? XEiJ.REG_CCR_Z : 0; //NaNのときは0 21351: } 21352: } //fpkCFTST() 21353: 21354: //fpkCDINC () 21355: // $FEFA __CDINC 21356: // 64bit浮動小数点数に1を加える 21357: // <(a7).d:64bit浮動小数点数。x 21358: // >(a7).d:64bit浮動小数点数。x+1 21359: public static void fpkCDINC () throws M68kException { 21360: //([int,int]→[long]→double)+1→[long]→[int,int] 21361: int a7 = XEiJ.regRn[15]; 21362: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21363: double zd = xd + 1.0; 21364: long l = Double.doubleToLongBits (zd); 21365: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21366: l = 0x7fffffffffffffffL; 21367: } 21368: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21369: mmuWriteLongData (a7 + 4, (int) l, 1); 21370: XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21371: } //fpkCDINC() 21372: 21373: //fpkCFINC () 21374: // $FEFB __CFINC 21375: // 32bit浮動小数点数に1を加える 21376: // <(a7).s:32bit浮動小数点数。x 21377: // >(a7).s:32bit浮動小数点数。x+1 21378: public static void fpkCFINC () throws M68kException { 21379: //([int]→float)+1→[int] 21380: int a7 = XEiJ.regRn[15]; 21381: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21382: float zf = xf + 1.0F; 21383: int h = Float.floatToIntBits (zf); 21384: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21385: h = 0x7fffffff; 21386: } 21387: mmuWriteLongData (a7, h, 1); 21388: XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21389: } //fpkCFINC() 21390: 21391: //fpkCDDEC () 21392: // $FEFC __CDDEC 21393: // 64bit浮動小数点数から1を引く 21394: // <(a7).d:64bit浮動小数点数。x 21395: // >(a7).d:64bit浮動小数点数。x-1 21396: public static void fpkCDDEC () throws M68kException { 21397: //([int,int]→[long]→double)-1→[long]→[int,int] 21398: int a7 = XEiJ.regRn[15]; 21399: double xd = Double.longBitsToDouble ((long) mmuReadLongData (a7, 1) << 32 | 0xffffffffL & mmuReadLongData (a7 + 4, 1)); 21400: double zd = xd - 1.0; 21401: long l = Double.doubleToLongBits (zd); 21402: if (FEFunction.FPK_FPCP_NAN && l == 0x7ff8000000000000L) { 21403: l = 0x7fffffffffffffffL; 21404: } 21405: mmuWriteLongData (a7, (int) (l >>> 32), 1); 21406: mmuWriteLongData (a7 + 4, (int) l, 1); 21407: XEiJ.regCCR = Double.isInfinite (zd) && !Double.isInfinite (xd) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21408: } //fpkCDDEC() 21409: 21410: //fpkCFDEC () 21411: // $FEFD __CFDEC 21412: // 32bit浮動小数点数から1を引く 21413: // <(a7).s:32bit浮動小数点数。x 21414: // >(a7).s:32bit浮動小数点数。x-1 21415: public static void fpkCFDEC () throws M68kException { 21416: //([int]→float)-1→[int] 21417: int a7 = XEiJ.regRn[15]; 21418: float xf = Float.intBitsToFloat (mmuReadLongData (a7, 1)); 21419: float zf = xf - 1.0F; 21420: int h = Float.floatToIntBits (zf); 21421: if (FEFunction.FPK_FPCP_NAN && h == 0x7fc00000) { 21422: h = 0x7fffffff; 21423: } 21424: mmuWriteLongData (a7, h, 1); 21425: XEiJ.regCCR = Double.isInfinite (zf) && !Float.isInfinite (xf) ? XEiJ.REG_CCR_V | XEiJ.REG_CCR_C : 0; //結果が±Infだが引数が±Infでないときはオーバーフロー 21426: } //fpkCFDEC() 21427: 21428: 21429: 21430: //======================================================================================== 21431: //$$MMU メモリ管理ユニット 21432: 21433: public static final boolean MMU_DEBUG_COMMAND = false; 21434: public static final boolean MMU_DEBUG_TRANSLATION = false; 21435: public static final boolean MMU_NOT_ALLOCATE_CACHE = false; //true=アドレス変換キャッシュをアロケートしない 21436: 21437: //-------------------------------------------------------------------------------- 21438: //論理アドレスと物理アドレス 21439: // 21440: // ページサイズが4KBの場合 21441: // ┌── 7 ──┬── 7 ──┬── 6──┬─────12─────┐ 21442: // 31 2524 1817 1211 0 21443: // ┏━━━━━━┯━━━━━━┯━━━━━┯━━━━━━━━━━━┓ 21444: // 論理 ┃ ルート │ ポインタ │ ページ │ ページ ┃ 21445: // アドレス┃インデックス│インデックス インデックス オフセット ┃ 21446: // ┗━━↓━━━┷━━↓━━━┷━━↓━━┷━━━━━↓━━━━━┛ 21447: // ┌────┘ │ └────┐ └──────┐ 21448: // │ ルートテーブル │ ポインタテーブル │ ページテーブル │ 21449: // ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│ 21450: // ││ 0┃ ┃││ 0┃ ┃││ 0┃ ┃│ 21451: // ││ ┃ ┃││ ┃ ┃│└→┠───────┨│ 21452: // │└→┠───────┨││ ┃ ┃│ ┃ ページ ┃│ 21453: // ルート ┃ ルート ┃│└→┠───────┨│┌─← デスクリプタ ┃│ 21454: // ポインタ ┃ デスクリプタ →┘ ┃ ポインタ ┃││ ┠───────┨│ 21455: // ┠───────┨ ┃ デスクリプタ →┘│63┃ ┃│ 21456: // ┃ ┃ ┠───────┨ │ ┗━━━━━━━┛│ 21457: // 127┃ ┃ 127┃ ┃ │ │ 21458: // ┗━━━━━━━┛ ┗━━━━━━━┛ │ │ 21459: // ┌───────────┘ ┌──────┘ 21460: // ┏━━━━━━━━━↓━━━━━━━━━┯━━━━━↓━━━━━┓ 21461: // 物理 ┃ 物理ページ │ ページ ┃ 21462: // アドレス┃ アドレス │ オフセット ┃ 21463: // ┗━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━┛ 21464: // 31 1211 0 21465: // └─────────20─────────┴─────12─────┘ 21466: // 21467: // ページサイズが8KBの場合 21468: // ┌── 7 ──┬── 7 ──┬─ 5 ─┬───── 13 ─────┐ 21469: // 31 2524 1817 1312 0 21470: // ┏━━━━━━┯━━━━━━┯━━━━┯━━━━━━━━━━━━┓ 21471: // 論理 ┃ ルート │ ポインタ │ ページ │ ページ ┃ 21472: // アドレス┃インデックス│インデックスインデックス オフセット ┃ 21473: // ┗━━↓━━━┷━━↓━━━┷━━↓━┷━━━━━━↓━━━━━┛ 21474: // ┌────┘ │ └────┐ └──────┐ 21475: // │ ルートテーブル │ ポインタテーブル │ ページテーブル │ 21476: // ┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓┌┼→┏━━━━━━━┓│ 21477: // ││ 0┃ ┃││ 0┃ ┃││ 0┃ ┃│ 21478: // ││ ┃ ┃││ ┃ ┃│└→┠───────┨│ 21479: // │└→┠───────┨││ ┃ ┃│ ┃ ページ ┃│ 21480: // ルート ┃ ルート ┃│└→┠───────┨│┌─← デスクリプタ ┃│ 21481: // ポインタ ┃ デスクリプタ →┘ ┃ ポインタ ┃││ ┠───────┨│ 21482: // ┠───────┨ ┃ デスクリプタ →┘│31┃ ┃│ 21483: // ┃ ┃ ┠───────┨ │ ┗━━━━━━━┛│ 21484: // 127┃ ┃ 127┃ ┃ │ │ 21485: // ┗━━━━━━━┛ ┗━━━━━━━┛ │ │ 21486: // ┌───────────┘ ┌──────┘ 21487: // ┏━━━━━━━━━↓━━━━━━━━┯━━━━━━↓━━━━━┓ 21488: // 物理 ┃ 物理ページ │ ページ ┃ 21489: // アドレス┃ アドレス │ オフセット ┃ 21490: // ┗━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━┛ 21491: // 31 1312 0 21492: // └──────── 19 ────────┴───── 13 ─────┘ 21493: // 21494: public static final int MMU_ROOT_INDEX_BIT0 = 25; 21495: public static final int MMU_POINTER_INDEX_BIT0 = 18; 21496: public static final int MMU_PAGE_INDEX_BIT0_4KB = 12; 21497: public static final int MMU_PAGE_INDEX_BIT0_8KB = 13; 21498: public static final int MMU_PAGE_SIZE_4KB = 1 << MMU_PAGE_INDEX_BIT0_4KB; 21499: public static final int MMU_PAGE_SIZE_8KB = 1 << MMU_PAGE_INDEX_BIT0_8KB; 21500: // 33222222_22221111_111111 21501: // 10987654_32109876_54321098_76543210 21502: public static final int MMU_ROOT_INDEX_MASK = 0b11111110_00000000_00000000_00000000; 21503: public static final int MMU_POINTER_INDEX_MASK = 0b00000001_11111100_00000000_00000000; 21504: public static final int MMU_PAGE_INDEX_MASK_4KB = 0b00000000_00000011_11110000_00000000; 21505: public static final int MMU_PAGE_INDEX_MASK_8KB = 0b00000000_00000011_11100000_00000000; 21506: public static final int MMU_PAGE_OFFSET_MASK_4KB = 0b00000000_00000000_00001111_11111111; 21507: public static final int MMU_PAGE_OFFSET_MASK_8KB = 0b00000000_00000000_00011111_11111111; 21508: public static final int MMU_PAGE_ADDRESS_MASK_4KB = 0b11111111_11111111_11110000_00000000; 21509: public static final int MMU_PAGE_ADDRESS_MASK_8KB = 0b11111111_11111111_11100000_00000000; 21510: 21511: //-------------------------------------------------------------------------------- 21512: //透過変換レジスタ 21513: // 21514: // DTT0 データ透過変換レジスタ0 21515: // DTT1 データ透過変換レジスタ1 21516: // ITT0 命令透過変換レジスタ0 21517: // ITT1 命令透過変換レジスタ1 21518: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21519: // ┏━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━┯━┯━┯━┯━━━━━┯━┯━┯━┯━━━┯━━━┯━┯━━━┓ 21520: // ┃ 論理アドレスベース │ 論理アドレスマスク │ E│IS│US│ 0 │U1│U0│ 0│ CM │ 0 │ W│ 0 ┃ 21521: // ┗━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━┷━┷━┷━┷━━━━━┷━┷━┷━┷━━━┷━━━┷━┷━━━┛ 21522: public static final int MMU_TTR_BASE = 255 << 24; //x Logical Address Base 21523: public static final int MMU_TTR_MASK = 255 << 16; //x Logical Address Mask 21524: public static final int MMU_TTR_ENABLE = 1 << 15; //x E Enable 21525: public static final int MMU_TTR_IGNORE_FC2 = 1 << 14; //x IS Ignore FC2 when matching 21526: public static final int MMU_TTR_USER_SUPERVISOR = 1 << 13; //x US User or Supervisor when IS=0 21527: public static final int MMU_TTR_US_USER = 0 << 13; // Match only if FC2=0 (user mode access) 21528: public static final int MMU_TTR_US_SUPERVISOR = 1 << 13; // Match only if FC2=1 (supervisor mode access) 21529: public static final int MMU_TTR_CACHE_MODE = 3 << 5; //x CM Cache Mode 21530: public static final int MMU_TTR_WRITE_PROTECT = 1 << 2; //x W Write Protect 21531: public static int mmuDTT0; //DTT0 21532: public static int mmuDTT1; //DTT1 21533: public static int mmuITT0; //ITT0 21534: public static int mmuITT1; //ITT1 21535: // 透過変換マップ 21536: // インデックス 21537: // a >>> 24 21538: // 値 21539: // bit7 W 0 ライトプロテクトなし 21540: // 1 ライトプロテクトあり。ライトのときアクセスフォルト 21541: // bit6-5 CM 00 ライトスルー 21542: // 01 コピーバック 21543: // 10 プリサイズ 21544: // 11 インプリサイズ 21545: // bit0 E 0 透過変換なし。他のビットも0 21546: // 1 透過変換あり 21547: public static byte[] mmuTTUserData1; //ユーザデータ透過変換マップ 21548: public static byte[] mmuTTUserCode1; //ユーザ命令透過変換マップ 21549: public static byte[] mmuTTSuperData1; //スーパーバイザデータ透過変換マップ 21550: public static byte[] mmuTTSuperCode1; //スーパーバイザ命令透過変換マップ 21551: public static byte[] mmuTTUserData2; 21552: public static byte[] mmuTTUserCode2; 21553: public static byte[] mmuTTSuperData2; 21554: public static byte[] mmuTTSuperCode2; 21555: 21556: //d = mmuGetDTT0 () 21557: // DTT0を読む 21558: public static int mmuGetDTT0 () { 21559: return mmuDTT0; 21560: } //mmuGetDTT0() 21561: 21562: //d = mmuGetDTT1 () 21563: // DTT1を読む 21564: public static int mmuGetDTT1 () { 21565: return mmuDTT1; 21566: } //mmuGetDTT1() 21567: 21568: //d = mmuGetITT0 () 21569: // ITT0を読む 21570: public static int mmuGetITT0 () { 21571: return mmuITT0; 21572: } //mmuGetITT0() 21573: 21574: //d = mmuGetITT1 () 21575: // ITT1を読む 21576: public static int mmuGetITT1 () { 21577: return mmuITT1; 21578: } //mmuGetITT1() 21579: 21580: //mmuSetDTT0 (d) 21581: // DTT0に書く 21582: public static void mmuSetDTT0 (int d) { 21583: mmuTTSetData (d, mmuDTT1); 21584: if (MMU_DEBUG_COMMAND) { 21585: System.out.printf ("%08x mmuSetDTT0(0x%08x)\n", XEiJ.regPC0, mmuDTT0); 21586: } 21587: } //mmuSetDTT0(int) 21588: 21589: //mmuSetDTT1 (d) 21590: // DTT1に書く 21591: public static void mmuSetDTT1 (int d) { 21592: mmuTTSetData (mmuDTT0, d); 21593: if (MMU_DEBUG_COMMAND) { 21594: System.out.printf ("%08x mmuSetDTT1(0x%08x)\n", XEiJ.regPC0, mmuDTT1); 21595: } 21596: } //mmuSetDTT1(int) 21597: 21598: //mmuTTSetData (d0, d1) 21599: // DTT0,DTT1に書く 21600: // データ透過変換マップを更新する 21601: public static void mmuTTSetData (int d0, int d1) { 21602: mmuDTT0 = d0 & 0xffffe364; 21603: mmuDTT1 = d1 & 0xffffe364; 21604: //1と2を入れ換える 21605: { 21606: byte[] t = mmuTTUserData1; 21607: mmuTTUserData1 = mmuTTUserData2; 21608: mmuTTUserData2 = t; 21609: t = mmuTTSuperData1; 21610: mmuTTSuperData1 = mmuTTSuperData2; 21611: mmuTTSuperData2 = t; 21612: } 21613: //1に構築する 21614: // DTT0とDTT1の両方がヒットしたときDTT0を用いるため、DTT1→DTT0の順に書き込む 21615: // DTT1でライトプロテクトされていてもDTT0でライトプロテクトされていなければ書き込める 21616: Arrays.fill (mmuTTUserData1, (byte) 0); //透過変換なし 21617: Arrays.fill (mmuTTSuperData1, (byte) 0); //透過変換なし 21618: if ((short) mmuDTT1 < 0) { //MMU_TTR_ENABLE。DTT1が有効 21619: int mask = ~mmuDTT1 >>> 16 & 255; 21620: int base = mmuDTT1 >>> 24 & mask; 21621: int flag = ((mmuDTT1 & MMU_TTR_WRITE_PROTECT) << (7 - 2) | 21622: (mmuDTT1 & MMU_TTR_CACHE_MODE) | 21623: 1); 21624: if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 || 21625: (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21626: for (int block = 0; block < 256; block++) { 21627: if ((block & mask) == base) { 21628: mmuTTUserData1[block] = (byte) flag; 21629: } 21630: } 21631: } 21632: if ((mmuDTT1 & MMU_TTR_IGNORE_FC2) != 0 || 21633: (mmuDTT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21634: for (int block = 0; block < 256; block++) { 21635: if ((block & mask) == base) { 21636: mmuTTSuperData1[block] = (byte) flag; 21637: } 21638: } 21639: } 21640: } 21641: if ((short) mmuDTT0 < 0) { //MMU_TTR_ENABLE。DTT0が有効 21642: int mask = ~mmuDTT0 >>> 16 & 255; 21643: int base = mmuDTT0 >>> 24 & mask; 21644: int flag = ((mmuDTT0 & MMU_TTR_WRITE_PROTECT) << (7 - 2) | 21645: (mmuDTT0 & MMU_TTR_CACHE_MODE) | 21646: 1); 21647: if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 || 21648: (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21649: for (int block = 0; block < 256; block++) { 21650: if ((block & mask) == base) { 21651: mmuTTUserData1[block] = (byte) flag; 21652: } 21653: } 21654: } 21655: if ((mmuDTT0 & MMU_TTR_IGNORE_FC2) != 0 || 21656: (mmuDTT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21657: for (int block = 0; block < 256; block++) { 21658: if ((block & mask) == base) { 21659: mmuTTSuperData1[block] = (byte) flag; 21660: } 21661: } 21662: } 21663: } 21664: //状態が変化したブロックのアドレス変換キャッシュを無効化する 21665: // 本来は透過変換はアドレス変換キャッシュより優先するので無効化する必要はないが、 21666: // ここでは透過変換もアドレス変換キャッシュに乗せているため無効化する必要がある 21667: if (!Arrays.equals (mmuTTUserData1, mmuTTUserData2)) { 21668: for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) { 21669: int logicalPage = mmuUserDataCache[i]; 21670: if (logicalPage != 1) { //アドレス変換キャッシュが有効 21671: int block = logicalPage >>> 24; 21672: if (mmuTTUserData1[block] != mmuTTUserData2[block]) { //透過変換の状態が変化した 21673: mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1; //アドレス変換キャッシュを無効化する 21674: } 21675: } 21676: } 21677: } 21678: if (!Arrays.equals (mmuTTSuperData1, mmuTTSuperData2)) { 21679: for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) { 21680: int logicalPage = mmuSuperDataCache[i]; 21681: if (logicalPage != 1) { //アドレス変換キャッシュが有効 21682: int block = logicalPage >>> 24; 21683: if (mmuTTSuperData1[block] != mmuTTSuperData2[block]) { //透過変換の状態が変化した 21684: mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1; //アドレス変換キャッシュを無効化する 21685: } 21686: } 21687: } 21688: } 21689: } //mmuTTSetData(int,int) 21690: 21691: //mmuSetITT0 (d) 21692: // ITT0に書く 21693: public static void mmuSetITT0 (int d) { 21694: mmuTTSetCode (d, mmuITT1); 21695: if (MMU_DEBUG_COMMAND) { 21696: System.out.printf ("%08x mmuSetITT0(0x%08x)\n", XEiJ.regPC0, mmuITT0); 21697: } 21698: } //mmuSetITT0(int) 21699: 21700: //mmuSetITT1 (d) 21701: // ITT1に書く 21702: public static void mmuSetITT1 (int d) { 21703: mmuTTSetCode (mmuITT0, d); 21704: if (MMU_DEBUG_COMMAND) { 21705: System.out.printf ("%08x mmuSetITT1(0x%08x)\n", XEiJ.regPC0, mmuITT1); 21706: } 21707: } //mmuSetITT1(int) 21708: 21709: //mmuTTSetCode (d0, d1) 21710: // ITT0,ITT1に書く 21711: // 命令透過変換マップを更新する 21712: public static void mmuTTSetCode (int d0, int d1) { 21713: mmuITT0 = d0 & 0xffffe364; 21714: mmuITT1 = d1 & 0xffffe364; 21715: //1と2を入れ換える 21716: { 21717: byte[] t = mmuTTUserCode1; 21718: mmuTTUserCode1 = mmuTTUserCode2; 21719: mmuTTUserCode2 = t; 21720: t = mmuTTSuperCode1; 21721: mmuTTSuperCode1 = mmuTTSuperCode2; 21722: mmuTTSuperCode2 = t; 21723: } 21724: //1に構築する 21725: // ITT0とITT1の両方がヒットしたときITT0を用いるため、ITT1→ITT0の順に書き込む 21726: Arrays.fill (mmuTTUserCode1, (byte) 0); //透過変換なし 21727: Arrays.fill (mmuTTSuperCode1, (byte) 0); //透過変換なし 21728: if ((short) mmuITT1 < 0) { //MMU_TTR_ENABLE。ITT1が有効 21729: int mask = ~mmuITT1 >>> 16 & 255; 21730: int base = mmuITT1 >>> 24 & mask; 21731: int flag = ((mmuITT1 & MMU_TTR_WRITE_PROTECT) << (7 - 2) | 21732: (mmuITT1 & MMU_TTR_CACHE_MODE) | 21733: 1); 21734: if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 || 21735: (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21736: for (int block = 0; block < 256; block++) { 21737: if ((block & mask) == base) { 21738: mmuTTUserCode1[block] = (byte) flag; 21739: } 21740: } 21741: } 21742: if ((mmuITT1 & MMU_TTR_IGNORE_FC2) != 0 || 21743: (mmuITT1 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21744: for (int block = 0; block < 256; block++) { 21745: if ((block & mask) == base) { 21746: mmuTTSuperCode1[block] = (byte) flag; 21747: } 21748: } 21749: } 21750: } 21751: if ((short) mmuITT0 < 0) { //MMU_TTR_ENABLE。ITT0が有効 21752: int mask = ~mmuITT0 >>> 16 & 255; 21753: int base = mmuITT0 >>> 24 & mask; 21754: int flag = ((mmuITT0 & MMU_TTR_WRITE_PROTECT) << (7 - 2) | 21755: (mmuITT0 & MMU_TTR_CACHE_MODE) | 21756: 1); 21757: if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 || 21758: (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_USER) { //ユーザモードで有効 21759: for (int block = 0; block < 256; block++) { 21760: if ((block & mask) == base) { 21761: mmuTTUserCode1[block] = (byte) flag; 21762: } 21763: } 21764: } 21765: if ((mmuITT0 & MMU_TTR_IGNORE_FC2) != 0 || 21766: (mmuITT0 & MMU_TTR_USER_SUPERVISOR) == MMU_TTR_US_SUPERVISOR) { //スーパーバイザモードで有効 21767: for (int block = 0; block < 256; block++) { 21768: if ((block & mask) == base) { 21769: mmuTTSuperCode1[block] = (byte) flag; 21770: } 21771: } 21772: } 21773: } 21774: //状態が変化したブロックのアドレス変換キャッシュを無効化する 21775: // 本来は透過変換はアドレス変換キャッシュより優先するので無効化する必要はないが、 21776: // ここでは透過変換もアドレス変換キャッシュに乗せているため無効化する必要がある 21777: if (!Arrays.equals (mmuTTUserCode1, mmuTTUserCode2)) { 21778: for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) { 21779: int logicalPage = mmuUserCodeCache[i]; 21780: if (logicalPage != 1) { //アドレス変換キャッシュが有効 21781: int block = logicalPage >>> 24; 21782: if (mmuTTUserCode1[block] != mmuTTUserCode2[block]) { //透過変換の状態が変化した 21783: mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1; //アドレス変換キャッシュを無効化する 21784: } 21785: } 21786: } 21787: } 21788: if (!Arrays.equals (mmuTTSuperCode1, mmuTTSuperCode2)) { 21789: for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) { 21790: int logicalPage = mmuSuperCodeCache[i]; 21791: if (logicalPage != 1) { //アドレス変換キャッシュが有効 21792: int block = logicalPage >>> 24; 21793: if (mmuTTSuperCode1[block] != mmuTTSuperCode2[block]) { //透過変換の状態が変化した 21794: mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1; //アドレス変換キャッシュを無効化する 21795: } 21796: } 21797: } 21798: } 21799: } //mmuTTSetCode(int,int) 21800: 21801: //-------------------------------------------------------------------------------- 21802: //変換制御レジスタ 21803: // 21804: // TCR 変換制御レジスタ 21805: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21806: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━━━┯━┯━━━┯━━━┯━┓ 21807: // ┃ 0 │ E│ P NAD NAI FOTC FITC DCO │ DUO │DWO DCI │ DUI │ 0┃ 21808: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━━━┷━┷━━━┷━━━┷━┛ 21809: public static final int MMU_TCR_ENABLE = 1 << 15; //x E Enable 21810: public static final int MMU_TCR_PAGE_SIZE = 1 << 14; //x P Page Size 21811: public static final int MMU_TCR_P_4KB = 0 << 14; // 4KB 21812: public static final int MMU_TCR_P_8KB = 1 << 14; // 8KB 21813: public static final int MMU_TCR_NAD = 1 << 13; //x NAD No Allocate Mode (Data ATC)。データATCはヒットするが更新されない 21814: public static final int MMU_TCR_NAI = 1 << 12; //x NAI No Allocate Mode (Instruction ATC)。命令ATCはヒットするが更新されない 21815: public static final int MMU_TCR_FOTC = 1 << 11; // FOTC 1/2-Cache Mode (Data ATC)。データATCは0=64エントリ,1=32エントリ 21816: public static final int MMU_TCR_FITC = 1 << 10; // FITC 1/2-Cache Mode (Instruction ATC)。命令ATCは0=64エントリ,1=32エントリ 21817: public static final int MMU_TCR_DCO = 3 << 8; // DCO Default Cache Mode (Data Cache)。デフォルトデータキャッシュモード 21818: public static final int MMU_TCR_DUO = 3 << 6; // DUO Default UPA bits (Data Cache)。デフォルトデータUPA 21819: public static final int MMU_TCR_DWO = 1 << 5; // DWO Default Write Protect (Data Cache)。デフォルトライトプロテクト 21820: public static final int MMU_TCR_DCI = 3 << 3; // DCI Default Cache Mode (Instruction Cache)。デフォルト命令キャッシュモード 21821: public static final int MMU_TCR_DUI = 3 << 1; // DUI Default UPA bits (Instruction Cache)。デフォルト命令UPA 21822: public static int mmuTCR; //TCR 21823: public static boolean mmuEnabled; //true=アドレス変換有効 21824: public static boolean mmu4KB; //false=8KB,true=4KB 21825: public static boolean mmuNotAllocateData; //true=データアドレス変換キャッシュをアロケートしない 21826: public static boolean mmuNotAllocateCode; //true=命令アドレス変換キャッシュをアロケートしない 21827: public static int mmuPageSize; //ページサイズ 21828: public static int mmuPageAddressMask; //ページアドレスのマスク 21829: public static int mmuPageOffsetMask; //ページオフセットのマスク 21830: public static int mmuPageIndexMask; //ページインデックスのマスク 21831: public static int mmuPageIndexBit2; //ページインデックスのbit番号-2 21832: public static int mmuPageTableMask; //ページテーブルの先頭アドレスのマスク 21833: 21834: //d = mmuGetTCR () 21835: // TCRを読む 21836: public static int mmuGetTCR () { 21837: return mmuTCR; 21838: } //mmuGetTCR() 21839: 21840: //mmuSetTCR (d) 21841: // TCRに書く 21842: public static void mmuSetTCR (int d) { 21843: mmuInvalidateAllCache (); //高速化のためアドレス変換していないときもキャッシュに乗せているので、アドレス変換を有効にしたときキャッシュを初期化する必要がある 21844: mmuTCR = d & 0x0000fffe; 21845: mmuEnabled = (short) d < 0; //(d & MMU_TCR_ENABLE) != 0 21846: mmu4KB = (d & MMU_TCR_PAGE_SIZE) == MMU_TCR_P_4KB; 21847: mmuNotAllocateData = (d & MMU_TCR_NAD) != 0; 21848: mmuNotAllocateCode = (d & MMU_TCR_NAI) != 0; 21849: if (mmu4KB) { //4KB 21850: mmuPageSize = MMU_PAGE_SIZE_4KB; 21851: mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_4KB; 21852: mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_4KB; 21853: mmuPageIndexMask = MMU_PAGE_INDEX_MASK_4KB; 21854: mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_4KB - 2; 21855: mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB; 21856: } else { //8KB 21857: mmuPageSize = MMU_PAGE_SIZE_8KB; 21858: mmuPageAddressMask = MMU_PAGE_ADDRESS_MASK_8KB; 21859: mmuPageOffsetMask = MMU_PAGE_OFFSET_MASK_8KB; 21860: mmuPageIndexMask = MMU_PAGE_INDEX_MASK_8KB; 21861: mmuPageIndexBit2 = MMU_PAGE_INDEX_BIT0_8KB - 2; 21862: mmuPageTableMask = MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB; 21863: } 21864: if (MMU_DEBUG_COMMAND) { 21865: System.out.printf ("%08x mmuSetTCR(0x%08x)\n", XEiJ.regPC0, mmuTCR); 21866: System.out.printf (" mmuEnabled=%b\n", mmuEnabled); 21867: System.out.printf (" mmu4KB=%b\n", mmu4KB); 21868: System.out.printf (" mmuPageSize=0x%08x\n", mmuPageSize); 21869: System.out.printf (" mmuPageAddressMask=0x%08x\n", mmuPageAddressMask); 21870: System.out.printf (" mmuPageOffsetMask=0x%08x\n", mmuPageOffsetMask); 21871: System.out.printf (" mmuPageIndexMask=0x%08x\n", mmuPageIndexMask); 21872: System.out.printf (" mmuPageIndexBit2=%d\n", mmuPageIndexBit2); 21873: System.out.printf (" mmuPageTableMask=%d\n", mmuPageTableMask); 21874: } 21875: } //mmuSetTCR(int) 21876: 21877: //-------------------------------------------------------------------------------- 21878: //アドレス変換テーブル 21879: 21880: // URP ユーザルートポインタ 21881: // SRP スーパーバイザルートポインタ 21882: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21883: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━━━━━━━━━┓ 21884: // ┃ ルートテーブルアドレス │ 0 ┃ 21885: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━━━━━━━━━┛ 21886: public static int mmuURP; //URP 21887: public static int mmuSRP; //SRP 21888: 21889: //d = mmuGetURP () 21890: // URPを読む 21891: public static int mmuGetURP () { 21892: return mmuURP; 21893: } //mmuGetURP() 21894: 21895: //d = mmuGetSRP () 21896: // SRPを読む 21897: public static int mmuGetSRP () { 21898: return mmuSRP; 21899: } //mmuGetSRP() 21900: 21901: //mmuSetURP (d) 21902: // URPに書く 21903: public static void mmuSetURP (int d) throws M68kException { 21904: mmuURP = d &= 0xfffffe00; 21905: Arrays.fill (mmuUserDataCache, 1); 21906: Arrays.fill (mmuUserCodeCache, 1); 21907: if (MMU_DEBUG_COMMAND) { 21908: System.out.printf ("%08x mmuSetURP(0x%08x)\n", XEiJ.regPC0, mmuURP); 21909: } 21910: if (RootPointerList.RTL_ON) { 21911: RootPointerList.rtlSetRootPointer (d, false); 21912: } 21913: } //mmuSetURP(int) 21914: 21915: //mmuSetSRP (d) 21916: // SRPに書く 21917: public static void mmuSetSRP (int d) { 21918: mmuSRP = d &= 0xfffffe00; 21919: Arrays.fill (mmuSuperDataCache, 1); 21920: Arrays.fill (mmuSuperCodeCache, 1); 21921: if (MMU_DEBUG_COMMAND) { 21922: System.out.printf ("%08x mmuSetSRP(0x%08x)\n", XEiJ.regPC0, mmuSRP); 21923: } 21924: if (RootPointerList.RTL_ON) { 21925: RootPointerList.rtlSetRootPointer (d, true); 21926: } 21927: } //mmuSetSRP(int) 21928: 21929: // デスクリプタ 21930: // 21931: // ルートテーブルデスクリプタ 21932: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21933: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━━━━━━━┯━┯━┯━━━┓ 21934: // ┃ ポインタテーブルアドレス │ X │ U│ W│ UDT ┃ 21935: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━━━━━━━┷━┷━┷━━━┛ 21936: // 21937: // 4KBポインタテーブルデスクリプタ 21938: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21939: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┯━┯━┯━━━┓ 21940: // ┃ ページテーブルアドレス │ X │ U│ W│ UDT ┃ 21941: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┷━┷━┷━━━┛ 21942: // 21943: // 8KBポインタテーブルデスクリプタ 21944: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21945: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━━━┓ 21946: // ┃ ページテーブルアドレス │ X│ U│ W│ UDT ┃ 21947: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━━━┛ 21948: // 21949: // 4KBページテーブルデスクリプタ 21950: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21951: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓ 21952: // ┃ 物理ページアドレス │UR│ G│U1│U0│ S│ CM │ M│ U│ W│ PDT ┃ 21953: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛ 21954: // 21955: // 8KBページテーブルデスクリプタ 21956: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21957: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━┯━┯━┯━┯━┯━┯━━━┯━┯━┯━┯━━━┓ 21958: // ┃ 物理ページアドレス │UR│UR│ G│U1│U0│ S│ CM │ M│ U│ W│ PDT ┃ 21959: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━┷━┷━┷━┷━┷━┷━━━┷━┷━┷━┷━━━┛ 21960: // 21961: // 間接ページテーブルデスクリプタ 21962: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21963: // ┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┯━━━┓ 21964: // ┃ ページデスクリプタアドレス │ PDT ┃ 21965: // ┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┷━━━┛ 21966: public static final int MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS = -1 << 9; //x Pointer Table Address 21967: public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_4KB = -1 << 6; //x Page Table Address (4KB) 21968: public static final int MMU_DESCRIPTOR_PAGE_TABLE_ADDRESS_8KB = -1 << 5; //x Page Table Address (8KB) 21969: public static final int MMU_DESCRIPTOR_GLOBAL = 1 << 10; //x G Global 21970: public static final int MMU_DESCRIPTOR_SUPERVISOR_PROTECTED = 1 << 7; //x S Supervisor Protected 21971: public static final int MMU_DESCRIPTOR_CACHE_MODE = 3 << 5; //x CM Cache Mode 21972: public static final int MMU_DESCRIPTOR_MODIFIED = 1 << 4; //x M Modified 21973: public static final int MMU_DESCRIPTOR_USED = 1 << 3; //x U Used 21974: public static final int MMU_DESCRIPTOR_WRITE_PROTECTED = 1 << 2; //x W Write Protected 21975: public static final int MMU_DESCRIPTOR_UDT = 2 << 0; //x UDT Upper Level Descriptor Type 21976: public static final int MMU_DESCRIPTOR_PDT = 3 << 0; //x PDT Page Descriptor Type 21977: public static final int MMU_DESCRIPTOR_TYPE_INVALID = 0 << 0; // Invalid 21978: public static final int MMU_DESCRIPTOR_TYPE_INDIRECT = 2 << 0; // Indirect 21979: public static final int MMU_DESCRIPTOR_INDIRECT_ADDRESS = -1 << 2; //x Descriptor Address 21980: 21981: //-------------------------------------------------------------------------------- 21982: //アドレス変換キャッシュ 21983: // 21984: // 構造 21985: // ユーザモード 21986: // ライン0 21987: // エントリ0 21988: // [0] 論理ページアドレス。リード用。1=無効 21989: // [1] 論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効 21990: // [2] 物理ページアドレス。1=無効 21991: // [3] フラグ。bit10:グローバル,bit6-5:キャッシュモード,bit0:無効 21992: // エントリ1 21993: // エントリ2 21994: // エントリ3 21995: // ライン1 21996: // : 21997: // ライン63 21998: // スーパーバイザモード 21999: // ライン0 22000: // エントリ0 22001: // [0] 論理ページアドレス。リード用。1=無効 22002: // [1] 論理ページアドレス。ライト用。修正済みかつライトプロテクトされていないときだけ有効。1=無効 22003: // [2] 物理ページアドレス。1=無効 22004: // [3] フラグ。bit10:グローバル,bit6-5:キャッシュモード,bit0:無効 22005: // エントリ1 22006: // エントリ2 22007: // エントリ3 22008: // ライン1 22009: // : 22010: // ライン63 22011: // 22012: // ハッシュ関数 22013: // 次の関数で32bitの論理ページアドレスを6bitのライン番号に変換する 22014: // a * 0x5efc103f >>> 26 22015: // 32bitの中に幅6bit以内で6bitまでセットする組み合わせは1+1+2+4+8+16+32*27=896通りあるが、 22016: // それらをa*x>>>26で0～63になるべく均一に分散させる係数を2^32通りの中から探して以下の24個を得た 22017: // 0x5efbf041 0x5efc0fc1 0x5efc103f 0x5f03efc1 0x5f03f03f 0x5f040fbf 22018: // 0x60fbf041 0x60fc0fc1 0x60fc103f 0x6103efc1 0x6103f03f 0x61040fbf 22019: // 0x9efbf041 0x9efc0fc1 0x9efc103f 0x9f03efc1 0x9f03f03f 0x9f040fbf 22020: // 0xa0fbf041 0xa0fc0fc1 0xa0fc103f 0xa103efc1 0xa103f03f 0xa1040fbf 22021: // この中で(0..63)<<12と(0..63)<<13がそれぞれすべて分離するのは 22022: // 0x5efc103f 22023: // 0x60fc103f 22024: // 0x9efc103f 22025: // 0xa0fc103f 22026: // この4個はほぼ同じパターンなので0x5efc103fを係数として用いることにする 22027: // perl -e "for$x(0x5efc103f){printf' // 0x%x%c',$x,10;for$b(7..15){@c=(0)x64;for$n(0..63){$a=$n<<$b;$c[$a*$x>>26&63]++;}printf' // %2d %s%c',$b,join('',@c),10;}}" 22028: // 0x5efc103f 22029: // 7 2111111111111111111111111111111101111111111111111111111111111111 22030: // 8 1111111111111111111111111111111111111111111111111111111111111111 22031: // 9 1111111111111111111111111111111111111111111111111111111111111111 22032: // 10 1111111111111111111111111111111111111111111111111111111111111111 22033: // 11 1111111111111111111111111111111111111111111111111111111111111111 22034: // 12 1111111111111111111111111111111111111111111111111111111111111111 22035: // 13 1111111111111111111111111111111111111111111111111111111111111111 22036: // 14 1111111111111111111111111111111111111111111111111111111111111111 22037: // 15 2011111111111111111111111111111111111111111111111111111111111111 22038: // ページサイズが2^8=256バイトから2^14=16384バイトまで、それぞれ先頭の64ページがすべて異なるハッシュ値を持つことがわかる 22039: // 22040: // 1wayセットアソシアティブ 22041: // ハッシュ値が衝突したときの速度低下を抑えるため4waysにしてみたが効果がなさそうなので1wayに戻してある 22042: // ハッシュ関数を工夫してあるので4waysにしてもほとんどの場合は1番目でヒットするか4番目まですべてミスするかのどちらかになる 22043: // 1wayを4waysにするとミスしたときの条件分岐が1回から4回に増えてテーブルサーチの開始が遅れる 22044: // 2ways以上では参照するときに1番目に比較するエントリとアロケートするときに押し出すエントリを適切に選択するための仕組みが必要 22045: // 22046: // LRU(least recently used)方式(2ways以上の場合) 22047: // アロケートはラインの中で最も古いエントリを切り捨てて最も新しいエントリを追加する方法で行う 22048: // アドレス変換キャッシュは最も新しいエントリが繰り返しアクセスされる場合が多く、ハッシュ関数で十分に分散させられているので、 22049: // ここではエントリを常に新しい順にソートしておく方法を用いる 22050: // 2番目以降のエントリがヒットしたときエントリを並べ替えなければならないので遅くなるが、1番目のヒット率が十分に高ければ問題ない 22051: // 22052: // グローバル 22053: // 関連する命令 22054: // PFLUSHA アドレス変換キャッシュのすべてのエントリを無効化する 22055: // PFLUSHAN アドレス変換キャッシュのNonGlobalなエントリを無効化する 22056: // PFLUSH (An) アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 22057: // 論理ページアドレスがAnのエントリを無効化する 22058: // PFLUSHN (An) アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 22059: // 論理ページアドレスがAnかつNonGlobalのエントリを無効化する 22060: // グローバルはこれらの命令の動作を変更する以外の機能を持たない 22061: // 22062: // キャッシュモード 22063: // 22064: public static final int MMU_HASH_BITS = 6; 22065: public static final int MMU_HASH_SIZE = 1 << MMU_HASH_BITS; 22066: public static final int MMU_HASH_COEFF = 0x5efc103f; //ハッシュ関数の係数 22067: public static final int MMU_CACHE_WAYS = 1; //1=1way,4=4waysセットアソシアティブ 22068: public static final int[] mmuUserDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 22069: public static final int[] mmuUserCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 22070: public static final int[] mmuSuperDataCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 22071: public static final int[] mmuSuperCodeCache = new int[4 * MMU_CACHE_WAYS * MMU_HASH_SIZE]; 22072: 22073: //mmuInvalidateAllCache () 22074: // PFLUSHA 22075: // アドレス変換キャッシュのすべてのエントリを無効化する 22076: public static void mmuInvalidateAllCache () { 22077: Arrays.fill (mmuUserDataCache, 1); 22078: Arrays.fill (mmuUserCodeCache, 1); 22079: Arrays.fill (mmuSuperDataCache, 1); 22080: Arrays.fill (mmuSuperCodeCache, 1); 22081: } //mmuInvalidateAllCache() 22082: 22083: //mmuInvalidateAllNonGlobalCache () 22084: // PFLUSHAN 22085: // アドレス変換キャッシュのNonGlobalなエントリを無効化する 22086: public static void mmuInvalidateAllNonGlobalCache () { 22087: for (int i = 0; i < 4 * MMU_CACHE_WAYS * MMU_HASH_SIZE; i += 4) { 22088: if ((mmuUserDataCache[i + 3] & (MMU_DESCRIPTOR_GLOBAL | 1)) == 0) { //エントリが有効かつNonGlobal 22089: mmuUserDataCache[i] = mmuUserDataCache[i + 1] = mmuUserDataCache[i + 2] = mmuUserDataCache[i + 3] = 1; 22090: } 22091: if ((mmuUserCodeCache[i + 3] & (MMU_DESCRIPTOR_GLOBAL | 1)) == 0) { //エントリが有効かつNonGlobal 22092: mmuUserCodeCache[i] = mmuUserCodeCache[i + 1] = mmuUserCodeCache[i + 2] = mmuUserCodeCache[i + 3] = 1; 22093: } 22094: if ((mmuSuperDataCache[i + 3] & (MMU_DESCRIPTOR_GLOBAL | 1)) == 0) { //エントリが有効かつNonGlobal 22095: mmuSuperDataCache[i] = mmuSuperDataCache[i + 1] = mmuSuperDataCache[i + 2] = mmuSuperDataCache[i + 3] = 1; 22096: } 22097: if ((mmuSuperCodeCache[i + 3] & (MMU_DESCRIPTOR_GLOBAL | 1)) == 0) { //エントリが有効かつNonGlobal 22098: mmuSuperCodeCache[i] = mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i + 3] = 1; 22099: } 22100: } 22101: } //mmuInvalidateAllNonGlobalCache() 22102: 22103: //mmuInvalidateCache (a) 22104: // PFLUSH (An) 22105: // アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 22106: // 論理ページアドレスがAnのエントリを無効化する 22107: public static void mmuInvalidateCache (int a) { 22108: int logicalPage = a & mmuPageAddressMask; 22109: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 22110: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 22111: int[] cache = (supervisor ? 22112: instruction ? mmuSuperCodeCache : mmuSuperDataCache : 22113: instruction ? mmuUserCodeCache : mmuUserDataCache); 22114: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 22115: if (MMU_CACHE_WAYS == 1) { //1way 22116: if (cache[head] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 22117: cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1; //末尾を空ける 22118: return; 22119: } 22120: } else { //2ways以上 22121: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 22122: for (int i = head; i <= tail; i += 4) { 22123: if (cache[i] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 22124: for (int j = i; j < tail; j += 4) { //後ろを詰める 22125: cache[j ] = cache[j + 4]; 22126: cache[j + 1] = cache[j + 5]; 22127: cache[j + 2] = cache[j + 6]; 22128: cache[j + 3] = cache[j + 7]; 22129: } 22130: cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1; //末尾を空ける 22131: return; 22132: } 22133: } 22134: } 22135: } //mmuInvalidateCache(int) 22136: 22137: //mmuInvalidateNonGlobalCache (a) 22138: // PFLUSHN (An) 22139: // アドレス変換キャッシュの、DFC=1またはDFC=2ならばユーザモード、DFC=5またはDFC=6ならばスーパーバイザモードの、 22140: // 論理ページアドレスがAnかつNonGlobalのエントリを無効化する 22141: public static void mmuInvalidateNonGlobalCache (int a) { 22142: int logicalPage = a & mmuPageAddressMask; 22143: boolean supervisor = (0b10011111 << 24 << XEiJ.mpuDFC) < 0; 22144: boolean instruction = (0b00101010 << 24 << XEiJ.mpuDFC) < 0; 22145: int[] cache = (supervisor ? 22146: instruction ? mmuSuperCodeCache : mmuSuperDataCache : 22147: instruction ? mmuUserCodeCache : mmuUserDataCache); 22148: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 22149: if (MMU_CACHE_WAYS == 1) { //1way 22150: if (cache[head] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 22151: if ((cache[head + 3] & (MMU_DESCRIPTOR_GLOBAL | 1)) == 0) { //エントリが有効かつNonGlobal 22152: cache[head] = cache[head + 1] = cache[head + 2] = cache[head + 3] = 1; //末尾を空ける 22153: } 22154: return; //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する 22155: } 22156: } else { //2ways以上 22157: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 22158: for (int i = head; i <= tail; i += 4) { 22159: if (cache[i] == logicalPage) { //エントリが有効かつ論理ページアドレスがAn 22160: if ((cache[i + 3] & (MMU_DESCRIPTOR_GLOBAL | 1)) == 0) { //エントリが有効かつNonGlobal 22161: for (int j = i; j < tail; j += 4) { //後ろを詰める 22162: cache[j ] = cache[j + 4]; 22163: cache[j + 1] = cache[j + 5]; 22164: cache[j + 2] = cache[j + 6]; 22165: cache[j + 3] = cache[j + 7]; 22166: } 22167: cache[tail] = cache[tail + 1] = cache[tail + 2] = cache[tail + 3] = 1; //末尾を空ける 22168: } 22169: return; //論理ページアドレスがAnのエントリは1つだけなのでそれがNonGlobalでなければ何もしないで終了する 22170: } 22171: } 22172: } 22173: } //mmuInvalidateNonGlobalCache(int) 22174: 22175: //-------------------------------------------------------------------------------- 22176: //初期化 22177: 22178: //mmuInit () 22179: // 初期化 22180: public static void mmuInit () { 22181: mmuTTUserData1 = new byte[256]; 22182: mmuTTUserCode1 = new byte[256]; 22183: mmuTTSuperData1 = new byte[256]; 22184: mmuTTSuperCode1 = new byte[256]; 22185: mmuTTUserData2 = new byte[256]; 22186: mmuTTUserCode2 = new byte[256]; 22187: mmuTTSuperData2 = new byte[256]; 22188: mmuTTSuperCode2 = new byte[256]; 22189: mmuReset (); 22190: } //mmuInit() 22191: 22192: //mmuReset () 22193: // リセット 22194: public static void mmuReset () { 22195: mmuTTSetData (0, 0); 22196: mmuTTSetCode (0, 0); 22197: mmuSetTCR (0); 22198: } //mmuReset() 22199: 22200: //-------------------------------------------------------------------------------- 22201: //バスアクセス 22202: // 22203: // ByteSign byte バイト符号拡張 22204: // ByteZero int バイトゼロ拡張 22205: // WordSign int ワード符号拡張 22206: // WordZero int ワードゼロ拡張 22207: // Long int ロング 22208: // Quad long クワッド 22209: // 22210: // Data データ 1 先頭 22211: // Second データ 1 2番目 22212: // Even データ 2 先頭 22213: // Four データ 4 先頭 22214: // Code コード 2 先頭 22215: // Opword コード 2 先頭(命令ワード) 22216: // Exword コード 2 2番目(拡張ワード) 22217: // 22218: // バイト 22219: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22220: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22221: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22222: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22223: // ┏━┓ 22224: // ┃ B┃ 22225: // ┗━┛ 22226: // 0 22227: // 22228: // ワード 22229: // 偶数 22230: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22231: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22232: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22233: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22234: // ┏━━━┓ 22235: // ┃ W ┃ 22236: // ┗━━━┛ 22237: // 0 22238: // 奇数 22239: // -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 22240: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22241: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22242: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22243: // ┏━┳━┓ 22244: // ┃ B┃ B┃ 22245: // ┗━┻━┛ 22246: // 8 0 22247: // 22248: // ロング 22249: // 4の倍数 22250: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22251: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22252: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22253: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22254: // ┏━━━━━━━┓ 22255: // ┃ L ┃ 22256: // ┗━━━━━━━┛ 22257: // 0 22258: // 4の倍数+1 22259: // -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 22260: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22261: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22262: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22263: // ┏━┳━━━┳━┓ 22264: // ┃ B┃ W ┃ B┃ 22265: // ┗━┻━━━┻━┛ 22266: // 24 8 0 22267: // 4の倍数+2 22268: // -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 22269: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22270: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22271: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22272: // ┏━━━┳━━━┓ 22273: // ┃ W ┃ W ┃ 22274: // ┗━━━┻━━━┛ 22275: // 16 0 22276: // 4の倍数+3 22277: // -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 22278: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22279: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22280: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22281: // ┏━┳━━━┳━┓ 22282: // ┃ B┃ W ┃ B┃ 22283: // ┗━┻━━━┻━┛ 22284: // 24 8 0 22285: // 22286: // クワッド 22287: // 4の倍数 22288: // 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22289: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22290: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22291: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22292: // ┏━━━━━━━┳━━━━━━━┓ 22293: // ┃ L ┃ L ┃ 22294: // ┗━━━━━━━┻━━━━━━━┛ 22295: // 32 0 22296: // 4の倍数+1 22297: // -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 22298: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22299: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22300: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22301: // ┏━┳━━━┳━━━━━━━┳━┓ 22302: // ┃ B┃ W ┃ L ┃ B┃ 22303: // ┗━┻━━━┻━━━━━━━┻━┛ 22304: // 56 40 8 0 22305: // 4の倍数+2 22306: // -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 22307: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22308: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22309: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22310: // ┏━━━┳━━━━━━━┳━━━┓ 22311: // ┃ W ┃ L ┃ W ┃ 22312: // ┗━━━┻━━━━━━━┻━━━┛ 22313: // 48 16 0 22314: // 4の倍数+3 22315: // -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 22316: // ┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳━┯━┯━┯━┳ 22317: // ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ │ │ │ ┃ 22318: // ┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻━┷━┷━┷━┻ 22319: // ┏━┳━━━━━━━┳━━━┳━┓ 22320: // ┃ B┃ L ┃ W ┃ B┃ 22321: // ┗━┻━━━━━━━┻━━━┻━┛ 22322: // 56 24 8 0 22323: // 22324: 22325: //-------------------------------------------------------------------------------- 22326: //ピーク 22327: // デバッガ用 22328: // エラーや副作用なしでリードする 22329: // アドレス変換はピーク 22330: // ページフォルトやバスエラーのときは-1をキャストした値を返す 22331: 22332: //d = mmuPeekByteSign (a, f) 22333: // ピークバイト符号拡張 22334: public static byte mmuPeekByteSign (int a, int f) { 22335: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22336: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22337: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22338: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22339: // 01234567 22340: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22341: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22342: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1; 22343: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22344: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a); 22345: } else { 22346: return -1; 22347: } 22348: } //mmuPeekByteSign(int,int) 22349: 22350: //d = mmuPeekByteZero (a, f) 22351: // ピークバイトゼロ拡張 22352: public static int mmuPeekByteZero (int a, int f) { 22353: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22354: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22355: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22356: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22357: // 01234567 22358: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22359: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22360: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0) : 0xff; 22361: // ^ ^^^^ 22362: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22363: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a); 22364: // ^ 22365: } else { 22366: return 0xff; 22367: // ^^^^ 22368: } 22369: } //mmuPeekByteZero(int,int) 22370: 22371: //d = mmuPeekByteSignData (a, supervisor) 22372: // ピークバイト符号拡張(データ) 22373: public static byte mmuPeekByteSignData (int a, int supervisor) { 22374: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22375: int a0 = mmuTranslatePeek (a, supervisor, 0); 22376: return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0); 22377: } //mmuPeekByteSignData(int,int) 22378: 22379: //d = mmuPeekByteSignCode (a, supervisor) 22380: // ピークバイト符号拡張(コード) 22381: public static byte mmuPeekByteSignCode (int a, int supervisor) { 22382: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22383: int a0 = mmuTranslatePeek (a, supervisor, 1); 22384: return (a ^ a0) == 1 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0); 22385: } //mmuPeekByteSignCode(int,int) 22386: 22387: //d = mmuPeekByteZeroData (a, supervisor) 22388: // ピークバイトゼロ拡張(データ) 22389: public static int mmuPeekByteZeroData (int a, int supervisor) { 22390: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22391: int a0 = mmuTranslatePeek (a, supervisor, 0); 22392: return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0); 22393: } //mmuPeekByteZeroData(int,int) 22394: 22395: //d = mmuPeekByteZeroCode (a, supervisor) 22396: // ピークバイトゼロ拡張(コード) 22397: public static int mmuPeekByteZeroCode (int a, int supervisor) { 22398: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22399: int a0 = mmuTranslatePeek (a, supervisor, 1); 22400: return (a ^ a0) == 1 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0); 22401: } //mmuPeekByteZeroCode(int,int) 22402: 22403: //d = mmuPeekWordSign (a, f) 22404: // ピークワード符号拡張 22405: public static int mmuPeekWordSign (int a, int f) { 22406: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22407: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22408: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22409: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22410: // 01234567 22411: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22412: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22413: if ((a & 1) == 0) { //偶数 22414: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) : -1; 22415: } else { //奇数 22416: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 22417: return (((a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1) << 8 | 22418: ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1) : 255)); 22419: } 22420: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22421: if ((a & 1) == 0) { //偶数 22422: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a); 22423: } else { //奇数 22424: return (mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a ) << 8 | 22425: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 1)); 22426: } 22427: } else { 22428: return -1; 22429: } 22430: } //mmuPeekWordSign(int,int) 22431: 22432: //d = mmuPeekWordSignData (a, supervisor) 22433: // ピークワード符号拡張(データ) 22434: public static int mmuPeekWordSignData (int a, int supervisor) { 22435: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22436: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1が必要なので上書き不可 22437: if ((a & 1) == 0) { //偶数 22438: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0); 22439: } else { //奇数 22440: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); 22441: return (((a0 & 1) == 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 8 | 22442: ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1))); 22443: } 22444: } //mmuPeekWordSignData(int,int) 22445: 22446: //d = mmuPeekWordSignEven (a, supervisor) 22447: // ピークワード符号拡張(偶数) 22448: public static int mmuPeekWordSignEven (int a, int supervisor) { 22449: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22450: a = mmuTranslatePeek (a, supervisor, 0); 22451: return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a); 22452: } //mmuPeekWordSignEven(int,int) 22453: 22454: //d = mmuPeekWordSignCode (a, supervisor) 22455: // ピークワード符号拡張(コード) 22456: public static int mmuPeekWordSignCode (int a, int supervisor) { 22457: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22458: a = mmuTranslatePeek (a, supervisor, 1); 22459: return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a); 22460: } //mmuPeekWordSignCode(int,int) 22461: 22462: //d = mmuPeekWordZeroData (a, supervisor) 22463: // ピークワードゼロ拡張(データ) 22464: public static int mmuPeekWordZeroData (int a, int supervisor) { 22465: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22466: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1が必要なので上書き不可 22467: if ((a & 1) == 0) { //偶数 22468: return (a0 & 1) != 0 ? 65535 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a0); 22469: } else { //奇数 22470: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); 22471: return (((a0 & 1) == 0 ? 255 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a0)) << 8 | 22472: ((a1 & 1) != 0 ? 255 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a1))); 22473: } 22474: } //mmuPeekWordZeroData(int,int) 22475: 22476: //d = mmuPeekWordZeroEven (a, supervisor) 22477: // ピークワードゼロ拡張(偶数) 22478: public static int mmuPeekWordZeroEven (int a, int supervisor) { 22479: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22480: a = mmuTranslatePeek (a, supervisor, 0); 22481: return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a); 22482: } //mmuPeekWordZeroEven(int,int) 22483: 22484: //d = mmuPeekWordZeroCode (a, supervisor) 22485: // ピークワードゼロ拡張(コード) 22486: public static int mmuPeekWordZeroCode (int a, int supervisor) { 22487: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22488: a = mmuTranslatePeek (a, supervisor, 1); 22489: return (a & 1) != 0 ? 65535 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a); 22490: } //mmuPeekWordZeroCode(int,int) 22491: 22492: //d = mmuPeekLong (a, f) 22493: // ピークロング 22494: public static int mmuPeekLong (int a, int f) { 22495: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 22496: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 22497: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 22498: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 22499: // 01234567 22500: if (0b01100110 << 24 << f < 0) { //SFC=1,2,5,6。アドレス変換あり 22501: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 22502: if ((a & 3) == 0) { //4の倍数 22503: return (a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0) : -1; 22504: } else if ((a & 1) == 0) { //4の倍数ではない偶数 22505: int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2); 22506: return (((a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0) : -1) << 16 | 22507: ((a + 2 ^ a2) != 1 ? mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2) : 65535)); 22508: } else { //奇数 22509: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 22510: int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2); 22511: return (((a ^ a0) != 1 ? mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0) : -1) << 24 | 22512: ((a + 1 ^ a1) != 1 ? mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1) : 65535) << 8 | 22513: ((a + 3 ^ a3) != 1 ? mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3) : 255)); 22514: } 22515: } else if (f != 7) { //SFC=0,3,4。アドレス変換なし 22516: if ((a & 3) == 0) { //4の倍数 22517: return mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a); 22518: } else if ((a & 1) == 0) { //4の倍数ではない偶数 22519: return (mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPws (a ) << 16 | 22520: mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 2)); 22521: } else { //奇数 22522: return (mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a ) << 24 | 22523: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a + 1) << 8 | 22524: mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a + 3)); 22525: } 22526: } else { 22527: return -1; 22528: } 22529: } //mmuPeekLong(int,int) 22530: 22531: //d = mmuPeekLongData (a, supervisor) 22532: // ピークロング(データ) 22533: public static int mmuPeekLongData (int a, int supervisor) { 22534: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22535: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1,a+2,a+3が必要なので上書き不可 22536: if ((a & 3) == 0) { //4の倍数 22537: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0); 22538: } else if ((a & 1) == 0) { //4の倍数+2 22539: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); 22540: return (((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 | 22541: ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2))); 22542: } else { //奇数 22543: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); 22544: int a3 = mmuTranslatePeek (a + 3, supervisor, 0); 22545: return (((a0 & 1) == 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 24 | 22546: ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 16 | 22547: ((a3 & 1) != 0 ? 255 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a3))); 22548: } 22549: } //mmuPeekLongData(int,int) 22550: 22551: //d = mmuPeekLongEven (a, supervisor) 22552: // ピークロング(偶数) 22553: public static int mmuPeekLongEven (int a, int supervisor) { 22554: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22555: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+2が必要なので上書き不可 22556: if ((a & 2) == 0) { //4の倍数 22557: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0); 22558: } else { //4の倍数+2 22559: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); 22560: return (((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 | 22561: ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2))); 22562: } 22563: } //mmuPeekLongEven(int,int) 22564: 22565: //d = mmuPeekLongFour (a, supervisor) 22566: // ピークロング(4の倍数) 22567: public static int mmuPeekLongFour (int a, int supervisor) { 22568: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22569: a = mmuTranslatePeek (a, supervisor, 0); 22570: return (a & 1) != 0 ? -1 : mm[a >>> XEiJ.BUS_PAGE_BITS].mmdPls (a); 22571: } //mmuPeekLongFour(int,int) 22572: 22573: //d = mmuPeekLongCode (a, supervisor) 22574: // ピークロング(コード) 22575: public static int mmuPeekLongCode (int a, int supervisor) { 22576: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22577: int a0 = mmuTranslatePeek (a, supervisor, 1); //a+2が必要なので上書き不可 22578: if ((a & 2) == 0) { //4の倍数 22579: return (a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0); 22580: } else { //4の倍数+2 22581: int a2 = mmuTranslatePeek (a + 2, supervisor, 1); 22582: return (((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 16 | 22583: ((a2 & 1) != 0 ? 65535 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a2))); 22584: } 22585: } //mmuPeekLongCode(int,int) 22586: 22587: //d = mmuPeekQuad (a, f) 22588: // ピーククワッド 22589: public static long mmuPeekQuad (int a, int f) { 22590: return (long) mmuPeekLong (a, f) << 32 | mmuPeekLong (a + 4, f) & 0xffffffffL; 22591: } //mmuPeekQuad(int,int) 22592: 22593: //d = mmuPeekQuadData (a, supervisor) 22594: // ピーククワッド(データ) 22595: public static long mmuPeekQuadData (int a, int supervisor) { 22596: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22597: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+1,a+2,a+3,a+4,a+5,a+6,a+7が必要なので上書き不可 22598: if ((a & 3) == 0) { //4の倍数 22599: int a4 = mmuTranslatePeek (a + 4, supervisor, 0); //4の倍数 22600: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22601: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22602: } else if ((a & 1) == 0) { //4の倍数+2 22603: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); //4の倍数 22604: int a6 = mmuTranslatePeek (a + 6, supervisor, 0); //4の倍数 22605: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 | 22606: (long) ((a2 & 1) != 0 ? -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L | 22607: (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6))); 22608: } else if ((a & 3) == 1) { //4の倍数+1 22609: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); //4の倍数+2 22610: int a3 = mmuTranslatePeek (a + 3, supervisor, 0); //4の倍数 22611: int a7 = mmuTranslatePeek (a + 7, supervisor, 0); //4の倍数 22612: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 | 22613: (long) ((a1 & 1) != 0 ? 65535 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a1)) << 40 | 22614: (long) ((a3 & 1) != 0 ? -1 : mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a3)) << 8 & 0x000000ffffffff00L | 22615: (long) ((a7 & 1) != 0 ? 255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7))); 22616: } else { //4の倍数+3 22617: int a1 = mmuTranslatePeek (a + 1, supervisor, 0); //4の倍数 22618: int a5 = mmuTranslatePeek (a + 5, supervisor, 0); //4の倍数 22619: int a7 = mmuTranslatePeek (a + 7, supervisor, 0); //4の倍数+2 22620: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPbs (a0)) << 56 | 22621: (long) ((a1 & 1) != 0 ? -1 : mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a1)) << 24 & 0x00ffffffff000000L | 22622: (long) ((a5 & 1) != 0 ? 65535 : mm[a5 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a5)) << 8 | 22623: (long) ((a7 & 1) != 0 ? 255 : mm[a7 >>> XEiJ.BUS_PAGE_BITS].mmdPbz (a7))); 22624: } 22625: } //mmuPeekQuadData(int,int) 22626: 22627: //d = mmuPeekQuadEven (a, supervisor) 22628: // ピーククワッド(偶数) 22629: public static long mmuPeekQuadEven (int a, int supervisor) { 22630: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22631: int a0 = mmuTranslatePeek (a, supervisor, 0); //a+2,a+4,a+6が必要なので上書き不可 22632: if ((a & 2) == 0) { //4の倍数 22633: int a4 = mmuTranslatePeek (a + 4, supervisor, 0); //4の倍数 22634: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22635: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22636: } else { //4の倍数+2 22637: int a2 = mmuTranslatePeek (a + 2, supervisor, 0); //4の倍数 22638: int a6 = mmuTranslatePeek (a + 6, supervisor, 0); //4の倍数 22639: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 | 22640: (long) ((a2 & 1) != 0 ? -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L | 22641: (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6))); 22642: } 22643: } //mmuPeekQuadEven(int,int) 22644: 22645: //d = mmuPeekQuadFour (a, supervisor) 22646: // ピーククワッド(4の倍数) 22647: public static long mmuPeekQuadFour (int a, int supervisor) { 22648: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22649: int a0 = mmuTranslatePeek (a , supervisor, 0); //4の倍数。a+4が必要なので上書き不可 22650: int a4 = mmuTranslatePeek (a + 4, supervisor, 0); //4の倍数 22651: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22652: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22653: } //mmuPeekQuadFour(int,int) 22654: 22655: //d = mmuPeekQuadCode (a, supervisor) 22656: // ピーククワッド(コード) 22657: public static long mmuPeekQuadCode (int a, int supervisor) { 22658: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 22659: int a0 = mmuTranslatePeek (a, supervisor, 1); //a+2,a+4,a+6が必要なので上書き不可 22660: if ((a & 2) == 0) { //4の倍数 22661: int a4 = mmuTranslatePeek (a + 4, supervisor, 1); 22662: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a0)) << 32 | 22663: (long) ((a4 & 1) != 0 ? -1 : mm[a4 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a4)) & 0x00000000ffffffffL); 22664: } else { //4の倍数+2 22665: int a2 = mmuTranslatePeek (a + 2, supervisor, 1); //4の倍数 22666: int a6 = mmuTranslatePeek (a + 6, supervisor, 1); //4の倍数 22667: return ((long) ((a0 & 1) != 0 ? -1 : mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdPws (a0)) << 48 | 22668: (long) ((a2 & 1) != 0 ? -1 : mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdPls (a2)) << 16 & 0x0000ffffffff0000L | 22669: (long) ((a6 & 1) != 0 ? 65535 : mm[a6 >>> XEiJ.BUS_PAGE_BITS].mmdPwz (a6))); 22670: } 22671: } //mmuPeekQuadCode(int,int) 22672: 22673: //mmuPeekExtended (a, b, f) 22674: // ピークエクステンデッド 22675: public static void mmuPeekExtended (int a, byte[] b, int f) { 22676: for (int i = 0; i < 12; i++) { 22677: b[i] = mmuPeekByteSign (a + i, f); 22678: } 22679: } //mmuPeekExtended(int,int,byte[]) 22680: 22681: //len = mmuPeekStrlen (a, l) 22682: public static int mmuPeekStrlen (int a, int l, int supervisor) { 22683: for (int i = 0; i < l; i++) { 22684: if (mmuPeekByteZeroData (a + i, supervisor) == 0) { 22685: return i; 22686: } 22687: } 22688: return l; 22689: } //mmuPeekStrlen(int,int,int) 22690: 22691: //bool = mmuPeekEquals (a, str) 22692: // アドレスaから始まるSJISの文字列とstrをSJISに変換してエスケープシーケンスを展開した文字列を比較する 22693: // 終端の\0まで比較するときはstrに\0を含めること 22694: // \x??で任意のSJISの文字を書ける 22695: // SJISに変換できない文字は'※'とみなす 22696: // スーパーバイザモード比較する 22697: public static boolean mmuPeekEquals (int a, String str) { 22698: int len = str.length (); 22699: for (int i = 0; i < len; i++) { 22700: int c = str.charAt (i); 22701: if (c == '\\') { //エスケープシーケンス。SJIS変換を省略する 22702: int d = i + 1 < len ? str.charAt (i + 1) : -1; //2文字目 22703: if ((d & -4) == '0') { // \[0-3][0-7]{0,2} 22704: c = d & 7; 22705: d = i + 2 < len ? str.charAt (i + 2) : -1; //3文字目 22706: if ((d & -8) == '0') { 22707: c = c << 3 | (d & 7); 22708: d = i + 3 < len ? str.charAt (i + 3) : -1; //4文字目 22709: if ((d & -8) == '0') { 22710: c = c << 3 | (d & 7); 22711: i++; //4文字 22712: } 22713: i++; //3文字 22714: } 22715: i++; //2文字 22716: } else if ((d & -4) == '4') { // \[4-7][0-7]? 22717: c = d & 7; 22718: d = i + 2 < len ? str.charAt (i + 2) : -1; //3文字目 22719: if ((d & -8) == '0') { 22720: c = c << 3 | (d & 7); 22721: i++; //3文字 22722: } 22723: i++; //2文字 22724: } else if (d == 'b') { // \b 22725: c = 0x08; //BS 22726: i++; //2文字 22727: } else if (d == 't') { // \t 22728: c = 0x09; //HT 22729: i++; //2文字 22730: } else if (d == 'n') { // \n 22731: c = 0x0a; //LF 22732: i++; //2文字 22733: } else if (d == 'v') { // \v 22734: c = 0x0b; //VT 22735: i++; //2文字 22736: } else if (d == 'f') { // \f 22737: c = 0x0c; //FF 22738: i++; //2文字 22739: } else if (d == 'r') { // \r 22740: c = 0x0d; //CR 22741: i++; //2文字 22742: } else if (d == 'x' && 22743: i + 3 < len && 22744: CharacterCode.chrIsXdigit (str.charAt (i + 2)) && 22745: CharacterCode.chrIsXdigit (str.charAt (i + 3))) { // \x[0-9A-Fa-f]{2} 22746: c = (CharacterCode.chrDigit (str.charAt (i + 2)) << 4 | 22747: CharacterCode.chrDigit (str.charAt (i + 3))); 22748: i += 3; //4文字 22749: } else if ('!' <= d && d <= '~') { 22750: c = d; 22751: i++; //2文字 22752: } 22753: if (mmuPeekByteZeroData (a++, 1) != c) { 22754: return false; 22755: } 22756: } else { //エスケープシーケンス以外 22757: int s = CharacterCode.chrCharToSJIS[c]; 22758: if (s == 0 && c != 0) { 22759: s = 0x81a6; //'※' 22760: } 22761: if (s >> 8 != 0) { //2バイトコード 22762: if (mmuPeekByteZeroData (a++, 1) != s >> 8) { 22763: return false; 22764: } 22765: } 22766: if (mmuPeekByteZeroData (a++, 1) != (s & 0xff)) { 22767: return false; 22768: } 22769: } 22770: } //for 22771: return true; 22772: } //mmuPeekEquals 22773: 22774: //s = mmuPeekStringL (a, l, supervisor) 22775: //sb = mmuPeekStringL (sb, a, l, supervisor) 22776: // ピークストリング(長さ指定) 22777: // 文字列を読み出す 22778: // 対応する文字がないときは'.'または'※'になる 22779: // 制御コードは'.'になる 22780: public static String mmuPeekStringL (int a, int l, int supervisor) { 22781: return mmuPeekStringL (new StringBuilder (), a, l, supervisor).toString (); 22782: } //mmuPeekStringL(int,int,int) 22783: public static StringBuilder mmuPeekStringL (StringBuilder sb, int a, int l, int supervisor) { 22784: for (int i = 0; i < l; i++) { 22785: int s = mmuPeekByteZeroData (a + i, supervisor); 22786: char c; 22787: if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) { //SJISの2バイトコードの1バイト目 22788: int t = i + 1 < l ? mmuPeekByteZeroData (a + i + 1, supervisor) : 0; 22789: if (0x40 <= t && t != 0x7f && t <= 0xfc) { //SJISの2バイトコードの2バイト目 22790: c = CharacterCode.chrSJISToChar[s << 8 | t]; //2バイトで変換する 22791: if (c == 0) { //対応する文字がない 22792: c = '※'; 22793: } 22794: i++; 22795: } else { //SJISの2バイトコードの2バイト目ではない 22796: c = '.'; //SJISの2バイトコードの1バイト目ではなかった 22797: } 22798: } else { //SJISの2バイトコードの1バイト目ではない 22799: c = CharacterCode.chrSJISToChar[s]; //1バイトで変換する 22800: if (c < 0x20 || c == 0x7f) { //対応する文字がないまたは制御コード 22801: c = '.'; 22802: } 22803: } 22804: sb.append (c); 22805: } 22806: return sb; 22807: } //mmuPeekString(StringBuilder,int,int,int) 22808: 22809: //s = mmuPeekStringZ (a, f) 22810: //sb = mmuPeekStringZ (sb, a, f) 22811: // ピークストリング 22812: // 文字列をSJISからUTF-16に変換しながらメモリから読み出す 22813: // '\0'の手前まで読み出す 22814: // UTF-16に変換できない文字は'\ufffd'になる 22815: public static String mmuPeekStringZ (int a, int f) { 22816: return mmuPeekStringZ (new StringBuilder (), a, f).toString (); 22817: } //mmuPeekStringZ(int,int) 22818: public static StringBuilder mmuPeekStringZ (StringBuilder sb, int a, int f) { 22819: for (;;) { 22820: int s = mmuPeekByteSign (a++, f) & 255; 22821: if (s == 0) { 22822: break; 22823: } 22824: int u; 22825: if (0x81 <= s && s <= 0x9f || 0xe0 <= s && s <= 0xef) { //SJISの2バイトコードの1バイト目 22826: int t = mmuPeekByteSign (a++, f) & 255; 22827: if (t == 0) { 22828: sb.append ('\ufffd'); 22829: break; 22830: } 22831: if (0x40 <= t && t != 0x7f && t <= 0xfc) { //SJISの2バイトコードの2バイト目 22832: t |= s << 8; 22833: u = CharacterCode.chrSJISToChar[t]; //2バイトで変換する 22834: if (u == 0) { //変換できない 22835: u = 0xfffd; 22836: } 22837: } else { //SJISの2バイトコードの2バイト目ではない 22838: u = 0xfffd; 22839: } 22840: } else { //SJISの2バイトコードの1バイト目ではない 22841: u = CharacterCode.chrSJISToChar[s]; //1バイトで変換する 22842: if (u == 0) { //変換できない 22843: u = 0xfffd; 22844: } 22845: } 22846: sb.append ((char) u); 22847: } 22848: return sb; 22849: } //mmuPeekStringZ(StringBuilder,int,int) 22850: 22851: //-------------------------------------------------------------------------------- 22852: //リード 22853: // アドレス変換はリード 22854: // FSLWのRead and WriteはRead 22855: 22856: //d = mmuReadByteSignData (a, supervisor) 22857: // リードバイト符号拡張(データ) 22858: public static byte mmuReadByteSignData (int a, int supervisor) throws M68kException { 22859: if (supervisor != 0) { //スーパーバイザモード 22860: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 22861: int a0 = mmuTranslateReadSuperData (a); 22862: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22863: } else { //ユーザモード 22864: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 22865: int a0 = mmuTranslateReadUserData (a); 22866: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22867: } 22868: } //mmuReadByteSignData(int,int) 22869: 22870: //d = mmuReadByteZeroData (a, supervisor) 22871: // リードバイトゼロ拡張(データ) 22872: public static int mmuReadByteZeroData (int a, int supervisor) throws M68kException { 22873: if (supervisor != 0) { //スーパーバイザモード 22874: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 22875: int a0 = mmuTranslateReadSuperData (a); 22876: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22877: } else { //ユーザモード 22878: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 22879: int a0 = mmuTranslateReadUserData (a); 22880: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22881: } 22882: } //mmuReadByteZeroData(int,int) 22883: 22884: //d = mmuReadByteSignExword (a, supervisor) 22885: // リードバイト符号拡張(拡張ワード) 22886: public static byte mmuReadByteSignExword (int a, int supervisor) throws M68kException { 22887: if (supervisor != 0) { //スーパーバイザモード 22888: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_CODE; 22889: int a0 = mmuTranslateReadSuperCode (a); 22890: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22891: } else { //ユーザモード 22892: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_CODE; 22893: int a0 = mmuTranslateReadUserCode (a); 22894: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22895: } 22896: } //mmuReadByteSignExword(int,int) 22897: 22898: //d = mmuReadByteZeroExword (a, supervisor) 22899: // リードバイトゼロ拡張(拡張ワード) 22900: public static int mmuReadByteZeroExword (int a, int supervisor) throws M68kException { 22901: if (supervisor != 0) { //スーパーバイザモード 22902: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_CODE; 22903: int a0 = mmuTranslateReadSuperCode (a); 22904: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22905: } else { //ユーザモード 22906: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_CODE; 22907: int a0 = mmuTranslateReadUserCode (a); 22908: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22909: } 22910: } //mmuReadByteZeroExword(int,int) 22911: 22912: //d = mmuReadWordSignData (a, supervisor) 22913: // リードワード符号拡張(データ) 22914: public static int mmuReadWordSignData (int a, int supervisor) throws M68kException { 22915: if (supervisor != 0) { //スーパーバイザモード 22916: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22917: int a0 = mmuTranslateReadSuperData (a); //a+1が必要なので上書き不可 22918: if ((a & 1) == 0) { //偶数 22919: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 22920: } else { //奇数 22921: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22922: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22923: int a1 = mmuTranslateReadSuperData (a + 1); //偶数 22924: return (d0 << 8 | 22925: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22926: } 22927: } else { //ユーザモード 22928: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22929: int a0 = mmuTranslateReadUserData (a); //a+1が必要なので上書き不可 22930: if ((a & 1) == 0) { //偶数 22931: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 22932: } else { //奇数 22933: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 22934: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22935: int a1 = mmuTranslateReadUserData (a + 1); //偶数 22936: return (d0 << 8 | 22937: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22938: } 22939: } 22940: } //mmuReadWordSignData(int,int) 22941: 22942: //d = mmuReadWordZeroData (a, supervisor) 22943: // リードワードゼロ拡張(データ) 22944: public static int mmuReadWordZeroData (int a, int supervisor) throws M68kException { 22945: if (supervisor != 0) { //スーパーバイザモード 22946: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22947: int a0 = mmuTranslateReadSuperData (a); //a+1が必要なので上書き不可 22948: if ((a & 1) == 0) { //偶数 22949: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 22950: } else { //奇数 22951: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22952: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22953: int a1 = mmuTranslateReadSuperData (a + 1); //偶数 22954: return (d0 << 8 | 22955: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22956: } 22957: } else { //ユーザモード 22958: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22959: int a0 = mmuTranslateReadUserData (a); //a+1が必要なので上書き不可 22960: if ((a & 1) == 0) { //偶数 22961: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 22962: } else { //奇数 22963: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 22964: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 22965: int a1 = mmuTranslateReadUserData (a + 1); //偶数 22966: return (d0 << 8 | 22967: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 22968: } 22969: } 22970: } //mmuReadWordZeroData(int,int) 22971: 22972: //d = mmuReadWordSignEven (a, supervisor) 22973: // リードワード符号拡張(偶数) 22974: public static int mmuReadWordSignEven (int a, int supervisor) throws M68kException { 22975: if (supervisor != 0) { //スーパーバイザモード 22976: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22977: a = mmuTranslateReadSuperData (a); 22978: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22979: } else { //ユーザモード 22980: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22981: a = mmuTranslateReadUserData (a); 22982: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 22983: } 22984: } //mmuReadWordSignEven(int,int) 22985: 22986: //d = mmuReadWordZeroEven (a, supervisor) 22987: // リードワードゼロ拡張(偶数) 22988: public static int mmuReadWordZeroEven (int a, int supervisor) throws M68kException { 22989: if (supervisor != 0) { //スーパーバイザモード 22990: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 22991: a = mmuTranslateReadSuperData (a); 22992: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22993: } else { //ユーザモード 22994: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 22995: a = mmuTranslateReadUserData (a); 22996: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 22997: } 22998: } //mmuReadWordZeroEven(int,int) 22999: 23000: //d = mmuReadWordSignExword (a, supervisor) 23001: // リードワード符号拡張(拡張ワード) 23002: public static int mmuReadWordSignExword (int a, int supervisor) throws M68kException { 23003: if (supervisor != 0) { //スーパーバイザモード 23004: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 23005: a = mmuTranslateReadSuperCode (a); 23006: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23007: } else { //ユーザモード 23008: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 23009: a = mmuTranslateReadUserCode (a); 23010: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23011: } 23012: } //mmuReadWordSignExword(int,int) 23013: 23014: //d = mmuReadWordZeroExword (a, supervisor) 23015: // リードワードゼロ拡張(拡張ワード) 23016: public static int mmuReadWordZeroExword (int a, int supervisor) throws M68kException { 23017: if (supervisor != 0) { //スーパーバイザモード 23018: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 23019: a = mmuTranslateReadSuperCode (a); 23020: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23021: } else { //ユーザモード 23022: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 23023: a = mmuTranslateReadUserCode (a); 23024: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23025: } 23026: } //mmuReadWordZeroExword(int,int) 23027: 23028: //d = mmuReadWordSignOpword (a, supervisor) 23029: // リードワード符号拡張(命令ワード) 23030: public static int mmuReadWordSignOpword (int a, int supervisor) throws M68kException { 23031: if (supervisor != 0) { //スーパーバイザモード 23032: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 23033: a = mmuTranslateReadSuperCode (a); 23034: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23035: } else { //ユーザモード 23036: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 23037: a = mmuTranslateReadUserCode (a); 23038: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23039: } 23040: } //mmuReadWordSignOpword(int,int) 23041: 23042: //d = mmuReadWordZeroOpword (a, supervisor) 23043: // リードワードゼロ拡張(命令ワード) 23044: public static int mmuReadWordZeroOpword (int a, int supervisor) throws M68kException { 23045: if (supervisor != 0) { //スーパーバイザモード 23046: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_CODE; 23047: a = mmuTranslateReadSuperCode (a); 23048: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1SuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23049: } else { //ユーザモード 23050: m60FSLW = M60_FSLW_IOMA_OPWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_CODE; 23051: a = mmuTranslateReadUserCode (a); 23052: return (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1UserMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23053: } 23054: } //mmuReadWordZeroOpword(int,int) 23055: 23056: //d = mmuReadLongData (a, supervisor) 23057: // リードロング(データ) 23058: public static int mmuReadLongData (int a, int supervisor) throws M68kException { 23059: if (supervisor != 0) { //スーパーバイザモード 23060: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23061: int a0 = mmuTranslateReadSuperData (a); //a+1,a+2,a+3が必要なので上書き不可 23062: if ((a & 3) == 0) { //4の倍数 23063: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23064: } else if ((a & 1) == 0) { //4の倍数+2 23065: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23066: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23067: int a2 = mmuTranslateReadSuperData (a + 2); //偶数 23068: return (d0 << 16 | 23069: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23070: } else { //奇数 23071: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23072: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23073: int a1 = mmuTranslateReadSuperData (a + 1); //偶数 23074: int a3 = mmuTranslateReadSuperData (a + 3); //偶数 23075: return (d0 << 24 | 23076: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 23077: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 23078: } 23079: } else { //ユーザモード 23080: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23081: int a0 = mmuTranslateReadUserData (a); //a+1,a+2,a+3が必要なので上書き不可 23082: if ((a & 3) == 0) { //4の倍数 23083: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23084: } else if ((a & 1) == 0) { //4の倍数+2 23085: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23086: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23087: int a2 = mmuTranslateReadUserData (a + 2); //偶数 23088: return (d0 << 16 | 23089: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23090: } else { //奇数 23091: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23092: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23093: int a1 = mmuTranslateReadUserData (a + 1); //偶数 23094: int a3 = mmuTranslateReadUserData (a + 3); //偶数 23095: return (d0 << 24 | 23096: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 23097: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 23098: } 23099: } 23100: } //mmuReadLongData(int,int) 23101: 23102: //d = mmuReadLongEven (a, supervisor) 23103: // リードロング(偶数) 23104: public static int mmuReadLongEven (int a, int supervisor) throws M68kException { 23105: if (supervisor != 0) { //スーパーバイザモード 23106: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23107: int a0 = mmuTranslateReadSuperData (a); //a+2が必要なので上書き不可 23108: if ((a & 2) == 0) { //4の倍数 23109: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23110: } else { //4の倍数+2 23111: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23112: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23113: int a2 = mmuTranslateReadSuperData (a + 2); //偶数 23114: return (d0 << 16 | 23115: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23116: } 23117: } else { //ユーザモード 23118: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23119: int a0 = mmuTranslateReadUserData (a); //a+2が必要なので上書き不可 23120: if ((a & 2) == 0) { //4の倍数 23121: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23122: } else { //4の倍数+2 23123: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23124: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23125: int a2 = mmuTranslateReadUserData (a + 2); //偶数 23126: return (d0 << 16 | 23127: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23128: } 23129: } 23130: } //mmuReadLongEven(int,int) 23131: 23132: //d = mmuReadLongExword (a, supervisor) 23133: // リードロング(拡張ワード) 23134: public static int mmuReadLongExword (int a, int supervisor) throws M68kException { 23135: if (supervisor != 0) { //スーパーバイザモード 23136: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_CODE; 23137: int a0 = mmuTranslateReadSuperData (a); //a+2が必要なので上書き不可 23138: if ((a & 2) == 0) { //4の倍数 23139: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23140: } else { //4の倍数+2 23141: int a2 = mmuTranslateReadSuperData (a + 2); //偶数 23142: return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 | 23143: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23144: } 23145: } else { //ユーザモード 23146: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_CODE; 23147: int a0 = mmuTranslateReadUserData (a); //a+2が必要なので上書き不可 23148: if ((a & 2) == 0) { //4の倍数 23149: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23150: } else { //4の倍数+2 23151: int a2 = mmuTranslateReadUserData (a + 2); //偶数 23152: return ((DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 16 | 23153: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23154: } 23155: } 23156: } //mmuReadLongExword(int,int) 23157: 23158: //d = mmuReadLongFour (a, supervisor) 23159: // リードロング(4の倍数) 23160: public static int mmuReadLongFour (int a, int supervisor) throws M68kException { 23161: if (supervisor != 0) { //スーパーバイザモード 23162: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23163: a = mmuTranslateReadSuperData (a); 23164: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 23165: } else { //ユーザモード 23166: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23167: a = mmuTranslateReadUserData (a); 23168: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 23169: } 23170: } //mmuReadLongFour(int,int) 23171: 23172: //l = mmuReadQuadData (a, supervisor) 23173: // リードクワッド(データ) 23174: public static long mmuReadQuadData (int a, int supervisor) throws M68kException { 23175: long d; 23176: if (supervisor != 0) { //スーパーバイザモード 23177: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23178: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23179: int t = mmuTranslateReadSuperData (a); 23180: if ((a & 3) == 0) { //4n 23181: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23182: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23183: t = mmuTranslateReadSuperData (a + 4); 23184: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23185: } else if ((a & 1) == 0) { //4n+2 23186: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23187: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23188: t = mmuTranslateReadSuperData (a + 2); 23189: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23190: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23191: t = mmuTranslateReadSuperData (a + 6); 23192: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23193: } else if ((a & 3) == 1) { //4n+1 23194: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23195: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23196: t = mmuTranslateReadSuperData (a + 1); 23197: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23198: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23199: t = mmuTranslateReadSuperData (a + 3); 23200: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23201: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23202: t = mmuTranslateReadSuperData (a + 7); 23203: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23204: } else { // //4n+3 23205: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23206: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23207: t = mmuTranslateReadSuperData (a + 1); 23208: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23209: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23210: t = mmuTranslateReadSuperData (a + 5); 23211: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23212: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23213: t = mmuTranslateReadSuperData (a + 7); 23214: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23215: } 23216: } else { //ユーザモード 23217: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23218: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23219: int t = mmuTranslateReadUserData (a); 23220: if ((a & 3) == 0) { //4n 23221: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23222: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23223: t = mmuTranslateReadUserData (a + 4); 23224: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23225: } else if ((a & 1) == 0) { //4n+2 23226: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23227: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23228: t = mmuTranslateReadUserData (a + 2); 23229: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23230: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23231: t = mmuTranslateReadUserData (a + 6); 23232: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23233: } else if ((a & 3) == 1) { //4n+1 23234: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23235: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23236: t = mmuTranslateReadUserData (a + 1); 23237: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23238: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23239: t = mmuTranslateReadUserData (a + 3); 23240: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23241: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23242: t = mmuTranslateReadUserData (a + 7); 23243: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23244: } else { // //4n+3 23245: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23246: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23247: t = mmuTranslateReadUserData (a + 1); 23248: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23249: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23250: t = mmuTranslateReadUserData (a + 5); 23251: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23252: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23253: t = mmuTranslateReadUserData (a + 7); 23254: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23255: } 23256: } 23257: return d; 23258: } //mmuReadQuadData(int,int) 23259: 23260: //l = mmuReadQuadSecond (a, supervisor) 23261: // リードクワッド(2番目) 23262: // エクステンデッドとラインの2番目で使う 23263: public static long mmuReadQuadSecond (int a, int supervisor) throws M68kException { 23264: long d; 23265: if (supervisor != 0) { //スーパーバイザモード 23266: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23267: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23268: int t = mmuTranslateReadSuperData (a); 23269: if ((a & 3) == 0) { //4n 23270: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23271: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23272: t = mmuTranslateReadSuperData (a + 4); 23273: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23274: } else if ((a & 1) == 0) { //4n+2 23275: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23276: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23277: t = mmuTranslateReadSuperData (a + 2); 23278: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23279: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23280: t = mmuTranslateReadSuperData (a + 6); 23281: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23282: } else if ((a & 3) == 1) { //4n+1 23283: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23284: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23285: t = mmuTranslateReadSuperData (a + 1); 23286: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23287: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23288: t = mmuTranslateReadSuperData (a + 3); 23289: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23290: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23291: t = mmuTranslateReadSuperData (a + 7); 23292: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23293: } else { // //4n+3 23294: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23295: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23296: t = mmuTranslateReadSuperData (a + 1); 23297: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23298: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23299: t = mmuTranslateReadSuperData (a + 5); 23300: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23301: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23302: t = mmuTranslateReadSuperData (a + 7); 23303: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23304: } 23305: } else { //ユーザモード 23306: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23307: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23308: int t = mmuTranslateReadUserData (a); 23309: if ((a & 3) == 0) { //4n 23310: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t); 23311: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23312: t = mmuTranslateReadUserData (a + 4); 23313: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23314: } else if ((a & 1) == 0) { //4n+2 23315: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRws (t); 23316: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23317: t = mmuTranslateReadUserData (a + 2); 23318: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23319: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23320: t = mmuTranslateReadUserData (a + 6); 23321: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23322: } else if ((a & 3) == 1) { //4n+1 23323: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23324: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23325: t = mmuTranslateReadUserData (a + 1); 23326: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23327: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23328: t = mmuTranslateReadUserData (a + 3); 23329: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23330: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23331: t = mmuTranslateReadUserData (a + 7); 23332: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23333: } else { // //4n+3 23334: d = (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbs (t); 23335: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23336: t = mmuTranslateReadUserData (a + 1); 23337: d = d << 32 | (0xffffffffL & (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRls (t)); 23338: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23339: t = mmuTranslateReadUserData (a + 5); 23340: d = d << 16 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); 23341: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23342: t = mmuTranslateReadUserData (a + 7); 23343: d = d << 8 | (long) map[t >>> XEiJ.BUS_PAGE_BITS].mmdRbz (t); 23344: } 23345: } 23346: return d; 23347: } //mmuReadQuadSecond(int,int) 23348: 23349: //l = mmuReadQuadExword (a, supervisor) 23350: // リードクワッド(拡張ワード) 23351: // イミディエイトで使う 23352: public static long mmuReadQuadExword (int a, int supervisor) throws M68kException { 23353: if (supervisor != 0) { //スーパーバイザモード 23354: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_CODE; 23355: int a0 = mmuTranslateReadSuperData (a); //a+2,a+4,a+6が必要なので上書き不可 23356: if ((a & 2) == 0) { //4の倍数 23357: int a4 = mmuTranslateReadSuperData (a + 4); //4の倍数 23358: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 | 23359: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL); 23360: } else { //4の倍数+2 23361: int a2 = mmuTranslateReadSuperData (a + 2); //4の倍数 23362: int a6 = mmuTranslateReadSuperData (a + 6); //4の倍数 23363: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 | 23364: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L | 23365: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6)); 23366: } 23367: } else { //ユーザモード 23368: m60FSLW = M60_FSLW_IOMA_EXWORD | M60_FSLW_RW_READ | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_CODE; 23369: int a0 = mmuTranslateReadUserData (a); //a+2,a+4,a+6が必要なので上書き不可 23370: if ((a & 2) == 0) { //4の倍数 23371: int a4 = mmuTranslateReadUserData (a + 4); //4の倍数 23372: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0) << 32 | 23373: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a4 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a4) & 0x00000000ffffffffL); 23374: } else { //4の倍数+2 23375: int a2 = mmuTranslateReadUserData (a + 2); //4の倍数 23376: int a6 = mmuTranslateReadUserData (a + 6); //4の倍数 23377: return ((long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0) << 48 | 23378: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a2) << 16 & 0x0000ffffffff0000L | 23379: (long) (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a6 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a6)); 23380: } 23381: } 23382: } //mmuReadQuadExword(int,int) 23383: 23384: //-------------------------------------------------------------------------------- 23385: //リードモディファイライトのリード 23386: // アドレス変換はライト 23387: // FSLWのRead and WriteはRead-Modify-Write 23388: 23389: //d = mmuModifyByteSignData (a, supervisor) 23390: // リードモディファイライトのリードバイト符号拡張(データ) 23391: public static byte mmuModifyByteSignData (int a, int supervisor) throws M68kException { 23392: if (supervisor != 0) { //スーパーバイザモード 23393: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 23394: int a0 = mmuTranslateWriteSuperData (a); 23395: return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23396: } else { //ユーザモード 23397: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 23398: int a0 = mmuTranslateWriteUserData (a); 23399: return (a ^ a0) == 1 ? -1 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23400: } 23401: } //mmuModifyByteSignData(int,int) 23402: 23403: //d = mmuModifyByteZeroData (a, supervisor) 23404: // リードモディファイライトのリードバイトゼロ拡張(データ) 23405: public static int mmuModifyByteZeroData (int a, int supervisor) throws M68kException { 23406: if (supervisor != 0) { //スーパーバイザモード 23407: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 23408: int a0 = mmuTranslateWriteSuperData (a); 23409: return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23410: } else { //ユーザモード 23411: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 23412: int a0 = mmuTranslateWriteUserData (a); 23413: return (a ^ a0) == 1 ? 255 : (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23414: } 23415: } //mmuModifyByteZeroData(int,int) 23416: 23417: //d = mmuModifyWordSignData (a, supervisor) 23418: // リードモディファイライトのリードワード符号拡張(データ) 23419: public static int mmuModifyWordSignData (int a, int supervisor) throws M68kException { 23420: if (supervisor != 0) { //スーパーバイザモード 23421: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23422: int a0 = mmuTranslateWriteSuperData (a); //a+1が必要なので上書き不可 23423: if ((a & 1) == 0) { //偶数 23424: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23425: } else { //奇数 23426: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23427: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23428: int a1 = mmuTranslateWriteSuperData (a + 1); //偶数 23429: return (d0 << 8 | 23430: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23431: } 23432: } else { //ユーザモード 23433: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23434: int a0 = mmuTranslateWriteUserData (a); //a+1が必要なので上書き不可 23435: if ((a & 1) == 0) { //偶数 23436: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23437: } else { //奇数 23438: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23439: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23440: int a1 = mmuTranslateWriteUserData (a + 1); //偶数 23441: return (d0 << 8 | 23442: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23443: } 23444: } 23445: } //mmuModifyWordSignData(int,int) 23446: 23447: //d = mmuModifyWordZeroData (a, supervisor) 23448: // リードモディファイライトのリードワードゼロ拡張(データ) 23449: public static int mmuModifyWordZeroData (int a, int supervisor) throws M68kException { 23450: if (supervisor != 0) { //スーパーバイザモード 23451: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23452: int a0 = mmuTranslateWriteSuperData (a); //a+1が必要なので上書き不可 23453: if ((a & 1) == 0) { //偶数 23454: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 23455: } else { //奇数 23456: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23457: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23458: int a1 = mmuTranslateWriteSuperData (a + 1); //偶数 23459: return (d0 << 8 | 23460: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23461: } 23462: } else { //ユーザモード 23463: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23464: int a0 = mmuTranslateWriteUserData (a); //a+1が必要なので上書き不可 23465: if ((a & 1) == 0) { //偶数 23466: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a0); 23467: } else { //奇数 23468: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a0); 23469: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23470: int a1 = mmuTranslateWriteUserData (a + 1); //偶数 23471: return (d0 << 8 | 23472: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a1)); 23473: } 23474: } 23475: } //mmuModifyWordZeroData(int,int) 23476: 23477: //d = mmuModifyWordSignEven (a, supervisor) 23478: // リードモディファイライトのリードワード符号拡張(偶数) 23479: public static int mmuModifyWordSignEven (int a, int supervisor) throws M68kException { 23480: if (supervisor != 0) { //スーパーバイザモード 23481: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23482: a = mmuTranslateWriteSuperData (a); 23483: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23484: } else { //ユーザモード 23485: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23486: a = mmuTranslateWriteUserData (a); 23487: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a); 23488: } 23489: } //mmuModifyWordSignEven(int,int) 23490: 23491: //d = mmuModifyWordZeroEven (a, supervisor) 23492: // リードモディファイライトのリードワードゼロ拡張(偶数) 23493: public static int mmuModifyWordZeroEven (int a, int supervisor) throws M68kException { 23494: if (supervisor != 0) { //スーパーバイザモード 23495: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23496: a = mmuTranslateWriteSuperData (a); 23497: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23498: } else { //ユーザモード 23499: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23500: a = mmuTranslateWriteUserData (a); 23501: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 23502: } 23503: } //mmuModifyWordZeroEven(int,int) 23504: 23505: //d = mmuModifyLongData (a, supervisor) 23506: // リードモディファイライトのリードロング(データ) 23507: public static int mmuModifyLongData (int a, int supervisor) throws M68kException { 23508: if (supervisor != 0) { //スーパーバイザモード 23509: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23510: int a0 = mmuTranslateWriteSuperData (a); //a+1,a+2,a+3が必要なので上書き不可 23511: if ((a & 3) == 0) { //4の倍数 23512: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23513: } else if ((a & 1) == 0) { //4の倍数+2 23514: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23515: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23516: int a2 = mmuTranslateWriteSuperData (a + 2); //偶数 23517: return (d0 << 16 | 23518: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23519: } else { //奇数 23520: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23521: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23522: int a1 = mmuTranslateWriteSuperData (a + 1); //偶数 23523: int a3 = mmuTranslateWriteSuperData (a + 3); //偶数 23524: return (d0 << 24 | 23525: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 23526: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 23527: } 23528: } else { //ユーザモード 23529: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23530: int a0 = mmuTranslateWriteUserData (a); //a+1,a+2,a+3が必要なので上書き不可 23531: if ((a & 3) == 0) { //4の倍数 23532: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23533: } else if ((a & 1) == 0) { //4の倍数+2 23534: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23535: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23536: int a2 = mmuTranslateWriteUserData (a + 2); //偶数 23537: return (d0 << 16 | 23538: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23539: } else { //奇数 23540: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a0); 23541: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23542: int a1 = mmuTranslateWriteUserData (a + 1); //偶数 23543: int a3 = mmuTranslateWriteUserData (a + 3); //偶数 23544: return (d0 << 24 | 23545: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a1 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a1) << 8 | 23546: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a3 >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a3)); 23547: } 23548: } 23549: } //mmuModifyLongData(int,int) 23550: 23551: //d = mmuModifyLongEven (a, supervisor) 23552: // リードモディファイライトのリードロング(偶数) 23553: public static int mmuModifyLongEven (int a, int supervisor) throws M68kException { 23554: if (supervisor != 0) { //スーパーバイザモード 23555: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23556: int a0 = mmuTranslateWriteSuperData (a); //a+2が必要なので上書き不可 23557: if ((a & 2) == 0) { //4の倍数 23558: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23559: } else { //4の倍数+2 23560: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23561: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23562: int a2 = mmuTranslateWriteSuperData (a + 2); //偶数 23563: return (d0 << 16 | 23564: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23565: } 23566: } else { //ユーザモード 23567: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23568: int a0 = mmuTranslateWriteUserData (a); //a+2が必要なので上書き不可 23569: if ((a & 2) == 0) { //4の倍数 23570: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRls (a0); 23571: } else { //4の倍数+2 23572: int d0 = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a0 >>> XEiJ.BUS_PAGE_BITS].mmdRws (a0); 23573: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23574: int a2 = mmuTranslateWriteUserData (a + 2); //偶数 23575: return (d0 << 16 | 23576: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a2 >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a2)); 23577: } 23578: } 23579: } //mmuModifyLongEven(int,int) 23580: 23581: //d = mmuModifyLongFour (a, supervisor) 23582: // リードモディファイライトのリードロング(4の倍数) 23583: public static int mmuModifyLongFour (int a, int supervisor) throws M68kException { 23584: if (supervisor != 0) { //スーパーバイザモード 23585: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23586: a = mmuTranslateWriteSuperData (a); 23587: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 23588: } else { //ユーザモード 23589: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_MODIFY | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23590: a = mmuTranslateWriteUserData (a); 23591: return (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 23592: } 23593: } //mmuModifyLongFour(int,int) 23594: 23595: //-------------------------------------------------------------------------------- 23596: //ポーク 23597: // デバッガ用 23598: // エラーや副作用なしでライトする 23599: 23600: //mmuPokeByte (a, x, f) 23601: // ポークバイト 23602: public static void mmuPokeByte (int a, int x, int f) { 23603: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 23604: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 23605: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 23606: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 23607: // 01234567 23608: if (0b01100110 << 24 << f < 0) { //DFC=1,2,5,6。アドレス変換あり 23609: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 23610: if ((a ^ a0) != 1) { 23611: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x); 23612: } 23613: } else if (f != 7) { //DFC=0,3,4。アドレス変換なし 23614: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a, x); 23615: } 23616: } //mmuPokeByte(int,int,int) 23617: 23618: //mmuPokeByteData (a, d, supervisor) 23619: // ポークバイト(データ) 23620: public static void mmuPokeByteData (int a, int d, int supervisor) { 23621: MemoryMappedDevice[] mm = supervisor != 0 ? DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap : DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23622: int a0 = mmuTranslatePeek (a, supervisor, 0); 23623: if ((a ^ a0) != 1) { 23624: //mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, d); 23625: XEiJ.busVb (a0, d); 23626: } 23627: } //mmuPokeByteData(int,int,int) 23628: 23629: //mmuPokeWord (a, x, f) 23630: // ポークワード 23631: public static void mmuPokeWord (int a, int x, int f) { 23632: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 23633: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 23634: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 23635: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 23636: // 01234567 23637: if (0b01100110 << 24 << f < 0) { //DFC=1,2,5,6。アドレス変換あり 23638: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 23639: if ((a & 1) == 0) { //偶数 23640: if ((a ^ a0) != 1) { 23641: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x); 23642: } 23643: } else { //奇数 23644: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 23645: if ((a ^ a0) != 1) { 23646: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 8); 23647: } 23648: if ((a + 1 ^ a1) != 1) { 23649: mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a1, x ); 23650: } 23651: } 23652: } else if (f != 7) { //DFC=0,3,4。アドレス変換なし 23653: if ((a & 1) == 0) { //偶数 23654: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVw (a, x); 23655: } else { //奇数 23656: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a , x >> 8); 23657: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 1, x ); 23658: } 23659: } 23660: } //mmuPokeWord(int,int,int) 23661: 23662: //mmuPokeWordData (a, d, supervisor) 23663: // ポークワード(データ) 23664: public static void mmuPokeWordData (int a, int d, int supervisor) { 23665: mmuPokeByteData (a, d >> 8, supervisor); 23666: mmuPokeByteData (a + 1, d, supervisor); 23667: } //mmuPokeWordData(int,int,int) 23668: 23669: //mmuPokeLong (a, x, f) 23670: // ポークロング 23671: public static void mmuPokeLong (int a, int x, int f) { 23672: f = f == -1 ? XEiJ.regSRS != 0 ? 5 : 1 : f & 7; 23673: MemoryMappedDevice[] mm = (DataBreakPoint.DBP_ON ? 23674: (f & 4) != 0 ? DataBreakPoint.dbpSuperMap : DataBreakPoint.dbpUserMap : 23675: (f & 4) != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap); 23676: // 01234567 23677: if (0b01100110 << 24 << f < 0) { //DFC=1,2,5,6。アドレス変換あり 23678: int a0 = mmuTranslatePeek (a, f & 4, f & 2); 23679: if ((a & 3) == 0) { //4の倍数 23680: if ((a ^ a0) != 1) { 23681: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVl (a0, x); 23682: } 23683: } else if ((a & 1) == 0) { //4の倍数ではない偶数 23684: int a2 = mmuTranslatePeek (a + 2, f & 4, f & 2); 23685: if ((a ^ a0) != 1) { 23686: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a0, x >> 16); 23687: } 23688: if ((a + 2 ^ a2) != 1) { 23689: mm[a2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a2, x); 23690: } 23691: } else { //奇数 23692: int a1 = mmuTranslatePeek (a + 1, f & 4, f & 2); 23693: int a3 = mmuTranslatePeek (a + 3, f & 4, f & 2); 23694: if ((a ^ a0) != 1) { 23695: mm[a0 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a0, x >> 24); 23696: } 23697: if ((a + 1 ^ a1) != 1) { 23698: mm[a1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a1, x >> 8); 23699: } 23700: if ((a + 3 ^ a3) != 1) { 23701: mm[a3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a3, x); 23702: } 23703: } 23704: } else if (f != 7) { //DFC=0,3,4。アドレス変換なし 23705: if ((a & 3) == 0) { //4の倍数 23706: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVl (a, x); 23707: } else if ((a & 1) == 0) { //4の倍数ではない偶数 23708: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVw (a , x >> 16); 23709: mm[a + 2 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 2, x ); 23710: } else { //奇数 23711: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdVb (a, x >> 24); 23712: mm[a + 1 >>> XEiJ.BUS_PAGE_BITS].mmdVw (a + 1, x >> 8); 23713: mm[a + 3 >>> XEiJ.BUS_PAGE_BITS].mmdVb (a + 3, x ); 23714: } 23715: } 23716: } //mmuPokeLong(int,int,int) 23717: 23718: //mmuPokeLongData (a, d, supervisor) 23719: // ポークロング(データ) 23720: public static void mmuPokeLongData (int a, int d, int supervisor) { 23721: mmuPokeByteData (a, d >> 24, supervisor); 23722: mmuPokeByteData (a + 1, d >> 16, supervisor); 23723: mmuPokeByteData (a + 2, d >> 8, supervisor); 23724: mmuPokeByteData (a + 3, d, supervisor); 23725: } //mmuPokeLongData(int,int,int) 23726: 23727: //mmuPokeQuad (a, x, f) 23728: // ポーククワッド 23729: public static void mmuPokeQuad (int a, long x, int f) { 23730: mmuPokeLong (a , (int) (x >> 32), f); 23731: mmuPokeLong (a + 4, (int) x , f); 23732: } //mmuPokeQuad(int,long,int) 23733: 23734: //mmuPokeExtended (a, b, f) 23735: public static void mmuPokeExtended (int a, byte[] b, int f) { 23736: for (int i = 0; i < 12; i++) { 23737: mmuPokeByte (a + i, b[i], f); 23738: } 23739: } //mmuPokeQuad(int,long,int) 23740: 23741: //a = mmuPokeStringZ (a, str, f) 23742: // ポークストリング 23743: // 文字列をUTF-16からSJISに変換しながらメモリに書き込む 23744: // 文字列に'\0'が含まれるときはその手前まで書き込む 23745: // SJISに変換できない文字は'※'になる 23746: // 最後に'\0'を書き込む 23747: // '\0'を含まない書き込んだ文字列を返す 23748: public static String mmuPokeStringZ (int a, String str, int f) { 23749: StringBuilder sb = new StringBuilder (); 23750: int l = str.length (); 23751: for (int i = 0; i < l; i++) { 23752: int u = str.charAt (i); 23753: if (u == '\0') { 23754: break; 23755: } 23756: int s = CharacterCode.chrCharToSJIS[u]; //SJISに変換する 23757: if (s == 0) { //変換できない 23758: s = 0x81a6; //'※' 23759: } 23760: if (s >> 8 != 0) { 23761: mmuPokeByte (a++, s >> 8, f); 23762: } 23763: mmuPokeByte (a++, s, f); 23764: u = CharacterCode.chrSJISToChar[s]; //UTF-16に変換する 23765: if (u == 0) { //変換できない 23766: u = 0xfffd; 23767: } 23768: sb.append ((char) u); 23769: } 23770: mmuPokeByte (a, 0, f); //'\0' 23771: return sb.toString (); 23772: } //mmuPokeStringZ(int,String,int) 23773: 23774: //-------------------------------------------------------------------------------- 23775: //ライト 23776: // アドレス変換はライト 23777: // FSLWのRead and WriteはWrite 23778: 23779: //mmuWriteByteData (a, d, supervisor) 23780: // ライトバイト符号拡張(データ) 23781: public static void mmuWriteByteData (int a, int d, int supervisor) throws M68kException { 23782: if (supervisor != 0) { //スーパーバイザモード 23783: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_SUPER_DATA; 23784: int t = mmuTranslateWriteSuperData (a); 23785: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23786: } else { //ユーザモード 23787: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | M60_FSLW_TM_USER_DATA; 23788: int t = mmuTranslateWriteUserData (a); 23789: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23790: } 23791: } //mmuWriteByteData(int,int,int) 23792: 23793: //mmuWriteWordData (a, d, supervisor) 23794: // ライトワード符号拡張(データ) 23795: public static void mmuWriteWordData (int a, int d, int supervisor) throws M68kException { 23796: if (supervisor != 0) { //スーパーバイザモード 23797: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23798: int t = mmuTranslateWriteSuperData (a); //a+1が必要なので上書き不可 23799: if ((a & 1) == 0) { //偶数 23800: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23801: } else { //奇数 23802: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8); 23803: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23804: t = mmuTranslateWriteSuperData (a + 1); //偶数 23805: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23806: } 23807: } else { //ユーザモード 23808: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23809: int t = mmuTranslateWriteUserData (a); //a+1が必要なので上書き不可 23810: if ((a & 1) == 0) { //偶数 23811: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23812: } else { //奇数 23813: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 8); 23814: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23815: t = mmuTranslateWriteUserData (a + 1); //偶数 23816: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23817: } 23818: } 23819: } //mmuWriteWordData(int,int,int) 23820: 23821: //mmuWriteWordEven (a, d, supervisor) 23822: // ライトワード符号拡張(偶数) 23823: public static void mmuWriteWordEven (int a, int d, int supervisor) throws M68kException { 23824: if (supervisor != 0) { //スーパーバイザモード 23825: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_SUPER_DATA; 23826: a = mmuTranslateWriteSuperData (a); 23827: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d); 23828: } else { //ユーザモード 23829: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_WORD | M60_FSLW_TM_USER_DATA; 23830: a = mmuTranslateWriteUserData (a); 23831: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, d); 23832: } 23833: } //mmuWriteWordEven(int,int,int) 23834: 23835: //mmuWriteLongData (a, d, supervisor) 23836: // ライトロング(データ) 23837: public static void mmuWriteLongData (int a, int d, int supervisor) throws M68kException { 23838: if (supervisor != 0) { //スーパーバイザモード 23839: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23840: int t = mmuTranslateWriteSuperData (a); //a+1,a+2,a+3が必要なので上書き不可 23841: if ((a & 3) == 0) { //4の倍数 23842: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23843: } else if ((a & 1) == 0) { //4の倍数+2 23844: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23845: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23846: t = mmuTranslateWriteSuperData (a + 2); //偶数 23847: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23848: } else { //奇数 23849: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24); 23850: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23851: t = mmuTranslateWriteSuperData (a + 1); //偶数 23852: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8); 23853: t = mmuTranslateWriteSuperData (a + 3); //偶数 23854: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23855: } 23856: } else { //ユーザモード 23857: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23858: int t = mmuTranslateWriteUserData (a); //a+1,a+2,a+3が必要なので上書き不可 23859: if ((a & 3) == 0) { //4の倍数 23860: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23861: } else if ((a & 1) == 0) { //4の倍数+2 23862: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23863: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23864: t = mmuTranslateWriteUserData (a + 2); //偶数 23865: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23866: } else { //奇数 23867: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d >> 24); 23868: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23869: t = mmuTranslateWriteUserData (a + 1); //偶数 23870: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 8); 23871: t = mmuTranslateWriteUserData (a + 3); //偶数 23872: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, d); 23873: } 23874: } 23875: } //mmuWriteLongData(int,int,int) 23876: 23877: //mmuWriteLongEven (a, d, supervisor) 23878: // ライトロング(偶数) 23879: public static void mmuWriteLongEven (int a, int d, int supervisor) throws M68kException { 23880: if (supervisor != 0) { //スーパーバイザモード 23881: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23882: int t = mmuTranslateWriteSuperData (a); //a+2が必要なので上書き不可 23883: if ((a & 2) == 0) { //4の倍数 23884: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23885: } else { //4の倍数+2 23886: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23887: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23888: t = mmuTranslateWriteSuperData (a + 2); //偶数 23889: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23890: } 23891: } else { //ユーザモード 23892: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23893: int t = mmuTranslateWriteUserData (a); //a+2が必要なので上書き不可 23894: if ((a & 2) == 0) { //4の倍数 23895: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, d); 23896: } else { //4の倍数+2 23897: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d >> 16); 23898: m60FSLW ^= M60_FSLW_IOMA_FIRST ^ M60_FSLW_IOMA_SECOND; 23899: t = mmuTranslateWriteUserData (a + 2); //偶数 23900: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, d); 23901: } 23902: } 23903: } //mmuWriteLongEven(int,int,int) 23904: 23905: //mmuWriteLongFour (a, d, supervisor) 23906: // ライトロング(4の倍数) 23907: public static void mmuWriteLongFour (int a, int d, int supervisor) throws M68kException { 23908: if (supervisor != 0) { //スーパーバイザモード 23909: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_SUPER_DATA; 23910: a = mmuTranslateWriteSuperData (a); 23911: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d); 23912: } else { //ユーザモード 23913: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_LONG | M60_FSLW_TM_USER_DATA; 23914: a = mmuTranslateWriteUserData (a); 23915: (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap)[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, d); 23916: } 23917: } //mmuWriteLongFour(int,int,int) 23918: 23919: //mmuWriteQuadData (a, d, supervisor) 23920: // ライトクワッド(データ) 23921: public static void mmuWriteQuadData (int a, long d, int supervisor) throws M68kException { 23922: if (supervisor != 0) { //スーパーバイザモード 23923: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 23924: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23925: int t = mmuTranslateWriteSuperData (a); 23926: if ((a & 3) == 0) { //4n 23927: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 23928: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23929: t = mmuTranslateWriteSuperData (a + 4); 23930: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 23931: } else if ((a & 1) == 0) { //4n+2 23932: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 23933: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23934: t = mmuTranslateWriteSuperData (a + 2); 23935: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 23936: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23937: t = mmuTranslateWriteSuperData (a + 6); 23938: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 23939: } else if ((a & 3) == 1) { //4n+1 23940: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23941: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23942: t = mmuTranslateWriteSuperData (a + 1); 23943: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 23944: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23945: t = mmuTranslateWriteSuperData (a + 3); 23946: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 23947: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23948: t = mmuTranslateWriteSuperData (a + 7); 23949: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23950: } else { //4n+3 23951: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23952: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23953: t = mmuTranslateWriteSuperData (a + 1); 23954: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 23955: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23956: t = mmuTranslateWriteSuperData (a + 5); 23957: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 23958: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 23959: t = mmuTranslateWriteSuperData (a + 7); 23960: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23961: } 23962: } else { //ユーザモード 23963: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 23964: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23965: int t = mmuTranslateWriteUserData (a); 23966: if ((a & 3) == 0) { //4n 23967: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 23968: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23969: t = mmuTranslateWriteUserData (a + 4); 23970: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 23971: } else if ((a & 1) == 0) { //4n+2 23972: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 23973: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23974: t = mmuTranslateWriteUserData (a + 2); 23975: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 23976: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23977: t = mmuTranslateWriteUserData (a + 6); 23978: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 23979: } else if ((a & 3) == 1) { //4n+1 23980: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23981: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23982: t = mmuTranslateWriteUserData (a + 1); 23983: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 23984: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23985: t = mmuTranslateWriteUserData (a + 3); 23986: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 23987: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23988: t = mmuTranslateWriteUserData (a + 7); 23989: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 23990: } else { //4n+3 23991: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 23992: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23993: t = mmuTranslateWriteUserData (a + 1); 23994: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 23995: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23996: t = mmuTranslateWriteUserData (a + 5); 23997: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 23998: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 23999: t = mmuTranslateWriteUserData (a + 7); 24000: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 24001: } 24002: } 24003: } //mmuWriteQuadData(int,long,int) 24004: 24005: //mmuWriteQuadSecond (a, d, supervisor) 24006: // ライトクワッド(2番目) 24007: // エクステンデッドとラインの2番目で使う 24008: public static void mmuWriteQuadSecond (int a, long d, int supervisor) throws M68kException { 24009: if (supervisor != 0) { //スーパーバイザモード 24010: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 24011: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24012: int t = mmuTranslateWriteSuperData (a); 24013: if ((a & 3) == 0) { //4n 24014: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 24015: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24016: t = mmuTranslateWriteSuperData (a + 4); 24017: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 24018: } else if ((a & 1) == 0) { //4n+2 24019: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 24020: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24021: t = mmuTranslateWriteSuperData (a + 2); 24022: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 24023: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24024: t = mmuTranslateWriteSuperData (a + 6); 24025: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 24026: } else if ((a & 3) == 1) { //4n+1 24027: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 24028: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24029: t = mmuTranslateWriteSuperData (a + 1); 24030: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 24031: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24032: t = mmuTranslateWriteSuperData (a + 3); 24033: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 24034: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24035: t = mmuTranslateWriteSuperData (a + 7); 24036: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 24037: } else { //4n+3 24038: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 24039: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24040: t = mmuTranslateWriteSuperData (a + 1); 24041: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 24042: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24043: t = mmuTranslateWriteSuperData (a + 5); 24044: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 24045: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_SUPER_DATA; 24046: t = mmuTranslateWriteSuperData (a + 7); 24047: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 24048: } 24049: } else { //ユーザモード 24050: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 24051: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24052: int t = mmuTranslateWriteUserData (a); 24053: if ((a & 3) == 0) { //4n 24054: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 32)); 24055: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24056: t = mmuTranslateWriteUserData (a + 4); 24057: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) d); 24058: } else if ((a & 1) == 0) { //4n+2 24059: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 48)); 24060: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24061: t = mmuTranslateWriteUserData (a + 2); 24062: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 16)); 24063: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24064: t = mmuTranslateWriteUserData (a + 6); 24065: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) d); 24066: } else if ((a & 3) == 1) { //4n+1 24067: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 24068: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24069: t = mmuTranslateWriteUserData (a + 1); 24070: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 40)); 24071: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24072: t = mmuTranslateWriteUserData (a + 3); 24073: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 8)); 24074: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24075: t = mmuTranslateWriteUserData (a + 7); 24076: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 24077: } else { //4n+3 24078: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) (d >> 56)); 24079: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24080: t = mmuTranslateWriteUserData (a + 1); 24081: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWl (t, (int) (d >> 24)); 24082: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24083: t = mmuTranslateWriteUserData (a + 5); 24084: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWw (t, (int) (d >> 8)); 24085: m60FSLW = M60_FSLW_IOMA_SECOND | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_QUAD | M60_FSLW_TM_USER_DATA; 24086: t = mmuTranslateWriteUserData (a + 7); 24087: map[t >>> XEiJ.BUS_PAGE_BITS].mmdWb (t, (int) d); 24088: } 24089: } 24090: } //mmuWriteQuadSecond(int,int,int) 24091: 24092: 24093: 24094: //mmuReadByteArray (address, array, offset, length, supervisor) 24095: // リードバイト配列。先頭から読み出す 24096: // address 先頭アドレス 24097: // array バイト配列 24098: // offset 先頭オフセット 24099: // length バイト数 24100: public static void mmuReadByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException { 24101: if (false) { //1バイトずつmmuReadByteSignDataを呼び出す 24102: for (int index = 0; index < length; index++) { 24103: array[offset + index] = mmuReadByteSignData (address + index, supervisor); 24104: } 24105: } else { 24106: // 変換後アドレスは0 24107: // デバイスはnull 24108: // while 残りが1バイト以上 24109: // if ページの先頭 24110: // デバイスはnull 24111: // if アドレスが4nかつ残りが4バイト以上 24112: // FSLWはリードロング 24113: // if デバイスがnull 24114: // 変換後アドレスを求める 24115: // デバイスを求める 24116: // リードロング 24117: // elif アドレスが2nかつ残りが2バイト以上 24118: // FSLWはリードワード 24119: // if デバイスがnull 24120: // 変換後アドレスを求める 24121: // デバイスを求める 24122: // リードワード 24123: // else 24124: // FSLWはリードバイト 24125: // if デバイスがnull 24126: // 変換後アドレスを求める 24127: // デバイスを求める 24128: // リードバイト 24129: // endwhile 24130: length += offset; //lengthはoffsetの上限 24131: final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1; 24132: if (supervisor != 0) { //スーパーバイザモード 24133: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 24134: int translated = 0; //変換後アドレスは0 24135: MemoryMappedDevice device = null; //デバイスはnull 24136: while (offset < length) { //残りが1バイト以上 24137: if ((address & mask) == 0) { //ページの先頭 24138: device = null; //デバイスはnull 24139: } 24140: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 24141: m60FSLW = (M60_FSLW_IOMA_FIRST | 24142: M60_FSLW_RW_READ | 24143: M60_FSLW_SIZE_LONG | 24144: M60_FSLW_TM_SUPER_DATA); //FSLWはリードロング 24145: if (device == null) { //デバイスがnull 24146: translated = mmuTranslateReadSuperData (address); //変換後アドレスを求める 24147: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24148: } 24149: int data = device.mmdRls (translated); //リードロング 24150: array[offset] = (byte) (data >> 24); 24151: array[offset + 1] = (byte) (data >> 16); 24152: array[offset + 2] = (byte) (data >> 8); 24153: array[offset + 3] = (byte) data; 24154: address += 4; 24155: translated += 4; 24156: offset += 4; 24157: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 24158: m60FSLW = (M60_FSLW_IOMA_FIRST | 24159: M60_FSLW_RW_READ | 24160: M60_FSLW_SIZE_WORD | 24161: M60_FSLW_TM_SUPER_DATA); //FSLWはリードワード 24162: if (device == null) { //デバイスがnull 24163: translated = mmuTranslateReadSuperData (address); //変換後アドレスを求める 24164: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24165: } 24166: int data = device.mmdRws (translated); //リードワード 24167: array[offset] = (byte) (data >> 8); 24168: array[offset + 1] = (byte) data; 24169: address += 2; 24170: translated += 2; 24171: offset += 2; 24172: } else { 24173: m60FSLW = (M60_FSLW_IOMA_FIRST | 24174: M60_FSLW_RW_READ | 24175: M60_FSLW_SIZE_BYTE | 24176: M60_FSLW_TM_SUPER_DATA); //FSLWはリードバイト 24177: if (device == null) { //デバイスがnull 24178: translated = mmuTranslateReadSuperData (address); //変換後アドレスを求める 24179: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24180: } 24181: array[offset] = device.mmdRbs (translated); //リードバイト 24182: address++; 24183: translated++; 24184: offset++; 24185: } 24186: } //while 24187: } else { //ユーザモード 24188: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 24189: int translated = 0; //変換後アドレスは0 24190: MemoryMappedDevice device = null; //デバイスはnull 24191: while (offset < length) { //残りが1バイト以上 24192: if ((address & mask) == 0) { //ページの先頭 24193: device = null; //デバイスはnull 24194: } 24195: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 24196: m60FSLW = (M60_FSLW_IOMA_FIRST | 24197: M60_FSLW_RW_READ | 24198: M60_FSLW_SIZE_LONG | 24199: M60_FSLW_TM_USER_DATA); //FSLWはリードロング 24200: if (device == null) { //デバイスがnull 24201: translated = mmuTranslateReadUserData (address); //変換後アドレスを求める 24202: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24203: } 24204: int data = device.mmdRls (translated); //リードロング 24205: array[offset] = (byte) (data >> 24); 24206: array[offset + 1] = (byte) (data >> 16); 24207: array[offset + 2] = (byte) (data >> 8); 24208: array[offset + 3] = (byte) data; 24209: address += 4; 24210: translated += 4; 24211: offset += 4; 24212: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 24213: m60FSLW = (M60_FSLW_IOMA_FIRST | 24214: M60_FSLW_RW_READ | 24215: M60_FSLW_SIZE_WORD | 24216: M60_FSLW_TM_USER_DATA); //FSLWはリードワード 24217: if (device == null) { //デバイスがnull 24218: translated = mmuTranslateReadUserData (address); //変換後アドレスを求める 24219: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24220: } 24221: int data = device.mmdRws (translated); //リードワード 24222: array[offset] = (byte) (data >> 8); 24223: array[offset + 1] = (byte) data; 24224: address += 2; 24225: translated += 2; 24226: offset += 2; 24227: } else { 24228: m60FSLW = (M60_FSLW_IOMA_FIRST | 24229: M60_FSLW_RW_READ | 24230: M60_FSLW_SIZE_BYTE | 24231: M60_FSLW_TM_USER_DATA); //FSLWはリードバイト 24232: if (device == null) { //デバイスがnull 24233: translated = mmuTranslateReadUserData (address); //変換後アドレスを求める 24234: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24235: } 24236: array[offset] = device.mmdRbs (translated); //リードバイト 24237: address++; 24238: translated++; 24239: offset++; 24240: } 24241: } //while 24242: } 24243: } 24244: } //mmuReadByteArray 24245: 24246: //mmuWriteByteArray (address, array, offset, length, supervisor) 24247: // ライトバイト配列。先頭から書き込む 24248: // address 先頭アドレス 24249: // array バイト配列 24250: // offset 先頭オフセット 24251: // length バイト数 24252: public static void mmuWriteByteArray (int address, byte[] array, int offset, int length, int supervisor) throws M68kException { 24253: if (false) { //1バイトずつmmuWriteByteDataを呼び出す 24254: for (int index = 0; index < length; index++) { 24255: mmuWriteByteData (address + index, array[offset + index], supervisor); 24256: } 24257: } else { 24258: // 変換後アドレスは0 24259: // デバイスはnull 24260: // while 残りが1バイト以上 24261: // if ページの先頭 24262: // デバイスはnull 24263: // if アドレスが4nかつ残りが4バイト以上 24264: // FSLWはライトロング 24265: // if デバイスがnull 24266: // 変換後アドレスを求める 24267: // デバイスを求める 24268: // ライトロング 24269: // elif アドレスが2nかつ残りが2バイト以上 24270: // FSLWはライトワード 24271: // if デバイスがnull 24272: // 変換後アドレスを求める 24273: // デバイスを求める 24274: // ライトワード 24275: // else 24276: // FSLWはライトバイト 24277: // if デバイスがnull 24278: // 変換後アドレスを求める 24279: // デバイスを求める 24280: // ライトバイト 24281: // endwhile 24282: length += offset; //lengthはoffsetの上限 24283: final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1; 24284: if (supervisor != 0) { //スーパーバイザモード 24285: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 24286: int translated = 0; //変換後アドレスは0 24287: MemoryMappedDevice device = null; //デバイスはnull 24288: while (offset < length) { //残りが1バイト以上 24289: if ((address & mask) == 0) { //ページの先頭 24290: device = null; //デバイスはnull 24291: } 24292: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 24293: m60FSLW = (M60_FSLW_IOMA_FIRST | 24294: M60_FSLW_RW_WRITE | 24295: M60_FSLW_SIZE_LONG | 24296: M60_FSLW_TM_SUPER_DATA); //FSLWはライトロング 24297: if (device == null) { //デバイスがnull 24298: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24299: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24300: } 24301: device.mmdWl (translated, 24302: array[offset] << 24 | 24303: (0xff & array[offset + 1]) << 16 | 24304: (0xff & array[offset + 2]) << 8 | 24305: (0xff & array[offset + 3])); //ライトロング 24306: address += 4; 24307: translated += 4; 24308: offset += 4; 24309: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 24310: m60FSLW = (M60_FSLW_IOMA_FIRST | 24311: M60_FSLW_RW_WRITE | 24312: M60_FSLW_SIZE_WORD | 24313: M60_FSLW_TM_SUPER_DATA); //FSLWはライトワード 24314: if (device == null) { //デバイスがnull 24315: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24316: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24317: } 24318: device.mmdWw (translated, 24319: array[offset] << 8 | 24320: (0xff & array[offset + 1])); //ライトワード 24321: address += 2; 24322: translated += 2; 24323: offset += 2; 24324: } else { 24325: m60FSLW = (M60_FSLW_IOMA_FIRST | 24326: M60_FSLW_RW_WRITE | 24327: M60_FSLW_SIZE_BYTE | 24328: M60_FSLW_TM_SUPER_DATA); //FSLWはライトバイト 24329: if (device == null) { //デバイスがnull 24330: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24331: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24332: } 24333: device.mmdWb (translated, array[offset]); //ライトバイト 24334: address++; 24335: translated++; 24336: offset++; 24337: } 24338: } //while 24339: } else { //ユーザモード 24340: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 24341: int translated = 0; //変換後アドレスは0 24342: MemoryMappedDevice device = null; //デバイスはnull 24343: while (offset < length) { //残りが1バイト以上 24344: if ((address & mask) == 0) { //ページの先頭 24345: device = null; //デバイスはnull 24346: } 24347: if ((address & 3) == 0 && offset + 4 <= length) { //アドレスが4nかつ残りが4バイト以上 24348: m60FSLW = (M60_FSLW_IOMA_FIRST | 24349: M60_FSLW_RW_WRITE | 24350: M60_FSLW_SIZE_LONG | 24351: M60_FSLW_TM_USER_DATA); //FSLWはライトロング 24352: if (device == null) { //デバイスがnull 24353: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24354: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24355: } 24356: device.mmdWl (translated, 24357: array[offset] << 24 | 24358: (0xff & array[offset + 1]) << 16 | 24359: (0xff & array[offset + 2]) << 8 | 24360: (0xff & array[offset + 3])); //ライトロング 24361: address += 4; 24362: translated += 4; 24363: offset += 4; 24364: } else if ((address & 1) == 0 && offset + 2 <= length) { //アドレスが2nかつ残りが2バイト以上 24365: m60FSLW = (M60_FSLW_IOMA_FIRST | 24366: M60_FSLW_RW_WRITE | 24367: M60_FSLW_SIZE_WORD | 24368: M60_FSLW_TM_USER_DATA); //FSLWはライトワード 24369: if (device == null) { //デバイスがnull 24370: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24371: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24372: } 24373: device.mmdWw (translated, 24374: array[offset] << 8 | 24375: (0xff & array[offset + 1])); //ライトワード 24376: address += 2; 24377: translated += 2; 24378: offset += 2; 24379: } else { 24380: m60FSLW = (M60_FSLW_IOMA_FIRST | 24381: M60_FSLW_RW_WRITE | 24382: M60_FSLW_SIZE_BYTE | 24383: M60_FSLW_TM_USER_DATA); //FSLWはライトバイト 24384: if (device == null) { //デバイスがnull 24385: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24386: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24387: } 24388: device.mmdWb (translated, array[offset]); //ライトバイト 24389: address++; 24390: translated++; 24391: offset++; 24392: } 24393: } //while 24394: } 24395: } 24396: } //mmuWriteByteArray 24397: 24398: //mmuWriteByteArrayDecrement (address, array, offset, length, supervisor) 24399: // ライトバイト配列デクリメント。末尾から書き込む 24400: // address 先頭アドレス 24401: // array バイト配列 24402: // offset 先頭オフセット 24403: // length バイト数 24404: public static void mmuWriteByteArrayDecrement (int address, byte[] array, int offset, int length, int supervisor) throws M68kException { 24405: if (false) { //1バイトずつmmuWriteByteDataを呼び出す 24406: for (int index = length - 1; 0 <= index; index--) { 24407: mmuWriteByteData (address + index, array[offset + index], supervisor); 24408: } 24409: } else { 24410: // 変換後アドレスは0 24411: // デバイスはnull 24412: // while 残りが1バイト以上 24413: // if ページの先頭 24414: // デバイスはnull 24415: // if アドレスが4nかつ残りが4バイト以上 24416: // FSLWはライトロング 24417: // if デバイスがnull 24418: // 変換後アドレスを求める 24419: // デバイスを求める 24420: // ライトロング 24421: // elif アドレスが2nかつ残りが2バイト以上 24422: // FSLWはライトワード 24423: // if デバイスがnull 24424: // 変換後アドレスを求める 24425: // デバイスを求める 24426: // ライトワード 24427: // else 24428: // FSLWはライトバイト 24429: // if デバイスがnull 24430: // 変換後アドレスを求める 24431: // デバイスを求める 24432: // ライトバイト 24433: // endwhile 24434: address += length; //addressはaddressの上限 24435: offset += length; //offsetはoffsetの上限 24436: length = offset - length; //lengthはoffsetの下限 24437: final int mask = Math.min (XEiJ.BUS_PAGE_SIZE, mmuPageSize) - 1; 24438: if (supervisor != 0) { //スーパーバイザモード 24439: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 24440: int translated = 0; //変換後アドレスは0 24441: MemoryMappedDevice device = null; //デバイスはnull 24442: while (length < offset) { //残りが1バイト以上 24443: if ((address & mask) == 0) { //ページの先頭 24444: device = null; //デバイスはnull 24445: } 24446: if ((address & 3) == 0 && length <= offset - 4) { //アドレスが4nかつ残りが4バイト以上 24447: m60FSLW = (M60_FSLW_IOMA_FIRST | 24448: M60_FSLW_RW_WRITE | 24449: M60_FSLW_SIZE_LONG | 24450: M60_FSLW_TM_SUPER_DATA); //FSLWはライトロング 24451: address -= 4; 24452: translated -= 4; 24453: offset -= 4; 24454: if (device == null) { //デバイスがnull 24455: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24456: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24457: } 24458: device.mmdWl (translated, 24459: array[offset] << 24 | 24460: (0xff & array[offset + 1]) << 16 | 24461: (0xff & array[offset + 2]) << 8 | 24462: (0xff & array[offset + 3])); //ライトロング 24463: } else if ((address & 1) == 0 && length <= offset - 2) { //アドレスが2nかつ残りが2バイト以上 24464: m60FSLW = (M60_FSLW_IOMA_FIRST | 24465: M60_FSLW_RW_WRITE | 24466: M60_FSLW_SIZE_WORD | 24467: M60_FSLW_TM_SUPER_DATA); //FSLWはライトワード 24468: address -= 2; 24469: translated -= 2; 24470: offset -= 2; 24471: if (device == null) { //デバイスがnull 24472: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24473: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24474: } 24475: device.mmdWw (translated, 24476: array[offset] << 8 | 24477: (0xff & array[offset + 1])); //ライトワード 24478: } else { 24479: m60FSLW = (M60_FSLW_IOMA_FIRST | 24480: M60_FSLW_RW_WRITE | 24481: M60_FSLW_SIZE_BYTE | 24482: M60_FSLW_TM_SUPER_DATA); //FSLWはライトバイト 24483: address--; 24484: translated--; 24485: offset--; 24486: if (device == null) { //デバイスがnull 24487: translated = mmuTranslateWriteSuperData (address); //変換後アドレスを求める 24488: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24489: } 24490: device.mmdWb (translated, array[offset]); //ライトバイト 24491: } 24492: } //while 24493: } else { //ユーザモード 24494: final MemoryMappedDevice[] map = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 24495: int translated = 0; //変換後アドレスは0 24496: MemoryMappedDevice device = null; //デバイスはnull 24497: while (length < offset) { //残りが1バイト以上 24498: if ((address & mask) == 0) { //ページの先頭 24499: device = null; //デバイスはnull 24500: } 24501: if ((address & 3) == 0 && length <= offset - 4) { //アドレスが4nかつ残りが4バイト以上 24502: m60FSLW = (M60_FSLW_IOMA_FIRST | 24503: M60_FSLW_RW_WRITE | 24504: M60_FSLW_SIZE_LONG | 24505: M60_FSLW_TM_USER_DATA); //FSLWはライトロング 24506: address -= 4; 24507: translated -= 4; 24508: offset -= 4; 24509: if (device == null) { //デバイスがnull 24510: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24511: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24512: } 24513: device.mmdWl (translated, 24514: array[offset] << 24 | 24515: (0xff & array[offset + 1]) << 16 | 24516: (0xff & array[offset + 2]) << 8 | 24517: (0xff & array[offset + 3])); //ライトロング 24518: } else if ((address & 1) == 0 && length <= offset - 2) { //アドレスが2nかつ残りが2バイト以上 24519: m60FSLW = (M60_FSLW_IOMA_FIRST | 24520: M60_FSLW_RW_WRITE | 24521: M60_FSLW_SIZE_WORD | 24522: M60_FSLW_TM_USER_DATA); //FSLWはライトワード 24523: address -= 2; 24524: translated -= 2; 24525: offset -= 2; 24526: if (device == null) { //デバイスがnull 24527: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24528: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24529: } 24530: device.mmdWw (translated, 24531: array[offset] << 8 | 24532: (0xff & array[offset + 1])); //ライトワード 24533: } else { 24534: m60FSLW = (M60_FSLW_IOMA_FIRST | 24535: M60_FSLW_RW_WRITE | 24536: M60_FSLW_SIZE_BYTE | 24537: M60_FSLW_TM_USER_DATA); //FSLWはライトバイト 24538: address--; 24539: translated--; 24540: offset--; 24541: if (device == null) { //デバイスがnull 24542: translated = mmuTranslateWriteUserData (address); //変換後アドレスを求める 24543: device = map[translated >>> XEiJ.BUS_PAGE_BITS]; //デバイスを求める 24544: } 24545: device.mmdWb (translated, array[offset]); //ライトバイト 24546: } 24547: } //while 24548: } 24549: } 24550: } //mmuWriteByteArrayDecrement 24551: 24552: 24553: 24554: //-------------------------------------------------------------------------------- 24555: //アドレス変換 24556: 24557: //pa = mmuLoadPhysicalAddressRead (a) 24558: // PLPAR (An) 24559: // DFCに従って論理アドレスを物理アドレスに変換する(リードアクセス) 24560: // DFC 1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令 24561: // pa 物理アドレス 24562: // a 論理アドレス 24563: public static int mmuLoadPhysicalAddressRead (int a) throws M68kException { 24564: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_READ | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16; 24565: return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ? 24566: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadSuperCode (a) : mmuTranslateReadSuperData (a) : 24567: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateReadUserCode (a) : mmuTranslateReadUserData (a)); 24568: } //mmuLoadPhysicalAddressRead(int) 24569: 24570: //pa = mmuLoadPhysicalAddressWrite (a) 24571: // PLPAW (An) 24572: // DFCに従って論理アドレスを物理アドレスに変換する(ライトアクセス) 24573: // DFC 1=ユーザデータ,2=ユーザ命令,5=スーパーバイザデータ,6=スーパーバイザ命令 24574: // pa 物理アドレス 24575: // a 論理アドレス 24576: public static int mmuLoadPhysicalAddressWrite (int a) throws M68kException { 24577: m60FSLW = M60_FSLW_IOMA_FIRST | M60_FSLW_RW_WRITE | M60_FSLW_SIZE_BYTE | XEiJ.mpuDFC << 16; 24578: return ((0b10011111 << 24 << XEiJ.mpuDFC) < 0 ? 24579: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteSuperCode (a) : mmuTranslateWriteSuperData (a) : 24580: (0b00101010 << 24 << XEiJ.mpuDFC) < 0 ? mmuTranslateWriteUserCode (a) : mmuTranslateWriteUserData (a)); 24581: } //mmuLoadPhysicalAddressWrite(int) 24582: 24583: //pa = mmuTranslateReadUserData (a) 24584: // アドレス変換を行う(リードユーザデータ) 24585: // pa 物理アドレス 24586: // a 論理アドレス 24587: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24588: public static int mmuTranslateReadUserData (int a) throws M68kException { 24589: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24590: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24591: if (mmuUserDataCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24592: if (CAT_ON) { 24593: catCM = (mmuUserDataCache[head + 3] >> 5) & 3; //キャッシュモード 24594: } 24595: return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24596: } 24597: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24598: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24599: for (int i = head + 4; i <= tail; i += 4) { 24600: if (mmuUserDataCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24601: //int logicalRead = mmuUserDataCache[i ]; 24602: int logicalWrite = mmuUserDataCache[i + 1]; 24603: int physicalPage = mmuUserDataCache[i + 2]; 24604: int flag = mmuUserDataCache[i + 3]; 24605: for (; i > head; i -= 4) { 24606: mmuUserDataCache[i ] = mmuUserDataCache[i - 4]; 24607: mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3]; 24608: mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2]; 24609: mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1]; 24610: } 24611: mmuUserDataCache[i ] = logicalPage; //logicalRead 24612: mmuUserDataCache[i + 1] = logicalWrite; 24613: mmuUserDataCache[i + 2] = physicalPage; 24614: mmuUserDataCache[i + 3] = flag; 24615: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24616: } 24617: } //for i 24618: } 24619: return mmuTranslateCommon (a, false, false, false); 24620: } //mmuTranslateReadUserData(int) 24621: 24622: //pa = mmuTranslateReadUserCode (a) 24623: // アドレス変換を行う(リードユーザコード) 24624: // pa 物理アドレス 24625: // a 論理アドレス 24626: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24627: public static int mmuTranslateReadUserCode (int a) throws M68kException { 24628: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24629: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24630: if (mmuUserCodeCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24631: if (CAT_ON) { 24632: catCM = (mmuUserCodeCache[head + 3] >> 5) & 3; //キャッシュモード 24633: } 24634: return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24635: } 24636: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24637: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24638: for (int i = head + 4; i <= tail; i += 4) { 24639: if (mmuUserCodeCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24640: //int logicalRead = mmuUserCodeCache[i ]; 24641: int logicalWrite = mmuUserCodeCache[i + 1]; 24642: int physicalPage = mmuUserCodeCache[i + 2]; 24643: int flag = mmuUserCodeCache[i + 3]; 24644: for (; i > head; i -= 4) { 24645: mmuUserCodeCache[i ] = mmuUserCodeCache[i - 4]; 24646: mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3]; 24647: mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2]; 24648: mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1]; 24649: } 24650: mmuUserCodeCache[head ] = logicalPage; //logicalRead 24651: mmuUserCodeCache[head + 1] = logicalWrite; 24652: mmuUserCodeCache[head + 2] = physicalPage; 24653: mmuUserCodeCache[head + 3] = flag; 24654: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24655: } 24656: } //for i 24657: } 24658: return mmuTranslateCommon (a, false, false, true); 24659: } //mmuTranslateReadUserCode(int) 24660: 24661: //pa = mmuTranslateReadSuperData (a) 24662: // アドレス変換を行う(リードスーパーバイザデータ) 24663: // pa 物理アドレス 24664: // a 論理アドレス 24665: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24666: public static int mmuTranslateReadSuperData (int a) throws M68kException { 24667: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24668: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24669: if (mmuSuperDataCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24670: if (CAT_ON) { 24671: catCM = (mmuSuperDataCache[head + 3] >> 5) & 3; //キャッシュモード 24672: } 24673: return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24674: } 24675: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24676: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24677: for (int i = head + 4; i <= tail; i += 4) { 24678: if (mmuSuperDataCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24679: //int logicalRead = mmuSuperDataCache[i ]; 24680: int logicalWrite = mmuSuperDataCache[i + 1]; 24681: int physicalPage = mmuSuperDataCache[i + 2]; 24682: int flag = mmuSuperDataCache[i + 3]; 24683: for (; i > head; i -= 4) { 24684: mmuSuperDataCache[i ] = mmuSuperDataCache[i - 4]; 24685: mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3]; 24686: mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2]; 24687: mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1]; 24688: } 24689: mmuSuperDataCache[i ] = logicalPage; //logicalRead 24690: mmuSuperDataCache[i + 1] = logicalWrite; 24691: mmuSuperDataCache[i + 2] = physicalPage; 24692: mmuSuperDataCache[i + 3] = flag; 24693: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24694: } 24695: } //for i 24696: } 24697: return mmuTranslateCommon (a, false, true, false); 24698: } //mmuTranslateReadSuperData(int) 24699: 24700: //pa = mmuTranslateReadSuperCode (a) 24701: // アドレス変換を行う(リードスーパーバイザコード) 24702: // pa 物理アドレス 24703: // a 論理アドレス 24704: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24705: public static int mmuTranslateReadSuperCode (int a) throws M68kException { 24706: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24707: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24708: if (mmuSuperCodeCache[head] == logicalPage) { //リード用の論理ページアドレスと一致した 24709: if (CAT_ON) { 24710: catCM = (mmuSuperCodeCache[head + 3] >> 5) & 3; //キャッシュモード 24711: } 24712: return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24713: } 24714: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24715: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24716: for (int i = head + 4; i <= tail; i += 4) { 24717: if (mmuSuperCodeCache[i] == logicalPage) { //リード用の論理ページアドレスと一致した 24718: //int logicalRead = mmuSuperCodeCache[i ]; 24719: int logicalWrite = mmuSuperCodeCache[i + 1]; 24720: int physicalPage = mmuSuperCodeCache[i + 2]; 24721: int flag = mmuSuperCodeCache[i + 3]; 24722: for (; i > head; i -= 4) { 24723: mmuSuperCodeCache[i ] = mmuSuperCodeCache[i - 4]; 24724: mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3]; 24725: mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2]; 24726: mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1]; 24727: } 24728: mmuSuperCodeCache[head ] = logicalPage; //logicalRead 24729: mmuSuperCodeCache[head + 1] = logicalWrite; 24730: mmuSuperCodeCache[head + 2] = physicalPage; 24731: mmuSuperCodeCache[head + 3] = flag; 24732: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24733: } 24734: } //for i 24735: } 24736: return mmuTranslateCommon (a, false, true, true); 24737: } //mmuTranslateReadSuperCode(int) 24738: 24739: //pa = mmuTranslateWriteUserData (a) 24740: // アドレス変換を行う(ライトユーザデータ) 24741: // pa 物理アドレス 24742: // a 論理アドレス 24743: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24744: public static int mmuTranslateWriteUserData (int a) throws M68kException { 24745: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24746: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24747: if (mmuUserDataCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24748: if (CAT_ON) { 24749: catCM = (mmuUserDataCache[head + 3] >> 5) & 3; //キャッシュモード 24750: } 24751: return mmuUserDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24752: } 24753: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24754: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24755: for (int i = head + 4; i <= tail; i += 4) { 24756: if (mmuUserDataCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24757: int logicalRead = mmuUserDataCache[i ]; 24758: //int logicalWrite = mmuUserDataCache[i + 1]; 24759: int physicalPage = mmuUserDataCache[i + 2]; 24760: int flag = mmuUserDataCache[i + 3]; 24761: for (; i > head; i -= 4) { 24762: mmuUserDataCache[i ] = mmuUserDataCache[i - 4]; 24763: mmuUserDataCache[i + 1] = mmuUserDataCache[i - 3]; 24764: mmuUserDataCache[i + 2] = mmuUserDataCache[i - 2]; 24765: mmuUserDataCache[i + 3] = mmuUserDataCache[i - 1]; 24766: } 24767: mmuUserDataCache[i ] = logicalRead; 24768: mmuUserDataCache[i + 1] = logicalPage; //logicalWrite 24769: mmuUserDataCache[i + 2] = physicalPage; 24770: mmuUserDataCache[i + 3] = flag; 24771: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24772: } 24773: } //for i 24774: } 24775: return mmuTranslateCommon (a, true, false, false); 24776: } //mmuTranslateWriteUserData(int) 24777: 24778: //pa = mmuTranslateWriteUserCode (a) 24779: // アドレス変換を行う(ライトユーザコード) 24780: // pa 物理アドレス 24781: // a 論理アドレス 24782: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24783: public static int mmuTranslateWriteUserCode (int a) throws M68kException { 24784: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24785: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24786: if (mmuUserCodeCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24787: if (CAT_ON) { 24788: catCM = (mmuUserCodeCache[head + 3] >> 5) & 3; //キャッシュモード 24789: } 24790: return mmuUserCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24791: } 24792: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24793: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24794: for (int i = head + 4; i <= tail; i += 4) { 24795: if (mmuUserCodeCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24796: int logicalRead = mmuUserCodeCache[i ]; 24797: //int logicalWrite = mmuUserCodeCache[i + 1]; 24798: int physicalPage = mmuUserCodeCache[i + 2]; 24799: int flag = mmuUserCodeCache[i + 3]; 24800: for (; i > head; i -= 4) { 24801: mmuUserCodeCache[i ] = mmuUserCodeCache[i - 4]; 24802: mmuUserCodeCache[i + 1] = mmuUserCodeCache[i - 3]; 24803: mmuUserCodeCache[i + 2] = mmuUserCodeCache[i - 2]; 24804: mmuUserCodeCache[i + 3] = mmuUserCodeCache[i - 1]; 24805: } 24806: mmuUserCodeCache[head ] = logicalRead; 24807: mmuUserCodeCache[head + 1] = logicalPage; //logicalWrite 24808: mmuUserCodeCache[head + 2] = physicalPage; 24809: mmuUserCodeCache[head + 3] = flag; 24810: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24811: } 24812: } //for i 24813: } 24814: return mmuTranslateCommon (a, true, false, true); 24815: } //mmuTranslateWriteUserCode(int) 24816: 24817: //pa = mmuTranslateWriteSuperData (a) 24818: // アドレス変換を行う(ライトスーパーバイザデータ) 24819: // pa 物理アドレス 24820: // a 論理アドレス 24821: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24822: public static int mmuTranslateWriteSuperData (int a) throws M68kException { 24823: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24824: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24825: if (mmuSuperDataCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24826: if (CAT_ON) { 24827: catCM = (mmuSuperDataCache[head + 3] >> 5) & 3; //キャッシュモード 24828: } 24829: return mmuSuperDataCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24830: } 24831: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24832: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24833: for (int i = head + 4; i <= tail; i += 4) { 24834: if (mmuSuperDataCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24835: int logicalRead = mmuSuperDataCache[i ]; 24836: //int logicalWrite = mmuSuperDataCache[i + 1]; 24837: int physicalPage = mmuSuperDataCache[i + 2]; 24838: int flag = mmuSuperDataCache[i + 3]; 24839: for (; i > head; i -= 4) { 24840: mmuSuperDataCache[i ] = mmuSuperDataCache[i - 4]; 24841: mmuSuperDataCache[i + 1] = mmuSuperDataCache[i - 3]; 24842: mmuSuperDataCache[i + 2] = mmuSuperDataCache[i - 2]; 24843: mmuSuperDataCache[i + 3] = mmuSuperDataCache[i - 1]; 24844: } 24845: mmuSuperDataCache[i ] = logicalRead; 24846: mmuSuperDataCache[i + 1] = logicalPage; //logicalWrite 24847: mmuSuperDataCache[i + 2] = physicalPage; 24848: mmuSuperDataCache[i + 3] = flag; 24849: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24850: } 24851: } //for i 24852: } 24853: return mmuTranslateCommon (a, true, true, false); 24854: } //mmuTranslateWriteSuperData(int) 24855: 24856: //pa = mmuTranslateWriteSuperCode (a) 24857: // アドレス変換を行う(ライトスーパーバイザコード) 24858: // pa 物理アドレス 24859: // a 論理アドレス 24860: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24861: public static int mmuTranslateWriteSuperCode (int a) throws M68kException { 24862: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 24863: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 24864: if (mmuSuperCodeCache[head + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24865: if (CAT_ON) { 24866: catCM = (mmuSuperCodeCache[head + 3] >> 5) & 3; //キャッシュモード 24867: } 24868: return mmuSuperCodeCache[head + 2] | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24869: } 24870: if (MMU_CACHE_WAYS >= 2) { //2ways以上 24871: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ 24872: for (int i = head + 4; i <= tail; i += 4) { 24873: if (mmuSuperCodeCache[i + 1] == logicalPage) { //ライト用の論理ページアドレスと一致した 24874: int logicalRead = mmuSuperCodeCache[i ]; 24875: //int logicalWrite = mmuSuperCodeCache[i + 1]; 24876: int physicalPage = mmuSuperCodeCache[i + 2]; 24877: int flag = mmuSuperCodeCache[i + 3]; 24878: for (; i > head; i -= 4) { 24879: mmuSuperCodeCache[i ] = mmuSuperCodeCache[i - 4]; 24880: mmuSuperCodeCache[i + 1] = mmuSuperCodeCache[i - 3]; 24881: mmuSuperCodeCache[i + 2] = mmuSuperCodeCache[i - 2]; 24882: mmuSuperCodeCache[i + 3] = mmuSuperCodeCache[i - 1]; 24883: } 24884: mmuSuperCodeCache[head ] = logicalRead; 24885: mmuSuperCodeCache[head + 1] = logicalPage; //logicalWrite 24886: mmuSuperCodeCache[head + 2] = physicalPage; 24887: mmuSuperCodeCache[head + 3] = flag; 24888: return physicalPage | (a & mmuPageOffsetMask); //物理ページアドレスとページオフセットを連結する 24889: } 24890: } //for i 24891: } 24892: return mmuTranslateCommon (a, true, true, true); 24893: } //mmuTranslateWriteSuperCode(int) 24894: 24895: //pa = mmuTranslateCommon (a, write, supervisor, instruction) 24896: // 透過変換とテーブルサーチを行い、アドレス変換キャッシュ更新する 24897: // アドレス変換キャッシュがミスしたときに呼び出す 24898: // pa 物理アドレス 24899: // a 論理アドレス 24900: // write true=ライト,false=リード 24901: // supervisor true=スーパーバイザ,false=ユーザ。通常はXEiJ.regSRS!=0、PLPAR/PLPAWでは(XEiJ.mpuDFC&4)!=0 24902: // instruction true=命令,false=データ。通常は命令フェッチまたは拡張ワードのときtrue、PLPAR/PLPAWでは(XEiJ.mpuDFC&2)!=0 24903: // m60FSLWのMA,RW,SIZE,TM,IOをセットしてから呼び出すこと 24904: public static int mmuTranslateCommon (int a, boolean write, boolean supervisor, boolean instruction) throws M68kException { 24905: if (MMU_DEBUG_TRANSLATION) { 24906: System.out.printf ("%08x mmuTranslateCommon(0x%08x,%b,%b,%b)", XEiJ.regPC0, a, write, supervisor, instruction); 24907: } 24908: int logicalPage = a & mmuPageAddressMask; //リード用の論理ページアドレス 24909: int logicalWrite; //ライト用の論理ページアドレス 24910: int physicalPage; //物理ページアドレス 24911: int flag; //フラグ。bit10:グローバル,bit6-5:キャッシュモード 24912: int pa; //物理アドレス 24913: //透過変換 24914: // 透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる) 24915: // 条件が合わなければヒットしないだけで、スーパーバイザプロテクトのアクセスフォルトになならない 24916: // 透過変換をアドレス変換キャッシュに乗せる場合 24917: // アドレス変換キャッシュがヒットしてバスエラーが発生したとき 24918: // 透過変換かどうかを再確認してFSLWのTTRをセットしなければならない 24919: // 透過変換レジスタが操作されたとき 24920: // OFF→ONの領域だけでなくON→OFFの領域もフラッシュしなければならない 24921: // 透過変換レジスタを頻繁に操作されると重くなるかも知れない 24922: int tt = (supervisor ? 24923: instruction ? mmuTTSuperCode1 : mmuTTSuperData1 : 24924: instruction ? mmuTTUserCode1 : mmuTTUserData1)[a >>> 24]; 24925: if (tt != 0) { //透過変換あり 24926: m60FSLW |= M60_FSLW_TRANSPARENT; 24927: if (write && //ライトで 24928: tt < 0) { //透過変換によるライトプロテクト 24929: if (MMU_DEBUG_TRANSLATION) { 24930: System.out.printf (" write protected by transparent translation\n", a); 24931: } 24932: m60FSLW |= M60_FSLW_WRITE_PROTECT; 24933: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24934: //m60Address = a; 24935: throw M68kException.m6eSignal; 24936: } 24937: logicalWrite = logicalPage; //ライト用の論理ページアドレス 24938: physicalPage = logicalPage; //物理ページアドレス 24939: flag = MMU_DESCRIPTOR_GLOBAL | (tt & MMU_TTR_CACHE_MODE); //グローバル、キャッシュモード 24940: pa = a; 24941: if (MMU_DEBUG_TRANSLATION) { 24942: System.out.printf ("=0x%08x (transparent translation)\n", pa); 24943: } 24944: } else if (mmuEnabled) { //透過変換なし、アドレス変換あり 24945: //テーブルサーチ 24946: // スーパーバイザプロテクトまたはライトプロテクトで停止したときデスクリプタの使用済みフラグはセットされない 24947: // リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる 24948: // 例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない 24949: m60FSLW |= M60_FSLW_TABLE_SEARCH; //これはbus error on table searchなのでそれ以外は消すこと 24950: //TMを保存して書き換える 24951: int xorTM = ((m60FSLW & M60_FSLW_TRANSFER_MODIFIER) ^ 24952: (instruction ? M60_FSLW_TM_MMU_CODE : M60_FSLW_TM_MMU_DATA)); 24953: m60FSLW ^= xorTM; 24954: //ルートテーブル 24955: int rootDescriptorAddress = (supervisor ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2); //ルートテーブルデスクリプタのアドレス 24956: MemoryMappedDevice rootDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[rootDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 24957: int rootDescriptor = rootDescriptorDevice.mmdRls (rootDescriptorAddress); //ルートテーブルデスクリプタ 24958: if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 24959: if (MMU_DEBUG_TRANSLATION) { 24960: System.out.printf (" invalid root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress); 24961: } 24962: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_ROOT_DESCRIPTOR; 24963: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24964: //m60Address = a; 24965: throw M68kException.m6eSignal; 24966: } 24967: if (write && //ライトで 24968: (rootDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) { //ライトプロテクトされているとき 24969: if (MMU_DEBUG_TRANSLATION) { 24970: System.out.printf (" write protected by root descriptor 0x%08x at 0x%08x\n", rootDescriptor, rootDescriptorAddress); 24971: } 24972: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT; 24973: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24974: //m60Address = a; 24975: throw M68kException.m6eSignal; 24976: } 24977: if ((rootDescriptor & MMU_DESCRIPTOR_USED) == 0) { //デスクリプタが未使用のとき 24978: rootDescriptor |= MMU_DESCRIPTOR_USED; //使用済み 24979: rootDescriptorDevice.mmdWl (rootDescriptorAddress, rootDescriptor); 24980: } 24981: //ポインタテーブル 24982: int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2); //ポインタテーブルデスクリプタのアドレス 24983: MemoryMappedDevice pointerDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pointerDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 24984: int pointerDescriptor = pointerDescriptorDevice.mmdRls (pointerDescriptorAddress); //ポインタテーブルデスクリプタ 24985: if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 24986: if (MMU_DEBUG_TRANSLATION) { 24987: System.out.printf (" invalid pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress); 24988: } 24989: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_POINTER_DESCRIPTOR; 24990: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 24991: //m60Address = a; 24992: throw M68kException.m6eSignal; 24993: } 24994: if (write && //ライトで 24995: (pointerDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) { //ライトプロテクトされているとき 24996: if (MMU_DEBUG_TRANSLATION) { 24997: System.out.printf (" write protected by pointer descriptor 0x%08x at 0x%08x\n", pointerDescriptor, pointerDescriptorAddress); 24998: } 24999: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT; 25000: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 25001: //m60Address = a; 25002: throw M68kException.m6eSignal; 25003: } 25004: if ((pointerDescriptor & MMU_DESCRIPTOR_USED) == 0) { //デスクリプタが未使用のとき 25005: pointerDescriptor |= MMU_DESCRIPTOR_USED; //使用済み 25006: pointerDescriptorDevice.mmdWl (pointerDescriptorAddress, pointerDescriptor); 25007: } 25008: //ページテーブル 25009: int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2); //ページテーブルデスクリプタのアドレス 25010: MemoryMappedDevice pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 25011: int pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress); //ページテーブルデスクリプタ 25012: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 25013: if (MMU_DEBUG_TRANSLATION) { 25014: System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 25015: } 25016: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_PAGE_FAULT; 25017: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 25018: //m60Address = a; 25019: throw M68kException.m6eSignal; 25020: } 25021: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //デスクリプタが間接のとき 25022: pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS; //ページテーブルデスクリプタのアドレス 25023: pageDescriptorDevice = (DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap)[pageDescriptorAddress >>> XEiJ.BUS_PAGE_BITS]; 25024: pageDescriptor = pageDescriptorDevice.mmdRls (pageDescriptorAddress); //ページテーブルデスクリプタ 25025: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 25026: if (MMU_DEBUG_TRANSLATION) { 25027: System.out.printf (" invalid page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 25028: } 25029: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_PAGE_FAULT; 25030: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 25031: //m60Address = a; 25032: throw M68kException.m6eSignal; 25033: } 25034: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //デスクリプタが二重間接のとき 25035: if (MMU_DEBUG_TRANSLATION) { 25036: System.out.printf (" indirect page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 25037: } 25038: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_INDIRECT_LEVEL; 25039: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 25040: //m60Address = a; 25041: throw M68kException.m6eSignal; 25042: } 25043: } 25044: if (!supervisor && //ユーザモードで 25045: (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) { //スーパーバイザプロテクトされているとき 25046: if (MMU_DEBUG_TRANSLATION) { 25047: System.out.printf (" supervisor protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 25048: } 25049: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_SUPERVISOR_PROTECT; 25050: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 25051: //m60Address = a; 25052: throw M68kException.m6eSignal; 25053: } 25054: if (write && //ライトで 25055: (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) != 0) { //ライトプロテクトされているとき 25056: if (MMU_DEBUG_TRANSLATION) { 25057: System.out.printf (" write protected by page descriptor 0x%08x at 0x%08x\n", pageDescriptor, pageDescriptorAddress); 25058: } 25059: m60FSLW ^= M60_FSLW_TABLE_SEARCH ^ M60_FSLW_WRITE_PROTECT; 25060: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 25061: //m60Address = a; 25062: throw M68kException.m6eSignal; 25063: } 25064: { 25065: int t = pageDescriptor; 25066: if ((pageDescriptor & MMU_DESCRIPTOR_USED) == 0) { //デスクリプタが未使用のとき 25067: pageDescriptor |= MMU_DESCRIPTOR_USED; //使用済みにする 25068: } 25069: if (write && //ライトで 25070: (pageDescriptor & MMU_DESCRIPTOR_MODIFIED) == 0) { //修正済みでないとき 25071: pageDescriptor |= MMU_DESCRIPTOR_MODIFIED; //修正済みにする 25072: } 25073: if (t != pageDescriptor) { 25074: pageDescriptorDevice.mmdWl (pageDescriptorAddress, pageDescriptor); 25075: } 25076: } 25077: //テーブルサーチ終了 25078: m60FSLW &= ~M60_FSLW_TABLE_SEARCH; 25079: //TMを復元する 25080: m60FSLW ^= xorTM; 25081: //logicalWrite = (pageDescriptor & (MMU_DESCRIPTOR_MODIFIED | MMU_DESCRIPTOR_WRITE_PROTECTED)) == MMU_DESCRIPTOR_MODIFIED ? logicalPage : 1; //ライト用の論理ページアドレス。修正済みかつライトプロテクトされていないときだけ有効 25082: logicalWrite = (pageDescriptor & MMU_DESCRIPTOR_WRITE_PROTECTED) == 0 ? logicalPage : 1; //ライト用の論理ページアドレス。ライトプロテクトされていないときだけ有効 25083: physicalPage = pageDescriptor & mmuPageAddressMask; //物理ページアドレス 25084: flag = pageDescriptor & (MMU_DESCRIPTOR_GLOBAL | //グローバル 25085: MMU_DESCRIPTOR_CACHE_MODE); //キャッシュモード 25086: pa = physicalPage | a & mmuPageOffsetMask; //物理ページアドレスとページオフセットを連結する 25087: if (MMU_DEBUG_TRANSLATION) { 25088: System.out.printf ("=0x%08x (table search)\n", pa); 25089: System.out.printf (" rootTable=0x%08x\n", supervisor ? mmuSRP : mmuURP); 25090: System.out.printf (" rootIndex=0x%08x\n", (a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0); 25091: System.out.printf (" rootDescriptorAddress=0x%08x\n", rootDescriptorAddress); 25092: System.out.printf (" rootDescriptor=0x%08x\n", rootDescriptor); 25093: System.out.printf (" pointerTable=0x%08x\n", rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS); 25094: System.out.printf (" pointerIndex=0x%08x\n", (a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0); 25095: System.out.printf (" pointerDescriptorAddress=0x%08x\n", pointerDescriptorAddress); 25096: System.out.printf (" pointerDescriptor=0x%08x\n", pointerDescriptor); 25097: System.out.printf (" pageTable=0x%08x\n", pointerDescriptor & mmuPageTableMask); 25098: System.out.printf (" pageIndex=0x%08x\n", (a & mmuPageIndexMask) >>> mmuPageIndexBit2 + 2); 25099: System.out.printf (" pageDescriptorAddress=0x%08x\n", pageDescriptorAddress); 25100: System.out.printf (" pageDescriptor=0x%08x\n", pageDescriptor); 25101: } 25102: } else { //透過変換なし、アドレス変換なし 25103: logicalWrite = logicalPage; //ライト用の論理ページアドレス 25104: physicalPage = logicalPage; //物理ページアドレス 25105: flag = MMU_DESCRIPTOR_GLOBAL | ((mmuTCR >> (instruction ? 4 : 8)) & 3); //グローバル、デフォルトキャッシュモード。DCOまたはDCI 25106: pa = a; 25107: if (MMU_DEBUG_TRANSLATION) { 25108: System.out.printf ("=0x%08x (no translation)\n", pa); 25109: } 25110: } 25111: if (!(MMU_NOT_ALLOCATE_CACHE || 25112: (instruction ? mmuNotAllocateCode : mmuNotAllocateData))) { 25113: //アドレス変換キャッシュを更新する 25114: // 同じ論理ページアドレスのエントリが存在する場合 25115: // (リードでアロケートしたとき修正済みでなかったためライトでアロケートしなかった場合) 25116: // 同じ論理ページアドレスのエントリよりも前にあるエントリを後ろにずらす 25117: // 空いた先頭のエントリに上書きする 25118: // 同じ論理ページアドレスのエントリが存在しない場合 25119: // 末尾以外のエントリを後ろにずらす 25120: // 空いた先頭のエントリに上書きする 25121: int[] cache = (supervisor ? 25122: instruction ? mmuSuperCodeCache : mmuSuperDataCache : 25123: instruction ? mmuUserCodeCache : mmuUserDataCache); 25124: int head = (logicalPage * MMU_HASH_COEFF >>> -MMU_HASH_BITS) * (4 * MMU_CACHE_WAYS); //先頭のエントリ 25125: if (MMU_CACHE_WAYS >= 2) { //2ways以上のとき 25126: int tail = head + (4 * MMU_CACHE_WAYS - 4); //末尾のエントリ→捨てるエントリ 25127: if (write) { //ライトのとき 25128: for (int i = head; i < tail; i += 4) { 25129: if (cache[i] == logicalPage) { //リードでアロケートされていた 25130: tail = i; 25131: break; 25132: } 25133: } 25134: } 25135: // 捨てるエントリよりも前にあるエントリを後ろにずらす 25136: for (; tail > head; tail -= 4) { 25137: cache[tail ] = cache[tail - 4]; 25138: cache[tail + 1] = cache[tail - 3]; 25139: cache[tail + 2] = cache[tail - 2]; 25140: cache[tail + 3] = cache[tail - 1]; 25141: } 25142: } 25143: // 先頭のエントリに上書きする 25144: cache[head ] = logicalPage; //リード用の論理ページアドレス 25145: cache[head + 1] = logicalWrite; //ライト用の論理ページアドレス 25146: cache[head + 2] = physicalPage; //物理ページアドレス 25147: cache[head + 3] = flag; //フラグ 25148: if (MMU_DEBUG_TRANSLATION) { 25149: System.out.printf (" ATC[%d]={0x%08x,0x%08x,0x%08x,0x%08x}\n", 25150: head / (4 * MMU_CACHE_WAYS), logicalPage, logicalWrite, physicalPage, flag); 25151: } 25152: } 25153: if (CAT_ON) { 25154: catCM = (flag >> 5) & 3; //キャッシュモード 25155: } 25156: return pa; 25157: } //mmuTranslateCommon(int,boolean,boolean,boolean) 25158: 25159: public static int mmuPeekFlags; 25160: 25161: //pa = mmuTranslatePeek (a, supervisor, instruction) { 25162: // アドレス変換を行う(デバッガ用、例外なし、テーブル更新なし) 25163: // pa 物理アドレス。a^1=エラー 25164: // a 論理アドレス 25165: // supervisor 0=ユーザ,0以外=スーパーバイザ。通常はXEiJ.regSRS、PLPAR/PLPAWではXEiJ.mpuDFC&4 25166: // instruction 0=データ,0以外=命令。通常は命令フェッチまたは拡張ワードのとき1、PLPAR/PLPAWではXEiJ.mpuDFC&2 25167: public static int mmuTranslatePeek (int a, int supervisor, int instruction) { 25168: //透過変換の確認 25169: // 透過変換はスーパーバイザモードかどうかを条件にすることができる(しないこともできる) 25170: // 透過変換にスーパーバイザプロテクトの機能はない 25171: { 25172: int[] tta = new int[2]; 25173: if (instruction != 0) { 25174: tta[0] = mmuITT0; 25175: tta[1] = mmuITT1; 25176: } else { 25177: tta[0] = mmuDTT0; 25178: tta[1] = mmuDTT1; 25179: } 25180: for (int i = 0; i < 2; i++) { 25181: int ttr = tta[i]; 25182: if ((ttr & 0x8000) != 0 && //Enable 25183: ((ttr & 0x4000) != 0 || ((ttr & 0x2000) != 0) == (supervisor != 0)) && 25184: ((a ^ ttr) & ~ttr << 8) >>> 24 == 0) { 25185: mmuPeekFlags = ttr & MMU_TTR_WRITE_PROTECT; 25186: return a; 25187: } 25188: } 25189: } 25190: //透過変換なし 25191: if (!mmuEnabled) { //アドレス変換なし 25192: mmuPeekFlags = 0; 25193: return a; 25194: } 25195: //アドレス変換あり 25196: int logicalPage = a & mmuPageAddressMask; //論理ページアドレス 25197: //テーブルサーチ開始 25198: // スーパーバイザプロテクトまたはライトプロテクトで停止したときデスクリプタの使用済みフラグはセットされない 25199: // リードモディファイライトはライトでアロケートするのでリードする前にライトプロテクトに引っかかる 25200: // 例えばROMの内容をインクリメントしようとしたときライトだけでなくリードも行われない 25201: //ルートテーブル 25202: int rootDescriptorAddress = (supervisor != 0 ? mmuSRP : mmuURP) + ((a & MMU_ROOT_INDEX_MASK) >>> MMU_ROOT_INDEX_BIT0 - 2); //ルートテーブルデスクリプタのアドレス 25203: int rootDescriptor = XEiJ.busPlsf (rootDescriptorAddress); //ルートテーブルデスクリプタ 25204: if ((rootDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 25205: return a ^ 1; 25206: } 25207: //ポインタテーブル 25208: int pointerDescriptorAddress = (rootDescriptor & MMU_DESCRIPTOR_POINTER_TABLE_ADDRESS) + ((a & MMU_POINTER_INDEX_MASK) >>> MMU_POINTER_INDEX_BIT0 - 2); //ポインタテーブルデスクリプタのアドレス 25209: int pointerDescriptor = XEiJ.busPlsf (pointerDescriptorAddress); //ポインタテーブルデスクリプタ 25210: if ((pointerDescriptor & MMU_DESCRIPTOR_UDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 25211: return a ^ 1; 25212: } 25213: //ページテーブル 25214: int pageDescriptorAddress = (pointerDescriptor & mmuPageTableMask) + ((a & mmuPageIndexMask) >>> mmuPageIndexBit2); //ページテーブルデスクリプタのアドレス 25215: int pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress); //ページテーブルデスクリプタ 25216: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 25217: return a ^ 1; 25218: } 25219: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //デスクリプタが間接のとき 25220: pageDescriptorAddress = pageDescriptor & MMU_DESCRIPTOR_INDIRECT_ADDRESS; //ページテーブルデスクリプタのアドレス 25221: pageDescriptor = XEiJ.busPlsf (pageDescriptorAddress); //ページテーブルデスクリプタ 25222: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INVALID) { //デスクリプタが無効のとき 25223: return a ^ 1; 25224: } 25225: if ((pageDescriptor & MMU_DESCRIPTOR_PDT) == MMU_DESCRIPTOR_TYPE_INDIRECT) { //デスクリプタが二重間接のとき 25226: return a ^ 1; 25227: } 25228: } 25229: if (supervisor == 0 && //ユーザモードで 25230: (pageDescriptor & MMU_DESCRIPTOR_SUPERVISOR_PROTECTED) != 0) { //スーパーバイザプロテクトされているとき 25231: return a ^ 1; 25232: } 25233: int physicalPage = pageDescriptor & mmuPageAddressMask; //物理ページアドレス 25234: //テーブルサーチ終了 25235: mmuPeekFlags = pageDescriptor & (MMU_DESCRIPTOR_SUPERVISOR_PROTECTED | 25236: MMU_DESCRIPTOR_MODIFIED | 25237: MMU_DESCRIPTOR_USED | 25238: MMU_DESCRIPTOR_WRITE_PROTECTED); 25239: return physicalPage | a & mmuPageOffsetMask; //物理ページアドレスとページオフセットを連結する 25240: } //mmuTranslatePeek(int,int,int) 25241: 25242: 25243: 25244: //実効アドレス 25245: // FIRSTのアドレス 25246: // SECONDでアクセスフォルトが発生した場合でも、FORMAT $4の例外スタックフレームにはFIRSTのアドレスが書き込まれる 25247: // M68kException.m6eAddressは実際にバスエラーが発生したアドレスを示しており、これはSECONDの場合がある 25248: private static int m60Address; 25249: 25250: // MC68060のページフォルトに関する考察 25251: // ページフォルトが発生すると、プレデクリメントとポストインクリメントによるアドレスレジスタの変化がすべてキャンセルされる 25252: // MOVE.B (A0)+,(A0)+またはMOVE.B -(A0),-(A0)でソースまたはデスティネーションでページフォルトが発生したとき、 25253: // どの組み合わせでもA0は命令開始時の値のままアクセスフォルトハンドラに移行する 25254: // RTEでページフォルトを発生させた命令に復帰すると、ソースをリードするところからやり直す 25255: // MOVE.B <mem>,<mem>のデスティネーションのライトでページフォルトが発生したとき、ソースのリードが2回行われる 25256: // これはMC68060ユーザーズマニュアルの7.10 BUS SYNCHRONIZATIONに書かれており、 25257: // 060turboでも、ページフォルトのハンドラでソースを書き換えると結果に反映されることから、リードが再実行されていることを確認できる 25258: // リードすると値が変化する可能性のあるデバイスから非常駐の可能性のあるページに転送するとき、MOVE.B <mem>,<mem>を使ってはいけない 25259: 25260: //アドレスレジスタの増分 25261: // 実効アドレスの計算でポストインクリメントまたはプレデクリメントのとき、 25262: // アドレスレジスタを更新してそのままにするとページフォルトを起こした命令を再実行することができない 25263: // MOVE.L (A0)+,(d16,A0)などでデスティネーションの実効アドレスの計算にソースの結果を反映させる必要があるので、 25264: // アドレスレジスタは更新しておいてページフォルトのときだけ命令開始時の値に巻き戻す 25265: // CMPM.L (A0)+,(A1)+やSUBX.L -(A0),-(A1)などでは複数の増分を並べるかまたは積まなければならない 25266: // m60Incremented += (long) offset << (r << 3); 25267: // で積むことにする 25268: // 巻き戻すとき負数に注意する 25269: private static long m60Incremented; 25270: 25271: // FSLW Fault Status Long Word 25272: // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 25273: // ┏━━━━━━━┯━┯━┯━┯━━━┯━━━┯━━━┯━━━━━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┯━┓ 25274: // ┃ │MA│ │LK│ RW │ SIZE │ TT │ TM │IO│PBE SBE PTA PTB IL│PF│SP│WP│TWE RE│WE│TTR BPE SEE┃ 25275: // ┗━━━━━━━┷━┷━┷━┷━━━┷━━━┷━━━┷━━━━━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┷━┛ 25276: private static final int M60_FSLW_MISALIGNED = 1 << 27; //MA Misaligned Access 25277: private static final int M60_FSLW_LOCKED = 1 << 25; //LK Locked Transfer 25278: private static final int M60_FSLW_READ_AND_WRITE = 3 << 23; //RW Read and Write 25279: private static final int M60_FSLW_RW_WRITE = 1 << 23; // Write 25280: private static final int M60_FSLW_RW_READ = 2 << 23; // Read 25281: private static final int M60_FSLW_RW_MODIFY = 3 << 23; // Read-Modify-Write 25282: private static final int M60_FSLW_TRANSFER_SIZE = 3 << 21; //SIZE Transfer Size 25283: private static final int M60_FSLW_SIZE_LONG = 0 << 21; // Long マニュアルが間違っているので注意 25284: private static final int M60_FSLW_SIZE_BYTE = 1 << 21; // Byte マニュアルが間違っているので注意 25285: private static final int M60_FSLW_SIZE_WORD = 2 << 21; // Word マニュアルが間違っているので注意 25286: private static final int M60_FSLW_SIZE_QUAD = 3 << 21; // Double Precision or MOVE16 25287: private static final int M60_FSLW_TRANSFER_TYPE = 3 << 19; //TT Transfer Type 25288: private static final int M60_FSLW_TT_NORMAL = 0 << 19; // Normal Access 25289: private static final int M60_FSLW_TT_MOVE16 = 1 << 19; // MOVE16 Access 25290: private static final int M60_FSLW_TT_ALTERNATE = 2 << 19; // Alternate Logical Function Code Access, Debug Access 25291: private static final int M60_FSLW_TT_ACKNOWLEDGE = 3 << 19; // Acknowledge Access, Low-Power Stop Broadcast 25292: private static final int M60_FSLW_TRANSFER_MODIFIER = 7 << 16; //TM Transfer Modifier 25293: private static final int M60_FSLW_TM_CACHE_PUSH = 0 << 16; // Data Cache Push Access 25294: private static final int M60_FSLW_TM_USER_DATA = 1 << 16; // User Data Access 25295: private static final int M60_FSLW_TM_USER_CODE = 2 << 16; // User Code Access 25296: private static final int M60_FSLW_TM_MMU_DATA = 3 << 16; // MMU Table Search Data Access 25297: private static final int M60_FSLW_TM_MMU_CODE = 4 << 16; // MMU Table Search Code Access 25298: private static final int M60_FSLW_TM_SUPER_DATA = 5 << 16; // Supervisor Data Access 25299: private static final int M60_FSLW_TM_SUPER_CODE = 6 << 16; // Supervisor Code Access 25300: private static final int M60_FSLW_TM_DATA = 1 << 16; // Data Access 25301: private static final int M60_FSLW_TM_CODE = 2 << 16; // Code Access 25302: private static final int M60_FSLW_TM_SUPERVISOR = 4 << 16; // Supervisor Access 25303: private static final int M60_FSLW_INSTRUCTION = 1 << 15; //IO Instruction or Operand 25304: private static final int M60_FSLW_IOMA_FIRST = 0 << 15 | 0 << 27; //Fault occurred on the first access of a misaligned transfer, or to the only access of an aligned transfer 25305: private static final int M60_FSLW_IOMA_SECOND = 0 << 15 | 1 << 27; //Fault occurred on the second or later access of a misaligned transfer 25306: private static final int M60_FSLW_IOMA_OPWORD = 1 << 15 | 0 << 27; //Fault occurred on an instruction opword fetch 25307: private static final int M60_FSLW_IOMA_EXWORD = 1 << 15 | 1 << 27; //Fault occurred on a fetch of an extension word 25308: private static final int M60_FSLW_PUSH_BUFFER = 1 << 14; //PBE Push Buffer Bus Error 25309: private static final int M60_FSLW_STORE_BUFFER = 1 << 13; //SBE Store Buffer Bus Error 25310: private static final int M60_FSLW_ROOT_DESCRIPTOR = 1 << 12; //PTA Pointer A Fault 25311: private static final int M60_FSLW_POINTER_DESCRIPTOR = 1 << 11; //PTB Pointer B Fault 25312: private static final int M60_FSLW_INDIRECT_LEVEL = 1 << 10; //IL Indirect Level Fault 25313: private static final int M60_FSLW_PAGE_FAULT = 1 << 9; //PF Page Fault 25314: private static final int M60_FSLW_SUPERVISOR_PROTECT = 1 << 8; //SP Supervisor Protect 25315: private static final int M60_FSLW_WRITE_PROTECT = 1 << 7; //WP Write Protect 25316: private static final int M60_FSLW_TABLE_SEARCH = 1 << 6; //TWE Bus Error on Table Search 25317: private static final int M60_FSLW_BUS_ERROR_ON_READ = 1 << 5; //RE Bus Error on Read 25318: private static final int M60_FSLW_BUS_ERROR_ON_WRITE = 1 << 4; //WE Bus Error on Write 25319: private static final int M60_FSLW_TRANSPARENT = 1 << 3; //TTR TTR Hit 25320: private static final int M60_FSLW_BRANCH_PREDICTION = 1 << 2; //BPE Branch Prediction Error 25321: private static final int M60_FSLW_SOFTWARE_EMULATION = 1 << 0; //SEE Software Emulation Error 25322: 25323: private static int m60FSLW; 25324: 25325: public static void m60BusErrorOnRead () { 25326: m60FSLW |= M60_FSLW_BUS_ERROR_ON_READ; 25327: } 25328: public static void m60BusErrorOnWrite () { 25329: m60FSLW |= M60_FSLW_BUS_ERROR_ON_WRITE; 25330: } 25331: 25332: private static final String[] M60_FSLW_TEXT_IOMA = { 25333: "IO=0,MA=0 First access of a misaligned transfer or only access of an aligned transfer", 25334: "IO=0,MA=1 Second or later access of a misaligned transfer", 25335: "IO=1,MA=0 Instruction opword fetch", 25336: "IO=1,MA=1 Fetch of an extension word", 25337: }; 25338: private static final String[] M60_FSLW_TEXT_LK = { 25339: "LK=0 Not locked", 25340: "LK=1 Locked", 25341: }; 25342: private static final String[] M60_FSLW_TEXT_RW = { 25343: "RW=0 Undefined, reserved", 25344: "RW=1 Write", 25345: "RW=2 Read", 25346: "RW=3 Read-Modify-Write", 25347: }; 25348: private static final String[] M60_FSLW_TEXT_SIZE = { 25349: "SIZE=0 Byte", 25350: "SIZE=1 Word", 25351: "SIZE=2 Long", 25352: "SIZE=3 Double precision or MOVE16", 25353: }; 25354: private static final String[] M60_FSLW_TEXT_TT = { 25355: "TT=0 Normal access", 25356: "TT=1 MOVE16 access", 25357: "TT=2 Alternate or debug access", 25358: "TT=3 Acknowledge or LPSTOP broadcast", 25359: }; 25360: private static final String[] M60_FSLW_TEXT_TM = { 25361: "TM=0 Data cache push access", 25362: "TM=1 User data or MOVE16 access", 25363: "TM=2 User code access", 25364: "TM=3 MMU table search data access", 25365: "TM=4 MMU table search code access", 25366: "TM=5 Supervisor data access", 25367: "TM=6 Supervisor code access", 25368: "TM=7 Reserved", 25369: //"TM=0 Logical function code 0", 25370: //"TM=1 Debug access", 25371: //"TM=2 Reserved", 25372: //"TM=3 Logical function code 3", 25373: //"TM=4 Logical function code 4", 25374: //"TM=5 Debug pipe control mode access", 25375: //"TM=6 Debug pipe control mode access", 25376: //"TM=7 Logical function code 7", 25377: }; 25378: private static final String[] M60_FSLW_TEXT_CAUSE = { 25379: "SEE=1 Software emulation error", //0 25380: "", //1 25381: "BPE=1 Branch prediction error", //2 25382: "TTR=1 TTR hit", //3 25383: "WE=1 Bus error on write", //4 25384: "RE=1 Bus error on read", //5 25385: "TWE=1 Bus error on table search", //6 25386: "WP=1 Write protect", //7 25387: "SP=1 Supervisor protect", //8 25388: "PF=1 Page fault", //9 25389: "IL=1 Indirect level fault", //10 25390: "PTB=1 Pointer B fault", //11 25391: "PTA=1 Pointer A fault", //12 25392: "SBE=1 Store buffer bus error", //13 25393: "PBE=1 Push buffer bus error", //14 25394: }; 25395: 25396: private static String m60ErrorToString () { 25397: StringBuilder sb = new StringBuilder (); 25398: int supervisor = m60FSLW & M60_FSLW_TM_SUPERVISOR; 25399: int instruction = m60FSLW & M60_FSLW_TM_CODE; 25400: if (0 <= M68kException.m6eNumber && M68kException.m6eNumber < M68kException.M6E_ERROR_NAME.length) { 25401: sb.append (M68kException.M6E_ERROR_NAME[M68kException.m6eNumber]); 25402: } else { 25403: sb.append ("undefined exception #").append (M68kException.m6eNumber); 25404: } 25405: XEiJ.fmtHex8 (sb.append (" at PC=$"), XEiJ.regPC0).append ("($"); 25406: int pa = mmuTranslatePeek (XEiJ.regPC0, supervisor, 1); 25407: if ((XEiJ.regPC0 ^ pa) == 1) { 25408: sb.append ("????????"); 25409: } else { 25410: XEiJ.fmtHex8 (sb, pa); 25411: } 25412: XEiJ.fmtHex4 (sb.append ("), SR=$"), XEiJ.regSRT1 | XEiJ.regSRS | XEiJ.regSRI | XEiJ.regCCR); 25413: // 111111111122222222223333333333444444444455555555556666 25414: // 0123456789012345678901234567890123456789012345678901234567890123 25415: if (0b0011011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) { //FORMAT $2,$4 25416: XEiJ.fmtHex8 (sb.append ("\n Fault or effective address is EA=$"), m60Address).append ("($"); 25417: pa = mmuTranslatePeek (m60Address, supervisor, instruction); 25418: if ((m60Address ^ pa) == 1) { 25419: sb.append ("????????"); 25420: } else { 25421: XEiJ.fmtHex8 (sb, pa); 25422: } 25423: sb.append (')'); 25424: } 25425: if (M68kException.m6eNumber == M68kException.M6E_ACCESS_FAULT) { //FORMAT $4 25426: XEiJ.fmtHex8 (sb.append ("\n Fault status long word is FSLW=$"), m60FSLW); 25427: sb.append ("\n Fault was caused by:"); 25428: for (int i = 14; i >= 0; i--) { 25429: if ((m60FSLW & (1 << i)) != 0) { 25430: sb.append ("\n ").append (M60_FSLW_TEXT_CAUSE[i]); 25431: } 25432: } 25433: sb.append ("\n Fault occured on:\n ") 25434: .append (M60_FSLW_TEXT_IOMA[(m60FSLW & M60_FSLW_INSTRUCTION) >>> 15 - 1 | (m60FSLW & M60_FSLW_MISALIGNED) >>> 27]) 25435: .append ("\n ").append (M60_FSLW_TEXT_LK[(m60FSLW & M60_FSLW_LOCKED) >>> 25]) 25436: .append ("\n ").append (M60_FSLW_TEXT_RW[(m60FSLW & M60_FSLW_READ_AND_WRITE) >>> 23]) 25437: .append ("\n ").append (M60_FSLW_TEXT_SIZE[(m60FSLW & M60_FSLW_TRANSFER_SIZE) >>> 21]) 25438: .append ("\n ").append (M60_FSLW_TEXT_TT[(m60FSLW & M60_FSLW_TRANSFER_TYPE) >>> 19]) 25439: .append ("\n ").append (M60_FSLW_TEXT_TM[(m60FSLW & M60_FSLW_TRANSFER_MODIFIER) >>> 16]); 25440: } 25441: return sb.toString (); 25442: } //m60ErrorToString() 25443: 25444: 25445: 25446: //キャッシュアクセス時間 25447: // キャッシュONのとき、全領域でキャッシュがヒットしたことにすると速くなりすぎる 25448: // キャッシュの実体は設けないが、キャッシュミスペナルティの時間を加算する 25449: // メインメモリ、ROM、ハイメモリのリードまたはライトに以下の処理を追加する 25450: // (TMは通常のアクセス、MOVESのアクセス、MMUのテーブルサーチでFSLWに設定する) 25451: // TMが1,2,5,6(キャッシュあり) 25452: // TMが1,5(データ) 25453: // CACRのEDCが1(データキャッシュ有効) 25454: // TMが2,6(命令) 25455: // CACRのEICが1(命令キャッシュ有効) 25456: // (CMはアドレス変換時にTTR、PD、TCRから取得しATCに保存したものをアクセス時にコピーする) 25457: // CMが0,1(キャッシュ許可) 25458: // キャッシュミスペナルティを加算する 25459: // ライト 25460: // CMが0(ライトスルー) 25461: // キャッシュがヒットしたかどうかに関係なくロング時間を加算する 25462: // その他 25463: // リード、ライトともにロング時間を加算する 25464: 25465: public static final boolean CAT_ON = true; 25466: 25467: //キャッシュの配列 25468: // bit31-11 アドレス 25469: // bit1 有効 25470: // bit0 ダーティ(データのみ) 25471: private static final int[] catData = new int[4 * 128]; //データ 25472: private static final int[] catInst = new int[4 * 128]; //命令 25473: private static int catLine = 0; //ラウンドロビンで使うライン 25474: 25475: //ウェイト時間 25476: // mpuSetWaitが設定する 25477: public static long catMainLongTime = 0; //メインメモリとROM、ロング 25478: public static long catMainLineTime = 0; //メインメモリとROM、ライン 25479: public static long catHighLongTime = 0; //ハイメモリ、ロング 25480: public static long catHighLineTime = 0; //ハイメモリ、ライン 25481: 25482: //キャッシュモード 25483: public static int catCM; //キャッシュモード 25484: 25485: //catReset () 25486: // リセット 25487: public static void catReset () { 25488: Arrays.fill (catData, 0); //無効 25489: Arrays.fill (catInst, 0); //無効 25490: catLine = 0; 25491: } //catReset 25492: 25493: //catReadMainROM (a) 25494: // リードメインメモリ、リードROM 25495: public static void catReadMainROM (int a) { 25496: if (!XEiJ.busWaitCycles) { //ウェイトサイクルなし 25497: return; 25498: } 25499: int tm = m60FSLW & M60_FSLW_TRANSFER_MODIFIER; 25500: if (tm == M60_FSLW_TM_USER_DATA || 25501: tm == M60_FSLW_TM_SUPER_DATA) { //データ 25502: if (0 <= XEiJ.mpuCACR || //データキャッシュ禁止 25503: 2 <= catCM) { //プリサイズまたはインプリサイズ 25504: XEiJ.mpuClockTime += catMainLongTime; 25505: return; 25506: } 25507: int t = (a & -0x800) | 2; //タグ、有効 25508: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25509: if ((catData[i ] & -2) == t || 25510: (catData[i + 1] & -2) == t || 25511: (catData[i + 2] & -2) == t || 25512: (catData[i + 3] & -2) == t) { //ヒット 25513: return; 25514: } 25515: for (int l = 0; l < 4; l++) { 25516: if ((catData[i + l] & 2) == 0) { //無効 25517: catData[i + l] = t; //アロケート 25518: XEiJ.mpuClockTime += catMainLineTime; //充填 25519: return; 25520: } 25521: } 25522: if ((catData[i + catLine] & 1) != 0) { //ダーティ 25523: XEiJ.mpuClockTime += catMainLineTime; //排出 25524: } 25525: catData[i + catLine] = t; //アロケート 25526: XEiJ.mpuClockTime += catMainLineTime; //充填 25527: catLine = (catLine + 1) & 3; //ラウンドロビン 25528: } else if (tm == M60_FSLW_TM_USER_CODE || 25529: tm == M60_FSLW_TM_SUPER_CODE) { //命令 25530: if (0 <= (short) XEiJ.mpuCACR || //命令キャッシュ禁止 25531: 2 <= catCM) { //プリサイズまたはインプリサイズ 25532: XEiJ.mpuClockTime += catMainLongTime; 25533: return; 25534: } 25535: int t = (a & -0x800) | 2; //タグ、有効 25536: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25537: if ((catInst[i ] & -2) == t || 25538: (catInst[i + 1] & -2) == t || 25539: (catInst[i + 2] & -2) == t || 25540: (catInst[i + 3] & -2) == t) { //ヒット 25541: return; 25542: } 25543: for (int l = 0; l < 4; l++) { 25544: if ((catInst[i + l] & 2) == 0) { //無効 25545: catInst[i + l] = t; //アロケート 25546: XEiJ.mpuClockTime += catMainLineTime; //充填 25547: return; 25548: } 25549: } 25550: catInst[i + catLine] = t; //アロケート 25551: XEiJ.mpuClockTime += catMainLineTime; //充填 25552: catLine = (catLine + 1) & 3; //ラウンドロビン 25553: } else { //データでも命令でもない 25554: XEiJ.mpuClockTime += catMainLongTime; 25555: } 25556: } //catReadMainROM 25557: 25558: //catReadHigh (a) 25559: // リードハイメモリ 25560: public static void catReadHigh (int a) { 25561: if (!XEiJ.busWaitCycles) { //ウェイトサイクルなし 25562: return; 25563: } 25564: int tm = m60FSLW & M60_FSLW_TRANSFER_MODIFIER; 25565: if (tm == M60_FSLW_TM_USER_DATA || 25566: tm == M60_FSLW_TM_SUPER_DATA) { //データ 25567: if (0 <= XEiJ.mpuCACR || //データキャッシュ禁止 25568: 2 <= catCM) { //プリサイズまたはインプリサイズ 25569: XEiJ.mpuClockTime += catHighLongTime; 25570: return; 25571: } 25572: int t = (a & -0x800) | 2; //タグ、有効 25573: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25574: if ((catData[i ] & -2) == t || 25575: (catData[i + 1] & -2) == t || 25576: (catData[i + 2] & -2) == t || 25577: (catData[i + 3] & -2) == t) { //ヒット 25578: return; 25579: } 25580: for (int l = 0; l < 4; l++) { 25581: if ((catData[i + l] & 2) == 0) { //無効 25582: catData[i + l] = t; //アロケート 25583: XEiJ.mpuClockTime += catHighLineTime; //充填 25584: return; 25585: } 25586: } 25587: if ((catData[i + catLine] & 1) != 0) { //ダーティ 25588: XEiJ.mpuClockTime += catHighLineTime; //排出 25589: } 25590: catData[i + catLine] = t; //アロケート 25591: XEiJ.mpuClockTime += catHighLineTime; //充填 25592: catLine = (catLine + 1) & 3; //ラウンドロビン 25593: } else if (tm == M60_FSLW_TM_USER_CODE || 25594: tm == M60_FSLW_TM_SUPER_CODE) { //命令 25595: if (0 <= (short) XEiJ.mpuCACR || //命令キャッシュ禁止 25596: 2 <= catCM) { //プリサイズまたはインプリサイズ 25597: XEiJ.mpuClockTime += catHighLineTime; 25598: return; 25599: } 25600: int t = (a & -0x800) | 2; //タグ、有効 25601: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25602: if ((catInst[i ] & -2) == t || 25603: (catInst[i + 1] & -2) == t || 25604: (catInst[i + 2] & -2) == t || 25605: (catInst[i + 3] & -2) == t) { //ヒット 25606: return; 25607: } 25608: for (int l = 0; l < 4; l++) { 25609: if ((catInst[i + l] & 2) == 0) { //無効 25610: catInst[i + l] = t; //アロケート 25611: XEiJ.mpuClockTime += catHighLineTime; //充填 25612: return; 25613: } 25614: } 25615: catInst[i + catLine] = t; //アロケート 25616: XEiJ.mpuClockTime += catHighLineTime; //充填 25617: catLine = (catLine + 1) & 3; //ラウンドロビン 25618: } else { //データでも命令でもない 25619: XEiJ.mpuClockTime += catHighLongTime; 25620: } 25621: } //catReadHigh 25622: 25623: //catWriteMain (a) 25624: // ライトメインメモリ 25625: public static void catWriteMain (int a) { 25626: if (!XEiJ.busWaitCycles) { //ウェイトサイクルなし 25627: return; 25628: } 25629: int tm = m60FSLW & M60_FSLW_TRANSFER_MODIFIER; 25630: if (tm == M60_FSLW_TM_USER_DATA || 25631: tm == M60_FSLW_TM_SUPER_DATA) { //データ 25632: if (0 <= XEiJ.mpuCACR || //データキャッシュ禁止 25633: 2 <= catCM) { //プリサイズまたはインプリサイズ 25634: XEiJ.mpuClockTime += catMainLongTime; 25635: return; 25636: } 25637: if (catCM == 2) { //ライトスルー 25638: XEiJ.mpuClockTime += catMainLongTime; 25639: } 25640: int t = (a & -0x800) | 2; //タグ、有効 25641: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25642: for (int l = 0; l < 4; l++) { 25643: if ((catData[i + l] & -2) == t) { //ヒット 25644: catData[i + l] |= 1; //ダーティ 25645: return; 25646: } 25647: } 25648: for (int l = 0; l < 4; l++) { 25649: if ((catData[i + l] & 2) == 0) { //無効 25650: catData[i + l] = t | 1; //アロケート、ダーティ 25651: XEiJ.mpuClockTime += catMainLineTime; //充填 25652: return; 25653: } 25654: } 25655: if ((catData[i + catLine] & 1) != 0) { //ダーティ 25656: XEiJ.mpuClockTime += catMainLineTime; //排出 25657: } 25658: catData[i + catLine] = t | 1; //アロケート、ダーティ 25659: XEiJ.mpuClockTime += catMainLineTime; //充填 25660: catLine = (catLine + 1) & 3; //ラウンドロビン 25661: } else { //データでない 25662: XEiJ.mpuClockTime += catMainLongTime; 25663: } 25664: } //catWriteMain 25665: 25666: //catWriteHigh (a) 25667: // ライトハイメモリ 25668: public static void catWriteHigh (int a) { 25669: if (!XEiJ.busWaitCycles) { //ウェイトサイクルなし 25670: return; 25671: } 25672: int tm = m60FSLW & M60_FSLW_TRANSFER_MODIFIER; 25673: if (tm == M60_FSLW_TM_USER_DATA || 25674: tm == M60_FSLW_TM_SUPER_DATA) { //データ 25675: if (0 <= XEiJ.mpuCACR || //データキャッシュ禁止 25676: 2 <= catCM) { //プリサイズまたはインプリサイズ 25677: XEiJ.mpuClockTime += catHighLongTime; 25678: return; 25679: } 25680: if (catCM == 2) { //ライトスルー 25681: XEiJ.mpuClockTime += catHighLongTime; 25682: } 25683: int t = (a & -0x800) | 2; //タグ、有効 25684: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25685: for (int l = 0; l < 4; l++) { 25686: if ((catData[i + l] & -2) == t) { //ヒット 25687: catData[i + l] |= 1; //ダーティ 25688: return; 25689: } 25690: } 25691: for (int l = 0; l < 4; l++) { 25692: if ((catData[i + l] & 2) == 0) { //無効 25693: catData[i + l] = t | 1; //アロケート、ダーティ 25694: XEiJ.mpuClockTime += catHighLineTime; //充填 25695: return; 25696: } 25697: } 25698: if ((catData[i + catLine] & 1) != 0) { //ダーティ 25699: XEiJ.mpuClockTime += catHighLineTime; //排出 25700: } 25701: catData[i + catLine] = t | 1; //アロケート、ダーティ 25702: XEiJ.mpuClockTime += catHighLineTime; //充填 25703: catLine = (catLine + 1) & 3; //ラウンドロビン 25704: } else { //データでない 25705: XEiJ.mpuClockTime += catHighLongTime; 25706: } 25707: } //catWriteHigh 25708: 25709: private static boolean catMove16InProgress; //MOVE16実行中 25710: private static int catSavedEDC; //保存されたEDC 25711: private static long catSavedMainLongTime; //保存されたメインメモリのロング時間 25712: private static long catSavedHighLongTime; //保存されたハイメモリのロング時間 25713: 25714: //catMove16Start () 25715: // MOVE16開始 25716: // EDCを保存 25717: // EDCをクリア 25718: // ロングの時間を保存 25719: // ロングの時間をラインの時間の1/4に変更 25720: // MOVE16はEDCに関係なく常にラインの時間がかかる 25721: private static void catMove16Start () { 25722: if (!XEiJ.busWaitCycles) { //ウェイトサイクルなし 25723: return; 25724: } 25725: XEiJ.mpuCycleCount += 11; 25726: catMove16InProgress = true; 25727: //EDCを保存 25728: catSavedEDC = XEiJ.mpuCACR & 0x80000000; 25729: //EDCをクリア 25730: XEiJ.mpuCACR &= 0x7FFFFFFF; 25731: //ロングの時間を保存 25732: catSavedMainLongTime = catMainLongTime; 25733: catSavedHighLongTime = catHighLongTime; 25734: //ロングの時間をラインの時間の1/4に変更 25735: catMainLongTime = catMainLineTime >> 2; 25736: catHighLongTime = catHighLineTime >> 2; 25737: } //catMove16Start 25738: 25739: //catMove16End () 25740: // MOVE16終了 25741: // EDCを復元 25742: // ロングの時間を復元 25743: private static void catMove16End () { 25744: if (!catMove16InProgress) { 25745: return; 25746: } 25747: catMove16InProgress = false; 25748: //EDCを復元 25749: XEiJ.mpuCACR |= catSavedEDC; 25750: //ロングの時間を復元 25751: catMainLongTime = catSavedMainLongTime; 25752: catHighLongTime = catSavedHighLongTime; 25753: } //catMove16End 25754: 25755: //catInvL (id, a) 25756: // ライン無効 25757: private static void catInvL (int id, int a) { 25758: int t = (a & -0x800) | 2; //タグ、有効 25759: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25760: if ((id & 1) != 0) { //データ 25761: for (int l = 0; l < 4; l++) { 25762: if ((catData[i + l] & -2) == t) { //ヒット 25763: catData[i + l] = 0; //無効 25764: break; 25765: } 25766: } 25767: } 25768: if ((id & 2) != 0) { //命令 25769: for (int l = 0; l < 4; l++) { 25770: if ((catInst[i + l] & -2) == t) { //ヒット 25771: catInst[i + l] = 0; //無効 25772: break; 25773: } 25774: } 25775: } 25776: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * 18; //<=18 25777: } //catInvL 25778: 25779: //catInvP (id, a) 25780: // ページ無効 25781: private static void catInvP (int id, int a) { 25782: int t = (a & -0x800) | 2; //タグ、有効 25783: if ((id & 1) != 0) { //データ 25784: for (int i = 0; i < 512; i++) { 25785: if ((catData[i] & -2) == t) { //ヒット 25786: catData[i] = 0; //無効 25787: } 25788: } 25789: } 25790: if ((id & 2) != 0) { //命令 25791: for (int i = 0; i < 512; i++) { 25792: if ((catInst[i] & -2) == t) { //ヒット 25793: catInst[i] = 0; //無効 25794: } 25795: } 25796: } 25797: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * (18 + 256); //<=274 25798: } //catInvP 25799: 25800: //catInvA (id) 25801: // 全無効 25802: private static void catInvA (int id) { 25803: if ((id & 1) != 0) { //データ 25804: Arrays.fill (catData, 0); //無効 25805: } 25806: if ((id & 2) != 0) { //命令 25807: Arrays.fill (catInst, 0); //無効 25808: } 25809: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * 18; //<=17 25810: } //catInvA 25811: 25812: //catPushL (id, a) 25813: // ラインプッシュ 25814: private static void catPushL (int id, int a) { 25815: int k = 0; 25816: int t = (a & -0x800) | 2; //タグ、有効 25817: int i = (a & 0x7f0) >>> 2; //4*(0～127) 25818: if ((id & 1) != 0) { //データ 25819: for (int l = 0; l < 4; l++) { 25820: if ((catData[i + l] & -2) == t) { //ヒット 25821: if ((catData[i + l] & 1) == 1) { //ダーティ 25822: k++; //ライトライン 25823: } 25824: catData[i + l] = 0; //無効 25825: break; 25826: } 25827: } 25828: } 25829: if ((id & 2) != 0) { //命令 25830: for (int l = 0; l < 4; l++) { 25831: if ((catInst[i + l] & -2) == t) { //ヒット 25832: catInst[i + l] = 0; //無効 25833: break; 25834: } 25835: } 25836: } 25837: long lineTime = (XEiJ.busExMemoryStart <= a && a < XEiJ.busExMemoryStart + XEiJ.busExMemorySize 25838: ? catHighLineTime : catMainLineTime); 25839: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * 18 + lineTime * k; //<=26 25840: } //catPushL 25841: 25842: //catPushP (id, a) 25843: // ページプッシュ 25844: private static void catPushP (int id, int a) { 25845: int k = 0; 25846: int t = (a & -0x800) | 2; //タグ、有効 25847: if ((id & 1) != 0) { //データ 25848: for (int i = 0; i < 512; i++) { 25849: if ((catData[i] & -2) == t) { //ヒット 25850: if ((catData[i] & 1) == 1) { //ダーティ 25851: k++; //ライトライン 25852: } 25853: catData[i] = 0; //無効 25854: } 25855: } 25856: } 25857: if ((id & 2) != 0) { //命令 25858: for (int i = 0; i < 512; i++) { 25859: if ((catInst[i] & -2) == t) { //ヒット 25860: catInst[i] = 0; //無効 25861: } 25862: } 25863: } 25864: long lineTime = (XEiJ.busExMemoryStart <= a && a < XEiJ.busExMemoryStart + XEiJ.busExMemorySize 25865: ? catHighLineTime : catMainLineTime); 25866: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * (18 + 256) + lineTime * k; //<=2838 25867: } //catPushP 25868: 25869: //catPushA (id) 25870: // 全プッシュ 25871: private static void catPushA (int id) { 25872: int km = 0, kh = 0; 25873: if ((id & 1) != 0) { //データ 25874: for (int i = 0; i < 512; i++) { 25875: if ((catData[i] & 3) == 3) { //有効、ダーティ 25876: int a = catData[i] & -4; 25877: if (XEiJ.busExMemoryStart <= a && a < XEiJ.busExMemoryStart + XEiJ.busExMemorySize) { 25878: kh++; 25879: } else { 25880: km++; 25881: } 25882: } 25883: } 25884: Arrays.fill (catData, 0); //無効 25885: } 25886: if ((id & 2) != 0) { //命令 25887: Arrays.fill (catInst, 0); //無効 25888: } 25889: XEiJ.mpuClockTime += XEiJ.mpuCycleUnit * (18 + 256) + catMainLineTime * km + catHighLineTime * kh; //<=5394 25890: } //catPushA 25891: 25892: 25893: 25894: } //class MC68060 25895: 25896: 25897: