1: //======================================================================================== 2: // MC68EC030.java 3: // en:MC68EC030 core 4: // ja:MC68EC030コア 5: // Copyright (C) 2003-2025 Makoto Kamada 6: // 7: // This file is part of the XEiJ (X68000 Emulator in Java). 8: // You can use, modify and redistribute the XEiJ if the conditions are met. 9: // Read the XEiJ License for more details. 10: // https://stdkmd.net/xeij/ 11: //======================================================================================== 12: 13: package xeij; 14: 15: import java.lang.*; //Boolean,Character,Class,Comparable,Double,Exception,Float,IllegalArgumentException,Integer,Long,Math,Number,Object,Runnable,SecurityException,String,StringBuilder,System 16: 17: public class MC68EC030 { 18: 19: //ゼロ除算のときの未定義フラグ 20: // MC68030はゼロ除算のときオペランド以外の要因でZとVが変化する 21: // VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 22: // 参考 23: // https://twitter.com/moveccr/status/814032098692513792 24: // https://twitter.com/isaki68k/status/814036909030682624 25: public static final boolean M30_DIV_ZERO_V_FLAG = true; //true=ゼロ除算のVフラグの再現を試みる 26: public static boolean m30DivZeroVFlag; 27: 28: public static void mpuCore () { 29: 30: //例外ループ 31: // 別のメソッドで検出された例外を命令ループの外側でcatchすることで命令ループを高速化する 32: errorLoop: 33: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 34: try { 35: //命令ループ 36: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 37: int t; 38: //命令を実行する 39: XEiJ.mpuTraceFlag = XEiJ.regSRT1; //命令実行前のsrT1 40: XEiJ.mpuCycleCount = 0; //第1オペコードからROMのアクセスウエイトを有効にする。命令のサイクル数はすべてXEiJ.mpuCycleCount+=～で加えること 41: XEiJ.regPC0 = t = XEiJ.regPC; //命令の先頭アドレス 42: XEiJ.regPC = t + 2; 43: XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1MemoryMap : DataBreakPoint.DBP_ON ? XEiJ.regSRS != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap : XEiJ.busMemoryMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); //第1オペコード。必ずゼロ拡張すること。pcに奇数が入っていることはないのでアドレスエラーのチェックを省略する 44: 45: //命令の処理 46: // 第1オペコードの上位10ビットで分岐する 47: irpSwitch: 48: switch (XEiJ.regOC >>> 6) { //第1オペコードの上位10ビット。XEiJ.regOCはゼロ拡張されているので0b1111_111_111&を省略 49: 50: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 51: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 52: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 53: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 54: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 55: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 56: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 57: case 0b0000_000_000: 58: irpOriByte (); 59: break irpSwitch; 60: 61: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 62: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 63: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 64: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 65: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 66: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 67: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 68: case 0b0000_000_001: 69: irpOriWord (); 70: break irpSwitch; 71: 72: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 73: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 74: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 75: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 76: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 77: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 78: case 0b0000_000_010: 79: irpOriLong (); 80: break irpSwitch; 81: 82: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 83: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 84: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 85: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 86: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 87: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 88: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 89: case 0b0000_000_011: 90: irpCmp2Chk2Byte (); 91: break irpSwitch; 92: 93: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 94: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 95: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 96: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 97: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 98: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 99: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 100: case 0b0000_000_100: 101: case 0b0000_001_100: 102: case 0b0000_010_100: 103: case 0b0000_011_100: 104: case 0b0000_100_100: 105: case 0b0000_101_100: 106: case 0b0000_110_100: 107: case 0b0000_111_100: 108: irpBtstReg (); 109: break irpSwitch; 110: 111: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 112: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 113: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 114: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 115: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 116: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 117: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 118: case 0b0000_000_101: 119: case 0b0000_001_101: 120: case 0b0000_010_101: 121: case 0b0000_011_101: 122: case 0b0000_100_101: 123: case 0b0000_101_101: 124: case 0b0000_110_101: 125: case 0b0000_111_101: 126: irpBchgReg (); 127: break irpSwitch; 128: 129: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 130: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 131: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 132: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 133: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 134: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 135: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 136: case 0b0000_000_110: 137: case 0b0000_001_110: 138: case 0b0000_010_110: 139: case 0b0000_011_110: 140: case 0b0000_100_110: 141: case 0b0000_101_110: 142: case 0b0000_110_110: 143: case 0b0000_111_110: 144: irpBclrReg (); 145: break irpSwitch; 146: 147: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 148: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 149: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 150: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 151: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 152: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 153: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 154: case 0b0000_000_111: 155: case 0b0000_001_111: 156: case 0b0000_010_111: 157: case 0b0000_011_111: 158: case 0b0000_100_111: 159: case 0b0000_101_111: 160: case 0b0000_110_111: 161: case 0b0000_111_111: 162: irpBsetReg (); 163: break irpSwitch; 164: 165: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 166: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 167: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 168: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 169: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 170: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 171: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 172: case 0b0000_001_000: 173: irpAndiByte (); 174: break irpSwitch; 175: 176: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 177: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 178: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 179: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 180: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 181: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 182: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 183: case 0b0000_001_001: 184: irpAndiWord (); 185: break irpSwitch; 186: 187: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 188: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 189: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 190: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 191: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 192: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 193: case 0b0000_001_010: 194: irpAndiLong (); 195: break irpSwitch; 196: 197: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 198: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 199: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 200: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 201: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 202: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 203: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 204: case 0b0000_001_011: 205: irpCmp2Chk2Word (); 206: break irpSwitch; 207: 208: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 209: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 210: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 211: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 212: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 213: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 214: case 0b0000_010_000: 215: irpSubiByte (); 216: break irpSwitch; 217: 218: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 219: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 220: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 221: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 222: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 223: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 224: case 0b0000_010_001: 225: irpSubiWord (); 226: break irpSwitch; 227: 228: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 229: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 230: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 231: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 232: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 233: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 234: case 0b0000_010_010: 235: irpSubiLong (); 236: break irpSwitch; 237: 238: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 239: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 240: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 241: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 242: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 243: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 244: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 245: case 0b0000_010_011: 246: irpCmp2Chk2Long (); 247: break irpSwitch; 248: 249: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 250: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 251: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 252: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 253: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 254: case 0b0000_011_000: 255: irpAddiByte (); 256: break irpSwitch; 257: 258: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 259: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 260: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 261: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 262: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 263: case 0b0000_011_001: 264: irpAddiWord (); 265: break irpSwitch; 266: 267: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 268: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 269: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 270: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 271: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 272: case 0b0000_011_010: 273: irpAddiLong (); 274: break irpSwitch; 275: 276: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 277: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 278: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 279: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 280: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 281: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 282: case 0b0000_100_000: 283: irpBtstImm (); 284: break irpSwitch; 285: 286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 287: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 288: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 290: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 291: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 292: case 0b0000_100_001: 293: irpBchgImm (); 294: break irpSwitch; 295: 296: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 297: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 298: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 300: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 301: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 302: case 0b0000_100_010: 303: irpBclrImm (); 304: break irpSwitch; 305: 306: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 307: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 308: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 310: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 311: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 312: case 0b0000_100_011: 313: irpBsetImm (); 314: break irpSwitch; 315: 316: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 317: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 318: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 319: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 320: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 321: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 322: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 323: case 0b0000_101_000: 324: irpEoriByte (); 325: break irpSwitch; 326: 327: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 328: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 329: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 330: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 331: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 332: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 333: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 334: case 0b0000_101_001: 335: irpEoriWord (); 336: break irpSwitch; 337: 338: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 339: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 340: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 342: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 343: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 344: case 0b0000_101_010: 345: irpEoriLong (); 346: break irpSwitch; 347: 348: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 349: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 350: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 351: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 352: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 353: case 0b0000_101_011: 354: irpCasByte (); 355: break irpSwitch; 356: 357: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 358: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 359: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 360: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 361: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 362: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 363: case 0b0000_110_000: 364: irpCmpiByte (); 365: break irpSwitch; 366: 367: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 368: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 369: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 370: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 371: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 372: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 373: case 0b0000_110_001: 374: irpCmpiWord (); 375: break irpSwitch; 376: 377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 378: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 379: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 380: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 381: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 382: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 383: case 0b0000_110_010: 384: irpCmpiLong (); 385: break irpSwitch; 386: 387: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 388: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 389: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 390: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 391: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 392: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 393: case 0b0000_110_011: 394: irpCasWord (); 395: break irpSwitch; 396: 397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 398: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 399: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 400: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 401: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 402: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 403: case 0b0000_111_000: 404: irpMovesByte (); 405: break irpSwitch; 406: 407: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 408: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 409: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 410: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 411: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 412: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 413: case 0b0000_111_001: 414: irpMovesWord (); 415: break irpSwitch; 416: 417: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 418: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 419: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 420: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 421: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 422: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 423: case 0b0000_111_010: 424: irpMovesLong (); 425: break irpSwitch; 426: 427: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 428: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 429: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 430: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 431: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 432: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 433: case 0b0000_111_011: 434: irpCasLong (); 435: break irpSwitch; 436: 437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 441: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 442: case 0b0001_000_000: 443: case 0b0001_001_000: 444: case 0b0001_010_000: 445: case 0b0001_011_000: 446: case 0b0001_100_000: 447: case 0b0001_101_000: 448: case 0b0001_110_000: 449: case 0b0001_111_000: 450: irpMoveToDRByte (); 451: break irpSwitch; 452: 453: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 454: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 455: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 456: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 457: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 458: case 0b0001_000_010: 459: case 0b0001_001_010: 460: case 0b0001_010_010: 461: case 0b0001_011_010: 462: case 0b0001_100_010: 463: case 0b0001_101_010: 464: case 0b0001_110_010: 465: case 0b0001_111_010: 466: irpMoveToMMByte (); 467: break irpSwitch; 468: 469: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 470: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 471: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 472: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 473: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 474: case 0b0001_000_011: 475: case 0b0001_001_011: 476: case 0b0001_010_011: 477: case 0b0001_011_011: 478: case 0b0001_100_011: 479: case 0b0001_101_011: 480: case 0b0001_110_011: 481: case 0b0001_111_011: 482: irpMoveToMPByte (); 483: break irpSwitch; 484: 485: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 486: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 487: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 489: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 490: case 0b0001_000_100: 491: case 0b0001_001_100: 492: case 0b0001_010_100: 493: case 0b0001_011_100: 494: case 0b0001_100_100: 495: case 0b0001_101_100: 496: case 0b0001_110_100: 497: case 0b0001_111_100: 498: irpMoveToMNByte (); 499: break irpSwitch; 500: 501: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 502: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 503: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 504: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 505: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 506: case 0b0001_000_101: 507: case 0b0001_001_101: 508: case 0b0001_010_101: 509: case 0b0001_011_101: 510: case 0b0001_100_101: 511: case 0b0001_101_101: 512: case 0b0001_110_101: 513: case 0b0001_111_101: 514: irpMoveToMWByte (); 515: break irpSwitch; 516: 517: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 518: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 519: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 520: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 521: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 522: case 0b0001_000_110: 523: case 0b0001_001_110: 524: case 0b0001_010_110: 525: case 0b0001_011_110: 526: case 0b0001_100_110: 527: case 0b0001_101_110: 528: case 0b0001_110_110: 529: case 0b0001_111_110: 530: irpMoveToMXByte (); 531: break irpSwitch; 532: 533: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 534: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 535: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 536: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 537: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 538: case 0b0001_000_111: 539: irpMoveToZWByte (); 540: break irpSwitch; 541: 542: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 543: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 544: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 545: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 546: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 547: case 0b0001_001_111: 548: irpMoveToZLByte (); 549: break irpSwitch; 550: 551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 552: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 553: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 554: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 555: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 556: case 0b0010_000_000: 557: case 0b0010_001_000: 558: case 0b0010_010_000: 559: case 0b0010_011_000: 560: case 0b0010_100_000: 561: case 0b0010_101_000: 562: case 0b0010_110_000: 563: case 0b0010_111_000: 564: irpMoveToDRLong (); 565: break irpSwitch; 566: 567: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 568: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 569: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 570: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 571: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 572: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 573: case 0b0010_000_001: 574: case 0b0010_001_001: 575: case 0b0010_010_001: 576: case 0b0010_011_001: 577: case 0b0010_100_001: 578: case 0b0010_101_001: 579: case 0b0010_110_001: 580: case 0b0010_111_001: 581: irpMoveaLong (); 582: break irpSwitch; 583: 584: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 585: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 586: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 587: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 588: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 589: case 0b0010_000_010: 590: case 0b0010_001_010: 591: case 0b0010_010_010: 592: case 0b0010_011_010: 593: case 0b0010_100_010: 594: case 0b0010_101_010: 595: case 0b0010_110_010: 596: case 0b0010_111_010: 597: irpMoveToMMLong (); 598: break irpSwitch; 599: 600: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 601: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 602: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 603: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 604: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 605: case 0b0010_000_011: 606: case 0b0010_001_011: 607: case 0b0010_010_011: 608: case 0b0010_011_011: 609: case 0b0010_100_011: 610: case 0b0010_101_011: 611: case 0b0010_110_011: 612: case 0b0010_111_011: 613: irpMoveToMPLong (); 614: break irpSwitch; 615: 616: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 617: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 618: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 619: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 620: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 621: case 0b0010_000_100: 622: case 0b0010_001_100: 623: case 0b0010_010_100: 624: case 0b0010_011_100: 625: case 0b0010_100_100: 626: case 0b0010_101_100: 627: case 0b0010_110_100: 628: case 0b0010_111_100: 629: irpMoveToMNLong (); 630: break irpSwitch; 631: 632: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 633: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 634: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 635: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 636: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 637: case 0b0010_000_101: 638: case 0b0010_001_101: 639: case 0b0010_010_101: 640: case 0b0010_011_101: 641: case 0b0010_100_101: 642: case 0b0010_101_101: 643: case 0b0010_110_101: 644: case 0b0010_111_101: 645: irpMoveToMWLong (); 646: break irpSwitch; 647: 648: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 649: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 650: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 651: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 652: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 653: case 0b0010_000_110: 654: case 0b0010_001_110: 655: case 0b0010_010_110: 656: case 0b0010_011_110: 657: case 0b0010_100_110: 658: case 0b0010_101_110: 659: case 0b0010_110_110: 660: case 0b0010_111_110: 661: irpMoveToMXLong (); 662: break irpSwitch; 663: 664: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 665: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 666: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 667: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 668: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 669: case 0b0010_000_111: 670: irpMoveToZWLong (); 671: break irpSwitch; 672: 673: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 674: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 675: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 676: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 677: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 678: case 0b0010_001_111: 679: irpMoveToZLLong (); 680: break irpSwitch; 681: 682: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 683: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 684: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 685: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 686: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 687: case 0b0011_000_000: 688: case 0b0011_001_000: 689: case 0b0011_010_000: 690: case 0b0011_011_000: 691: case 0b0011_100_000: 692: case 0b0011_101_000: 693: case 0b0011_110_000: 694: case 0b0011_111_000: 695: irpMoveToDRWord (); 696: break irpSwitch; 697: 698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 699: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 700: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 702: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 703: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 704: case 0b0011_000_001: 705: case 0b0011_001_001: 706: case 0b0011_010_001: 707: case 0b0011_011_001: 708: case 0b0011_100_001: 709: case 0b0011_101_001: 710: case 0b0011_110_001: 711: case 0b0011_111_001: 712: irpMoveaWord (); 713: break irpSwitch; 714: 715: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 716: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 717: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 718: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 719: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 720: case 0b0011_000_010: 721: case 0b0011_001_010: 722: case 0b0011_010_010: 723: case 0b0011_011_010: 724: case 0b0011_100_010: 725: case 0b0011_101_010: 726: case 0b0011_110_010: 727: case 0b0011_111_010: 728: irpMoveToMMWord (); 729: break irpSwitch; 730: 731: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 732: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 733: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 734: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 735: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 736: case 0b0011_000_011: 737: case 0b0011_001_011: 738: case 0b0011_010_011: 739: case 0b0011_011_011: 740: case 0b0011_100_011: 741: case 0b0011_101_011: 742: case 0b0011_110_011: 743: case 0b0011_111_011: 744: irpMoveToMPWord (); 745: break irpSwitch; 746: 747: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 748: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 749: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 750: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 751: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 752: case 0b0011_000_100: 753: case 0b0011_001_100: 754: case 0b0011_010_100: 755: case 0b0011_011_100: 756: case 0b0011_100_100: 757: case 0b0011_101_100: 758: case 0b0011_110_100: 759: case 0b0011_111_100: 760: irpMoveToMNWord (); 761: break irpSwitch; 762: 763: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 764: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 765: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 767: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 768: case 0b0011_000_101: 769: case 0b0011_001_101: 770: case 0b0011_010_101: 771: case 0b0011_011_101: 772: case 0b0011_100_101: 773: case 0b0011_101_101: 774: case 0b0011_110_101: 775: case 0b0011_111_101: 776: irpMoveToMWWord (); 777: break irpSwitch; 778: 779: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 780: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 781: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 782: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 783: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 784: case 0b0011_000_110: 785: case 0b0011_001_110: 786: case 0b0011_010_110: 787: case 0b0011_011_110: 788: case 0b0011_100_110: 789: case 0b0011_101_110: 790: case 0b0011_110_110: 791: case 0b0011_111_110: 792: irpMoveToMXWord (); 793: break irpSwitch; 794: 795: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 796: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 797: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 798: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 799: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 800: case 0b0011_000_111: 801: irpMoveToZWWord (); 802: break irpSwitch; 803: 804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 805: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 806: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 808: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 809: case 0b0011_001_111: 810: irpMoveToZLWord (); 811: break irpSwitch; 812: 813: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 814: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 815: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 816: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 817: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 818: case 0b0100_000_000: 819: irpNegxByte (); 820: break irpSwitch; 821: 822: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 823: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 824: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 825: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 826: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 827: case 0b0100_000_001: 828: irpNegxWord (); 829: break irpSwitch; 830: 831: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 832: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 833: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 834: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 835: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 836: case 0b0100_000_010: 837: irpNegxLong (); 838: break irpSwitch; 839: 840: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 841: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 842: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 843: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 844: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 845: case 0b0100_000_011: 846: irpMoveFromSR (); 847: break irpSwitch; 848: 849: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 850: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 851: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 852: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 853: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 854: case 0b0100_000_100: 855: case 0b0100_001_100: 856: case 0b0100_010_100: 857: case 0b0100_011_100: 858: case 0b0100_100_100: 859: case 0b0100_101_100: 860: case 0b0100_110_100: 861: case 0b0100_111_100: 862: irpChkLong (); 863: break irpSwitch; 864: 865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 869: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 870: case 0b0100_000_110: 871: case 0b0100_001_110: 872: case 0b0100_010_110: 873: case 0b0100_011_110: 874: case 0b0100_100_110: 875: case 0b0100_101_110: 876: case 0b0100_110_110: 877: case 0b0100_111_110: 878: irpChkWord (); 879: break irpSwitch; 880: 881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 882: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 883: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 884: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 885: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 886: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 887: case 0b0100_000_111: 888: case 0b0100_001_111: 889: case 0b0100_010_111: 890: case 0b0100_011_111: 891: case 0b0100_100_111: 892: case 0b0100_101_111: 893: case 0b0100_110_111: 894: case 0b0100_111_111: 895: irpLea (); 896: break irpSwitch; 897: 898: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 899: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 900: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 901: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 902: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 903: case 0b0100_001_000: 904: irpClrByte (); 905: break irpSwitch; 906: 907: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 908: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 909: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 911: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 912: case 0b0100_001_001: 913: irpClrWord (); 914: break irpSwitch; 915: 916: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 917: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 918: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 919: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 920: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 921: case 0b0100_001_010: 922: irpClrLong (); 923: break irpSwitch; 924: 925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 926: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 927: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 928: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 929: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 930: case 0b0100_001_011: 931: irpMoveFromCCR (); 932: break irpSwitch; 933: 934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 935: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 936: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 938: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 939: case 0b0100_010_000: 940: irpNegByte (); 941: break irpSwitch; 942: 943: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 944: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 945: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 946: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 947: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 948: case 0b0100_010_001: 949: irpNegWord (); 950: break irpSwitch; 951: 952: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 953: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 954: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 956: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 957: case 0b0100_010_010: 958: irpNegLong (); 959: break irpSwitch; 960: 961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 962: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 963: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 964: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 965: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 966: case 0b0100_010_011: 967: irpMoveToCCR (); 968: break irpSwitch; 969: 970: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 971: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 972: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 973: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 974: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 975: case 0b0100_011_000: 976: irpNotByte (); 977: break irpSwitch; 978: 979: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 980: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 981: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 982: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 983: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 984: case 0b0100_011_001: 985: irpNotWord (); 986: break irpSwitch; 987: 988: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 989: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 990: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 991: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 992: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 993: case 0b0100_011_010: 994: irpNotLong (); 995: break irpSwitch; 996: 997: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 998: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 999: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1000: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1001: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 1002: case 0b0100_011_011: 1003: irpMoveToSR (); 1004: break irpSwitch; 1005: 1006: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1007: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1008: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1010: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 1011: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 1012: case 0b0100_100_000: 1013: irpNbcd (); 1014: break irpSwitch; 1015: 1016: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1017: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1018: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1019: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1020: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 1021: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 1022: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 1023: case 0b0100_100_001: 1024: irpPea (); 1025: break irpSwitch; 1026: 1027: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1028: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1029: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1030: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1031: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 1032: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 1033: case 0b0100_100_010: 1034: irpMovemToMemWord (); 1035: break irpSwitch; 1036: 1037: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1038: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1039: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1040: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1041: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 1042: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 1043: case 0b0100_100_011: 1044: irpMovemToMemLong (); 1045: break irpSwitch; 1046: 1047: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1048: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1049: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1050: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1051: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 1052: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 1053: case 0b0100_101_000: 1054: irpTstByte (); 1055: break irpSwitch; 1056: 1057: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1058: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1059: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1061: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 1062: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 1063: case 0b0100_101_001: 1064: irpTstWord (); 1065: break irpSwitch; 1066: 1067: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1068: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1069: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1070: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1071: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 1072: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 1073: case 0b0100_101_010: 1074: irpTstLong (); 1075: break irpSwitch; 1076: 1077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1078: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1079: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1080: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1081: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 1082: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 1083: case 0b0100_101_011: 1084: irpTas (); 1085: break irpSwitch; 1086: 1087: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1088: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1089: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1090: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1091: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 1092: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 1093: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 1094: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 1095: case 0b0100_110_000: 1096: irpMuluMulsLong (); 1097: break irpSwitch; 1098: 1099: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1100: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1101: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1102: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1103: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 1104: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 1105: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 1106: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 1107: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 1108: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 1109: case 0b0100_110_001: 1110: irpDivuDivsLong (); 1111: break irpSwitch; 1112: 1113: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1114: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1115: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1116: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1117: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 1118: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 1119: case 0b0100_110_010: 1120: irpMovemToRegWord (); 1121: break irpSwitch; 1122: 1123: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1124: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1125: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1126: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1127: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 1128: case 0b0100_110_011: 1129: irpMovemToRegLong (); 1130: break irpSwitch; 1131: 1132: case 0b0100_111_001: 1133: switch (XEiJ.regOC & 0b111_111) { 1134: 1135: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1136: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1137: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1138: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1139: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 1140: case 0b000_000: 1141: case 0b000_001: 1142: case 0b000_010: 1143: case 0b000_011: 1144: case 0b000_100: 1145: case 0b000_101: 1146: case 0b000_110: 1147: case 0b000_111: 1148: case 0b001_000: 1149: case 0b001_001: 1150: case 0b001_010: 1151: case 0b001_011: 1152: case 0b001_100: 1153: case 0b001_101: 1154: case 0b001_110: 1155: irpTrap (); 1156: break irpSwitch; 1157: case 0b001_111: 1158: irpTrap15 (); 1159: break irpSwitch; 1160: 1161: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1162: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1163: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1164: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1165: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 1166: case 0b010_000: 1167: case 0b010_001: 1168: case 0b010_010: 1169: case 0b010_011: 1170: case 0b010_100: 1171: case 0b010_101: 1172: case 0b010_110: 1173: case 0b010_111: 1174: irpLinkWord (); 1175: break irpSwitch; 1176: 1177: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1178: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1179: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1180: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1181: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 1182: case 0b011_000: 1183: case 0b011_001: 1184: case 0b011_010: 1185: case 0b011_011: 1186: case 0b011_100: 1187: case 0b011_101: 1188: case 0b011_110: 1189: case 0b011_111: 1190: irpUnlk (); 1191: break irpSwitch; 1192: 1193: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1194: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1195: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1196: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1197: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 1198: case 0b100_000: 1199: case 0b100_001: 1200: case 0b100_010: 1201: case 0b100_011: 1202: case 0b100_100: 1203: case 0b100_101: 1204: case 0b100_110: 1205: case 0b100_111: 1206: irpMoveToUsp (); 1207: break irpSwitch; 1208: 1209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1210: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1211: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1213: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 1214: case 0b101_000: 1215: case 0b101_001: 1216: case 0b101_010: 1217: case 0b101_011: 1218: case 0b101_100: 1219: case 0b101_101: 1220: case 0b101_110: 1221: case 0b101_111: 1222: irpMoveFromUsp (); 1223: break irpSwitch; 1224: 1225: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1226: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1227: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1228: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1229: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 1230: case 0b110_000: 1231: irpReset (); 1232: break irpSwitch; 1233: 1234: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1235: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1236: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1237: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1238: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 1239: case 0b110_001: 1240: irpNop (); 1241: break irpSwitch; 1242: 1243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1244: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1245: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1246: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1247: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 1248: case 0b110_010: 1249: irpStop (); 1250: break irpSwitch; 1251: 1252: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1253: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1254: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1255: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1256: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 1257: case 0b110_011: 1258: irpRte (); 1259: break irpSwitch; 1260: 1261: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1262: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1263: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1264: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1265: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 1266: case 0b110_100: 1267: irpRtd (); 1268: break irpSwitch; 1269: 1270: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1271: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1272: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1273: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1274: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 1275: case 0b110_101: 1276: irpRts (); 1277: break irpSwitch; 1278: 1279: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1280: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1281: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1282: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1283: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 1284: case 0b110_110: 1285: irpTrapv (); 1286: break irpSwitch; 1287: 1288: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1289: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1290: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1291: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1292: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 1293: case 0b110_111: 1294: irpRtr (); 1295: break irpSwitch; 1296: 1297: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1298: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1299: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1300: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1301: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 1302: case 0b111_010: 1303: irpMovecFromControl (); 1304: break irpSwitch; 1305: 1306: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1307: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1308: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1310: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 1311: case 0b111_011: 1312: irpMovecToControl (); 1313: break irpSwitch; 1314: 1315: default: 1316: irpIllegal (); 1317: 1318: } //switch XEiJ.regOC & 0b111_111 1319: break irpSwitch; 1320: 1321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1322: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1323: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1324: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1325: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 1326: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 1327: case 0b0100_111_010: 1328: irpJsr (); 1329: break irpSwitch; 1330: 1331: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1332: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1333: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1334: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1335: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 1336: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 1337: case 0b0100_111_011: 1338: irpJmp (); 1339: break irpSwitch; 1340: 1341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1342: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1343: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1344: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1345: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 1346: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 1347: case 0b0101_000_000: 1348: case 0b0101_001_000: 1349: case 0b0101_010_000: 1350: case 0b0101_011_000: 1351: case 0b0101_100_000: 1352: case 0b0101_101_000: 1353: case 0b0101_110_000: 1354: case 0b0101_111_000: 1355: irpAddqByte (); 1356: break irpSwitch; 1357: 1358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1359: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1360: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1361: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1362: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 1363: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 1364: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 1365: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 1366: case 0b0101_000_001: 1367: case 0b0101_001_001: 1368: case 0b0101_010_001: 1369: case 0b0101_011_001: 1370: case 0b0101_100_001: 1371: case 0b0101_101_001: 1372: case 0b0101_110_001: 1373: case 0b0101_111_001: 1374: irpAddqWord (); 1375: break irpSwitch; 1376: 1377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1378: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1379: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1380: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1381: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 1382: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 1383: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 1384: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 1385: case 0b0101_000_010: 1386: case 0b0101_001_010: 1387: case 0b0101_010_010: 1388: case 0b0101_011_010: 1389: case 0b0101_100_010: 1390: case 0b0101_101_010: 1391: case 0b0101_110_010: 1392: case 0b0101_111_010: 1393: irpAddqLong (); 1394: break irpSwitch; 1395: 1396: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1397: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1398: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1399: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1400: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 1401: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 1402: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 1403: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 1404: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 1405: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1406: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1407: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1408: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 1409: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1410: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1411: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1412: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 1413: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1414: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1415: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1416: case 0b0101_000_011: 1417: irpSt (); 1418: break irpSwitch; 1419: 1420: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1421: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1422: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1424: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 1425: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 1426: case 0b0101_000_100: 1427: case 0b0101_001_100: 1428: case 0b0101_010_100: 1429: case 0b0101_011_100: 1430: case 0b0101_100_100: 1431: case 0b0101_101_100: 1432: case 0b0101_110_100: 1433: case 0b0101_111_100: 1434: irpSubqByte (); 1435: break irpSwitch; 1436: 1437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1441: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 1442: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 1443: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 1444: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 1445: case 0b0101_000_101: 1446: case 0b0101_001_101: 1447: case 0b0101_010_101: 1448: case 0b0101_011_101: 1449: case 0b0101_100_101: 1450: case 0b0101_101_101: 1451: case 0b0101_110_101: 1452: case 0b0101_111_101: 1453: irpSubqWord (); 1454: break irpSwitch; 1455: 1456: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1457: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1458: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1459: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1460: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 1461: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 1462: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 1463: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 1464: case 0b0101_000_110: 1465: case 0b0101_001_110: 1466: case 0b0101_010_110: 1467: case 0b0101_011_110: 1468: case 0b0101_100_110: 1469: case 0b0101_101_110: 1470: case 0b0101_110_110: 1471: case 0b0101_111_110: 1472: irpSubqLong (); 1473: break irpSwitch; 1474: 1475: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1476: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1477: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1478: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1479: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 1480: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 1481: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 1482: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1483: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1484: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 1485: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1486: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1487: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1488: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 1489: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1490: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1491: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1492: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 1493: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1494: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1495: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1496: case 0b0101_000_111: 1497: irpSf (); 1498: break irpSwitch; 1499: 1500: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1501: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1502: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1504: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 1505: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 1506: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 1507: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 1508: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 1509: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1510: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1511: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1512: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 1513: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1514: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1515: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1516: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 1517: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1518: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1519: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1520: case 0b0101_001_011: 1521: irpShi (); 1522: break irpSwitch; 1523: 1524: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1525: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1526: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1528: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 1529: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 1530: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 1531: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 1532: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1533: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1534: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1535: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1536: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1537: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1538: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1539: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1540: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 1541: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1542: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1543: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1544: case 0b0101_001_111: 1545: irpSls (); 1546: break irpSwitch; 1547: 1548: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1549: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1550: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1552: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 1553: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1554: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1555: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1556: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 1557: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1558: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1559: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1560: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 1561: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1562: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1563: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1564: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1565: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1566: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1567: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1568: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 1569: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1570: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1571: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1572: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1573: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1574: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1575: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1576: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 1577: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1578: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1579: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1580: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1581: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1582: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1583: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1584: case 0b0101_010_011: 1585: irpShs (); 1586: break irpSwitch; 1587: 1588: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1589: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1590: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1591: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1592: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 1593: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1594: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1595: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1596: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 1597: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1598: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1599: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1600: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 1601: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1602: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1603: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1604: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1605: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1606: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1607: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1608: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 1609: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1610: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1611: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1612: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1613: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1614: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1615: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1616: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 1617: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1618: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1619: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1620: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1621: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1622: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1623: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1624: case 0b0101_010_111: 1625: irpSlo (); 1626: break irpSwitch; 1627: 1628: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1629: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1630: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1631: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1632: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 1633: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1634: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1635: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1636: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 1637: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1638: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1639: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1640: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 1641: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1642: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1643: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1644: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1645: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1646: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1647: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1648: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 1649: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1650: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1651: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1652: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1653: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1654: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1655: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1656: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 1657: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1658: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1659: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1660: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1661: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1662: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1663: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1664: case 0b0101_011_011: 1665: irpSne (); 1666: break irpSwitch; 1667: 1668: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1669: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1670: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1671: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1672: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 1673: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1674: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1675: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1676: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 1677: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1678: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1679: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1680: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 1681: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1682: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1683: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1684: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1685: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1686: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1687: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1688: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 1689: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1690: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1691: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1692: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1693: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1694: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1695: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1696: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 1697: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1698: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1699: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1700: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1701: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1702: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1703: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1704: case 0b0101_011_111: 1705: irpSeq (); 1706: break irpSwitch; 1707: 1708: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1709: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1710: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1711: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1712: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 1713: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 1714: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 1715: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 1716: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 1717: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1718: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1719: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1720: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 1721: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1722: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1723: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1724: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 1725: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1726: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1727: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1728: case 0b0101_100_011: 1729: irpSvc (); 1730: break irpSwitch; 1731: 1732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1733: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1734: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1736: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 1737: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 1738: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 1739: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 1740: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 1741: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1742: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1743: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1744: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 1745: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1746: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1747: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1748: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 1749: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1750: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1751: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1752: case 0b0101_100_111: 1753: irpSvs (); 1754: break irpSwitch; 1755: 1756: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1757: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1758: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1759: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1760: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 1761: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 1762: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 1763: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 1764: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 1765: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1766: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1767: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1768: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 1769: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1770: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1771: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1772: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 1773: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1774: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1775: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1776: case 0b0101_101_011: 1777: irpSpl (); 1778: break irpSwitch; 1779: 1780: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1781: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1782: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1783: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1784: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 1785: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 1786: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 1787: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 1788: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 1789: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1790: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1791: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1792: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 1793: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1794: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1795: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1796: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 1797: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1798: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1799: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1800: case 0b0101_101_111: 1801: irpSmi (); 1802: break irpSwitch; 1803: 1804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1805: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1806: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1808: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 1809: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 1810: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 1811: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 1812: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 1813: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1814: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1815: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1816: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 1817: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1818: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1819: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1820: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 1821: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1822: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1823: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1824: case 0b0101_110_011: 1825: irpSge (); 1826: break irpSwitch; 1827: 1828: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1829: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1830: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1831: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1832: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 1833: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 1834: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 1835: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 1836: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 1837: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1838: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1839: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1840: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 1841: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1842: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1843: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1844: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 1845: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1846: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1847: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1848: case 0b0101_110_111: 1849: irpSlt (); 1850: break irpSwitch; 1851: 1852: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1853: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1854: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1855: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1856: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 1857: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 1858: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 1859: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 1860: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 1861: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1862: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1863: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1864: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 1865: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1866: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1867: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1868: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 1869: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1870: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1871: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1872: case 0b0101_111_011: 1873: irpSgt (); 1874: break irpSwitch; 1875: 1876: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1877: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1878: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1879: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1880: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 1881: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 1882: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 1883: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 1884: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 1885: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1886: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1887: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1888: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 1889: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1890: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1891: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1892: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 1893: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1894: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1895: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1896: case 0b0101_111_111: 1897: irpSle (); 1898: break irpSwitch; 1899: 1900: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1901: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1902: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1903: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1904: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 1905: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 1906: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 1907: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 1908: case 0b0110_000_000: 1909: irpBrasw (); 1910: break irpSwitch; 1911: 1912: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1913: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1914: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1915: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1916: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 1917: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 1918: case 0b0110_000_001: 1919: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1920: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1921: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1922: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1923: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 1924: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 1925: case 0b0110_000_010: 1926: irpBras (); 1927: break irpSwitch; 1928: 1929: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1930: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1931: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1932: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1933: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 1934: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 1935: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 1936: case 0b0110_000_011: 1937: irpBrasl (); 1938: break irpSwitch; 1939: 1940: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1941: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1942: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1943: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1944: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 1945: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 1946: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 1947: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 1948: case 0b0110_000_100: 1949: irpBsrsw (); 1950: break irpSwitch; 1951: 1952: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1953: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1954: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1956: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 1957: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 1958: case 0b0110_000_101: 1959: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1960: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1961: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1962: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1963: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 1964: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 1965: case 0b0110_000_110: 1966: irpBsrs (); 1967: break irpSwitch; 1968: 1969: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1970: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1971: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1972: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1973: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 1974: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 1975: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 1976: case 0b0110_000_111: 1977: irpBsrsl (); 1978: break irpSwitch; 1979: 1980: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1981: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1982: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1983: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1984: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 1985: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1986: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1987: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1988: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 1989: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1990: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1991: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1992: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1993: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1994: case 0b0110_001_000: 1995: irpBhisw (); 1996: break irpSwitch; 1997: 1998: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1999: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2000: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2001: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2002: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 2003: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2004: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2005: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2006: case 0b0110_001_001: 2007: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2008: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2009: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2010: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2011: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 2012: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2013: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2014: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2015: case 0b0110_001_010: 2016: irpBhis (); 2017: break irpSwitch; 2018: 2019: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2020: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2021: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2022: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2023: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 2024: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2025: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2026: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2027: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 2028: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 2029: case 0b0110_001_011: 2030: irpBhisl (); 2031: break irpSwitch; 2032: 2033: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2034: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2035: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2036: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2037: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 2038: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2039: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2040: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2041: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 2042: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2043: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2044: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2045: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2046: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2047: case 0b0110_001_100: 2048: irpBlssw (); 2049: break irpSwitch; 2050: 2051: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2052: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2053: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2054: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2055: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 2056: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2057: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2058: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2059: case 0b0110_001_101: 2060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2061: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2062: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2063: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2064: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 2065: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2066: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2067: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2068: case 0b0110_001_110: 2069: irpBlss (); 2070: break irpSwitch; 2071: 2072: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2073: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2074: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2075: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2076: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 2077: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2078: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2079: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2080: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 2081: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 2082: case 0b0110_001_111: 2083: irpBlssl (); 2084: break irpSwitch; 2085: 2086: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2087: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2088: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2090: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 2091: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2092: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2093: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2094: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2095: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2096: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2097: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2098: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 2099: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2100: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2101: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2102: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2103: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2104: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2105: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2106: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2107: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2108: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2109: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2110: case 0b0110_010_000: 2111: irpBhssw (); 2112: break irpSwitch; 2113: 2114: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2115: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2116: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2117: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2118: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 2119: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2120: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2121: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2122: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2123: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2124: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2125: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2126: case 0b0110_010_001: 2127: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2128: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2129: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2130: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2131: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 2132: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2133: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2134: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2135: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2136: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2137: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2138: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2139: case 0b0110_010_010: 2140: irpBhss (); 2141: break irpSwitch; 2142: 2143: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2144: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2145: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2146: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2147: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 2148: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2149: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2150: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2151: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2152: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2153: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2154: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2155: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 2156: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2157: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2158: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2159: case 0b0110_010_011: 2160: irpBhssl (); 2161: break irpSwitch; 2162: 2163: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2164: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2165: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2166: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2167: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 2168: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2169: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2170: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2171: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2172: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2173: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2174: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2175: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 2176: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2177: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2178: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2179: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2180: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2181: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2182: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2183: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2184: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2185: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2186: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2187: case 0b0110_010_100: 2188: irpBlosw (); 2189: break irpSwitch; 2190: 2191: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2192: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2193: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2194: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2195: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 2196: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2197: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2198: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2199: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2200: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2201: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2202: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2203: case 0b0110_010_101: 2204: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2205: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2206: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2207: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2208: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 2209: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2210: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2211: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2212: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2213: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2214: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2215: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2216: case 0b0110_010_110: 2217: irpBlos (); 2218: break irpSwitch; 2219: 2220: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2221: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2222: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2223: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2224: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 2225: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2226: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2227: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2228: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2229: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2230: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2231: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2232: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 2233: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2234: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2235: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2236: case 0b0110_010_111: 2237: irpBlosl (); 2238: break irpSwitch; 2239: 2240: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2241: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2242: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2244: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 2245: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2246: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2247: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2248: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2249: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2250: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2251: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2252: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 2253: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2254: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2255: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2256: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2257: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2258: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2259: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2260: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2261: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2262: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2263: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2264: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2265: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2266: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2267: case 0b0110_011_000: 2268: irpBnesw (); 2269: break irpSwitch; 2270: 2271: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2272: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2273: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2274: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2275: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 2276: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2277: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2278: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2279: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2280: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2281: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2282: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2283: case 0b0110_011_001: 2284: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2285: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2286: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2287: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2288: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 2289: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2290: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2291: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2292: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2293: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2294: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2295: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2296: case 0b0110_011_010: 2297: irpBnes (); 2298: break irpSwitch; 2299: 2300: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2301: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2302: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2303: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2304: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 2305: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2306: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2307: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2308: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2309: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2310: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2311: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2312: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 2313: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2314: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2315: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2316: case 0b0110_011_011: 2317: irpBnesl (); 2318: break irpSwitch; 2319: 2320: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2321: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2322: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2324: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 2325: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2326: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2327: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2328: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2329: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2330: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2331: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2332: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 2333: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2334: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2335: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2336: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2337: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2338: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2339: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2340: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 2341: case 0b0110_011_100: 2342: irpBeqsw (); 2343: break irpSwitch; 2344: 2345: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2346: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2347: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2348: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2349: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 2350: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2351: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2352: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2353: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2354: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2355: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2356: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2357: case 0b0110_011_101: 2358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2359: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2360: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2361: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2362: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 2363: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2364: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2365: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2366: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2367: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2368: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2369: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2370: case 0b0110_011_110: 2371: irpBeqs (); 2372: break irpSwitch; 2373: 2374: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2375: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2376: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2378: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 2379: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2380: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2381: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2382: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2383: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2384: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2385: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2386: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 2387: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2388: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2389: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2390: case 0b0110_011_111: 2391: irpBeqsl (); 2392: break irpSwitch; 2393: 2394: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2395: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2396: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2398: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 2399: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2400: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2401: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2402: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 2403: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2404: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2405: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2406: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2407: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2408: case 0b0110_100_000: 2409: irpBvcsw (); 2410: break irpSwitch; 2411: 2412: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2413: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2414: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2415: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2416: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 2417: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2418: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2419: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2420: case 0b0110_100_001: 2421: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2422: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2423: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2424: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2425: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 2426: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2427: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2428: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2429: case 0b0110_100_010: 2430: irpBvcs (); 2431: break irpSwitch; 2432: 2433: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2434: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2435: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2436: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2437: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 2438: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2439: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2440: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2441: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 2442: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 2443: case 0b0110_100_011: 2444: irpBvcsl (); 2445: break irpSwitch; 2446: 2447: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2448: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2449: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2450: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2451: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 2452: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2453: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2454: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2455: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 2456: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2457: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2458: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2459: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2460: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2461: case 0b0110_100_100: 2462: irpBvssw (); 2463: break irpSwitch; 2464: 2465: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2466: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2467: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2468: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2469: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 2470: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2471: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2472: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2473: case 0b0110_100_101: 2474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2475: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2476: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2477: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2478: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 2479: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2480: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2481: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2482: case 0b0110_100_110: 2483: irpBvss (); 2484: break irpSwitch; 2485: 2486: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2487: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2488: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2489: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2490: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 2491: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2492: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2493: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2494: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 2495: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 2496: case 0b0110_100_111: 2497: irpBvssl (); 2498: break irpSwitch; 2499: 2500: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2501: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2502: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2504: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 2505: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2506: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2507: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2508: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 2509: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2510: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2511: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2512: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2513: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2514: case 0b0110_101_000: 2515: irpBplsw (); 2516: break irpSwitch; 2517: 2518: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2519: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2520: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2521: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2522: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 2523: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2524: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2525: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2526: case 0b0110_101_001: 2527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2528: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2529: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2530: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2531: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 2532: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2533: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2534: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2535: case 0b0110_101_010: 2536: irpBpls (); 2537: break irpSwitch; 2538: 2539: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2540: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2541: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2542: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2543: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 2544: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2545: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2546: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2547: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 2548: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 2549: case 0b0110_101_011: 2550: irpBplsl (); 2551: break irpSwitch; 2552: 2553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2554: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2555: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2557: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 2558: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2559: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2560: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2561: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 2562: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2563: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2564: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2565: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2566: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2567: case 0b0110_101_100: 2568: irpBmisw (); 2569: break irpSwitch; 2570: 2571: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2572: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2573: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2574: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2575: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 2576: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2577: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2578: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2579: case 0b0110_101_101: 2580: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2581: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2582: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2583: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2584: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 2585: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2586: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2587: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2588: case 0b0110_101_110: 2589: irpBmis (); 2590: break irpSwitch; 2591: 2592: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2593: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2594: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2595: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2596: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 2597: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2598: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2599: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2600: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 2601: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 2602: case 0b0110_101_111: 2603: irpBmisl (); 2604: break irpSwitch; 2605: 2606: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2607: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2608: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2609: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2610: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 2611: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2612: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2613: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2614: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 2615: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2616: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2617: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2618: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2619: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2620: case 0b0110_110_000: 2621: irpBgesw (); 2622: break irpSwitch; 2623: 2624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2625: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2626: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2627: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2628: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 2629: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2630: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2631: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2632: case 0b0110_110_001: 2633: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2634: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2635: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2636: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2637: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 2638: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2639: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2640: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2641: case 0b0110_110_010: 2642: irpBges (); 2643: break irpSwitch; 2644: 2645: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2646: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2647: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2648: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2649: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 2650: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2651: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2652: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2653: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 2654: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 2655: case 0b0110_110_011: 2656: irpBgesl (); 2657: break irpSwitch; 2658: 2659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2660: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2661: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2663: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 2664: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2665: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2666: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2667: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 2668: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2669: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2670: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2671: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2672: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2673: case 0b0110_110_100: 2674: irpBltsw (); 2675: break irpSwitch; 2676: 2677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2678: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2679: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2680: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2681: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 2682: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2683: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2684: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2685: case 0b0110_110_101: 2686: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2687: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2688: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2689: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2690: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 2691: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2692: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2693: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2694: case 0b0110_110_110: 2695: irpBlts (); 2696: break irpSwitch; 2697: 2698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2699: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2700: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2702: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 2703: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2704: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2705: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2706: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 2707: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 2708: case 0b0110_110_111: 2709: irpBltsl (); 2710: break irpSwitch; 2711: 2712: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2713: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2714: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2715: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2716: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 2717: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2718: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2719: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2720: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 2721: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2722: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2723: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2724: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2725: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2726: case 0b0110_111_000: 2727: irpBgtsw (); 2728: break irpSwitch; 2729: 2730: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2731: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2732: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2734: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 2735: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2736: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2737: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2738: case 0b0110_111_001: 2739: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2740: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2741: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2742: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2743: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 2744: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2745: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2746: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2747: case 0b0110_111_010: 2748: irpBgts (); 2749: break irpSwitch; 2750: 2751: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2752: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2753: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2754: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2755: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 2756: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2757: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2758: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2759: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 2760: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 2761: case 0b0110_111_011: 2762: irpBgtsl (); 2763: break irpSwitch; 2764: 2765: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2766: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2767: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2768: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2769: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 2770: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2771: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2772: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2773: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 2774: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2775: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2776: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2777: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2778: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2779: case 0b0110_111_100: 2780: irpBlesw (); 2781: break irpSwitch; 2782: 2783: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2784: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2785: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2786: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2787: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 2788: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2789: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2790: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2791: case 0b0110_111_101: 2792: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2793: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2794: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2795: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2796: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 2797: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2798: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2799: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2800: case 0b0110_111_110: 2801: irpBles (); 2802: break irpSwitch; 2803: 2804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2805: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2806: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2808: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 2809: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2810: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2811: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2812: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 2813: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 2814: case 0b0110_111_111: 2815: irpBlesl (); 2816: break irpSwitch; 2817: 2818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2822: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 2823: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 2824: case 0b0111_000_000: 2825: case 0b0111_000_001: 2826: case 0b0111_000_010: 2827: case 0b0111_000_011: 2828: case 0b0111_001_000: 2829: case 0b0111_001_001: 2830: case 0b0111_001_010: 2831: case 0b0111_001_011: 2832: case 0b0111_010_000: 2833: case 0b0111_010_001: 2834: case 0b0111_010_010: 2835: case 0b0111_010_011: 2836: case 0b0111_011_000: 2837: case 0b0111_011_001: 2838: case 0b0111_011_010: 2839: case 0b0111_011_011: 2840: case 0b0111_100_000: 2841: case 0b0111_100_001: 2842: case 0b0111_100_010: 2843: case 0b0111_100_011: 2844: case 0b0111_101_000: 2845: case 0b0111_101_001: 2846: case 0b0111_101_010: 2847: case 0b0111_101_011: 2848: case 0b0111_110_000: 2849: case 0b0111_110_001: 2850: case 0b0111_110_010: 2851: case 0b0111_110_011: 2852: case 0b0111_111_000: 2853: case 0b0111_111_001: 2854: case 0b0111_111_010: 2855: case 0b0111_111_011: 2856: irpMoveq (); 2857: break irpSwitch; 2858: 2859: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2860: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2861: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2862: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2863: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 2864: case 0b0111_000_100: 2865: case 0b0111_001_100: 2866: case 0b0111_010_100: 2867: case 0b0111_011_100: 2868: case 0b0111_100_100: 2869: case 0b0111_101_100: 2870: case 0b0111_110_100: 2871: case 0b0111_111_100: 2872: irpMvsByte (); 2873: break irpSwitch; 2874: 2875: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2876: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2877: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2878: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2879: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 2880: case 0b0111_000_101: 2881: case 0b0111_001_101: 2882: case 0b0111_010_101: 2883: case 0b0111_011_101: 2884: case 0b0111_100_101: 2885: case 0b0111_101_101: 2886: case 0b0111_110_101: 2887: case 0b0111_111_101: 2888: irpMvsWord (); 2889: break irpSwitch; 2890: 2891: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2892: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2893: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2894: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2895: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 2896: case 0b0111_000_110: 2897: case 0b0111_001_110: 2898: case 0b0111_010_110: 2899: case 0b0111_011_110: 2900: case 0b0111_100_110: 2901: case 0b0111_101_110: 2902: case 0b0111_110_110: 2903: case 0b0111_111_110: 2904: irpMvzByte (); 2905: break irpSwitch; 2906: 2907: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2908: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2909: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2911: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 2912: case 0b0111_000_111: 2913: case 0b0111_001_111: 2914: case 0b0111_010_111: 2915: case 0b0111_011_111: 2916: case 0b0111_100_111: 2917: case 0b0111_101_111: 2918: case 0b0111_110_111: 2919: case 0b0111_111_111: 2920: irpMvzWord (); 2921: break irpSwitch; 2922: 2923: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2924: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2925: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2926: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2927: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 2928: case 0b1000_000_000: 2929: case 0b1000_001_000: 2930: case 0b1000_010_000: 2931: case 0b1000_011_000: 2932: case 0b1000_100_000: 2933: case 0b1000_101_000: 2934: case 0b1000_110_000: 2935: case 0b1000_111_000: 2936: irpOrToRegByte (); 2937: break irpSwitch; 2938: 2939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2940: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2941: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2943: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 2944: case 0b1000_000_001: 2945: case 0b1000_001_001: 2946: case 0b1000_010_001: 2947: case 0b1000_011_001: 2948: case 0b1000_100_001: 2949: case 0b1000_101_001: 2950: case 0b1000_110_001: 2951: case 0b1000_111_001: 2952: irpOrToRegWord (); 2953: break irpSwitch; 2954: 2955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2956: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2957: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2958: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2959: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 2960: case 0b1000_000_010: 2961: case 0b1000_001_010: 2962: case 0b1000_010_010: 2963: case 0b1000_011_010: 2964: case 0b1000_100_010: 2965: case 0b1000_101_010: 2966: case 0b1000_110_010: 2967: case 0b1000_111_010: 2968: irpOrToRegLong (); 2969: break irpSwitch; 2970: 2971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2972: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2973: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2974: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2975: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 2976: case 0b1000_000_011: 2977: case 0b1000_001_011: 2978: case 0b1000_010_011: 2979: case 0b1000_011_011: 2980: case 0b1000_100_011: 2981: case 0b1000_101_011: 2982: case 0b1000_110_011: 2983: case 0b1000_111_011: 2984: irpDivuWord (); 2985: break irpSwitch; 2986: 2987: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2988: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2989: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2990: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2991: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 2992: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 2993: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 2994: case 0b1000_000_100: 2995: case 0b1000_001_100: 2996: case 0b1000_010_100: 2997: case 0b1000_011_100: 2998: case 0b1000_100_100: 2999: case 0b1000_101_100: 3000: case 0b1000_110_100: 3001: case 0b1000_111_100: 3002: irpOrToMemByte (); 3003: break irpSwitch; 3004: 3005: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3006: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3007: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3009: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 3010: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 3011: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 3012: case 0b1000_000_101: 3013: case 0b1000_001_101: 3014: case 0b1000_010_101: 3015: case 0b1000_011_101: 3016: case 0b1000_100_101: 3017: case 0b1000_101_101: 3018: case 0b1000_110_101: 3019: case 0b1000_111_101: 3020: irpOrToMemWord (); 3021: break irpSwitch; 3022: 3023: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3024: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3025: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3026: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3027: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 3028: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 3029: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 3030: case 0b1000_000_110: 3031: case 0b1000_001_110: 3032: case 0b1000_010_110: 3033: case 0b1000_011_110: 3034: case 0b1000_100_110: 3035: case 0b1000_101_110: 3036: case 0b1000_110_110: 3037: case 0b1000_111_110: 3038: irpOrToMemLong (); 3039: break irpSwitch; 3040: 3041: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3042: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3043: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3044: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3045: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 3046: case 0b1000_000_111: 3047: case 0b1000_001_111: 3048: case 0b1000_010_111: 3049: case 0b1000_011_111: 3050: case 0b1000_100_111: 3051: case 0b1000_101_111: 3052: case 0b1000_110_111: 3053: case 0b1000_111_111: 3054: irpDivsWord (); 3055: break irpSwitch; 3056: 3057: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3058: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3059: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3061: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 3062: case 0b1001_000_000: 3063: case 0b1001_001_000: 3064: case 0b1001_010_000: 3065: case 0b1001_011_000: 3066: case 0b1001_100_000: 3067: case 0b1001_101_000: 3068: case 0b1001_110_000: 3069: case 0b1001_111_000: 3070: irpSubToRegByte (); 3071: break irpSwitch; 3072: 3073: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3074: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3075: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3076: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3077: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 3078: case 0b1001_000_001: 3079: case 0b1001_001_001: 3080: case 0b1001_010_001: 3081: case 0b1001_011_001: 3082: case 0b1001_100_001: 3083: case 0b1001_101_001: 3084: case 0b1001_110_001: 3085: case 0b1001_111_001: 3086: irpSubToRegWord (); 3087: break irpSwitch; 3088: 3089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3090: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3091: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3092: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3093: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 3094: case 0b1001_000_010: 3095: case 0b1001_001_010: 3096: case 0b1001_010_010: 3097: case 0b1001_011_010: 3098: case 0b1001_100_010: 3099: case 0b1001_101_010: 3100: case 0b1001_110_010: 3101: case 0b1001_111_010: 3102: irpSubToRegLong (); 3103: break irpSwitch; 3104: 3105: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3106: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3107: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3108: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3109: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 3110: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 3111: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 3112: case 0b1001_000_011: 3113: case 0b1001_001_011: 3114: case 0b1001_010_011: 3115: case 0b1001_011_011: 3116: case 0b1001_100_011: 3117: case 0b1001_101_011: 3118: case 0b1001_110_011: 3119: case 0b1001_111_011: 3120: irpSubaWord (); 3121: break irpSwitch; 3122: 3123: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3124: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3125: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3126: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3127: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 3128: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 3129: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 3130: case 0b1001_000_100: 3131: case 0b1001_001_100: 3132: case 0b1001_010_100: 3133: case 0b1001_011_100: 3134: case 0b1001_100_100: 3135: case 0b1001_101_100: 3136: case 0b1001_110_100: 3137: case 0b1001_111_100: 3138: irpSubToMemByte (); 3139: break irpSwitch; 3140: 3141: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3142: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3143: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3144: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3145: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 3146: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 3147: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 3148: case 0b1001_000_101: 3149: case 0b1001_001_101: 3150: case 0b1001_010_101: 3151: case 0b1001_011_101: 3152: case 0b1001_100_101: 3153: case 0b1001_101_101: 3154: case 0b1001_110_101: 3155: case 0b1001_111_101: 3156: irpSubToMemWord (); 3157: break irpSwitch; 3158: 3159: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3160: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3161: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3162: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3163: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 3164: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 3165: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 3166: case 0b1001_000_110: 3167: case 0b1001_001_110: 3168: case 0b1001_010_110: 3169: case 0b1001_011_110: 3170: case 0b1001_100_110: 3171: case 0b1001_101_110: 3172: case 0b1001_110_110: 3173: case 0b1001_111_110: 3174: irpSubToMemLong (); 3175: break irpSwitch; 3176: 3177: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3178: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3179: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3180: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3181: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 3182: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 3183: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 3184: case 0b1001_000_111: 3185: case 0b1001_001_111: 3186: case 0b1001_010_111: 3187: case 0b1001_011_111: 3188: case 0b1001_100_111: 3189: case 0b1001_101_111: 3190: case 0b1001_110_111: 3191: case 0b1001_111_111: 3192: irpSubaLong (); 3193: break irpSwitch; 3194: 3195: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3196: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3197: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3198: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3199: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 3200: case 0b1010_000_000: 3201: case 0b1010_000_001: 3202: case 0b1010_000_010: 3203: case 0b1010_000_011: 3204: case 0b1010_000_100: 3205: case 0b1010_000_101: 3206: case 0b1010_000_110: 3207: case 0b1010_000_111: 3208: case 0b1010_001_000: 3209: case 0b1010_001_001: 3210: case 0b1010_001_010: 3211: case 0b1010_001_011: 3212: case 0b1010_001_100: 3213: case 0b1010_001_101: 3214: case 0b1010_001_110: 3215: case 0b1010_001_111: 3216: case 0b1010_010_000: 3217: case 0b1010_010_001: 3218: case 0b1010_010_010: 3219: case 0b1010_010_011: 3220: case 0b1010_010_100: 3221: case 0b1010_010_101: 3222: case 0b1010_010_110: 3223: case 0b1010_010_111: 3224: case 0b1010_011_000: 3225: case 0b1010_011_001: 3226: case 0b1010_011_010: 3227: case 0b1010_011_011: 3228: case 0b1010_011_100: 3229: case 0b1010_011_101: 3230: case 0b1010_011_110: 3231: case 0b1010_011_111: 3232: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3233: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3234: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3235: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3236: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 3237: case 0b1010_100_000: 3238: case 0b1010_100_001: 3239: case 0b1010_100_010: 3240: case 0b1010_100_011: 3241: case 0b1010_100_100: 3242: case 0b1010_100_101: 3243: case 0b1010_100_110: 3244: case 0b1010_100_111: 3245: case 0b1010_101_000: 3246: case 0b1010_101_001: 3247: case 0b1010_101_010: 3248: case 0b1010_101_011: 3249: case 0b1010_101_100: 3250: case 0b1010_101_101: 3251: case 0b1010_101_110: 3252: case 0b1010_101_111: 3253: case 0b1010_110_000: 3254: case 0b1010_110_001: 3255: case 0b1010_110_010: 3256: case 0b1010_110_011: 3257: case 0b1010_110_100: 3258: case 0b1010_110_101: 3259: case 0b1010_110_110: 3260: case 0b1010_110_111: 3261: case 0b1010_111_000: 3262: case 0b1010_111_001: 3263: case 0b1010_111_010: 3264: case 0b1010_111_011: 3265: case 0b1010_111_100: 3266: case 0b1010_111_101: 3267: case 0b1010_111_110: 3268: case 0b1010_111_111: 3269: irpAline (); 3270: break irpSwitch; 3271: 3272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3273: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3274: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3275: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3276: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 3277: case 0b1011_000_000: 3278: case 0b1011_001_000: 3279: case 0b1011_010_000: 3280: case 0b1011_011_000: 3281: case 0b1011_100_000: 3282: case 0b1011_101_000: 3283: case 0b1011_110_000: 3284: case 0b1011_111_000: 3285: irpCmpByte (); 3286: break irpSwitch; 3287: 3288: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3289: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3290: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3291: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3292: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 3293: case 0b1011_000_001: 3294: case 0b1011_001_001: 3295: case 0b1011_010_001: 3296: case 0b1011_011_001: 3297: case 0b1011_100_001: 3298: case 0b1011_101_001: 3299: case 0b1011_110_001: 3300: case 0b1011_111_001: 3301: irpCmpWord (); 3302: break irpSwitch; 3303: 3304: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3305: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3306: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3307: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3308: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 3309: case 0b1011_000_010: 3310: case 0b1011_001_010: 3311: case 0b1011_010_010: 3312: case 0b1011_011_010: 3313: case 0b1011_100_010: 3314: case 0b1011_101_010: 3315: case 0b1011_110_010: 3316: case 0b1011_111_010: 3317: irpCmpLong (); 3318: break irpSwitch; 3319: 3320: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3321: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3322: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3324: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 3325: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 3326: case 0b1011_000_011: 3327: case 0b1011_001_011: 3328: case 0b1011_010_011: 3329: case 0b1011_011_011: 3330: case 0b1011_100_011: 3331: case 0b1011_101_011: 3332: case 0b1011_110_011: 3333: case 0b1011_111_011: 3334: irpCmpaWord (); 3335: break irpSwitch; 3336: 3337: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3338: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3339: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3341: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 3342: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 3343: case 0b1011_000_100: 3344: case 0b1011_001_100: 3345: case 0b1011_010_100: 3346: case 0b1011_011_100: 3347: case 0b1011_100_100: 3348: case 0b1011_101_100: 3349: case 0b1011_110_100: 3350: case 0b1011_111_100: 3351: irpEorByte (); 3352: break irpSwitch; 3353: 3354: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3355: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3356: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3357: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3358: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 3359: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 3360: case 0b1011_000_101: 3361: case 0b1011_001_101: 3362: case 0b1011_010_101: 3363: case 0b1011_011_101: 3364: case 0b1011_100_101: 3365: case 0b1011_101_101: 3366: case 0b1011_110_101: 3367: case 0b1011_111_101: 3368: irpEorWord (); 3369: break irpSwitch; 3370: 3371: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3372: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3373: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3374: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3375: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 3376: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 3377: case 0b1011_000_110: 3378: case 0b1011_001_110: 3379: case 0b1011_010_110: 3380: case 0b1011_011_110: 3381: case 0b1011_100_110: 3382: case 0b1011_101_110: 3383: case 0b1011_110_110: 3384: case 0b1011_111_110: 3385: irpEorLong (); 3386: break irpSwitch; 3387: 3388: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3389: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3390: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3391: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3392: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 3393: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 3394: case 0b1011_000_111: 3395: case 0b1011_001_111: 3396: case 0b1011_010_111: 3397: case 0b1011_011_111: 3398: case 0b1011_100_111: 3399: case 0b1011_101_111: 3400: case 0b1011_110_111: 3401: case 0b1011_111_111: 3402: irpCmpaLong (); 3403: break irpSwitch; 3404: 3405: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3406: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3407: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3408: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3409: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 3410: case 0b1100_000_000: 3411: case 0b1100_001_000: 3412: case 0b1100_010_000: 3413: case 0b1100_011_000: 3414: case 0b1100_100_000: 3415: case 0b1100_101_000: 3416: case 0b1100_110_000: 3417: case 0b1100_111_000: 3418: irpAndToRegByte (); 3419: break irpSwitch; 3420: 3421: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3422: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3423: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3424: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3425: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 3426: case 0b1100_000_001: 3427: case 0b1100_001_001: 3428: case 0b1100_010_001: 3429: case 0b1100_011_001: 3430: case 0b1100_100_001: 3431: case 0b1100_101_001: 3432: case 0b1100_110_001: 3433: case 0b1100_111_001: 3434: irpAndToRegWord (); 3435: break irpSwitch; 3436: 3437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3441: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 3442: case 0b1100_000_010: 3443: case 0b1100_001_010: 3444: case 0b1100_010_010: 3445: case 0b1100_011_010: 3446: case 0b1100_100_010: 3447: case 0b1100_101_010: 3448: case 0b1100_110_010: 3449: case 0b1100_111_010: 3450: irpAndToRegLong (); 3451: break irpSwitch; 3452: 3453: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3454: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3455: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3456: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3457: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 3458: case 0b1100_000_011: 3459: case 0b1100_001_011: 3460: case 0b1100_010_011: 3461: case 0b1100_011_011: 3462: case 0b1100_100_011: 3463: case 0b1100_101_011: 3464: case 0b1100_110_011: 3465: case 0b1100_111_011: 3466: irpMuluWord (); 3467: break irpSwitch; 3468: 3469: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3470: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3471: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3472: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3473: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 3474: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 3475: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 3476: case 0b1100_000_100: 3477: case 0b1100_001_100: 3478: case 0b1100_010_100: 3479: case 0b1100_011_100: 3480: case 0b1100_100_100: 3481: case 0b1100_101_100: 3482: case 0b1100_110_100: 3483: case 0b1100_111_100: 3484: irpAndToMemByte (); 3485: break irpSwitch; 3486: 3487: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3488: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3489: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3490: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3491: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 3492: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 3493: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 3494: case 0b1100_000_101: 3495: case 0b1100_001_101: 3496: case 0b1100_010_101: 3497: case 0b1100_011_101: 3498: case 0b1100_100_101: 3499: case 0b1100_101_101: 3500: case 0b1100_110_101: 3501: case 0b1100_111_101: 3502: irpAndToMemWord (); 3503: break irpSwitch; 3504: 3505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3506: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3507: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3508: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3509: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 3510: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 3511: case 0b1100_000_110: 3512: case 0b1100_001_110: 3513: case 0b1100_010_110: 3514: case 0b1100_011_110: 3515: case 0b1100_100_110: 3516: case 0b1100_101_110: 3517: case 0b1100_110_110: 3518: case 0b1100_111_110: 3519: irpAndToMemLong (); 3520: break irpSwitch; 3521: 3522: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3523: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3524: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3525: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3526: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 3527: case 0b1100_000_111: 3528: case 0b1100_001_111: 3529: case 0b1100_010_111: 3530: case 0b1100_011_111: 3531: case 0b1100_100_111: 3532: case 0b1100_101_111: 3533: case 0b1100_110_111: 3534: case 0b1100_111_111: 3535: irpMulsWord (); 3536: break irpSwitch; 3537: 3538: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3539: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3540: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3542: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 3543: case 0b1101_000_000: 3544: case 0b1101_001_000: 3545: case 0b1101_010_000: 3546: case 0b1101_011_000: 3547: case 0b1101_100_000: 3548: case 0b1101_101_000: 3549: case 0b1101_110_000: 3550: case 0b1101_111_000: 3551: irpAddToRegByte (); 3552: break irpSwitch; 3553: 3554: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3555: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3556: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3557: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3558: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 3559: case 0b1101_000_001: 3560: case 0b1101_001_001: 3561: case 0b1101_010_001: 3562: case 0b1101_011_001: 3563: case 0b1101_100_001: 3564: case 0b1101_101_001: 3565: case 0b1101_110_001: 3566: case 0b1101_111_001: 3567: irpAddToRegWord (); 3568: break irpSwitch; 3569: 3570: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3571: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3572: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3573: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3574: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 3575: case 0b1101_000_010: 3576: case 0b1101_001_010: 3577: case 0b1101_010_010: 3578: case 0b1101_011_010: 3579: case 0b1101_100_010: 3580: case 0b1101_101_010: 3581: case 0b1101_110_010: 3582: case 0b1101_111_010: 3583: irpAddToRegLong (); 3584: break irpSwitch; 3585: 3586: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3587: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3588: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3589: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3590: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 3591: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 3592: case 0b1101_000_011: 3593: case 0b1101_001_011: 3594: case 0b1101_010_011: 3595: case 0b1101_011_011: 3596: case 0b1101_100_011: 3597: case 0b1101_101_011: 3598: case 0b1101_110_011: 3599: case 0b1101_111_011: 3600: irpAddaWord (); 3601: break irpSwitch; 3602: 3603: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3604: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3605: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3606: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3607: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 3608: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 3609: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 3610: case 0b1101_000_100: 3611: case 0b1101_001_100: 3612: case 0b1101_010_100: 3613: case 0b1101_011_100: 3614: case 0b1101_100_100: 3615: case 0b1101_101_100: 3616: case 0b1101_110_100: 3617: case 0b1101_111_100: 3618: irpAddToMemByte (); 3619: break irpSwitch; 3620: 3621: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3622: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3623: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3625: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 3626: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 3627: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 3628: case 0b1101_000_101: 3629: case 0b1101_001_101: 3630: case 0b1101_010_101: 3631: case 0b1101_011_101: 3632: case 0b1101_100_101: 3633: case 0b1101_101_101: 3634: case 0b1101_110_101: 3635: case 0b1101_111_101: 3636: irpAddToMemWord (); 3637: break irpSwitch; 3638: 3639: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3640: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3641: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3642: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3643: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 3644: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 3645: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 3646: case 0b1101_000_110: 3647: case 0b1101_001_110: 3648: case 0b1101_010_110: 3649: case 0b1101_011_110: 3650: case 0b1101_100_110: 3651: case 0b1101_101_110: 3652: case 0b1101_110_110: 3653: case 0b1101_111_110: 3654: irpAddToMemLong (); 3655: break irpSwitch; 3656: 3657: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3658: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3659: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3660: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3661: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 3662: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 3663: case 0b1101_000_111: 3664: case 0b1101_001_111: 3665: case 0b1101_010_111: 3666: case 0b1101_011_111: 3667: case 0b1101_100_111: 3668: case 0b1101_101_111: 3669: case 0b1101_110_111: 3670: case 0b1101_111_111: 3671: irpAddaLong (); 3672: break irpSwitch; 3673: 3674: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3675: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3676: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3678: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 3679: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 3680: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 3681: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 3682: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 3683: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 3684: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 3685: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 3686: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 3687: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 3688: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 3689: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 3690: case 0b1110_000_000: 3691: case 0b1110_001_000: 3692: case 0b1110_010_000: 3693: case 0b1110_011_000: 3694: case 0b1110_100_000: 3695: case 0b1110_101_000: 3696: case 0b1110_110_000: 3697: case 0b1110_111_000: 3698: irpXxrToRegByte (); 3699: break irpSwitch; 3700: 3701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3702: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3703: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3704: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3705: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 3706: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 3707: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 3708: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 3709: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 3710: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 3711: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 3712: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 3713: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 3714: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 3715: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 3716: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 3717: case 0b1110_000_001: 3718: case 0b1110_001_001: 3719: case 0b1110_010_001: 3720: case 0b1110_011_001: 3721: case 0b1110_100_001: 3722: case 0b1110_101_001: 3723: case 0b1110_110_001: 3724: case 0b1110_111_001: 3725: irpXxrToRegWord (); 3726: break irpSwitch; 3727: 3728: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3729: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3730: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3731: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3732: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 3733: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 3734: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 3735: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 3736: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 3737: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 3738: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 3739: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 3740: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 3741: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 3742: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 3743: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 3744: case 0b1110_000_010: 3745: case 0b1110_001_010: 3746: case 0b1110_010_010: 3747: case 0b1110_011_010: 3748: case 0b1110_100_010: 3749: case 0b1110_101_010: 3750: case 0b1110_110_010: 3751: case 0b1110_111_010: 3752: irpXxrToRegLong (); 3753: break irpSwitch; 3754: 3755: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3756: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3757: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3759: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 3760: case 0b1110_000_011: 3761: irpAsrToMem (); 3762: break irpSwitch; 3763: 3764: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3765: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3766: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3767: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3768: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 3769: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 3770: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 3771: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 3772: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 3773: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 3774: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 3775: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 3776: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 3777: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 3778: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 3779: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 3780: case 0b1110_000_100: 3781: case 0b1110_001_100: 3782: case 0b1110_010_100: 3783: case 0b1110_011_100: 3784: case 0b1110_100_100: 3785: case 0b1110_101_100: 3786: case 0b1110_110_100: 3787: case 0b1110_111_100: 3788: irpXxlToRegByte (); 3789: break irpSwitch; 3790: 3791: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3792: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3793: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3794: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3795: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 3796: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 3797: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 3798: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 3799: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 3800: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 3801: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 3802: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 3803: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 3804: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 3805: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 3806: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 3807: case 0b1110_000_101: 3808: case 0b1110_001_101: 3809: case 0b1110_010_101: 3810: case 0b1110_011_101: 3811: case 0b1110_100_101: 3812: case 0b1110_101_101: 3813: case 0b1110_110_101: 3814: case 0b1110_111_101: 3815: irpXxlToRegWord (); 3816: break irpSwitch; 3817: 3818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3822: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 3823: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 3824: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 3825: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 3826: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 3827: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 3828: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 3829: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 3830: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 3831: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 3832: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 3833: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 3834: case 0b1110_000_110: 3835: case 0b1110_001_110: 3836: case 0b1110_010_110: 3837: case 0b1110_011_110: 3838: case 0b1110_100_110: 3839: case 0b1110_101_110: 3840: case 0b1110_110_110: 3841: case 0b1110_111_110: 3842: irpXxlToRegLong (); 3843: break irpSwitch; 3844: 3845: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3846: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3847: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3848: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3849: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 3850: case 0b1110_000_111: 3851: irpAslToMem (); 3852: break irpSwitch; 3853: 3854: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3855: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3856: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3857: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3858: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 3859: case 0b1110_001_011: 3860: irpLsrToMem (); 3861: break irpSwitch; 3862: 3863: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3864: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3865: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3866: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3867: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 3868: case 0b1110_001_111: 3869: irpLslToMem (); 3870: break irpSwitch; 3871: 3872: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3873: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3874: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3875: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3876: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 3877: case 0b1110_010_011: 3878: irpRoxrToMem (); 3879: break irpSwitch; 3880: 3881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3882: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3883: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3884: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3885: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 3886: case 0b1110_010_111: 3887: irpRoxlToMem (); 3888: break irpSwitch; 3889: 3890: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3891: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3892: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3893: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3894: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 3895: case 0b1110_011_011: 3896: irpRorToMem (); 3897: break irpSwitch; 3898: 3899: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3900: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3901: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3902: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3903: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 3904: case 0b1110_011_111: 3905: irpRolToMem (); 3906: break irpSwitch; 3907: 3908: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3909: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3910: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3911: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3912: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 3913: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 3914: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 3915: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 3916: case 0b1110_100_011: 3917: irpBftst (); 3918: break irpSwitch; 3919: 3920: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3921: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3922: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3923: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3924: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 3925: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 3926: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 3927: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 3928: case 0b1110_100_111: 3929: irpBfextu (); 3930: break irpSwitch; 3931: 3932: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3933: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3934: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3935: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3936: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 3937: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 3938: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 3939: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 3940: case 0b1110_101_011: 3941: irpBfchg (); 3942: break irpSwitch; 3943: 3944: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3945: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3946: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3947: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3948: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 3949: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 3950: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 3951: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 3952: case 0b1110_101_111: 3953: irpBfexts (); 3954: break irpSwitch; 3955: 3956: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3957: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3958: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3959: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3960: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 3961: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 3962: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 3963: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 3964: case 0b1110_110_011: 3965: irpBfclr (); 3966: break irpSwitch; 3967: 3968: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3969: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3970: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3972: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 3973: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 3974: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 3975: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 3976: case 0b1110_110_111: 3977: irpBfffo (); 3978: break irpSwitch; 3979: 3980: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3981: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3982: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3983: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3984: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 3985: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 3986: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 3987: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 3988: case 0b1110_111_011: 3989: irpBfset (); 3990: break irpSwitch; 3991: 3992: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3993: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3994: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3995: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3996: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 3997: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 3998: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 3999: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 4000: case 0b1110_111_111: 4001: irpBfins (); 4002: break irpSwitch; 4003: 4004: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4005: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4006: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4007: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4008: //PFLUSHA |-|---3--|P|-----|-----| |1111_000_000_000_000-0010010000000000 4009: //PFLUSH SFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00000 4010: //PFLUSH DFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00001 4011: //PFLUSH Dn,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm01nnn 4012: //PFLUSH #<data>,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm10ddd 4013: //PMOVE.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0000000000 4014: //PMOVEFD.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0100000000 4015: //PMOVE.L TTn,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n1000000000 4016: //PLOADW SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000000 4017: //PLOADW DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000001 4018: //PLOADW Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000001nnn 4019: //PLOADW #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000010ddd 4020: //PLOADR SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000000 4021: //PLOADR DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000001 4022: //PLOADR Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000001nnn 4023: //PLOADR #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000010ddd 4024: //PFLUSH SFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00000 4025: //PFLUSH DFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00001 4026: //PFLUSH Dn,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm01nnn 4027: //PFLUSH #<data>,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm10ddd 4028: //PMOVE.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000000000000 4029: //PMOVEFD.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000100000000 4030: //PMOVE.L TC,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100001000000000 4031: //PMOVE.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100000000000 4032: //PMOVEFD.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100100000000 4033: //PMOVE.Q SRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100101000000000 4034: //PMOVE.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110000000000 4035: //PMOVEFD.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110100000000 4036: //PMOVE.Q CRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100111000000000 4037: //PMOVE.W <ea>,MMUSR |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110000000000000 4038: //PMOVE.W MMUSR,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110001000000000 4039: //PTESTW SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000000 4040: //PTESTW DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000001 4041: //PTESTW Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000001nnn 4042: //PTESTW #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000010ddd 4043: //PTESTW SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00000 4044: //PTESTW DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00001 4045: //PTESTW Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn01nnn 4046: //PTESTW #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn10ddd 4047: //PTESTR SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000000 4048: //PTESTR DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000001 4049: //PTESTR Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000001nnn 4050: //PTESTR #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000010ddd 4051: //PTESTR SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00000 4052: //PTESTR DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00001 4053: //PTESTR Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn01nnn 4054: //PTESTR #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn10ddd 4055: case 0b1111_000_000: 4056: irpPgen (); 4057: break irpSwitch; 4058: 4059: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4060: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4061: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4063: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 4064: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 4065: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 4066: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 4067: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 4068: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 4069: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 4070: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 4071: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 4072: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 4073: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 4074: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 4075: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 4076: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 4077: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 4078: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 4079: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 4080: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 4081: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 4082: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 4083: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 4084: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 4085: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 4086: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 4087: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 4088: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 4089: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 4090: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 4091: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 4092: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 4093: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 4094: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 4095: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 4096: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 4097: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 4098: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 4099: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 4100: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 4101: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 4102: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 4103: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 4104: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 4105: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 4106: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4107: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4108: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4109: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4110: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4111: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4112: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 4113: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 4114: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 4115: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 4116: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 4117: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 4118: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 4119: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 4120: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 4121: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 4122: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 4123: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 4124: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 4125: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 4126: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 4127: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 4128: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 4129: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 4130: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 4131: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 4132: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 4133: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 4134: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 4135: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 4136: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 4137: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 4138: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 4139: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 4140: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 4141: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 4142: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 4143: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 4144: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 4145: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 4146: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 4147: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 4148: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 4149: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 4150: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 4151: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 4152: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 4153: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 4154: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 4155: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 4156: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 4157: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 4158: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 4159: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 4160: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 4161: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 4162: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 4163: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 4164: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 4165: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 4166: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 4167: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 4168: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 4169: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 4170: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 4171: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 4172: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 4173: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 4174: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 4175: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 4176: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 4177: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 4178: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 4179: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 4180: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 4181: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 4182: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 4183: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 4184: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 4185: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 4186: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 4187: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 4188: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 4189: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 4190: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 4191: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 4192: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 4193: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 4194: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 4195: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 4196: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 4197: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 4198: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 4199: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 4200: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 4201: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 4202: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 4203: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 4204: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 4205: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 4206: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 4207: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 4208: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 4209: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 4210: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 4211: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 4212: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 4213: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 4214: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 4215: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 4216: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 4217: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 4218: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 4219: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 4220: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 4221: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 4222: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 4223: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 4224: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 4225: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 4226: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 4227: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 4228: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 4229: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 4230: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 4231: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 4232: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 4233: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 4234: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 4235: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 4236: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 4237: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 4238: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 4239: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 4240: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 4241: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 4242: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 4243: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 4244: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 4245: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 4246: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 4247: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 4248: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 4249: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 4250: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 4251: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 4252: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 4253: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 4254: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 4255: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 4256: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 4257: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 4258: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 4259: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 4260: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 4261: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 4262: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 4263: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 4264: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4265: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4266: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4267: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4268: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4269: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4270: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 4271: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 4272: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 4273: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 4274: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 4275: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 4276: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 4277: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 4278: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 4279: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 4280: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 4281: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 4282: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 4283: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 4284: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 4285: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 4286: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 4287: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 4288: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 4289: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 4290: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 4291: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 4292: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 4293: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 4294: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 4295: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 4296: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 4297: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 4298: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 4299: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 4300: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 4301: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 4302: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 4303: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 4304: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 4305: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 4306: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 4307: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 4308: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 4309: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 4310: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 4311: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 4312: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 4313: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 4314: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 4315: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 4316: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 4317: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 4318: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 4319: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 4320: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 4321: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 4322: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 4323: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 4324: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 4325: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 4326: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 4327: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 4328: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 4329: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 4330: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 4331: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 4332: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 4333: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 4334: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 4335: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 4336: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 4337: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 4338: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 4339: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 4340: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 4341: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 4342: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 4343: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 4344: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 4345: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 4346: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 4347: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 4348: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 4349: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 4350: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 4351: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 4352: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 4353: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 4354: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 4355: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 4356: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 4357: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 4358: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 4359: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 4360: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 4361: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 4362: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 4363: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 4364: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 4365: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 4366: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 4367: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 4368: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 4369: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 4370: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 4371: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 4372: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 4373: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 4374: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 4375: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 4376: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 4377: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 4378: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 4379: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 4380: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 4381: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 4382: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 4383: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 4384: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 4385: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 4386: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 4387: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 4388: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 4389: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 4390: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 4391: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 4392: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 4393: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 4394: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 4395: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 4396: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 4397: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 4398: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 4399: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 4400: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 4401: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 4402: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 4403: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 4404: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 4405: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 4406: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 4407: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 4408: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 4409: case 0b1111_001_000: 4410: irpFgen (); 4411: break irpSwitch; 4412: 4413: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4414: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4415: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4416: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4417: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 4418: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 4419: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 4420: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 4421: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 4422: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 4423: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 4424: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 4425: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 4426: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 4427: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 4428: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 4429: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 4430: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 4431: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 4432: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 4433: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 4434: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 4435: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 4436: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 4437: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 4438: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 4439: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 4440: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 4441: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 4442: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 4443: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 4444: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 4445: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 4446: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 4447: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 4448: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 4449: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 4450: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 4451: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 4452: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 4453: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 4454: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 4455: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 4456: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 4457: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 4458: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 4459: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 4460: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 4461: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 4462: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 4463: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 4464: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 4465: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 4466: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 4467: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 4468: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 4469: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 4470: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 4471: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 4472: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 4473: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 4474: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 4475: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 4476: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 4477: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 4478: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 4479: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 4480: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 4481: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 4482: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 4483: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 4484: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 4485: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 4486: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 4487: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 4488: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 4489: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 4490: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 4491: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 4492: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 4493: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 4494: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 4495: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 4496: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 4497: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 4498: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 4499: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 4500: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 4501: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 4502: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 4503: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 4504: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 4505: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 4506: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 4507: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 4508: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 4509: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 4510: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 4511: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 4512: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 4513: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 4514: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 4515: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 4516: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 4517: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 4518: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 4519: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 4520: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 4521: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 4522: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 4523: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 4524: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 4525: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 4526: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 4527: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 4528: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 4529: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 4530: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 4531: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 4532: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 4533: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 4534: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 4535: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 4536: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 4537: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 4538: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 4539: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 4540: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 4541: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 4542: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 4543: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 4544: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 4545: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 4546: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 4547: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 4548: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 4549: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 4550: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 4551: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 4552: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 4553: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 4554: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 4555: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 4556: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 4557: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 4558: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 4559: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 4560: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 4561: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 4562: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 4563: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 4564: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 4565: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 4566: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 4567: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 4568: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 4569: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 4570: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 4571: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 4572: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 4573: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 4574: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 4575: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 4576: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 4577: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 4578: case 0b1111_001_001: 4579: irpFscc (); 4580: break irpSwitch; 4581: 4582: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4583: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4584: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4585: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4586: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 4587: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 4588: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 4589: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 4590: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 4591: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 4592: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 4593: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 4594: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 4595: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 4596: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 4597: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 4598: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 4599: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 4600: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 4601: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 4602: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 4603: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 4604: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 4605: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 4606: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 4607: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 4608: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 4609: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 4610: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 4611: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 4612: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 4613: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 4614: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 4615: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 4616: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 4617: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 4618: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 4619: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 4620: case 0b1111_001_010: 4621: irpFbccWord (); 4622: break irpSwitch; 4623: 4624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4625: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4626: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4627: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4628: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 4629: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 4630: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 4631: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 4632: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 4633: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 4634: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 4635: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 4636: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 4637: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 4638: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 4639: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 4640: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 4641: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 4642: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 4643: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 4644: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 4645: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 4646: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 4647: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 4648: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 4649: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 4650: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 4651: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 4652: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 4653: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 4654: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 4655: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 4656: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 4657: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 4658: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 4659: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 4660: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 4661: case 0b1111_001_011: 4662: irpFbccLong (); 4663: break irpSwitch; 4664: 4665: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4666: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4667: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4668: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4669: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 4670: case 0b1111_001_100: 4671: irpFsave (); 4672: break irpSwitch; 4673: 4674: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4675: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4676: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4678: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 4679: case 0b1111_001_101: 4680: irpFrestore (); 4681: break irpSwitch; 4682: 4683: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4684: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4685: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4686: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4687: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 4688: case 0b1111_111_000: 4689: case 0b1111_111_001: 4690: case 0b1111_111_010: 4691: case 0b1111_111_011: 4692: irpFpack (); 4693: break irpSwitch; 4694: 4695: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4696: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4697: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4699: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 4700: case 0b1111_111_100: 4701: case 0b1111_111_101: 4702: case 0b1111_111_110: 4703: case 0b1111_111_111: 4704: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4705: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4706: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4707: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4708: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 4709: case 0b1111_000_001: 4710: case 0b1111_000_010: 4711: case 0b1111_000_011: 4712: case 0b1111_000_100: 4713: case 0b1111_000_101: 4714: case 0b1111_000_110: 4715: case 0b1111_000_111: 4716: case 0b1111_001_110: 4717: case 0b1111_001_111: 4718: case 0b1111_010_000: 4719: case 0b1111_010_001: 4720: case 0b1111_010_010: 4721: case 0b1111_010_011: 4722: case 0b1111_010_100: 4723: case 0b1111_010_101: 4724: case 0b1111_010_110: 4725: case 0b1111_010_111: 4726: case 0b1111_011_000: 4727: case 0b1111_011_001: 4728: case 0b1111_011_010: 4729: case 0b1111_011_011: 4730: case 0b1111_011_100: 4731: case 0b1111_011_101: 4732: case 0b1111_011_110: 4733: case 0b1111_011_111: 4734: case 0b1111_100_000: 4735: case 0b1111_100_001: 4736: case 0b1111_100_010: 4737: case 0b1111_100_011: 4738: case 0b1111_100_100: 4739: case 0b1111_100_101: 4740: case 0b1111_100_110: 4741: case 0b1111_100_111: 4742: case 0b1111_101_000: 4743: case 0b1111_101_001: 4744: case 0b1111_101_010: 4745: case 0b1111_101_011: 4746: case 0b1111_101_100: 4747: case 0b1111_101_101: 4748: case 0b1111_101_110: 4749: case 0b1111_101_111: 4750: case 0b1111_110_000: 4751: case 0b1111_110_001: 4752: case 0b1111_110_010: 4753: case 0b1111_110_011: 4754: case 0b1111_110_100: 4755: case 0b1111_110_101: 4756: case 0b1111_110_110: 4757: case 0b1111_110_111: 4758: irpFline (); 4759: break irpSwitch; 4760: 4761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4762: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4763: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4764: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4765: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 4766: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 4767: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 4768: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 4769: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 4770: case 0b0100_111_000: 4771: irpEmx (); 4772: break; 4773: 4774: default: 4775: irpIllegal (); 4776: 4777: } //switch XEiJ.regOC >>> 6 4778: 4779: //トレース例外 4780: // 命令実行前にsrのTビットがセットされていたとき命令実行後にトレース例外が発生する 4781: // トレース例外の発動は命令の機能拡張であり、他の例外処理で命令が中断されたときはトレース例外は発生しない 4782: // 命令例外はトレース例外の前に、割り込み例外はトレース例外の後に処理される 4783: // 未実装命令のエミュレーションルーチンはrteの直前にsrのTビットを復元することで未実装命令が1個の命令としてトレースされたように見せる 4784: // ;DOSコールの終了 4785: // ~008616: 4786: // btst.b #$07,(sp) 4787: // bne.s ~00861E 4788: // rte 4789: // ~00861E: 4790: // ori.w #$8000,sr 4791: // rte 4792: if (XEiJ.mpuTraceFlag != 0) { //命令実行前にsrのTビットがセットされていた 4793: XEiJ.mpuCycleCount += 34; 4794: irpException (M68kException.M6E_TRACE, XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x2000, XEiJ.regPC0); //pcは次の命令 4795: } 4796: //クロックをカウントアップする 4797: // オペランドをアクセスした時点ではまだXEiJ.mpuClockTimeが更新されていないのでXEiJ.mpuClockTime<xxxClock 4798: // xxxTickを呼び出すときはXEiJ.mpuClockTime>=xxxClock 4799: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * XEiJ.mpuCycleCount; 4800: //デバイスを呼び出す 4801: TickerQueue.tkqRun (XEiJ.mpuClockTime); 4802: //割り込みを受け付ける 4803: if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) { //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき 4804: if (XEiJ.MPU_INTERRUPT_SWITCH) { 4805: switch (t) { 4806: case 0b00000001: 4807: case 0b00000011: 4808: case 0b00000101: 4809: case 0b00000111: 4810: case 0b00001001: 4811: case 0b00001011: 4812: case 0b00001101: 4813: case 0b00001111: 4814: case 0b00010001: 4815: case 0b00010011: 4816: case 0b00010101: 4817: case 0b00010111: 4818: case 0b00011001: 4819: case 0b00011011: 4820: case 0b00011101: 4821: case 0b00011111: 4822: case 0b00100001: 4823: case 0b00100011: 4824: case 0b00100101: 4825: case 0b00100111: 4826: case 0b00101001: 4827: case 0b00101011: 4828: case 0b00101101: 4829: case 0b00101111: 4830: case 0b00110001: 4831: case 0b00110011: 4832: case 0b00110101: 4833: case 0b00110111: 4834: case 0b00111001: 4835: case 0b00111011: 4836: case 0b00111101: 4837: case 0b00111111: 4838: case 0b01000001: 4839: case 0b01000011: 4840: case 0b01000101: 4841: case 0b01000111: 4842: case 0b01001001: 4843: case 0b01001011: 4844: case 0b01001101: 4845: case 0b01001111: 4846: case 0b01010001: 4847: case 0b01010011: 4848: case 0b01010101: 4849: case 0b01010111: 4850: case 0b01011001: 4851: case 0b01011011: 4852: case 0b01011101: 4853: case 0b01011111: 4854: case 0b01100001: 4855: case 0b01100011: 4856: case 0b01100101: 4857: case 0b01100111: 4858: case 0b01101001: 4859: case 0b01101011: 4860: case 0b01101101: 4861: case 0b01101111: 4862: case 0b01110001: 4863: case 0b01110011: 4864: case 0b01110101: 4865: case 0b01110111: 4866: case 0b01111001: 4867: case 0b01111011: 4868: case 0b01111101: 4869: case 0b01111111: 4870: case 0b10000001: 4871: case 0b10000011: 4872: case 0b10000101: 4873: case 0b10000111: 4874: case 0b10001001: 4875: case 0b10001011: 4876: case 0b10001101: 4877: case 0b10001111: 4878: case 0b10010001: 4879: case 0b10010011: 4880: case 0b10010101: 4881: case 0b10010111: 4882: case 0b10011001: 4883: case 0b10011011: 4884: case 0b10011101: 4885: case 0b10011111: 4886: case 0b10100001: 4887: case 0b10100011: 4888: case 0b10100101: 4889: case 0b10100111: 4890: case 0b10101001: 4891: case 0b10101011: 4892: case 0b10101101: 4893: case 0b10101111: 4894: case 0b10110001: 4895: case 0b10110011: 4896: case 0b10110101: 4897: case 0b10110111: 4898: case 0b10111001: 4899: case 0b10111011: 4900: case 0b10111101: 4901: case 0b10111111: 4902: case 0b11000001: 4903: case 0b11000011: 4904: case 0b11000101: 4905: case 0b11000111: 4906: case 0b11001001: 4907: case 0b11001011: 4908: case 0b11001101: 4909: case 0b11001111: 4910: case 0b11010001: 4911: case 0b11010011: 4912: case 0b11010101: 4913: case 0b11010111: 4914: case 0b11011001: 4915: case 0b11011011: 4916: case 0b11011101: 4917: case 0b11011111: 4918: case 0b11100001: 4919: case 0b11100011: 4920: case 0b11100101: 4921: case 0b11100111: 4922: case 0b11101001: 4923: case 0b11101011: 4924: case 0b11101101: 4925: case 0b11101111: 4926: case 0b11110001: 4927: case 0b11110011: 4928: case 0b11110101: 4929: case 0b11110111: 4930: case 0b11111001: 4931: case 0b11111011: 4932: case 0b11111101: 4933: case 0b11111111: 4934: //レベル7 4935: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 4936: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 4937: irpInterrupt (t, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 4938: } 4939: break; 4940: case 0b00000010: 4941: case 0b00000110: 4942: case 0b00001010: 4943: case 0b00001110: 4944: case 0b00010010: 4945: case 0b00010110: 4946: case 0b00011010: 4947: case 0b00011110: 4948: case 0b00100010: 4949: case 0b00100110: 4950: case 0b00101010: 4951: case 0b00101110: 4952: case 0b00110010: 4953: case 0b00110110: 4954: case 0b00111010: 4955: case 0b00111110: 4956: case 0b01000010: 4957: case 0b01000110: 4958: case 0b01001010: 4959: case 0b01001110: 4960: case 0b01010010: 4961: case 0b01010110: 4962: case 0b01011010: 4963: case 0b01011110: 4964: case 0b01100010: 4965: case 0b01100110: 4966: case 0b01101010: 4967: case 0b01101110: 4968: case 0b01110010: 4969: case 0b01110110: 4970: case 0b01111010: 4971: case 0b01111110: 4972: case 0b10000010: 4973: case 0b10000110: 4974: case 0b10001010: 4975: case 0b10001110: 4976: case 0b10010010: 4977: case 0b10010110: 4978: case 0b10011010: 4979: case 0b10011110: 4980: case 0b10100010: 4981: case 0b10100110: 4982: case 0b10101010: 4983: case 0b10101110: 4984: case 0b10110010: 4985: case 0b10110110: 4986: case 0b10111010: 4987: case 0b10111110: 4988: case 0b11000010: 4989: case 0b11000110: 4990: case 0b11001010: 4991: case 0b11001110: 4992: case 0b11010010: 4993: case 0b11010110: 4994: case 0b11011010: 4995: case 0b11011110: 4996: case 0b11100010: 4997: case 0b11100110: 4998: case 0b11101010: 4999: case 0b11101110: 5000: case 0b11110010: 5001: case 0b11110110: 5002: case 0b11111010: 5003: case 0b11111110: 5004: //レベル6 5005: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5006: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5007: irpInterrupt (t, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5008: } 5009: break; 5010: case 0b00000100: 5011: case 0b00001100: 5012: case 0b00010100: 5013: case 0b00011100: 5014: case 0b00100100: 5015: case 0b00101100: 5016: case 0b00110100: 5017: case 0b00111100: 5018: case 0b01000100: 5019: case 0b01001100: 5020: case 0b01010100: 5021: case 0b01011100: 5022: case 0b01100100: 5023: case 0b01101100: 5024: case 0b01110100: 5025: case 0b01111100: 5026: case 0b10000100: 5027: case 0b10001100: 5028: case 0b10010100: 5029: case 0b10011100: 5030: case 0b10100100: 5031: case 0b10101100: 5032: case 0b10110100: 5033: case 0b10111100: 5034: case 0b11000100: 5035: case 0b11001100: 5036: case 0b11010100: 5037: case 0b11011100: 5038: case 0b11100100: 5039: case 0b11101100: 5040: case 0b11110100: 5041: case 0b11111100: 5042: //レベル5 5043: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5044: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5045: irpInterrupt (t, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5046: } 5047: break; 5048: case 0b00010000: 5049: case 0b00110000: 5050: case 0b01010000: 5051: case 0b01110000: 5052: case 0b10010000: 5053: case 0b10110000: 5054: case 0b11010000: 5055: case 0b11110000: 5056: //レベル3 5057: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5058: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5059: irpInterrupt (t, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5060: } 5061: break; 5062: case 0b00100000: 5063: case 0b01100000: 5064: case 0b10100000: 5065: case 0b11100000: 5066: //レベル2 5067: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5068: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5069: irpInterrupt (t, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5070: } 5071: break; 5072: case 0b01000000: 5073: case 0b11000000: 5074: //レベル1 5075: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5076: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5077: irpInterrupt (t, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5078: } 5079: break; 5080: } 5081: } else { 5082: t &= -t; 5083: // x&=-xはxの最下位の1のビットだけを残す演算 5084: // すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る 5085: // 最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる 5086: // MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない 5087: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { 5088: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5089: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5090: irpInterrupt (t, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5091: } 5092: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { 5093: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5094: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5095: irpInterrupt (t, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5096: } 5097: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { 5098: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5099: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5100: irpInterrupt (t, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5101: } 5102: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { 5103: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5104: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5105: irpInterrupt (t, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5106: } 5107: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { 5108: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5109: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5110: irpInterrupt (t, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5111: } 5112: } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) { 5113: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5114: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5115: irpInterrupt (t, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5116: } 5117: } 5118: } 5119: } //if t!=0 5120: if (MC68901.MFP_DELAYED_INTERRUPT) { 5121: XEiJ.mpuIRR |= XEiJ.mpuDIRR; //遅延割り込み要求 5122: XEiJ.mpuDIRR = 0; 5123: } 5124: } //命令ループ 5125: } catch (M68kException e) { 5126: if (M68kException.m6eNumber == M68kException.M6E_WAIT_EXCEPTION) { //待機例外 5127: if (irpWaitException ()) { 5128: continue; 5129: } else { 5130: break errorLoop; 5131: } 5132: } 5133: if (M68kException.m6eNumber == M68kException.M6E_INSTRUCTION_BREAK_POINT) { //命令ブレークポイントによる停止 5134: XEiJ.regPC = XEiJ.regPC0; 5135: XEiJ.mpuStop1 (null); //"Instruction Break Point" 5136: break errorLoop; 5137: } 5138: //例外処理 5139: // ここで処理するのはベクタ番号が2～31の例外に限る。TRAP #n命令はインライン展開する 5140: // 例外処理のサイクル数はBUS_ERRORとADDRESS_ERROR以外は34になっているので必要ならば補正してからthrowする 5141: // 使用頻度が高いと思われる例外はインライン展開するのでここには来ない 5142: // 例外処理をインライン展開する場合はMC68000とMC68030のコードを分けなければならずコードが冗長になる 5143: // 使用頻度が低いと思われる例外はインライン展開しない 5144: // セーブされるpcは以下の例外は命令の先頭、これ以外は次の命令 5145: // 2 BUS_ERROR 5146: // 3 ADDRESS_ERROR 5147: // 4 ILLEGAL_INSTRUCTION 5148: // 8 PRIVILEGE_VIOLATION 5149: // 10 LINE_1010_EMULATOR 5150: // 11 LINE_1111_EMULATOR 5151: // fedcba9876543210fedcba9876543210 5152: //if ((1 << M68kException.m6eNumber & 0b00000000000000000000110100011100) != 0) { 5153: // 0123456789abcdef0123456789abcdef 5154: if (0b00111000101100000000000000000000 << M68kException.m6eNumber < 0) { 5155: XEiJ.regPC = XEiJ.regPC0; //セーブされるpcは命令の先頭 5156: } 5157: try { 5158: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 5159: int sp = XEiJ.regRn[15]; 5160: XEiJ.regSRT1 = XEiJ.regSRT0 = 0; //srのTビットを消す 5161: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5162: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 5163: XEiJ.mpuUSP = sp; //USPを保存 5164: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 5165: if (DataBreakPoint.DBP_ON) { 5166: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 5167: } else { 5168: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 5169: } 5170: if (InstructionBreakPoint.IBP_ON) { 5171: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 5172: } 5173: } 5174: if (M68kException.m6eNumber <= M68kException.M6E_ADDRESS_ERROR) { 5175: //ホストファイルシステムのデバイスコマンドを強制終了させる 5176: HFS.hfsState = HFS.HFS_STATE_IDLE; 5177: XEiJ.mpuClockTime += 50 * XEiJ.mpuModifiedUnit; 5178: if (false) { 5179: //FORMAT $Aの例外スタックフレームを作る 5180: // 命令境界のバスエラーまたはアドレスエラー 5181: XEiJ.regRn[15] = sp -= 32; 5182: XEiJ.busWl (sp + 28, 0); //31-30:内部レジスタ,29-28:内部レジスタ 5183: XEiJ.busWl (sp + 24, 0); //27-24:データ出力バッファ 5184: XEiJ.busWl (sp + 20, 0); //23-22:内部レジスタ,21-20:内部レジスタ 5185: XEiJ.busWl (sp + 16, M68kException.m6eAddress); //19-16:データサイクルフォルトアドレス 5186: XEiJ.busWl (sp + 12, 0); //15-14:命令パイプステージB,13-12:命令パイプステージC 5187: XEiJ.busWw (sp + 10, 5188: M68kException.m6eDirection << 6 | 5189: (M68kException.m6eSize == XEiJ.MPU_SS_BYTE ? 1 << 4 : 5190: M68kException.m6eSize == XEiJ.MPU_SS_WORD ? 2 << 4 : 0)); //11-10:特殊ステータスワード 5191: XEiJ.busWw (sp + 8, 0); //9-8:内部レジスタ 5192: XEiJ.busWw (sp + 6, 0xa000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5193: } else { 5194: //FORMAT $Bの例外スタックフレームを作る 5195: // 命令途中のバスエラーまたはアドレスエラー 5196: XEiJ.regRn[15] = sp -= 92; 5197: XEiJ.busWl (sp + 88, 0); //91-58:内部レジスタ 5198: XEiJ.busWl (sp + 84, 0); 5199: XEiJ.busWl (sp + 80, 0); 5200: XEiJ.busWl (sp + 76, 0); 5201: XEiJ.busWl (sp + 72, 0); 5202: XEiJ.busWl (sp + 68, 0); 5203: XEiJ.busWl (sp + 64, 0); 5204: XEiJ.busWl (sp + 60, 0); 5205: XEiJ.busWl (sp + 56, 0); //57-56:バージョンナンバーと内部情報 5206: XEiJ.busWl (sp + 52, 0); 5207: XEiJ.busWl (sp + 48, 0); //53-48:内部レジスタ 5208: XEiJ.busWl (sp + 44, 0); //47-44:データ入力バッファ 5209: XEiJ.busWl (sp + 40, 0); //43-40:内部レジスタ 5210: XEiJ.busWl (sp + 36, 0); //39-36:ステージBアドレス 5211: XEiJ.busWl (sp + 32, 0); //35-28:内部レジスタ 5212: XEiJ.busWl (sp + 28, 0); 5213: XEiJ.busWl (sp + 24, 0); //27-24:データ出力バッファ 5214: XEiJ.busWl (sp + 20, 0); //23-22:内部レジスタ,21-20:内部レジスタ 5215: XEiJ.busWl (sp + 16, M68kException.m6eAddress); //19-16:データサイクルフォルトアドレス 5216: XEiJ.busWl (sp + 12, 0); //15-14:命令パイプステージB,13-12:命令パイプステージC 5217: XEiJ.busWw (sp + 10, 5218: M68kException.m6eDirection << 6 | 5219: (M68kException.m6eSize == XEiJ.MPU_SS_BYTE ? 1 << 4 : 5220: M68kException.m6eSize == XEiJ.MPU_SS_WORD ? 2 << 4 : 0)); //11-10:特殊ステータスワード 5221: XEiJ.busWw (sp + 8, 0); //9-8:内部レジスタ 5222: XEiJ.busWw (sp + 6, 0xb000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5223: } 5224: // 111111111122222222223333333333444444444455555555556666 5225: // 0123456789012345678901234567890123456789012345678901234567890123 5226: } else if (0b0001011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) { 5227: //FORMAT $2の例外スタックフレームを作る 5228: XEiJ.mpuClockTime += 34 * XEiJ.mpuModifiedUnit; 5229: XEiJ.regRn[15] = sp -= 12; 5230: XEiJ.busWl (sp + 8, M68kException.m6eAddress); //11-8:命令アドレス 5231: XEiJ.busWw (sp + 6, 0x2000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5232: } else { 5233: //FORMAT $0の例外スタックフレームを作る 5234: XEiJ.mpuClockTime += 34 * XEiJ.mpuModifiedUnit; 5235: XEiJ.regRn[15] = sp -= 8; 5236: XEiJ.busWw (sp + 6, 0x0000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5237: } 5238: XEiJ.busWl (sp + 2, XEiJ.regPC); //5-2:プログラムカウンタ 5239: XEiJ.busWw (sp, save_sr); //1-0:ステータスレジスタ 5240: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.m6eNumber << 2))); //例外ベクタを取り出してジャンプする 5241: if (XEiJ.dbgStopOnError) { //エラーで停止する場合 5242: if (XEiJ.dbgDoStopOnError ()) { 5243: break errorLoop; 5244: } 5245: } 5246: } catch (M68kException ee) { //ダブルバスフォルト 5247: XEiJ.dbgDoubleBusFault (); 5248: break errorLoop; 5249: } 5250: } //catch M68kException 5251: } //例外ループ 5252: 5253: // 通常 5254: // pc0 最後に実行した命令 5255: // pc 次に実行する命令 5256: // バスエラー、アドレスエラー、不当命令、特権違反で停止したとき 5257: // pc0 エラーを発生させた命令 5258: // pc 例外処理ルーチンの先頭 5259: // ダブルバスフォルトで停止したとき 5260: // pc0 エラーを発生させた命令 5261: // pc エラーを発生させた命令 5262: // 命令ブレークポイントで停止したとき 5263: // pc0 命令ブレークポイントが設定された、次に実行する命令 5264: // pc 命令ブレークポイントが設定された、次に実行する命令 5265: // データブレークポイントで停止したとき 5266: // pc0 データを書き換えた、最後に実行した命令 5267: // pc 次に実行する命令 5268: 5269: //分岐ログに停止レコードを記録する 5270: if (BranchLog.BLG_ON) { 5271: BranchLog.blgStop (); 5272: } 5273: 5274: } //mpuCore() 5275: 5276: 5277: 5278: //cont = irpWaitException () 5279: // 待機例外をキャッチしたとき 5280: public static boolean irpWaitException () { 5281: XEiJ.regPC = XEiJ.regPC0; //PCを巻き戻す 5282: XEiJ.regRn[8 + (XEiJ.regOC & 7)] += WaitInstruction.REWIND_AR[XEiJ.regOC >> 3]; //(Ar)+|-(Ar)で変化したArを巻き戻す 5283: try { 5284: //トレース例外を処理する 5285: if (XEiJ.mpuTraceFlag != 0) { //命令実行前にsrのTビットがセットされていた 5286: XEiJ.mpuCycleCount += 34; 5287: irpException (M68kException.M6E_TRACE, XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x2000, XEiJ.regPC0); //pcは次の命令 5288: } 5289: //デバイスを呼び出す 5290: TickerQueue.tkqRun (XEiJ.mpuClockTime); 5291: //割り込みを受け付ける 5292: int t; 5293: if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) { //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき 5294: t &= -t; 5295: // x&=-xはxの最下位の1のビットだけを残す演算 5296: // すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る 5297: // 最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる 5298: // MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない 5299: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { 5300: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5301: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5302: irpInterrupt (t, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5303: } 5304: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { 5305: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5306: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5307: irpInterrupt (t, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5308: } 5309: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { 5310: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5311: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5312: irpInterrupt (t, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5313: } 5314: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { 5315: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5316: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5317: irpInterrupt (t, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5318: } 5319: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { 5320: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5321: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5322: irpInterrupt (t, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5323: } 5324: } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) { 5325: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5326: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5327: irpInterrupt (t, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5328: } 5329: } 5330: } //if t!=0 5331: if (MC68901.MFP_DELAYED_INTERRUPT) { 5332: XEiJ.mpuIRR |= XEiJ.mpuDIRR; //遅延割り込み要求 5333: XEiJ.mpuDIRR = 0; 5334: } 5335: } catch (M68kException e) { 5336: //!!! 待機例外処理中のバスエラーの処理は省略 5337: XEiJ.dbgDoubleBusFault (); 5338: return false; 5339: } //catch M68kException 5340: return true; 5341: } //irpWaitException 5342: 5343: 5344: 5345: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5346: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5347: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5348: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5349: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 5350: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 5351: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 5352: public static void irpOriByte () throws M68kException { 5353: int ea = XEiJ.regOC & 63; 5354: int z; 5355: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5356: z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 5357: } else { 5358: z = XEiJ.regPC; 5359: XEiJ.regPC = z + 2; 5360: z = XEiJ.busRbs (z + 1); //pcbs 5361: } 5362: if (ea < XEiJ.EA_AR) { //ORI.B #<data>,Dr 5363: if (XEiJ.DBG_ORI_BYTE_ZERO_D0) { 5364: if (z == 0 && ea == 0 && XEiJ.dbgOriByteZeroD0) { //ORI.B #$00,D0 5365: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 5366: throw M68kException.m6eSignal; 5367: } 5368: } 5369: XEiJ.mpuCycleCount += 8; 5370: z = XEiJ.regRn[ea] |= 255 & z; //0拡張してからOR 5371: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5372: } else if (ea == XEiJ.EA_IM) { //ORI.B #<data>,CCR 5373: XEiJ.mpuCycleCount += 20; 5374: XEiJ.regCCR |= XEiJ.REG_CCR_MASK & z; 5375: } else { //ORI.B #<data>,<mem> 5376: XEiJ.mpuCycleCount += 12; 5377: int a = efaMltByte (ea); 5378: XEiJ.busWb (a, z |= XEiJ.busRbs (a)); 5379: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5380: } 5381: } //irpOriByte 5382: 5383: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5384: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5385: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5386: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5387: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 5388: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 5389: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 5390: public static void irpOriWord () throws M68kException { 5391: int ea = XEiJ.regOC & 63; 5392: if (ea < XEiJ.EA_AR) { //ORI.W #<data>,Dr 5393: int z; 5394: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5395: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5396: } else { 5397: z = XEiJ.regPC; 5398: XEiJ.regPC = z + 2; 5399: z = XEiJ.busRwse (z); //pcws 5400: } 5401: XEiJ.mpuCycleCount += 8; 5402: z = XEiJ.regRn[ea] |= (char) z; //0拡張してからOR 5403: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5404: } else if (ea == XEiJ.EA_IM) { //ORI.W #<data>,SR 5405: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5406: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5407: throw M68kException.m6eSignal; 5408: } 5409: //以下はスーパーバイザモード 5410: XEiJ.mpuCycleCount += 20; 5411: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5412: irpSetSR (XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 5413: } else { 5414: int t = XEiJ.regPC; 5415: XEiJ.regPC = t + 2; 5416: irpSetSR (XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | XEiJ.busRwse (t)); //pcws。特権違反チェックが先 5417: } 5418: } else { //ORI.W #<data>,<mem> 5419: int z; 5420: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5421: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5422: } else { 5423: z = XEiJ.regPC; 5424: XEiJ.regPC = z + 2; 5425: z = XEiJ.busRwse (z); //pcws 5426: } 5427: XEiJ.mpuCycleCount += 12; 5428: int a = efaMltWord (ea); 5429: XEiJ.busWw (a, z |= XEiJ.busRws (a)); 5430: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5431: } 5432: } //irpOriWord 5433: 5434: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5435: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5436: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5438: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 5439: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 5440: public static void irpOriLong () throws M68kException { 5441: int ea = XEiJ.regOC & 63; 5442: int y; 5443: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5444: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 5445: } else { 5446: y = XEiJ.regPC; 5447: XEiJ.regPC = y + 4; 5448: y = XEiJ.busRlse (y); //pcls 5449: } 5450: int z; 5451: if (ea < XEiJ.EA_AR) { //ORI.L #<data>,Dr 5452: XEiJ.mpuCycleCount += 16; 5453: z = XEiJ.regRn[ea] |= y; 5454: } else { //ORI.L #<data>,<mem> 5455: XEiJ.mpuCycleCount += 20; 5456: int a = efaMltLong (ea); 5457: XEiJ.busWl (a, z = XEiJ.busRls (a) | y); 5458: } 5459: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5460: } //irpOriLong 5461: 5462: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5463: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5464: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5465: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5466: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 5467: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 5468: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 5469: // 5470: //BITREV.L Dr 5471: // Drのビットの並びを逆順にする。CCRは変化しない 5472: // 5473: //CHK2.B <ea>,Rn 5474: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5475: // CHK2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5476: // Rnが下限または上限と等しいときZをセットする 5477: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5478: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5479: // CCR 5480: // X 変化しない 5481: // N 変化しない(M68000PRMでは未定義) 5482: // Z Rn-LB==0||Rn-LB==UB-LB 5483: // V 変化しない(M68000PRMでは未定義) 5484: // C Rn-LB>UB-LB(符号なし比較) 5485: // 5486: //CMP2.B <ea>,Rn 5487: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5488: // CMP2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5489: // Rnが下限または上限と等しいときZをセットする 5490: // Rnが範囲外のときCをセットする 5491: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5492: // CCR 5493: // X 変化しない 5494: // N 変化しない(M68000PRMでは未定義) 5495: // Z Rn-LB==0||Rn-LB==UB-LB 5496: // V 変化しない(M68000PRMでは未定義) 5497: // C Rn-LB>UB-LB(符号なし比較) 5498: public static void irpCmp2Chk2Byte () throws M68kException { 5499: int ea = XEiJ.regOC & 63; 5500: if (ea < XEiJ.EA_AR) { //BITREV.L Dr 5501: XEiJ.mpuCycleCount += 4; 5502: if (XEiJ.IRP_BITREV_REVERSE) { //2.83ns 0x0f801f3c 5503: XEiJ.regRn[ea] = Integer.reverse (XEiJ.regRn[ea]); 5504: } else if (XEiJ.IRP_BITREV_SHIFT) { //2.57ns 0x0f801f3c 5505: int x = XEiJ.regRn[ea]; 5506: x = x << 16 | x >>> 16; 5507: x = x << 8 & 0xff00ff00 | x >>> 8 & 0x00ff00ff; 5508: x = x << 4 & 0xf0f0f0f0 | x >>> 4 & 0x0f0f0f0f; 5509: x = x << 2 & 0xcccccccc | x >>> 2 & 0x33333333; 5510: XEiJ.regRn[ea] = x << 1 & 0xaaaaaaaa | x >>> 1 & 0x55555555; 5511: } else if (XEiJ.IRP_BITREV_TABLE) { //1.57ns 0x0f801f3c 5512: int x = XEiJ.regRn[ea]; 5513: XEiJ.regRn[ea] = XEiJ.MPU_BITREV_TABLE_0[x & 2047] | XEiJ.MPU_BITREV_TABLE_1[x << 10 >>> 21] | XEiJ.MPU_BITREV_TABLE_2[x >>> 22]; 5514: } 5515: } else { //CMP2/CHK2.B <ea>,Rn 5516: XEiJ.mpuCycleCount += 8; 5517: int w; 5518: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5519: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 5520: } else { 5521: w = XEiJ.regPC; 5522: XEiJ.regPC = w + 2; 5523: w = XEiJ.busRwze (w); //pcwz 5524: } 5525: int d = XEiJ.regRn[w >> 12]; //Rn 5526: if (0 <= (short) w) { //Dnのとき 5527: d = (byte) d; //符号拡張する 5528: } 5529: int a = efaCntByte (ea); 5530: int l = XEiJ.busRbs (a); //LB 5531: int u = XEiJ.busRbs (a + 1); //UB 5532: //U-D,L-D,D-Lのいずれかに帰着させる 5533: // 参考 5534: // https://twitter.com/moveccr/status/814309539012976640 5535: // https://twitter.com/moveccr/status/814309679845109760 5536: // https://twitter.com/moveccr/status/814310106598871040 5537: int x, y; 5538: if (Integer.compareUnsigned (l, d) < 0 && Integer.compareUnsigned (l, u) <= 0 || d == u) { 5539: x = u; 5540: y = d; 5541: } else if (Integer.compareUnsigned (d, u) < 0 && Integer.compareUnsigned (u, l) < 0) { 5542: x = l; 5543: y = d; 5544: } else { 5545: x = d; 5546: y = l; 5547: } 5548: int z = x - y; 5549: int c = (x & (y ^ z) ^ (y | z)) >>> 31; 5550: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //X 5551: z >>> 28 & XEiJ.REG_CCR_N | //N 5552: (z == 0 ? XEiJ.REG_CCR_Z : 0) | //Z 5553: ((x ^ y) & (x ^ z)) >>> 31 << 1 | //V 5554: c); //C 5555: if ((w >> 11 & c) != 0) { //CHK2でCがセットされたとき 5556: XEiJ.mpuCycleCount += 40 - 8 - 34; 5557: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 5558: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 5559: throw M68kException.m6eSignal; 5560: } 5561: } 5562: } //irpCmp2Chk2Byte 5563: 5564: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5565: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5566: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5567: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5568: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 5569: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 5570: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 5571: public static void irpBtstReg () throws M68kException { 5572: int ea = XEiJ.regOC & 63; 5573: int qqq = XEiJ.regOC >> 9; //qqq 5574: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W (d16,Ar),Dq 5575: XEiJ.mpuCycleCount += 16; 5576: int a; 5577: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5578: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5579: } else { 5580: a = XEiJ.regPC; 5581: XEiJ.regPC = a + 2; 5582: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5583: } 5584: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | XEiJ.busRbz (a) << 8 | XEiJ.busRbz (a + 2); //Javaは評価順序が保証されている 5585: } else { //BTST.L Dq,Dr/<ea> 5586: int y = XEiJ.regRn[qqq]; 5587: if (ea < XEiJ.EA_AR) { //BTST.L Dq,Dr 5588: XEiJ.mpuCycleCount += 6; 5589: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 5590: } else { //BTST.B Dq,<ea> 5591: XEiJ.mpuCycleCount += 4; 5592: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.busRbs (efaAnyByte (ea)) >>> (y & 7) & 1) << 2; //ccr_btst 5593: } 5594: } 5595: } //irpBtstReg 5596: 5597: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5598: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5599: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5600: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5601: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 5602: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 5603: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 5604: public static void irpBchgReg () throws M68kException { 5605: int ea = XEiJ.regOC & 63; 5606: int qqq = XEiJ.regOC >> 9; //qqq 5607: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L (d16,Ar),Dq 5608: XEiJ.mpuCycleCount += 24; 5609: int a; 5610: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5611: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5612: } else { 5613: a = XEiJ.regPC; 5614: XEiJ.regPC = a + 2; 5615: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5616: } 5617: XEiJ.regRn[qqq] = XEiJ.busRbs (a) << 24 | XEiJ.busRbz (a + 2) << 16 | XEiJ.busRbz (a + 4) << 8 | XEiJ.busRbz (a + 6); //Javaは評価順序が保証されている 5618: } else { //BCHG.L Dq,Dr/<ea> 5619: int x; 5620: int y = XEiJ.regRn[qqq]; 5621: if (ea < XEiJ.EA_AR) { //BCHG.L Dq,Dr 5622: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5623: XEiJ.mpuCycleCount += (char) y != 0 ? 6 : 8; //(0xffff&y)!=0 5624: } else { //BCHG.B Dq,<ea> 5625: XEiJ.mpuCycleCount += 8; 5626: int a = efaMltByte (ea); 5627: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) ^ (y = 1 << (y & 7))); 5628: } 5629: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5630: } 5631: } //irpBchgReg 5632: 5633: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5634: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5635: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5636: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5637: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 5638: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 5639: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 5640: public static void irpBclrReg () throws M68kException { 5641: int ea = XEiJ.regOC & 63; 5642: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5643: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W Dq,(d16,Ar) 5644: XEiJ.mpuCycleCount += 16; 5645: int a; 5646: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5647: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5648: } else { 5649: a = XEiJ.regPC; 5650: XEiJ.regPC = a + 2; 5651: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5652: } 5653: XEiJ.busWb (a, y >> 8); 5654: XEiJ.busWb (a + 2, y); 5655: } else { //BCLR.L Dq,Dr/<ea> 5656: int x; 5657: if (ea < XEiJ.EA_AR) { //BCLR.L Dq,Dr 5658: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5659: XEiJ.mpuCycleCount += (char) y != 0 ? 8 : 10; //(0xffff&y)!=0 5660: } else { //BCLR.B Dq,<ea> 5661: XEiJ.mpuCycleCount += 8; 5662: int a = efaMltByte (ea); 5663: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) & ~(y = 1 << (y & 7))); 5664: } 5665: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5666: } 5667: } //irpBclrReg 5668: 5669: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5670: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5671: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5672: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5673: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 5674: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 5675: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 5676: public static void irpBsetReg () throws M68kException { 5677: int ea = XEiJ.regOC & 63; 5678: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5679: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L Dq,(d16,Ar) 5680: XEiJ.mpuCycleCount += 24; 5681: int a; 5682: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5683: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5684: } else { 5685: a = XEiJ.regPC; 5686: XEiJ.regPC = a + 2; 5687: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5688: } 5689: XEiJ.busWb (a, y >> 24); 5690: XEiJ.busWb (a + 2, y >> 16); 5691: XEiJ.busWb (a + 4, y >> 8); 5692: XEiJ.busWb (a + 6, y); 5693: } else { //BSET.L Dq,Dr/<ea> 5694: int x; 5695: if (ea < XEiJ.EA_AR) { //BSET.L Dq,Dr 5696: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5697: XEiJ.mpuCycleCount += (char) y != 0 ? 6 : 8; //(0xffff&y)!=0 5698: } else { //BSET.B Dq,<ea> 5699: XEiJ.mpuCycleCount += 8; 5700: int a = efaMltByte (ea); 5701: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) | (y = 1 << (y & 7))); 5702: } 5703: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5704: } 5705: } //irpBsetReg 5706: 5707: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5708: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5709: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5710: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5711: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 5712: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 5713: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 5714: public static void irpAndiByte () throws M68kException { 5715: int ea = XEiJ.regOC & 63; 5716: int z; 5717: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5718: z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 5719: } else { 5720: z = XEiJ.regPC; 5721: XEiJ.regPC = z + 2; 5722: z = XEiJ.busRbs (z + 1); //pcbs 5723: } 5724: if (ea < XEiJ.EA_AR) { //ANDI.B #<data>,Dr 5725: XEiJ.mpuCycleCount += 8; 5726: z = XEiJ.regRn[ea] &= ~255 | z; //1拡張してからAND 5727: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5728: } else if (ea == XEiJ.EA_IM) { //ANDI.B #<data>,CCR 5729: XEiJ.mpuCycleCount += 20; 5730: XEiJ.regCCR &= z; 5731: } else { //ANDI.B #<data>,<mem> 5732: XEiJ.mpuCycleCount += 12; 5733: int a = efaMltByte (ea); 5734: XEiJ.busWb (a, z &= XEiJ.busRbs (a)); 5735: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5736: } 5737: } //irpAndiByte 5738: 5739: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5740: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5741: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5742: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5743: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 5744: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 5745: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 5746: public static void irpAndiWord () throws M68kException { 5747: int ea = XEiJ.regOC & 63; 5748: if (ea < XEiJ.EA_AR) { //ANDI.W #<data>,Dr 5749: int z; 5750: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5751: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5752: } else { 5753: z = XEiJ.regPC; 5754: XEiJ.regPC = z + 2; 5755: z = XEiJ.busRwse (z); //pcws 5756: } 5757: XEiJ.mpuCycleCount += 8; 5758: z = XEiJ.regRn[ea] &= ~65535 | z; //1拡張してからAND 5759: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5760: } else if (ea == XEiJ.EA_IM) { //ANDI.W #<data>,SR 5761: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5762: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5763: throw M68kException.m6eSignal; 5764: } 5765: //以下はスーパーバイザモード 5766: XEiJ.mpuCycleCount += 20; 5767: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5768: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 5769: } else { 5770: int t = XEiJ.regPC; 5771: XEiJ.regPC = t + 2; 5772: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & XEiJ.busRwse (t)); //pcws。特権違反チェックが先 5773: } 5774: } else { //ANDI.W #<data>,<mem> 5775: int z; 5776: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5777: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5778: } else { 5779: z = XEiJ.regPC; 5780: XEiJ.regPC = z + 2; 5781: z = XEiJ.busRwse (z); //pcws 5782: } 5783: XEiJ.mpuCycleCount += 12; 5784: int a = efaMltWord (ea); 5785: XEiJ.busWw (a, z &= XEiJ.busRws (a)); 5786: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5787: } 5788: } //irpAndiWord 5789: 5790: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5791: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5792: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5793: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5794: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 5795: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 5796: public static void irpAndiLong () throws M68kException { 5797: int ea = XEiJ.regOC & 63; 5798: int y; 5799: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5800: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 5801: } else { 5802: y = XEiJ.regPC; 5803: XEiJ.regPC = y + 4; 5804: y = XEiJ.busRlse (y); //pcls 5805: } 5806: int z; 5807: if (ea < XEiJ.EA_AR) { //ANDI.L #<data>,Dr 5808: XEiJ.mpuCycleCount += 16; 5809: z = XEiJ.regRn[ea] &= y; 5810: } else { //ANDI.L #<data>,<mem> 5811: XEiJ.mpuCycleCount += 20; 5812: int a = efaMltLong (ea); 5813: XEiJ.busWl (a, z = XEiJ.busRls (a) & y); 5814: } 5815: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5816: } //irpAndiLong 5817: 5818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5822: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 5823: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 5824: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 5825: // 5826: //BYTEREV.L Dr 5827: // Drのバイトの並びを逆順にする。CCRは変化しない 5828: // 5829: //CHK2.W <ea>,Rn 5830: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5831: // CHK2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5832: // Rnが下限または上限と等しいときZをセットする 5833: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5834: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5835: // CCR 5836: // X 変化しない 5837: // N 変化しない(M68000PRMでは未定義) 5838: // Z Rn-LB==0||Rn-LB==UB-LB 5839: // V 変化しない(M68000PRMでは未定義) 5840: // C Rn-LB>UB-LB(符号なし比較) 5841: // 5842: //CMP2.W <ea>,Rn 5843: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5844: // CMP2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5845: // Rnが下限または上限と等しいときZをセットする 5846: // Rnが範囲外のときCをセットする 5847: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5848: // CCR 5849: // X 変化しない 5850: // N 変化しない(M68000PRMでは未定義) 5851: // Z Rn-LB==0||Rn-LB==UB-LB 5852: // V 変化しない(M68000PRMでは未定義) 5853: // C Rn-LB>UB-LB(符号なし比較) 5854: public static void irpCmp2Chk2Word () throws M68kException { 5855: int ea = XEiJ.regOC & 63; 5856: if (ea < XEiJ.EA_AR) { //BYTEREV.L Dr 5857: XEiJ.mpuCycleCount += 4; 5858: if (true) { //0.10ns-0.18ns 0x782750ec 5859: XEiJ.regRn[ea] = Integer.reverseBytes (XEiJ.regRn[ea]); 5860: } else { //1.06ns 0x782750ec 5861: int x = XEiJ.regRn[ea]; 5862: XEiJ.regRn[ea] = x << 24 | x << 8 & 0x00ff0000 | x >>> 8 & 0x0000ff00 | x >>> 24; 5863: } 5864: } else { //CMP2/CHK2.W <ea>,Rn 5865: XEiJ.mpuCycleCount += 8; 5866: int w; 5867: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5868: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 5869: } else { 5870: w = XEiJ.regPC; 5871: XEiJ.regPC = w + 2; 5872: w = XEiJ.busRwze (w); //pcwz 5873: } 5874: int d = XEiJ.regRn[w >> 12]; //Rn 5875: if (0 <= (short) w) { //Dnのとき 5876: d = (short) d; //符号拡張する 5877: } 5878: int a = efaCntWord (ea); 5879: int l = XEiJ.busRws (a); //LB 5880: int u = XEiJ.busRws (a + 2); //UB 5881: //U-D,L-D,D-Lのいずれかに帰着させる 5882: // 参考 5883: // https://twitter.com/moveccr/status/814309539012976640 5884: // https://twitter.com/moveccr/status/814309679845109760 5885: // https://twitter.com/moveccr/status/814310106598871040 5886: int x, y; 5887: if (Integer.compareUnsigned (l, d) < 0 && Integer.compareUnsigned (l, u) <= 0 || d == u) { 5888: x = u; 5889: y = d; 5890: } else if (Integer.compareUnsigned (d, u) < 0 && Integer.compareUnsigned (u, l) < 0) { 5891: x = l; 5892: y = d; 5893: } else { 5894: x = d; 5895: y = l; 5896: } 5897: int z = x - y; 5898: int c = (x & (y ^ z) ^ (y | z)) >>> 31; 5899: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //X 5900: z >>> 28 & XEiJ.REG_CCR_N | //N 5901: (z == 0 ? XEiJ.REG_CCR_Z : 0) | //Z 5902: ((x ^ y) & (x ^ z)) >>> 31 << 1 | //V 5903: c); //C 5904: if ((w >> 11 & c) != 0) { //CHK2でCがセットされたとき 5905: XEiJ.mpuCycleCount += 40 - 8 - 34; 5906: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 5907: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 5908: throw M68kException.m6eSignal; 5909: } 5910: } 5911: } //irpCmp2Chk2Word 5912: 5913: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5914: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5915: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5916: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5917: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 5918: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 5919: public static void irpSubiByte () throws M68kException { 5920: int ea = XEiJ.regOC & 63; 5921: int x; 5922: int y; 5923: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5924: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 5925: } else { 5926: y = XEiJ.regPC; 5927: XEiJ.regPC = y + 2; 5928: y = XEiJ.busRbs (y + 1); //pcbs 5929: } 5930: int z; 5931: if (ea < XEiJ.EA_AR) { //SUBI.B #<data>,Dr 5932: XEiJ.mpuCycleCount += 8; 5933: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 5934: } else { //SUBI.B #<data>,<mem> 5935: XEiJ.mpuCycleCount += 12; 5936: int a = efaMltByte (ea); 5937: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) - y)); 5938: } 5939: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5940: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5941: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5942: } //irpSubiByte 5943: 5944: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5945: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5946: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5947: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5948: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 5949: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 5950: public static void irpSubiWord () throws M68kException { 5951: int ea = XEiJ.regOC & 63; 5952: int x; 5953: int y; 5954: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5955: y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5956: } else { 5957: y = XEiJ.regPC; 5958: XEiJ.regPC = y + 2; 5959: y = XEiJ.busRwse (y); //pcws 5960: } 5961: int z; 5962: if (ea < XEiJ.EA_AR) { //SUBI.W #<data>,Dr 5963: XEiJ.mpuCycleCount += 8; 5964: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 5965: } else { //SUBI.W #<data>,<mem> 5966: XEiJ.mpuCycleCount += 12; 5967: int a = efaMltWord (ea); 5968: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) - y)); 5969: } 5970: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5971: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5972: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5973: } //irpSubiWord 5974: 5975: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5976: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5977: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5978: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5979: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 5980: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 5981: public static void irpSubiLong () throws M68kException { 5982: int ea = XEiJ.regOC & 63; 5983: int x; 5984: int y; 5985: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5986: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 5987: } else { 5988: y = XEiJ.regPC; 5989: XEiJ.regPC = y + 4; 5990: y = XEiJ.busRlse (y); //pcls 5991: } 5992: int z; 5993: if (ea < XEiJ.EA_AR) { //SUBI.L #<data>,Dr 5994: XEiJ.mpuCycleCount += 16; 5995: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 5996: } else { //SUBI.L #<data>,<mem> 5997: XEiJ.mpuCycleCount += 20; 5998: int a = efaMltLong (ea); 5999: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y); 6000: } 6001: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6002: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6003: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 6004: } //irpSubiLong 6005: 6006: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6007: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6008: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6010: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 6011: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 6012: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 6013: // 6014: //CHK2.L <ea>,Rn 6015: // <ea>から下限と上限をリードしてRnが範囲内か調べる 6016: // Rnが下限または上限と等しいときZをセットする 6017: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 6018: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 6019: // CCR 6020: // X 変化しない 6021: // N 変化しない(M68000PRMでは未定義) 6022: // Z Rn-LB==0||Rn-LB==UB-LB 6023: // V 変化しない(M68000PRMでは未定義) 6024: // C Rn-LB>UB-LB(符号なし比較) 6025: // 6026: //CMP2.L <ea>,Rn 6027: // <ea>から下限と上限をリードしてRnが範囲内か調べる 6028: // Rnが下限または上限と等しいときZをセットする 6029: // Rnが範囲外のときCをセットする 6030: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 6031: // CCR 6032: // X 変化しない 6033: // N 変化しない(M68000PRMでは未定義) 6034: // Z Rn-LB==0||Rn-LB==UB-LB 6035: // V 変化しない(M68000PRMでは未定義) 6036: // C Rn-LB>UB-LB(符号なし比較) 6037: // 6038: //FF1.L Dr 6039: // Drの最上位の1のbit31からのオフセットをDrに格納する 6040: // Drが0のときは32になる 6041: public static void irpCmp2Chk2Long () throws M68kException { 6042: int ea = XEiJ.regOC & 63; 6043: if (ea < XEiJ.EA_AR) { //FF1.L Dr 6044: XEiJ.mpuCycleCount += 4; 6045: int z = XEiJ.regRn[ea]; 6046: if (true) { 6047: XEiJ.regRn[ea] = Integer.numberOfLeadingZeros (z); 6048: } else { 6049: if (z == 0) { 6050: XEiJ.regRn[ea] = 32; 6051: } else { 6052: int k = -(z >>> 16) >> 16 & 16; 6053: k += -(z >>> k + 8) >> 8 & 8; 6054: k += -(z >>> k + 4) >> 4 & 4; 6055: // bit3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 6056: // bit2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 6057: // bit1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 6058: // bit0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 6059: XEiJ.regRn[ea] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (z >>> k << 1)) & 3) + k; //intのシフトカウントは下位5bitだけが使用される 6060: } 6061: } 6062: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 6063: } else { //CMP2/CHK2.L <ea>,Rn 6064: XEiJ.mpuCycleCount += 8; 6065: int w; 6066: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6067: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6068: } else { 6069: w = XEiJ.regPC; 6070: XEiJ.regPC = w + 2; 6071: w = XEiJ.busRwze (w); //pcwz 6072: } 6073: int d = XEiJ.regRn[w >> 12]; //Rn 6074: int a = efaCntLong (ea); 6075: int l = XEiJ.busRls (a); //LB 6076: int u = XEiJ.busRls (a + 4); //UB 6077: //U-D,L-D,D-Lのいずれかに帰着させる 6078: // 参考 6079: // https://twitter.com/moveccr/status/814309539012976640 6080: // https://twitter.com/moveccr/status/814309679845109760 6081: // https://twitter.com/moveccr/status/814310106598871040 6082: int x, y; 6083: if (Integer.compareUnsigned (l, d) < 0 && Integer.compareUnsigned (l, u) <= 0 || d == u) { 6084: x = u; 6085: y = d; 6086: } else if (Integer.compareUnsigned (d, u) < 0 && Integer.compareUnsigned (u, l) < 0) { 6087: x = l; 6088: y = d; 6089: } else { 6090: x = d; 6091: y = l; 6092: } 6093: int z = x - y; 6094: int c = (x & (y ^ z) ^ (y | z)) >>> 31; 6095: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //X 6096: z >>> 28 & XEiJ.REG_CCR_N | //N 6097: (z == 0 ? XEiJ.REG_CCR_Z : 0) | //Z 6098: ((x ^ y) & (x ^ z)) >>> 31 << 1 | //V 6099: c); //C 6100: if ((w >> 11 & c) != 0) { //CHK2でCがセットされたとき 6101: XEiJ.mpuCycleCount += 40 - 8 - 34; 6102: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 6103: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 6104: throw M68kException.m6eSignal; 6105: } 6106: } 6107: } //irpCmp2Chk2Long 6108: 6109: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6110: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6111: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6112: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6113: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 6114: public static void irpAddiByte () throws M68kException { 6115: int ea = XEiJ.regOC & 63; 6116: int x; 6117: int y; 6118: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6119: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6120: } else { 6121: y = XEiJ.regPC; 6122: XEiJ.regPC = y + 2; 6123: y = XEiJ.busRbs (y + 1); //pcbs 6124: } 6125: int z; 6126: if (ea < XEiJ.EA_AR) { //ADDI.B #<data>,Dr 6127: XEiJ.mpuCycleCount += 8; 6128: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 6129: } else { //ADDI.B #<data>,<mem> 6130: XEiJ.mpuCycleCount += 12; 6131: int a = efaMltByte (ea); 6132: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) + y)); 6133: } 6134: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6135: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6136: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6137: } //irpAddiByte 6138: 6139: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6140: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6141: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6142: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6143: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 6144: public static void irpAddiWord () throws M68kException { 6145: int ea = XEiJ.regOC & 63; 6146: int x; 6147: int y; 6148: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6149: y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6150: } else { 6151: y = XEiJ.regPC; 6152: XEiJ.regPC = y + 2; 6153: y = XEiJ.busRwse (y); //pcws 6154: } 6155: int z; 6156: if (ea < XEiJ.EA_AR) { //ADDI.W #<data>,Dr 6157: XEiJ.mpuCycleCount += 8; 6158: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 6159: } else { //ADDI.W #<data>,<mem> 6160: XEiJ.mpuCycleCount += 12; 6161: int a = efaMltWord (ea); 6162: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) + y)); 6163: } 6164: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6165: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6166: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6167: } //irpAddiWord 6168: 6169: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6170: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6171: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6172: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6173: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 6174: public static void irpAddiLong () throws M68kException { 6175: int ea = XEiJ.regOC & 63; 6176: int x; 6177: int y; 6178: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6179: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6180: } else { 6181: y = XEiJ.regPC; 6182: XEiJ.regPC = y + 4; 6183: y = XEiJ.busRlse (y); //pcls 6184: } 6185: int z; 6186: if (ea < XEiJ.EA_AR) { //ADDI.L #<data>,Dr 6187: XEiJ.mpuCycleCount += 16; 6188: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 6189: } else { //ADDI.L #<data>,<mem> 6190: XEiJ.mpuCycleCount += 20; 6191: int a = efaMltLong (ea); 6192: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y); 6193: } 6194: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6195: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6196: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6197: } //irpAddiLong 6198: 6199: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6200: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6201: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6202: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6203: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 6204: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 6205: public static void irpBtstImm () throws M68kException { 6206: int ea = XEiJ.regOC & 63; 6207: int y; 6208: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6209: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6210: } else { 6211: y = XEiJ.regPC; 6212: XEiJ.regPC = y + 2; 6213: y = XEiJ.busRbs (y + 1); //pcbs 6214: } 6215: if (ea < XEiJ.EA_AR) { //BTST.L #<data>,Dr 6216: XEiJ.mpuCycleCount += 10; 6217: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 6218: } else { //BTST.B #<data>,<ea> 6219: XEiJ.mpuCycleCount += 8; 6220: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.busRbs (efaMemByte (ea)) >>> (y & 7) & 1) << 2; //ccr_btst 6221: } 6222: } //irpBtstImm 6223: 6224: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6225: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6226: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6227: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6228: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 6229: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 6230: public static void irpBchgImm () throws M68kException { 6231: int ea = XEiJ.regOC & 63; 6232: int x; 6233: int y; 6234: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6235: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6236: } else { 6237: y = XEiJ.regPC; 6238: XEiJ.regPC = y + 2; 6239: y = XEiJ.busRbs (y + 1); //pcbs 6240: } 6241: if (ea < XEiJ.EA_AR) { //BCHG.L #<data>,Dr 6242: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6243: XEiJ.mpuCycleCount += (char) y != 0 ? 10 : 12; //(0xffff&y)!=0 6244: } else { //BCHG.B #<data>,<ea> 6245: XEiJ.mpuCycleCount += 12; 6246: int a = efaMltByte (ea); 6247: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) ^ (y = 1 << (y & 7))); 6248: } 6249: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6250: } //irpBchgImm 6251: 6252: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6253: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6254: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6255: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6256: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 6257: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 6258: public static void irpBclrImm () throws M68kException { 6259: int ea = XEiJ.regOC & 63; 6260: int x; 6261: int y; 6262: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6263: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6264: } else { 6265: y = XEiJ.regPC; 6266: XEiJ.regPC = y + 2; 6267: y = XEiJ.busRbs (y + 1); //pcbs 6268: } 6269: if (ea < XEiJ.EA_AR) { //BCLR.L #<data>,Dr 6270: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6271: XEiJ.mpuCycleCount += (char) y != 0 ? 12 : 14; //(0xffff&y)!=0 6272: } else { //BCLR.B #<data>,<ea> 6273: XEiJ.mpuCycleCount += 12; 6274: int a = efaMltByte (ea); 6275: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) & ~(y = 1 << (y & 7))); 6276: } 6277: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6278: } //irpBclrImm 6279: 6280: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6281: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6282: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6283: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6284: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 6285: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 6286: public static void irpBsetImm () throws M68kException { 6287: int ea = XEiJ.regOC & 63; 6288: int x; 6289: int y; 6290: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6291: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6292: } else { 6293: y = XEiJ.regPC; 6294: XEiJ.regPC = y + 2; 6295: y = XEiJ.busRbs (y + 1); //pcbs 6296: } 6297: if (ea < XEiJ.EA_AR) { //BSET.L #<data>,Dr 6298: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6299: XEiJ.mpuCycleCount += (char) y != 0 ? 10 : 12; //(0xffff&y)!=0 6300: } else { //BSET.B #<data>,<ea> 6301: XEiJ.mpuCycleCount += 12; 6302: int a = efaMltByte (ea); 6303: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) | (y = 1 << (y & 7))); 6304: } 6305: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6306: } //irpBsetImm 6307: 6308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6309: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6310: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6311: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6312: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 6313: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 6314: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 6315: public static void irpEoriByte () throws M68kException { 6316: int ea = XEiJ.regOC & 63; 6317: int z; 6318: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6319: z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6320: } else { 6321: z = XEiJ.regPC; 6322: XEiJ.regPC = z + 2; 6323: z = XEiJ.busRbs (z + 1); //pcbs 6324: } 6325: if (ea < XEiJ.EA_AR) { //EORI.B #<data>,Dr 6326: XEiJ.mpuCycleCount += 8; 6327: z = XEiJ.regRn[ea] ^= 255 & z; //0拡張してからEOR 6328: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6329: } else if (ea == XEiJ.EA_IM) { //EORI.B #<data>,CCR 6330: XEiJ.mpuCycleCount += 20; 6331: XEiJ.regCCR ^= XEiJ.REG_CCR_MASK & z; 6332: } else { //EORI.B #<data>,<mem> 6333: XEiJ.mpuCycleCount += 12; 6334: int a = efaMltByte (ea); 6335: XEiJ.busWb (a, z ^= XEiJ.busRbs (a)); 6336: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6337: } 6338: } //irpEoriByte 6339: 6340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6341: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6342: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6344: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 6345: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 6346: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 6347: public static void irpEoriWord () throws M68kException { 6348: int ea = XEiJ.regOC & 63; 6349: if (ea < XEiJ.EA_AR) { //EORI.W #<data>,Dr 6350: int z; 6351: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6352: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6353: } else { 6354: z = XEiJ.regPC; 6355: XEiJ.regPC = z + 2; 6356: z = XEiJ.busRwse (z); //pcws 6357: } 6358: XEiJ.mpuCycleCount += 8; 6359: z = XEiJ.regRn[ea] ^= (char) z; //0拡張してからEOR 6360: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6361: } else if (ea == XEiJ.EA_IM) { //EORI.W #<data>,SR 6362: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6363: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6364: throw M68kException.m6eSignal; 6365: } 6366: //以下はスーパーバイザモード 6367: XEiJ.mpuCycleCount += 20; 6368: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6369: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 6370: } else { 6371: int t = XEiJ.regPC; 6372: XEiJ.regPC = t + 2; 6373: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ XEiJ.busRwse (t)); //pcws。特権違反チェックが先 6374: } 6375: } else { //EORI.W #<data>,<mem> 6376: int z; 6377: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6378: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6379: } else { 6380: z = XEiJ.regPC; 6381: XEiJ.regPC = z + 2; 6382: z = XEiJ.busRwse (z); //pcws 6383: } 6384: XEiJ.mpuCycleCount += 12; 6385: int a = efaMltWord (ea); 6386: XEiJ.busWw (a, z ^= XEiJ.busRws (a)); 6387: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6388: } 6389: } //irpEoriWord 6390: 6391: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6392: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6393: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6394: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6395: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 6396: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 6397: public static void irpEoriLong () throws M68kException { 6398: int ea = XEiJ.regOC & 63; 6399: int y; 6400: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6401: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6402: } else { 6403: y = XEiJ.regPC; 6404: XEiJ.regPC = y + 4; 6405: y = XEiJ.busRlse (y); //pcls 6406: } 6407: int z; 6408: if (ea < XEiJ.EA_AR) { //EORI.L #<data>,Dr 6409: XEiJ.mpuCycleCount += 16; 6410: z = XEiJ.regRn[ea] ^= y; 6411: } else { //EORI.L #<data>,<mem> 6412: XEiJ.mpuCycleCount += 20; 6413: int a = efaMltLong (ea); 6414: XEiJ.busWl (a, z = XEiJ.busRls (a) ^ y); 6415: } 6416: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 6417: } //irpEoriLong 6418: 6419: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6420: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6421: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6422: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6423: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 6424: public static void irpCasByte () throws M68kException { 6425: int w; 6426: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6427: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 6428: } else { 6429: w = XEiJ.regPC; 6430: XEiJ.regPC = w + 2; 6431: w = XEiJ.busRwze (w); //pcwz。拡張ワード 6432: } 6433: if ((w & ~0b0000_000_111_000_111) != 0) { 6434: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6435: throw M68kException.m6eSignal; 6436: } 6437: int c = w & 7; 6438: int y = (byte) XEiJ.regRn[c]; //y=Dc 6439: int a = efaMltByte (XEiJ.regOC & 63); 6440: int x = XEiJ.busRbs (a); //x=<ea> 6441: int z = (byte) (x - y); //z=<ea>-Dc 6442: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6443: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6444: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6445: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6446: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6447: if (z == 0) { //<ea>==Dc 6448: XEiJ.mpuCycleCount += 16; 6449: XEiJ.busWb (a, XEiJ.regRn[w >> 6]); //Du→<ea> 6450: } else { //<ea>!=Dc 6451: XEiJ.mpuCycleCount += 12; 6452: XEiJ.regRn[c] = ~0xff & XEiJ.regRn[c] | 0xff & x; //<ea>→Dc 6453: } 6454: } //irpCasByte 6455: 6456: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6457: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6458: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6459: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6460: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 6461: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 6462: public static void irpCmpiByte () throws M68kException { 6463: XEiJ.mpuCycleCount += 8; 6464: int ea = XEiJ.regOC & 63; 6465: int x; 6466: int y; 6467: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6468: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6469: } else { 6470: y = XEiJ.regPC; 6471: XEiJ.regPC = y + 2; 6472: y = XEiJ.busRbs (y + 1); //pcbs 6473: } 6474: int z = (byte) ((x = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaMemByte (ea))) - y); //アドレッシングモードに注意 6475: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6476: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6477: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6478: } //irpCmpiByte 6479: 6480: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6481: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6482: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6483: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6484: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 6485: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 6486: public static void irpCmpiWord () throws M68kException { 6487: XEiJ.mpuCycleCount += 8; 6488: int ea = XEiJ.regOC & 63; 6489: int x; 6490: int y; 6491: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6492: y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6493: } else { 6494: y = XEiJ.regPC; 6495: XEiJ.regPC = y + 2; 6496: y = XEiJ.busRwse (y); //pcws 6497: } 6498: int z = (short) ((x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaMemWord (ea))) - y); //アドレッシングモードに注意 6499: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6500: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6501: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6502: } //irpCmpiWord 6503: 6504: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6505: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6506: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6507: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6508: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 6509: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 6510: public static void irpCmpiLong () throws M68kException { 6511: int ea = XEiJ.regOC & 63; 6512: int x; 6513: int y; 6514: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6515: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6516: } else { 6517: y = XEiJ.regPC; 6518: XEiJ.regPC = y + 4; 6519: y = XEiJ.busRlse (y); //pcls 6520: } 6521: int z; 6522: if (ea < XEiJ.EA_AR) { //CMPI.L #<data>,Dr 6523: XEiJ.mpuCycleCount += 14; 6524: z = (x = XEiJ.regRn[ea]) - y; 6525: } else { //CMPI.L #<data>,<mem> 6526: XEiJ.mpuCycleCount += 12; 6527: z = (x = XEiJ.busRls (efaMemLong (ea))) - y; //アドレッシングモードに注意 6528: } 6529: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6530: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6531: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6532: } //irpCmpiLong 6533: 6534: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6535: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6536: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6537: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6538: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6539: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6540: public static void irpCasWord () throws M68kException { 6541: int ea = XEiJ.regOC & 63; 6542: if (ea == XEiJ.EA_IM) { //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6543: int w; 6544: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6545: w = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6546: } else { 6547: w = XEiJ.regPC; 6548: XEiJ.regPC = w + 4; 6549: w = XEiJ.busRlse (w); //pcls 6550: } 6551: if ((w & ~0b1111_000_111_000_111_1111_000_111_000_111) != 0) { 6552: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6553: throw M68kException.m6eSignal; 6554: } 6555: int c1 = w >>> 16 & 7; 6556: int c2 = w & 7; 6557: int a1 = XEiJ.regRn[w >>> 16 + 12 ]; //a1=Rn1 6558: int a2 = XEiJ.regRn[w >>> 12 & 15]; //a2=Rn2 6559: int x1 = XEiJ.busRws (a1); //x1=(Rn1) 6560: int x2 = XEiJ.busRws (a2); //x2=(Rn2) 6561: int y = (short) XEiJ.regRn[c1]; //y=Dc1 6562: int z = (short) (x1 - y); //z=(Rn1)-Dc1 6563: if (z == 0) { //(Rn1)==Dc1 6564: y = (short) XEiJ.regRn[c2]; //y=Dc2 6565: z = (short) (x2 - y); //z=(Rn2)-Dc2 6566: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6567: ((x2 ^ y) & (x2 ^ z)) >>> 31 << 1 | 6568: (x2 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6569: if (z == 0) { //(Rn1)==Dc1&&(Rn2)==Dc2 6570: XEiJ.mpuCycleCount += 28; 6571: XEiJ.busWw (a1, XEiJ.regRn[w >>> 16 + 6 & 7]); //Du1→(Rn1) 6572: XEiJ.busWw (a2, XEiJ.regRn[w >>> 6 & 7]); //Du2→(Rn2) 6573: } else { //(Rn1)==Dc1&&(Rn2)!=Dc2 6574: XEiJ.mpuCycleCount += 20; 6575: XEiJ.regRn[c1] = ~0xffff & XEiJ.regRn[c1] | (char) x1; //(Rn1)→Dc1 6576: XEiJ.regRn[c2] = ~0xffff & XEiJ.regRn[c2] | (char) x2; //(Rn2)→Dc2 6577: } 6578: } else { //(Rn1)!=Dc1 6579: XEiJ.mpuCycleCount += 20; 6580: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6581: ((x1 ^ y) & (x1 ^ z)) >>> 31 << 1 | 6582: (x1 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6583: XEiJ.regRn[c1] = ~0xffff & XEiJ.regRn[c1] | (char) x1; //(Rn1)→Dc1 6584: XEiJ.regRn[c2] = ~0xffff & XEiJ.regRn[c2] | (char) x2; //(Rn2)→Dc2 6585: } 6586: } else { //CAS.W Dc,Du,<ea> 6587: int w; 6588: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6589: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6590: } else { 6591: w = XEiJ.regPC; 6592: XEiJ.regPC = w + 2; 6593: w = XEiJ.busRwze (w); //pcwz 6594: } 6595: if ((w & ~0b0000_000_111_000_111) != 0) { 6596: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6597: throw M68kException.m6eSignal; 6598: } 6599: int c = w & 7; 6600: int y = (short) XEiJ.regRn[c]; //y=Dc 6601: int a = efaMltWord (ea); //a=ea 6602: int x = XEiJ.busRws (a); //x=<ea> 6603: int z = (short) (x - y); //z=<ea>-Dc 6604: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6605: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6606: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6607: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6608: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6609: if (z == 0) { //<ea>==Dc 6610: XEiJ.mpuCycleCount += 16; 6611: XEiJ.busWw (a, XEiJ.regRn[w >> 6]); //Du→<ea> 6612: } else { //<ea>!=Dc 6613: XEiJ.mpuCycleCount += 12; 6614: XEiJ.regRn[c] = ~0xffff & XEiJ.regRn[c] | (char) x; //<ea>→Dc 6615: } 6616: } 6617: } //irpCasWord 6618: 6619: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6620: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6621: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6622: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6623: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 6624: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 6625: // 6626: //MOVES.B <ea>,Rn 6627: // MOVES.B <ea>,DnはDnの最下位バイトだけ更新する 6628: // MOVES.B <ea>,Anはバイトデータをロングに符号拡張してAnの全体を更新する 6629: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6630: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6631: // 6632: //MOVES.B Rn,<ea> 6633: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6634: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6635: public static void irpMovesByte () throws M68kException { 6636: int w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6637: if (w << -11 != 0) { 6638: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6639: throw M68kException.m6eSignal; 6640: } 6641: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6642: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6643: throw M68kException.m6eSignal; 6644: } 6645: //以下はスーパーバイザモード 6646: XEiJ.mpuCycleCount += 4; 6647: int a = efaMltByte (XEiJ.regOC & 63); 6648: int n = w >>> 12; //n 6649: if (w << 31 - 11 >= 0) { //MOVES.B <ea>,Rn。リード 6650: MemoryMappedDevice[] mm; 6651: if (XEiJ.mpuSFC == 1 || XEiJ.mpuSFC == 2) { //ユーザモード 6652: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6653: } else if (XEiJ.mpuSFC == 5 || XEiJ.mpuSFC == 6) { //スーパーバイザモード 6654: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6655: } else { //CPU空間などは不可 6656: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6657: M68kException.m6eAddress = a; 6658: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6659: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6660: throw M68kException.m6eSignal; 6661: } 6662: if (n < 8) { //MOVES.B <ea>,Dn 6663: XEiJ.regRn[n] = XEiJ.regRn[n] & ~255 | mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6664: } else { //MOVES.B <ea>,An 6665: XEiJ.regRn[n] = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a); 6666: } 6667: } else { //MOVES.B Rn,<ea>。ライト 6668: MemoryMappedDevice[] mm; 6669: if (XEiJ.mpuDFC == 1 || XEiJ.mpuDFC == 2) { //ユーザモード 6670: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6671: } else if (XEiJ.mpuDFC == 5 || XEiJ.mpuDFC == 6) { //スーパーバイザモード 6672: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6673: } else { //CPU空間などは不可 6674: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6675: M68kException.m6eAddress = a; 6676: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6677: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6678: throw M68kException.m6eSignal; 6679: } 6680: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, XEiJ.regRn[n]); 6681: } 6682: } //irpMovesByte 6683: 6684: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6685: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6686: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6687: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6688: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 6689: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 6690: // 6691: //MOVES.W <ea>,Rn 6692: // MOVES.W <ea>,DnはDnの下位ワードだけ更新する 6693: // MOVES.W <ea>,Anはワードデータをロングに符号拡張してAnの全体を更新する 6694: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6695: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6696: // 6697: //MOVES.W Rn,<ea> 6698: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6699: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6700: public static void irpMovesWord () throws M68kException { 6701: int w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6702: if (w << -11 != 0) { 6703: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6704: throw M68kException.m6eSignal; 6705: } 6706: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6707: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6708: throw M68kException.m6eSignal; 6709: } 6710: //以下はスーパーバイザモード 6711: XEiJ.mpuCycleCount += 4; 6712: int a = efaMltWord (XEiJ.regOC & 63); 6713: int n = w >>> 12; //n 6714: if (w << 31 - 11 >= 0) { //MOVES.W <ea>,Rn。リード 6715: MemoryMappedDevice[] mm; 6716: if (XEiJ.mpuSFC == 1 || XEiJ.mpuSFC == 2) { //ユーザモード 6717: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6718: } else if (XEiJ.mpuSFC == 5 || XEiJ.mpuSFC == 6) { //スーパーバイザモード 6719: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6720: } else { //CPU空間などは不可 6721: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6722: M68kException.m6eAddress = a; 6723: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6724: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6725: throw M68kException.m6eSignal; 6726: } 6727: int z; 6728: if ((a & 1) == 0) { //偶数 6729: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6730: } else { //奇数 6731: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a) << 8; 6732: a++; 6733: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6734: } 6735: if (n < 8) { //MOVES.W <ea>,Dn 6736: XEiJ.regRn[n] = XEiJ.regRn[n] & ~65535 | z; 6737: } else { //MOVES.W <ea>,An 6738: XEiJ.regRn[n] = (short) z; 6739: } 6740: } else { //MOVES.W Rn,<ea>。ライト 6741: MemoryMappedDevice[] mm; 6742: if (XEiJ.mpuDFC == 1 || XEiJ.mpuDFC == 2) { //ユーザモード 6743: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6744: } else if (XEiJ.mpuDFC == 5 || XEiJ.mpuDFC == 6) { //スーパーバイザモード 6745: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6746: } else { //CPU空間などは不可 6747: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6748: M68kException.m6eAddress = a; 6749: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6750: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6751: throw M68kException.m6eSignal; 6752: } 6753: int z = XEiJ.regRn[n]; 6754: if ((a & 1) == 0) { //偶数 6755: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6756: } else { //奇数 6757: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 8); 6758: a++; 6759: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6760: } 6761: } 6762: } //irpMovesWord 6763: 6764: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6765: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6766: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6767: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6768: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 6769: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 6770: // 6771: //MOVES.L <ea>,Rn 6772: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6773: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6774: // 6775: //MOVES.L Rn,<ea> 6776: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6777: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6778: public static void irpMovesLong () throws M68kException { 6779: int w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6780: if (w << -11 != 0) { 6781: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6782: throw M68kException.m6eSignal; 6783: } 6784: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6785: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6786: throw M68kException.m6eSignal; 6787: } 6788: //以下はスーパーバイザモード 6789: XEiJ.mpuCycleCount += 4; 6790: int a = efaMltLong (XEiJ.regOC & 63); 6791: int n = w >>> 12; //n 6792: if (w << 31 - 11 >= 0) { //MOVES.L <ea>,Rn。リード 6793: MemoryMappedDevice[] mm; 6794: if (XEiJ.mpuSFC == 1 || XEiJ.mpuSFC == 2) { //ユーザモード 6795: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6796: } else if (XEiJ.mpuSFC == 5 || XEiJ.mpuSFC == 6) { //スーパーバイザモード 6797: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6798: } else { //CPU空間などは不可 6799: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6800: M68kException.m6eAddress = a; 6801: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6802: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6803: throw M68kException.m6eSignal; 6804: } 6805: int z; 6806: if ((a & 3) == 0) { //4の倍数 6807: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 6808: } else if ((a & 1) == 0) { //4の倍数+2 6809: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a) << 16; 6810: a += 2; 6811: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6812: } else { //奇数 6813: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a) << 24; 6814: a++; 6815: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a) << 8; 6816: a += 2; 6817: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6818: } 6819: XEiJ.regRn[n] = z; 6820: } else { //MOVES.L Rn,<ea>。ライト 6821: MemoryMappedDevice[] mm; 6822: if (XEiJ.mpuDFC == 1 || XEiJ.mpuDFC == 2) { //ユーザモード 6823: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6824: } else if (XEiJ.mpuDFC == 5 || XEiJ.mpuDFC == 6) { //スーパーバイザモード 6825: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6826: } else { //CPU空間などは不可 6827: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6828: M68kException.m6eAddress = a; 6829: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6830: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6831: throw M68kException.m6eSignal; 6832: } 6833: int z = XEiJ.regRn[n]; 6834: if ((a & 3) == 0) { //4の倍数 6835: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, z); 6836: } else if ((a & 1) == 0) { //4の倍数+2 6837: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 16); 6838: a += 2; 6839: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6840: } else { //奇数 6841: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 24); 6842: a++; 6843: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 8); 6844: a += 2; 6845: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6846: } 6847: } 6848: } //irpMovesLong 6849: 6850: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6851: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6852: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6853: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6854: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6855: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6856: public static void irpCasLong () throws M68kException { 6857: int ea = XEiJ.regOC & 63; 6858: if (ea == XEiJ.EA_IM) { //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6859: int w; 6860: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6861: w = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6862: } else { 6863: w = XEiJ.regPC; 6864: XEiJ.regPC = w + 4; 6865: w = XEiJ.busRlse (w); //pcls 6866: } 6867: if ((w & ~0b1111_000_111_000_111_1111_000_111_000_111) != 0) { 6868: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6869: throw M68kException.m6eSignal; 6870: } 6871: int c1 = w >>> 16 & 7; 6872: int c2 = w & 7; 6873: int a1 = XEiJ.regRn[w >>> 16 + 12 ]; //a1=Rn1 6874: int a2 = XEiJ.regRn[w >>> 12 & 15]; //a2=Rn2 6875: int x1 = XEiJ.busRls (a1); //x1=(Rn1) 6876: int x2 = XEiJ.busRls (a2); //x2=(Rn2) 6877: int y = XEiJ.regRn[c1]; //y=Dc1 6878: int z = x1 - y; //z=(Rn1)-Dc1 6879: if (z == 0) { //(Rn1)==Dc1 6880: y = XEiJ.regRn[c2]; //y=Dc2 6881: z = x2 - y; //z=(Rn2)-Dc2 6882: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6883: ((x2 ^ y) & (x2 ^ z)) >>> 31 << 1 | 6884: (x2 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6885: if (z == 0) { //(Rn1)==Dc1&&(Rn2)==Dc2 6886: XEiJ.mpuCycleCount += 44; 6887: XEiJ.busWl (a1, XEiJ.regRn[w >>> 16 + 6 & 7]); //Du1→(Rn1) 6888: XEiJ.busWl (a2, XEiJ.regRn[w >>> 6 & 7]); //Du2→(Rn2) 6889: } else { //(Rn1)==Dc1&&(Rn2)!=Dc2 6890: XEiJ.mpuCycleCount += 28; 6891: XEiJ.regRn[c1] = x1; //(Rn1)→Dc1 6892: XEiJ.regRn[c2] = x2; //(Rn2)→Dc2 6893: } 6894: } else { //(Rn1)!=Dc1 6895: XEiJ.mpuCycleCount += 28; 6896: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6897: ((x1 ^ y) & (x1 ^ z)) >>> 31 << 1 | 6898: (x1 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6899: XEiJ.regRn[c1] = x1; //(Rn1)→Dc1 6900: XEiJ.regRn[c2] = x2; //(Rn2)→Dc2 6901: } 6902: } else { //CAS.L Dc,Du,<ea> 6903: int w; 6904: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6905: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6906: } else { 6907: w = XEiJ.regPC; 6908: XEiJ.regPC = w + 2; 6909: w = XEiJ.busRwze (w); //pcwz 6910: } 6911: if ((w & ~0b0000_000_111_000_111) != 0) { 6912: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6913: throw M68kException.m6eSignal; 6914: } 6915: int c = w & 7; 6916: int y = XEiJ.regRn[c]; //y=Dc 6917: int a = efaMltLong (ea); //a=ea 6918: int x = XEiJ.busRls (a); //x=<ea> 6919: int z = x - y; //z=<ea>-Dc 6920: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6921: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6922: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6923: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6924: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6925: if (z == 0) { //<ea>==Dc 6926: XEiJ.mpuCycleCount += 24; 6927: XEiJ.busWl (a, XEiJ.regRn[w >> 6]); //Du→<ea> 6928: } else { //<ea>!=Dc 6929: XEiJ.mpuCycleCount += 16; 6930: XEiJ.regRn[c] = x; //<ea>→Dc 6931: } 6932: } 6933: } //irpCasLong 6934: 6935: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6936: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6937: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6938: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6939: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 6940: public static void irpMoveToDRByte () throws M68kException { 6941: XEiJ.mpuCycleCount += 4; 6942: int ea = XEiJ.regOC & 63; 6943: int qqq = XEiJ.regOC >> 9 & 7; 6944: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 6945: XEiJ.regRn[qqq] = ~255 & XEiJ.regRn[qqq] | 255 & z; 6946: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6947: } //irpMoveToDRByte 6948: 6949: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6950: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6951: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6952: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6953: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 6954: public static void irpMoveToMMByte () throws M68kException { 6955: XEiJ.mpuCycleCount += 8; 6956: int ea = XEiJ.regOC & 63; 6957: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 6958: XEiJ.busWb (XEiJ.regRn[XEiJ.regOC >> 9], z); //1qqq=aqq 6959: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6960: } //irpMoveToMMByte 6961: 6962: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6963: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6964: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6965: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6966: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 6967: public static void irpMoveToMPByte () throws M68kException { 6968: XEiJ.mpuCycleCount += 8; 6969: int ea = XEiJ.regOC & 63; 6970: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 6971: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 6972: XEiJ.busWb (aqq < 15 ? XEiJ.regRn[aqq]++ : (XEiJ.regRn[15] += 2) - 2, z); 6973: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6974: } //irpMoveToMPByte 6975: 6976: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6977: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6978: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6979: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6980: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 6981: public static void irpMoveToMNByte () throws M68kException { 6982: XEiJ.mpuCycleCount += 8; 6983: int ea = XEiJ.regOC & 63; 6984: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 6985: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 6986: XEiJ.busWb (aqq < 15 ? --XEiJ.regRn[aqq] : (XEiJ.regRn[15] -= 2), z); 6987: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6988: } //irpMoveToMNByte 6989: 6990: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6991: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6992: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6993: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6994: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 6995: public static void irpMoveToMWByte () throws M68kException { 6996: XEiJ.mpuCycleCount += 12; 6997: int ea = XEiJ.regOC & 63; 6998: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 6999: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 7000: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7001: XEiJ.busWb (XEiJ.regRn[aqq] //ベースレジスタ 7002: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws。ワードディスプレースメント 7003: z); 7004: } else { 7005: int t = XEiJ.regPC; 7006: XEiJ.regPC = t + 2; 7007: XEiJ.busWb (XEiJ.regRn[aqq] //ベースレジスタ 7008: + XEiJ.busRwse (t), //pcws。ワードディスプレースメント 7009: z); 7010: } 7011: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7012: } //irpMoveToMWByte 7013: 7014: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7015: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7016: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7017: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7018: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 7019: public static void irpMoveToMXByte () throws M68kException { 7020: XEiJ.mpuCycleCount += 14; 7021: int ea = XEiJ.regOC & 63; 7022: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 7023: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 7024: int w; 7025: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7026: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 7027: } else { 7028: w = XEiJ.regPC; 7029: XEiJ.regPC = w + 2; 7030: w = XEiJ.busRwze (w); //pcwz。拡張ワード 7031: } 7032: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 7033: int t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 7034: XEiJ.regRn[aqq]) //ベースレジスタ 7035: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 7036: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 7037: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 7038: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 7039: int x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 7040: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7041: XEiJ.regRn[w >> 12]) //ロングインデックス 7042: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 7043: XEiJ.busWb ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 7044: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 7045: XEiJ.busRls (t) + x) //ポストインデックス 7046: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 7047: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 7048: XEiJ.busRlse ((XEiJ.regPC += 4) - 4)), //pcls。ロングアウタディスプレースメント 7049: z); 7050: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7051: } //irpMoveToMXByte 7052: 7053: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7054: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7055: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7056: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7057: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 7058: public static void irpMoveToZWByte () throws M68kException { 7059: XEiJ.mpuCycleCount += 12; 7060: int ea = XEiJ.regOC & 63; 7061: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 7062: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7063: XEiJ.busWb (XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws 7064: z); 7065: } else { 7066: int t = XEiJ.regPC; 7067: XEiJ.regPC = t + 2; 7068: XEiJ.busWb (XEiJ.busRwse (t), //pcws 7069: z); 7070: } 7071: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7072: } //irpMoveToZWByte 7073: 7074: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7075: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7076: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7078: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 7079: public static void irpMoveToZLByte () throws M68kException { 7080: XEiJ.mpuCycleCount += 16; 7081: int ea = XEiJ.regOC & 63; 7082: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 7083: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7084: XEiJ.busWb (XEiJ.busRlse ((XEiJ.regPC += 4) - 4), //pcls 7085: z); 7086: } else { 7087: int t = XEiJ.regPC; 7088: XEiJ.regPC = t + 4; 7089: XEiJ.busWb (XEiJ.busRlse (t), //pcls 7090: z); 7091: } 7092: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7093: } //irpMoveToZLByte 7094: 7095: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7096: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7097: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7098: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7099: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 7100: public static void irpMoveToDRLong () throws M68kException { 7101: XEiJ.mpuCycleCount += 4; 7102: int ea = XEiJ.regOC & 63; 7103: int z; 7104: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7105: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7106: } //irpMoveToDRLong 7107: 7108: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7109: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7110: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7111: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7112: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 7113: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 7114: public static void irpMoveaLong () throws M68kException { 7115: XEiJ.mpuCycleCount += 4; 7116: int ea = XEiJ.regOC & 63; 7117: XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7118: } //irpMoveaLong 7119: 7120: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7121: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7122: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7123: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7124: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 7125: public static void irpMoveToMMLong () throws M68kException { 7126: XEiJ.mpuCycleCount += 12; 7127: int ea = XEiJ.regOC & 63; 7128: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7129: XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)], z); 7130: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7131: } //irpMoveToMMLong 7132: 7133: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7134: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7135: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7136: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7137: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 7138: public static void irpMoveToMPLong () throws M68kException { 7139: XEiJ.mpuCycleCount += 12; 7140: int ea = XEiJ.regOC & 63; 7141: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7142: XEiJ.busWl ((XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] += 4) - 4, z); 7143: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7144: } //irpMoveToMPLong 7145: 7146: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7147: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7148: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7149: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7150: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 7151: public static void irpMoveToMNLong () throws M68kException { 7152: XEiJ.mpuCycleCount += 12; 7153: int ea = XEiJ.regOC & 63; 7154: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7155: XEiJ.busWl ((XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] -= 4), z); 7156: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7157: } //irpMoveToMNLong 7158: 7159: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7160: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7161: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7162: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7163: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 7164: public static void irpMoveToMWLong () throws M68kException { 7165: XEiJ.mpuCycleCount += 16; 7166: int ea = XEiJ.regOC & 63; 7167: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7168: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7169: XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] //ベースレジスタ 7170: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws。ワードディスプレースメント 7171: z); 7172: } else { 7173: int t = XEiJ.regPC; 7174: XEiJ.regPC = t + 2; 7175: XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] //ベースレジスタ 7176: + XEiJ.busRwse (t), //pcws。ワードディスプレースメント 7177: z); 7178: } 7179: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7180: } //irpMoveToMWLong 7181: 7182: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7183: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7184: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7185: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7186: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 7187: public static void irpMoveToMXLong () throws M68kException { 7188: XEiJ.mpuCycleCount += 18; 7189: int ea = XEiJ.regOC & 63; 7190: int aqq = (XEiJ.regOC >> 9) - (16 - 8); 7191: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7192: int w; 7193: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7194: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 7195: } else { 7196: w = XEiJ.regPC; 7197: XEiJ.regPC = w + 2; 7198: w = XEiJ.busRwze (w); //pcwz。拡張ワード 7199: } 7200: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 7201: int t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 7202: XEiJ.regRn[aqq]) //ベースレジスタ 7203: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 7204: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 7205: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 7206: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 7207: int x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 7208: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7209: XEiJ.regRn[w >> 12]) //ロングインデックス 7210: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 7211: XEiJ.busWl ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 7212: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 7213: XEiJ.busRls (t) + x) //ポストインデックス 7214: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 7215: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 7216: XEiJ.busRlse ((XEiJ.regPC += 4) - 4)), //pcls。ロングアウタディスプレースメント 7217: z); 7218: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7219: } //irpMoveToMXLong 7220: 7221: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7222: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7223: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7224: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7225: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 7226: public static void irpMoveToZWLong () throws M68kException { 7227: XEiJ.mpuCycleCount += 16; 7228: int ea = XEiJ.regOC & 63; 7229: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7230: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7231: XEiJ.busWl (XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws 7232: z); 7233: } else { 7234: int t = XEiJ.regPC; 7235: XEiJ.regPC = t + 2; 7236: XEiJ.busWl (XEiJ.busRwse (t), //pcws 7237: z); 7238: } 7239: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7240: } //irpMoveToZWLong 7241: 7242: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7243: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7244: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7245: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7246: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 7247: public static void irpMoveToZLLong () throws M68kException { 7248: XEiJ.mpuCycleCount += 20; 7249: int ea = XEiJ.regOC & 63; 7250: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7251: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7252: XEiJ.busWl (XEiJ.busRlse ((XEiJ.regPC += 4) - 4), //pcls 7253: z); 7254: } else { 7255: int t = XEiJ.regPC; 7256: XEiJ.regPC = t + 4; 7257: XEiJ.busWl (XEiJ.busRlse (t), //pcls 7258: z); 7259: } 7260: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7261: } //irpMoveToZLLong 7262: 7263: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7264: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7265: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7266: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7267: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 7268: public static void irpMoveToDRWord () throws M68kException { 7269: XEiJ.mpuCycleCount += 4; 7270: int ea = XEiJ.regOC & 63; 7271: int qqq = XEiJ.regOC >> 9 & 7; 7272: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7273: XEiJ.regRn[qqq] = ~65535 & XEiJ.regRn[qqq] | (char) z; 7274: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7275: } //irpMoveToDRWord 7276: 7277: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7278: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7279: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7280: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7281: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 7282: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 7283: // 7284: //MOVEA.W <ea>,Aq 7285: // ワードデータをロングに符号拡張してAqの全体を更新する 7286: public static void irpMoveaWord () throws M68kException { 7287: XEiJ.mpuCycleCount += 4; 7288: int ea = XEiJ.regOC & 63; 7289: XEiJ.regRn[XEiJ.regOC >> 9 & 15] = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //符号拡張して32bit全部書き換える。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7290: } //irpMoveaWord 7291: 7292: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7293: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7294: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7295: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7296: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 7297: public static void irpMoveToMMWord () throws M68kException { 7298: XEiJ.mpuCycleCount += 8; 7299: int ea = XEiJ.regOC & 63; 7300: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7301: XEiJ.busWw (XEiJ.regRn[XEiJ.regOC >> 9 & 15], z); 7302: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7303: } //irpMoveToMMWord 7304: 7305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7306: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7307: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7309: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 7310: public static void irpMoveToMPWord () throws M68kException { 7311: XEiJ.mpuCycleCount += 8; 7312: int ea = XEiJ.regOC & 63; 7313: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7314: XEiJ.busWw ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 2) - 2, z); 7315: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7316: } //irpMoveToMPWord 7317: 7318: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7319: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7320: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7322: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 7323: public static void irpMoveToMNWord () throws M68kException { 7324: XEiJ.mpuCycleCount += 8; 7325: int ea = XEiJ.regOC & 63; 7326: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7327: XEiJ.busWw ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2), z); 7328: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7329: } //irpMoveToMNWord 7330: 7331: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7332: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7333: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7334: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7335: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 7336: public static void irpMoveToMWWord () throws M68kException { 7337: XEiJ.mpuCycleCount += 12; 7338: int ea = XEiJ.regOC & 63; 7339: int aqq = XEiJ.regOC >> 9 & 15; 7340: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7341: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7342: XEiJ.busWw (XEiJ.regRn[aqq] //ベースレジスタ 7343: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws。ワードディスプレースメント 7344: z); 7345: } else { 7346: int t = XEiJ.regPC; 7347: XEiJ.regPC = t + 2; 7348: XEiJ.busWw (XEiJ.regRn[aqq] //ベースレジスタ 7349: + XEiJ.busRwse (t), //pcws。ワードディスプレースメント 7350: z); 7351: } 7352: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7353: } //irpMoveToMWWord 7354: 7355: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7356: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7357: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7359: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 7360: public static void irpMoveToMXWord () throws M68kException { 7361: XEiJ.mpuCycleCount += 14; 7362: int ea = XEiJ.regOC & 63; 7363: int aqq = XEiJ.regOC >> 9 & 15; 7364: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7365: int w; 7366: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7367: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 7368: } else { 7369: w = XEiJ.regPC; 7370: XEiJ.regPC = w + 2; 7371: w = XEiJ.busRwze (w); //pcwz。拡張ワード 7372: } 7373: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 7374: int t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 7375: XEiJ.regRn[aqq]) //ベースレジスタ 7376: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 7377: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 7378: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 7379: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 7380: int x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 7381: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7382: XEiJ.regRn[w >> 12]) //ロングインデックス 7383: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 7384: XEiJ.busWw ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 7385: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 7386: XEiJ.busRls (t) + x) //ポストインデックス 7387: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 7388: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 7389: XEiJ.busRlse ((XEiJ.regPC += 4) - 4)), //pcls。ロングアウタディスプレースメント 7390: z); 7391: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7392: } //irpMoveToMXWord 7393: 7394: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7395: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7396: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7398: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 7399: public static void irpMoveToZWWord () throws M68kException { 7400: XEiJ.mpuCycleCount += 12; 7401: int ea = XEiJ.regOC & 63; 7402: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7403: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7404: XEiJ.busWw (XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws 7405: z); 7406: } else { 7407: int t = XEiJ.regPC; 7408: XEiJ.regPC = t + 2; 7409: XEiJ.busWw (XEiJ.busRwse (t), //pcws 7410: z); 7411: } 7412: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7413: } //irpMoveToZWWord 7414: 7415: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7416: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7417: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7418: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7419: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 7420: public static void irpMoveToZLWord () throws M68kException { 7421: XEiJ.mpuCycleCount += 16; 7422: int ea = XEiJ.regOC & 63; 7423: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7424: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7425: XEiJ.busWw (XEiJ.busRlse ((XEiJ.regPC += 4) - 4), //pcls 7426: z); 7427: } else { 7428: int t = XEiJ.regPC; 7429: XEiJ.regPC = t + 4; 7430: XEiJ.busWw (XEiJ.busRlse (t), //pcls 7431: z); 7432: } 7433: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7434: } //irpMoveToZLWord 7435: 7436: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7437: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7438: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7440: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 7441: public static void irpNegxByte () throws M68kException { 7442: int ea = XEiJ.regOC & 63; 7443: int y; 7444: int z; 7445: if (ea < XEiJ.EA_AR) { //NEGX.B Dr 7446: XEiJ.mpuCycleCount += 4; 7447: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y) - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 7448: } else { //NEGX.B <mem> 7449: XEiJ.mpuCycleCount += 8; 7450: int a = efaMltByte (ea); 7451: XEiJ.busWb (a, z = (byte) (-(y = XEiJ.busRbs (a)) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7452: } 7453: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7454: (y & z) >>> 31 << 1 | 7455: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7456: } //irpNegxByte 7457: 7458: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7459: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7460: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7461: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7462: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 7463: public static void irpNegxWord () throws M68kException { 7464: int ea = XEiJ.regOC & 63; 7465: int y; 7466: int z; 7467: if (ea < XEiJ.EA_AR) { //NEGX.W Dr 7468: XEiJ.mpuCycleCount += 4; 7469: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) (-(y = (short) y) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7470: } else { //NEGX.W <mem> 7471: XEiJ.mpuCycleCount += 8; 7472: int a = efaMltWord (ea); 7473: XEiJ.busWw (a, z = (short) (-(y = XEiJ.busRws (a)) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7474: } 7475: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7476: (y & z) >>> 31 << 1 | 7477: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7478: } //irpNegxWord 7479: 7480: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7481: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7482: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7483: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7484: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 7485: public static void irpNegxLong () throws M68kException { 7486: int ea = XEiJ.regOC & 63; 7487: int y; 7488: int z; 7489: if (ea < XEiJ.EA_AR) { //NEGX.L Dr 7490: XEiJ.mpuCycleCount += 6; 7491: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 7492: } else { //NEGX.L <mem> 7493: XEiJ.mpuCycleCount += 12; 7494: int a = efaMltLong (ea); 7495: XEiJ.busWl (a, z = -(y = XEiJ.busRls (a)) - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 7496: } 7497: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7498: (y & z) >>> 31 << 1 | 7499: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7500: } //irpNegxLong 7501: 7502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7503: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7504: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7506: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 7507: public static void irpMoveFromSR () throws M68kException { 7508: //MC68010以上では特権命令 7509: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7510: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7511: throw M68kException.m6eSignal; 7512: } 7513: //以下はスーパーバイザモード 7514: int ea = XEiJ.regOC & 63; 7515: if (ea < XEiJ.EA_AR) { //MOVE.W SR,Dr 7516: XEiJ.mpuCycleCount += 6; 7517: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 7518: } else { //MOVE.W SR,<mem> 7519: XEiJ.mpuCycleCount += 8; 7520: XEiJ.busWw (efaMltWord (ea), XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR); 7521: } 7522: } //irpMoveFromSR 7523: 7524: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7525: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7526: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7528: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 7529: public static void irpChkLong () throws M68kException { 7530: XEiJ.mpuCycleCount += 14; 7531: int ea = XEiJ.regOC & 63; 7532: int x = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); 7533: int y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7534: int z = x - y; 7535: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 7536: (y < 0 ? XEiJ.REG_CCR_N : 0) | 7537: (y == 0 ? XEiJ.REG_CCR_Z : 0) | 7538: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 7539: (x & (y ^ z) ^ (y | z)) >>> 31); 7540: if (y < 0 || x < y) { 7541: XEiJ.mpuCycleCount += 40 - 14 - 34; 7542: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 7543: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7544: throw M68kException.m6eSignal; 7545: } 7546: } //irpChkLong 7547: 7548: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7549: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7550: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7552: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 7553: public static void irpChkWord () throws M68kException { 7554: XEiJ.mpuCycleCount += 10; 7555: int ea = XEiJ.regOC & 63; 7556: int x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); 7557: int y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7558: int z = (short) (x - y); 7559: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 7560: (y < 0 ? XEiJ.REG_CCR_N : 0) | 7561: (y == 0 ? XEiJ.REG_CCR_Z : 0) | 7562: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 7563: (x & (y ^ z) ^ (y | z)) >>> 31); 7564: if (y < 0 || x < y) { 7565: XEiJ.mpuCycleCount += 40 - 10 - 34; 7566: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 7567: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7568: throw M68kException.m6eSignal; 7569: } 7570: } //irpChkWord 7571: 7572: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7573: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7574: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7575: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7576: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 7577: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 7578: public static void irpLea () throws M68kException { 7579: int ea = XEiJ.regOC & 63; 7580: if (ea < XEiJ.EA_AR) { //EXTB.L Dr 7581: XEiJ.mpuCycleCount += 4; 7582: int z; 7583: XEiJ.regRn[ea] = z = (byte) XEiJ.regRn[ea]; 7584: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7585: } else { //LEA.L <ea>,Aq 7586: //XEiJ.mpuCycleCount += 4 - 4; 7587: XEiJ.regRn[(XEiJ.regOC >> 9) - (32 - 8)] = efaLeaPea (ea); 7588: } 7589: } //irpLea 7590: 7591: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7592: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7593: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7594: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7595: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 7596: public static void irpClrByte () throws M68kException { 7597: int ea = XEiJ.regOC & 63; 7598: if (ea < XEiJ.EA_AR) { //CLR.B Dr 7599: XEiJ.mpuCycleCount += 4; 7600: XEiJ.regRn[ea] &= ~0xff; 7601: } else { //CLR.B <mem> 7602: XEiJ.mpuCycleCount += 8; 7603: XEiJ.busWb (efaMltByte (ea), 0); 7604: } 7605: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7606: } //irpClrByte 7607: 7608: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7609: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7610: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7611: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7612: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 7613: public static void irpClrWord () throws M68kException { 7614: int ea = XEiJ.regOC & 63; 7615: if (ea < XEiJ.EA_AR) { //CLR.W Dr 7616: XEiJ.mpuCycleCount += 4; 7617: XEiJ.regRn[ea] &= ~0xffff; 7618: } else { //CLR.W <mem> 7619: XEiJ.mpuCycleCount += 8; 7620: XEiJ.busWw (efaMltWord (ea), 0); 7621: } 7622: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7623: } //irpClrWord 7624: 7625: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7626: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7627: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7628: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7629: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 7630: public static void irpClrLong () throws M68kException { 7631: int ea = XEiJ.regOC & 63; 7632: if (ea < XEiJ.EA_AR) { //CLR.L Dr 7633: XEiJ.mpuCycleCount += 6; 7634: XEiJ.regRn[ea] = 0; 7635: } else { //CLR.L <mem> 7636: XEiJ.mpuCycleCount += 12; 7637: XEiJ.busWl (efaMltLong (ea), 0); 7638: } 7639: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7640: } //irpClrLong 7641: 7642: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7643: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7644: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7645: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7646: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 7647: public static void irpMoveFromCCR () throws M68kException { 7648: int ea = XEiJ.regOC & 63; 7649: if (ea < XEiJ.EA_AR) { //MOVE.W CCR,Dr 7650: XEiJ.mpuCycleCount += 4; 7651: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regCCR; 7652: } else { //MOVE.W CCR,<mem> 7653: XEiJ.mpuCycleCount += 8; 7654: XEiJ.busWw (efaMltWord (ea), XEiJ.regCCR); 7655: } 7656: } //irpMoveFromCCR 7657: 7658: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7659: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7660: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7661: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7662: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 7663: public static void irpNegByte () throws M68kException { 7664: int ea = XEiJ.regOC & 63; 7665: int y; 7666: int z; 7667: if (ea < XEiJ.EA_AR) { //NEG.B Dr 7668: XEiJ.mpuCycleCount += 4; 7669: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y)); 7670: } else { //NEG.B <mem> 7671: XEiJ.mpuCycleCount += 8; 7672: int a = efaMltByte (ea); 7673: XEiJ.busWb (a, z = (byte) -(y = XEiJ.busRbs (a))); 7674: } 7675: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7676: (y & z) >>> 31 << 1 | 7677: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7678: } //irpNegByte 7679: 7680: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7681: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7682: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7683: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7684: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 7685: public static void irpNegWord () throws M68kException { 7686: int ea = XEiJ.regOC & 63; 7687: int y; 7688: int z; 7689: if (ea < XEiJ.EA_AR) { //NEG.W Dr 7690: XEiJ.mpuCycleCount += 4; 7691: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) -(y = (short) y)); 7692: } else { //NEG.W <mem> 7693: XEiJ.mpuCycleCount += 8; 7694: int a = efaMltWord (ea); 7695: XEiJ.busWw (a, z = (short) -(y = XEiJ.busRws (a))); 7696: } 7697: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7698: (y & z) >>> 31 << 1 | 7699: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7700: } //irpNegWord 7701: 7702: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7703: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7704: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7705: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7706: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 7707: public static void irpNegLong () throws M68kException { 7708: int ea = XEiJ.regOC & 63; 7709: int y; 7710: int z; 7711: if (ea < XEiJ.EA_AR) { //NEG.L Dr 7712: XEiJ.mpuCycleCount += 6; 7713: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]); 7714: } else { //NEG.L <mem> 7715: XEiJ.mpuCycleCount += 12; 7716: int a = efaMltLong (ea); 7717: XEiJ.busWl (a, z = -(y = XEiJ.busRls (a))); 7718: } 7719: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7720: (y & z) >>> 31 << 1 | 7721: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7722: } //irpNegLong 7723: 7724: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7725: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7726: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7727: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7728: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 7729: public static void irpMoveToCCR () throws M68kException { 7730: XEiJ.mpuCycleCount += 12; 7731: int ea = XEiJ.regOC & 63; 7732: XEiJ.regCCR = XEiJ.REG_CCR_MASK & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea))); 7733: } //irpMoveToCCR 7734: 7735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7736: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7737: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7738: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7739: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 7740: public static void irpNotByte () throws M68kException { 7741: int ea = XEiJ.regOC & 63; 7742: int z; 7743: if (ea < XEiJ.EA_AR) { //NOT.B Dr 7744: XEiJ.mpuCycleCount += 4; 7745: z = XEiJ.regRn[ea] ^= 255; //0拡張してからEOR 7746: } else { //NOT.B <mem> 7747: XEiJ.mpuCycleCount += 8; 7748: int a = efaMltByte (ea); 7749: XEiJ.busWb (a, z = ~XEiJ.busRbs (a)); 7750: } 7751: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7752: } //irpNotByte 7753: 7754: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7755: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7756: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7757: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7758: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 7759: public static void irpNotWord () throws M68kException { 7760: int ea = XEiJ.regOC & 63; 7761: int z; 7762: if (ea < XEiJ.EA_AR) { //NOT.W Dr 7763: XEiJ.mpuCycleCount += 4; 7764: z = XEiJ.regRn[ea] ^= 65535; //0拡張してからEOR 7765: } else { //NOT.W <mem> 7766: XEiJ.mpuCycleCount += 8; 7767: int a = efaMltWord (ea); 7768: XEiJ.busWw (a, z = ~XEiJ.busRws (a)); 7769: } 7770: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7771: } //irpNotWord 7772: 7773: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7774: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7775: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7776: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7777: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 7778: public static void irpNotLong () throws M68kException { 7779: int ea = XEiJ.regOC & 63; 7780: int z; 7781: if (ea < XEiJ.EA_AR) { //NOT.L Dr 7782: XEiJ.mpuCycleCount += 6; 7783: z = XEiJ.regRn[ea] ^= 0xffffffff; 7784: } else { //NOT.L <mem> 7785: XEiJ.mpuCycleCount += 12; 7786: int a = efaMltLong (ea); 7787: XEiJ.busWl (a, z = ~XEiJ.busRls (a)); 7788: } 7789: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7790: } //irpNotLong 7791: 7792: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7793: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7794: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7795: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7796: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 7797: public static void irpMoveToSR () throws M68kException { 7798: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7799: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7800: throw M68kException.m6eSignal; 7801: } 7802: //以下はスーパーバイザモード 7803: XEiJ.mpuCycleCount += 12; 7804: int ea = XEiJ.regOC & 63; 7805: irpSetSR (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea))); //特権違反チェックが先 7806: } //irpMoveToSR 7807: 7808: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7809: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7810: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7811: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7812: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 7813: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 7814: // 7815: //LINK.L Ar,#<data> 7816: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.L #<data>,A7と同じ 7817: // LINK.L A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 7818: public static void irpNbcd () throws M68kException { 7819: int ea = XEiJ.regOC & 63; 7820: if (ea < XEiJ.EA_AR) { //NBCD.B Dr 7821: XEiJ.mpuCycleCount += 6; 7822: XEiJ.regRn[ea] = ~0xff & XEiJ.regRn[ea] | irpSbcd (0, XEiJ.regRn[ea]); 7823: } else if (ea < XEiJ.EA_MM) { //LINK.L Ar,#<data> 7824: XEiJ.mpuCycleCount += 20; 7825: int arr = XEiJ.regOC - (0b0100_100_000_001_000 - 8); 7826: int sp = XEiJ.regRn[15] - 4; 7827: XEiJ.busWl (sp, XEiJ.regRn[arr]); //pushl 7828: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7829: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 7830: } else { 7831: int t = XEiJ.regPC; 7832: XEiJ.regPC = t + 4; 7833: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRlse (t); //pcls 7834: } 7835: } else { //NBCD.B <mem> 7836: XEiJ.mpuCycleCount += 8; 7837: int a = efaMltByte (ea); 7838: XEiJ.busWb (a, irpSbcd (0, XEiJ.busRbs (a))); 7839: } 7840: } //irpNbcd 7841: 7842: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7843: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7844: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7845: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7846: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 7847: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 7848: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 7849: public static void irpPea () throws M68kException { 7850: int ea = XEiJ.regOC & 63; 7851: if (ea < XEiJ.EA_AR) { //SWAP.W Dr 7852: XEiJ.mpuCycleCount += 4; 7853: int x; 7854: int z; 7855: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) << 16 | x >>> 16; 7856: //上位ワードと下位ワードを入れ替えた後のDrをロングでテストする 7857: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7858: } else { //PEA.L <ea> 7859: XEiJ.mpuCycleCount += 12 - 4; 7860: int a = efaLeaPea (ea); //BKPT #<data>はここでillegal instructionになる 7861: XEiJ.busWl (XEiJ.regRn[15] -= 4, a); //pushl。評価順序に注意。wl(r[15]-=4,eaz_leapea(ea))は不可 7862: } 7863: } //irpPea 7864: 7865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7869: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 7870: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 7871: public static void irpMovemToMemWord () throws M68kException { 7872: int ea = XEiJ.regOC & 63; 7873: if (ea < XEiJ.EA_AR) { //EXT.W Dr 7874: XEiJ.mpuCycleCount += 4; 7875: int z; 7876: XEiJ.regRn[ea] = ~0xffff & (z = XEiJ.regRn[ea]) | (char) (z = (byte) z); 7877: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7878: } else { //MOVEM.W <list>,<ea> 7879: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 7880: XEiJ.regPC += 2; 7881: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 7882: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 7883: //転送するレジスタが0個のときArは変化しない 7884: int arr = ea - (XEiJ.EA_MN - 8); 7885: int a = XEiJ.regRn[arr]; 7886: XEiJ.regRn[arr] = a - 2; 7887: int t = a; 7888: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7889: if ((l & 0x0001) != 0) { 7890: XEiJ.busWw (a -= 2, XEiJ.regRn[15]); 7891: } 7892: if ((l & 0x0002) != 0) { 7893: XEiJ.busWw (a -= 2, XEiJ.regRn[14]); 7894: } 7895: if ((l & 0x0004) != 0) { 7896: XEiJ.busWw (a -= 2, XEiJ.regRn[13]); 7897: } 7898: if ((l & 0x0008) != 0) { 7899: XEiJ.busWw (a -= 2, XEiJ.regRn[12]); 7900: } 7901: if ((l & 0x0010) != 0) { 7902: XEiJ.busWw (a -= 2, XEiJ.regRn[11]); 7903: } 7904: if ((l & 0x0020) != 0) { 7905: XEiJ.busWw (a -= 2, XEiJ.regRn[10]); 7906: } 7907: if ((l & 0x0040) != 0) { 7908: XEiJ.busWw (a -= 2, XEiJ.regRn[ 9]); 7909: } 7910: if ((byte) l < 0) { //(l & 0x0080) != 0 7911: XEiJ.busWw (a -= 2, XEiJ.regRn[ 8]); 7912: } 7913: if ((l & 0x0100) != 0) { 7914: XEiJ.busWw (a -= 2, XEiJ.regRn[ 7]); 7915: } 7916: if ((l & 0x0200) != 0) { 7917: XEiJ.busWw (a -= 2, XEiJ.regRn[ 6]); 7918: } 7919: if ((l & 0x0400) != 0) { 7920: XEiJ.busWw (a -= 2, XEiJ.regRn[ 5]); 7921: } 7922: if ((l & 0x0800) != 0) { 7923: XEiJ.busWw (a -= 2, XEiJ.regRn[ 4]); 7924: } 7925: if ((l & 0x1000) != 0) { 7926: XEiJ.busWw (a -= 2, XEiJ.regRn[ 3]); 7927: } 7928: if ((l & 0x2000) != 0) { 7929: XEiJ.busWw (a -= 2, XEiJ.regRn[ 2]); 7930: } 7931: if ((l & 0x4000) != 0) { 7932: XEiJ.busWw (a -= 2, XEiJ.regRn[ 1]); 7933: } 7934: if ((short) l < 0) { //(l & 0x8000) != 0 7935: XEiJ.busWw (a -= 2, XEiJ.regRn[ 0]); 7936: } 7937: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 7938: for (int i = 15; i >= 0; i--) { 7939: if ((l & 0x8000 >>> i) != 0) { 7940: XEiJ.busWw (a -= 2, XEiJ.regRn[i]); 7941: } 7942: } 7943: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 7944: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 7945: for (int i = 15; l != 0; i--, l <<= 1) { 7946: if (l < 0) { 7947: XEiJ.busWw (a -= 2, XEiJ.regRn[i]); 7948: } 7949: } 7950: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 7951: for (int i = 15; l != 0; i--, l >>>= 1) { 7952: if ((l & 1) != 0) { 7953: XEiJ.busWw (a -= 2, XEiJ.regRn[i]); 7954: } 7955: } 7956: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 7957: for (int i = 15; l != 0; ) { 7958: int k = Integer.numberOfTrailingZeros (l); 7959: XEiJ.busWw (a -= 2, XEiJ.regRn[i -= k]); 7960: l = l >>> k & ~1; 7961: } 7962: } 7963: XEiJ.regRn[arr] = a; 7964: XEiJ.mpuCycleCount += 8 + (t - a << 1); //2バイト/個→4サイクル/個 7965: } else { //-(Ar)以外 7966: int a = efaCltWord (ea); 7967: int t = a; 7968: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7969: if ((l & 0x0001) != 0) { 7970: XEiJ.busWw (a, XEiJ.regRn[ 0]); 7971: a += 2; 7972: } 7973: if ((l & 0x0002) != 0) { 7974: XEiJ.busWw (a, XEiJ.regRn[ 1]); 7975: a += 2; 7976: } 7977: if ((l & 0x0004) != 0) { 7978: XEiJ.busWw (a, XEiJ.regRn[ 2]); 7979: a += 2; 7980: } 7981: if ((l & 0x0008) != 0) { 7982: XEiJ.busWw (a, XEiJ.regRn[ 3]); 7983: a += 2; 7984: } 7985: if ((l & 0x0010) != 0) { 7986: XEiJ.busWw (a, XEiJ.regRn[ 4]); 7987: a += 2; 7988: } 7989: if ((l & 0x0020) != 0) { 7990: XEiJ.busWw (a, XEiJ.regRn[ 5]); 7991: a += 2; 7992: } 7993: if ((l & 0x0040) != 0) { 7994: XEiJ.busWw (a, XEiJ.regRn[ 6]); 7995: a += 2; 7996: } 7997: if ((byte) l < 0) { //(l & 0x0080) != 0 7998: XEiJ.busWw (a, XEiJ.regRn[ 7]); 7999: a += 2; 8000: } 8001: if ((l & 0x0100) != 0) { 8002: XEiJ.busWw (a, XEiJ.regRn[ 8]); 8003: a += 2; 8004: } 8005: if ((l & 0x0200) != 0) { 8006: XEiJ.busWw (a, XEiJ.regRn[ 9]); 8007: a += 2; 8008: } 8009: if ((l & 0x0400) != 0) { 8010: XEiJ.busWw (a, XEiJ.regRn[10]); 8011: a += 2; 8012: } 8013: if ((l & 0x0800) != 0) { 8014: XEiJ.busWw (a, XEiJ.regRn[11]); 8015: a += 2; 8016: } 8017: if ((l & 0x1000) != 0) { 8018: XEiJ.busWw (a, XEiJ.regRn[12]); 8019: a += 2; 8020: } 8021: if ((l & 0x2000) != 0) { 8022: XEiJ.busWw (a, XEiJ.regRn[13]); 8023: a += 2; 8024: } 8025: if ((l & 0x4000) != 0) { 8026: XEiJ.busWw (a, XEiJ.regRn[14]); 8027: a += 2; 8028: } 8029: if ((short) l < 0) { //(l & 0x8000) != 0 8030: XEiJ.busWw (a, XEiJ.regRn[15]); 8031: a += 2; 8032: } 8033: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8034: for (int i = 0; i <= 15; i++) { 8035: if ((l & 0x0001 << i) != 0) { 8036: XEiJ.busWw (a, XEiJ.regRn[i]); 8037: a += 2; 8038: } 8039: } 8040: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8041: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8042: for (int i = 0; l != 0; i++, l <<= 1) { 8043: if (l < 0) { 8044: XEiJ.busWw (a, XEiJ.regRn[i]); 8045: a += 2; 8046: } 8047: } 8048: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8049: for (int i = 0; l != 0; i++, l >>>= 1) { 8050: if ((l & 1) != 0) { 8051: XEiJ.busWw (a, XEiJ.regRn[i]); 8052: a += 2; 8053: } 8054: } 8055: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8056: for (int i = 0; l != 0; ) { 8057: int k = Integer.numberOfTrailingZeros (l); 8058: XEiJ.busWw (a, XEiJ.regRn[i += k]); 8059: a += 2; 8060: l = l >>> k & ~1; 8061: } 8062: } 8063: XEiJ.mpuCycleCount += 4 + (a - t << 1); //2バイト/個→4サイクル/個 8064: } 8065: } 8066: } //irpMovemToMemWord 8067: 8068: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8069: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8070: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8071: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8072: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 8073: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 8074: public static void irpMovemToMemLong () throws M68kException { 8075: int ea = XEiJ.regOC & 63; 8076: if (ea < XEiJ.EA_AR) { //EXT.L Dr 8077: XEiJ.mpuCycleCount += 4; 8078: int z; 8079: XEiJ.regRn[ea] = z = (short) XEiJ.regRn[ea]; 8080: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8081: } else { //MOVEM.L <list>,<ea> 8082: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 8083: XEiJ.regPC += 2; 8084: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 8085: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 8086: //転送するレジスタが0個のときArは変化しない 8087: int arr = ea - (XEiJ.EA_MN - 8); 8088: int a = XEiJ.regRn[arr]; 8089: XEiJ.regRn[arr] = a - 4; 8090: int t = a; 8091: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8092: if ((l & 0x0001) != 0) { 8093: XEiJ.busWl (a -= 4, XEiJ.regRn[15]); 8094: } 8095: if ((l & 0x0002) != 0) { 8096: XEiJ.busWl (a -= 4, XEiJ.regRn[14]); 8097: } 8098: if ((l & 0x0004) != 0) { 8099: XEiJ.busWl (a -= 4, XEiJ.regRn[13]); 8100: } 8101: if ((l & 0x0008) != 0) { 8102: XEiJ.busWl (a -= 4, XEiJ.regRn[12]); 8103: } 8104: if ((l & 0x0010) != 0) { 8105: XEiJ.busWl (a -= 4, XEiJ.regRn[11]); 8106: } 8107: if ((l & 0x0020) != 0) { 8108: XEiJ.busWl (a -= 4, XEiJ.regRn[10]); 8109: } 8110: if ((l & 0x0040) != 0) { 8111: XEiJ.busWl (a -= 4, XEiJ.regRn[ 9]); 8112: } 8113: if ((byte) l < 0) { //(l & 0x0080) != 0 8114: XEiJ.busWl (a -= 4, XEiJ.regRn[ 8]); 8115: } 8116: if ((l & 0x0100) != 0) { 8117: XEiJ.busWl (a -= 4, XEiJ.regRn[ 7]); 8118: } 8119: if ((l & 0x0200) != 0) { 8120: XEiJ.busWl (a -= 4, XEiJ.regRn[ 6]); 8121: } 8122: if ((l & 0x0400) != 0) { 8123: XEiJ.busWl (a -= 4, XEiJ.regRn[ 5]); 8124: } 8125: if ((l & 0x0800) != 0) { 8126: XEiJ.busWl (a -= 4, XEiJ.regRn[ 4]); 8127: } 8128: if ((l & 0x1000) != 0) { 8129: XEiJ.busWl (a -= 4, XEiJ.regRn[ 3]); 8130: } 8131: if ((l & 0x2000) != 0) { 8132: XEiJ.busWl (a -= 4, XEiJ.regRn[ 2]); 8133: } 8134: if ((l & 0x4000) != 0) { 8135: XEiJ.busWl (a -= 4, XEiJ.regRn[ 1]); 8136: } 8137: if ((short) l < 0) { //(l & 0x8000) != 0 8138: XEiJ.busWl (a -= 4, XEiJ.regRn[ 0]); 8139: } 8140: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8141: for (int i = 15; i >= 0; i--) { 8142: if ((l & 0x8000 >>> i) != 0) { 8143: XEiJ.busWl (a -= 4, XEiJ.regRn[i]); 8144: } 8145: } 8146: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8147: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8148: for (int i = 15; l != 0; i--, l <<= 1) { 8149: if (l < 0) { 8150: XEiJ.busWl (a -= 4, XEiJ.regRn[i]); 8151: } 8152: } 8153: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8154: for (int i = 15; l != 0; i--, l >>>= 1) { 8155: if ((l & 1) != 0) { 8156: XEiJ.busWl (a -= 4, XEiJ.regRn[i]); 8157: } 8158: } 8159: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8160: for (int i = 15; l != 0; ) { 8161: int k = Integer.numberOfTrailingZeros (l); 8162: XEiJ.busWl (a -= 4, XEiJ.regRn[i -= k]); 8163: l = l >>> k & ~1; 8164: } 8165: } 8166: XEiJ.regRn[arr] = a; 8167: XEiJ.mpuCycleCount += 8 + (t - a << 1); //4バイト/個→8サイクル/個 8168: } else { //-(Ar)以外 8169: int a = efaCltLong (ea); 8170: int t = a; 8171: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8172: if ((l & 0x0001) != 0) { 8173: XEiJ.busWl (a, XEiJ.regRn[ 0]); 8174: a += 4; 8175: } 8176: if ((l & 0x0002) != 0) { 8177: XEiJ.busWl (a, XEiJ.regRn[ 1]); 8178: a += 4; 8179: } 8180: if ((l & 0x0004) != 0) { 8181: XEiJ.busWl (a, XEiJ.regRn[ 2]); 8182: a += 4; 8183: } 8184: if ((l & 0x0008) != 0) { 8185: XEiJ.busWl (a, XEiJ.regRn[ 3]); 8186: a += 4; 8187: } 8188: if ((l & 0x0010) != 0) { 8189: XEiJ.busWl (a, XEiJ.regRn[ 4]); 8190: a += 4; 8191: } 8192: if ((l & 0x0020) != 0) { 8193: XEiJ.busWl (a, XEiJ.regRn[ 5]); 8194: a += 4; 8195: } 8196: if ((l & 0x0040) != 0) { 8197: XEiJ.busWl (a, XEiJ.regRn[ 6]); 8198: a += 4; 8199: } 8200: if ((byte) l < 0) { //(l & 0x0080) != 0 8201: XEiJ.busWl (a, XEiJ.regRn[ 7]); 8202: a += 4; 8203: } 8204: if ((l & 0x0100) != 0) { 8205: XEiJ.busWl (a, XEiJ.regRn[ 8]); 8206: a += 4; 8207: } 8208: if ((l & 0x0200) != 0) { 8209: XEiJ.busWl (a, XEiJ.regRn[ 9]); 8210: a += 4; 8211: } 8212: if ((l & 0x0400) != 0) { 8213: XEiJ.busWl (a, XEiJ.regRn[10]); 8214: a += 4; 8215: } 8216: if ((l & 0x0800) != 0) { 8217: XEiJ.busWl (a, XEiJ.regRn[11]); 8218: a += 4; 8219: } 8220: if ((l & 0x1000) != 0) { 8221: XEiJ.busWl (a, XEiJ.regRn[12]); 8222: a += 4; 8223: } 8224: if ((l & 0x2000) != 0) { 8225: XEiJ.busWl (a, XEiJ.regRn[13]); 8226: a += 4; 8227: } 8228: if ((l & 0x4000) != 0) { 8229: XEiJ.busWl (a, XEiJ.regRn[14]); 8230: a += 4; 8231: } 8232: if ((short) l < 0) { //(l & 0x8000) != 0 8233: XEiJ.busWl (a, XEiJ.regRn[15]); 8234: a += 4; 8235: } 8236: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8237: for (int i = 0; i <= 15; i++) { 8238: if ((l & 0x0001 << i) != 0) { 8239: XEiJ.busWl (a, XEiJ.regRn[i]); 8240: a += 4; 8241: } 8242: } 8243: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8244: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8245: for (int i = 0; l != 0; i++, l <<= 1) { 8246: if (l < 0) { 8247: XEiJ.busWl (a, XEiJ.regRn[i]); 8248: a += 4; 8249: } 8250: } 8251: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8252: for (int i = 0; l != 0; i++, l >>>= 1) { 8253: if ((l & 1) != 0) { 8254: XEiJ.busWl (a, XEiJ.regRn[i]); 8255: a += 4; 8256: } 8257: } 8258: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8259: for (int i = 0; l != 0; ) { 8260: int k = Integer.numberOfTrailingZeros (l); 8261: XEiJ.busWl (a, XEiJ.regRn[i += k]); 8262: a += 4; 8263: l = l >>> k & ~1; 8264: } 8265: } 8266: XEiJ.mpuCycleCount += 4 + (a - t << 1); //4バイト/個→8サイクル/個 8267: } 8268: } 8269: } //irpMovemToMemLong 8270: 8271: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8272: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8273: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8274: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8275: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 8276: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 8277: public static void irpTstByte () throws M68kException { 8278: XEiJ.mpuCycleCount += 4; 8279: int ea = XEiJ.regOC & 63; 8280: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)))]; //ccr_tst_byte。アドレッシングモードに注意 8281: } //irpTstByte 8282: 8283: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8284: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8285: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8287: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 8288: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 8289: public static void irpTstWord () throws M68kException { 8290: XEiJ.mpuCycleCount += 4; 8291: int ea = XEiJ.regOC & 63; 8292: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8293: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 8294: } //irpTstWord 8295: 8296: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8297: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8298: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8300: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 8301: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 8302: public static void irpTstLong () throws M68kException { 8303: XEiJ.mpuCycleCount += 4; 8304: int ea = XEiJ.regOC & 63; 8305: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8306: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8307: } //irpTstLong 8308: 8309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8310: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8311: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8312: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8313: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 8314: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 8315: public static void irpTas () throws M68kException { 8316: int ea = XEiJ.regOC & 63; 8317: int z; 8318: if (ea < XEiJ.EA_AR) { //TAS.B Dr 8319: XEiJ.mpuCycleCount += 4; 8320: XEiJ.regRn[ea] = 0x80 | (z = XEiJ.regRn[ea]); 8321: } else { //TAS.B <mem> 8322: XEiJ.mpuCycleCount += 14; 8323: int a = efaMltByte (ea); 8324: XEiJ.busWb (a, 0x80 | (z = XEiJ.busRbs (a))); 8325: } 8326: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 8327: } //irpTas 8328: 8329: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8330: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8331: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8332: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8333: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 8334: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 8335: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 8336: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 8337: public static void irpMuluMulsLong () throws M68kException { 8338: int w; 8339: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 8340: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 8341: } else { 8342: w = XEiJ.regPC; 8343: XEiJ.regPC = w + 2; 8344: w = XEiJ.busRwze (w); //pcwz。拡張ワード 8345: } 8346: if ((w & ~0b0111_110_000_000_111) != 0) { 8347: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8348: throw M68kException.m6eSignal; 8349: } 8350: int l = w >> 12; //被乗数,積の下位32bit 8351: int s = w & 0b0000_100_000_000_000; //0=MULU,1=MULS 8352: int q = w & 0b0000_010_000_000_000; //0=32bit,1=64bit 8353: int h = w & 7; //積の上位32bit 8354: XEiJ.mpuCycleCount += 72; //72*0.6=43.2≒44 8355: int ea = XEiJ.regOC & 63; 8356: long yy = (long) (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea))); 8357: long xx = (long) XEiJ.regRn[l]; 8358: if (s == 0) { //MULU 8359: long zz = (0xffffffffL & xx) * (0xffffffffL & yy); 8360: int z = XEiJ.regRn[l] = (int) zz; 8361: if (q == 0) { //32bit 8362: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (zz >>> 32 != 0L ? XEiJ.REG_CCR_V : 0); 8363: } else { //64bit 8364: XEiJ.regRn[h] = (int) (zz >>> 32); 8365: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (zz > 0L ? 0 : zz < 0L ? XEiJ.REG_CCR_N : XEiJ.REG_CCR_Z); 8366: } 8367: } else { //MULS 8368: long zz = xx * yy; 8369: int z = XEiJ.regRn[l] = (int) zz; 8370: if (q == 0) { //32bit 8371: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (z != zz ? XEiJ.REG_CCR_V : 0); 8372: } else { //64bit 8373: XEiJ.regRn[h] = (int) (zz >> 32); 8374: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (zz > 0L ? 0 : zz < 0L ? XEiJ.REG_CCR_N : XEiJ.REG_CCR_Z); 8375: } 8376: } 8377: if (M30_DIV_ZERO_V_FLAG) { 8378: m30DivZeroVFlag = false; 8379: } 8380: } //irpMuluMulsLong 8381: 8382: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8383: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8384: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8385: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8386: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 8387: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 8388: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 8389: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 8390: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 8391: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 8392: // 8393: //DIVS.L <ea>,Dq 8394: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8395: // 8396: //DIVS.L <ea>,Dr:Dq 8397: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8398: // M68000PRMでDIVS.Lのアドレッシングモードがデータ可変と書かれているのはデータの間違い 8399: // 8400: //DIVSL.L <ea>,Dr:Dq 8401: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8402: // 8403: //DIVU.L <ea>,Dq 8404: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8405: // 8406: //DIVU.L <ea>,Dr:Dq 8407: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8408: // 8409: //DIVUL.L <ea>,Dr:Dq 8410: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8411: public static void irpDivuDivsLong () throws M68kException { 8412: int w; 8413: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 8414: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 8415: } else { 8416: w = XEiJ.regPC; 8417: XEiJ.regPC = w + 2; 8418: w = XEiJ.busRwze (w); //pcwz。拡張ワード 8419: } 8420: if ((w & ~0b0111_110_000_000_111) != 0) { 8421: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8422: throw M68kException.m6eSignal; 8423: } 8424: int l = w >> 12; //被除数の下位32bit,商 8425: int s = w & 0b0000_100_000_000_000; //0=DIVU,1=DIVS 8426: int q = w & 0b0000_010_000_000_000; //0=32bit被除数,1=64bit被除数 8427: int h = w & 7; //被除数の上位32bit,余り 8428: int ea = XEiJ.regOC & 63; 8429: int y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //除数 8430: if (s == 0) { //符号なし。DIVU.L <ea>,* 8431: XEiJ.mpuCycleCount += 130; //最大。130*0.6=78 8432: long yy = (long) y & 0xffffffffL; //除数 8433: if (q == 0) { //符号なし、32bit被除数。DIVU.L <ea>,Dq/DIVUL.L <ea>,Dr:Dq 8434: if (y == 0) { //ゼロ除算 8435: if (h == l) { //DIVU.L <ea>,Dq 8436: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8437: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8438: (xx < 0L ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 8439: (xx == 0L ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が0のときセット、さもなくばクリア 8440: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8441: ); //Cは常にクリア 8442: } else { //DIVUL.L <ea>,Dr:Dq 8443: int x = XEiJ.regRn[l]; //32bit被除数 8444: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8445: (x < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 8446: (x == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が0のときセット、さもなくばクリア 8447: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8448: ); //Cは常にクリア 8449: } 8450: XEiJ.mpuCycleCount += 38 - 34; 8451: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8452: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8453: throw M68kException.m6eSignal; 8454: } //if ゼロ除算 8455: long xx = (long) XEiJ.regRn[l] & 0xffffffffL; //32bit被除数 8456: long zz = (long) ((double) xx / (double) yy); //double→intのキャストは飽和変換で0xffffffff/0x00000001が0x7fffffffになってしまうのでdouble→longとする 8457: int z = XEiJ.regRn[l] = (int) zz; //商 8458: if (h != l) { 8459: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8460: } 8461: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8462: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8463: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8464: ); //VとCは常にクリア 8465: } else { //符号なし、64bit被除数。DIVU.L <ea>,Dr:Dq 8466: if (y == 0) { //ゼロ除算 8467: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8468: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8469: (((int) xx < 0 && (int) xx != 0x7fffffff) || (int) xx == 0x80000000 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が$xxxxxxxx7fffffffを除く負または$xxxxxxxx80000000のときセット、さもなくばクリア 8470: ((int) xx == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が$xxxxxxxx00000000のときセット、さもなくばクリア 8471: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8472: ); //Cは常にクリア 8473: XEiJ.mpuCycleCount += 38 - 34; 8474: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8475: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8476: throw M68kException.m6eSignal; 8477: } //if ゼロ除算 8478: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8479: long zz = Long.divideUnsigned (xx, yy); //商。Long.divideUnsigned(long,long)は1.8から 8480: int z = (int) zz; //商の下位32bit 8481: if (zz >>> 32 != 0L) { //オーバーフローあり 8482: //Dr:Dqは変化しない 8483: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8484: ((int) xx < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数の下位32bitが負のときセット、さもなくばクリア 8485: ((int) xx == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数の下位32bitが0のときセット、さもなくばクリア 8486: XEiJ.REG_CCR_V //Vは常にセット 8487: ); //Cは常にクリア 8488: } else { //オーバーフローなし 8489: XEiJ.regRn[l] = (int) zz; //Dr=商 8490: if (h != l) { 8491: XEiJ.regRn[h] = (int) (xx - yy * zz); //Dq=余り 8492: } 8493: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8494: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8495: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8496: ); //VとCは常にクリア 8497: } //if オーバーフローあり/オーバーフローなし 8498: } //if 32bit被除数/64bit被除数 8499: } else { //符号あり。DIVS.L <ea>,* 8500: XEiJ.mpuCycleCount += 150; //最大。150*0.6=90 8501: if (q == 0) { //符号あり、32bit被除数。DIVS.L <ea>,Dq/DIVSL.L <ea>,Dr:Dq 8502: long yy = (long) y; //除数 8503: if (y == 0) { //ゼロ除算 8504: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8505: if (h == l) { //DIVS.L <ea>,Dq 8506: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8507: //Nは常にクリア 8508: XEiJ.REG_CCR_Z | //Zは常にセット 8509: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8510: ); //Cは常にクリア 8511: } else { //DIVSL.L <ea>,Dr:Dq 8512: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8513: //Nは常にクリア 8514: XEiJ.REG_CCR_Z | //Zは常にセット 8515: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8516: ); //Cは常にクリア 8517: } //if DIVS.L <ea>,Dq/DIVSL.L <ea>,Dr:Dq 8518: XEiJ.mpuCycleCount += 38 - 34; 8519: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8520: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8521: throw M68kException.m6eSignal; 8522: } //if ゼロ除算 8523: long xx = (long) XEiJ.regRn[l]; //32bit被除数 8524: long zz = xx / yy; //商 8525: if ((int) zz != zz) { //オーバーフローあり 8526: //Dqは変化しない 8527: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8528: (xx == 0xffffffff80000000L && y == -1 ? XEiJ.REG_CCR_Z : 0) | //Zは0x80000000/-1のときセット、さもなくばクリア 8529: XEiJ.REG_CCR_V //Vは常にセット 8530: ); //NとCは常にクリア 8531: } else { //オーバーフローなし 8532: int z = XEiJ.regRn[l] = (int) zz; //商 8533: if (h != l) { //DIVSL.L <ea>,Dr:Dq 8534: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8535: } 8536: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8537: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8538: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8539: ); //VとCは常にクリア 8540: } //if オーバーフローあり/オーバーフローなし 8541: } else { //符号あり、64bit被除数。DIVS.L <ea>,Dr:Dq 8542: long yy = (long) y; //除数 8543: if (y == 0) { //ゼロ除算 8544: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8545: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8546: //Nは常にクリア 8547: XEiJ.REG_CCR_Z | //Zは常にセット 8548: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8549: ); //Cは常にクリア 8550: XEiJ.mpuCycleCount += 38 - 34; 8551: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8552: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8553: throw M68kException.m6eSignal; 8554: } //if ゼロ除算 8555: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8556: long zz = xx / yy; //商 8557: if ((int) zz != zz) { //オーバーフローあり 8558: int zh = (int) (zz >> 32); 8559: int zl = (int) zz; 8560: int xh = (int) (xx >> 32); 8561: int xl = (int) xx; 8562: //Dr:Dqは変化しない 8563: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8564: ((zh == 0x00000000 || zh == 0xffffffff) && zl != 0x00000000 8565: ? //商が$0000000000000000を除く$00000000xxxxxxqqまたは$ffffffff00000000を除く$ffffffffxxxxxxqqのとき 8566: (zl << 24 < 0 ? XEiJ.REG_CCR_N : 0) | //qqが負ならばN=1,さもなくばN=0 8567: (zl << 24 == 0 ? XEiJ.REG_CCR_Z : 0) //qqが0ならばZ=1,さもなくばZ=0 8568: : //商が$0000000000000000を除く$00000000xxxxxxqqまたは$ffffffff00000000を除く$ffffffffxxxxxxqqでないとき 8569: (xl == 0x80000000 || //被除数が$xxxxxxxx80000000または 8570: (xh == 0x80000000 && xl != 0x00000000) || //被除数が$8000000000000000を除く$80000000xxxxxxxxまたは 8571: (xl == 0x7fffffff && xh != 0x7fffffff) || //被除数が$7fffffff7fffffffを除く$xxxxxxxx7fffffffまたは 8572: (xh == 0x7fffffff && xl != 0x7fffffff) || //被除数が$7fffffff7fffffffを除く$7fffffffxxxxxxxxまたは 8573: (xl == 0xffffffff && 0x00000000 <= xh) ? XEiJ.REG_CCR_N : 0) | //被除数が正で$xxxxxxxxffffffffならばN=1,さもなくばN=0 8574: (xl == 0x00000000 ? XEiJ.REG_CCR_Z : 0)) | //被除数が$xxxxxxxx00000000ならばZ=1,さもなくばZ=0 8575: XEiJ.REG_CCR_V //Vは常にセット 8576: ); //Cは常にクリア 8577: } else { //オーバーフローなし 8578: int z = XEiJ.regRn[l] = (int) zz; //商 8579: if (h != l) { 8580: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8581: } 8582: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8583: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8584: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8585: ); //VとCは常にクリア 8586: } //if オーバーフローあり/オーバーフローなし 8587: } //if 32bit被除数/64bit被除数 8588: } //if 符号なし/符号あり 8589: if (M30_DIV_ZERO_V_FLAG) { 8590: m30DivZeroVFlag = false; 8591: } 8592: } //irpDivuDivsLong 8593: 8594: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8595: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8596: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8597: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8598: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 8599: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 8600: // 8601: //SATS.L Dr 8602: // VがセットされていたらDrを符号が逆で絶対値が最大の値にする(直前のDrに対する演算を飽和演算にする) 8603: public static void irpMovemToRegWord () throws M68kException { 8604: int ea = XEiJ.regOC & 63; 8605: if (ea < XEiJ.EA_AR) { //SATS.L Dr 8606: XEiJ.mpuCycleCount += 4; 8607: int z = XEiJ.regRn[ea]; 8608: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 < 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) != 0) { //Vがセットされているとき 8609: XEiJ.regRn[ea] = z = z >> 31 ^ 0x80000000; //符号が逆で絶対値が最大の値にする 8610: } 8611: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8612: } else { //MOVEM.W <ea>,<list> 8613: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 8614: XEiJ.regPC += 2; 8615: int arr, a; 8616: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8617: XEiJ.mpuCycleCount += 12; 8618: arr = ea - (XEiJ.EA_MP - 8); 8619: a = XEiJ.regRn[arr]; 8620: } else { //(Ar)+以外 8621: XEiJ.mpuCycleCount += 8; 8622: arr = 16; 8623: a = efaCntWord (ea); 8624: } 8625: int t = a; 8626: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8627: if ((l & 0x0001) != 0) { 8628: XEiJ.regRn[ 0] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8629: a += 2; 8630: } 8631: if ((l & 0x0002) != 0) { 8632: XEiJ.regRn[ 1] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8633: a += 2; 8634: } 8635: if ((l & 0x0004) != 0) { 8636: XEiJ.regRn[ 2] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8637: a += 2; 8638: } 8639: if ((l & 0x0008) != 0) { 8640: XEiJ.regRn[ 3] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8641: a += 2; 8642: } 8643: if ((l & 0x0010) != 0) { 8644: XEiJ.regRn[ 4] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8645: a += 2; 8646: } 8647: if ((l & 0x0020) != 0) { 8648: XEiJ.regRn[ 5] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8649: a += 2; 8650: } 8651: if ((l & 0x0040) != 0) { 8652: XEiJ.regRn[ 6] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8653: a += 2; 8654: } 8655: if ((byte) l < 0) { //(l & 0x0080) != 0 8656: XEiJ.regRn[ 7] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8657: a += 2; 8658: } 8659: if ((l & 0x0100) != 0) { 8660: XEiJ.regRn[ 8] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8661: a += 2; 8662: } 8663: if ((l & 0x0200) != 0) { 8664: XEiJ.regRn[ 9] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8665: a += 2; 8666: } 8667: if ((l & 0x0400) != 0) { 8668: XEiJ.regRn[10] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8669: a += 2; 8670: } 8671: if ((l & 0x0800) != 0) { 8672: XEiJ.regRn[11] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8673: a += 2; 8674: } 8675: if ((l & 0x1000) != 0) { 8676: XEiJ.regRn[12] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8677: a += 2; 8678: } 8679: if ((l & 0x2000) != 0) { 8680: XEiJ.regRn[13] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8681: a += 2; 8682: } 8683: if ((l & 0x4000) != 0) { 8684: XEiJ.regRn[14] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8685: a += 2; 8686: } 8687: if ((short) l < 0) { //(l & 0x8000) != 0 8688: XEiJ.regRn[15] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8689: a += 2; 8690: } 8691: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8692: for (int i = 0; i <= 15; i++) { 8693: if ((l & 0x0001 << i) != 0) { 8694: XEiJ.regRn[i] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8695: a += 2; 8696: } 8697: } 8698: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8699: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8700: for (int i = 0; l != 0; i++, l <<= 1) { 8701: if (l < 0) { 8702: XEiJ.regRn[i] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8703: a += 2; 8704: } 8705: } 8706: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8707: for (int i = 0; l != 0; i++, l >>>= 1) { 8708: if ((l & 1) != 0) { 8709: XEiJ.regRn[i] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8710: a += 2; 8711: } 8712: } 8713: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8714: for (int i = 0; l != 0; ) { 8715: int k = Integer.numberOfTrailingZeros (l); 8716: XEiJ.regRn[i += k] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8717: a += 2; 8718: l = l >>> k & ~1; 8719: } 8720: } 8721: //MOVEM.W (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8722: XEiJ.regRn[arr] = a; 8723: XEiJ.mpuCycleCount += a - t << 1; //2バイト/個→4サイクル/個 8724: } 8725: } //irpMovemToRegWord 8726: 8727: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8728: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8729: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8730: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8731: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 8732: public static void irpMovemToRegLong () throws M68kException { 8733: int ea = XEiJ.regOC & 63; 8734: { 8735: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 8736: XEiJ.regPC += 2; 8737: int arr, a; 8738: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8739: XEiJ.mpuCycleCount += 12; 8740: arr = ea - (XEiJ.EA_MP - 8); 8741: a = XEiJ.regRn[arr]; 8742: } else { //(Ar)+以外 8743: XEiJ.mpuCycleCount += 8; 8744: arr = 16; 8745: a = efaCntLong (ea); 8746: } 8747: int t = a; 8748: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8749: if ((l & 0x0001) != 0) { 8750: XEiJ.regRn[ 0] = XEiJ.busRls (a); 8751: a += 4; 8752: } 8753: if ((l & 0x0002) != 0) { 8754: XEiJ.regRn[ 1] = XEiJ.busRls (a); 8755: a += 4; 8756: } 8757: if ((l & 0x0004) != 0) { 8758: XEiJ.regRn[ 2] = XEiJ.busRls (a); 8759: a += 4; 8760: } 8761: if ((l & 0x0008) != 0) { 8762: XEiJ.regRn[ 3] = XEiJ.busRls (a); 8763: a += 4; 8764: } 8765: if ((l & 0x0010) != 0) { 8766: XEiJ.regRn[ 4] = XEiJ.busRls (a); 8767: a += 4; 8768: } 8769: if ((l & 0x0020) != 0) { 8770: XEiJ.regRn[ 5] = XEiJ.busRls (a); 8771: a += 4; 8772: } 8773: if ((l & 0x0040) != 0) { 8774: XEiJ.regRn[ 6] = XEiJ.busRls (a); 8775: a += 4; 8776: } 8777: if ((byte) l < 0) { //(l & 0x0080) != 0 8778: XEiJ.regRn[ 7] = XEiJ.busRls (a); 8779: a += 4; 8780: } 8781: if ((l & 0x0100) != 0) { 8782: XEiJ.regRn[ 8] = XEiJ.busRls (a); 8783: a += 4; 8784: } 8785: if ((l & 0x0200) != 0) { 8786: XEiJ.regRn[ 9] = XEiJ.busRls (a); 8787: a += 4; 8788: } 8789: if ((l & 0x0400) != 0) { 8790: XEiJ.regRn[10] = XEiJ.busRls (a); 8791: a += 4; 8792: } 8793: if ((l & 0x0800) != 0) { 8794: XEiJ.regRn[11] = XEiJ.busRls (a); 8795: a += 4; 8796: } 8797: if ((l & 0x1000) != 0) { 8798: XEiJ.regRn[12] = XEiJ.busRls (a); 8799: a += 4; 8800: } 8801: if ((l & 0x2000) != 0) { 8802: XEiJ.regRn[13] = XEiJ.busRls (a); 8803: a += 4; 8804: } 8805: if ((l & 0x4000) != 0) { 8806: XEiJ.regRn[14] = XEiJ.busRls (a); 8807: a += 4; 8808: } 8809: if ((short) l < 0) { //(l & 0x8000) != 0 8810: XEiJ.regRn[15] = XEiJ.busRls (a); 8811: a += 4; 8812: } 8813: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8814: for (int i = 0; i <= 15; i++) { 8815: if ((l & 0x0001 << i) != 0) { 8816: XEiJ.regRn[i] = XEiJ.busRls (a); 8817: a += 4; 8818: } 8819: } 8820: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8821: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8822: for (int i = 0; l != 0; i++, l <<= 1) { 8823: if (l < 0) { 8824: XEiJ.regRn[i] = XEiJ.busRls (a); 8825: a += 4; 8826: } 8827: } 8828: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8829: for (int i = 0; l != 0; i++, l >>>= 1) { 8830: if ((l & 1) != 0) { 8831: XEiJ.regRn[i] = XEiJ.busRls (a); 8832: a += 4; 8833: } 8834: } 8835: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8836: for (int i = 0; l != 0; ) { 8837: int k = Integer.numberOfTrailingZeros (l); 8838: XEiJ.regRn[i += k] = XEiJ.busRls (a); 8839: a += 4; 8840: l = l >>> k & ~1; 8841: } 8842: } 8843: //MOVEM.L (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8844: XEiJ.regRn[arr] = a; 8845: XEiJ.mpuCycleCount += a - t << 1; //4バイト/個→8サイクル/個 8846: } 8847: } //irpMovemToRegLong 8848: 8849: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8850: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8851: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8852: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8853: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 8854: public static void irpTrap () throws M68kException { 8855: XEiJ.mpuCycleCount += 34; 8856: if (XEiJ.MPU_INLINE_EXCEPTION) { 8857: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 8858: int sp = XEiJ.regRn[15]; 8859: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 8860: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8861: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 8862: XEiJ.mpuUSP = sp; //USPを保存 8863: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 8864: if (DataBreakPoint.DBP_ON) { 8865: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 8866: } else { 8867: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 8868: } 8869: if (InstructionBreakPoint.IBP_ON) { 8870: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 8871: } 8872: } 8873: XEiJ.regRn[15] = sp -= 8; 8874: XEiJ.busWw (sp + 6, 0x0000 | XEiJ.regOC - (0x4e40 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2); //pushw。フォーマットとベクタオフセットをプッシュする 8875: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 8876: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 8877: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (XEiJ.regOC - (0x4e40 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2))); //例外ベクタを取り出してジャンプする 8878: } else { 8879: irpException (XEiJ.regOC - (0x4e40 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR), XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは次の命令 8880: } 8881: } //irpTrap 8882: public static void irpTrap15 () throws M68kException { 8883: if ((XEiJ.regRn[0] & 255) == 0x8e) { //IOCS _BOOTINF 8884: MainMemory.mmrCheckHuman (); 8885: } 8886: XEiJ.mpuCycleCount += 34; 8887: if (XEiJ.MPU_INLINE_EXCEPTION) { 8888: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 8889: int sp = XEiJ.regRn[15]; 8890: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 8891: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8892: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 8893: XEiJ.mpuUSP = sp; //USPを保存 8894: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 8895: if (DataBreakPoint.DBP_ON) { 8896: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 8897: } else { 8898: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 8899: } 8900: if (InstructionBreakPoint.IBP_ON) { 8901: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 8902: } 8903: } 8904: XEiJ.regRn[15] = sp -= 8; 8905: XEiJ.busWw (sp + 6, 0x0000 | M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR); //pushw。フォーマットとベクタオフセットをプッシュする 8906: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 8907: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 8908: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR << 2))); //例外ベクタを取り出してジャンプする 8909: } else { 8910: irpException (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR, XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは次の命令 8911: } 8912: } //irpTrap15 8913: 8914: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8915: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8916: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8917: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8918: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 8919: // 8920: //LINK.W Ar,#<data> 8921: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.W #<data>,A7と同じ 8922: // LINK.W A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 8923: public static void irpLinkWord () throws M68kException { 8924: XEiJ.mpuCycleCount += 16; 8925: int arr = XEiJ.regOC - (0b0100_111_001_010_000 - 8); 8926: //評価順序に注意 8927: // wl(r[15]-=4,r[8+rrr])は不可 8928: int sp = XEiJ.regRn[15] - 4; 8929: XEiJ.busWl (sp, XEiJ.regRn[arr]); //pushl 8930: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 8931: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 8932: } else { 8933: int t = XEiJ.regPC; 8934: XEiJ.regPC = t + 2; 8935: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRwse (t); //pcws 8936: } 8937: } //irpLinkWord 8938: 8939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8940: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8941: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8943: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 8944: // 8945: //UNLK Ar 8946: // MOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ 8947: // UNLK A7はMOVEA.L A7,A7;MOVEA.L (A7)+,A7すなわちMOVEA.L (A7),A7と同じ 8948: // ソースオペランドのポストインクリメントはデスティネーションオペランドが評価される前に完了しているとみなされる 8949: // 例えばMOVE.L (A0)+,(A0)+はMOVE.L (A0),(4,A0);ADDQ.L #8,A0と同じ 8950: // MOVEA.L (A0)+,A0はポストインクリメントされたA0が(A0)から読み出された値で上書きされるのでMOVEA.L (A0),A0と同じ 8951: // M68000PRMにUNLK Anの動作はAn→SP;(SP)→An;SP+4→SPだと書かれているがこれはn=7の場合に当てはまらない 8952: // 余談だが68040の初期のマスクセットはUNLK A7を実行すると固まるらしい 8953: public static void irpUnlk () throws M68kException { 8954: XEiJ.mpuCycleCount += 12; 8955: int arr = XEiJ.regOC - (0b0100_111_001_011_000 - 8); 8956: //評価順序に注意 8957: int sp = XEiJ.regRn[arr]; 8958: XEiJ.regRn[15] = sp + 4; 8959: XEiJ.regRn[arr] = XEiJ.busRls (sp); //popls 8960: } //irpUnlk 8961: 8962: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8963: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8964: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8965: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8966: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 8967: public static void irpMoveToUsp () throws M68kException { 8968: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8969: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8970: throw M68kException.m6eSignal; 8971: } 8972: //以下はスーパーバイザモード 8973: XEiJ.mpuCycleCount += 4; 8974: XEiJ.mpuUSP = XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_100_000 - 8)]; 8975: } //irpMoveToUsp 8976: 8977: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8978: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8979: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8980: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8981: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 8982: public static void irpMoveFromUsp () throws M68kException { 8983: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8984: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8985: throw M68kException.m6eSignal; 8986: } 8987: //以下はスーパーバイザモード 8988: XEiJ.mpuCycleCount += 4; 8989: XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_101_000 - 8)] = XEiJ.mpuUSP; 8990: } //irpMoveFromUsp 8991: 8992: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8993: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8994: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8995: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8996: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 8997: public static void irpReset () throws M68kException { 8998: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8999: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9000: throw M68kException.m6eSignal; 9001: } 9002: //以下はスーパーバイザモード 9003: XEiJ.mpuCycleCount += 132; 9004: XEiJ.irpReset (); 9005: } //irpReset 9006: 9007: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9008: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9009: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9010: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9011: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 9012: public static void irpNop () throws M68kException { 9013: XEiJ.mpuCycleCount += 4; 9014: //何もしない 9015: } //irpNop 9016: 9017: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9018: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9019: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9020: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9021: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 9022: // 9023: //STOP #<data> 9024: // 1. #<data>をsrに設定する 9025: // 2. pcを進める 9026: // 3. 以下のいずれかの条件が成立するまで停止する 9027: // 3a. トレース 9028: // 3b. マスクされているレベルよりも高い割り込み要求 9029: // 3c. リセット 9030: // コアと一緒にデバイスを止めるわけにいかないので、ここでは条件が成立するまで同じ命令を繰り返すループ命令として実装する 9031: public static void irpStop () throws M68kException { 9032: if (XEiJ.regSRS == 0) { //ユーザモードのとき 9033: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9034: throw M68kException.m6eSignal; 9035: } 9036: //以下はスーパーバイザモード 9037: XEiJ.mpuCycleCount += 4; 9038: irpSetSR (XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 9039: if (XEiJ.mpuTraceFlag == 0) { //トレースまたはマスクされているレベルよりも高い割り込み要求がない 9040: XEiJ.regPC = XEiJ.regPC0; //ループ 9041: //任意の負荷率を100%に設定しているときSTOP命令が軽すぎると動作周波数が大きくなりすぎて割り込みがかかったとき次に進めなくなる 9042: //負荷率の計算にSTOP命令で止まっていた時間を含めないことにする 9043: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。25MHzのとき100clk 9044: XEiJ.mpuLastNano += 4000L; 9045: } 9046: } //irpStop 9047: 9048: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9049: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9050: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9051: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9052: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 9053: public static void irpRte () throws M68kException { 9054: if (XEiJ.regSRS == 0) { //ユーザモードのとき 9055: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9056: throw M68kException.m6eSignal; 9057: } 9058: //以下はスーパーバイザモード 9059: XEiJ.mpuCycleCount += 20; 9060: int sp = XEiJ.regRn[15]; 9061: int format = XEiJ.busRws (sp + 6) & 0xf000; 9062: XEiJ.regRn[15] = sp + (format == 0x0000 ? 8 : //010,020,030,040,060 9063: format == 0x1000 ? 8 : //020,030,040 9064: format == 0x2000 ? 12 : //020,030,040,060 9065: //format == 0x3000 ? 12 : //040,060 9066: //format == 0x4000 ? 16 : //060 9067: //format == 0x7000 ? 60 : //040 9068: //format == 0x8000 ? 58 : //010 9069: format == 0x9000 ? 20 : //020,030 9070: format == 0xa000 ? 32 : //020,030 9071: format == 0xb000 ? 92 : //020,030 9072: 8); //??? 9073: int newSR = XEiJ.busRwz (sp); //popwz。ここでバスエラーが生じる可能性がある 9074: int newPC = XEiJ.busRls (sp + 2); //popls 9075: //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと 9076: irpSetSR (newSR); //ここでユーザモードに戻る場合がある。特権違反チェックが先 9077: irpSetPC (newPC); //分岐ログが新しいsrを使う。順序に注意 9078: if (format == 0x1000) { //スローアウェイフレームだったとき 9079: sp = XEiJ.regRn[15]; 9080: format = XEiJ.busRws (sp + 6) & 0xf000; 9081: XEiJ.regRn[15] = sp + (format == 0x0000 ? 8 : //010,020,030,040,060 9082: format == 0x1000 ? 8 : //020,030,040 9083: format == 0x2000 ? 12 : //020,030,040,060 9084: //format == 0x3000 ? 12 : //040,060 9085: //format == 0x4000 ? 16 : //060 9086: //format == 0x7000 ? 60 : //040 9087: //format == 0x8000 ? 58 : //010 9088: format == 0x9000 ? 20 : //020,030 9089: format == 0xa000 ? 32 : //020,030 9090: format == 0xb000 ? 92 : //020,030 9091: 8); //??? 9092: newSR = XEiJ.busRwz (sp); //popwz。ここでバスエラーが生じる可能性がある 9093: newPC = XEiJ.busRlse (sp + 2); //popls 9094: //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと 9095: irpSetSR (newSR); //ここでユーザモードに戻る場合がある。特権違反チェックが先 9096: irpSetPC (newPC); //分岐ログが新しいsrを使う。順序に注意 9097: } 9098: } //irpRte 9099: 9100: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9101: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9102: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9103: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9104: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 9105: public static void irpRtd () throws M68kException { 9106: XEiJ.mpuCycleCount += 20; 9107: int sp = XEiJ.regRn[15]; 9108: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 9109: XEiJ.regRn[15] = sp + 4 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 9110: } else { 9111: int t = XEiJ.regPC; 9112: XEiJ.regPC = t + 2; 9113: XEiJ.regRn[15] = sp + 4 + XEiJ.busRwse (t); //pcws 9114: } 9115: irpSetPC (XEiJ.busRls (sp)); //popls 9116: } //irpRtd 9117: 9118: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9119: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9120: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9121: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9122: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 9123: public static void irpRts () throws M68kException { 9124: XEiJ.mpuCycleCount += 16; 9125: int sp = XEiJ.regRn[15]; 9126: XEiJ.regRn[15] = sp + 4; 9127: irpSetPC (XEiJ.busRls (sp)); //popls 9128: } //irpRts 9129: 9130: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9131: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9132: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9133: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9134: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 9135: public static void irpTrapv () throws M68kException { 9136: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 >= 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) == 0) { //通過 9137: XEiJ.mpuCycleCount += 4; 9138: } else { 9139: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9140: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9141: throw M68kException.m6eSignal; 9142: } 9143: } //irpTrapv 9144: 9145: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9146: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9147: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9148: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9149: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 9150: public static void irpRtr () throws M68kException { 9151: XEiJ.mpuCycleCount += 20; 9152: int sp = XEiJ.regRn[15]; 9153: XEiJ.regRn[15] = sp + 6; 9154: XEiJ.regCCR = XEiJ.REG_CCR_MASK & XEiJ.busRwz (sp); //popwz 9155: irpSetPC (XEiJ.busRls (sp + 2)); //popls 9156: } //irpRtr 9157: 9158: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9159: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9160: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9161: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9162: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 9163: public static void irpMovecFromControl () throws M68kException { 9164: if (XEiJ.regSRS == 0) { //ユーザモードのとき 9165: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9166: throw M68kException.m6eSignal; 9167: } 9168: //以下はスーパーバイザモード 9169: XEiJ.mpuCycleCount += 10; 9170: int w; 9171: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 9172: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 9173: } else { 9174: w = XEiJ.regPC; 9175: XEiJ.regPC = w + 2; 9176: w = XEiJ.busRwze (w); //pcwz。拡張ワード 9177: } 9178: switch (w & 0x0fff) { 9179: case 0x000: //SFC 9180: XEiJ.regRn[w >> 12] = XEiJ.mpuSFC; 9181: break; 9182: case 0x001: //DFC 9183: XEiJ.regRn[w >> 12] = XEiJ.mpuDFC; 9184: break; 9185: case 0x002: //CACR 9186: XEiJ.regRn[w >> 12] = XEiJ.mpuCACR; 9187: break; 9188: case 0x800: //USP 9189: XEiJ.regRn[w >> 12] = XEiJ.mpuUSP; 9190: break; 9191: case 0x801: //VBR 9192: XEiJ.regRn[w >> 12] = XEiJ.mpuVBR; 9193: break; 9194: case 0x802: //CAAR 9195: XEiJ.regRn[w >> 12] = XEiJ.mpuCAAR; 9196: break; 9197: case 0x803: //MSP 9198: XEiJ.regRn[w >> 12] = XEiJ.regSRM != 0 ? XEiJ.regRn[15] : XEiJ.mpuMSP; 9199: break; 9200: case 0x804: //ISP 9201: XEiJ.regRn[w >> 12] = XEiJ.regSRM != 0 ? XEiJ.mpuISP : XEiJ.regRn[15]; 9202: break; 9203: default: 9204: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 9205: throw M68kException.m6eSignal; 9206: } 9207: } //irpMovecFromControl 9208: 9209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9210: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9211: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9213: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 9214: public static void irpMovecToControl () throws M68kException { 9215: if (XEiJ.regSRS == 0) { //ユーザモードのとき 9216: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9217: throw M68kException.m6eSignal; 9218: } 9219: //以下はスーパーバイザモード 9220: XEiJ.mpuCycleCount += 12; 9221: int w; 9222: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 9223: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 9224: } else { 9225: w = XEiJ.regPC; 9226: XEiJ.regPC = w + 2; 9227: w = XEiJ.busRwze (w); //pcwz。拡張ワード 9228: } 9229: int d = XEiJ.regRn[w >> 12]; 9230: switch (w & 0x0fff) { 9231: case 0x000: //SFC 9232: XEiJ.mpuSFC = d & 0x00000007; 9233: break; 9234: case 0x001: //DFC 9235: XEiJ.mpuDFC = d & 0x00000007; 9236: break; 9237: case 0x002: //CACR 9238: XEiJ.mpuCACR = d & 0x00003f1f; 9239: { 9240: boolean cacheOn = (XEiJ.mpuCACR & 0x00000101) != 0; 9241: if (XEiJ.mpuCacheOn != cacheOn) { 9242: XEiJ.mpuCacheOn = cacheOn; 9243: XEiJ.mpuSetWait (); 9244: } 9245: } 9246: break; 9247: case 0x800: //USP 9248: XEiJ.mpuUSP = d; 9249: break; 9250: case 0x801: //VBR 9251: XEiJ.mpuVBR = d & -4; //4の倍数でないと困る 9252: break; 9253: case 0x802: //CAAR 9254: XEiJ.mpuCAAR = d; 9255: break; 9256: case 0x803: //MSP 9257: if (XEiJ.regSRM != 0) { 9258: XEiJ.regRn[15] = d; 9259: } else { 9260: XEiJ.mpuMSP = d; 9261: } 9262: break; 9263: case 0x804: //ISP 9264: if (XEiJ.regSRM != 0) { 9265: XEiJ.mpuISP = d; 9266: } else { 9267: XEiJ.regRn[15] = d; 9268: } 9269: break; 9270: default: 9271: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 9272: throw M68kException.m6eSignal; 9273: } 9274: } //irpMovecToControl 9275: 9276: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9277: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9278: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9279: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9280: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 9281: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 9282: public static void irpJsr () throws M68kException { 9283: XEiJ.mpuCycleCount += 16 - 8; 9284: int a = efaJmpJsr (XEiJ.regOC & 63); //プッシュする前に実効アドレスを計算する 9285: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 9286: irpSetPC (a); 9287: } //irpJsr 9288: 9289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9290: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9291: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9292: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9293: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 9294: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 9295: public static void irpJmp () throws M68kException { 9296: //XEiJ.mpuCycleCount += 8 - 8; 9297: irpSetPC (efaJmpJsr (XEiJ.regOC & 63)); 9298: } //irpJmp 9299: 9300: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9301: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9302: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9303: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9304: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 9305: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 9306: public static void irpAddqByte () throws M68kException { 9307: int ea = XEiJ.regOC & 63; 9308: int x; 9309: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9310: int z; 9311: if (ea < XEiJ.EA_AR) { //ADDQ.B #<data>,Dr 9312: XEiJ.mpuCycleCount += 4; 9313: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 9314: } else { //ADDQ.B #<data>,<mem> 9315: XEiJ.mpuCycleCount += 8; 9316: int a = efaMltByte (ea); 9317: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) + y)); 9318: } 9319: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9320: (~x & z) >>> 31 << 1 | 9321: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9322: } //irpAddqByte 9323: 9324: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9325: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9326: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9327: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9328: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 9329: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 9330: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 9331: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 9332: // 9333: //ADDQ.W #<data>,Ar 9334: // ソースを符号拡張してロングで加算する 9335: public static void irpAddqWord () throws M68kException { 9336: int ea = XEiJ.regOC & 63; 9337: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9338: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.W #<data>,Ar 9339: XEiJ.mpuCycleCount += 8; //MC68000 User's Manualに4と書いてあるのは8の間違い 9340: XEiJ.regRn[ea] += y; //ロングで計算する。このr[ea]はアドレスレジスタ 9341: //ccrは操作しない 9342: } else { 9343: int x; 9344: int z; 9345: if (ea < XEiJ.EA_AR) { //ADDQ.W #<data>,Dr 9346: XEiJ.mpuCycleCount += 4; 9347: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 9348: } else { //ADDQ.W #<data>,<mem> 9349: XEiJ.mpuCycleCount += 8; 9350: int a = efaMltWord (ea); 9351: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) + y)); 9352: } 9353: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9354: (~x & z) >>> 31 << 1 | 9355: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9356: } 9357: } //irpAddqWord 9358: 9359: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9360: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9361: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9362: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9363: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 9364: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 9365: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 9366: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 9367: public static void irpAddqLong () throws M68kException { 9368: int ea = XEiJ.regOC & 63; 9369: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9370: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.L #<data>,Ar 9371: XEiJ.mpuCycleCount += 8; 9372: XEiJ.regRn[ea] += y; //このr[ea]はアドレスレジスタ 9373: //ccrは操作しない 9374: } else { 9375: int x; 9376: int z; 9377: if (ea < XEiJ.EA_AR) { //ADDQ.L #<data>,Dr 9378: XEiJ.mpuCycleCount += 8; 9379: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 9380: } else { //ADDQ.L #<data>,<mem> 9381: XEiJ.mpuCycleCount += 12; 9382: int a = efaMltLong (ea); 9383: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y); 9384: } 9385: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9386: (~x & z) >>> 31 << 1 | 9387: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9388: } 9389: } //irpAddqLong 9390: 9391: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9392: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9393: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9394: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9395: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 9396: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 9397: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 9398: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 9399: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 9400: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9401: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9402: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9403: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 9404: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9405: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9406: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9407: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 9408: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9409: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9410: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9411: public static void irpSt () throws M68kException { 9412: int ea = XEiJ.regOC & 63; 9413: //DBT.W Dr,<label>よりもST.B Drを優先する 9414: if (ea < XEiJ.EA_AR) { //ST.B Dr 9415: XEiJ.mpuCycleCount += 6; 9416: XEiJ.regRn[ea] |= 0xff; 9417: } else if (ea < XEiJ.EA_MM) { //DBT.W Dr,<label> 9418: //条件が成立しているので通過 9419: XEiJ.mpuCycleCount += 12; 9420: XEiJ.regPC += 2; //オフセットを読み飛ばす 9421: if (M30_DIV_ZERO_V_FLAG) { 9422: m30DivZeroVFlag = !m30DivZeroVFlag; 9423: } 9424: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPT.W/TRAPT.L/TRAPT 9425: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9426: XEiJ.regPC += t; 9427: //条件が成立しているのでTRAPする 9428: XEiJ.mpuCycleCount += t << 1; 9429: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9430: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9431: throw M68kException.m6eSignal; 9432: } else { //ST.B <mem> 9433: XEiJ.mpuCycleCount += 8; 9434: XEiJ.busWb (efaMltByte (ea), 0xff); 9435: } 9436: } //irpSt 9437: 9438: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9439: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9440: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9441: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9442: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 9443: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 9444: public static void irpSubqByte () throws M68kException { 9445: int ea = XEiJ.regOC & 63; 9446: int x; 9447: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9448: int z; 9449: if (ea < XEiJ.EA_AR) { //SUBQ.B #<data>,Dr 9450: XEiJ.mpuCycleCount += 4; 9451: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 9452: } else { //SUBQ.B #<data>,<mem> 9453: XEiJ.mpuCycleCount += 8; 9454: int a = efaMltByte (ea); 9455: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) - y)); 9456: } 9457: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9458: (x & ~z) >>> 31 << 1 | 9459: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9460: } //irpSubqByte 9461: 9462: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9463: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9464: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9465: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9466: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 9467: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 9468: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 9469: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 9470: // 9471: //SUBQ.W #<data>,Ar 9472: // ソースを符号拡張してロングで減算する 9473: public static void irpSubqWord () throws M68kException { 9474: int ea = XEiJ.regOC & 63; 9475: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9476: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.W #<data>,Ar 9477: XEiJ.mpuCycleCount += 8; 9478: XEiJ.regRn[ea] -= y; //ロングで計算する。このr[ea]はアドレスレジスタ 9479: //ccrは操作しない 9480: } else { 9481: int x; 9482: int z; 9483: if (ea < XEiJ.EA_AR) { //SUBQ.W #<data>,Dr 9484: XEiJ.mpuCycleCount += 4; 9485: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 9486: } else { //SUBQ.W #<data>,<mem> 9487: XEiJ.mpuCycleCount += 8; 9488: int a = efaMltWord (ea); 9489: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) - y)); 9490: } 9491: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9492: (x & ~z) >>> 31 << 1 | 9493: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9494: } 9495: } //irpSubqWord 9496: 9497: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9498: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9499: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9500: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9501: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 9502: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 9503: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 9504: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 9505: public static void irpSubqLong () throws M68kException { 9506: int ea = XEiJ.regOC & 63; 9507: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9508: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.L #<data>,Ar 9509: XEiJ.mpuCycleCount += 8; 9510: XEiJ.regRn[ea] -= y; //このr[ea]はアドレスレジスタ 9511: //ccrは操作しない 9512: } else { 9513: int x; 9514: int z; 9515: if (ea < XEiJ.EA_AR) { //SUBQ.L #<data>,Dr 9516: XEiJ.mpuCycleCount += 8; 9517: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 9518: } else { //SUBQ.L #<data>,<mem> 9519: XEiJ.mpuCycleCount += 12; 9520: int a = efaMltLong (ea); 9521: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y); 9522: } 9523: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9524: (x & ~z) >>> 31 << 1 | 9525: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9526: } 9527: } //irpSubqLong 9528: 9529: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9530: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9531: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9532: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9533: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 9534: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 9535: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 9536: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9537: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9538: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 9539: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9540: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9541: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9542: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 9543: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9544: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9545: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9546: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 9547: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9548: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9549: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9550: public static void irpSf () throws M68kException { 9551: int ea = XEiJ.regOC & 63; 9552: //DBRA.W Dr,<label>よりもSF.B Drを優先する 9553: if (ea < XEiJ.EA_AR) { //SF.B Dr 9554: XEiJ.mpuCycleCount += 4; 9555: XEiJ.regRn[ea] &= ~0xff; 9556: } else if (ea < XEiJ.EA_MM) { //DBRA.W Dr,<label> 9557: //条件が成立していないのでデクリメント 9558: int rrr = XEiJ.regOC & 7; 9559: int t = XEiJ.regRn[rrr]; 9560: if ((short) t == 0) { //Drの下位16bitが0なので通過 9561: XEiJ.mpuCycleCount += 14; 9562: XEiJ.regRn[rrr] = t + 65535; 9563: XEiJ.regPC += 2; //オフセットを読み飛ばす 9564: } else { //Drの下位16bitが0でないのでジャンプ 9565: XEiJ.mpuCycleCount += 10; 9566: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9567: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9568: } 9569: if (M30_DIV_ZERO_V_FLAG) { 9570: m30DivZeroVFlag = !m30DivZeroVFlag; 9571: } 9572: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPF.W/TRAPF.L/TRAPF 9573: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9574: XEiJ.regPC += t; 9575: //条件が成立していないのでTRAPしない 9576: XEiJ.mpuCycleCount += 4 + (t << 1); 9577: } else { //SF.B <mem> 9578: XEiJ.mpuCycleCount += 8; 9579: XEiJ.busWb (efaMltByte (ea), 0x00); 9580: } 9581: } //irpSf 9582: 9583: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9584: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9585: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9586: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9587: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 9588: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 9589: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 9590: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 9591: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 9592: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9593: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9594: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9595: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 9596: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9597: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9598: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9599: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 9600: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9601: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9602: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9603: public static void irpShi () throws M68kException { 9604: int ea = XEiJ.regOC & 63; 9605: if (ea >> 3 == XEiJ.MMM_AR) { //DBHI.W Dr,<label> 9606: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { 9607: //条件が成立しているので通過 9608: XEiJ.mpuCycleCount += 12; 9609: XEiJ.regPC += 2; //オフセットを読み飛ばす 9610: } else { 9611: //条件が成立していないのでデクリメント 9612: int rrr = XEiJ.regOC & 7; 9613: int t = XEiJ.regRn[rrr]; 9614: if ((short) t == 0) { //Drの下位16bitが0なので通過 9615: XEiJ.mpuCycleCount += 14; 9616: XEiJ.regRn[rrr] = t + 65535; 9617: XEiJ.regPC += 2; //オフセットを読み飛ばす 9618: } else { //Drの下位16bitが0でないのでジャンプ 9619: XEiJ.mpuCycleCount += 10; 9620: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9621: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9622: } 9623: } 9624: if (M30_DIV_ZERO_V_FLAG) { 9625: m30DivZeroVFlag = !m30DivZeroVFlag; 9626: } 9627: } else if (ea < XEiJ.EA_AR) { //SHI.B Dr 9628: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //セット 9629: XEiJ.mpuCycleCount += 6; 9630: XEiJ.regRn[ea] |= 0xff; 9631: } else { //クリア 9632: XEiJ.mpuCycleCount += 4; 9633: XEiJ.regRn[ea] &= ~0xff; 9634: } 9635: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHI.W/TRAPHI.L/TRAPHI 9636: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9637: XEiJ.regPC += t; 9638: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { 9639: //条件が成立しているのでTRAPする 9640: XEiJ.mpuCycleCount += t << 1; 9641: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9642: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9643: throw M68kException.m6eSignal; 9644: } else { 9645: //条件が成立していないのでTRAPしない 9646: XEiJ.mpuCycleCount += 4 + (t << 1); 9647: } 9648: } else { //SHI.B <mem> 9649: XEiJ.mpuCycleCount += 8; 9650: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_HI << XEiJ.regCCR >> 31); 9651: } 9652: } //irpShi 9653: 9654: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9655: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9656: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9657: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9658: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 9659: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 9660: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 9661: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 9662: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 9663: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9664: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9665: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9666: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 9667: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9668: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9669: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9670: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 9671: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9672: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9673: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9674: public static void irpSls () throws M68kException { 9675: int ea = XEiJ.regOC & 63; 9676: if (ea >> 3 == XEiJ.MMM_AR) { //DBLS.W Dr,<label> 9677: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { 9678: //条件が成立しているので通過 9679: XEiJ.mpuCycleCount += 12; 9680: XEiJ.regPC += 2; //オフセットを読み飛ばす 9681: } else { 9682: //条件が成立していないのでデクリメント 9683: int rrr = XEiJ.regOC & 7; 9684: int t = XEiJ.regRn[rrr]; 9685: if ((short) t == 0) { //Drの下位16bitが0なので通過 9686: XEiJ.mpuCycleCount += 14; 9687: XEiJ.regRn[rrr] = t + 65535; 9688: XEiJ.regPC += 2; //オフセットを読み飛ばす 9689: } else { //Drの下位16bitが0でないのでジャンプ 9690: XEiJ.mpuCycleCount += 10; 9691: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9692: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9693: } 9694: } 9695: if (M30_DIV_ZERO_V_FLAG) { 9696: m30DivZeroVFlag = !m30DivZeroVFlag; 9697: } 9698: } else if (ea < XEiJ.EA_AR) { //SLS.B Dr 9699: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //セット 9700: XEiJ.mpuCycleCount += 6; 9701: XEiJ.regRn[ea] |= 0xff; 9702: } else { //クリア 9703: XEiJ.mpuCycleCount += 4; 9704: XEiJ.regRn[ea] &= ~0xff; 9705: } 9706: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLS.W/TRAPLS.L/TRAPLS 9707: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9708: XEiJ.regPC += t; 9709: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { 9710: //条件が成立しているのでTRAPする 9711: XEiJ.mpuCycleCount += t << 1; 9712: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9713: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9714: throw M68kException.m6eSignal; 9715: } else { 9716: //条件が成立していないのでTRAPしない 9717: XEiJ.mpuCycleCount += 4 + (t << 1); 9718: } 9719: } else { //SLS.B <mem> 9720: XEiJ.mpuCycleCount += 8; 9721: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LS << XEiJ.regCCR >> 31); 9722: } 9723: } //irpSls 9724: 9725: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9726: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9727: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9728: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9729: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 9730: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9731: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9732: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9733: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 9734: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9735: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9736: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9737: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 9738: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9739: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9740: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9741: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9742: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9743: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9744: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9745: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 9746: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9747: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9748: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9749: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9750: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9751: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9752: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9753: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 9754: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9755: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9756: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9757: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9758: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9759: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9760: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9761: public static void irpShs () throws M68kException { 9762: int ea = XEiJ.regOC & 63; 9763: if (ea >> 3 == XEiJ.MMM_AR) { //DBHS.W Dr,<label> 9764: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { 9765: //条件が成立しているので通過 9766: XEiJ.mpuCycleCount += 12; 9767: XEiJ.regPC += 2; //オフセットを読み飛ばす 9768: } else { 9769: //条件が成立していないのでデクリメント 9770: int rrr = XEiJ.regOC & 7; 9771: int t = XEiJ.regRn[rrr]; 9772: if ((short) t == 0) { //Drの下位16bitが0なので通過 9773: XEiJ.mpuCycleCount += 14; 9774: XEiJ.regRn[rrr] = t + 65535; 9775: XEiJ.regPC += 2; //オフセットを読み飛ばす 9776: } else { //Drの下位16bitが0でないのでジャンプ 9777: XEiJ.mpuCycleCount += 10; 9778: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9779: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9780: } 9781: } 9782: if (M30_DIV_ZERO_V_FLAG) { 9783: m30DivZeroVFlag = !m30DivZeroVFlag; 9784: } 9785: } else if (ea < XEiJ.EA_AR) { //SHS.B Dr 9786: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //セット 9787: XEiJ.mpuCycleCount += 6; 9788: XEiJ.regRn[ea] |= 0xff; 9789: } else { //クリア 9790: XEiJ.mpuCycleCount += 4; 9791: XEiJ.regRn[ea] &= ~0xff; 9792: } 9793: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHS.W/TRAPHS.L/TRAPHS 9794: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9795: XEiJ.regPC += t; 9796: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { 9797: //条件が成立しているのでTRAPする 9798: XEiJ.mpuCycleCount += t << 1; 9799: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9800: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9801: throw M68kException.m6eSignal; 9802: } else { 9803: //条件が成立していないのでTRAPしない 9804: XEiJ.mpuCycleCount += 4 + (t << 1); 9805: } 9806: } else { //SHS.B <mem> 9807: XEiJ.mpuCycleCount += 8; 9808: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_HS << XEiJ.regCCR >> 31); 9809: } 9810: } //irpShs 9811: 9812: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9813: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9814: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9815: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9816: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 9817: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9818: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9819: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9820: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 9821: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9822: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9823: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9824: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 9825: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9826: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9827: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9828: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9829: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9830: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9831: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9832: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 9833: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9834: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9835: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9836: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9837: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9838: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9839: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9840: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 9841: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9842: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9843: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9844: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9845: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9846: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9847: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9848: public static void irpSlo () throws M68kException { 9849: int ea = XEiJ.regOC & 63; 9850: if (ea >> 3 == XEiJ.MMM_AR) { //DBLO.W Dr,<label> 9851: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { 9852: //条件が成立しているので通過 9853: XEiJ.mpuCycleCount += 12; 9854: XEiJ.regPC += 2; //オフセットを読み飛ばす 9855: } else { 9856: //条件が成立していないのでデクリメント 9857: int rrr = XEiJ.regOC & 7; 9858: int t = XEiJ.regRn[rrr]; 9859: if ((short) t == 0) { //Drの下位16bitが0なので通過 9860: XEiJ.mpuCycleCount += 14; 9861: XEiJ.regRn[rrr] = t + 65535; 9862: XEiJ.regPC += 2; //オフセットを読み飛ばす 9863: } else { //Drの下位16bitが0でないのでジャンプ 9864: XEiJ.mpuCycleCount += 10; 9865: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9866: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9867: } 9868: } 9869: if (M30_DIV_ZERO_V_FLAG) { 9870: m30DivZeroVFlag = !m30DivZeroVFlag; 9871: } 9872: } else if (ea < XEiJ.EA_AR) { //SLO.B Dr 9873: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //セット 9874: XEiJ.mpuCycleCount += 6; 9875: XEiJ.regRn[ea] |= 0xff; 9876: } else { //クリア 9877: XEiJ.mpuCycleCount += 4; 9878: XEiJ.regRn[ea] &= ~0xff; 9879: } 9880: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLO.W/TRAPLO.L/TRAPLO 9881: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9882: XEiJ.regPC += t; 9883: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { 9884: //条件が成立しているのでTRAPする 9885: XEiJ.mpuCycleCount += t << 1; 9886: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9887: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9888: throw M68kException.m6eSignal; 9889: } else { 9890: //条件が成立していないのでTRAPしない 9891: XEiJ.mpuCycleCount += 4 + (t << 1); 9892: } 9893: } else { //SLO.B <mem> 9894: XEiJ.mpuCycleCount += 8; 9895: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LO << XEiJ.regCCR >> 31); 9896: } 9897: } //irpSlo 9898: 9899: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9900: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9901: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9902: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9903: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 9904: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9905: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9906: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9907: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 9908: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9909: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9910: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9911: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 9912: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9913: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9914: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9915: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9916: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9917: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9918: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9919: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 9920: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9921: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9922: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9923: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9924: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9925: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9926: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9927: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 9928: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9929: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9930: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9931: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9932: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9933: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9934: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9935: public static void irpSne () throws M68kException { 9936: int ea = XEiJ.regOC & 63; 9937: if (ea >> 3 == XEiJ.MMM_AR) { //DBNE.W Dr,<label> 9938: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { 9939: //条件が成立しているので通過 9940: XEiJ.mpuCycleCount += 12; 9941: XEiJ.regPC += 2; //オフセットを読み飛ばす 9942: } else { 9943: //条件が成立していないのでデクリメント 9944: int rrr = XEiJ.regOC & 7; 9945: int t = XEiJ.regRn[rrr]; 9946: if ((short) t == 0) { //Drの下位16bitが0なので通過 9947: XEiJ.mpuCycleCount += 14; 9948: XEiJ.regRn[rrr] = t + 65535; 9949: XEiJ.regPC += 2; //オフセットを読み飛ばす 9950: } else { //Drの下位16bitが0でないのでジャンプ 9951: XEiJ.mpuCycleCount += 10; 9952: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9953: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9954: } 9955: } 9956: if (M30_DIV_ZERO_V_FLAG) { 9957: m30DivZeroVFlag = !m30DivZeroVFlag; 9958: } 9959: } else if (ea < XEiJ.EA_AR) { //SNE.B Dr 9960: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //セット 9961: XEiJ.mpuCycleCount += 6; 9962: XEiJ.regRn[ea] |= 0xff; 9963: } else { //クリア 9964: XEiJ.mpuCycleCount += 4; 9965: XEiJ.regRn[ea] &= ~0xff; 9966: } 9967: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPNE.W/TRAPNE.L/TRAPNE 9968: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9969: XEiJ.regPC += t; 9970: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { 9971: //条件が成立しているのでTRAPする 9972: XEiJ.mpuCycleCount += t << 1; 9973: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9974: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9975: throw M68kException.m6eSignal; 9976: } else { 9977: //条件が成立していないのでTRAPしない 9978: XEiJ.mpuCycleCount += 4 + (t << 1); 9979: } 9980: } else { //SNE.B <mem> 9981: XEiJ.mpuCycleCount += 8; 9982: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_NE << XEiJ.regCCR >> 31); 9983: } 9984: } //irpSne 9985: 9986: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9987: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9988: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9989: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9990: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 9991: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9992: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9993: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9994: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 9995: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9996: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9997: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9998: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 9999: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10000: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10001: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10002: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10003: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10004: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10005: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10006: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 10007: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10008: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10009: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10010: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10011: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10012: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10013: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10014: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 10015: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10016: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10017: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10018: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10019: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10020: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10021: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10022: public static void irpSeq () throws M68kException { 10023: int ea = XEiJ.regOC & 63; 10024: if (ea >> 3 == XEiJ.MMM_AR) { //DBEQ.W Dr,<label> 10025: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { 10026: //条件が成立しているので通過 10027: XEiJ.mpuCycleCount += 12; 10028: XEiJ.regPC += 2; //オフセットを読み飛ばす 10029: } else { 10030: //条件が成立していないのでデクリメント 10031: int rrr = XEiJ.regOC & 7; 10032: int t = XEiJ.regRn[rrr]; 10033: if ((short) t == 0) { //Drの下位16bitが0なので通過 10034: XEiJ.mpuCycleCount += 14; 10035: XEiJ.regRn[rrr] = t + 65535; 10036: XEiJ.regPC += 2; //オフセットを読み飛ばす 10037: } else { //Drの下位16bitが0でないのでジャンプ 10038: XEiJ.mpuCycleCount += 10; 10039: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10040: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10041: } 10042: } 10043: if (M30_DIV_ZERO_V_FLAG) { 10044: m30DivZeroVFlag = !m30DivZeroVFlag; 10045: } 10046: } else if (ea < XEiJ.EA_AR) { //SEQ.B Dr 10047: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //セット 10048: XEiJ.mpuCycleCount += 6; 10049: XEiJ.regRn[ea] |= 0xff; 10050: } else { //クリア 10051: XEiJ.mpuCycleCount += 4; 10052: XEiJ.regRn[ea] &= ~0xff; 10053: } 10054: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPEQ.W/TRAPEQ.L/TRAPEQ 10055: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10056: XEiJ.regPC += t; 10057: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { 10058: //条件が成立しているのでTRAPする 10059: XEiJ.mpuCycleCount += t << 1; 10060: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10061: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10062: throw M68kException.m6eSignal; 10063: } else { 10064: //条件が成立していないのでTRAPしない 10065: XEiJ.mpuCycleCount += 4 + (t << 1); 10066: } 10067: } else { //SEQ.B <mem> 10068: XEiJ.mpuCycleCount += 8; 10069: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_EQ << XEiJ.regCCR >> 31); 10070: } 10071: } //irpSeq 10072: 10073: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10074: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10075: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10076: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10077: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 10078: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 10079: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 10080: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 10081: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 10082: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 10083: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 10084: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 10085: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 10086: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 10087: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 10088: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 10089: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 10090: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 10091: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 10092: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 10093: public static void irpSvc () throws M68kException { 10094: int ea = XEiJ.regOC & 63; 10095: if (ea >> 3 == XEiJ.MMM_AR) { //DBVC.W Dr,<label> 10096: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { 10097: //条件が成立しているので通過 10098: XEiJ.mpuCycleCount += 12; 10099: XEiJ.regPC += 2; //オフセットを読み飛ばす 10100: } else { 10101: //条件が成立していないのでデクリメント 10102: int rrr = XEiJ.regOC & 7; 10103: int t = XEiJ.regRn[rrr]; 10104: if ((short) t == 0) { //Drの下位16bitが0なので通過 10105: XEiJ.mpuCycleCount += 14; 10106: XEiJ.regRn[rrr] = t + 65535; 10107: XEiJ.regPC += 2; //オフセットを読み飛ばす 10108: } else { //Drの下位16bitが0でないのでジャンプ 10109: XEiJ.mpuCycleCount += 10; 10110: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10111: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10112: } 10113: } 10114: if (M30_DIV_ZERO_V_FLAG) { 10115: m30DivZeroVFlag = !m30DivZeroVFlag; 10116: } 10117: } else if (ea < XEiJ.EA_AR) { //SVC.B Dr 10118: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //セット 10119: XEiJ.mpuCycleCount += 6; 10120: XEiJ.regRn[ea] |= 0xff; 10121: } else { //クリア 10122: XEiJ.mpuCycleCount += 4; 10123: XEiJ.regRn[ea] &= ~0xff; 10124: } 10125: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVC.W/TRAPVC.L/TRAPVC 10126: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10127: XEiJ.regPC += t; 10128: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { 10129: //条件が成立しているのでTRAPする 10130: XEiJ.mpuCycleCount += t << 1; 10131: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10132: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10133: throw M68kException.m6eSignal; 10134: } else { 10135: //条件が成立していないのでTRAPしない 10136: XEiJ.mpuCycleCount += 4 + (t << 1); 10137: } 10138: } else { //SVC.B <mem> 10139: XEiJ.mpuCycleCount += 8; 10140: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_VC << XEiJ.regCCR >> 31); 10141: } 10142: } //irpSvc 10143: 10144: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10145: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10146: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10147: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10148: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 10149: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 10150: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 10151: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 10152: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 10153: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10154: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10155: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10156: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 10157: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10158: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10159: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10160: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 10161: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10162: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10163: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10164: public static void irpSvs () throws M68kException { 10165: int ea = XEiJ.regOC & 63; 10166: if (ea >> 3 == XEiJ.MMM_AR) { //DBVS.W Dr,<label> 10167: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { 10168: //条件が成立しているので通過 10169: XEiJ.mpuCycleCount += 12; 10170: XEiJ.regPC += 2; //オフセットを読み飛ばす 10171: } else { 10172: //条件が成立していないのでデクリメント 10173: int rrr = XEiJ.regOC & 7; 10174: int t = XEiJ.regRn[rrr]; 10175: if ((short) t == 0) { //Drの下位16bitが0なので通過 10176: XEiJ.mpuCycleCount += 14; 10177: XEiJ.regRn[rrr] = t + 65535; 10178: XEiJ.regPC += 2; //オフセットを読み飛ばす 10179: } else { //Drの下位16bitが0でないのでジャンプ 10180: XEiJ.mpuCycleCount += 10; 10181: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10182: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10183: } 10184: } 10185: if (M30_DIV_ZERO_V_FLAG) { 10186: m30DivZeroVFlag = !m30DivZeroVFlag; 10187: } 10188: } else if (ea < XEiJ.EA_AR) { //SVS.B Dr 10189: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //セット 10190: XEiJ.mpuCycleCount += 6; 10191: XEiJ.regRn[ea] |= 0xff; 10192: } else { //クリア 10193: XEiJ.mpuCycleCount += 4; 10194: XEiJ.regRn[ea] &= ~0xff; 10195: } 10196: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVS.W/TRAPVS.L/TRAPVS 10197: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10198: XEiJ.regPC += t; 10199: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { 10200: //条件が成立しているのでTRAPする 10201: XEiJ.mpuCycleCount += t << 1; 10202: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10203: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10204: throw M68kException.m6eSignal; 10205: } else { 10206: //条件が成立していないのでTRAPしない 10207: XEiJ.mpuCycleCount += 4 + (t << 1); 10208: } 10209: } else { //SVS.B <mem> 10210: XEiJ.mpuCycleCount += 8; 10211: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_VS << XEiJ.regCCR >> 31); 10212: } 10213: } //irpSvs 10214: 10215: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10216: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10217: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10218: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10219: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 10220: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 10221: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 10222: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 10223: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 10224: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10225: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10226: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10227: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 10228: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10229: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10230: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10231: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 10232: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10233: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10234: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10235: public static void irpSpl () throws M68kException { 10236: int ea = XEiJ.regOC & 63; 10237: if (ea >> 3 == XEiJ.MMM_AR) { //DBPL.W Dr,<label> 10238: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { 10239: //条件が成立しているので通過 10240: XEiJ.mpuCycleCount += 12; 10241: XEiJ.regPC += 2; //オフセットを読み飛ばす 10242: } else { 10243: //条件が成立していないのでデクリメント 10244: int rrr = XEiJ.regOC & 7; 10245: int t = XEiJ.regRn[rrr]; 10246: if ((short) t == 0) { //Drの下位16bitが0なので通過 10247: XEiJ.mpuCycleCount += 14; 10248: XEiJ.regRn[rrr] = t + 65535; 10249: XEiJ.regPC += 2; //オフセットを読み飛ばす 10250: } else { //Drの下位16bitが0でないのでジャンプ 10251: XEiJ.mpuCycleCount += 10; 10252: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10253: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10254: } 10255: } 10256: if (M30_DIV_ZERO_V_FLAG) { 10257: m30DivZeroVFlag = !m30DivZeroVFlag; 10258: } 10259: } else if (ea < XEiJ.EA_AR) { //SPL.B Dr 10260: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //セット 10261: XEiJ.mpuCycleCount += 6; 10262: XEiJ.regRn[ea] |= 0xff; 10263: } else { //クリア 10264: XEiJ.mpuCycleCount += 4; 10265: XEiJ.regRn[ea] &= ~0xff; 10266: } 10267: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPPL.W/TRAPPL.L/TRAPPL 10268: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10269: XEiJ.regPC += t; 10270: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { 10271: //条件が成立しているのでTRAPする 10272: XEiJ.mpuCycleCount += t << 1; 10273: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10274: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10275: throw M68kException.m6eSignal; 10276: } else { 10277: //条件が成立していないのでTRAPしない 10278: XEiJ.mpuCycleCount += 4 + (t << 1); 10279: } 10280: } else { //SPL.B <mem> 10281: XEiJ.mpuCycleCount += 8; 10282: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_PL << XEiJ.regCCR >> 31); 10283: } 10284: } //irpSpl 10285: 10286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10287: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10288: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10290: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 10291: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 10292: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 10293: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 10294: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 10295: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10296: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10297: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10298: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 10299: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10300: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10301: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10302: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 10303: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10304: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10305: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10306: public static void irpSmi () throws M68kException { 10307: int ea = XEiJ.regOC & 63; 10308: if (ea >> 3 == XEiJ.MMM_AR) { //DBMI.W Dr,<label> 10309: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { 10310: //条件が成立しているので通過 10311: XEiJ.mpuCycleCount += 12; 10312: XEiJ.regPC += 2; //オフセットを読み飛ばす 10313: } else { 10314: //条件が成立していないのでデクリメント 10315: int rrr = XEiJ.regOC & 7; 10316: int t = XEiJ.regRn[rrr]; 10317: if ((short) t == 0) { //Drの下位16bitが0なので通過 10318: XEiJ.mpuCycleCount += 14; 10319: XEiJ.regRn[rrr] = t + 65535; 10320: XEiJ.regPC += 2; //オフセットを読み飛ばす 10321: } else { //Drの下位16bitが0でないのでジャンプ 10322: XEiJ.mpuCycleCount += 10; 10323: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10324: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10325: } 10326: } 10327: if (M30_DIV_ZERO_V_FLAG) { 10328: m30DivZeroVFlag = !m30DivZeroVFlag; 10329: } 10330: } else if (ea < XEiJ.EA_AR) { //SMI.B Dr 10331: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //セット 10332: XEiJ.mpuCycleCount += 6; 10333: XEiJ.regRn[ea] |= 0xff; 10334: } else { //クリア 10335: XEiJ.mpuCycleCount += 4; 10336: XEiJ.regRn[ea] &= ~0xff; 10337: } 10338: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPMI.W/TRAPMI.L/TRAPMI 10339: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10340: XEiJ.regPC += t; 10341: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { 10342: //条件が成立しているのでTRAPする 10343: XEiJ.mpuCycleCount += t << 1; 10344: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10345: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10346: throw M68kException.m6eSignal; 10347: } else { 10348: //条件が成立していないのでTRAPしない 10349: XEiJ.mpuCycleCount += 4 + (t << 1); 10350: } 10351: } else { //SMI.B <mem> 10352: XEiJ.mpuCycleCount += 8; 10353: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_MI << XEiJ.regCCR >> 31); 10354: } 10355: } //irpSmi 10356: 10357: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10358: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10359: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10360: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10361: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 10362: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 10363: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 10364: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 10365: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 10366: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10367: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10368: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10369: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 10370: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10371: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10372: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10373: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 10374: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10375: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10376: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10377: public static void irpSge () throws M68kException { 10378: int ea = XEiJ.regOC & 63; 10379: if (ea >> 3 == XEiJ.MMM_AR) { //DBGE.W Dr,<label> 10380: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { 10381: //条件が成立しているので通過 10382: XEiJ.mpuCycleCount += 12; 10383: XEiJ.regPC += 2; //オフセットを読み飛ばす 10384: } else { 10385: //条件が成立していないのでデクリメント 10386: int rrr = XEiJ.regOC & 7; 10387: int t = XEiJ.regRn[rrr]; 10388: if ((short) t == 0) { //Drの下位16bitが0なので通過 10389: XEiJ.mpuCycleCount += 14; 10390: XEiJ.regRn[rrr] = t + 65535; 10391: XEiJ.regPC += 2; //オフセットを読み飛ばす 10392: } else { //Drの下位16bitが0でないのでジャンプ 10393: XEiJ.mpuCycleCount += 10; 10394: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10395: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10396: } 10397: } 10398: if (M30_DIV_ZERO_V_FLAG) { 10399: m30DivZeroVFlag = !m30DivZeroVFlag; 10400: } 10401: } else if (ea < XEiJ.EA_AR) { //SGE.B Dr 10402: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //セット 10403: XEiJ.mpuCycleCount += 6; 10404: XEiJ.regRn[ea] |= 0xff; 10405: } else { //クリア 10406: XEiJ.mpuCycleCount += 4; 10407: XEiJ.regRn[ea] &= ~0xff; 10408: } 10409: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGE.W/TRAPGE.L/TRAPGE 10410: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10411: XEiJ.regPC += t; 10412: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { 10413: //条件が成立しているのでTRAPする 10414: XEiJ.mpuCycleCount += t << 1; 10415: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10416: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10417: throw M68kException.m6eSignal; 10418: } else { 10419: //条件が成立していないのでTRAPしない 10420: XEiJ.mpuCycleCount += 4 + (t << 1); 10421: } 10422: } else { //SGE.B <mem> 10423: XEiJ.mpuCycleCount += 8; 10424: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_GE << XEiJ.regCCR >> 31); 10425: } 10426: } //irpSge 10427: 10428: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10429: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10430: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10431: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10432: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 10433: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 10434: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 10435: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 10436: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 10437: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10438: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10439: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10440: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 10441: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10442: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10443: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10444: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 10445: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10446: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10447: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10448: public static void irpSlt () throws M68kException { 10449: int ea = XEiJ.regOC & 63; 10450: if (ea >> 3 == XEiJ.MMM_AR) { //DBLT.W Dr,<label> 10451: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { 10452: //条件が成立しているので通過 10453: XEiJ.mpuCycleCount += 12; 10454: XEiJ.regPC += 2; //オフセットを読み飛ばす 10455: } else { 10456: //条件が成立していないのでデクリメント 10457: int rrr = XEiJ.regOC & 7; 10458: int t = XEiJ.regRn[rrr]; 10459: if ((short) t == 0) { //Drの下位16bitが0なので通過 10460: XEiJ.mpuCycleCount += 14; 10461: XEiJ.regRn[rrr] = t + 65535; 10462: XEiJ.regPC += 2; //オフセットを読み飛ばす 10463: } else { //Drの下位16bitが0でないのでジャンプ 10464: XEiJ.mpuCycleCount += 10; 10465: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10466: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10467: } 10468: } 10469: if (M30_DIV_ZERO_V_FLAG) { 10470: m30DivZeroVFlag = !m30DivZeroVFlag; 10471: } 10472: } else if (ea < XEiJ.EA_AR) { //SLT.B Dr 10473: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //セット 10474: XEiJ.mpuCycleCount += 6; 10475: XEiJ.regRn[ea] |= 0xff; 10476: } else { //クリア 10477: XEiJ.mpuCycleCount += 4; 10478: XEiJ.regRn[ea] &= ~0xff; 10479: } 10480: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLT.W/TRAPLT.L/TRAPLT 10481: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10482: XEiJ.regPC += t; 10483: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { 10484: //条件が成立しているのでTRAPする 10485: XEiJ.mpuCycleCount += t << 1; 10486: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10487: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10488: throw M68kException.m6eSignal; 10489: } else { 10490: //条件が成立していないのでTRAPしない 10491: XEiJ.mpuCycleCount += 4 + (t << 1); 10492: } 10493: } else { //SLT.B <mem> 10494: XEiJ.mpuCycleCount += 8; 10495: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LT << XEiJ.regCCR >> 31); 10496: } 10497: } //irpSlt 10498: 10499: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10500: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10501: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10503: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 10504: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 10505: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 10506: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 10507: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 10508: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10509: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10510: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10511: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 10512: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10513: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10514: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10515: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 10516: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10517: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10518: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10519: public static void irpSgt () throws M68kException { 10520: int ea = XEiJ.regOC & 63; 10521: if (ea >> 3 == XEiJ.MMM_AR) { //DBGT.W Dr,<label> 10522: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { 10523: //条件が成立しているので通過 10524: XEiJ.mpuCycleCount += 12; 10525: XEiJ.regPC += 2; //オフセットを読み飛ばす 10526: } else { 10527: //条件が成立していないのでデクリメント 10528: int rrr = XEiJ.regOC & 7; 10529: int t = XEiJ.regRn[rrr]; 10530: if ((short) t == 0) { //Drの下位16bitが0なので通過 10531: XEiJ.mpuCycleCount += 14; 10532: XEiJ.regRn[rrr] = t + 65535; 10533: XEiJ.regPC += 2; //オフセットを読み飛ばす 10534: } else { //Drの下位16bitが0でないのでジャンプ 10535: XEiJ.mpuCycleCount += 10; 10536: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10537: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10538: } 10539: } 10540: if (M30_DIV_ZERO_V_FLAG) { 10541: m30DivZeroVFlag = !m30DivZeroVFlag; 10542: } 10543: } else if (ea < XEiJ.EA_AR) { //SGT.B Dr 10544: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //セット 10545: XEiJ.mpuCycleCount += 6; 10546: XEiJ.regRn[ea] |= 0xff; 10547: } else { //クリア 10548: XEiJ.mpuCycleCount += 4; 10549: XEiJ.regRn[ea] &= ~0xff; 10550: } 10551: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGT.W/TRAPGT.L/TRAPGT 10552: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10553: XEiJ.regPC += t; 10554: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { 10555: //条件が成立しているのでTRAPする 10556: XEiJ.mpuCycleCount += t << 1; 10557: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10558: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10559: throw M68kException.m6eSignal; 10560: } else { 10561: //条件が成立していないのでTRAPしない 10562: XEiJ.mpuCycleCount += 4 + (t << 1); 10563: } 10564: } else { //SGT.B <mem> 10565: XEiJ.mpuCycleCount += 8; 10566: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_GT << XEiJ.regCCR >> 31); 10567: } 10568: } //irpSgt 10569: 10570: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10571: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10572: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10573: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10574: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 10575: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 10576: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 10577: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 10578: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 10579: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10580: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10581: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10582: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 10583: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10584: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10585: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10586: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 10587: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10588: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10589: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10590: public static void irpSle () throws M68kException { 10591: int ea = XEiJ.regOC & 63; 10592: if (ea >> 3 == XEiJ.MMM_AR) { //DBLE.W Dr,<label> 10593: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { 10594: //条件が成立しているので通過 10595: XEiJ.mpuCycleCount += 12; 10596: XEiJ.regPC += 2; //オフセットを読み飛ばす 10597: } else { 10598: //条件が成立していないのでデクリメント 10599: int rrr = XEiJ.regOC & 7; 10600: int t = XEiJ.regRn[rrr]; 10601: if ((short) t == 0) { //Drの下位16bitが0なので通過 10602: XEiJ.mpuCycleCount += 14; 10603: XEiJ.regRn[rrr] = t + 65535; 10604: XEiJ.regPC += 2; //オフセットを読み飛ばす 10605: } else { //Drの下位16bitが0でないのでジャンプ 10606: XEiJ.mpuCycleCount += 10; 10607: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10608: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10609: } 10610: } 10611: if (M30_DIV_ZERO_V_FLAG) { 10612: m30DivZeroVFlag = !m30DivZeroVFlag; 10613: } 10614: } else if (ea < XEiJ.EA_AR) { //SLE.B Dr 10615: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //セット 10616: XEiJ.mpuCycleCount += 6; 10617: XEiJ.regRn[ea] |= 0xff; 10618: } else { //クリア 10619: XEiJ.mpuCycleCount += 4; 10620: XEiJ.regRn[ea] &= ~0xff; 10621: } 10622: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLE.W/TRAPLE.L/TRAPLE 10623: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10624: XEiJ.regPC += t; 10625: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { 10626: //条件が成立しているのでTRAPする 10627: XEiJ.mpuCycleCount += t << 1; 10628: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10629: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10630: throw M68kException.m6eSignal; 10631: } else { 10632: //条件が成立していないのでTRAPしない 10633: XEiJ.mpuCycleCount += 4 + (t << 1); 10634: } 10635: } else { //SLE.B <mem> 10636: XEiJ.mpuCycleCount += 8; 10637: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LE << XEiJ.regCCR >> 31); 10638: } 10639: } //irpSle 10640: 10641: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10642: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10643: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10644: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10645: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 10646: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 10647: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 10648: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 10649: public static void irpBrasw () throws M68kException { 10650: XEiJ.mpuCycleCount += 10; 10651: int t = XEiJ.regPC; //pc0+2 10652: int s = (byte) XEiJ.regOC; //オフセット 10653: if (s == 0) { //BRA.W 10654: XEiJ.regPC = t + 2; 10655: s = XEiJ.busRwse (t); //pcws 10656: } 10657: irpSetPC (t + s); //pc0+2+オフセット 10658: } //irpBrasw 10659: 10660: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10661: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10662: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10663: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10664: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 10665: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 10666: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10667: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10668: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10669: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10670: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 10671: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 10672: public static void irpBras () throws M68kException { 10673: XEiJ.mpuCycleCount += 10; 10674: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10675: } //irpBras 10676: 10677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10678: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10679: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10680: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10681: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 10682: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 10683: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 10684: public static void irpBrasl () throws M68kException { 10685: int t = XEiJ.regPC; //pc0+2 10686: int s = (byte) XEiJ.regOC; //オフセット 10687: if (s == -1) { //BRA.L 10688: XEiJ.mpuCycleCount += 14; 10689: XEiJ.regPC = t + 4; 10690: s = XEiJ.busRlse (t); //pcls 10691: } else { //BRA.S 10692: XEiJ.mpuCycleCount += 10; 10693: } 10694: irpSetPC (t + s); //pc0+2+オフセット 10695: } //irpBrasl 10696: 10697: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10698: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10699: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10701: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 10702: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 10703: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 10704: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 10705: public static void irpBsrsw () throws M68kException { 10706: XEiJ.mpuCycleCount += 18; 10707: int t = XEiJ.regPC; //pc0+2 10708: int s = (byte) XEiJ.regOC; //オフセット 10709: if (s == 0) { //BSR.W 10710: XEiJ.regPC = t + 2; 10711: s = XEiJ.busRwse (t); //pcws 10712: } 10713: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 10714: irpSetPC (t + s); //pc0+2+オフセット 10715: } //irpBsrsw 10716: 10717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10718: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10719: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10720: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10721: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 10722: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 10723: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10724: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10725: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10726: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10727: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 10728: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 10729: public static void irpBsrs () throws M68kException { 10730: XEiJ.mpuCycleCount += 18; 10731: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 10732: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10733: } //irpBsrs 10734: 10735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10736: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10737: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10738: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10739: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 10740: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 10741: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 10742: public static void irpBsrsl () throws M68kException { 10743: int t = XEiJ.regPC; //pc0+2 10744: int s = (byte) XEiJ.regOC; //オフセット 10745: if (s == -1) { //BSR.L 10746: XEiJ.mpuCycleCount += 22; 10747: XEiJ.regPC = t + 4; 10748: s = XEiJ.busRlse (t); //pcls 10749: } else { //BSR.S 10750: XEiJ.mpuCycleCount += 18; 10751: } 10752: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 10753: irpSetPC (t + s); //pc0+2+オフセット 10754: } //irpBsrsl 10755: 10756: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10757: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10758: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10759: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10760: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 10761: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10762: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10763: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10764: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 10765: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10766: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10767: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10768: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10769: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10770: public static void irpBhisw () throws M68kException { 10771: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //Bccでジャンプ 10772: XEiJ.mpuCycleCount += 10; 10773: int t = XEiJ.regPC; //pc0+2 10774: int s = (byte) XEiJ.regOC; //オフセット 10775: if (s == 0) { //Bcc.Wでジャンプ 10776: XEiJ.regPC = t + 2; 10777: s = XEiJ.busRwse (t); //pcws 10778: } 10779: irpSetPC (t + s); //pc0+2+オフセット 10780: } else if (XEiJ.regOC == 0x6200) { //Bcc.Wで通過 10781: XEiJ.mpuCycleCount += 12; 10782: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 10783: } else { //Bcc.Sで通過 10784: XEiJ.mpuCycleCount += 8; 10785: } 10786: } //irpBhisw 10787: 10788: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10789: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10790: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10791: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10792: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 10793: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10794: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10795: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10796: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10797: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10798: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10799: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10800: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 10801: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10802: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10803: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10804: public static void irpBhis () throws M68kException { 10805: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //Bccでジャンプ 10806: XEiJ.mpuCycleCount += 10; 10807: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10808: } else { //Bcc.Sで通過 10809: XEiJ.mpuCycleCount += 8; 10810: } 10811: } //irpBhis 10812: 10813: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10814: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10815: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10816: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10817: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 10818: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10819: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10820: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10821: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 10822: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 10823: public static void irpBhisl () throws M68kException { 10824: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //Bccでジャンプ 10825: int t = XEiJ.regPC; //pc0+2 10826: int s = (byte) XEiJ.regOC; //オフセット 10827: if (s == -1) { //Bcc.Lでジャンプ 10828: XEiJ.mpuCycleCount += 14; 10829: XEiJ.regPC = t + 4; 10830: s = XEiJ.busRlse (t); //pcls 10831: } else { //Bcc.Sでジャンプ 10832: XEiJ.mpuCycleCount += 10; 10833: } 10834: irpSetPC (t + s); //pc0+2+オフセット 10835: } else if (XEiJ.regOC == 0x62ff) { //Bcc.Lで通過 10836: XEiJ.mpuCycleCount += 12; 10837: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 10838: } else { //Bcc.Sで通過 10839: XEiJ.mpuCycleCount += 8; 10840: } 10841: } //irpBhisl 10842: 10843: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10844: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10845: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10846: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10847: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 10848: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10849: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10850: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10851: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 10852: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10853: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10854: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10855: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10856: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10857: public static void irpBlssw () throws M68kException { 10858: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //Bccでジャンプ 10859: XEiJ.mpuCycleCount += 10; 10860: int t = XEiJ.regPC; //pc0+2 10861: int s = (byte) XEiJ.regOC; //オフセット 10862: if (s == 0) { //Bcc.Wでジャンプ 10863: XEiJ.regPC = t + 2; 10864: s = XEiJ.busRwse (t); //pcws 10865: } 10866: irpSetPC (t + s); //pc0+2+オフセット 10867: } else if (XEiJ.regOC == 0x6300) { //Bcc.Wで通過 10868: XEiJ.mpuCycleCount += 12; 10869: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 10870: } else { //Bcc.Sで通過 10871: XEiJ.mpuCycleCount += 8; 10872: } 10873: } //irpBlssw 10874: 10875: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10876: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10877: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10878: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10879: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 10880: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10881: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10882: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10883: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10884: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10885: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10886: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10887: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 10888: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10889: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10890: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10891: public static void irpBlss () throws M68kException { 10892: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //Bccでジャンプ 10893: XEiJ.mpuCycleCount += 10; 10894: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10895: } else { //Bcc.Sで通過 10896: XEiJ.mpuCycleCount += 8; 10897: } 10898: } //irpBlss 10899: 10900: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10901: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10902: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10903: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10904: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 10905: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10906: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10907: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10908: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 10909: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 10910: public static void irpBlssl () throws M68kException { 10911: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //Bccでジャンプ 10912: int t = XEiJ.regPC; //pc0+2 10913: int s = (byte) XEiJ.regOC; //オフセット 10914: if (s == -1) { //Bcc.Lでジャンプ 10915: XEiJ.mpuCycleCount += 14; 10916: XEiJ.regPC = t + 4; 10917: s = XEiJ.busRlse (t); //pcls 10918: } else { //Bcc.Sでジャンプ 10919: XEiJ.mpuCycleCount += 10; 10920: } 10921: irpSetPC (t + s); //pc0+2+オフセット 10922: } else if (XEiJ.regOC == 0x63ff) { //Bcc.Lで通過 10923: XEiJ.mpuCycleCount += 12; 10924: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 10925: } else { //Bcc.Sで通過 10926: XEiJ.mpuCycleCount += 8; 10927: } 10928: } //irpBlssl 10929: 10930: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10931: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10932: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10933: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10934: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 10935: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10936: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10937: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10938: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10939: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10940: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10941: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10942: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 10943: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10944: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10945: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10946: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10947: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10948: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10949: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10950: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10951: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10952: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10953: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10954: public static void irpBhssw () throws M68kException { 10955: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //Bccでジャンプ 10956: XEiJ.mpuCycleCount += 10; 10957: int t = XEiJ.regPC; //pc0+2 10958: int s = (byte) XEiJ.regOC; //オフセット 10959: if (s == 0) { //Bcc.Wでジャンプ 10960: XEiJ.regPC = t + 2; 10961: s = XEiJ.busRwse (t); //pcws 10962: } 10963: irpSetPC (t + s); //pc0+2+オフセット 10964: } else if (XEiJ.regOC == 0x6400) { //Bcc.Wで通過 10965: XEiJ.mpuCycleCount += 12; 10966: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 10967: } else { //Bcc.Sで通過 10968: XEiJ.mpuCycleCount += 8; 10969: } 10970: } //irpBhssw 10971: 10972: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10973: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10974: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10975: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10976: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 10977: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10978: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10979: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10980: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10981: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10982: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10983: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10984: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10985: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10986: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10987: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10988: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 10989: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10990: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10991: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10992: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10993: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10994: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10995: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10996: public static void irpBhss () throws M68kException { 10997: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //Bccでジャンプ 10998: XEiJ.mpuCycleCount += 10; 10999: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11000: } else { //Bcc.Sで通過 11001: XEiJ.mpuCycleCount += 8; 11002: } 11003: } //irpBhss 11004: 11005: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11006: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11007: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11009: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 11010: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11011: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11012: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11013: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11014: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11015: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11016: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11017: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 11018: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 11019: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 11020: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 11021: public static void irpBhssl () throws M68kException { 11022: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //Bccでジャンプ 11023: int t = XEiJ.regPC; //pc0+2 11024: int s = (byte) XEiJ.regOC; //オフセット 11025: if (s == -1) { //Bcc.Lでジャンプ 11026: XEiJ.mpuCycleCount += 14; 11027: XEiJ.regPC = t + 4; 11028: s = XEiJ.busRlse (t); //pcls 11029: } else { //Bcc.Sでジャンプ 11030: XEiJ.mpuCycleCount += 10; 11031: } 11032: irpSetPC (t + s); //pc0+2+オフセット 11033: } else if (XEiJ.regOC == 0x64ff) { //Bcc.Lで通過 11034: XEiJ.mpuCycleCount += 12; 11035: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11036: } else { //Bcc.Sで通過 11037: XEiJ.mpuCycleCount += 8; 11038: } 11039: } //irpBhssl 11040: 11041: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11042: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11043: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11044: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11045: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 11046: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11047: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11048: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11049: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11050: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11051: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11052: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11053: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 11054: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11055: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11056: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11057: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11058: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11059: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11060: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11061: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 11062: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 11063: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 11064: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 11065: public static void irpBlosw () throws M68kException { 11066: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //Bccでジャンプ 11067: XEiJ.mpuCycleCount += 10; 11068: int t = XEiJ.regPC; //pc0+2 11069: int s = (byte) XEiJ.regOC; //オフセット 11070: if (s == 0) { //Bcc.Wでジャンプ 11071: XEiJ.regPC = t + 2; 11072: s = XEiJ.busRwse (t); //pcws 11073: } 11074: irpSetPC (t + s); //pc0+2+オフセット 11075: } else if (XEiJ.regOC == 0x6500) { //Bcc.Wで通過 11076: XEiJ.mpuCycleCount += 12; 11077: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11078: } else { //Bcc.Sで通過 11079: XEiJ.mpuCycleCount += 8; 11080: } 11081: } //irpBlosw 11082: 11083: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11084: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11085: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11086: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11087: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 11088: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11089: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11090: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11091: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11092: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11093: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11094: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11095: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11096: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11097: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11098: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11099: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 11100: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11101: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11102: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11103: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11104: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11105: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11106: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11107: public static void irpBlos () throws M68kException { 11108: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //Bccでジャンプ 11109: XEiJ.mpuCycleCount += 10; 11110: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11111: } else { //Bcc.Sで通過 11112: XEiJ.mpuCycleCount += 8; 11113: } 11114: } //irpBlos 11115: 11116: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11117: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11118: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11119: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11120: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 11121: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11122: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11123: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11124: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11125: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11126: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11127: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11128: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 11129: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11130: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11131: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11132: public static void irpBlosl () throws M68kException { 11133: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //Bccでジャンプ 11134: int t = XEiJ.regPC; //pc0+2 11135: int s = (byte) XEiJ.regOC; //オフセット 11136: if (s == -1) { //Bcc.Lでジャンプ 11137: XEiJ.mpuCycleCount += 14; 11138: XEiJ.regPC = t + 4; 11139: s = XEiJ.busRlse (t); //pcls 11140: } else { //Bcc.Sでジャンプ 11141: XEiJ.mpuCycleCount += 10; 11142: } 11143: irpSetPC (t + s); //pc0+2+オフセット 11144: } else if (XEiJ.regOC == 0x65ff) { //Bcc.Lで通過 11145: XEiJ.mpuCycleCount += 12; 11146: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11147: } else { //Bcc.Sで通過 11148: XEiJ.mpuCycleCount += 8; 11149: } 11150: } //irpBlosl 11151: 11152: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11153: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11154: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11155: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11156: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 11157: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11158: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11159: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11160: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11161: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11162: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11163: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11164: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 11165: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11166: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11167: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11168: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11169: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11170: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11171: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11172: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11173: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11174: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11175: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11176: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11177: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11178: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11179: public static void irpBnesw () throws M68kException { 11180: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //Bccでジャンプ 11181: XEiJ.mpuCycleCount += 10; 11182: int t = XEiJ.regPC; //pc0+2 11183: int s = (byte) XEiJ.regOC; //オフセット 11184: if (s == 0) { //Bcc.Wでジャンプ 11185: XEiJ.regPC = t + 2; 11186: s = XEiJ.busRwse (t); //pcws 11187: } 11188: irpSetPC (t + s); //pc0+2+オフセット 11189: } else if (XEiJ.regOC == 0x6600) { //Bcc.Wで通過 11190: XEiJ.mpuCycleCount += 12; 11191: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11192: } else { //Bcc.Sで通過 11193: XEiJ.mpuCycleCount += 8; 11194: } 11195: } //irpBnesw 11196: 11197: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11198: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11199: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11200: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11201: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 11202: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11203: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11204: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11205: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11206: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11207: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11208: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11210: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11211: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11213: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 11214: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11215: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11216: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11217: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11218: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11219: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11220: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11221: public static void irpBnes () throws M68kException { 11222: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //Bccでジャンプ 11223: XEiJ.mpuCycleCount += 10; 11224: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11225: } else { //Bcc.Sで通過 11226: XEiJ.mpuCycleCount += 8; 11227: } 11228: } //irpBnes 11229: 11230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11231: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11232: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11233: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11234: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 11235: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11236: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11237: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11238: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11239: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11240: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11241: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11242: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 11243: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11244: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11245: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11246: public static void irpBnesl () throws M68kException { 11247: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //Bccでジャンプ 11248: int t = XEiJ.regPC; //pc0+2 11249: int s = (byte) XEiJ.regOC; //オフセット 11250: if (s == -1) { //Bcc.Lでジャンプ 11251: XEiJ.mpuCycleCount += 14; 11252: XEiJ.regPC = t + 4; 11253: s = XEiJ.busRlse (t); //pcls 11254: } else { //Bcc.Sでジャンプ 11255: XEiJ.mpuCycleCount += 10; 11256: } 11257: irpSetPC (t + s); //pc0+2+オフセット 11258: } else if (XEiJ.regOC == 0x66ff) { //Bcc.Lで通過 11259: XEiJ.mpuCycleCount += 12; 11260: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11261: } else { //Bcc.Sで通過 11262: XEiJ.mpuCycleCount += 8; 11263: } 11264: } //irpBnesl 11265: 11266: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11267: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11268: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11269: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11270: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 11271: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11272: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11273: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11274: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11275: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11276: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11277: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11278: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 11279: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11280: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11281: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11282: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11283: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11284: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11285: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11286: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 11287: public static void irpBeqsw () throws M68kException { 11288: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //Bccでジャンプ 11289: XEiJ.mpuCycleCount += 10; 11290: int t = XEiJ.regPC; //pc0+2 11291: int s = (byte) XEiJ.regOC; //オフセット 11292: if (s == 0) { //Bcc.Wでジャンプ 11293: XEiJ.regPC = t + 2; 11294: s = XEiJ.busRwse (t); //pcws 11295: } 11296: irpSetPC (t + s); //pc0+2+オフセット 11297: } else if (XEiJ.regOC == 0x6700) { //Bcc.Wで通過 11298: XEiJ.mpuCycleCount += 12; 11299: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11300: } else { //Bcc.Sで通過 11301: XEiJ.mpuCycleCount += 8; 11302: } 11303: } //irpBeqsw 11304: 11305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11306: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11307: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11309: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 11310: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11311: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11312: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11313: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11314: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11315: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11316: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11317: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11318: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11319: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11320: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11321: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 11322: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11323: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11324: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11325: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11326: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11327: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11328: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11329: public static void irpBeqs () throws M68kException { 11330: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //Bccでジャンプ 11331: XEiJ.mpuCycleCount += 10; 11332: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11333: } else { //Bcc.Sで通過 11334: XEiJ.mpuCycleCount += 8; 11335: } 11336: } //irpBeqs 11337: 11338: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11339: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11340: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11342: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 11343: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11344: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11345: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11346: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11347: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11348: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11349: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11350: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 11351: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11352: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11353: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11354: public static void irpBeqsl () throws M68kException { 11355: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //Bccでジャンプ 11356: int t = XEiJ.regPC; //pc0+2 11357: int s = (byte) XEiJ.regOC; //オフセット 11358: if (s == -1) { //Bcc.Lでジャンプ 11359: XEiJ.mpuCycleCount += 14; 11360: XEiJ.regPC = t + 4; 11361: s = XEiJ.busRlse (t); //pcls 11362: } else { //Bcc.Sでジャンプ 11363: XEiJ.mpuCycleCount += 10; 11364: } 11365: irpSetPC (t + s); //pc0+2+オフセット 11366: } else if (XEiJ.regOC == 0x67ff) { //Bcc.Lで通過 11367: XEiJ.mpuCycleCount += 12; 11368: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11369: } else { //Bcc.Sで通過 11370: XEiJ.mpuCycleCount += 8; 11371: } 11372: } //irpBeqsl 11373: 11374: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11375: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11376: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11378: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 11379: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11380: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11381: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11382: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 11383: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11384: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11385: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11386: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11387: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11388: public static void irpBvcsw () throws M68kException { 11389: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //Bccでジャンプ 11390: XEiJ.mpuCycleCount += 10; 11391: int t = XEiJ.regPC; //pc0+2 11392: int s = (byte) XEiJ.regOC; //オフセット 11393: if (s == 0) { //Bcc.Wでジャンプ 11394: XEiJ.regPC = t + 2; 11395: s = XEiJ.busRwse (t); //pcws 11396: } 11397: irpSetPC (t + s); //pc0+2+オフセット 11398: } else if (XEiJ.regOC == 0x6800) { //Bcc.Wで通過 11399: XEiJ.mpuCycleCount += 12; 11400: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11401: } else { //Bcc.Sで通過 11402: XEiJ.mpuCycleCount += 8; 11403: } 11404: } //irpBvcsw 11405: 11406: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11407: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11408: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11409: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11410: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 11411: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11412: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11413: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11414: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11415: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11416: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11417: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11418: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 11419: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11420: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11421: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11422: public static void irpBvcs () throws M68kException { 11423: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //Bccでジャンプ 11424: XEiJ.mpuCycleCount += 10; 11425: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11426: } else { //Bcc.Sで通過 11427: XEiJ.mpuCycleCount += 8; 11428: } 11429: } //irpBvcs 11430: 11431: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11432: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11433: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11434: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11435: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 11436: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11437: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11438: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11439: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 11440: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 11441: public static void irpBvcsl () throws M68kException { 11442: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //Bccでジャンプ 11443: int t = XEiJ.regPC; //pc0+2 11444: int s = (byte) XEiJ.regOC; //オフセット 11445: if (s == -1) { //Bcc.Lでジャンプ 11446: XEiJ.mpuCycleCount += 14; 11447: XEiJ.regPC = t + 4; 11448: s = XEiJ.busRlse (t); //pcls 11449: } else { //Bcc.Sでジャンプ 11450: XEiJ.mpuCycleCount += 10; 11451: } 11452: irpSetPC (t + s); //pc0+2+オフセット 11453: } else if (XEiJ.regOC == 0x68ff) { //Bcc.Lで通過 11454: XEiJ.mpuCycleCount += 12; 11455: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11456: } else { //Bcc.Sで通過 11457: XEiJ.mpuCycleCount += 8; 11458: } 11459: } //irpBvcsl 11460: 11461: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11462: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11463: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11464: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11465: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 11466: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11467: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11468: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11469: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 11470: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11471: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11472: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11473: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11474: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11475: public static void irpBvssw () throws M68kException { 11476: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //Bccでジャンプ 11477: XEiJ.mpuCycleCount += 10; 11478: int t = XEiJ.regPC; //pc0+2 11479: int s = (byte) XEiJ.regOC; //オフセット 11480: if (s == 0) { //Bcc.Wでジャンプ 11481: XEiJ.regPC = t + 2; 11482: s = XEiJ.busRwse (t); //pcws 11483: } 11484: irpSetPC (t + s); //pc0+2+オフセット 11485: } else if (XEiJ.regOC == 0x6900) { //Bcc.Wで通過 11486: XEiJ.mpuCycleCount += 12; 11487: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11488: } else { //Bcc.Sで通過 11489: XEiJ.mpuCycleCount += 8; 11490: } 11491: } //irpBvssw 11492: 11493: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11494: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11495: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11496: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11497: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 11498: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11499: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11500: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11501: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11502: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11503: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11504: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11505: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 11506: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11507: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11508: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11509: public static void irpBvss () throws M68kException { 11510: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //Bccでジャンプ 11511: XEiJ.mpuCycleCount += 10; 11512: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11513: } else { //Bcc.Sで通過 11514: XEiJ.mpuCycleCount += 8; 11515: } 11516: } //irpBvss 11517: 11518: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11519: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11520: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11521: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11522: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 11523: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11524: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11525: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11526: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 11527: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 11528: public static void irpBvssl () throws M68kException { 11529: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //Bccでジャンプ 11530: int t = XEiJ.regPC; //pc0+2 11531: int s = (byte) XEiJ.regOC; //オフセット 11532: if (s == -1) { //Bcc.Lでジャンプ 11533: XEiJ.mpuCycleCount += 14; 11534: XEiJ.regPC = t + 4; 11535: s = XEiJ.busRlse (t); //pcls 11536: } else { //Bcc.Sでジャンプ 11537: XEiJ.mpuCycleCount += 10; 11538: } 11539: irpSetPC (t + s); //pc0+2+オフセット 11540: } else if (XEiJ.regOC == 0x69ff) { //Bcc.Lで通過 11541: XEiJ.mpuCycleCount += 12; 11542: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11543: } else { //Bcc.Sで通過 11544: XEiJ.mpuCycleCount += 8; 11545: } 11546: } //irpBvssl 11547: 11548: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11549: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11550: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11552: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 11553: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11554: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11555: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11556: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 11557: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11558: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11559: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11560: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11561: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11562: public static void irpBplsw () throws M68kException { 11563: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //Bccでジャンプ 11564: XEiJ.mpuCycleCount += 10; 11565: int t = XEiJ.regPC; //pc0+2 11566: int s = (byte) XEiJ.regOC; //オフセット 11567: if (s == 0) { //Bcc.Wでジャンプ 11568: XEiJ.regPC = t + 2; 11569: s = XEiJ.busRwse (t); //pcws 11570: } 11571: irpSetPC (t + s); //pc0+2+オフセット 11572: } else if (XEiJ.regOC == 0x6a00) { //Bcc.Wで通過 11573: XEiJ.mpuCycleCount += 12; 11574: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11575: } else { //Bcc.Sで通過 11576: XEiJ.mpuCycleCount += 8; 11577: } 11578: } //irpBplsw 11579: 11580: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11581: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11582: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11583: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11584: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 11585: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11586: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11587: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11588: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11589: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11590: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11591: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11592: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 11593: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11594: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11595: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11596: public static void irpBpls () throws M68kException { 11597: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //Bccでジャンプ 11598: XEiJ.mpuCycleCount += 10; 11599: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11600: } else { //Bcc.Sで通過 11601: XEiJ.mpuCycleCount += 8; 11602: } 11603: } //irpBpls 11604: 11605: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11606: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11607: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11608: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11609: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 11610: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11611: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11612: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11613: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 11614: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 11615: public static void irpBplsl () throws M68kException { 11616: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //Bccでジャンプ 11617: int t = XEiJ.regPC; //pc0+2 11618: int s = (byte) XEiJ.regOC; //オフセット 11619: if (s == -1) { //Bcc.Lでジャンプ 11620: XEiJ.mpuCycleCount += 14; 11621: XEiJ.regPC = t + 4; 11622: s = XEiJ.busRlse (t); //pcls 11623: } else { //Bcc.Sでジャンプ 11624: XEiJ.mpuCycleCount += 10; 11625: } 11626: irpSetPC (t + s); //pc0+2+オフセット 11627: } else if (XEiJ.regOC == 0x6aff) { //Bcc.Lで通過 11628: XEiJ.mpuCycleCount += 12; 11629: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11630: } else { //Bcc.Sで通過 11631: XEiJ.mpuCycleCount += 8; 11632: } 11633: } //irpBplsl 11634: 11635: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11636: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11637: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11638: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11639: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 11640: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11641: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11642: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11643: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 11644: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11645: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11646: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11647: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11648: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11649: public static void irpBmisw () throws M68kException { 11650: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //Bccでジャンプ 11651: XEiJ.mpuCycleCount += 10; 11652: int t = XEiJ.regPC; //pc0+2 11653: int s = (byte) XEiJ.regOC; //オフセット 11654: if (s == 0) { //Bcc.Wでジャンプ 11655: XEiJ.regPC = t + 2; 11656: s = XEiJ.busRwse (t); //pcws 11657: } 11658: irpSetPC (t + s); //pc0+2+オフセット 11659: } else if (XEiJ.regOC == 0x6b00) { //Bcc.Wで通過 11660: XEiJ.mpuCycleCount += 12; 11661: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11662: } else { //Bcc.Sで通過 11663: XEiJ.mpuCycleCount += 8; 11664: } 11665: } //irpBmisw 11666: 11667: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11668: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11669: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11670: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11671: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 11672: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11673: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11674: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11675: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11676: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11677: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11678: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11679: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 11680: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11681: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11682: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11683: public static void irpBmis () throws M68kException { 11684: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //Bccでジャンプ 11685: XEiJ.mpuCycleCount += 10; 11686: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11687: } else { //Bcc.Sで通過 11688: XEiJ.mpuCycleCount += 8; 11689: } 11690: } //irpBmis 11691: 11692: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11693: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11694: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11695: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11696: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 11697: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11698: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11699: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11700: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 11701: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 11702: public static void irpBmisl () throws M68kException { 11703: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //Bccでジャンプ 11704: int t = XEiJ.regPC; //pc0+2 11705: int s = (byte) XEiJ.regOC; //オフセット 11706: if (s == -1) { //Bcc.Lでジャンプ 11707: XEiJ.mpuCycleCount += 14; 11708: XEiJ.regPC = t + 4; 11709: s = XEiJ.busRlse (t); //pcls 11710: } else { //Bcc.Sでジャンプ 11711: XEiJ.mpuCycleCount += 10; 11712: } 11713: irpSetPC (t + s); //pc0+2+オフセット 11714: } else if (XEiJ.regOC == 0x6bff) { //Bcc.Lで通過 11715: XEiJ.mpuCycleCount += 12; 11716: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11717: } else { //Bcc.Sで通過 11718: XEiJ.mpuCycleCount += 8; 11719: } 11720: } //irpBmisl 11721: 11722: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11723: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11724: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11725: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11726: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 11727: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11728: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11729: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11730: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 11731: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11732: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11733: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11734: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11735: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11736: public static void irpBgesw () throws M68kException { 11737: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //Bccでジャンプ 11738: XEiJ.mpuCycleCount += 10; 11739: int t = XEiJ.regPC; //pc0+2 11740: int s = (byte) XEiJ.regOC; //オフセット 11741: if (s == 0) { //Bcc.Wでジャンプ 11742: XEiJ.regPC = t + 2; 11743: s = XEiJ.busRwse (t); //pcws 11744: } 11745: irpSetPC (t + s); //pc0+2+オフセット 11746: } else if (XEiJ.regOC == 0x6c00) { //Bcc.Wで通過 11747: XEiJ.mpuCycleCount += 12; 11748: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11749: } else { //Bcc.Sで通過 11750: XEiJ.mpuCycleCount += 8; 11751: } 11752: } //irpBgesw 11753: 11754: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11755: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11756: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11757: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11758: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 11759: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11760: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11761: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11762: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11763: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11764: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11765: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11766: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 11767: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11768: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11769: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11770: public static void irpBges () throws M68kException { 11771: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //Bccでジャンプ 11772: XEiJ.mpuCycleCount += 10; 11773: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11774: } else { //Bcc.Sで通過 11775: XEiJ.mpuCycleCount += 8; 11776: } 11777: } //irpBges 11778: 11779: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11780: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11781: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11782: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11783: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 11784: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11785: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11786: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11787: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 11788: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 11789: public static void irpBgesl () throws M68kException { 11790: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //Bccでジャンプ 11791: int t = XEiJ.regPC; //pc0+2 11792: int s = (byte) XEiJ.regOC; //オフセット 11793: if (s == -1) { //Bcc.Lでジャンプ 11794: XEiJ.mpuCycleCount += 14; 11795: XEiJ.regPC = t + 4; 11796: s = XEiJ.busRlse (t); //pcls 11797: } else { //Bcc.Sでジャンプ 11798: XEiJ.mpuCycleCount += 10; 11799: } 11800: irpSetPC (t + s); //pc0+2+オフセット 11801: } else if (XEiJ.regOC == 0x6cff) { //Bcc.Lで通過 11802: XEiJ.mpuCycleCount += 12; 11803: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11804: } else { //Bcc.Sで通過 11805: XEiJ.mpuCycleCount += 8; 11806: } 11807: } //irpBgesl 11808: 11809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11810: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11811: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11812: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11813: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 11814: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11815: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11816: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11817: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 11818: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11819: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11820: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11821: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11822: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11823: public static void irpBltsw () throws M68kException { 11824: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //Bccでジャンプ 11825: XEiJ.mpuCycleCount += 10; 11826: int t = XEiJ.regPC; //pc0+2 11827: int s = (byte) XEiJ.regOC; //オフセット 11828: if (s == 0) { //Bcc.Wでジャンプ 11829: XEiJ.regPC = t + 2; 11830: s = XEiJ.busRwse (t); //pcws 11831: } 11832: irpSetPC (t + s); //pc0+2+オフセット 11833: } else if (XEiJ.regOC == 0x6d00) { //Bcc.Wで通過 11834: XEiJ.mpuCycleCount += 12; 11835: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11836: } else { //Bcc.Sで通過 11837: XEiJ.mpuCycleCount += 8; 11838: } 11839: } //irpBltsw 11840: 11841: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11842: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11843: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11844: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11845: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 11846: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11847: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11848: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11849: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11850: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11851: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11852: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11853: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 11854: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11855: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11856: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11857: public static void irpBlts () throws M68kException { 11858: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //Bccでジャンプ 11859: XEiJ.mpuCycleCount += 10; 11860: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11861: } else { //Bcc.Sで通過 11862: XEiJ.mpuCycleCount += 8; 11863: } 11864: } //irpBlts 11865: 11866: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11867: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11868: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11869: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11870: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 11871: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11872: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11873: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11874: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 11875: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 11876: public static void irpBltsl () throws M68kException { 11877: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //Bccでジャンプ 11878: int t = XEiJ.regPC; //pc0+2 11879: int s = (byte) XEiJ.regOC; //オフセット 11880: if (s == -1) { //Bcc.Lでジャンプ 11881: XEiJ.mpuCycleCount += 14; 11882: XEiJ.regPC = t + 4; 11883: s = XEiJ.busRlse (t); //pcls 11884: } else { //Bcc.Sでジャンプ 11885: XEiJ.mpuCycleCount += 10; 11886: } 11887: irpSetPC (t + s); //pc0+2+オフセット 11888: } else if (XEiJ.regOC == 0x6dff) { //Bcc.Lで通過 11889: XEiJ.mpuCycleCount += 12; 11890: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11891: } else { //Bcc.Sで通過 11892: XEiJ.mpuCycleCount += 8; 11893: } 11894: } //irpBltsl 11895: 11896: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11897: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11898: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11899: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11900: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 11901: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11902: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11903: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11904: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 11905: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11906: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11907: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11908: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11909: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11910: public static void irpBgtsw () throws M68kException { 11911: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //Bccでジャンプ 11912: XEiJ.mpuCycleCount += 10; 11913: int t = XEiJ.regPC; //pc0+2 11914: int s = (byte) XEiJ.regOC; //オフセット 11915: if (s == 0) { //Bcc.Wでジャンプ 11916: XEiJ.regPC = t + 2; 11917: s = XEiJ.busRwse (t); //pcws 11918: } 11919: irpSetPC (t + s); //pc0+2+オフセット 11920: } else if (XEiJ.regOC == 0x6e00) { //Bcc.Wで通過 11921: XEiJ.mpuCycleCount += 12; 11922: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11923: } else { //Bcc.Sで通過 11924: XEiJ.mpuCycleCount += 8; 11925: } 11926: } //irpBgtsw 11927: 11928: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11929: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11930: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11931: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11932: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 11933: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11934: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11935: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11936: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11937: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11938: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11940: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 11941: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11942: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11943: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11944: public static void irpBgts () throws M68kException { 11945: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //Bccでジャンプ 11946: XEiJ.mpuCycleCount += 10; 11947: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11948: } else { //Bcc.Sで通過 11949: XEiJ.mpuCycleCount += 8; 11950: } 11951: } //irpBgts 11952: 11953: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11954: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11955: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11956: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11957: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 11958: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11959: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11960: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11961: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 11962: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 11963: public static void irpBgtsl () throws M68kException { 11964: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //Bccでジャンプ 11965: int t = XEiJ.regPC; //pc0+2 11966: int s = (byte) XEiJ.regOC; //オフセット 11967: if (s == -1) { //Bcc.Lでジャンプ 11968: XEiJ.mpuCycleCount += 14; 11969: XEiJ.regPC = t + 4; 11970: s = XEiJ.busRlse (t); //pcls 11971: } else { //Bcc.Sでジャンプ 11972: XEiJ.mpuCycleCount += 10; 11973: } 11974: irpSetPC (t + s); //pc0+2+オフセット 11975: } else if (XEiJ.regOC == 0x6eff) { //Bcc.Lで通過 11976: XEiJ.mpuCycleCount += 12; 11977: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11978: } else { //Bcc.Sで通過 11979: XEiJ.mpuCycleCount += 8; 11980: } 11981: } //irpBgtsl 11982: 11983: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11984: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11985: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11986: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11987: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 11988: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11989: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11990: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11991: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 11992: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11993: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11994: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11995: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 11996: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 11997: public static void irpBlesw () throws M68kException { 11998: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //Bccでジャンプ 11999: XEiJ.mpuCycleCount += 10; 12000: int t = XEiJ.regPC; //pc0+2 12001: int s = (byte) XEiJ.regOC; //オフセット 12002: if (s == 0) { //Bcc.Wでジャンプ 12003: XEiJ.regPC = t + 2; 12004: s = XEiJ.busRwse (t); //pcws 12005: } 12006: irpSetPC (t + s); //pc0+2+オフセット 12007: } else if (XEiJ.regOC == 0x6f00) { //Bcc.Wで通過 12008: XEiJ.mpuCycleCount += 12; 12009: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 12010: } else { //Bcc.Sで通過 12011: XEiJ.mpuCycleCount += 8; 12012: } 12013: } //irpBlesw 12014: 12015: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12016: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12017: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12018: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12019: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 12020: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 12021: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 12022: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 12023: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12024: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12025: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12026: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12027: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 12028: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 12029: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 12030: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 12031: public static void irpBles () throws M68kException { 12032: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //Bccでジャンプ 12033: XEiJ.mpuCycleCount += 10; 12034: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 12035: } else { //Bcc.Sで通過 12036: XEiJ.mpuCycleCount += 8; 12037: } 12038: } //irpBles 12039: 12040: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12041: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12042: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12043: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12044: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 12045: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 12046: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 12047: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 12048: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 12049: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 12050: public static void irpBlesl () throws M68kException { 12051: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //Bccでジャンプ 12052: int t = XEiJ.regPC; //pc0+2 12053: int s = (byte) XEiJ.regOC; //オフセット 12054: if (s == -1) { //Bcc.Lでジャンプ 12055: XEiJ.mpuCycleCount += 14; 12056: XEiJ.regPC = t + 4; 12057: s = XEiJ.busRlse (t); //pcls 12058: } else { //Bcc.Sでジャンプ 12059: XEiJ.mpuCycleCount += 10; 12060: } 12061: irpSetPC (t + s); //pc0+2+オフセット 12062: } else if (XEiJ.regOC == 0x6fff) { //Bcc.Lで通過 12063: XEiJ.mpuCycleCount += 12; 12064: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 12065: } else { //Bcc.Sで通過 12066: XEiJ.mpuCycleCount += 8; 12067: } 12068: } //irpBlesl 12069: 12070: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12071: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12072: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12073: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12074: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 12075: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 12076: public static void irpMoveq () throws M68kException { 12077: XEiJ.mpuCycleCount += 4; 12078: int z; 12079: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = (byte) XEiJ.regOC; 12080: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12081: } //irpMoveq 12082: 12083: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12084: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12085: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12086: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12087: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 12088: // 12089: //MVS.B <ea>,Dq 12090: // バイトデータをロングに符号拡張してDqの全体を更新する 12091: public static void irpMvsByte () throws M68kException { 12092: XEiJ.mpuCycleCount += 4; 12093: int ea = XEiJ.regOC & 63; 12094: int z; 12095: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 12096: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12097: } //irpMvsByte 12098: 12099: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12100: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12101: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12102: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12103: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 12104: // 12105: //MVS.W <ea>,Dq 12106: // ワードデータをロングに符号拡張してDqの全体を更新する 12107: public static void irpMvsWord () throws M68kException { 12108: XEiJ.mpuCycleCount += 4; 12109: int ea = XEiJ.regOC & 63; 12110: int z; 12111: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); 12112: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12113: } //irpMvsWord 12114: 12115: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12116: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12117: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12118: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12119: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 12120: // 12121: //MVZ.B <ea>,Dq 12122: // バイトデータをロングにゼロ拡張してDqの全体を更新する 12123: public static void irpMvzByte () throws M68kException { 12124: XEiJ.mpuCycleCount += 4; 12125: int ea = XEiJ.regOC & 63; 12126: int z; 12127: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? 0xff & XEiJ.regRn[ea] : XEiJ.busRbz (efaAnyByte (ea)); 12128: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12129: } //irpMvzByte 12130: 12131: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12132: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12133: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12134: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12135: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 12136: // 12137: //MVZ.W <ea>,Dq 12138: // ワードデータをロングにゼロ拡張してDqの全体を更新する 12139: public static void irpMvzWord () throws M68kException { 12140: XEiJ.mpuCycleCount += 4; 12141: int ea = XEiJ.regOC & 63; 12142: int z; 12143: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea)); 12144: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12145: } //irpMvzWord 12146: 12147: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12148: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12149: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12150: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12151: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 12152: public static void irpOrToRegByte () throws M68kException { 12153: XEiJ.mpuCycleCount += 4; 12154: int ea = XEiJ.regOC & 63; 12155: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= 255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea))))]; //ccr_tst_byte。0拡張してからOR 12156: } //irpOrToRegByte 12157: 12158: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12159: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12160: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12161: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12162: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 12163: public static void irpOrToRegWord () throws M68kException { 12164: XEiJ.mpuCycleCount += 4; 12165: int ea = XEiJ.regOC & 63; 12166: int z = (short) (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea))); //0拡張してからOR 12167: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12168: } //irpOrToRegWord 12169: 12170: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12171: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12172: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12173: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12174: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 12175: public static void irpOrToRegLong () throws M68kException { 12176: int ea = XEiJ.regOC & 63; 12177: int qqq = XEiJ.regOC >> 9 & 7; 12178: int z; 12179: if (ea < XEiJ.EA_AR) { //OR.L Dr,Dq 12180: XEiJ.mpuCycleCount += 8; 12181: XEiJ.regRn[qqq] = z = XEiJ.regRn[qqq] | XEiJ.regRn[ea]; 12182: } else { //OR.L <mem>,Dq 12183: XEiJ.mpuCycleCount += ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 12184: XEiJ.regRn[qqq] = z = XEiJ.regRn[qqq] | XEiJ.busRls (efaAnyLong (ea)); 12185: } 12186: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12187: } //irpOrToRegLong 12188: 12189: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12190: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12191: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12192: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12193: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 12194: // 12195: //DIVU.W <ea>,Dq 12196: // M68000PRMでDIVU.Wのオーバーフローの条件が16bit符号あり整数と書かれているのは16bit符号なし整数の間違い 12197: public static void irpDivuWord () throws M68kException { 12198: // X 変化しない 12199: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12200: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12201: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12202: // C 常にクリア 12203: XEiJ.mpuCycleCount += 140; //最大 12204: int ea = XEiJ.regOC & 63; 12205: int qqq = XEiJ.regOC >> 9 & 7; 12206: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea)); //除数 12207: int x = XEiJ.regRn[qqq]; //被除数 12208: if (y == 0) { //ゼロ除算 12209: //Dqは変化しない 12210: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12211: (x < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 12212: (x >> 16 == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が$0000xxxxのときセット、さもなくばクリア 12213: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 12214: ); //Cは常にクリア 12215: XEiJ.mpuCycleCount += 38 - 140 - 34; 12216: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 12217: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12218: throw M68kException.m6eSignal; 12219: } 12220: //無理にintで符号なし除算をやろうとするよりもdoubleにキャストしてから割ったほうが速い 12221: // intの除算をdoubleの除算器で行うプロセッサならばなおさら 12222: //被除数を符号なし32ビットとみなすためlongを経由してdoubleに変換する 12223: //doubleからlongやintへのキャストは小数点以下が切り捨てられ、オーバーフローは表現できる絶対値最大の値になる 12224: //doubleから直接intに戻しているので0xffffffff/0x0001=0xffffffffが絶対値最大の0x7fffffffになってしまうが、 12225: //DIVU.Wではオーバーフローになることに変わりはないのでよいことにする 12226: // 符号なし32ビットの0xffffffffにしたいときは戻すときもlongを経由すればよい 12227: int z = (int) ((double) ((long) x & 0xffffffffL) / (double) y); //商 12228: if (z >>> 16 != 0) { //オーバーフローあり 12229: //Dqは変化しない 12230: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12231: (x < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 12232: //Zは常にクリア 12233: XEiJ.REG_CCR_V //Vは常にセット 12234: ); //Cは常にクリア 12235: } else { //オーバーフローなし 12236: XEiJ.regRn[qqq] = x - y * z << 16 | z; //余り<<16|商 12237: z = (short) z; 12238: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12239: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12240: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12241: //Vは常にクリア 12242: ); //Cは常にクリア 12243: } //if オーバーフローあり/オーバーフローなし 12244: if (M30_DIV_ZERO_V_FLAG) { 12245: m30DivZeroVFlag = false; 12246: } 12247: } //irpDivuWord 12248: 12249: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12250: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12251: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12252: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12253: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 12254: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 12255: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 12256: public static void irpOrToMemByte () throws M68kException { 12257: int ea = XEiJ.regOC & 63; 12258: if (ea >= XEiJ.EA_MM) { //OR.B Dq,<ea> 12259: XEiJ.mpuCycleCount += 8; 12260: int a = efaMltByte (ea); 12261: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRbs (a); 12262: XEiJ.busWb (a, z); 12263: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12264: } else if (ea < XEiJ.EA_AR) { //SBCD.B Dr,Dq 12265: int qqq = XEiJ.regOC >> 9 & 7; 12266: XEiJ.mpuCycleCount += 6; 12267: int x; 12268: XEiJ.regRn[qqq] = ~0xff & (x = XEiJ.regRn[qqq]) | irpSbcd (x, XEiJ.regRn[ea]); 12269: } else { //SBCD.B -(Ar),-(Aq) 12270: XEiJ.mpuCycleCount += 18; 12271: int y = XEiJ.busRbz (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 12272: int a = --XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)]; 12273: XEiJ.busWb (a, irpSbcd (XEiJ.busRbz (a), y)); 12274: } 12275: } //irpOrToMemByte 12276: 12277: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12278: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12279: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12280: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12281: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 12282: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 12283: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 12284: // 12285: //PACK Dr,Dq,#<data> 12286: //PACK -(Ar),-(Aq),#<data> 12287: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12288: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12289: public static void irpOrToMemWord () throws M68kException { 12290: int ea = XEiJ.regOC & 63; 12291: if (ea >= XEiJ.EA_MM) { //OR.W Dq,<ea> 12292: XEiJ.mpuCycleCount += 8; 12293: int a = efaMltWord (ea); 12294: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRws (a); 12295: XEiJ.busWw (a, z); 12296: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12297: } else if (ea < XEiJ.EA_AR) { //PACK Dr,Dq,#<data> 12298: XEiJ.mpuCycleCount += 8; 12299: int qqq = XEiJ.regOC >> 9 & 7; 12300: int t; 12301: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12302: t = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 12303: } else { 12304: t = XEiJ.regPC; 12305: XEiJ.regPC = t + 2; 12306: t = XEiJ.regRn[ea] + XEiJ.busRwse (t); //pcws 12307: } 12308: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | t >> 4 & 0xf0 | t & 15; 12309: } else { //PACK -(Ar),-(Aq),#<data> 12310: XEiJ.mpuCycleCount += 16; 12311: int t; 12312: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12313: t = XEiJ.busRws (XEiJ.regRn[ea] -= 2) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。020以上なのでアドレスエラーは出ない 12314: } else { 12315: t = XEiJ.regPC; 12316: XEiJ.regPC = t + 2; 12317: t = XEiJ.busRws (XEiJ.regRn[ea] -= 2) + XEiJ.busRwse (t); //pcws。020以上なのでアドレスエラーは出ない 12318: } 12319: XEiJ.busWb (--XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)], t >> 4 & 0xf0 | t & 15); 12320: } 12321: } //irpOrToMemWord 12322: 12323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12324: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12325: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12326: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12327: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 12328: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 12329: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 12330: // 12331: //UNPK Dr,Dq,#<data> 12332: //UNPK -(Ar),-(Aq),#<data> 12333: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12334: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12335: public static void irpOrToMemLong () throws M68kException { 12336: int ea = XEiJ.regOC & 63; 12337: if (ea >= XEiJ.EA_MM) { //OR.L Dq,<ea> 12338: XEiJ.mpuCycleCount += 12; 12339: int a = efaMltLong (ea); 12340: int z; 12341: XEiJ.busWl (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRls (a)); 12342: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12343: } else if (ea < XEiJ.EA_AR) { //UNPK Dr,Dq,#<data> 12344: int qqq = XEiJ.regOC >> 9 & 7; 12345: int t = XEiJ.regRn[ea]; 12346: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12347: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws 12348: } else { 12349: int s = XEiJ.regPC; 12350: XEiJ.regPC = s + 2; 12351: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse (s)); //pcws 12352: } 12353: } else { //UNPK -(Ar),-(Aq),#<data> 12354: int t = XEiJ.busRbs (--XEiJ.regRn[ea]); 12355: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12356: XEiJ.busWw (XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)] -= 2, (t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。020以上なのでアドレスエラーは出ない 12357: } else { 12358: int s = XEiJ.regPC; 12359: XEiJ.regPC = s + 2; 12360: XEiJ.busWw (XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)] -= 2, (t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse (s)); //pcws。020以上なのでアドレスエラーは出ない 12361: } 12362: } 12363: } //irpOrToMemLong 12364: 12365: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12366: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12367: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12368: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12369: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 12370: // 12371: //DIVS.W <ea>,Dq 12372: // DIVSの余りの符号は被除数と一致 12373: // M68000PRMでDIVS.Wのアドレッシングモードがデータ可変と書かれているのはデータの間違い 12374: public static void irpDivsWord () throws M68kException { 12375: // X 変化しない 12376: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12377: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12378: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12379: // C 常にクリア 12380: //divsの余りの符号は被除数と一致 12381: //Javaの除算演算子の挙動 12382: // 10 / 3 == 3 10 % 3 == 1 10 = 3 * 3 + 1 12383: // 10 / -3 == -3 10 % -3 == 1 10 = -3 * -3 + 1 12384: // -10 / 3 == -3 -10 % 3 == -1 -10 = 3 * -3 + -1 12385: // -10 / -3 == 3 -10 % -3 == -1 -10 = -3 * 3 + -1 12386: XEiJ.mpuCycleCount += 158; //最大 12387: int ea = XEiJ.regOC & 63; 12388: int qqq = XEiJ.regOC >> 9 & 7; 12389: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //除数 12390: int x = XEiJ.regRn[qqq]; //被除数 12391: if (y == 0) { //ゼロ除算 12392: //Dqは変化しない 12393: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12394: //Nは常にクリア 12395: XEiJ.REG_CCR_Z | //Zは常にセット 12396: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 12397: ); //Cは常にクリア 12398: XEiJ.mpuCycleCount += 38 - 158 - 34; 12399: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 12400: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12401: throw M68kException.m6eSignal; 12402: } 12403: int z = x / y; //商 12404: if ((short) z != z) { //オーバーフローあり 12405: //Dqは変化しない 12406: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12407: (x == 0x80000000 || (z & 0xffff0080) == 0x00000080 || (z & 0xffff0080) == 0xffff0080 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が$80000000または商が$0000xxyyまたは$ffffxxyyでyyが負のときセット、さもなくばクリア 12408: (z == 0x00008000 || (((z & 0xffff00ff) == 0x00000000 || (z & 0xffff00ff) == 0xffff0000) && (z & 0x0000ff00) != 0) ? XEiJ.REG_CCR_Z : 0) | //Zは商が$00008000または商が$0000xxyyまたは$ffffxxyyでxxが0でなくてyyが0のときセット、さもなくばクリア 12409: XEiJ.REG_CCR_V //Vは常にセット 12410: ); //Cは常にクリア 12411: } else { //オーバーフローなし 12412: XEiJ.regRn[qqq] = x - y * z << 16 | (char) z; //Dqは余り<<16|商&$ffff 12413: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12414: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12415: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12416: //Vは常にクリア 12417: ); //Cは常にクリア 12418: } //if オーバーフローあり/オーバーフローなし 12419: if (M30_DIV_ZERO_V_FLAG) { 12420: m30DivZeroVFlag = false; 12421: } 12422: } //irpDivsWord 12423: 12424: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12425: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12426: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12427: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12428: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 12429: public static void irpSubToRegByte () throws M68kException { 12430: XEiJ.mpuCycleCount += 4; 12431: int ea = XEiJ.regOC & 63; 12432: int qqq = XEiJ.regOC >> 9 & 7; 12433: int x, y, z; 12434: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 12435: x = XEiJ.regRn[qqq]; 12436: z = x - y; 12437: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12438: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12439: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12440: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12441: } //irpSubToRegByte 12442: 12443: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12444: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12445: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12446: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12447: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 12448: public static void irpSubToRegWord () throws M68kException { 12449: XEiJ.mpuCycleCount += 4; 12450: int ea = XEiJ.regOC & 63; 12451: int qqq = XEiJ.regOC >> 9 & 7; 12452: int x, y, z; 12453: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 12454: x = XEiJ.regRn[qqq]; 12455: z = x - y; 12456: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12457: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12458: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12459: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12460: } //irpSubToRegWord 12461: 12462: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12463: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12464: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12465: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12466: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 12467: public static void irpSubToRegLong () throws M68kException { 12468: int ea = XEiJ.regOC & 63; 12469: int qqq = XEiJ.regOC >> 9 & 7; 12470: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 12471: int x, y, z; 12472: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 12473: x = XEiJ.regRn[qqq]; 12474: z = x - y; 12475: XEiJ.regRn[qqq] = z; 12476: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12477: ((x ^ y) & (x ^ z)) >> 30 & XEiJ.REG_CCR_V | 12478: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12479: } //irpSubToRegLong 12480: 12481: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12482: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12483: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12484: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12485: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 12486: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 12487: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 12488: // 12489: //SUBA.W <ea>,Aq 12490: // ソースを符号拡張してロングで減算する 12491: public static void irpSubaWord () throws M68kException { 12492: XEiJ.mpuCycleCount += 8; 12493: int ea = XEiJ.regOC & 63; 12494: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12495: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 12496: //ccrは変化しない 12497: } //irpSubaWord 12498: 12499: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12500: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12501: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12503: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 12504: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 12505: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 12506: public static void irpSubToMemByte () throws M68kException { 12507: int ea = XEiJ.regOC & 63; 12508: int a, x, y, z; 12509: if (ea < XEiJ.EA_MM) { 12510: if (ea < XEiJ.EA_AR) { //SUBX.B Dr,Dq 12511: int qqq = XEiJ.regOC >> 9 & 7; 12512: XEiJ.mpuCycleCount += 4; 12513: y = XEiJ.regRn[ea]; 12514: x = XEiJ.regRn[qqq]; 12515: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12516: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12517: } else { //SUBX.B -(Ar),-(Aq) 12518: XEiJ.mpuCycleCount += 18; 12519: y = XEiJ.busRbs (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 12520: a = --XEiJ.regRn[XEiJ.regOC >> 9 & 15]; //1qqq=aqq 12521: x = XEiJ.busRbs (a); 12522: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12523: XEiJ.busWb (a, z); 12524: } 12525: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //SUBXはZをクリアすることはあるがセットすることはない 12526: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12527: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_byte 12528: } else { //SUB.B Dq,<ea> 12529: XEiJ.mpuCycleCount += 8; 12530: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12531: a = efaMltByte (ea); 12532: x = XEiJ.busRbs (a); 12533: z = x - y; 12534: XEiJ.busWb (a, z); 12535: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12536: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12537: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12538: } 12539: } //irpSubToMemByte 12540: 12541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12542: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12543: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12544: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12545: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 12546: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 12547: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 12548: public static void irpSubToMemWord () throws M68kException { 12549: int ea = XEiJ.regOC & 63; 12550: int a, x, y, z; 12551: if (ea < XEiJ.EA_MM) { 12552: if (ea < XEiJ.EA_AR) { //SUBX.W Dr,Dq 12553: int qqq = XEiJ.regOC >> 9 & 7; 12554: XEiJ.mpuCycleCount += 4; 12555: y = XEiJ.regRn[ea]; 12556: x = XEiJ.regRn[qqq]; 12557: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12558: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12559: } else { //SUBX.W -(Ar),-(Aq) 12560: XEiJ.mpuCycleCount += 18; 12561: y = XEiJ.busRws (XEiJ.regRn[ea] -= 2); //このr[ea]はアドレスレジスタ 12562: a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2; 12563: x = XEiJ.busRws (a); 12564: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12565: XEiJ.busWw (a, z); 12566: } 12567: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 12568: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12569: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_word 12570: } else { //SUB.W Dq,<ea> 12571: XEiJ.mpuCycleCount += 8; 12572: y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12573: a = efaMltWord (ea); 12574: x = XEiJ.busRws (a); 12575: z = x - y; 12576: XEiJ.busWw (a, z); 12577: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12578: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12579: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12580: } 12581: } //irpSubToMemWord 12582: 12583: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12584: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12585: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12586: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12587: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 12588: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 12589: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 12590: public static void irpSubToMemLong () throws M68kException { 12591: int ea = XEiJ.regOC & 63; 12592: if (ea < XEiJ.EA_MM) { 12593: int x; 12594: int y; 12595: int z; 12596: if (ea < XEiJ.EA_AR) { //SUBX.L Dr,Dq 12597: int qqq = XEiJ.regOC >> 9 & 7; 12598: XEiJ.mpuCycleCount += 8; 12599: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) - (y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12600: } else { //SUBX.L -(Ar),-(Aq) 12601: XEiJ.mpuCycleCount += 30; 12602: y = XEiJ.busRls (XEiJ.regRn[ea] -= 4); //このr[ea]はアドレスレジスタ 12603: int a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 4; 12604: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 12605: } 12606: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 12607: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12608: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx 12609: } else { //SUB.L Dq,<ea> 12610: XEiJ.mpuCycleCount += 12; 12611: int a = efaMltLong (ea); 12612: int x; 12613: int y; 12614: int z; 12615: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7])); 12616: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12617: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12618: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12619: } 12620: } //irpSubToMemLong 12621: 12622: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12623: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12624: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12625: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12626: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 12627: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 12628: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 12629: public static void irpSubaLong () throws M68kException { 12630: int ea = XEiJ.regOC & 63; 12631: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //Dr/Ar/#<data>のとき8+、それ以外は6+ 12632: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12633: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 12634: //ccrは変化しない 12635: } //irpSubaLong 12636: 12637: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12638: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12639: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12640: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12641: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 12642: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12643: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12644: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12645: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12646: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 12647: public static void irpAline () throws M68kException { 12648: XEiJ.mpuCycleCount += 34; 12649: if (XEiJ.MPU_INLINE_EXCEPTION) { 12650: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 12651: int sp = XEiJ.regRn[15]; 12652: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 12653: if (XEiJ.regSRS == 0) { //ユーザモードのとき 12654: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 12655: XEiJ.mpuUSP = sp; //USPを保存 12656: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 12657: if (DataBreakPoint.DBP_ON) { 12658: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 12659: } else { 12660: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 12661: } 12662: if (InstructionBreakPoint.IBP_ON) { 12663: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 12664: } 12665: } 12666: XEiJ.regRn[15] = sp -= 8; 12667: XEiJ.busWw (sp + 6, 0x0000 | M68kException.M6E_LINE_1010_EMULATOR << 2); //pushw。フォーマットとベクタオフセットをプッシュする 12668: XEiJ.busWl (sp + 2, XEiJ.regPC0); //pushl。pcをプッシュする 12669: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 12670: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.M6E_LINE_1010_EMULATOR << 2))); //例外ベクタを取り出してジャンプする 12671: } else { 12672: irpException (M68kException.M6E_LINE_1010_EMULATOR, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 12673: } 12674: } //irpAline 12675: 12676: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12677: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12678: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12679: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12680: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 12681: public static void irpCmpByte () throws M68kException { 12682: XEiJ.mpuCycleCount += 4; 12683: int ea = XEiJ.regOC & 63; 12684: int x; 12685: int y; 12686: int z = (byte) ((x = (byte) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)))); 12687: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12688: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12689: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12690: } //irpCmpByte 12691: 12692: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12693: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12694: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12695: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12696: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 12697: public static void irpCmpWord () throws M68kException { 12698: XEiJ.mpuCycleCount += 4; 12699: int ea = XEiJ.regOC & 63; 12700: int x; 12701: int y; 12702: int z = (short) ((x = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)))); //このr[ea]はデータレジスタまたはアドレスレジスタ 12703: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12704: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12705: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12706: } //irpCmpWord 12707: 12708: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12709: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12710: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12711: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12712: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 12713: public static void irpCmpLong () throws M68kException { 12714: XEiJ.mpuCycleCount += 6; 12715: int ea = XEiJ.regOC & 63; 12716: int x; 12717: int y; 12718: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea))); //このr[ea]はデータレジスタまたはアドレスレジスタ 12719: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12720: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12721: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12722: } //irpCmpLong 12723: 12724: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12725: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12726: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12727: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12728: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 12729: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 12730: // 12731: //CMPA.W <ea>,Aq 12732: // ソースを符号拡張してロングで比較する 12733: public static void irpCmpaWord () throws M68kException { 12734: XEiJ.mpuCycleCount += 6; 12735: int ea = XEiJ.regOC & 63; 12736: //ソースを符号拡張してからロングで比較する 12737: int y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12738: int x; 12739: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12740: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12741: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12742: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12743: } //irpCmpaWord 12744: 12745: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12746: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12747: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12748: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12749: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 12750: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 12751: public static void irpEorByte () throws M68kException { 12752: int ea = XEiJ.regOC & 63; 12753: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.B (Ar)+,(Aq)+ 12754: XEiJ.mpuCycleCount += 12; 12755: int y = XEiJ.busRbs (XEiJ.regRn[ea]++); //このr[ea]はアドレスレジスタ 12756: int x; 12757: int z = (byte) ((x = XEiJ.busRbs (XEiJ.regRn[XEiJ.regOC >> 9 & 15]++)) - y); 12758: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12759: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12760: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12761: } else { 12762: int qqq = XEiJ.regOC >> 9 & 7; 12763: int z; 12764: if (ea < XEiJ.EA_AR) { //EOR.B Dq,Dr 12765: XEiJ.mpuCycleCount += 4; 12766: z = XEiJ.regRn[ea] ^= 255 & XEiJ.regRn[qqq]; //0拡張してからEOR 12767: } else { //EOR.B Dq,<mem> 12768: XEiJ.mpuCycleCount += 8; 12769: int a = efaMltByte (ea); 12770: XEiJ.busWb (a, z = XEiJ.regRn[qqq] ^ XEiJ.busRbs (a)); 12771: } 12772: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12773: } 12774: } //irpEorByte 12775: 12776: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12777: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12778: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12779: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12780: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 12781: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 12782: public static void irpEorWord () throws M68kException { 12783: int ea = XEiJ.regOC & 63; 12784: int rrr = XEiJ.regOC & 7; 12785: int mmm = ea >> 3; 12786: if (mmm == XEiJ.MMM_AR) { //CMPM.W (Ar)+,(Aq)+ 12787: XEiJ.mpuCycleCount += 12; 12788: int y = XEiJ.busRws ((XEiJ.regRn[ea] += 2) - 2); //このr[ea]はアドレスレジスタ 12789: int x; 12790: int z = (short) ((x = XEiJ.busRws ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 2) - 2)) - y); 12791: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12792: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12793: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12794: } else { 12795: int qqq = XEiJ.regOC >> 9 & 7; 12796: int z; 12797: if (ea < XEiJ.EA_AR) { //EOR.W Dq,Dr 12798: XEiJ.mpuCycleCount += 4; 12799: z = XEiJ.regRn[rrr] ^= (char) XEiJ.regRn[qqq]; //0拡張してからEOR 12800: } else { //EOR.W Dq,<mem> 12801: XEiJ.mpuCycleCount += 8; 12802: int a = efaMltWord (ea); 12803: XEiJ.busWw (a, z = XEiJ.regRn[qqq] ^ XEiJ.busRws (a)); 12804: } 12805: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12806: } 12807: } //irpEorWord 12808: 12809: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12810: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12811: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12812: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12813: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 12814: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 12815: public static void irpEorLong () throws M68kException { 12816: int ea = XEiJ.regOC & 63; 12817: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.L (Ar)+,(Aq)+ 12818: XEiJ.mpuCycleCount += 20; 12819: int y = XEiJ.busRls ((XEiJ.regRn[ea] += 4) - 4); //このr[ea]はアドレスレジスタ 12820: int x; 12821: int z = (x = XEiJ.busRls ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 4) - 4)) - y; 12822: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12823: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12824: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12825: } else { 12826: int qqq = XEiJ.regOC >> 9 & 7; 12827: int z; 12828: if (ea < XEiJ.EA_AR) { //EOR.L Dq,Dr 12829: XEiJ.mpuCycleCount += 8; 12830: XEiJ.regRn[ea] = z = XEiJ.regRn[ea] ^ XEiJ.regRn[qqq]; 12831: } else { //EOR.L Dq,<mem> 12832: XEiJ.mpuCycleCount += 12; 12833: int a = efaMltLong (ea); 12834: XEiJ.busWl (a, z = XEiJ.busRls (a) ^ XEiJ.regRn[qqq]); 12835: } 12836: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12837: } 12838: } //irpEorLong 12839: 12840: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12841: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12842: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12843: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12844: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 12845: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 12846: public static void irpCmpaLong () throws M68kException { 12847: XEiJ.mpuCycleCount += 6; 12848: int ea = XEiJ.regOC & 63; 12849: int y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12850: int x; 12851: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12852: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12853: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12854: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12855: } //irpCmpaLong 12856: 12857: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12858: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12859: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12860: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12861: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 12862: public static void irpAndToRegByte () throws M68kException { 12863: XEiJ.mpuCycleCount += 4; 12864: int ea = XEiJ.regOC & 63; 12865: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~255 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea))))]; //ccr_tst_byte。1拡張してからAND 12866: } //irpAndToRegByte 12867: 12868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12869: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12870: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12871: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12872: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 12873: public static void irpAndToRegWord () throws M68kException { 12874: XEiJ.mpuCycleCount += 4; 12875: int ea = XEiJ.regOC & 63; 12876: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~65535 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea))); //1拡張してからAND 12877: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12878: } //irpAndToRegWord 12879: 12880: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12881: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12882: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12883: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12884: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 12885: public static void irpAndToRegLong () throws M68kException { 12886: int ea = XEiJ.regOC & 63; 12887: int qqq = XEiJ.regOC >> 9 & 7; 12888: int z; 12889: if (ea < XEiJ.EA_AR) { //AND.L Dr,Dq 12890: XEiJ.mpuCycleCount += 8; 12891: z = XEiJ.regRn[qqq] &= XEiJ.regRn[ea]; 12892: } else { //AND.L <mem>,Dq 12893: XEiJ.mpuCycleCount += ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 12894: z = XEiJ.regRn[qqq] &= XEiJ.busRls (efaAnyLong (ea)); 12895: } 12896: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12897: } //irpAndToRegLong 12898: 12899: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12900: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12901: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12902: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12903: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 12904: public static void irpMuluWord () throws M68kException { 12905: int ea = XEiJ.regOC & 63; 12906: int qqq = XEiJ.regOC >> 9 & 7; 12907: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea)); 12908: //muluの所要サイクル数は38+2n 12909: //nはソースに含まれる1の数 12910: int s = y & 0x5555; 12911: s += y - s >> 1; 12912: int t = s & 0x3333; 12913: t += s - t >> 2; 12914: t += t >> 4; 12915: XEiJ.mpuCycleCount += 38 + ((t & 15) + (t >> 8 & 15)) << 1; //38+2n 12916: //XEiJ.mpuCycleCount += 38 + (Integer.bitCount (y) << 1); //少し遅くなる 12917: int z; 12918: XEiJ.regRn[qqq] = z = (char) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 12919: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12920: if (M30_DIV_ZERO_V_FLAG) { 12921: m30DivZeroVFlag = false; 12922: } 12923: } //irpMuluWord 12924: 12925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12926: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12927: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12928: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12929: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 12930: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 12931: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 12932: public static void irpAndToMemByte () throws M68kException { 12933: int ea = XEiJ.regOC & 63; 12934: if (ea >= XEiJ.EA_MM) { //AND.B Dq,<ea> 12935: XEiJ.mpuCycleCount += 8; 12936: int a = efaMltByte (ea); 12937: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & XEiJ.busRbs (a); 12938: XEiJ.busWb (a, z); 12939: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12940: } else if (ea < XEiJ.EA_AR) { //ABCD.B Dr,Dq 12941: int qqq = XEiJ.regOC >> 9 & 7; 12942: XEiJ.mpuCycleCount += 6; 12943: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | irpAbcd (XEiJ.regRn[qqq], XEiJ.regRn[ea]); 12944: } else { //ABCD.B -(Ar),-(Aq) 12945: XEiJ.mpuCycleCount += 18; 12946: int y = XEiJ.busRbz (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 12947: int a = --XEiJ.regRn[(XEiJ.regOC >> 9) - (96 - 8)]; 12948: XEiJ.busWb (a, irpAbcd (XEiJ.busRbz (a), y)); 12949: } 12950: } //irpAndToMemByte 12951: 12952: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12953: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12954: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12956: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 12957: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 12958: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 12959: public static void irpAndToMemWord () throws M68kException { 12960: int ea = XEiJ.regOC & 63; 12961: if (ea < XEiJ.EA_MM) { //EXG 12962: XEiJ.mpuCycleCount += 6; 12963: if (ea < XEiJ.EA_AR) { //EXG.L Dq,Dr 12964: int qqq = XEiJ.regOC >> 9 & 7; 12965: int t = XEiJ.regRn[qqq]; 12966: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; 12967: XEiJ.regRn[ea] = t; 12968: } else { //EXG.L Aq,Ar 12969: int aqq = (XEiJ.regOC >> 9) - (96 - 8); 12970: int t = XEiJ.regRn[aqq]; 12971: XEiJ.regRn[aqq] = XEiJ.regRn[ea]; //このr[ea]アドレスレジスタ 12972: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 12973: } 12974: } else { //AND.W Dq,<ea> 12975: XEiJ.mpuCycleCount += 8; 12976: int a = efaMltWord (ea); 12977: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & XEiJ.busRws (a); 12978: XEiJ.busWw (a, z); 12979: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12980: } 12981: } //irpAndToMemWord 12982: 12983: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12984: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12985: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12986: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12987: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 12988: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 12989: public static void irpAndToMemLong () throws M68kException { 12990: int ea = XEiJ.regOC & 63; 12991: int qqq = XEiJ.regOC >> 9 & 7; 12992: if (ea >> 3 == XEiJ.MMM_AR) { //EXG.L Dq,Ar 12993: XEiJ.mpuCycleCount += 6; 12994: int t = XEiJ.regRn[qqq]; 12995: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12996: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 12997: } else { //AND.L Dq,<ea> 12998: XEiJ.mpuCycleCount += 12; 12999: int a = efaMltLong (ea); 13000: int z; 13001: XEiJ.busWl (a, z = XEiJ.busRls (a) & XEiJ.regRn[qqq]); 13002: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 13003: } 13004: } //irpAndToMemLong 13005: 13006: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13007: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13008: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13010: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 13011: public static void irpMulsWord () throws M68kException { 13012: int ea = XEiJ.regOC & 63; 13013: int qqq = XEiJ.regOC >> 9 & 7; 13014: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); 13015: int t = y << 1 ^ y; //右側が1である0と右側が0または末尾である1は1、それ以外は0。ソースは符号拡張されているので上位16ビットはすべて0 13016: //mulsの所要サイクル数は38+2n 13017: //nはソースの末尾に0を付け加えた17ビットに含まれる10または01の数 13018: int s = t & 0x5555; 13019: s += t - s >> 1; 13020: t = s & 0x3333; 13021: t += s - t >> 2; 13022: t += t >> 4; 13023: XEiJ.mpuCycleCount += 38 + ((t & 15) + (t >> 8 & 15)) << 1; //38+2n 13024: int z; 13025: XEiJ.regRn[qqq] = z = (short) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 13026: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 13027: if (M30_DIV_ZERO_V_FLAG) { 13028: m30DivZeroVFlag = false; 13029: } 13030: } //irpMulsWord 13031: 13032: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13033: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13034: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13035: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13036: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 13037: public static void irpAddToRegByte () throws M68kException { 13038: XEiJ.mpuCycleCount += 4; 13039: int ea = XEiJ.regOC & 63; 13040: int qqq = XEiJ.regOC >> 9 & 7; 13041: int x, y, z; 13042: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 13043: x = XEiJ.regRn[qqq]; 13044: z = x + y; 13045: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 13046: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 13047: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 13048: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 13049: } //irpAddToRegByte 13050: 13051: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13052: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13053: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13054: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13055: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 13056: public static void irpAddToRegWord () throws M68kException { 13057: XEiJ.mpuCycleCount += 4; 13058: int ea = XEiJ.regOC & 63; 13059: int qqq = XEiJ.regOC >> 9 & 7; 13060: int x, y, z; 13061: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 13062: x = XEiJ.regRn[qqq]; 13063: z = x + y; 13064: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 13065: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 13066: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13067: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 13068: } //irpAddToRegWord 13069: 13070: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13071: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13072: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13073: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13074: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 13075: public static void irpAddToRegLong () throws M68kException { 13076: int ea = XEiJ.regOC & 63; 13077: int qqq = XEiJ.regOC >> 9 & 7; 13078: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 13079: int x, y, z; 13080: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 13081: x = XEiJ.regRn[qqq]; 13082: z = x + y; 13083: XEiJ.regRn[qqq] = z; 13084: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13085: ((x ^ z) & (y ^ z)) >> 30 & XEiJ.REG_CCR_V | 13086: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 13087: } //irpAddToRegLong 13088: 13089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13090: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13091: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13092: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13093: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 13094: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 13095: // 13096: //ADDA.W <ea>,Aq 13097: // ソースを符号拡張してロングで加算する 13098: public static void irpAddaWord () throws M68kException { 13099: XEiJ.mpuCycleCount += 8; 13100: int ea = XEiJ.regOC & 63; 13101: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 13102: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 13103: //ccrは変化しない 13104: } //irpAddaWord 13105: 13106: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13107: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13108: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13109: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13110: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 13111: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 13112: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 13113: public static void irpAddToMemByte () throws M68kException { 13114: int ea = XEiJ.regOC & 63; 13115: int a, x, y, z; 13116: if (ea < XEiJ.EA_MM) { 13117: if (ea < XEiJ.EA_AR) { //ADDX.B Dr,Dq 13118: int qqq = XEiJ.regOC >> 9 & 7; 13119: XEiJ.mpuCycleCount += 4; 13120: y = XEiJ.regRn[ea]; 13121: x = XEiJ.regRn[qqq]; 13122: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13123: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 13124: } else { //ADDX.B -(Ar),-(Aq) 13125: XEiJ.mpuCycleCount += 18; 13126: y = XEiJ.busRbs (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 13127: a = --XEiJ.regRn[XEiJ.regOC >> 9 & 15]; //1qqq=aqq 13128: x = XEiJ.busRbs (a); 13129: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13130: XEiJ.busWb (a, z); 13131: } 13132: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 13133: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 13134: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_byte 13135: } else { //ADD.B Dq,<ea> 13136: XEiJ.mpuCycleCount += 8; 13137: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 13138: a = efaMltByte (ea); 13139: x = XEiJ.busRbs (a); 13140: z = x + y; 13141: XEiJ.busWb (a, z); 13142: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 13143: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 13144: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 13145: } 13146: } //irpAddToMemByte 13147: 13148: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13149: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13150: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13151: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13152: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 13153: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 13154: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 13155: public static void irpAddToMemWord () throws M68kException { 13156: int ea = XEiJ.regOC & 63; 13157: int a, x, y, z; 13158: if (ea < XEiJ.EA_MM) { 13159: if (ea < XEiJ.EA_AR) { //ADDX.W Dr,Dq 13160: int qqq = XEiJ.regOC >> 9 & 7; 13161: XEiJ.mpuCycleCount += 4; 13162: y = XEiJ.regRn[ea]; 13163: x = XEiJ.regRn[qqq]; 13164: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13165: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 13166: } else { //ADDX.W -(Ar),-(Aq) 13167: XEiJ.mpuCycleCount += 18; 13168: y = XEiJ.busRws (XEiJ.regRn[ea] -= 2); //このr[ea]はアドレスレジスタ 13169: a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2; 13170: x = XEiJ.busRws (a); 13171: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13172: XEiJ.busWw (a, z); 13173: } 13174: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 13175: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13176: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_word 13177: } else { //ADD.W Dq,<ea> 13178: XEiJ.mpuCycleCount += 8; 13179: a = efaMltWord (ea); 13180: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 13181: x = XEiJ.busRws (a); 13182: z = x + y; 13183: XEiJ.busWw (a, z); 13184: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 13185: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13186: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 13187: } 13188: } //irpAddToMemWord 13189: 13190: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13191: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13192: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13193: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13194: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 13195: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 13196: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 13197: public static void irpAddToMemLong () throws M68kException { 13198: int ea = XEiJ.regOC & 63; 13199: if (ea < XEiJ.EA_MM) { 13200: int x; 13201: int y; 13202: int z; 13203: if (ea < XEiJ.EA_AR) { //ADDX.L Dr,Dq 13204: int qqq = XEiJ.regOC >> 9 & 7; 13205: XEiJ.mpuCycleCount += 8; 13206: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) + (y = XEiJ.regRn[ea]) + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13207: } else { //ADDX.L -(Ar),-(Aq) 13208: XEiJ.mpuCycleCount += 30; 13209: y = XEiJ.busRls (XEiJ.regRn[ea] -= 4); //このr[ea]はアドレスレジスタ 13210: int a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 4; 13211: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y + (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 13212: } 13213: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 13214: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13215: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx 13216: } else { //ADD.L Dq,<ea> 13217: XEiJ.mpuCycleCount += 12; 13218: int a = efaMltLong (ea); 13219: int x; 13220: int y; 13221: int z; 13222: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7])); 13223: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13224: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13225: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 13226: } 13227: } //irpAddToMemLong 13228: 13229: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13230: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13231: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13232: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13233: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 13234: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 13235: public static void irpAddaLong () throws M68kException { 13236: int ea = XEiJ.regOC & 63; 13237: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //Dr/Ar/#<data>のとき8+、それ以外は6+ 13238: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 13239: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 13240: //ccrは変化しない 13241: } //irpAddaLong 13242: 13243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13244: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13245: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13246: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13247: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 13248: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 13249: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 13250: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 13251: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 13252: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 13253: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 13254: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 13255: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 13256: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 13257: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 13258: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 13259: // 13260: //ASR.B #<data>,Dr 13261: //ASR.B Dq,Dr 13262: // 算術右シフトバイト 13263: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13264: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13265: // 1 ........................ｱｱｲｳｴｵｶｷ ｸｱ*0ｸ Z=ｱｲｳｴｵｶｷ==0 13266: // 2 ........................ｱｱｱｲｳｴｵｶ ｷｱ*0ｷ Z=ｱｲｳｴｵｶ==0 13267: // 3 ........................ｱｱｱｱｲｳｴｵ ｶｱ*0ｶ Z=ｱｲｳｴｵ==0 13268: // 4 ........................ｱｱｱｱｱｲｳｴ ｵｱ*0ｵ Z=ｱｲｳｴ==0 13269: // 5 ........................ｱｱｱｱｱｱｲｳ ｴｱ*0ｴ Z=ｱｲｳ==0 13270: // 6 ........................ｱｱｱｱｱｱｱｲ ｳｱ*0ｳ Z=ｱｲ==0 13271: // 7 ........................ｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13272: // 8 ........................ｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13273: // CCR 13274: // X countが0のとき変化しない。他は最後に押し出されたビット 13275: // N 結果の最上位ビット 13276: // Z 結果が0のときセット。他はクリア 13277: // V 常にクリア 13278: // C countが0のときクリア。他は最後に押し出されたビット 13279: // 13280: //LSR.B #<data>,Dr 13281: //LSR.B Dq,Dr 13282: // 論理右シフトバイト 13283: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13284: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13285: // 1 ........................0ｱｲｳｴｵｶｷ ｸ0*0ｸ Z=ｱｲｳｴｵｶｷ==0 13286: // 2 ........................00ｱｲｳｴｵｶ ｷ0*0ｷ Z=ｱｲｳｴｵｶ==0 13287: // 3 ........................000ｱｲｳｴｵ ｶ0*0ｶ Z=ｱｲｳｴｵ==0 13288: // 4 ........................0000ｱｲｳｴ ｵ0*0ｵ Z=ｱｲｳｴ==0 13289: // 5 ........................00000ｱｲｳ ｴ0*0ｴ Z=ｱｲｳ==0 13290: // 6 ........................000000ｱｲ ｳ0*0ｳ Z=ｱｲ==0 13291: // 7 ........................0000000ｱ ｲ0*0ｲ Z=ｱ==0 13292: // 8 ........................00000000 ｱ010ｱ 13293: // 9 ........................00000000 00100 13294: // CCR 13295: // X countが0のとき変化しない。他は最後に押し出されたビット 13296: // N 結果の最上位ビット 13297: // Z 結果が0のときセット。他はクリア 13298: // V 常にクリア 13299: // C countが0のときクリア。他は最後に押し出されたビット 13300: // 13301: //ROR.B #<data>,Dr 13302: //ROR.B Dq,Dr 13303: // 右ローテートバイト 13304: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13305: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13306: // 1 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13307: // : 13308: // 7 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸ==0 13309: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13310: // CCR 13311: // X 常に変化しない 13312: // N 結果の最上位ビット 13313: // Z 結果が0のときセット。他はクリア 13314: // V 常にクリア 13315: // C countが0のときクリア。他は結果の最上位ビット 13316: // 13317: //ROXR.B #<data>,Dr 13318: //ROXR.B Dq,Dr 13319: // 拡張右ローテートバイト 13320: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13321: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13322: // 1 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13323: // 2 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13324: // 3 ........................ｷｸXｱｲｳｴｵ ｶｷ*0ｶ Z=ｱｲｳｴｵｷｸX==0 13325: // 4 ........................ｶｷｸXｱｲｳｴ ｵｶ*0ｵ Z=ｱｲｳｴｶｷｸX==0 13326: // 5 ........................ｵｶｷｸXｱｲｳ ｴｵ*0ｴ Z=ｱｲｳｵｶｷｸX==0 13327: // 6 ........................ｴｵｶｷｸXｱｲ ｳｴ*0ｳ Z=ｱｲｴｵｶｷｸX==0 13328: // 7 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13329: // 8 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13330: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13331: // CCR 13332: // X countが0のとき変化しない。他は最後に押し出されたビット 13333: // N 結果の最上位ビット 13334: // Z 結果が0のときセット。他はクリア 13335: // V 常にクリア 13336: // C countが0のときXのコピー。他は最後に押し出されたビット 13337: public static void irpXxrToRegByte () throws M68kException { 13338: int rrr; 13339: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13340: int y; 13341: int z; 13342: int t; 13343: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13344: case 0b000_000 >> 3: //ASR.B #<data>,Dr 13345: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13346: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> y) >> 1); 13347: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13348: break; 13349: case 0b001_000 >> 3: //LSR.B #<data>,Dr 13350: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13351: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = (0xff & x) >>> y) >>> 1); 13352: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13353: break; 13354: case 0b010_000 >> 3: //ROXR.B #<data>,Dr 13355: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13356: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13357: if (y == 1 - 1) { //y=data-1=1-1 13358: t = x; 13359: } else { //y=data-1=2-1～8-1 13360: z = x << 9 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13361: } 13362: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13363: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13364: break; 13365: case 0b011_000 >> 3: //ROR.B #<data>,Dr 13366: XEiJ.mpuCycleCount += 6 + ((y = XEiJ.regOC >> 9 & 7) << 1); //y=data&7 13367: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13368: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 7 & 1; //Xは変化しない。Cは結果の最上位ビット 13369: break; 13370: case 0b100_000 >> 3: //ASR.B Dq,Dr 13371: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13372: XEiJ.mpuCycleCount += 6 + (y << 1); 13373: if (y == 0) { //y=data=0 13374: z = (byte) x; 13375: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13376: } else { //y=data=1～63 13377: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> (y <= 8 ? y - 1 : 7)) >> 1); 13378: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13379: } 13380: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13381: break; 13382: case 0b101_000 >> 3: //LSR.B Dq,Dr 13383: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13384: XEiJ.mpuCycleCount += 6 + (y << 1); 13385: if (y == 0) { //y=data=0 13386: z = (byte) x; 13387: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13388: } else { //y=data=1～63 13389: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = y <= 8 ? (0xff & x) >>> y - 1 : 0) >>> 1); 13390: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13391: } 13392: break; 13393: case 0b110_000 >> 3: //ROXR.B Dq,Dr 13394: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13395: XEiJ.mpuCycleCount += 6 + (y << 1); 13396: //y %= 9; 13397: y = (y & 7) - (y >> 3); //y=data=-7～7 13398: y += y >> 3 & 9; //y=data=0～8 13399: if (y == 0) { //y=data=0 13400: z = (byte) x; 13401: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13402: } else { //y=data=1～8 13403: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13404: if (y == 1) { //y=data=1 13405: t = x; //Cは最後に押し出されたビット 13406: } else { //y=data=2～8 13407: z = x << 9 - y | (t = z >>> y - 2) >>> 1; 13408: } 13409: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13410: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13411: } 13412: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13413: break; 13414: case 0b111_000 >> 3: //ROR.B Dq,Dr 13415: default: 13416: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13417: XEiJ.mpuCycleCount += 6 + (y << 1); 13418: if (y == 0) { 13419: z = (byte) x; 13420: t = 0; //Cはクリア 13421: } else { 13422: y &= 7; //y=data=0～7 13423: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13424: t = z >>> 7 & 1; //Cは結果の最上位ビット 13425: } 13426: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13427: } 13428: } //irpXxrToRegByte 13429: 13430: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13431: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13432: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13433: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13434: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 13435: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 13436: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 13437: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 13438: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 13439: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 13440: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 13441: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 13442: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 13443: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 13444: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 13445: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 13446: // 13447: //ASR.W #<data>,Dr 13448: //ASR.W Dq,Dr 13449: //ASR.W <ea> 13450: // 算術右シフトワード 13451: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13452: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13453: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13454: // : 13455: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13456: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13457: // CCR 13458: // X countが0のとき変化しない。他は最後に押し出されたビット 13459: // N 結果の最上位ビット 13460: // Z 結果が0のときセット。他はクリア 13461: // V 常にクリア 13462: // C countが0のときクリア。他は最後に押し出されたビット 13463: // 13464: //LSR.W #<data>,Dr 13465: //LSR.W Dq,Dr 13466: //LSR.W <ea> 13467: // 論理右シフトワード 13468: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13469: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13470: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13471: // : 13472: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13473: // 16 ................0000000000000000 ｱ010ｱ 13474: // 17 ................0000000000000000 00100 13475: // CCR 13476: // X countが0のとき変化しない。他は最後に押し出されたビット 13477: // N 結果の最上位ビット 13478: // Z 結果が0のときセット。他はクリア 13479: // V 常にクリア 13480: // C countが0のときクリア。他は最後に押し出されたビット 13481: // 13482: //ROR.W #<data>,Dr 13483: //ROR.W Dq,Dr 13484: //ROR.W <ea> 13485: // 右ローテートワード 13486: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13487: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13488: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13489: // : 13490: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13491: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13492: // CCR 13493: // X 常に変化しない 13494: // N 結果の最上位ビット 13495: // Z 結果が0のときセット。他はクリア 13496: // V 常にクリア 13497: // C countが0のときクリア。他は結果の最上位ビット 13498: // 13499: //ROXR.W #<data>,Dr 13500: //ROXR.W Dq,Dr 13501: //ROXR.W <ea> 13502: // 拡張右ローテートワード 13503: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13504: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13505: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 13506: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 13507: // : 13508: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13509: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13510: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13511: // CCR 13512: // X countが0のとき変化しない。他は最後に押し出されたビット 13513: // N 結果の最上位ビット 13514: // Z 結果が0のときセット。他はクリア 13515: // V 常にクリア 13516: // C countが0のときXのコピー。他は最後に押し出されたビット 13517: public static void irpXxrToRegWord () throws M68kException { 13518: int rrr; 13519: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13520: int y; 13521: int z; 13522: int t; 13523: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13524: case 0b000_000 >> 3: //ASR.W #<data>,Dr 13525: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13526: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> y) >> 1); 13527: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13528: break; 13529: case 0b001_000 >> 3: //LSR.W #<data>,Dr 13530: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13531: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = (char) x >>> y) >>> 1); 13532: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13533: break; 13534: case 0b010_000 >> 3: //ROXR.W #<data>,Dr 13535: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13536: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13537: if (y == 1 - 1) { //y=data-1=1-1 13538: t = x; 13539: } else { //y=data-1=2-1～8-1 13540: z = x << 17 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13541: } 13542: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13543: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13544: break; 13545: case 0b011_000 >> 3: //ROR.W #<data>,Dr 13546: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13547: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - 1 - y | (char) x >>> y + 1)); 13548: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 15 & 1; //Xは変化しない。Cは結果の最上位ビット 13549: break; 13550: case 0b100_000 >> 3: //ASR.W Dq,Dr 13551: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13552: XEiJ.mpuCycleCount += 6 + (y << 1); 13553: if (y == 0) { //y=data=0 13554: z = (short) x; 13555: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13556: } else { //y=data=1～63 13557: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> (y <= 16 ? y - 1 : 15)) >> 1); 13558: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13559: } 13560: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13561: break; 13562: case 0b101_000 >> 3: //LSR.W Dq,Dr 13563: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13564: XEiJ.mpuCycleCount += 6 + (y << 1); 13565: if (y == 0) { //y=data=0 13566: z = (short) x; 13567: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13568: } else { //y=data=1～63 13569: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = y <= 16 ? (char) x >>> y - 1 : 0) >>> 1); 13570: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13571: } 13572: break; 13573: case 0b110_000 >> 3: //ROXR.W Dq,Dr 13574: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13575: XEiJ.mpuCycleCount += 6 + (y << 1); 13576: //y %= 17; 13577: y = (y & 15) - (y >> 4); //y=data=-3～15 13578: y += y >> 4 & 17; //y=data=0～16 13579: if (y == 0) { //y=data=0 13580: z = (short) x; 13581: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13582: } else { //y=data=1～16 13583: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13584: if (y == 1) { //y=data=1 13585: t = x; //Cは最後に押し出されたビット 13586: } else { //y=data=2～16 13587: z = x << 17 - y | (t = z >>> y - 2) >>> 1; 13588: } 13589: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13590: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13591: } 13592: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13593: break; 13594: case 0b111_000 >> 3: //ROR.W Dq,Dr 13595: default: 13596: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13597: XEiJ.mpuCycleCount += 6 + (y << 1); 13598: if (y == 0) { 13599: z = (short) x; 13600: t = 0; //Cはクリア 13601: } else { 13602: y &= 15; //y=data=0～15 13603: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - y | (char) x >>> y)); 13604: t = z >>> 15 & 1; //Cは結果の最上位ビット 13605: } 13606: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13607: } 13608: } //irpXxrToRegWord 13609: 13610: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13611: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13612: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13613: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13614: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 13615: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 13616: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 13617: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 13618: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 13619: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 13620: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 13621: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 13622: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 13623: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 13624: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 13625: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 13626: // 13627: //ASR.L #<data>,Dr 13628: //ASR.L Dq,Dr 13629: // 算術右シフトロング 13630: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13631: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13632: // 1 ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13633: // : 13634: // 31 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13635: // 32 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13636: // CCR 13637: // X countが0のとき変化しない。他は最後に押し出されたビット 13638: // N 結果の最上位ビット 13639: // Z 結果が0のときセット。他はクリア 13640: // V 常にクリア 13641: // C countが0のときクリア。他は最後に押し出されたビット 13642: // 13643: //LSR.L #<data>,Dr 13644: //LSR.L Dq,Dr 13645: // 論理右シフトロング 13646: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13647: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13648: // 1 0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐ0*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13649: // : 13650: // 31 0000000000000000000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13651: // 32 00000000000000000000000000000000 ｱ010ｱ 13652: // 33 00000000000000000000000000000000 00100 13653: // CCR 13654: // X countが0のとき変化しない。他は最後に押し出されたビット 13655: // N 結果の最上位ビット 13656: // Z 結果が0のときセット。他はクリア 13657: // V 常にクリア 13658: // C countが0のときクリア。他は最後に押し出されたビット 13659: // 13660: //ROR.L #<data>,Dr 13661: //ROR.L Dq,Dr 13662: // 右ローテートロング 13663: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13664: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13665: // 1 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13666: // : 13667: // 31 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13668: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13669: // CCR 13670: // X 常に変化しない 13671: // N 結果の最上位ビット 13672: // Z 結果が0のときセット。他はクリア 13673: // V 常にクリア 13674: // C countが0のときクリア。他は結果の最上位ビット 13675: // 13676: //ROXR.L #<data>,Dr 13677: //ROXR.L Dq,Dr 13678: // 拡張右ローテートロング 13679: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13680: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13681: // 1 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 13682: // 2 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 13683: // : 13684: // 31 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13685: // 32 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13686: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13687: // CCR 13688: // X countが0のとき変化しない。他は最後に押し出されたビット 13689: // N 結果の最上位ビット 13690: // Z 結果が0のときセット。他はクリア 13691: // V 常にクリア 13692: // C countが0のときXのコピー。他は最後に押し出されたビット 13693: public static void irpXxrToRegLong () throws M68kException { 13694: int rrr; 13695: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13696: int y; 13697: int z; 13698: int t; 13699: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13700: case 0b000_000 >> 3: //ASR.L #<data>,Dr 13701: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13702: XEiJ.regRn[rrr] = z = (t = x >> y) >> 1; 13703: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13704: break; 13705: case 0b001_000 >> 3: //LSR.L #<data>,Dr 13706: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13707: XEiJ.regRn[rrr] = z = (t = x >>> y) >>> 1; 13708: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13709: break; 13710: case 0b010_000 >> 3: //ROXR.L #<data>,Dr 13711: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13712: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13713: if (y == 1 - 1) { //y=data-1=1-1 13714: t = x; 13715: } else { //y=data-1=2-1～8-1 13716: z = x << -y | (t = z >>> y - (2 - 1)) >>> 1; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 13717: } 13718: XEiJ.regRn[rrr] = z; 13719: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13720: break; 13721: case 0b011_000 >> 3: //ROR.L #<data>,Dr 13722: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13723: XEiJ.regRn[rrr] = z = x << ~y | x >>> y + 1; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 13724: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 31; //Xは変化しない。Cは結果の最上位ビット 13725: break; 13726: case 0b100_000 >> 3: //ASR.L Dq,Dr 13727: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13728: XEiJ.mpuCycleCount += 6 + (y << 1); 13729: if (y == 0) { //y=data=0 13730: z = x; 13731: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13732: } else { //y=data=1～63 13733: XEiJ.regRn[rrr] = z = (t = x >> (y <= 32 ? y - 1 : 31)) >> 1; 13734: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13735: } 13736: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13737: break; 13738: case 0b101_000 >> 3: //LSR.L Dq,Dr 13739: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13740: XEiJ.mpuCycleCount += 6 + (y << 1); 13741: if (y == 0) { //y=data=0 13742: z = x; 13743: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13744: } else { //y=data=1～63 13745: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x >>> y - 1 : 0) >>> 1; 13746: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13747: } 13748: break; 13749: case 0b110_000 >> 3: //ROXR.L Dq,Dr 13750: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13751: XEiJ.mpuCycleCount += 6 + (y << 1); 13752: //y %= 33; 13753: y -= 32 - y >> 6 & 33; //y=data=0～32 13754: if (y == 0) { //y=data=0 13755: z = x; 13756: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13757: } else { //y=data=1～32 13758: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13759: if (y == 1) { //y=data=1 13760: t = x; //Cは最後に押し出されたビット 13761: } else { //y=data=2～32 13762: z = x << 33 - y | (t = z >>> y - 2) >>> 1; 13763: } 13764: XEiJ.regRn[rrr] = z; 13765: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13766: } 13767: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13768: break; 13769: case 0b111_000 >> 3: //ROR.L Dq,Dr 13770: default: 13771: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13772: XEiJ.mpuCycleCount += 6 + (y << 1); 13773: if (y == 0) { 13774: z = x; 13775: t = 0; //Cはクリア 13776: } else { 13777: y &= 31; //y=data=0～31 13778: XEiJ.regRn[rrr] = z = x << -y | x >>> y; //Javaのシフト演算子は5ビットでマスクされるので32-yを-yに省略。y=32のときx|xになるが問題ない 13779: t = z >>> 31; //Cは結果の最上位ビット 13780: } 13781: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13782: } 13783: } //irpXxrToRegLong 13784: 13785: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13786: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13787: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13788: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13789: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 13790: // 13791: //ASR.W #<data>,Dr 13792: //ASR.W Dq,Dr 13793: //ASR.W <ea> 13794: // 算術右シフトワード 13795: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13796: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13797: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13798: // : 13799: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13800: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13801: // CCR 13802: // X countが0のとき変化しない。他は最後に押し出されたビット 13803: // N 結果の最上位ビット 13804: // Z 結果が0のときセット。他はクリア 13805: // V 常にクリア 13806: // C countが0のときクリア。他は最後に押し出されたビット 13807: public static void irpAsrToMem () throws M68kException { 13808: XEiJ.mpuCycleCount += 8; 13809: int ea = XEiJ.regOC & 63; 13810: int a = efaMltWord (ea); 13811: int x = XEiJ.busRws (a); 13812: int z = x >> 1; 13813: XEiJ.busWw (a, z); 13814: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 13815: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13816: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 13817: } //irpAsrToMem 13818: 13819: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13820: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13821: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13822: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13823: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 13824: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 13825: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 13826: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 13827: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 13828: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 13829: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 13830: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 13831: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 13832: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 13833: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 13834: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 13835: // 13836: //ASL.B #<data>,Dr 13837: //ASL.B Dq,Dr 13838: // 算術左シフトバイト 13839: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13840: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13841: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸ==0,V=ｱｲ!=0/-1 13842: // : 13843: // 7 ........................ｸ0000000 ｷｸ**ｷ Z=ｸ==0,V=ｱｲｳｴｵｶｷｸ!=0/-1 13844: // 8 ........................00000000 ｸ01*ｸ V=ｱｲｳｴｵｶｷｸ!=0 13845: // 9 ........................00000000 001*0 V=ｱｲｳｴｵｶｷｸ!=0 13846: // CCR 13847: // X countが0のとき変化しない。他は最後に押し出されたビット 13848: // N 結果の最上位ビット 13849: // Z 結果が0のときセット。他はクリア 13850: // V ASRで元に戻せないときセット。他はクリア 13851: // C countが0のときクリア。他は最後に押し出されたビット 13852: // 13853: //LSL.B #<data>,Dr 13854: //LSL.B Dq,Dr 13855: // 論理左シフトバイト 13856: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13857: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13858: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸ==0 13859: // : 13860: // 7 ........................ｸ0000000 ｷｸ*0ｷ Z=ｸ==0 13861: // 8 ........................00000000 ｸ010ｸ 13862: // 9 ........................00000000 00100 13863: // CCR 13864: // X countが0のとき変化しない。他は最後に押し出されたビット 13865: // N 結果の最上位ビット 13866: // Z 結果が0のときセット。他はクリア 13867: // V 常にクリア 13868: // C countが0のときクリア。他は最後に押し出されたビット 13869: // 13870: //ROL.B #<data>,Dr 13871: //ROL.B Dq,Dr 13872: // 左ローテートバイト 13873: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13874: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13875: // 1 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13876: // : 13877: // 7 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｷ Z=ｱｲｳｴｵｶｷｸ==0 13878: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13879: // CCR 13880: // X 常に変化しない 13881: // N 結果の最上位ビット 13882: // Z 結果が0のときセット。他はクリア 13883: // V 常にクリア 13884: // C countが0のときクリア。他は結果の最下位ビット 13885: // 13886: //ROXL.B #<data>,Dr 13887: //ROXL.B Dq,Dr 13888: // 拡張左ローテートバイト 13889: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13890: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13891: // 1 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13892: // 2 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13893: // : 13894: // 7 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13895: // 8 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13896: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13897: // CCR 13898: // X countが0のとき変化しない。他は最後に押し出されたビット 13899: // N 結果の最上位ビット 13900: // Z 結果が0のときセット。他はクリア 13901: // V 常にクリア 13902: // C countが0のときXのコピー。他は最後に押し出されたビット 13903: public static void irpXxlToRegByte () throws M68kException { 13904: int rrr; 13905: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13906: int y; 13907: int z; 13908: int t; 13909: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13910: case 0b000_000 >> 3: //ASL.B #<data>,Dr 13911: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13912: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13913: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13914: break; 13915: case 0b001_000 >> 3: //LSL.B #<data>,Dr 13916: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13917: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13918: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13919: break; 13920: case 0b010_000 >> 3: //ROXL.B #<data>,Dr 13921: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13922: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13923: if (y == 1 - 1) { //y=data-1=1-1 13924: t = x; 13925: } else { //y=data-1=2-1～8-1 13926: z = (t = z << y - (2 - 1)) << 1 | (0xff & x) >>> 9 - 1 - y; 13927: } 13928: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13929: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13930: break; 13931: case 0b011_000 >> 3: //ROL.B #<data>,Dr 13932: XEiJ.mpuCycleCount += 6 + ((y = XEiJ.regOC >> 9 & 7) << 1); //y=data&7 13933: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 13934: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 13935: break; 13936: case 0b100_000 >> 3: //ASL.B Dq,Dr 13937: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13938: XEiJ.mpuCycleCount += 6 + (y << 1); 13939: if (y <= 7) { //y=data=0～7 13940: if (y == 0) { //y=data=0 13941: z = (byte) x; 13942: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 13943: } else { //y=data=1～7 13944: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y - 1) << 1)); 13945: t = (z >> y != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13946: } 13947: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13948: } else { //y=data=8～63 13949: XEiJ.regRn[rrr] = ~0xff & x; 13950: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((byte) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 8 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 13951: } 13952: break; 13953: case 0b101_000 >> 3: //LSL.B Dq,Dr 13954: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13955: XEiJ.mpuCycleCount += 6 + (y << 1); 13956: if (y == 0) { //y=data=0 13957: z = (byte) x; 13958: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13959: } else { //y=data=1～63 13960: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = y <= 8 ? x << y - 1 : 0) << 1)); 13961: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13962: } 13963: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13964: break; 13965: case 0b110_000 >> 3: //ROXL.B Dq,Dr 13966: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13967: XEiJ.mpuCycleCount += 6 + (y << 1); 13968: //y %= 9; 13969: y = (y & 7) - (y >> 3); //y=data=-7～7 13970: y += y >> 3 & 9; //y=data=0～8 13971: if (y == 0) { //y=data=0 13972: z = (byte) x; 13973: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13974: } else { //y=data=1～8 13975: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13976: if (y == 1) { //y=data=1 13977: t = x; //Cは最後に押し出されたビット 13978: } else { //y=data=2～8 13979: z = (t = z << y - 2) << 1 | (0xff & x) >>> 9 - y; 13980: } 13981: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13982: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13983: } 13984: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13985: break; 13986: case 0b111_000 >> 3: //ROL.B Dq,Dr 13987: default: 13988: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13989: XEiJ.mpuCycleCount += 6 + (y << 1); 13990: if (y == 0) { 13991: z = (byte) x; 13992: t = 0; //Cはクリア 13993: } else { 13994: y &= 7; //y=data=0～7 13995: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 13996: t = z & 1; //Cは結果の最下位ビット 13997: } 13998: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13999: } 14000: } //irpXxlToRegByte 14001: 14002: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14003: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14004: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14005: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14006: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 14007: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 14008: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 14009: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 14010: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 14011: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 14012: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 14013: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 14014: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 14015: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 14016: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 14017: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 14018: // 14019: //ASL.W #<data>,Dr 14020: //ASL.W Dq,Dr 14021: //ASL.W <ea> 14022: // 算術左シフトワード 14023: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14024: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14025: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 14026: // : 14027: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 14028: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14029: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14030: // CCR 14031: // X countが0のとき変化しない。他は最後に押し出されたビット 14032: // N 結果の最上位ビット 14033: // Z 結果が0のときセット。他はクリア 14034: // V ASRで元に戻せないときセット。他はクリア 14035: // C countが0のときクリア。他は最後に押し出されたビット 14036: // 14037: //LSL.W #<data>,Dr 14038: //LSL.W Dq,Dr 14039: //LSL.W <ea> 14040: // 論理左シフトワード 14041: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14042: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14043: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14044: // : 14045: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 14046: // 16 ................0000000000000000 ﾀ010ﾀ 14047: // 17 ................0000000000000000 00100 14048: // CCR 14049: // X countが0のとき変化しない。他は最後に押し出されたビット 14050: // N 結果の最上位ビット 14051: // Z 結果が0のときセット。他はクリア 14052: // V 常にクリア 14053: // C countが0のときクリア。他は最後に押し出されたビット 14054: // 14055: //ROL.W #<data>,Dr 14056: //ROL.W Dq,Dr 14057: //ROL.W <ea> 14058: // 左ローテートワード 14059: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14060: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14061: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14062: // : 14063: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14064: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14065: // CCR 14066: // X 常に変化しない 14067: // N 結果の最上位ビット 14068: // Z 結果が0のときセット。他はクリア 14069: // V 常にクリア 14070: // C countが0のときクリア。他は結果の最下位ビット 14071: // 14072: //ROXL.W #<data>,Dr 14073: //ROXL.W Dq,Dr 14074: //ROXL.W <ea> 14075: // 拡張左ローテートワード 14076: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14077: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14078: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14079: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14080: // : 14081: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14082: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14083: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14084: // CCR 14085: // X countが0のとき変化しない。他は最後に押し出されたビット 14086: // N 結果の最上位ビット 14087: // Z 結果が0のときセット。他はクリア 14088: // V 常にクリア 14089: // C countが0のときXのコピー。他は最後に押し出されたビット 14090: public static void irpXxlToRegWord () throws M68kException { 14091: int rrr; 14092: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 14093: int y; 14094: int z; 14095: int t; 14096: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 14097: case 0b000_000 >> 3: //ASL.W #<data>,Dr 14098: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14099: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 14100: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14101: break; 14102: case 0b001_000 >> 3: //LSL.W #<data>,Dr 14103: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14104: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 14105: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14106: break; 14107: case 0b010_000 >> 3: //ROXL.W #<data>,Dr 14108: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14109: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14110: if (y == 1 - 1) { //y=data-1=1-1 14111: t = x; 14112: } else { //y=data-1=2-1～8-1 14113: z = (t = z << y - (2 - 1)) << 1 | (char) x >>> 17 - 1 - y; 14114: } 14115: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 14116: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14117: break; 14118: case 0b011_000 >> 3: //ROL.W #<data>,Dr 14119: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14120: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y + 1 | (char) x >>> 16 - 1 - y)); 14121: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 14122: break; 14123: case 0b100_000 >> 3: //ASL.W Dq,Dr 14124: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14125: XEiJ.mpuCycleCount += 6 + (y << 1); 14126: if (y <= 15) { //y=data=0～15 14127: if (y == 0) { //y=data=0 14128: z = (short) x; 14129: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 14130: } else { //y=data=1～15 14131: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y - 1) << 1)); 14132: t = (z >> y != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14133: } 14134: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14135: } else { //y=data=16～63 14136: XEiJ.regRn[rrr] = ~0xffff & x; 14137: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((short) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 16 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 14138: } 14139: break; 14140: case 0b101_000 >> 3: //LSL.W Dq,Dr 14141: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14142: XEiJ.mpuCycleCount += 6 + (y << 1); 14143: if (y == 0) { //y=data=0 14144: z = (short) x; 14145: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 14146: } else { //y=data=1～63 14147: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = y <= 16 ? x << y - 1 : 0) << 1)); 14148: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14149: } 14150: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14151: break; 14152: case 0b110_000 >> 3: //ROXL.W Dq,Dr 14153: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14154: XEiJ.mpuCycleCount += 6 + (y << 1); 14155: //y %= 17; 14156: y = (y & 15) - (y >> 4); //y=data=-3～15 14157: y += y >> 4 & 17; //y=data=0～16 14158: if (y == 0) { //y=data=0 14159: z = (short) x; 14160: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 14161: } else { //y=data=1～16 14162: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14163: if (y == 1) { //y=data=1 14164: t = x; //Cは最後に押し出されたビット 14165: } else { //y=data=2～16 14166: z = (t = z << y - 2) << 1 | (char) x >>> 17 - y; 14167: } 14168: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 14169: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14170: } 14171: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14172: break; 14173: case 0b111_000 >> 3: //ROL.W Dq,Dr 14174: default: 14175: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14176: XEiJ.mpuCycleCount += 6 + (y << 1); 14177: if (y == 0) { 14178: z = (short) x; 14179: t = 0; //Cはクリア 14180: } else { 14181: y &= 15; //y=data=0～15 14182: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y | (char) x >>> 16 - y)); 14183: t = z & 1; //Cは結果の最下位ビット 14184: } 14185: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14186: } 14187: } //irpXxlToRegWord 14188: 14189: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14190: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14191: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14192: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14193: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 14194: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 14195: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 14196: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 14197: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 14198: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 14199: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 14200: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 14201: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 14202: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 14203: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 14204: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 14205: // 14206: //ASL.L #<data>,Dr 14207: //ASL.L Dq,Dr 14208: // 算術左シフトロング 14209: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14210: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ**0 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14211: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0,V=ｱｲ!=0/-1 14212: // : 14213: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ**ﾏ Z=ﾐ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0/-1 14214: // 32 00000000000000000000000000000000 ﾐ01*ﾐ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14215: // 33 00000000000000000000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14216: // CCR 14217: // X countが0のとき変化しない。他は最後に押し出されたビット 14218: // N 結果の最上位ビット 14219: // Z 結果が0のときセット。他はクリア 14220: // V ASRで元に戻せないときセット。他はクリア 14221: // C countが0のときクリア。他は最後に押し出されたビット 14222: // 14223: //LSL.L #<data>,Dr 14224: //LSL.L Dq,Dr 14225: // 論理左シフトロング 14226: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14227: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14228: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14229: // : 14230: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ*0ﾏ Z=ﾐ==0 14231: // 32 00000000000000000000000000000000 ﾐ010ﾐ 14232: // 33 00000000000000000000000000000000 00100 14233: // CCR 14234: // X countが0のとき変化しない。他は最後に押し出されたビット 14235: // N 結果の最上位ビット 14236: // Z 結果が0のときセット。他はクリア 14237: // V 常にクリア 14238: // C countが0のときクリア。他は最後に押し出されたビット 14239: // 14240: //ROL.L #<data>,Dr 14241: //ROL.L Dq,Dr 14242: // 左ローテートロング 14243: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14244: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14245: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14246: // : 14247: // 31 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14248: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14249: // CCR 14250: // X 常に変化しない 14251: // N 結果の最上位ビット 14252: // Z 結果が0のときセット。他はクリア 14253: // V 常にクリア 14254: // C countが0のときクリア。他は結果の最下位ビット 14255: // 14256: //ROXL.L #<data>,Dr 14257: //ROXL.L Dq,Dr 14258: // 拡張左ローテートロング 14259: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14260: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14261: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14262: // 2 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14263: // : 14264: // 31 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 14265: // 32 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 14266: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14267: // CCR 14268: // X countが0のとき変化しない。他は最後に押し出されたビット 14269: // N 結果の最上位ビット 14270: // Z 結果が0のときセット。他はクリア 14271: // V 常にクリア 14272: // C countが0のときXのコピー。他は最後に押し出されたビット 14273: public static void irpXxlToRegLong () throws M68kException { 14274: int rrr; 14275: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 14276: int y; 14277: int z; 14278: int t; 14279: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 14280: case 0b000_000 >> 3: //ASL.L #<data>,Dr 14281: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14282: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14283: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14284: break; 14285: case 0b001_000 >> 3: //LSL.L #<data>,Dr 14286: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14287: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14288: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14289: break; 14290: case 0b010_000 >> 3: //ROXL.L #<data>,Dr 14291: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14292: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14293: if (y == 1 - 1) { //y=data-1=1-1 14294: t = x; 14295: } else { //y=data-1=2-1～8-1 14296: z = (t = z << y - (2 - 1)) << 1 | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 14297: } 14298: XEiJ.regRn[rrr] = z; 14299: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14300: break; 14301: case 0b011_000 >> 3: //ROL.L #<data>,Dr 14302: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14303: XEiJ.regRn[rrr] = z = x << y + 1 | x >>> ~y; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 14304: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 14305: break; 14306: case 0b100_000 >> 3: //ASL.L Dq,Dr 14307: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14308: XEiJ.mpuCycleCount += 8 + (y << 1); 14309: if (y <= 31) { //y=data=0～31 14310: if (y == 0) { //y=data=0 14311: z = x; 14312: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 14313: } else { //y=data=1～31 14314: XEiJ.regRn[rrr] = z = (t = x << y - 1) << 1; 14315: t = (z >> y != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14316: } 14317: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14318: } else { //y=data=32～63 14319: XEiJ.regRn[rrr] = 0; 14320: XEiJ.regCCR = XEiJ.REG_CCR_Z | (x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 32 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 14321: } 14322: break; 14323: case 0b101_000 >> 3: //LSL.L Dq,Dr 14324: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14325: XEiJ.mpuCycleCount += 8 + (y << 1); 14326: if (y == 0) { //y=data=0 14327: z = x; 14328: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 14329: } else { //y=data=1～63 14330: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x << y - 1 : 0) << 1; 14331: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14332: } 14333: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14334: break; 14335: case 0b110_000 >> 3: //ROXL.L Dq,Dr 14336: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14337: XEiJ.mpuCycleCount += 8 + (y << 1); 14338: //y %= 33; 14339: y -= 32 - y >> 6 & 33; //y=data=0～32 14340: if (y == 0) { //y=data=0 14341: z = x; 14342: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 14343: } else { //y=data=1～32 14344: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14345: if (y == 1) { //y=data=1 14346: t = x; //Cは最後に押し出されたビット 14347: } else { //y=data=2～32 14348: z = (t = z << y - 2) << 1 | x >>> 33 - y; 14349: } 14350: XEiJ.regRn[rrr] = z; 14351: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14352: } 14353: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14354: break; 14355: case 0b111_000 >> 3: //ROL.L Dq,Dr 14356: default: 14357: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14358: XEiJ.mpuCycleCount += 8 + (y << 1); 14359: if (y == 0) { 14360: z = x; 14361: t = 0; //Cはクリア 14362: } else { 14363: XEiJ.regRn[rrr] = z = x << y | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるのでy&31をyに、32-(y&31)を-yに省略。y=32のときx|xになるが問題ない 14364: t = z & 1; 14365: } 14366: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14367: } 14368: } //irpXxlToRegLong 14369: 14370: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14371: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14372: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14373: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14374: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 14375: // 14376: //ASL.W #<data>,Dr 14377: //ASL.W Dq,Dr 14378: //ASL.W <ea> 14379: // 算術左シフトワード 14380: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14381: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14382: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 14383: // : 14384: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 14385: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14386: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14387: // CCR 14388: // X countが0のとき変化しない。他は最後に押し出されたビット 14389: // N 結果の最上位ビット 14390: // Z 結果が0のときセット。他はクリア 14391: // V ASRで元に戻せないときセット。他はクリア 14392: // C countが0のときクリア。他は最後に押し出されたビット 14393: public static void irpAslToMem () throws M68kException { 14394: XEiJ.mpuCycleCount += 8; 14395: int ea = XEiJ.regOC & 63; 14396: int a = efaMltWord (ea); 14397: int x = XEiJ.busRws (a); 14398: int z = (short) (x << 1); 14399: XEiJ.busWw (a, z); 14400: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14401: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14402: (x ^ z) >>> 31 << 1 | //Vは最上位ビットが変化したときセット 14403: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14404: } //irpAslToMem 14405: 14406: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14407: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14408: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14409: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14410: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 14411: // 14412: //LSR.W #<data>,Dr 14413: //LSR.W Dq,Dr 14414: //LSR.W <ea> 14415: // 論理右シフトワード 14416: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14417: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14418: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 14419: // : 14420: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 14421: // 16 ................0000000000000000 ｱ010ｱ 14422: // 17 ................0000000000000000 00100 14423: // CCR 14424: // X countが0のとき変化しない。他は最後に押し出されたビット 14425: // N 結果の最上位ビット 14426: // Z 結果が0のときセット。他はクリア 14427: // V 常にクリア 14428: // C countが0のときクリア。他は最後に押し出されたビット 14429: public static void irpLsrToMem () throws M68kException { 14430: XEiJ.mpuCycleCount += 8; 14431: int ea = XEiJ.regOC & 63; 14432: int a = efaMltWord (ea); 14433: int x = XEiJ.busRwz (a); 14434: int z = x >>> 1; 14435: XEiJ.busWw (a, z); 14436: XEiJ.regCCR = ((z == 0 ? XEiJ.REG_CCR_Z : 0) | 14437: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14438: } //irpLsrToMem 14439: 14440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14441: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14442: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14443: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14444: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 14445: // 14446: //LSL.W #<data>,Dr 14447: //LSL.W Dq,Dr 14448: //LSL.W <ea> 14449: // 論理左シフトワード 14450: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14451: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14452: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14453: // : 14454: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 14455: // 16 ................0000000000000000 ﾀ010ﾀ 14456: // 17 ................0000000000000000 00100 14457: // CCR 14458: // X countが0のとき変化しない。他は最後に押し出されたビット 14459: // N 結果の最上位ビット 14460: // Z 結果が0のときセット。他はクリア 14461: // V 常にクリア 14462: // C countが0のときクリア。他は最後に押し出されたビット 14463: public static void irpLslToMem () throws M68kException { 14464: XEiJ.mpuCycleCount += 8; 14465: int ea = XEiJ.regOC & 63; 14466: int a = efaMltWord (ea); 14467: int x = XEiJ.busRws (a); 14468: int z = (short) (x << 1); 14469: XEiJ.busWw (a, z); 14470: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14471: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14472: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14473: } //irpLslToMem 14474: 14475: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14476: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14477: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14478: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14479: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 14480: // 14481: //ROXR.W #<data>,Dr 14482: //ROXR.W Dq,Dr 14483: //ROXR.W <ea> 14484: // 拡張右ローテートワード 14485: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14486: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14487: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14488: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14489: // : 14490: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14491: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14492: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14493: // CCR 14494: // X countが0のとき変化しない。他は最後に押し出されたビット 14495: // N 結果の最上位ビット 14496: // Z 結果が0のときセット。他はクリア 14497: // V 常にクリア 14498: // C countが0のときXのコピー。他は最後に押し出されたビット 14499: public static void irpRoxrToMem () throws M68kException { 14500: XEiJ.mpuCycleCount += 8; 14501: int ea = XEiJ.regOC & 63; 14502: int a = efaMltWord (ea); 14503: int x = XEiJ.busRwz (a); 14504: int z = -(XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | x >>> 1; 14505: XEiJ.busWw (a, z); 14506: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14507: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14508: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14509: } //irpRoxrToMem 14510: 14511: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14512: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14513: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14514: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14515: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 14516: // 14517: //ROXL.W #<data>,Dr 14518: //ROXL.W Dq,Dr 14519: //ROXL.W <ea> 14520: // 拡張左ローテートワード 14521: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14522: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14523: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14524: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14525: // : 14526: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14527: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14528: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14529: // CCR 14530: // X countが0のとき変化しない。他は最後に押し出されたビット 14531: // N 結果の最上位ビット 14532: // Z 結果が0のときセット。他はクリア 14533: // V 常にクリア 14534: // C countが0のときXのコピー。他は最後に押し出されたビット 14535: public static void irpRoxlToMem () throws M68kException { 14536: XEiJ.mpuCycleCount += 8; 14537: int ea = XEiJ.regOC & 63; 14538: int a = efaMltWord (ea); 14539: int x = XEiJ.busRws (a); 14540: int z = (short) (x << 1 | XEiJ.regCCR >> 4 & 1); 14541: XEiJ.busWw (a, z); 14542: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14543: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14544: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14545: } //irpRoxlToMem 14546: 14547: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14548: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14549: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14550: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14551: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 14552: // 14553: //ROR.W #<data>,Dr 14554: //ROR.W Dq,Dr 14555: //ROR.W <ea> 14556: // 右ローテートワード 14557: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14558: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14559: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14560: // : 14561: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14562: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14563: // CCR 14564: // X 常に変化しない 14565: // N 結果の最上位ビット 14566: // Z 結果が0のときセット。他はクリア 14567: // V 常にクリア 14568: // C countが0のときクリア。他は結果の最上位ビット 14569: public static void irpRorToMem () throws M68kException { 14570: XEiJ.mpuCycleCount += 8; 14571: int ea = XEiJ.regOC & 63; 14572: int a = efaMltWord (ea); 14573: int x = XEiJ.busRwz (a); 14574: int z = (short) (x << 15 | x >>> 1); 14575: XEiJ.busWw (a, z); 14576: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14577: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14578: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14579: z >>> 31); //Cは結果の最上位ビット 14580: } //irpRorToMem 14581: 14582: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14583: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14584: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14585: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14586: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 14587: // 14588: //ROL.W #<data>,Dr 14589: //ROL.W Dq,Dr 14590: //ROL.W <ea> 14591: // 左ローテートワード 14592: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14593: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14594: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14595: // : 14596: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14597: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14598: // CCR 14599: // X 常に変化しない 14600: // N 結果の最上位ビット 14601: // Z 結果が0のときセット。他はクリア 14602: // V 常にクリア 14603: // C countが0のときクリア。他は結果の最下位ビット 14604: public static void irpRolToMem () throws M68kException { 14605: XEiJ.mpuCycleCount += 8; 14606: int ea = XEiJ.regOC & 63; 14607: int a = efaMltWord (ea); 14608: int x = XEiJ.busRwz (a); 14609: int z = (short) (x << 1 | x >>> 15); 14610: XEiJ.busWw (a, z); 14611: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14612: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14613: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14614: z & 1); //Cは結果の最下位ビット 14615: } //irpRolToMem 14616: 14617: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14618: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14619: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14620: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14621: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 14622: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 14623: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 14624: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 14625: public static void irpBftst () throws M68kException { 14626: int w; 14627: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14628: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14629: } else { 14630: w = XEiJ.regPC; 14631: XEiJ.regPC = w + 2; 14632: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14633: } 14634: if ((w & ~0b0000_111_111_111_111) != 0 || 14635: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14636: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14637: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14638: throw M68kException.m6eSignal; 14639: } 14640: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14641: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14642: XEiJ.mpuCycleCount += 4; 14643: int ea = XEiJ.regOC & 63; 14644: int z; 14645: if (ea < XEiJ.EA_AR) { //BFTST Dr{～} 14646: z = XEiJ.regRn[ea]; 14647: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14648: } else { //BFTST <mem>{～} 14649: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14650: o &= 7; 14651: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14652: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o : //不要なバイトにアクセスしない 14653: z == 1 ? XEiJ.busRws (a) << 16 + o : //020以上なのでアドレスエラーは出ない 14654: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o : 14655: z == 3 ? XEiJ.busRls (a) << o : 14656: XEiJ.busRls (a) << o | XEiJ.busRbz (a + 4) >>> 8 - o); 14657: } 14658: z >>= w; //符号拡張。下位のゴミを消す 14659: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14660: } //irpBftst 14661: 14662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14663: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14664: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14665: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14666: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 14667: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 14668: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 14669: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 14670: public static void irpBfextu () throws M68kException { 14671: int w; 14672: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14673: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14674: } else { 14675: w = XEiJ.regPC; 14676: XEiJ.regPC = w + 2; 14677: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14678: } 14679: if ((w & ~0b0111_111_111_111_111) != 0 || 14680: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14681: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14682: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14683: throw M68kException.m6eSignal; 14684: } 14685: int n = w >> 12; 14686: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14687: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14688: XEiJ.mpuCycleCount += 4; 14689: int ea = XEiJ.regOC & 63; 14690: int z; 14691: if (ea < XEiJ.EA_AR) { //BFEXTU Dr{～} 14692: z = XEiJ.regRn[ea]; 14693: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14694: } else { //BFEXTU <mem>{～} 14695: int a = efaCntLong (ea) + (o >> 3); 14696: o &= 7; 14697: z = 31 - w + o >> 3; 14698: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o : //不要なバイトにアクセスしない 14699: z == 1 ? XEiJ.busRws (a) << 16 + o : //020以上なのでアドレスエラーは出ない 14700: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o : 14701: z == 3 ? XEiJ.busRls (a) << o : 14702: XEiJ.busRls (a) << o | XEiJ.busRbz (a + 4) >>> 8 - o); 14703: } 14704: XEiJ.regRn[n] = z >>> w; //ゼロ拡張 14705: z >>= w; //符号拡張。下位のゴミを消す 14706: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14707: } //irpBfextu 14708: 14709: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14710: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14711: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14712: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14713: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 14714: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 14715: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 14716: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 14717: public static void irpBfchg () throws M68kException { 14718: int w; 14719: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14720: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14721: } else { 14722: w = XEiJ.regPC; 14723: XEiJ.regPC = w + 2; 14724: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14725: } 14726: if ((w & ~0b0000_111_111_111_111) != 0 || 14727: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14728: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14729: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14730: throw M68kException.m6eSignal; 14731: } 14732: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14733: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14734: XEiJ.mpuCycleCount += 4; 14735: int ea = XEiJ.regOC & 63; 14736: int z; 14737: if (ea < XEiJ.EA_AR) { //BFCHG Dr{～} 14738: z = XEiJ.regRn[ea]; 14739: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14740: int t = z ^ -1 << w; //フィールドの幅だけ反転する 14741: XEiJ.regRn[ea] = t << -o | t >>> o; 14742: } else { //BFCHG <mem>{～} 14743: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14744: o &= 7; 14745: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14746: if (z == 0) { 14747: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14748: int t = XEiJ.busRbs (a) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14749: z = t << o; // z abcde-00 00000000 00000000 00000000 14750: // // -1<<w 11111000 00000000 00000000 00000000 14751: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14752: // //t^-1<<w>>>o --ABCDE- 00000000 00000000 00000000 14753: XEiJ.busWb (a, (t ^ -1 << w >>> o) >>> 24); // <ea> --ABCDE- 14754: } else if (z == 1) { 14755: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14756: int t = XEiJ.busRws (a) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14757: z = t << o; // z abcde--- -0000000 00000000 00000000 14758: // // -1<<w 11111000 00000000 00000000 00000000 14759: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14760: // //t^-1<<w>>>o -------A BCDE---- 00000000 00000000 14761: XEiJ.busWw (a, (t ^ -1 << w >>> o) >>> 16); // <ea> -------A BCDE---- 14762: } else if (z == 2) { 14763: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14764: int t = XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8; // t -------a bcdefghi jkl----- 00000000 14765: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14766: // // -1<<w 11111111 11110000 00000000 00000000 14767: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14768: t ^= -1 << w >>> o; // t -------A BCDEFGHI JKL----- 00000000 14769: XEiJ.busWw (a, t >>> 16); // <ea> -------A BCDEFGHI jkl----- 14770: XEiJ.busWb (a + 2, t >>> 8); // <ea> -------A BCDEFGHI JKL----- 14771: } else if (z == 3) { 14772: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14773: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rs------ 14774: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14775: // // -1<<w 11111111 11111111 11100000 00000000 14776: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14777: XEiJ.busWl (a, t ^ -1 << w >>> o); // <ea> -------A BCDEFGHI JKLMNOPQ RS------ 14778: } else { 14779: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14780: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rstuvwxy 14781: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14782: // -1>>>o 00000001 11111111 11111111 11111111 14783: XEiJ.busWl (a, t ^ -1 >>> o); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY 14784: t = XEiJ.busRbz (a + 4); // t 00000000 00000000 00000000 z------- 14785: // // t>>>8-o 00000000 00000000 00000000 0z------ 14786: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14787: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14788: XEiJ.busWb (a + 4, t ^ -1 << 8 - o + w); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY Z------- 14789: } 14790: } 14791: z >>= w; //符号拡張。下位のゴミを消す 14792: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14793: } //irpBfchg 14794: 14795: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14796: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14797: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14798: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14799: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 14800: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 14801: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 14802: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 14803: public static void irpBfexts () throws M68kException { 14804: int w; 14805: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14806: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14807: } else { 14808: w = XEiJ.regPC; 14809: XEiJ.regPC = w + 2; 14810: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14811: } 14812: if ((w & ~0b0111_111_111_111_111) != 0 || 14813: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14814: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14815: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14816: throw M68kException.m6eSignal; 14817: } 14818: int n = w >> 12; 14819: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14820: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14821: XEiJ.mpuCycleCount += 4; 14822: int ea = XEiJ.regOC & 63; 14823: int z; 14824: if (ea < XEiJ.EA_AR) { //BFEXTS Dr{～} 14825: z = XEiJ.regRn[ea]; 14826: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14827: } else { //BFEXTS <mem>{～} 14828: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14829: o &= 7; 14830: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14831: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o : //不要なバイトにアクセスしない 14832: z == 1 ? XEiJ.busRws (a) << 16 + o : //020以上なのでアドレスエラーは出ない 14833: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o : 14834: z == 3 ? XEiJ.busRls (a) << o : 14835: XEiJ.busRls (a) << o | XEiJ.busRbz (a + 4) >>> 8 - o); 14836: } 14837: XEiJ.regRn[n] = z >>= w; //符号拡張。下位のゴミを消す 14838: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14839: } //irpBfexts 14840: 14841: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14842: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14843: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14844: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14845: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 14846: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 14847: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 14848: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 14849: public static void irpBfclr () throws M68kException { 14850: int w; 14851: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14852: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14853: } else { 14854: w = XEiJ.regPC; 14855: XEiJ.regPC = w + 2; 14856: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14857: } 14858: if ((w & ~0b0000_111_111_111_111) != 0 || 14859: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14860: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14861: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14862: throw M68kException.m6eSignal; 14863: } 14864: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14865: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14866: XEiJ.mpuCycleCount += 4; 14867: int ea = XEiJ.regOC & 63; 14868: int z; 14869: if (ea < XEiJ.EA_AR) { //BFCLR Dr{～} 14870: z = XEiJ.regRn[ea]; 14871: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14872: int t = z & ~(-1 << w); //フィールドの幅だけ0を並べる 14873: XEiJ.regRn[ea] = t << -o | t >>> o; 14874: } else { //BFCLR <mem>{～} 14875: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14876: o &= 7; 14877: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14878: if (z == 0) { 14879: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14880: int t = XEiJ.busRbs (a) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14881: z = t << o; // z abcde-00 00000000 00000000 00000000 14882: // // -1<<w 11111000 00000000 00000000 00000000 14883: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14884: // //~(-1<<w>>>o) 11000001 11111111 11111111 11111111 14885: // //t&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 14886: XEiJ.busWb (a, (t & ~(-1 << w >>> o)) >>> 24); // <ea> --00000- 14887: } else if (z == 1) { 14888: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14889: int t = XEiJ.busRws (a) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14890: z = t << o; // z abcde--- -0000000 00000000 00000000 14891: // // -1<<w 11111000 00000000 00000000 00000000 14892: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14893: // //~(-1<<w>>>o) 11111110 00001111 11111111 11111111 14894: // //t&~(-1<<w>>>o) -------0 0000---- 00000000 00000000 14895: XEiJ.busWw (a, (t & ~(-1 << w >>> o)) >>> 16); // <ea> -------0 0000---- 14896: } else if (z == 2) { 14897: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14898: int t = XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8; // t -------a bcdefghi jkl----- 00000000 14899: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14900: // // -1<<w 11111111 11110000 00000000 00000000 14901: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14902: // //~(-1<<w>>>o) 11111110 00000000 00011111 11111111 14903: t &= ~(-1 << w >>> o); // t -------0 00000000 000----- 00000000 14904: XEiJ.busWw (a, t >>> 16); // <ea> -------0 00000000 jkl----- 14905: XEiJ.busWb (a + 2, t >>> 8); // <ea> -------0 00000000 000----- 14906: } else if (z == 3) { 14907: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14908: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rs------ 14909: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14910: // // -1<<w 11111111 11111111 11100000 00000000 14911: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14912: // //~(-1<<w>>>o) 11111110 00000000 00000000 00111111 14913: XEiJ.busWl (a, t & ~(-1 << w >>> o)); // <ea> -------0 00000000 00000000 00------ 14914: } else { 14915: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14916: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rstuvwxy 14917: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14918: // -1>>>o 00000001 11111111 11111111 11111111 14919: // ~(-1>>>o) 11111110 00000000 00000000 00000000 14920: XEiJ.busWl (a, t & ~(-1 >>> o)); // <ea> -------0 00000000 00000000 00000000 14921: t = XEiJ.busRbz (a + 4); // t 00000000 00000000 00000000 z------- 14922: // // t>>>8-o 00000000 00000000 00000000 0z------ 14923: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14924: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14925: // //~(-1<<8-o+w) 00000000 00000000 00000000 01111111 14926: XEiJ.busWb (a + 4, t & ~(-1 << 8 - o + w)); // <ea> -------0 00000000 00000000 00000000 0------- 14927: } 14928: } 14929: z >>= w; //符号拡張。下位のゴミを消す 14930: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14931: } //irpBfclr 14932: 14933: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14934: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14935: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14936: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14937: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 14938: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 14939: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 14940: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 14941: public static void irpBfffo () throws M68kException { 14942: int w; 14943: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14944: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14945: } else { 14946: w = XEiJ.regPC; 14947: XEiJ.regPC = w + 2; 14948: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14949: } 14950: if ((w & ~0b0111_111_111_111_111) != 0 || 14951: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14952: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14953: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14954: throw M68kException.m6eSignal; 14955: } 14956: int n = w >> 12; 14957: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14958: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14959: XEiJ.mpuCycleCount += 4; 14960: int ea = XEiJ.regOC & 63; 14961: int z; 14962: if (ea < XEiJ.EA_AR) { //BFFFO Dr{～} 14963: z = XEiJ.regRn[ea]; 14964: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14965: } else { //BFFFO <mem>{～} 14966: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14967: int o7 = o & 7; 14968: z = 31 - w + o7 >> 3; //フィールドが跨ぐバイト境界の数。0～4 14969: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o7 : //不要なバイトにアクセスしない 14970: z == 1 ? XEiJ.busRws (a) << 16 + o7 : //020以上なのでアドレスエラーは出ない 14971: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o7 : 14972: z == 3 ? XEiJ.busRls (a) << o7 : 14973: XEiJ.busRls (a) << o7 | XEiJ.busRbz (a + 4) >>> 8 - o7); 14974: } 14975: if (true) { 14976: XEiJ.regRn[n] = Integer.numberOfLeadingZeros (z >>> w) - w + o; //ゼロ拡張してから1のビットを探す。見つからないときはoffset+widthになる 14977: } else { 14978: int t = z >>> w; 14979: if (t == 0) { 14980: XEiJ.regRn[n] = 32 - w + o; 14981: } else { 14982: int k = -(t >>> 16) >> 16 & 16; 14983: k += -(t >>> k + 8) >> 8 & 8; 14984: k += -(t >>> k + 4) >> 4 & 4; 14985: // bit3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 14986: // bit2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 14987: // bit1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 14988: // bit0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 14989: XEiJ.regRn[n] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (t >>> k << 1)) & 3) + k - w + o; //intのシフトカウントは下位5bitだけが使用される 14990: } 14991: } 14992: z >>= w; //符号拡張。下位のゴミを消す 14993: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14994: } //irpBfffo 14995: 14996: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14997: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14998: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14999: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15000: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 15001: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 15002: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 15003: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 15004: public static void irpBfset () throws M68kException { 15005: int w; 15006: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 15007: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 15008: } else { 15009: w = XEiJ.regPC; 15010: XEiJ.regPC = w + 2; 15011: w = XEiJ.busRwze (w); //pcwz。拡張ワード 15012: } 15013: if ((w & ~0b0000_111_111_111_111) != 0 || 15014: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 15015: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 15016: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 15017: throw M68kException.m6eSignal; 15018: } 15019: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 15020: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 15021: XEiJ.mpuCycleCount += 4; 15022: int ea = XEiJ.regOC & 63; 15023: int z; 15024: if (ea < XEiJ.EA_AR) { //BFSET Dr{～} 15025: z = XEiJ.regRn[ea]; 15026: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 15027: int t = z | -1 << w; //フィールドの幅だけ1を並べる 15028: XEiJ.regRn[ea] = t << -o | t >>> o; 15029: } else { //BFSET <mem>{～} 15030: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 15031: o &= 7; 15032: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 15033: if (z == 0) { 15034: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 15035: int t = XEiJ.busRbs (a) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 15036: z = t << o; // z abcde-00 00000000 00000000 00000000 15037: // // -1<<w 11111000 00000000 00000000 00000000 15038: // // -1<<w>>>o 00111110 00000000 00000000 00000000 15039: // //t|-1<<w>>>o --11111- 00000000 00000000 00000000 15040: XEiJ.busWb (a, (t | -1 << w >>> o) >>> 24); // <ea> --11111- 15041: } else if (z == 1) { 15042: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 15043: int t = XEiJ.busRws (a) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 15044: z = t << o; // z abcde--- -0000000 00000000 00000000 15045: // // -1<<w 11111000 00000000 00000000 00000000 15046: // // -1<<w>>>o 00000001 11110000 00000000 00000000 15047: // //t|-1<<w>>>o -------1 1111---- 00000000 00000000 15048: XEiJ.busWw (a, (t | -1 << w >>> o) >>> 16); // <ea> -------1 1111---- 15049: } else if (z == 2) { 15050: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 15051: int t = XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8; // t -------a bcdefghi jkl----- 00000000 15052: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 15053: // // -1<<w 11111111 11110000 00000000 00000000 15054: // // -1<<w>>>o 00000001 11111111 11100000 00000000 15055: t |= -1 << w >>> o; // t -------1 11111111 111----- 00000000 15056: XEiJ.busWw (a, t >>> 16); // <ea> -------1 11111111 jkl----- 15057: XEiJ.busWb (a + 2, t >>> 8); // <ea> -------1 11111111 111----- 15058: } else if (z == 3) { 15059: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 15060: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rs------ 15061: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 15062: // // -1<<w 11111111 11111111 11100000 00000000 15063: // // -1<<w>>>o 00000001 11111111 11111111 11000000 15064: XEiJ.busWl (a, t | -1 << w >>> o); // <ea> -------1 11111111 11111111 11------ 15065: } else { 15066: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 15067: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rstuvwxy 15068: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 15069: // -1>>>o 00000001 11111111 11111111 11111111 15070: XEiJ.busWl (a, t | -1 >>> o); // <ea> -------1 11111111 11111111 11111111 15071: t = XEiJ.busRbz (a + 4); // t 00000000 00000000 00000000 z------- 15072: // // t>>>8-o 00000000 00000000 00000000 0z------ 15073: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 15074: // // -1<<8-o+w 11111111 11111111 11111111 10000000 15075: XEiJ.busWb (a + 4, t | -1 << 8 - o + w); // <ea> -------1 11111111 11111111 11111111 1------- 15076: } 15077: } 15078: z >>= w; //符号拡張。下位のゴミを消す 15079: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 15080: } //irpBfset 15081: 15082: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15083: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15084: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15085: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15086: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 15087: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 15088: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 15089: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 15090: public static void irpBfins () throws M68kException { 15091: int w; 15092: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 15093: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 15094: } else { 15095: w = XEiJ.regPC; 15096: XEiJ.regPC = w + 2; 15097: w = XEiJ.busRwze (w); //pcwz。拡張ワード 15098: } 15099: if ((w & ~0b0111_111_111_111_111) != 0 || 15100: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 15101: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 15102: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 15103: throw M68kException.m6eSignal; 15104: } 15105: int n = w >> 12; 15106: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 15107: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 15108: XEiJ.mpuCycleCount += 4; 15109: int ea = XEiJ.regOC & 63; 15110: int z = XEiJ.regRn[n] << w; //z=Dn<<-width 15111: if (ea < XEiJ.EA_AR) { //BFINS Dn,Dr{～} 15112: // Dr{30,5} o=30,w=32-5=27 t=Dr cde----- -------- -------- ------ab 15113: // t<<o ab000000 00000000 00000000 00000000 15114: // t>>>-o 00cde--- -------- -------- -------- 15115: // t<<o|t>>>-o abcde--- -------- -------- -------- 15116: // -1<<w 11111000 00000000 00000000 00000000 15117: // ~(-1<<w) 00000111 11111111 11111111 11111111 15118: // (t<<o|t>>>-o)&~(-1<<w) 00000--- -------- -------- -------- 15119: // r[n] -------- -------- -------- ---ABCDE 15120: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 15121: // t=(t<<o|t>>>-o)&~(-1<<w)|z ABCDE--- -------- -------- -------- 15122: // t<<-o CDE----- -------- -------- ------00 15123: // t>>>o 00000000 00000000 00000000 000000AB 15124: // t<<-o|t>>>o CDE----- -------- -------- ------AB 15125: int t = XEiJ.regRn[ea]; 15126: t = (t << o | t >>> -o) & ~(-1 << w) | z; 15127: XEiJ.regRn[ea] = t << -o | t >>> o; 15128: } else { //BFINS Dn,<mem>{～} 15129: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 15130: o &= 7; 15131: n = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 15132: if (n == 0) { 15133: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 15134: // XEiJ.busRbs(a)<<24 --abcde- 00000000 00000000 00000000 15135: // -1<<w 11111000 00000000 00000000 00000000 15136: // -1<<w>>>o 00111110 00000000 00000000 00000000 15137: // ~(-1<<w>>>o) 11000001 11111111 11111111 11111111 15138: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 15139: // r[n] -------- -------- -------- ---ABCDE 15140: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 15141: // z>>>o 00ABCDE0 00000000 00000000 00000000 15142: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o)|z>>>o --ABCDE- 00000000 00000000 00000000 15143: XEiJ.busWb (a, (XEiJ.busRbs (a) << 24 & ~(-1 << w >>> o) | z >>> o) >>> 24); 15144: } else if (n == 1) { 15145: // <ea>{3,11} o=3,w=32-11=21 <ea> ---abcde fghijk-- 15146: // rws(a)<<16 ---abcde fghijk-- 00000000 00000000 15147: // -1<<w 11111111 11100000 00000000 00000000 15148: // -1<<w>>>o 00011111 11111100 00000000 00000000 15149: // ~(-1<<w>>>o) 11100000 00000011 11111111 11111111 15150: // rws(a)<<16&~(-1<<w>>>o) ---00000 000000-- 00000000 00000000 15151: // r[n] -------- -------- -----ABC DEFGHIJK 15152: // z=r[n]<<w ABCDEFGH IJK00000 00000000 00000000 15153: // z>>>o 000ABCDE FGHIJK00 00000000 00000000 15154: // rws(a)<<16&~(-1<<w>>>o)|z>>>o ---ABCDE FGHIJK-- 00000000 00000000 15155: XEiJ.busWw (a, (XEiJ.busRws (a) << 16 & ~(-1 << w >>> o) | z >>> o) >>> 16); 15156: } else if (n == 2) { 15157: // <ea>{4,17} o=4,w=32-17=15 <ea> ----abcd efghijkl mnopq--- 15158: // rws(a)<<16|rbz(a+2)<<8 ----abcd efghijkl mnopq--- 00000000 15159: // -1<<w 11111111 11111111 10000000 00000000 15160: // -1<<w>>>o 00001111 11111111 11111000 00000000 15161: // ~(-1<<w>>>o) 11110000 00000000 00000111 11111111 15162: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o) ----0000 00000000 00000--- 00000000 15163: // r[n] -------- -------A BCDEFGHI JKLMNOPQ 15164: // z=r[n]<<w ABCDEFGH IJKLMNOP Q0000000 00000000 15165: // z>>>o 0000ABCD EFGHIJKL MNOPQ000 00000000 15166: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)|z>>>o ----ABCD EFGHIJKL MNOPQ--- 00000000 15167: int t = (XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8) & ~(-1 << w >>> o) | z >>> o; 15168: XEiJ.busWw (a, t >>> 16); 15169: XEiJ.busWb (a + 2, t >>> 8); 15170: } else if (n == 3) { 15171: // <ea>{5,23} o=5,w=32-23=9 <ea> -----abc defghijk lmnopqrs tuvw---- 15172: // rls(a) -----abc defghijk lmnopqrs tuvw---- 15173: // -1<<w 11111111 11111111 11111110 00000000 15174: // -1<<w>>>o 00000111 11111111 11111111 11110000 15175: // ~(-1<<w>>>o) 11111000 00000000 00000000 00001111 15176: // rls(a)&~(-1<<w>>>o) -----000 00000000 00000000 0000---- 15177: // r[n] -------- -ABCDEFG HIJKLMNO PQRSTUVW 15178: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVW0 00000000 15179: // z>>>o 00000ABC DEFGHIJK LMNOPQRS TUVW0000 15180: // rls(a)&~(-1<<w>>>o)|z>>>o -----ABC DEFGHIJK LMNOPQRS TUVW---- 15181: XEiJ.busWl (a, XEiJ.busRls (a) & ~(-1 << w >>> o) | z >>> o); 15182: } else { 15183: // <ea>{6,29} o=6,w=32-29=3 <ea> ------ab cdefghij klmnopqr stuvwxyz abc----- 15184: // rls(a) ------ab cdefghij klmnopqr stuvwxyz 15185: // -1>>>o 00000011 11111111 11111111 11111111 15186: // ~(-1>>>o) 11111100 00000000 00000000 00000000 15187: // rls(a)&~(-1>>>o) ------00 00000000 00000000 00000000 15188: // r[n] ---ABCDE FGHIJKLM NOPQRSTU VWXYZABC 15189: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVWX YZABC000 15190: // z>>>o 000000AB CDEFGHIJ KLMNOPQR STUVWXYZ 15191: // rls(a)&~(-1>>>o)|z>>>o ------AB CDEFGHIJ KLMNOPQR STUVWXYZ 15192: XEiJ.busWl (a, XEiJ.busRls (a) & ~(-1 >>> o) | z >>> o); 15193: // rbz(a+4) 00000000 00000000 00000000 abc----- 15194: // -1<<8-o+w 11111111 11111111 11111111 11100000 15195: // ~(-1<<8-o+w) 00000000 00000000 00000000 00011111 15196: // rbz(a+4)&~(-1<<8-o+w) 00000000 00000000 00000000 000----- 15197: // z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC00000 15198: // rbz(a+4)&~(-1<<8-o+w)|z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC----- 15199: XEiJ.busWb (a + 4, XEiJ.busRbz (a + 4) & ~(-1 << 8 - o + w) | z << 8 - o); 15200: } 15201: } 15202: //zは上位に寄ったままだが下位の空きは0なのでそのままテストする 15203: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 15204: } //irpBfins 15205: 15206: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15207: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15208: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15210: //PFLUSHA |-|---3--|P|-----|-----| |1111_000_000_000_000-0010010000000000 15211: //PFLUSH SFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00000 15212: //PFLUSH DFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00001 15213: //PFLUSH Dn,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm01nnn 15214: //PFLUSH #<data>,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm10ddd 15215: //PMOVE.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0000000000 15216: //PMOVEFD.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0100000000 15217: //PMOVE.L TTn,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n1000000000 15218: //PLOADW SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000000 15219: //PLOADW DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000001 15220: //PLOADW Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000001nnn 15221: //PLOADW #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000010ddd 15222: //PLOADR SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000000 15223: //PLOADR DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000001 15224: //PLOADR Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000001nnn 15225: //PLOADR #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000010ddd 15226: //PFLUSH SFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00000 15227: //PFLUSH DFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00001 15228: //PFLUSH Dn,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm01nnn 15229: //PFLUSH #<data>,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm10ddd 15230: //PMOVE.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000000000000 15231: //PMOVEFD.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000100000000 15232: //PMOVE.L TC,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100001000000000 15233: //PMOVE.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100000000000 15234: //PMOVEFD.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100100000000 15235: //PMOVE.Q SRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100101000000000 15236: //PMOVE.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110000000000 15237: //PMOVEFD.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110100000000 15238: //PMOVE.Q CRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100111000000000 15239: //PMOVE.W <ea>,MMUSR |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110000000000000 15240: //PMOVE.W MMUSR,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110001000000000 15241: //PTESTW SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000000 15242: //PTESTW DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000001 15243: //PTESTW Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000001nnn 15244: //PTESTW #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000010ddd 15245: //PTESTW SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00000 15246: //PTESTW DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00001 15247: //PTESTW Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn01nnn 15248: //PTESTW #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn10ddd 15249: //PTESTR SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000000 15250: //PTESTR DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000001 15251: //PTESTR Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000001nnn 15252: //PTESTR #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000010ddd 15253: //PTESTR SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00000 15254: //PTESTR DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00001 15255: //PTESTR Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn01nnn 15256: //PTESTR #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn10ddd 15257: public static void irpPgen () throws M68kException { 15258: int ea = XEiJ.regOC & 63; 15259: int mmm = ea >> 3; 15260: if (mmm == XEiJ.MMM_DR || 15261: mmm == XEiJ.MMM_MM || 15262: mmm == XEiJ.MMM_MW || 15263: mmm == XEiJ.MMM_MX || 15264: ea == XEiJ.EA_ZW || 15265: ea == XEiJ.EA_ZL) { 15266: //! 未対応。030チェックを通すためのダミー。拡張ワードを読み飛ばして何もしない 15267: XEiJ.regPC += 2; //第2オペコード 15268: if (ea >= XEiJ.EA_MM) { 15269: efaAnyByte (ea); 15270: } 15271: } else { 15272: irpFline (); 15273: } 15274: } //irpPgen 15275: 15276: //浮動小数点例外 15277: // 48 BSUN FP分岐または比較不能状態でのセット 15278: // 49 INEX FP不正確な結果 15279: // 50 DZ FPゼロによる除算 15280: // 51 UNFL FPアンダーフロー 15281: // 52 OPERR FPオペランドエラー 15282: // 53 OVFL FPオーバーフロー 15283: // 54 SNAN FPシグナリングNAN 15284: // 55 FP未実装データ型 15285: //FPSRのビットオフセット→例外ベクタ番号 15286: /* 15287: public static final int[] FP_OFFSET_TO_NUMBER = { 15288: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15289: 48, //16 15 BSUN 48 BSUN FP分岐または比較不能状態でのセット 15290: 54, //17 14 SNAN 54 SNAN FPシグナリングNAN 15291: 52, //18 13 OPERR 52 OPERR FPオペランドエラー 15292: 53, //19 12 OVFL 53 OVFL FPオーバーフロー 15293: 51, //20 11 UNFL 51 UNFL FPアンダーフロー 15294: 50, //21 10 DZ 50 DZ FPゼロによる除算 15295: 49, //22 9 INEX2 49 INEX FP不正確な結果 15296: 49, //23 8 INEX1 49 INEX FP不正確な結果 15297: 0, 0, 0, 0, 0, 0, 0, 0, 15298: }; 15299: */ 15300: public static final byte[] FP_OFFSET_TO_NUMBER = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\00006453211\0\0\0\0\0\0\0\0".getBytes (XEiJ.ISO_8859_1); 15301: 15302: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15303: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15304: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15306: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 15307: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 15308: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 15309: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 15310: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 15311: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 15312: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 15313: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 15314: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 15315: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 15316: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 15317: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 15318: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 15319: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 15320: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 15321: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 15322: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 15323: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 15324: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 15325: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 15326: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 15327: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 15328: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 15329: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 15330: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 15331: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 15332: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 15333: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 15334: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 15335: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 15336: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 15337: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 15338: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 15339: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 15340: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 15341: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 15342: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 15343: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 15344: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 15345: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 15346: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 15347: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 15348: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 15349: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15350: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15351: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15352: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15353: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15354: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15355: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 15356: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 15357: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 15358: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 15359: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 15360: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 15361: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 15362: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 15363: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 15364: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 15365: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 15366: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 15367: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 15368: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 15369: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 15370: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 15371: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 15372: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 15373: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 15374: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 15375: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 15376: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 15377: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 15378: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 15379: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 15380: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 15381: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 15382: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 15383: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 15384: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 15385: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 15386: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 15387: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 15388: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 15389: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 15390: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 15391: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 15392: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 15393: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 15394: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 15395: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 15396: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 15397: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 15398: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 15399: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 15400: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 15401: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 15402: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 15403: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 15404: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 15405: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 15406: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 15407: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 15408: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 15409: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 15410: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 15411: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 15412: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 15413: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 15414: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 15415: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 15416: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 15417: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 15418: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 15419: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 15420: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 15421: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 15422: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 15423: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 15424: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 15425: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 15426: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 15427: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 15428: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 15429: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 15430: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 15431: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 15432: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 15433: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 15434: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 15435: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 15436: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 15437: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 15438: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 15439: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 15440: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 15441: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 15442: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 15443: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 15444: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 15445: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 15446: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 15447: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 15448: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 15449: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 15450: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 15451: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 15452: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 15453: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 15454: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 15455: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 15456: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 15457: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 15458: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 15459: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 15460: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 15461: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 15462: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 15463: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 15464: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 15465: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 15466: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 15467: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 15468: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 15469: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 15470: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 15471: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 15472: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 15473: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 15474: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 15475: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 15476: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 15477: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 15478: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 15479: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 15480: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 15481: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 15482: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 15483: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 15484: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 15485: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 15486: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 15487: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 15488: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 15489: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 15490: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 15491: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 15492: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 15493: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 15494: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 15495: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 15496: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 15497: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 15498: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 15499: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 15500: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 15501: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 15502: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 15503: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 15504: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 15505: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 15506: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 15507: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15508: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15509: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15510: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15511: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15512: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15513: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 15514: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 15515: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 15516: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 15517: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 15518: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 15519: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 15520: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 15521: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 15522: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 15523: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 15524: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 15525: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 15526: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 15527: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 15528: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 15529: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 15530: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 15531: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 15532: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 15533: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 15534: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 15535: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 15536: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 15537: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 15538: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 15539: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 15540: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 15541: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 15542: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 15543: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 15544: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 15545: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 15546: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 15547: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 15548: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 15549: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 15550: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 15551: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 15552: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 15553: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 15554: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 15555: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 15556: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 15557: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 15558: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 15559: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 15560: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 15561: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 15562: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 15563: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 15564: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 15565: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 15566: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 15567: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 15568: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 15569: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 15570: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 15571: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 15572: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 15573: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 15574: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 15575: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 15576: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 15577: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 15578: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 15579: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 15580: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 15581: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 15582: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 15583: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 15584: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 15585: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 15586: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 15587: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 15588: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 15589: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 15590: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 15591: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 15592: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 15593: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 15594: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 15595: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 15596: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 15597: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 15598: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 15599: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 15600: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 15601: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 15602: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 15603: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 15604: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 15605: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 15606: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 15607: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 15608: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 15609: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 15610: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 15611: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 15612: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 15613: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 15614: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 15615: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 15616: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 15617: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 15618: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 15619: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 15620: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 15621: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 15622: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 15623: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 15624: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 15625: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 15626: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 15627: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 15628: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 15629: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 15630: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 15631: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 15632: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 15633: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 15634: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 15635: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 15636: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 15637: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 15638: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 15639: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 15640: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 15641: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 15642: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 15643: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 15644: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 15645: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 15646: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 15647: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 15648: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 15649: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 15650: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 15651: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 15652: @SuppressWarnings ("fallthrough") public static void irpFgen () throws M68kException { 15653: fgen: { 15654: if ((7 & XEiJ.currentCopro0) == 0) { 15655: irpFline (); 15656: break fgen; 15657: } 15658: XEiJ.mpuCycleCount += 16; 15659: int ea = XEiJ.regOC & 63; 15660: int w; 15661: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 15662: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 15663: } else { 15664: w = XEiJ.regPC; 15665: XEiJ.regPC = w + 2; 15666: w = XEiJ.busRwze (w); //pcwz。拡張ワード 15667: } 15668: int m = w >> 10 & 7; 15669: int n = w >> 7 & 7; 15670: int c = w & 0x7f; 15671: XEiJ.fpuBox.epbSetRoundingPrec (XEiJ.fpuBox.epbFpcr >> 6 & 3); //丸め桁数 15672: XEiJ.fpuBox.epbSetRoundingMode (XEiJ.fpuBox.epbFpcr >> 4 & 3); //丸めモード 15673: int a = 0; //実効アドレス 15674: 15675: 15676: switch (w >> 13) { 15677: 15678: 15679: case 0b010: //$4xxx-$5xxx: Fop.* <ea>,FPn 15680: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15681: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15682: 15683: switch (m) { 15684: 15685: case 0b000: //$40xx-$43xx: Fop.L <ea>,FPn 15686: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))); 15687: break; 15688: 15689: case 0b001: //$44xx-$47xx: Fop.S <ea>,FPn 15690: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setf0 (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))); 15691: break; 15692: 15693: case 0b010: //$48xx-$4Bxx: Fop.X <ea>,FPn 15694: { 15695: a = efaAnyExtd (ea); 15696: int i = XEiJ.busRls (a); 15697: long l = (long) XEiJ.busRls (a + 4) << 32 | 0xffffffffL & XEiJ.busRls (a + 8); 15698: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 15699: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].sety012 (i, l); 15700: } else { //拡張精度 15701: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setx012 (i, l); 15702: } 15703: } 15704: break; 15705: 15706: case 0b011: //$4Cxx-$4Fxx: Fop.P <ea>,FPn 15707: { 15708: a = efaAnyExtd (ea); 15709: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setp012 (XEiJ.busRls (a), (long) XEiJ.busRls (a + 4) << 32 | 0xffffffffL & XEiJ.busRls (a + 8)); 15710: } 15711: break; 15712: 15713: case 0b100: //$50xx-$53xx: Fop.W <ea>,FPn 15714: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (a = efaAnyWord (ea))); 15715: break; 15716: 15717: case 0b101: //$54xx-$57xx: Fop.D <ea>,FPn 15718: { 15719: a = efaAnyQuad (ea); 15720: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setd01 ((long) XEiJ.busRls (a) << 32 | 0xffffffffL & XEiJ.busRls (a + 4)); 15721: } 15722: break; 15723: 15724: case 0b110: //$58xx-$5Bxx: Fop.B <ea>,FPn 15725: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (a = efaAnyByte (ea))); 15726: break; 15727: 15728: case 0b111: //$5Cxx-$5Fxx: FMOVECR.X #ccc,FPn 15729: default: 15730: if (0x40 <= c) { 15731: //マニュアルにはFMOVECRの命令フォーマットのROMオフセットが7bitあるように書かれているが実際は6bit 15732: //MC68882で0x40以上を指定すると命令実行前例外のF-Line Emulator(レスポンス$1C0B)が返る 15733: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 15734: irpFline (); 15735: break fgen; 15736: } 15737: if (false) { 15738: m = EFPBox.EPB_CONST_START + c; //定数 15739: c = 0; //FMOVE 15740: } else { 15741: //FMOVECR 15742: XEiJ.fpuBox.epbFmovecr (XEiJ.fpuFPn[n], c); 15743: //FPSRのAEXCを設定する 15744: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 15745: //浮動小数点命令実行後例外 floating-point post-instruction exception 15746: if (irpFPPostInstruction (a)) { 15747: break fgen; 15748: } 15749: break fgen; 15750: } 15751: } 15752: //浮動小数点命令実行前例外 floating-point pre-instruction exception 15753: if (irpFPPreInstruction ()) { 15754: break fgen; 15755: } 15756: //Fop.X <ea>,FPn → Fop.X FP[EFPBox.EPB_SRC_TMP],FPn 15757: //FMOVECR.X #ccc,FPn → FMOVE.X FPc,FPn 15758: 15759: 15760: //fallthrough 15761: case 0b000: //$0xxx-$1xxx: Fop.X FPm,FPn 15762: if (w >> 13 == 0) { 15763: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15764: } 15765: //Fop.* <ea>,FPnのときFPIARは設定済み 15766: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15767: 15768: switch (c) { 15769: 15770: case 0b000_0000: //$xx00: FMOVE.* *m,FPn 15771: // BSUN 常にクリア 15772: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15773: // OPERR 常にクリア 15774: // OVFL 常にクリア 15775: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15776: // DZ 常にクリア 15777: // INEX2 結果に誤差があるときセット、それ以外はクリア 15778: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15779: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 15780: break; 15781: 15782: case 0b000_0001: //$xx01: FINT.* *m,FPn 15783: // BSUN 常にクリア 15784: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15785: // OPERR 常にクリア 15786: // OVFL 常にクリア 15787: // 正規化数の最大値は整数なので丸めても大きくなることはない 15788: // UNFL 常にクリア 15789: // 結果は整数なので非正規化数にはならない 15790: // DZ 常にクリア 15791: // INEX2 結果に誤差があるときセット、それ以外はクリア 15792: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15793: // FINTはsingleとdoubleの丸め処理を行わない 15794: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15795: XEiJ.fpuFPn[n].round (XEiJ.fpuFPn[m], XEiJ.fpuBox.epbRoundingMode); 15796: break; 15797: 15798: case 0b000_0010: //$xx02: FSINH.* *m,FPn 15799: // BSUN 常にクリア 15800: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15801: // OPERR 常にクリア 15802: // OVFL オーバーフローしたときセット、それ以外はクリア 15803: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15804: // DZ 常にクリア 15805: // INEX2 結果に誤差があるときセット、それ以外はクリア 15806: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15807: XEiJ.fpuFPn[n].sinh (XEiJ.fpuFPn[m]); 15808: break; 15809: 15810: case 0b000_0011: //$xx03: FINTRZ.* *m,FPn 15811: // BSUN 常にクリア 15812: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15813: // OPERR 常にクリア 15814: // OVFL 常にクリア 15815: // UNFL 常にクリア 15816: // 結果は整数なので非正規化数にはならない 15817: // DZ 常にクリア 15818: // INEX2 結果に誤差があるときセット、それ以外はクリア 15819: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15820: // FINTRZはsingleとdoubleの丸め処理を行わない 15821: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15822: XEiJ.fpuFPn[n].trunc (XEiJ.fpuFPn[m]); 15823: break; 15824: 15825: case 0b000_0100: //$xx04: FSQRT.* *m,FPn 15826: case 0b000_0101: //$xx05: FSQRT.* *m,FPn (MC68882) 15827: // BSUN 常にクリア 15828: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15829: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 15830: // OVFL 常にクリア 15831: // 1よりも大きい数は小さくなるので溢れることはない 15832: // UNFL 常にクリア 15833: // 非正規化数の平方根は正規化数なので結果が非正規化数になることはない 15834: // DZ 常にクリア 15835: // INEX2 結果に誤差があるときセット、それ以外はクリア 15836: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15837: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 15838: break; 15839: 15840: case 0b000_0110: //$xx06: FLOGNP1.* *m,FPn 15841: case 0b000_0111: //$xx07: FLOGNP1.* *m,FPn (MC68882) 15842: // BSUN 常にクリア 15843: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15844: // OPERR 引数が-1よりも小さいときセット、それ以外はクリア 15845: // OVFL 常にクリア 15846: // log(1+0)=0,log(1+x)<=xなので結果が引数よりも大きくなることはない 15847: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15848: // DZ 引数が-1のときセット、それ以外はクリア 15849: // INEX2 結果に誤差があるときセット、それ以外はクリア 15850: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15851: XEiJ.fpuFPn[n].log1p (XEiJ.fpuFPn[m]); 15852: break; 15853: 15854: case 0b000_1000: //$xx08: FETOXM1.* *m,FPn 15855: // BSUN 常にクリア 15856: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15857: // OPERR 常にクリア 15858: // OVFL オーバーフローしたときセット、それ以外はクリア 15859: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15860: // DZ 常にクリア 15861: // INEX2 結果に誤差があるときセット、それ以外はクリア 15862: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15863: XEiJ.fpuFPn[n].expm1 (XEiJ.fpuFPn[m]); 15864: break; 15865: 15866: case 0b000_1001: //$xx09: FTANH.* *m,FPn 15867: // BSUN 常にクリア 15868: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15869: // OPERR 常にクリア 15870: // OVFL 常にクリア 15871: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15872: // DZ 常にクリア 15873: // INEX2 結果に誤差があるときセット、それ以外はクリア 15874: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15875: XEiJ.fpuFPn[n].tanh (XEiJ.fpuFPn[m]); 15876: break; 15877: 15878: case 0b000_1010: //$xx0A: FATAN.* *m,FPn 15879: case 0b000_1011: //$xx0B: FATAN.* *m,FPn (MC68882) 15880: // BSUN 常にクリア 15881: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15882: // OPERR 常にクリア 15883: // OVFL 常にクリア 15884: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15885: // DZ 常にクリア 15886: // INEX2 結果に誤差があるときセット、それ以外はクリア 15887: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15888: XEiJ.fpuFPn[n].atan (XEiJ.fpuFPn[m]); 15889: break; 15890: 15891: case 0b000_1100: //$xx0C: FASIN.* *m,FPn 15892: // BSUN 常にクリア 15893: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15894: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15895: // OVFL 常にクリア 15896: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15897: // DZ 常にクリア 15898: // INEX2 結果に誤差があるときセット、それ以外はクリア 15899: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15900: XEiJ.fpuFPn[n].asin (XEiJ.fpuFPn[m]); 15901: break; 15902: 15903: case 0b000_1101: //$xx0D: FATANH.* *m,FPn 15904: // BSUN 常にクリア 15905: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15906: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15907: // OVFL 常にクリア 15908: // 1のとき無限大なのだから1の近くでオーバーフローしそうに思えるがatanh(1-2^-80)≒28.07くらい 15909: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15910: // DZ 引数の絶対値が1のときセット、それ以外はクリア 15911: // INEX2 結果に誤差があるときセット、それ以外はクリア 15912: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15913: XEiJ.fpuFPn[n].atanh (XEiJ.fpuFPn[m]); 15914: break; 15915: 15916: case 0b000_1110: //$xx0E: FSIN.* *m,FPn 15917: // BSUN 常にクリア 15918: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15919: // OPERR 引数が無限大のときセット、それ以外はクリア 15920: // OVFL 常にクリア 15921: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15922: // DZ 常にクリア 15923: // INEX2 結果に誤差があるときセット、それ以外はクリア 15924: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15925: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[m]); 15926: break; 15927: 15928: case 0b000_1111: //$xx0F: FTAN.* *m,FPn 15929: // BSUN 常にクリア 15930: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15931: // OPERR 引数が無限大のときセット、それ以外はクリア 15932: // OVFL オーバーフローしたときセット、それ以外はクリア 15933: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15934: // DZ 常にクリア 15935: // cos(x)=0を満たすxは正確に表現できないのだからsin(x)/cos(x)がゼロ除算になるのはおかしい 15936: // INEX2 結果に誤差があるときセット、それ以外はクリア 15937: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15938: XEiJ.fpuFPn[n].tan (XEiJ.fpuFPn[m]); 15939: break; 15940: 15941: case 0b001_0000: //$xx10: FETOX.* *m,FPn 15942: // BSUN 常にクリア 15943: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15944: // OPERR 常にクリア 15945: // OVFL オーバーフローしたときセット、それ以外はクリア 15946: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15947: // DZ 常にクリア 15948: // INEX2 結果に誤差があるときセット、それ以外はクリア 15949: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15950: XEiJ.fpuFPn[n].exp (XEiJ.fpuFPn[m]); 15951: break; 15952: 15953: case 0b001_0001: //$xx11: FTWOTOX.* *m,FPn 15954: // BSUN 常にクリア 15955: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15956: // OPERR 常にクリア 15957: // OVFL オーバーフローしたときセット、それ以外はクリア 15958: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15959: // DZ 常にクリア 15960: // INEX2 結果に誤差があるときセット、それ以外はクリア 15961: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15962: XEiJ.fpuFPn[n].exp2 (XEiJ.fpuFPn[m]); 15963: break; 15964: 15965: case 0b001_0010: //$xx12: FTENTOX.* *m,FPn 15966: case 0b001_0011: //$xx13: FTENTOX.* *m,FPn (MC68882) 15967: // BSUN 常にクリア 15968: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15969: // OPERR 常にクリア 15970: // OVFL オーバーフローしたときセット、それ以外はクリア 15971: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15972: // DZ 常にクリア 15973: // INEX2 結果に誤差があるときセット、それ以外はクリア 15974: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15975: XEiJ.fpuFPn[n].exp10 (XEiJ.fpuFPn[m]); 15976: break; 15977: 15978: case 0b001_0100: //$xx14: FLOGN.* *m,FPn 15979: // BSUN 常にクリア 15980: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15981: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 15982: // OVFL 常にクリア 15983: // log(1)=0,log(x)<=x-1なので結果が引数よりも大きくなることはない 15984: // UNFL 常にクリア 15985: // log(1+2^-80)≒2^-80 15986: // DZ 引数がゼロのときセット、それ以外はクリア 15987: // INEX2 結果に誤差があるときセット、それ以外はクリア 15988: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15989: XEiJ.fpuFPn[n].log (XEiJ.fpuFPn[m]); 15990: break; 15991: 15992: case 0b001_0101: //$xx15: FLOG10.* *m,FPn 15993: // BSUN 常にクリア 15994: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15995: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 15996: // OVFL 常にクリア 15997: // UNFL 常にクリア 15998: // DZ 引数がゼロのときセット、それ以外はクリア 15999: // INEX2 結果に誤差があるときセット、それ以外はクリア 16000: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16001: XEiJ.fpuFPn[n].log10 (XEiJ.fpuFPn[m]); 16002: break; 16003: 16004: case 0b001_0110: //$xx16: FLOG2.* *m,FPn 16005: case 0b001_0111: //$xx17: FLOG2.* *m,FPn (MC68882) 16006: // BSUN 常にクリア 16007: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16008: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 16009: // OVFL 常にクリア 16010: // UNFL 常にクリア 16011: // DZ 引数がゼロのときセット、それ以外はクリア 16012: // INEX2 結果に誤差があるときセット、それ以外はクリア 16013: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16014: XEiJ.fpuFPn[n].log2 (XEiJ.fpuFPn[m]); 16015: break; 16016: 16017: case 0b001_1000: //$xx18: FABS.* *m,FPn 16018: // BSUN 常にクリア 16019: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16020: // OPERR 常にクリア 16021: // OVFL 常にクリア 16022: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16023: // DZ 常にクリア 16024: // INEX2 常にクリア 16025: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16026: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16027: break; 16028: 16029: case 0b001_1001: //$xx19: FCOSH.* *m,FPn 16030: // BSUN 常にクリア 16031: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16032: // OPERR 常にクリア 16033: // OVFL オーバーフローしたときセット、それ以外はクリア 16034: // UNFL 常にクリア 16035: // DZ 常にクリア 16036: // INEX2 結果に誤差があるときセット、それ以外はクリア 16037: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16038: XEiJ.fpuFPn[n].cosh (XEiJ.fpuFPn[m]); 16039: break; 16040: 16041: case 0b001_1010: //$xx1A: FNEG.* *m,FPn 16042: case 0b001_1011: //$xx1B: FNEG.* *m,FPn (MC68882) 16043: // BSUN 常にクリア 16044: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16045: // OPERR 常にクリア 16046: // OVFL 常にクリア 16047: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16048: // DZ 常にクリア 16049: // INEX2 常にクリア 16050: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16051: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16052: break; 16053: 16054: case 0b001_1100: //$xx1C: FACOS.* *m,FPn 16055: // BSUN 常にクリア 16056: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16057: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 16058: // OVFL 常にクリア 16059: // UNFL 常にクリア 16060: // acos(1-ulp(1))はulp(1)よりも大きい 16061: // DZ 常にクリア 16062: // INEX2 結果に誤差があるときセット、それ以外はクリア 16063: // おそらくセットされないのはacos(1)=0だけ 16064: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16065: XEiJ.fpuFPn[n].acos (XEiJ.fpuFPn[m]); 16066: break; 16067: 16068: case 0b001_1101: //$xx1D: FCOS.* *m,FPn 16069: // BSUN 常にクリア 16070: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16071: // OPERR 引数が無限大のときセット、それ以外はクリア 16072: // OVFL 常にクリア 16073: // UNFL 常にクリア 16074: // cos(x)=0を満たすxは正確に表現できず、cos(pi/2)とcos(3*pi/2)が正規化数になってしまう 16075: // DZ 常にクリア 16076: // INEX2 結果に誤差があるときセット、それ以外はクリア 16077: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16078: XEiJ.fpuFPn[n].cos (XEiJ.fpuFPn[m]); 16079: break; 16080: 16081: case 0b001_1110: //$xx1E: FGETEXP.* *m,FPn 16082: // BSUN 常にクリア 16083: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16084: // OPERR 引数が無限大のときセット、それ以外はクリア 16085: // OVFL 常にクリア 16086: // UNFL 常にクリア 16087: // DZ 常にクリア 16088: // INEX2 常にクリア 16089: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16090: XEiJ.fpuFPn[n].getexp (XEiJ.fpuFPn[m]); 16091: break; 16092: 16093: case 0b001_1111: //$xx1F: FGETMAN.* *m,FPn 16094: // BSUN 常にクリア 16095: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16096: // OPERR 引数が無限大のときセット、それ以外はクリア 16097: // OVFL 常にクリア 16098: // UNFL 常にクリア 16099: // DZ 常にクリア 16100: // INEX2 常にクリア 16101: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16102: XEiJ.fpuFPn[n].getman (XEiJ.fpuFPn[m]); 16103: break; 16104: 16105: case 0b010_0000: //$xx20: FDIV.* *m,FPn 16106: // BSUN 常にクリア 16107: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16108: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16109: // OVFL オーバーフローしたときセット、それ以外はクリア 16110: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16111: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16112: // INEX2 結果に誤差があるときセット、それ以外はクリア 16113: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16114: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16115: break; 16116: 16117: case 0b010_0001: //$xx21: FMOD.* *m,FPn 16118: // BSUN 常にクリア 16119: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16120: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16121: // OVFL 常にクリア 16122: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16123: // DZ 常にクリア 16124: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16125: // INEX2 結果に誤差があるときセット、それ以外はクリア 16126: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16127: // FPSRのquotient byteに符号付き商の下位7bitが入る 16128: XEiJ.fpuFPn[n].rem (XEiJ.fpuFPn[m]); 16129: break; 16130: 16131: case 0b010_0010: //$xx22: FADD.* *m,FPn 16132: // BSUN 常にクリア 16133: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16134: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16135: // OVFL オーバーフローしたときセット、それ以外はクリア 16136: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16137: // DZ 常にクリア 16138: // INEX2 結果に誤差があるときセット、それ以外はクリア 16139: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16140: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16141: break; 16142: 16143: case 0b010_0011: //$xx23: FMUL.* *m,FPn 16144: // BSUN 常にクリア 16145: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16146: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16147: // OVFL オーバーフローしたときセット、それ以外はクリア 16148: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16149: // DZ 常にクリア 16150: // INEX2 結果に誤差があるときセット、それ以外はクリア 16151: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16152: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16153: break; 16154: 16155: case 0b010_0100: //$xx24: FSGLDIV.* *m,FPn 16156: // BSUN 常にクリア 16157: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16158: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16159: // OVFL オーバーフローしたときセット、それ以外はクリア 16160: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16161: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16162: // INEX2 結果に誤差があるときセット、それ以外はクリア 16163: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16164: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16165: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16166: break; 16167: 16168: case 0b010_0101: //$xx25: FREM.* *m,FPn 16169: // BSUN 常にクリア 16170: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16171: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16172: // OVFL 常にクリア 16173: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16174: // DZ 常にクリア 16175: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16176: // INEX2 結果に誤差があるときセット、それ以外はクリア 16177: // マニュアルにClearedと書いてあるのは間違い 16178: // 除数が無限大で被除数をそのまま返す場合でもサイズが減ればアンダーフローや不正確な結果になることはマニュアルにも書かれている 16179: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16180: // FPSRのquotient byteに符号付き商の下位7bitが入る 16181: XEiJ.fpuFPn[n].ieeerem (XEiJ.fpuFPn[m]); 16182: break; 16183: 16184: case 0b010_0110: //$xx26: FSCALE.* *m,FPn 16185: // BSUN 常にクリア 16186: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16187: // OPERR 引数が無限大のときセット、それ以外はクリア 16188: // OVFL オーバーフローしたときセット、それ以外はクリア 16189: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16190: // DZ 常にクリア 16191: // INEX2 常にクリア 16192: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16193: //! 本来はソースが整数のとき浮動小数点数を経由しないが、これは経由してしまっている。結果は同じだが効率が悪い 16194: XEiJ.fpuFPn[n].scale (XEiJ.fpuFPn[m]); 16195: break; 16196: 16197: case 0b010_0111: //$xx27: FSGLMUL.* *m,FPn 16198: // BSUN 常にクリア 16199: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16200: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16201: // OVFL オーバーフローしたときセット、それ以外はクリア 16202: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16203: // DZ 常にクリア 16204: // INEX2 結果に誤差があるときセット、それ以外はクリア 16205: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16206: { 16207: //引数を24bitに切り捨てるときX2をセットしない 16208: int sr = XEiJ.fpuBox.epbFpsr; 16209: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].roundmanf (XEiJ.fpuFPn[m], EFPBox.EPB_MODE_RZ); 16210: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].roundmanf (XEiJ.fpuFPn[n], EFPBox.EPB_MODE_RZ); 16211: XEiJ.fpuBox.epbFpsr = sr; 16212: } 16213: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16214: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[EFPBox.EPB_DST_TMP], XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16215: break; 16216: 16217: case 0b010_1000: //$xx28: FSUB.* *m,FPn 16218: case 0b010_1001: //$xx29: FSUB.* *m,FPn (MC68882) 16219: case 0b010_1010: //$xx2A: FSUB.* *m,FPn (MC68882) 16220: case 0b010_1011: //$xx2B: FSUB.* *m,FPn (MC68882) 16221: case 0b010_1100: //$xx2C: FSUB.* *m,FPn (MC68882) 16222: case 0b010_1101: //$xx2D: FSUB.* *m,FPn (MC68882) 16223: case 0b010_1110: //$xx2E: FSUB.* *m,FPn (MC68882) 16224: case 0b010_1111: //$xx2F: FSUB.* *m,FPn (MC68882) 16225: // BSUN 常にクリア 16226: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16227: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16228: // OVFL オーバーフローしたときセット、それ以外はクリア 16229: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16230: // DZ 常にクリア 16231: // INEX2 結果に誤差があるときセット、それ以外はクリア 16232: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16233: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16234: break; 16235: 16236: case 0b011_0000: //$xx30: FSINCOS.* *m,FP0:FPn (c=0,s=n) 16237: case 0b011_0001: //$xx31: FSINCOS.* *m,FP1:FPn (c=1,s=n) 16238: case 0b011_0010: //$xx32: FSINCOS.* *m,FP2:FPn (c=2,s=n) 16239: case 0b011_0011: //$xx33: FSINCOS.* *m,FP3:FPn (c=3,s=n) 16240: case 0b011_0100: //$xx34: FSINCOS.* *m,FP4:FPn (c=4,s=n) 16241: case 0b011_0101: //$xx35: FSINCOS.* *m,FP5:FPn (c=5,s=n) 16242: case 0b011_0110: //$xx36: FSINCOS.* *m,FP6:FPn (c=6,s=n) 16243: case 0b011_0111: //$xx37: FSINCOS.* *m,FP7:FPn (c=7,s=n) 16244: // BSUN 常にクリア 16245: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16246: // OPERR 引数が無限大のときセット、それ以外はクリア 16247: // OVFL 常にクリア 16248: // UNFL sin(x)の結果が非正規化数のときセット、それ以外はクリア 16249: // cos(x)の結果は非正規化数にならない 16250: // DZ 常にクリア 16251: // INEX2 結果に誤差があるときセット、それ以外はクリア 16252: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16253: c &= 7; 16254: //m==EFPBox.EPB_SRC_TMP||m==n||m==cの場合があることに注意する 16255: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].sete (XEiJ.fpuFPn[m]); 16256: XEiJ.fpuFPn[c].cos (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16257: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16258: break; 16259: 16260: case 0b011_1000: //$xx38: FCMP.* *m,FPn 16261: case 0b011_1001: //$xx39: FCMP.* *m,FPn (MC68882) 16262: case 0b011_1100: //$xx3C: FCMP.* *m,FPn (MC68882) コマンドワードの不連続箇所に注意 16263: case 0b011_1101: //$xx3D: FCMP.* *m,FPn (MC68882) 16264: // BSUN 常にクリア 16265: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16266: // OPERR 常にクリア 16267: // OVFL 常にクリア 16268: // UNFL 常にクリア 16269: // DZ 常にクリア 16270: // INEX2 常にクリア 16271: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16272: // FCMPはinfinityを常にクリアする 16273: // efp.compareTo(x,y)を使う 16274: // efp.compareTo(x,y)はefp.sub(x,y)よりも速い 16275: // efp.sub(x,y)はINEX2をセットしてしまう 16276: // efp.compareTo(x,y)は-0<+0だがFCMPは-0==+0なのでこれだけ調節する 16277: { 16278: int xf = XEiJ.fpuFPn[n].flg; 16279: int yf = XEiJ.fpuFPn[m].flg; 16280: if ((xf | yf) << 3 < 0) { //どちらかがNaN 16281: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].setnan (); 16282: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.N; 16283: } else { 16284: int i = ((xf & yf) << 1 < 0 ? 0 : //両方±0 16285: XEiJ.fpuFPn[n].compareTo (XEiJ.fpuFPn[m])); //-Inf==-Inf<-x<-0<+0<+x<+Inf==+Inf<NaN==NaN 16286: if (i == 0) { 16287: if (xf < 0) { 16288: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset0 (); 16289: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.M | EFPBox.Z; 16290: } else { 16291: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set0 (); 16292: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.P | EFPBox.Z; 16293: } 16294: } else if (i < 0) { 16295: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset1 (); 16296: } else { 16297: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set1 (); 16298: } 16299: } 16300: n = EFPBox.EPB_DST_TMP; 16301: } 16302: break; 16303: 16304: case 0b011_1010: //$xx3A: FTST.* *m 16305: case 0b011_1011: //$xx3B: FTST.* *m (MC68882) 16306: case 0b011_1110: //$xx3E: FTST.* *m (MC68882) コマンドワードの不連続箇所に注意 16307: case 0b011_1111: //$xx3F: FTST.* *m (MC68882) 16308: // BSUN 常にクリア 16309: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16310: // OPERR 常にクリア 16311: // OVFL 常にクリア 16312: // UNFL 常にクリア 16313: // DZ 常にクリア 16314: // INEX2 常にクリア 16315: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16316: // ソースオペランドをダミーのデスティネーションオペランドにコピーしてテストする 16317: // デスティネーションオペランドは変化しない 16318: // デスティネーションオペランドにはFP0が指定される場合が多いがFP0である必要はない 16319: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].sete (XEiJ.fpuFPn[m]); 16320: n = EFPBox.EPB_DST_TMP; 16321: break; 16322: 16323: case 0b100_0000: //$xx40: FSMOVE.* *m,FPn 16324: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16325: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16326: irpFline (); 16327: break fgen; 16328: } 16329: // BSUN 常にクリア 16330: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16331: // OPERR 常にクリア 16332: // OVFL 常にクリア 16333: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16334: // DZ 常にクリア 16335: // INEX2 結果に誤差があるときセット、それ以外はクリア 16336: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16337: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16338: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16339: break; 16340: 16341: case 0b100_0001: //$xx41: FSSQRT.* *m,FPn 16342: // BSUN 常にクリア 16343: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16344: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16345: // OVFL 常にクリア 16346: // UNFL 常にクリア 16347: // DZ 常にクリア 16348: // INEX2 結果に誤差があるときセット、それ以外はクリア 16349: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16350: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16351: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16352: irpFline (); 16353: break fgen; 16354: } 16355: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16356: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16357: break; 16358: 16359: //case 0b100_0010: //$xx42: 16360: //case 0b100_0011: //$xx43: 16361: 16362: case 0b100_0100: //$xx44: FDMOVE.* *m,FPn 16363: // BSUN 常にクリア 16364: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16365: // OPERR 常にクリア 16366: // OVFL 常にクリア 16367: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16368: // DZ 常にクリア 16369: // INEX2 結果に誤差があるときセット、それ以外はクリア 16370: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16371: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16372: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16373: irpFline (); 16374: break fgen; 16375: } 16376: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16377: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16378: break; 16379: 16380: case 0b100_0101: //$xx45: FDSQRT.* *m,FPn 16381: // BSUN 常にクリア 16382: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16383: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16384: // OVFL 常にクリア 16385: // UNFL 常にクリア 16386: // DZ 常にクリア 16387: // INEX2 結果に誤差があるときセット、それ以外はクリア 16388: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16389: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16390: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16391: irpFline (); 16392: break fgen; 16393: } 16394: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16395: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16396: break; 16397: 16398: //case 0b100_0110: //$xx46: 16399: //case 0b100_0111: //$xx47: 16400: //case 0b100_1000: //$xx48: 16401: //case 0b100_1001: //$xx49: 16402: //case 0b100_1010: //$xx4A: 16403: //case 0b100_1011: //$xx4B: 16404: //case 0b100_1100: //$xx4C: 16405: //case 0b100_1101: //$xx4D: 16406: //case 0b100_1110: //$xx4E: 16407: //case 0b100_1111: //$xx4F: 16408: //case 0b101_0000: //$xx50: 16409: //case 0b101_0001: //$xx51: 16410: //case 0b101_0010: //$xx52: 16411: //case 0b101_0011: //$xx53: 16412: //case 0b101_0100: //$xx54: 16413: //case 0b101_0101: //$xx55: 16414: //case 0b101_0110: //$xx56: 16415: //case 0b101_0111: //$xx57: 16416: 16417: case 0b101_1000: //$xx58: FSABS.* *m,FPn 16418: // BSUN 常にクリア 16419: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16420: // OPERR 常にクリア 16421: // OVFL 常にクリア 16422: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16423: // DZ 常にクリア 16424: // INEX2 常にクリア 16425: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16426: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16427: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16428: irpFline (); 16429: break fgen; 16430: } 16431: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16432: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16433: break; 16434: 16435: //case 0b101_1001: //$xx59: 16436: 16437: case 0b101_1010: //$xx5A: FSNEG.* *m,FPn 16438: // BSUN 常にクリア 16439: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16440: // OPERR 常にクリア 16441: // OVFL 常にクリア 16442: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16443: // DZ 常にクリア 16444: // INEX2 常にクリア 16445: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16446: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16447: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16448: irpFline (); 16449: break fgen; 16450: } 16451: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16452: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16453: break; 16454: 16455: //case 0b101_1011: //$xx5B: 16456: 16457: case 0b101_1100: //$xx5C: FDABS.* *m,FPn 16458: // BSUN 常にクリア 16459: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16460: // OPERR 常にクリア 16461: // OVFL 常にクリア 16462: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16463: // DZ 常にクリア 16464: // INEX2 常にクリア 16465: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16466: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16467: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16468: irpFline (); 16469: break fgen; 16470: } 16471: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16472: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16473: break; 16474: 16475: //case 0b101_1101: //$xx5D: 16476: 16477: case 0b101_1110: //$xx5E: FDNEG.* *m,FPn 16478: // BSUN 常にクリア 16479: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16480: // OPERR 常にクリア 16481: // OVFL 常にクリア 16482: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16483: // DZ 常にクリア 16484: // INEX2 常にクリア 16485: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16486: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16487: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16488: irpFline (); 16489: break fgen; 16490: } 16491: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16492: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16493: break; 16494: 16495: //case 0b101_1111: //$xx5F: 16496: 16497: case 0b110_0000: //$xx60: FSDIV.* *m,FPn 16498: // BSUN 常にクリア 16499: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16500: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16501: // OVFL オーバーフローしたときセット、それ以外はクリア 16502: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16503: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16504: // INEX2 結果に誤差があるときセット、それ以外はクリア 16505: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16506: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16507: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16508: irpFline (); 16509: break fgen; 16510: } 16511: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16512: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16513: break; 16514: 16515: //case 0b110_0001: //$xx61: 16516: 16517: case 0b110_0010: //$xx62: FSADD.* *m,FPn 16518: // BSUN 常にクリア 16519: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16520: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16521: // OVFL オーバーフローしたときセット、それ以外はクリア 16522: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16523: // DZ 常にクリア 16524: // INEX2 結果に誤差があるときセット、それ以外はクリア 16525: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16526: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16527: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16528: irpFline (); 16529: break fgen; 16530: } 16531: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16532: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16533: break; 16534: 16535: case 0b110_0011: //$xx63: FSMUL.* *m,FPn 16536: // BSUN 常にクリア 16537: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16538: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16539: // OVFL オーバーフローしたときセット、それ以外はクリア 16540: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16541: // DZ 常にクリア 16542: // INEX2 結果に誤差があるときセット、それ以外はクリア 16543: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16544: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16545: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16546: irpFline (); 16547: break fgen; 16548: } 16549: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16550: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16551: break; 16552: 16553: case 0b110_0100: //$xx64: FDDIV.* *m,FPn 16554: // BSUN 常にクリア 16555: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16556: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16557: // OVFL オーバーフローしたときセット、それ以外はクリア 16558: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16559: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16560: // INEX2 結果に誤差があるときセット、それ以外はクリア 16561: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16562: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16563: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16564: irpFline (); 16565: break fgen; 16566: } 16567: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16568: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16569: break; 16570: 16571: //case 0b110_0101: //$xx65: 16572: 16573: case 0b110_0110: //$xx66: FDADD.* *m,FPn 16574: // BSUN 常にクリア 16575: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16576: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16577: // OVFL オーバーフローしたときセット、それ以外はクリア 16578: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16579: // DZ 常にクリア 16580: // INEX2 結果に誤差があるときセット、それ以外はクリア 16581: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16582: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16583: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16584: irpFline (); 16585: break fgen; 16586: } 16587: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16588: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16589: break; 16590: 16591: case 0b110_0111: //$xx67: FDMUL.* *m,FPn 16592: // BSUN 常にクリア 16593: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16594: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16595: // OVFL オーバーフローしたときセット、それ以外はクリア 16596: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16597: // DZ 常にクリア 16598: // INEX2 結果に誤差があるときセット、それ以外はクリア 16599: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16600: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16601: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16602: irpFline (); 16603: break fgen; 16604: } 16605: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16606: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16607: break; 16608: 16609: case 0b110_1000: //$xx68: FSSUB.* *m,FPn 16610: // BSUN 常にクリア 16611: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16612: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16613: // OVFL オーバーフローしたときセット、それ以外はクリア 16614: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16615: // DZ 常にクリア 16616: // INEX2 結果に誤差があるときセット、それ以外はクリア 16617: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16618: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16619: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16620: irpFline (); 16621: break fgen; 16622: } 16623: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16624: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16625: break; 16626: 16627: //case 0b110_1001: //$xx69: 16628: //case 0b110_1010: //$xx6A: 16629: //case 0b110_1011: //$xx6B: 16630: 16631: case 0b110_1100: //$xx6C: FDSUB.* *m,FPn 16632: // BSUN 常にクリア 16633: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16634: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16635: // OVFL オーバーフローしたときセット、それ以外はクリア 16636: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16637: // DZ 常にクリア 16638: // INEX2 結果に誤差があるときセット、それ以外はクリア 16639: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16640: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16641: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16642: irpFline (); 16643: break fgen; 16644: } 16645: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16646: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16647: break; 16648: 16649: //case 0b110_1101: //$xx6D: 16650: //case 0b110_1110: //$xx6E: 16651: //case 0b110_1111: //$xx6F: 16652: 16653: case 0b111_0000: //$xx70: FLGAMMA *m,FPn 16654: if (EFPBox.EPB_EXTRA_OPERATION) { 16655: XEiJ.fpuFPn[n].lgamma (XEiJ.fpuFPn[m]); 16656: break; 16657: } else { 16658: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16659: irpFline (); 16660: break fgen; 16661: } 16662: 16663: case 0b111_0001: //$xx71: FTGAMMA *m,FPn 16664: if (EFPBox.EPB_EXTRA_OPERATION) { 16665: XEiJ.fpuFPn[n].tgamma (XEiJ.fpuFPn[m]); 16666: break; 16667: } else { 16668: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16669: irpFline (); 16670: break fgen; 16671: } 16672: 16673: //case 0b111_0010: //$xx72: 16674: //case 0b111_0011: //$xx73: 16675: //case 0b111_0100: //$xx74: 16676: //case 0b111_0101: //$xx75: 16677: //case 0b111_0110: //$xx76: 16678: //case 0b111_0111: //$xx77: 16679: //case 0b111_1000: //$xx78: 16680: //case 0b111_1001: //$xx79: 16681: //case 0b111_1010: //$xx7A: 16682: //case 0b111_1011: //$xx7B: 16683: //case 0b111_1100: //$xx7C: 16684: //case 0b111_1101: //$xx7D: 16685: //case 0b111_1110: //$xx7E: 16686: //case 0b111_1111: //$xx7F: 16687: 16688: default: //未定義 16689: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16690: irpFline (); 16691: break fgen; 16692: } 16693: //FPSRのFPCCを設定する 16694: XEiJ.fpuBox.epbFpsr |= XEiJ.fpuFPn[n].flg >>> 4; 16695: //FPSRのAEXCを設定する 16696: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16697: //浮動小数点命令実行後例外 floating-point post-instruction exception 16698: if (irpFPPostInstruction (a)) { 16699: break fgen; 16700: } 16701: break fgen; 16702: 16703: 16704: case 0b011: //$6xxx-$7xxx: FMOVE.* FPn,<ea> 16705: // BSUN 常にクリア 16706: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16707: // OPERR byte,word,longで無限大または指定されたサイズに収まらないとき、packedでk-factorが17よりも大きいか指数部が3桁に収まらないときセット、それ以外はクリア 16708: // OVFL packedではなくてオーバーフローしたときセット、それ以外はクリア 16709: // UNFL packedではなくて結果が非正規化数のときセット、それ以外はクリア 16710: // DZ 常にクリア 16711: // INEX2 結果に誤差があるときセット、それ以外はクリア 16712: // INEX1 常にクリア 16713: XEiJ.fpuBox.epbFpsr &= 0xffff00ff; //FMOVE.* FPn,<ea>でFPSRのコンディションコードバイトは変化しない 16714: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 16715: 16716: switch (m) { 16717: 16718: case 0b000: //$60xx-$63xx: FMOVE.L FPn,<ea> 16719: if (ea < XEiJ.EA_AR) { //FMOVE.L FPn,Dr 16720: XEiJ.regRn[ea] = XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode); 16721: } else { //FMOVE.L FPn,<mem> 16722: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode)); 16723: } 16724: break; 16725: 16726: case 0b001: //$64xx-$67xx: FMOVE.S FPn,<ea> 16727: if (ea < XEiJ.EA_AR) { //FMOVE.S FPn,Dr 16728: XEiJ.regRn[ea] = XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode); 16729: } else { //FMOVE.S FPn,<mem> 16730: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode)); 16731: } 16732: break; 16733: 16734: case 0b010: //$68xx-$6Bxx: FMOVE.X FPn,<ea> 16735: { 16736: byte[] b = new byte[12]; 16737: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16738: XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16739: } else { //拡張精度 16740: XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16741: } 16742: XEiJ.busWbb (a = efaMltExtd (ea), b, 0, 12); 16743: } 16744: break; 16745: 16746: case 0b011: //$6Cxx-$6Fxx: FMOVE.P FPn,<ea>{#k} 16747: { 16748: byte[] b = new byte[12]; 16749: XEiJ.fpuFPn[n].getp012 (b, 0, w); //k-factor付き 16750: XEiJ.busWbb (a = efaMltExtd (ea), b, 0, 12); 16751: } 16752: break; 16753: 16754: case 0b100: //$70xx-$73xx: FMOVE.W FPn,<ea> 16755: if (ea < XEiJ.EA_AR) { //FMOVE.W FPn,Dr 16756: XEiJ.regRn[ea] = XEiJ.regRn[ea] & 0xffff0000 | (char) XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode); 16757: } else { //FMOVE.W FPn,<mem> 16758: XEiJ.busWw (a = efaMltWord (ea), XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode)); 16759: } 16760: break; 16761: 16762: case 0b101: //$74xx-$77xx: FMOVE.D FPn,<ea> 16763: { 16764: a = efaMltQuad (ea); 16765: long d = XEiJ.fpuFPn[n].getd01 (XEiJ.fpuBox.epbRoundingMode); 16766: XEiJ.busWl (a, (int) (d >>> 32)); 16767: XEiJ.busWl (a + 4, (int) d); 16768: } 16769: break; 16770: 16771: case 0b110: //$78xx-$7Bxx: FMOVE.B FPn,<ea> 16772: if (ea < XEiJ.EA_AR) { //FMOVE.B FPn,Dr 16773: XEiJ.regRn[ea] = XEiJ.regRn[ea] & 0xffffff00 | XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode) & 0xff; 16774: } else { //FMOVE.B FPn,<mem> 16775: XEiJ.busWb (a = efaMltByte (ea), XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode)); 16776: } 16777: break; 16778: 16779: case 0b111: //$7Cxx-$7Fxx: FMOVE.P FPn,<ea>{Dl} 16780: default: 16781: { 16782: byte[] b = new byte[12]; 16783: XEiJ.fpuFPn[n].getp012 (b, 0, XEiJ.regRn[w >> 4 & 7]); //k-factor付き 16784: XEiJ.busWbb (a = efaMltExtd (ea), b, 0, 12); 16785: } 16786: } 16787: //FPSRのAEXCを設定する 16788: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16789: //浮動小数点命令実行後例外 floating-point post-instruction exception 16790: if (irpFPPostInstruction (a)) { 16791: break fgen; 16792: } 16793: break fgen; 16794: 16795: 16796: case 0b100: //$8xxx-$9xxx: FMOVEM.L <ea>,FPCR/FPSR/FPIAR 16797: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16798: // 格納順序はFPCRが下位アドレス(連結したとき上位),FPIARが上位アドレス(連結したとき下位) 16799: 16800: switch (m) { 16801: 16802: case 0b000: //$8000: FMOVE.L <ea>,<> 16803: // レジスタを1個も指定しないとFPIARが指定されたものとみなされる 16804: 16805: case 0b001: //$8400: FMOVE.L <ea>,FPIAR 16806: XEiJ.fpuBox.epbFpiar = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea)); //Ar可 16807: break; 16808: 16809: case 0b010: //$8800: FMOVE.L <ea>,FPSR 16810: XEiJ.fpuBox.epbFpsr = (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))) & EFPBox.EPB_FPSR_ALL; //Ar不可 16811: //fmove.lでfpsrのEXCに書き込んだだけではAEXCは更新されない 16812: //fmove.lでfpsrに0x0000ff00を書き込んですぐに読み出しても0x0000ff00のまま 16813: break; 16814: 16815: case 0b011: //$8C00: FMOVEM.L <ea>,FPSR/FPIAR 16816: { 16817: a = efaAnyQuad (ea); 16818: XEiJ.fpuBox.epbFpsr = (XEiJ.busRls (a)) & EFPBox.EPB_FPSR_ALL; 16819: XEiJ.fpuBox.epbFpiar = XEiJ.busRls (a + 4); 16820: } 16821: break; 16822: 16823: case 0b100: //$9000: FMOVE.L <ea>,FPCR 16824: XEiJ.fpuBox.epbFpcr = (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))) & EFPBox.EPB_FPCR_ALL; //Ar不可 16825: break; 16826: 16827: case 0b101: //$9400: FMOVEM.L <ea>,FPCR/FPIAR 16828: { 16829: a = efaAnyQuad (ea); 16830: XEiJ.fpuBox.epbFpcr = (XEiJ.busRls (a)) & EFPBox.EPB_FPCR_ALL; 16831: XEiJ.fpuBox.epbFpiar = XEiJ.busRls (a + 4); 16832: } 16833: break; 16834: 16835: case 0b110: //$9800: FMOVEM.L <ea>,FPCR/FPSR 16836: { 16837: a = efaAnyQuad (ea); 16838: XEiJ.fpuBox.epbFpcr = (XEiJ.busRls (a)) & EFPBox.EPB_FPCR_ALL; 16839: XEiJ.fpuBox.epbFpsr = (XEiJ.busRls (a + 4)) & EFPBox.EPB_FPSR_ALL; 16840: } 16841: break; 16842: 16843: case 0b111: //$9C00: FMOVEM.L <ea>,FPCR/FPSR/FPIAR 16844: default: 16845: { 16846: a = efaAnyExtd (ea); 16847: XEiJ.fpuBox.epbFpcr = (XEiJ.busRls (a)) & EFPBox.EPB_FPCR_ALL; 16848: XEiJ.fpuBox.epbFpsr = (XEiJ.busRls (a + 4)) & EFPBox.EPB_FPSR_ALL; 16849: XEiJ.fpuBox.epbFpiar = XEiJ.busRls (a + 8); 16850: } 16851: break; 16852: } 16853: break fgen; 16854: 16855: 16856: case 0b101: //$Axxx-$Bxxx: FMOVEM.L FPCR/FPSR/FPIAR,<ea> 16857: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16858: 16859: switch (m) { 16860: 16861: case 0b000: //$A000: FMOVE.L <>,<ea> 16862: // レジスタを1個も指定しないとFPIARが指定されたものとみなされる 16863: 16864: case 0b001: //$A400: FMOVE.L FPIAR,<ea> 16865: if (ea < XEiJ.EA_MM) { //Ar可 16866: XEiJ.regRn[ea] = XEiJ.fpuBox.epbFpiar; 16867: } else { 16868: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuBox.epbFpiar); 16869: } 16870: break; 16871: 16872: case 0b010: //$A800: FMOVE.L FPSR,<ea> 16873: if (ea < XEiJ.EA_AR) { //Ar不可 16874: XEiJ.regRn[ea] = XEiJ.fpuBox.epbFpsr; 16875: } else { 16876: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuBox.epbFpsr); 16877: } 16878: break; 16879: 16880: case 0b011: //$AC00: FMOVEM.L FPSR/FPIAR,<ea> 16881: { 16882: a = efaMltQuad (ea); 16883: XEiJ.busWl (a, XEiJ.fpuBox.epbFpsr); 16884: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpiar); 16885: } 16886: break; 16887: 16888: case 0b100: //$B000: FMOVE.L FPCR,<ea> 16889: if (ea < XEiJ.EA_AR) { //Ar不可 16890: XEiJ.regRn[ea] = XEiJ.fpuBox.epbFpcr; 16891: } else { 16892: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuBox.epbFpcr); 16893: } 16894: break; 16895: 16896: case 0b101: //$B400: FMOVEM.L FPCR/FPIAR,<ea> 16897: { 16898: a = efaMltQuad (ea); 16899: XEiJ.busWl (a, XEiJ.fpuBox.epbFpcr); 16900: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpiar); 16901: } 16902: break; 16903: 16904: case 0b110: //$B800: FMOVEM.L FPCR/FPSR,<ea> 16905: { 16906: a = efaMltQuad (ea); 16907: XEiJ.busWl (a, XEiJ.fpuBox.epbFpcr); 16908: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpsr); 16909: } 16910: break; 16911: 16912: case 0b111: //$BC00: FMOVEM.L FPCR/FPSR/FPIAR,<ea> 16913: default: 16914: { 16915: a = efaMltExtd (ea); 16916: XEiJ.busWl (a, XEiJ.fpuBox.epbFpcr); 16917: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpsr); 16918: XEiJ.busWl (a + 8, XEiJ.fpuBox.epbFpiar); 16919: } 16920: break; 16921: } 16922: break fgen; 16923: 16924: 16925: case 0b110: //$Cxxx-$Dxxx: FMOVEM.X <ea>,<list> 16926: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16927: { 16928: byte[] b = new byte[12]; 16929: int list = ((m & 2) == 0 ? w : XEiJ.regRn[w >> 4 & 7]) << 24; 16930: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 16931: int arr = XEiJ.regOC & 7 | 8; 16932: a = XEiJ.regRn[arr]; 16933: for (n = 0; list != 0; n++, list <<= 1) { 16934: if (list < 0) { 16935: XEiJ.busRbb (a, b, 0, 12); 16936: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16937: XEiJ.fpuFPn[n].sety012 (b, 0); 16938: } else { //拡張精度 16939: XEiJ.fpuFPn[n].setx012 (b, 0); 16940: } 16941: a += 12; 16942: } 16943: } 16944: XEiJ.regRn[arr] = a; 16945: } else { //(Ar)+以外 16946: a = efaCntLong (ea); 16947: for (n = 0; list != 0; n++, list <<= 1) { 16948: if (list < 0) { 16949: XEiJ.busRbb (a, b, 0, 12); 16950: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16951: XEiJ.fpuFPn[n].sety012 (b, 0); 16952: } else { //拡張精度 16953: XEiJ.fpuFPn[n].setx012 (b, 0); 16954: } 16955: a += 12; 16956: } 16957: } 16958: } 16959: } 16960: break fgen; 16961: 16962: 16963: case 0b111: //$Exxx-$Fxxx: FMOVEM.X <list>,<ea> 16964: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16965: { 16966: byte[] b = new byte[12]; 16967: int list = ((m & 2) == 0 ? w : XEiJ.regRn[w >> 4 & 7]) << 24; 16968: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 16969: int arr = XEiJ.regOC & 7 | 8; 16970: a = XEiJ.regRn[arr]; 16971: for (n = 7; list != 0; n--, list <<= 1) { 16972: if (list < 0) { 16973: a -= 12; 16974: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16975: XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16976: } else { //拡張精度 16977: XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16978: } 16979: XEiJ.busWbb (a, b, 0, 12); 16980: } 16981: } 16982: XEiJ.regRn[arr] = a; 16983: } else { //-(Ar)以外 16984: a = efaCltLong (ea); 16985: for (n = 0; list != 0; n++, list <<= 1) { 16986: if (list < 0) { 16987: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16988: XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16989: } else { //拡張精度 16990: XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16991: } 16992: XEiJ.busWbb (a, b, 0, 12); 16993: a += 12; 16994: } 16995: } 16996: } 16997: } 16998: break fgen; 16999: 17000: 17001: case 0b001: //$2xxx-$3xxx: 未定義 17002: default: //未定義 17003: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17004: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 17005: irpFline (); 17006: break fgen; 17007: } 17008: } //fgen 17009: } //irpFgen 17010: 17011: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17012: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17013: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17014: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17015: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 17016: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 17017: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 17018: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 17019: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 17020: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 17021: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 17022: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 17023: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 17024: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 17025: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 17026: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 17027: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 17028: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 17029: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 17030: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 17031: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 17032: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 17033: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 17034: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 17035: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 17036: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 17037: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 17038: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 17039: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 17040: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 17041: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 17042: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 17043: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 17044: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 17045: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 17046: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 17047: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 17048: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 17049: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 17050: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 17051: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 17052: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 17053: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 17054: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 17055: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 17056: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 17057: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 17058: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 17059: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 17060: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 17061: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 17062: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 17063: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 17064: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 17065: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 17066: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 17067: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 17068: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 17069: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 17070: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 17071: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 17072: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 17073: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 17074: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 17075: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 17076: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 17077: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 17078: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 17079: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 17080: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 17081: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 17082: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 17083: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 17084: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 17085: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 17086: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 17087: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 17088: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 17089: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 17090: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 17091: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 17092: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 17093: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 17094: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 17095: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 17096: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 17097: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 17098: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 17099: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 17100: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 17101: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 17102: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 17103: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 17104: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 17105: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 17106: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 17107: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 17108: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 17109: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 17110: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 17111: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 17112: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 17113: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 17114: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 17115: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 17116: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 17117: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 17118: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 17119: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 17120: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 17121: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 17122: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 17123: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 17124: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 17125: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 17126: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 17127: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 17128: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 17129: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 17130: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 17131: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 17132: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 17133: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 17134: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 17135: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 17136: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 17137: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 17138: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 17139: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 17140: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 17141: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 17142: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 17143: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 17144: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 17145: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 17146: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 17147: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 17148: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 17149: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 17150: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 17151: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 17152: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 17153: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 17154: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 17155: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 17156: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 17157: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 17158: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 17159: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 17160: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 17161: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 17162: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 17163: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 17164: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 17165: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 17166: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 17167: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 17168: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 17169: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 17170: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 17171: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 17172: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 17173: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 17174: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 17175: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 17176: public static void irpFscc () throws M68kException { 17177: fscc: { 17178: if ((7 & XEiJ.currentCopro0) == 0) { 17179: irpFline (); 17180: break fscc; 17181: } 17182: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17183: int w; 17184: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 17185: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 17186: } else { 17187: w = XEiJ.regPC; 17188: XEiJ.regPC = w + 2; 17189: w = XEiJ.busRwze (w); //pcwz。拡張ワード 17190: } 17191: if ((w & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17192: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17193: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17194: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17195: irpException (M68kException.M6E_FP_BRANCH_SET_UNORDERED, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17196: break fscc; 17197: } 17198: } 17199: int ea = XEiJ.regOC & 63; 17200: if (ea < XEiJ.EA_AR) { //FScc.B Dr 17201: if (XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //セット 17202: XEiJ.mpuCycleCount += 10; 17203: XEiJ.regRn[ea] |= 0xff; 17204: } else { //クリア 17205: XEiJ.mpuCycleCount += 8; 17206: XEiJ.regRn[ea] &= ~0xff; 17207: } 17208: } else if (ea < XEiJ.EA_MM) { //FDBcc Dr,<label> 17209: if (XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //条件が成立しているので通過 17210: XEiJ.mpuCycleCount += 16; 17211: XEiJ.regPC += 2; //オフセットを読み飛ばす 17212: } else { 17213: int rrr = XEiJ.regOC & 7; 17214: int t = XEiJ.regRn[rrr]; 17215: if ((short) t == 0) { //Drの下位16bitが0なので通過 17216: XEiJ.mpuCycleCount += 18; 17217: XEiJ.regRn[rrr] = t + 65535; 17218: XEiJ.regPC += 2; //オフセットを読み飛ばす 17219: } else { //Drの下位16bitが0でないのでジャンプ 17220: XEiJ.mpuCycleCount += 14; 17221: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 17222: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 17223: } 17224: } 17225: } else if (ea < XEiJ.EA_PW) { //FScc.B <mem> 17226: XEiJ.mpuCycleCount += 12; 17227: XEiJ.busWb (efaMltByte (ea), XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15] ? 0xff : 0x00); 17228: } else if (ea <= XEiJ.EA_IM) { //FTRAPcc.W/FTRAPcc.L/FTRAPcc 17229: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 17230: XEiJ.regPC += t; 17231: if (!XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //通過 17232: XEiJ.mpuCycleCount += 8 + (t << 1); 17233: } else { 17234: XEiJ.mpuCycleCount += 4 + (t << 1); 17235: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 17236: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 17237: throw M68kException.m6eSignal; 17238: } 17239: } else { 17240: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 17241: irpFline (); 17242: break fscc; 17243: } 17244: } //fscc 17245: } //irpFscc 17246: 17247: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17248: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17249: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17250: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17251: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 17252: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 17253: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 17254: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 17255: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 17256: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 17257: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 17258: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 17259: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 17260: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 17261: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 17262: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 17263: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 17264: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 17265: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 17266: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 17267: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 17268: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 17269: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 17270: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 17271: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 17272: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 17273: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 17274: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 17275: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 17276: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 17277: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 17278: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 17279: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 17280: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 17281: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 17282: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 17283: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 17284: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 17285: public static void irpFbccWord () throws M68kException { 17286: fbcc: { 17287: if ((7 & XEiJ.currentCopro0) == 0) { 17288: irpFline (); 17289: break fbcc; 17290: } 17291: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17292: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17293: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17294: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17295: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17296: irpException (M68kException.M6E_FP_BRANCH_SET_UNORDERED, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17297: break fbcc; 17298: } 17299: } 17300: if (XEiJ.FPU_CCMAP_882[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //ジャンプ 17301: XEiJ.mpuCycleCount += 10; 17302: int s; 17303: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 17304: s = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 17305: } else { 17306: s = XEiJ.regPC; 17307: XEiJ.regPC = s + 2; 17308: s = XEiJ.busRwse (s); //pcws 17309: } 17310: irpSetPC (XEiJ.regPC0 + 2 + s); 17311: } else { //通過 17312: XEiJ.mpuCycleCount += 12; 17313: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 17314: } 17315: } //fbcc 17316: } //irpFbccWord 17317: 17318: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17319: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17320: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17322: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 17323: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 17324: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 17325: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 17326: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 17327: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 17328: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 17329: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 17330: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 17331: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 17332: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 17333: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 17334: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 17335: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 17336: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 17337: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 17338: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 17339: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 17340: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 17341: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 17342: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 17343: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 17344: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 17345: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 17346: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 17347: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 17348: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 17349: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 17350: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 17351: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 17352: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 17353: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 17354: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 17355: public static void irpFbccLong () throws M68kException { 17356: fbcc: { 17357: if ((7 & XEiJ.currentCopro0) == 0) { 17358: irpFline (); 17359: break fbcc; 17360: } 17361: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17362: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17363: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17364: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17365: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17366: irpException (M68kException.M6E_FP_BRANCH_SET_UNORDERED, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17367: break fbcc; 17368: } 17369: } 17370: if (XEiJ.FPU_CCMAP_882[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //ジャンプ 17371: XEiJ.mpuCycleCount += 14; 17372: int s; 17373: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 17374: s = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 17375: } else { 17376: s = XEiJ.regPC; 17377: XEiJ.regPC = s + 4; 17378: s = XEiJ.busRlse (s); //pcls 17379: } 17380: irpSetPC (XEiJ.regPC0 + 2 + s); 17381: } else { //通過 17382: XEiJ.mpuCycleCount += 12; 17383: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 17384: } 17385: } //fbcc 17386: } //irpFbccLong 17387: 17388: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17389: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17390: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17391: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17392: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 17393: public static void irpFsave () throws M68kException { 17394: if ((7 & XEiJ.currentCopro0) == 0) { 17395: irpFline (); 17396: return; 17397: } 17398: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17399: irpFline (); //特権違反またはFライン 17400: return; 17401: } 17402: //以下はスーパーバイザモード 17403: int ea = XEiJ.regOC & 63; 17404: int a; 17405: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 17406: int arr = XEiJ.regOC & 7 | 8; 17407: a = XEiJ.regRn[arr] -= 4; 17408: XEiJ.mpuCycleCount += 8; 17409: } else { //-(Ar)以外 17410: a = efaCltLong (ea); 17411: } 17412: XEiJ.busWl (a, 0); //NULL 17413: } //irpFsave 17414: 17415: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17416: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17417: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17418: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17419: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 17420: public static void irpFrestore () throws M68kException { 17421: if ((7 & XEiJ.currentCopro0) == 0) { 17422: irpFline (); 17423: return; 17424: } 17425: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17426: irpFline (); //特権違反またはFライン 17427: return; 17428: } 17429: //以下はスーパーバイザモード 17430: int ea = XEiJ.regOC & 63; 17431: int a; 17432: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 17433: int arr = XEiJ.regOC & 7 | 8; 17434: a = XEiJ.regRn[arr]; 17435: XEiJ.regRn[arr] = a + 4; 17436: XEiJ.mpuCycleCount += 8; 17437: } else { //(Ar)+以外 17438: a = efaCntLong (ea); 17439: } 17440: XEiJ.busRls (a); //NULL 17441: //FPSRのAEXCをクリアする 17442: XEiJ.fpuBox.epbFpsr = 0; 17443: //FPIARをクリアする 17444: XEiJ.fpuBox.epbFpiar = 0; 17445: } //irpFrestore 17446: 17447: //irpFPPreInstruction () 17448: // 浮動小数点命令実行前例外 floating-point pre-instruction exception 17449: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17450: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17451: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17452: public static boolean irpFPPreInstruction () throws M68kException { 17453: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17454: if (mask == 0) { 17455: return false; 17456: } 17457: irpException (FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)], 17458: XEiJ.regPC0, //pcは命令の先頭 17459: XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 17460: 0x0000, 17461: 0); 17462: return true; 17463: } //irpFPPreInstruction() 17464: 17465: //irpFPPostInstruction (a) 17466: // 浮動小数点命令実行後例外 floating-point post-instruction exception 17467: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17468: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17469: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17470: public static boolean irpFPPostInstruction (int a) throws M68kException { 17471: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17472: if (mask == 0) { 17473: return false; 17474: } 17475: irpException (FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)], 17476: XEiJ.regPC, //pcは次の命令 17477: XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 17478: 0x3000, 17479: a); 17480: return true; 17481: } //irpFPPostInstruction(int) 17482: 17483: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17484: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17485: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17486: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17487: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 17488: public static void irpFpack () throws M68kException { 17489: if (!MainMemory.mmrFEfuncActivated) { 17490: irpFline (); 17491: return; 17492: } 17493: StringBuilder sb; 17494: int a0; 17495: if (FEFunction.FPK_DEBUG_TRACE) { 17496: sb = new StringBuilder (); 17497: String name = Disassembler.DIS_FPACK_NAME[XEiJ.regOC & 255]; 17498: if (name.length () == 0) { 17499: XEiJ.fmtHex4 (sb.append ('$'), XEiJ.regOC); 17500: } else { 17501: sb.append (name); 17502: } 17503: sb.append ('\n'); 17504: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 17505: a0 = XEiJ.regRn[8]; 17506: MainMemory.mmrRstr (sb.append (" (A0)=\""), a0, MainMemory.mmrStrlen (a0, 20)).append ("\"\n"); 17507: } 17508: XEiJ.mpuCycleCount += FEFunction.FPK_CLOCK; //一律にFEFunction.FPK_CLOCKサイクルかかることにする 17509: switch (XEiJ.regOC & 255) { 17510: case 0x00: FEFunction.fpkLMUL (); break; 17511: case 0x01: FEFunction.fpkLDIV (); break; 17512: case 0x02: FEFunction.fpkLMOD (); break; 17513: //case 0x03: break; 17514: case 0x04: FEFunction.fpkUMUL (); break; 17515: case 0x05: FEFunction.fpkUDIV (); break; 17516: case 0x06: FEFunction.fpkUMOD (); break; 17517: //case 0x07: break; 17518: case 0x08: FEFunction.fpkIMUL (); break; 17519: case 0x09: FEFunction.fpkIDIV (); break; 17520: //case 0x0a: break; 17521: //case 0x0b: break; 17522: case 0x0c: FEFunction.fpkRANDOMIZE (); break; 17523: case 0x0d: FEFunction.fpkSRAND (); break; 17524: case 0x0e: FEFunction.fpkRAND (); break; 17525: //case 0x0f: break; 17526: case 0x10: FEFunction.fpkSTOL (); break; 17527: case 0x11: FEFunction.fpkLTOS (); break; 17528: case 0x12: FEFunction.fpkSTOH (); break; 17529: case 0x13: FEFunction.fpkHTOS (); break; 17530: case 0x14: FEFunction.fpkSTOO (); break; 17531: case 0x15: FEFunction.fpkOTOS (); break; 17532: case 0x16: FEFunction.fpkSTOB (); break; 17533: case 0x17: FEFunction.fpkBTOS (); break; 17534: case 0x18: FEFunction.fpkIUSING (); break; 17535: //case 0x19: break; 17536: case 0x1a: FEFunction.fpkLTOD (); break; 17537: case 0x1b: FEFunction.fpkDTOL (); break; 17538: case 0x1c: FEFunction.fpkLTOF (); break; 17539: case 0x1d: FEFunction.fpkFTOL (); break; 17540: case 0x1e: FEFunction.fpkFTOD (); break; 17541: case 0x1f: FEFunction.fpkDTOF (); break; 17542: case 0x20: FEFunction.fpkVAL (); break; 17543: case 0x21: FEFunction.fpkUSING (); break; 17544: case 0x22: FEFunction.fpkSTOD (); break; 17545: case 0x23: FEFunction.fpkDTOS (); break; 17546: case 0x24: FEFunction.fpkECVT (); break; 17547: case 0x25: FEFunction.fpkFCVT (); break; 17548: case 0x26: FEFunction.fpkGCVT (); break; 17549: //case 0x27: break; 17550: case 0x28: FEFunction.fpkDTST (); break; 17551: case 0x29: FEFunction.fpkDCMP (); break; 17552: case 0x2a: FEFunction.fpkDNEG (); break; 17553: case 0x2b: FEFunction.fpkDADD (); break; 17554: case 0x2c: FEFunction.fpkDSUB (); break; 17555: case 0x2d: FEFunction.fpkDMUL (); break; 17556: case 0x2e: FEFunction.fpkDDIV (); break; 17557: case 0x2f: FEFunction.fpkDMOD (); break; 17558: case 0x30: FEFunction.fpkDABS (); break; 17559: case 0x31: FEFunction.fpkDCEIL (); break; 17560: case 0x32: FEFunction.fpkDFIX (); break; 17561: case 0x33: FEFunction.fpkDFLOOR (); break; 17562: case 0x34: FEFunction.fpkDFRAC (); break; 17563: case 0x35: FEFunction.fpkDSGN (); break; 17564: case 0x36: FEFunction.fpkSIN (); break; 17565: case 0x37: FEFunction.fpkCOS (); break; 17566: case 0x38: FEFunction.fpkTAN (); break; 17567: case 0x39: FEFunction.fpkATAN (); break; 17568: case 0x3a: FEFunction.fpkLOG (); break; 17569: case 0x3b: FEFunction.fpkEXP (); break; 17570: case 0x3c: FEFunction.fpkSQR (); break; 17571: case 0x3d: FEFunction.fpkPI (); break; 17572: case 0x3e: FEFunction.fpkNPI (); break; 17573: case 0x3f: FEFunction.fpkPOWER (); break; 17574: case 0x40: FEFunction.fpkRND (); break; 17575: case 0x41: FEFunction.fpkSINH (); break; 17576: case 0x42: FEFunction.fpkCOSH (); break; 17577: case 0x43: FEFunction.fpkTANH (); break; 17578: case 0x44: FEFunction.fpkATANH (); break; 17579: case 0x45: FEFunction.fpkASIN (); break; 17580: case 0x46: FEFunction.fpkACOS (); break; 17581: case 0x47: FEFunction.fpkLOG10 (); break; 17582: case 0x48: FEFunction.fpkLOG2 (); break; 17583: case 0x49: FEFunction.fpkDFREXP (); break; 17584: case 0x4a: FEFunction.fpkDLDEXP (); break; 17585: case 0x4b: FEFunction.fpkDADDONE (); break; 17586: case 0x4c: FEFunction.fpkDSUBONE (); break; 17587: case 0x4d: FEFunction.fpkDDIVTWO (); break; 17588: case 0x4e: FEFunction.fpkDIEECNV (); break; 17589: case 0x4f: FEFunction.fpkIEEDCNV (); break; 17590: case 0x50: FEFunction.fpkFVAL (); break; 17591: case 0x51: FEFunction.fpkFUSING (); break; 17592: case 0x52: FEFunction.fpkSTOF (); break; 17593: case 0x53: FEFunction.fpkFTOS (); break; 17594: case 0x54: FEFunction.fpkFECVT (); break; 17595: case 0x55: FEFunction.fpkFFCVT (); break; 17596: case 0x56: FEFunction.fpkFGCVT (); break; 17597: //case 0x57: break; 17598: case 0x58: FEFunction.fpkFTST (); break; 17599: case 0x59: FEFunction.fpkFCMP (); break; 17600: case 0x5a: FEFunction.fpkFNEG (); break; 17601: case 0x5b: FEFunction.fpkFADD (); break; 17602: case 0x5c: FEFunction.fpkFSUB (); break; 17603: case 0x5d: FEFunction.fpkFMUL (); break; 17604: case 0x5e: FEFunction.fpkFDIV (); break; 17605: case 0x5f: FEFunction.fpkFMOD (); break; 17606: case 0x60: FEFunction.fpkFABS (); break; 17607: case 0x61: FEFunction.fpkFCEIL (); break; 17608: case 0x62: FEFunction.fpkFFIX (); break; 17609: case 0x63: FEFunction.fpkFFLOOR (); break; 17610: case 0x64: FEFunction.fpkFFRAC (); break; 17611: case 0x65: FEFunction.fpkFSGN (); break; 17612: case 0x66: FEFunction.fpkFSIN (); break; 17613: case 0x67: FEFunction.fpkFCOS (); break; 17614: case 0x68: FEFunction.fpkFTAN (); break; 17615: case 0x69: FEFunction.fpkFATAN (); break; 17616: case 0x6a: FEFunction.fpkFLOG (); break; 17617: case 0x6b: FEFunction.fpkFEXP (); break; 17618: case 0x6c: FEFunction.fpkFSQR (); break; 17619: case 0x6d: FEFunction.fpkFPI (); break; 17620: case 0x6e: FEFunction.fpkFNPI (); break; 17621: case 0x6f: FEFunction.fpkFPOWER (); break; 17622: case 0x70: FEFunction.fpkFRND (); break; 17623: case 0x71: FEFunction.fpkFSINH (); break; 17624: case 0x72: FEFunction.fpkFCOSH (); break; 17625: case 0x73: FEFunction.fpkFTANH (); break; 17626: case 0x74: FEFunction.fpkFATANH (); break; 17627: case 0x75: FEFunction.fpkFASIN (); break; 17628: case 0x76: FEFunction.fpkFACOS (); break; 17629: case 0x77: FEFunction.fpkFLOG10 (); break; 17630: case 0x78: FEFunction.fpkFLOG2 (); break; 17631: case 0x79: FEFunction.fpkFFREXP (); break; 17632: case 0x7a: FEFunction.fpkFLDEXP (); break; 17633: case 0x7b: FEFunction.fpkFADDONE (); break; 17634: case 0x7c: FEFunction.fpkFSUBONE (); break; 17635: case 0x7d: FEFunction.fpkFDIVTWO (); break; 17636: case 0x7e: FEFunction.fpkFIEECNV (); break; 17637: case 0x7f: FEFunction.fpkIEEFCNV (); break; 17638: //case 0x80: break; 17639: //case 0x81: break; 17640: //case 0x82: break; 17641: //case 0x83: break; 17642: //case 0x84: break; 17643: //case 0x85: break; 17644: //case 0x86: break; 17645: //case 0x87: break; 17646: //case 0x88: break; 17647: //case 0x89: break; 17648: //case 0x8a: break; 17649: //case 0x8b: break; 17650: //case 0x8c: break; 17651: //case 0x8d: break; 17652: //case 0x8e: break; 17653: //case 0x8f: break; 17654: //case 0x90: break; 17655: //case 0x91: break; 17656: //case 0x92: break; 17657: //case 0x93: break; 17658: //case 0x94: break; 17659: //case 0x95: break; 17660: //case 0x96: break; 17661: //case 0x97: break; 17662: //case 0x98: break; 17663: //case 0x99: break; 17664: //case 0x9a: break; 17665: //case 0x9b: break; 17666: //case 0x9c: break; 17667: //case 0x9d: break; 17668: //case 0x9e: break; 17669: //case 0x9f: break; 17670: //case 0xa0: break; 17671: //case 0xa1: break; 17672: //case 0xa2: break; 17673: //case 0xa3: break; 17674: //case 0xa4: break; 17675: //case 0xa5: break; 17676: //case 0xa6: break; 17677: //case 0xa7: break; 17678: //case 0xa8: break; 17679: //case 0xa9: break; 17680: //case 0xaa: break; 17681: //case 0xab: break; 17682: //case 0xac: break; 17683: //case 0xad: break; 17684: //case 0xae: break; 17685: //case 0xaf: break; 17686: //case 0xb0: break; 17687: //case 0xb1: break; 17688: //case 0xb2: break; 17689: //case 0xb3: break; 17690: //case 0xb4: break; 17691: //case 0xb5: break; 17692: //case 0xb6: break; 17693: //case 0xb7: break; 17694: //case 0xb8: break; 17695: //case 0xb9: break; 17696: //case 0xba: break; 17697: //case 0xbb: break; 17698: //case 0xbc: break; 17699: //case 0xbd: break; 17700: //case 0xbe: break; 17701: //case 0xbf: break; 17702: //case 0xc0: break; 17703: //case 0xc1: break; 17704: //case 0xc2: break; 17705: //case 0xc3: break; 17706: //case 0xc4: break; 17707: //case 0xc5: break; 17708: //case 0xc6: break; 17709: //case 0xc7: break; 17710: //case 0xc8: break; 17711: //case 0xc9: break; 17712: //case 0xca: break; 17713: //case 0xcb: break; 17714: //case 0xcc: break; 17715: //case 0xcd: break; 17716: //case 0xce: break; 17717: //case 0xcf: break; 17718: //case 0xd0: break; 17719: //case 0xd1: break; 17720: //case 0xd2: break; 17721: //case 0xd3: break; 17722: //case 0xd4: break; 17723: //case 0xd5: break; 17724: //case 0xd6: break; 17725: //case 0xd7: break; 17726: //case 0xd8: break; 17727: //case 0xd9: break; 17728: //case 0xda: break; 17729: //case 0xdb: break; 17730: //case 0xdc: break; 17731: //case 0xdd: break; 17732: //case 0xde: break; 17733: //case 0xdf: break; 17734: case 0xe0: FEFunction.fpkCLMUL (); break; 17735: case 0xe1: FEFunction.fpkCLDIV (); break; 17736: case 0xe2: FEFunction.fpkCLMOD (); break; 17737: case 0xe3: FEFunction.fpkCUMUL (); break; 17738: case 0xe4: FEFunction.fpkCUDIV (); break; 17739: case 0xe5: FEFunction.fpkCUMOD (); break; 17740: case 0xe6: FEFunction.fpkCLTOD (); break; 17741: case 0xe7: FEFunction.fpkCDTOL (); break; 17742: case 0xe8: FEFunction.fpkCLTOF (); break; 17743: case 0xe9: FEFunction.fpkCFTOL (); break; 17744: case 0xea: FEFunction.fpkCFTOD (); break; 17745: case 0xeb: FEFunction.fpkCDTOF (); break; 17746: case 0xec: FEFunction.fpkCDCMP (); break; 17747: case 0xed: FEFunction.fpkCDADD (); break; 17748: case 0xee: FEFunction.fpkCDSUB (); break; 17749: case 0xef: FEFunction.fpkCDMUL (); break; 17750: case 0xf0: FEFunction.fpkCDDIV (); break; 17751: case 0xf1: FEFunction.fpkCDMOD (); break; 17752: case 0xf2: FEFunction.fpkCFCMP (); break; 17753: case 0xf3: FEFunction.fpkCFADD (); break; 17754: case 0xf4: FEFunction.fpkCFSUB (); break; 17755: case 0xf5: FEFunction.fpkCFMUL (); break; 17756: case 0xf6: FEFunction.fpkCFDIV (); break; 17757: case 0xf7: FEFunction.fpkCFMOD (); break; 17758: case 0xf8: FEFunction.fpkCDTST (); break; 17759: case 0xf9: FEFunction.fpkCFTST (); break; 17760: case 0xfa: FEFunction.fpkCDINC (); break; 17761: case 0xfb: FEFunction.fpkCFINC (); break; 17762: case 0xfc: FEFunction.fpkCDDEC (); break; 17763: case 0xfd: FEFunction.fpkCFDEC (); break; 17764: case 0xfe: FEFunction.fpkFEVARG (); break; 17765: //case 0xff: FEFunction.fpkFEVECS (); break; //FLOATn.Xに処理させる 17766: default: 17767: XEiJ.mpuCycleCount -= FEFunction.FPK_CLOCK; //戻す 17768: irpFline (); 17769: } 17770: if (FEFunction.FPK_DEBUG_TRACE) { 17771: int i = sb.length (); 17772: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 17773: int l = MainMemory.mmrStrlen (a0, 20); 17774: sb.append (" (A0)=\""); 17775: i = sb.length () - i; 17776: MainMemory.mmrRstr (sb, a0, l).append ("\"\n"); 17777: if (a0 <= XEiJ.regRn[8] && XEiJ.regRn[8] <= a0 + l) { 17778: for (i += sb.length () + XEiJ.regRn[8] - a0; sb.length () < i; ) { 17779: sb.append (' '); 17780: } 17781: sb.append ('^'); 17782: } 17783: System.out.println (sb.toString ()); 17784: } 17785: } //irpFpack 17786: 17787: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17788: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17789: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17790: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17791: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 17792: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17793: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17794: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17795: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17796: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 17797: public static void irpFline () throws M68kException { 17798: int oc9 = XEiJ.regOC & 0b0000_000_111_111_111; //命令コードの下位9bit 17799: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17800: if ((0b100_010_000 <= oc9 && oc9 <= 0b100_010_111) || //cpSAVE (Ar) 17801: (0b100_100_000 <= oc9 && oc9 <= 0b100_111_001) || //cpSAVE -(Ar)|(d16,Ar)|(d8,Ar,Rn.wl)|(xxx).W|(xxx).L 17802: (0b101_010_000 <= oc9 && oc9 <= 0b101_011_111) || //cpRESTORE (Ar)|(Ar)+ 17803: (0b101_101_000 <= oc9 && oc9 <= 0b101_111_011) //cpRESTORE (d16,Ar)|(d8,Ar,Rn.wl)|(xxx).W|(xxx).L|(d16,PC)|(d8,PC,Rn.wl) 17804: ) { //cpSAVEまたはcpRESTOREでアドレッシングモードが有効なとき 17805: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; //特権違反 17806: throw M68kException.m6eSignal; 17807: } 17808: } else { //スーパーバイザモードのとき 17809: if ((0b101_010_000 <= oc9 && oc9 <= 0b101_011_111) || //cpRESTORE (Ar)|(Ar)+ 17810: (0b101_101_000 <= oc9 && oc9 <= 0b101_111_011) //cpRESTORE (d16,Ar)|(d8,Ar,Rn.wl)|(xxx).W|(xxx).L|(d16,PC)|(d8,PC,Rn.wl) 17811: ) { //cpRESTOREでアドレッシングモードが有効なとき 17812: int ea = oc9 & 63; 17813: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+を 17814: ea += (XEiJ.MMM_MM - XEiJ.MMM_MP) << 3; //(Ar)とみなす 17815: } 17816: XEiJ.busRls (efaCntLong (ea)); //<ea>をリードする。ここでバスエラーが発生する可能性がある 17817: } 17818: } 17819: XEiJ.mpuCycleCount += 34; 17820: if (XEiJ.MPU_INLINE_EXCEPTION) { 17821: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 17822: int sp = XEiJ.regRn[15]; 17823: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 17824: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17825: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 17826: XEiJ.mpuUSP = sp; //USPを保存 17827: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 17828: if (DataBreakPoint.DBP_ON) { 17829: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 17830: } else { 17831: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 17832: } 17833: if (InstructionBreakPoint.IBP_ON) { 17834: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 17835: } 17836: } 17837: XEiJ.regRn[15] = sp -= 8; 17838: XEiJ.busWw (sp + 6, 0x0000 | M68kException.M6E_LINE_1111_EMULATOR << 2); //pushw。フォーマットとベクタオフセットをプッシュする 17839: XEiJ.busWl (sp + 2, XEiJ.regPC0); //pushl。pcをプッシュする 17840: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 17841: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.M6E_LINE_1111_EMULATOR << 2))); //例外ベクタを取り出してジャンプする 17842: } else { 17843: irpException (M68kException.M6E_LINE_1111_EMULATOR, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17844: } 17845: } //irpFline 17846: 17847: //irpIllegal () 17848: // オペコードの上位10bitで分類されなかった未実装命令 17849: // 命令実行回数をカウントするために分けてある 17850: // 0x4afcのILLEGAL命令はTASに分類されて未実装実効アドレスで処理されるのでここには来ない 17851: public static void irpIllegal () throws M68kException { 17852: if (true) { 17853: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17854: throw M68kException.m6eSignal; 17855: } 17856: } //irpIllegal 17857: 17858: //z = irpAbcd (x, y) 17859: // ABCD 17860: public static int irpAbcd (int x, int y) { 17861: int c = XEiJ.regCCR >> 4; 17862: int t = (x & 0xff) + (y & 0xff) + c; //仮の結果 17863: int z = t; //結果 17864: if (0x0a <= (x & 0x0f) + (y & 0x0f) + c) { //ハーフキャリー 17865: z += 0x10 - 0x0a; 17866: } 17867: //XとCはキャリーがあるときセット、さもなくばクリア 17868: if (0xa0 <= z) { //キャリー 17869: z += 0x100 - 0xa0; 17870: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 17871: } else { 17872: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 17873: } 17874: //Zは結果が0でないときクリア、さもなくば変化しない 17875: z &= 0xff; 17876: if (z != 0x00) { 17877: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 17878: } 17879: if (false) { 17880: //000/030のときNは結果の最上位ビット 17881: if ((z & 0x80) != 0) { 17882: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17883: } else { 17884: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17885: } 17886: //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア 17887: int a = z - t; //補正値 17888: if ((((t ^ z) & (a ^ z)) & 0x80) != 0) { 17889: XEiJ.regCCR |= XEiJ.REG_CCR_V; 17890: } else { 17891: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17892: } 17893: } else if (true) { 17894: //000/030のときNは結果の最上位ビット 17895: if ((z & 0x80) != 0) { 17896: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17897: } else { 17898: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17899: } 17900: //030のときVはクリア 17901: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17902: } else { 17903: //060のときNとVは変化しない 17904: } 17905: return z; 17906: } //irpAbcd 17907: 17908: //z = irpSbcd (x, y) 17909: // SBCD 17910: public static int irpSbcd (int x, int y) { 17911: int b = XEiJ.regCCR >> 4; 17912: int t = (x & 0xff) - (y & 0xff) - b; //仮の結果 17913: int z = t; //結果 17914: if ((x & 0x0f) - (y & 0x0f) - b < 0) { //ハーフボロー 17915: z -= 0x10 - 0x0a; 17916: } 17917: //XとCはボローがあるときセット、さもなくばクリア 17918: if (z < 0) { //ボロー 17919: if (t < 0) { 17920: z -= 0x100 - 0xa0; 17921: } 17922: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 17923: } else { 17924: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 17925: } 17926: //Zは結果が0でないときクリア、さもなくば変化しない 17927: z &= 0xff; 17928: if (z != 0x00) { 17929: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 17930: } 17931: if (false) { 17932: //000/030のときNは結果の最上位ビット 17933: if ((z & 0x80) != 0) { 17934: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17935: } else { 17936: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17937: } 17938: //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア 17939: int a = z - t; //補正値 17940: if ((((t ^ z) & (a ^ z)) & 0x80) != 0) { 17941: XEiJ.regCCR |= XEiJ.REG_CCR_V; 17942: } else { 17943: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17944: } 17945: } else if (true) { 17946: //000/030のときNは結果の最上位ビット 17947: if ((z & 0x80) != 0) { 17948: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17949: } else { 17950: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17951: } 17952: //030のときVはクリア 17953: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17954: } else { 17955: //060のときNとVは変化しない 17956: } 17957: return z; 17958: } //irpSbcd 17959: 17960: 17961: 17962: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17963: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17964: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17965: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17966: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 17967: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 17968: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 17969: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 17970: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 17971: // エミュレータ拡張命令 17972: public static void irpEmx () throws M68kException { 17973: switch (XEiJ.regOC & 63) { 17974: case XEiJ.EMX_OPCODE_HFSBOOT & 63: 17975: XEiJ.mpuCycleCount += 40; 17976: if (HFS.hfsIPLBoot ()) { 17977: //JMP $6800.W 17978: irpSetPC (0x00006800); 17979: } 17980: break; 17981: case XEiJ.EMX_OPCODE_HFSINST & 63: 17982: XEiJ.mpuCycleCount += 40; 17983: HFS.hfsInstall (); 17984: break; 17985: case XEiJ.EMX_OPCODE_HFSSTR & 63: 17986: XEiJ.mpuCycleCount += 40; 17987: HFS.hfsStrategy (); 17988: break; 17989: case XEiJ.EMX_OPCODE_HFSINT & 63: 17990: XEiJ.mpuCycleCount += 40; 17991: //XEiJ.mpuClockTime += (int) (TMR_FREQ / 100000L); //0.01ms 17992: if (HFS.hfsInterrupt ()) { 17993: //WAIT 17994: XEiJ.mpuTraceFlag = 0; //トレース例外を発生させない 17995: XEiJ.regPC = XEiJ.regPC0; //ループ 17996: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。10MHzのとき40clk 17997: XEiJ.mpuLastNano += 4000L; 17998: } 17999: break; 18000: case XEiJ.EMX_OPCODE_EMXNOP & 63: 18001: XEiJ.emxNop (); 18002: break; 18003: case XEiJ.EMX_OPCODE_EMXWAIT & 63: 18004: WaitInstruction.execute (); //待機命令を実行する 18005: break; 18006: default: 18007: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18008: throw M68kException.m6eSignal; 18009: } 18010: } //irpEmx 18011: 18012: 18013: 18014: //irpSetPC (a) 18015: // pcへデータを書き込む 18016: // 奇数のときはアドレスエラーが発生する 18017: public static void irpSetPC (int a) throws M68kException { 18018: if (XEiJ.TEST_BIT_0_SHIFT ? a << 31 - 0 < 0 : (a & 1) != 0) { 18019: M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR; 18020: M68kException.m6eAddress = a & -2; //アドレスを偶数にする 18021: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 18022: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 18023: throw M68kException.m6eSignal; 18024: } 18025: XEiJ.mpuTraceFlag |= XEiJ.regSRT0; //フロートレース 18026: if (BranchLog.BLG_ON) { 18027: BranchLog.blgJump (a); //分岐ログに分岐レコードを追加する 18028: } else { 18029: XEiJ.regPC = a; 18030: } 18031: } //irpSetPC 18032: 18033: //irpSetSR (newSr) 18034: // srへデータを書き込む 18035: // ori to sr/andi to sr/eori to sr/move to sr/stop/rteで使用される 18036: // スーパーバイザモードになっていることを確認してから呼び出すこと 18037: // rteではr[15]が指すアドレスからsrとpcを取り出してr[15]を更新してから呼び出すこと 18038: // スーパーバイザモード→ユーザモードのときは移行のための処理を行う 18039: // 新しい割り込みマスクレベルよりも高い割り込み処理の終了をデバイスに通知する 18040: public static void irpSetSR (int newSr) { 18041: XEiJ.regSRT1 = XEiJ.REG_SR_T1 & newSr; 18042: XEiJ.regSRT0 = XEiJ.REG_SR_T0 & newSr; 18043: int old_srM = XEiJ.regSRM; 18044: XEiJ.regSRM = XEiJ.REG_SR_M & newSr; 18045: if ((XEiJ.regSRS = XEiJ.REG_SR_S & newSr) == 0) { //スーパーバイザモード→ユーザモード 18046: if (old_srM != 0) { //スーパーバイザマスタモード→ユーザモード 18047: XEiJ.mpuMSP = XEiJ.regRn[15]; //XEiJ.mpuMSPを保存 18048: } else { //スーパーバイザ割り込みモード→ユーザモード 18049: XEiJ.mpuISP = XEiJ.regRn[15]; //XEiJ.mpuISPを保存 18050: } 18051: XEiJ.regRn[15] = XEiJ.mpuUSP; //XEiJ.mpuUSPを復元 18052: if (DataBreakPoint.DBP_ON) { 18053: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpUserMap; //ユーザメモリマップに切り替える 18054: } else { 18055: XEiJ.busMemoryMap = XEiJ.busUserMap; //ユーザメモリマップに切り替える 18056: } 18057: if (InstructionBreakPoint.IBP_ON) { 18058: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1UserMap; 18059: } 18060: } else if (old_srM != XEiJ.regSRM) { 18061: if (old_srM != 0) { //マスタモード→割り込みモード 18062: XEiJ.mpuMSP = XEiJ.regRn[15]; //XEiJ.mpuMSPを保存 18063: XEiJ.regRn[15] = XEiJ.mpuISP; //XEiJ.mpuISPを復元 18064: } else { //割り込みモード→マスタモード 18065: XEiJ.mpuISP = XEiJ.regRn[15]; //XEiJ.mpuISPを保存 18066: XEiJ.regRn[15] = XEiJ.mpuMSP; //XEiJ.mpuMSPを復元 18067: } 18068: } 18069: int t = (XEiJ.mpuIMR = 0x7f >> ((XEiJ.regSRI = XEiJ.REG_SR_I & newSr) >> 8)) & XEiJ.mpuISR; //XEiJ.mpuISRで1→0とするビット 18070: if (t != 0) { //終了する割り込みがあるとき 18071: XEiJ.mpuISR ^= t; 18072: //デバイスに割り込み処理の終了を通知する 18073: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { //MFPのみ 18074: MC68901.mfpDone (); 18075: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { //DMAのみ 18076: HD63450.dmaDone (); 18077: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { //SCCのみ 18078: Z8530.sccDone (); 18079: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { //IOIのみ 18080: IOInterrupt.ioiDone (); 18081: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { //EB2のみ 18082: XEiJ.eb2Done (); 18083: } else { //SYSのみまたは複数 18084: if (XEiJ.TEST_BIT_1_SHIFT ? t << 24 + XEiJ.MPU_MFP_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_MFP_INTERRUPT_MASK) != 0) { 18085: MC68901.mfpDone (); 18086: } 18087: if (t << 24 + XEiJ.MPU_DMA_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_DMA_INTERRUPT_MASK) != 0 18088: HD63450.dmaDone (); 18089: } 18090: if (XEiJ.TEST_BIT_2_SHIFT ? t << 24 + XEiJ.MPU_SCC_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SCC_INTERRUPT_MASK) != 0) { 18091: Z8530.sccDone (); 18092: } 18093: if (t << 24 + XEiJ.MPU_IOI_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_IOI_INTERRUPT_MASK) != 0 18094: IOInterrupt.ioiDone (); 18095: } 18096: if (t << 24 + XEiJ.MPU_EB2_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_EB2_INTERRUPT_MASK) != 0 18097: XEiJ.eb2Done (); 18098: } 18099: if (XEiJ.TEST_BIT_0_SHIFT ? t << 24 + XEiJ.MPU_SYS_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SYS_INTERRUPT_MASK) != 0) { 18100: XEiJ.sysDone (); 18101: } 18102: } 18103: } 18104: XEiJ.mpuIMR |= ~XEiJ.mpuISR & XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みマスクレベルが7のときレベル7割り込みの処理中でなければレベル7割り込みを許可する 18105: XEiJ.regCCR = XEiJ.REG_CCR_MASK & newSr; 18106: } //irpSetSR 18107: 18108: //irpInterrupt (vectorNumber, level) 18109: // 割り込み処理を開始する 18110: public static void irpInterrupt (int vectorNumber, int level) throws M68kException { 18111: if (XEiJ.regOC == 0b0100_111_001_110_010) { //最後に実行した命令はSTOP命令 18112: XEiJ.regPC = XEiJ.regPC0 + 4; //次の命令に進む 18113: } 18114: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 44; 18115: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18116: XEiJ.regSRI = level << 8; //割り込みマスクを要求されたレベルに変更する 18117: XEiJ.mpuIMR = 0x7f >> level; 18118: XEiJ.mpuISR |= 0x80 >> level; 18119: int sp = XEiJ.regRn[15]; 18120: XEiJ.regSRT1 = XEiJ.regSRT0 = 0; //srのTビットを消す 18121: if (XEiJ.regSRS == 0) { //ユーザモードのとき 18122: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18123: XEiJ.mpuUSP = sp; //USPを保存 18124: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 18125: if (DataBreakPoint.DBP_ON) { 18126: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18127: } else { 18128: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18129: } 18130: if (InstructionBreakPoint.IBP_ON) { 18131: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18132: } 18133: } 18134: XEiJ.regRn[15] = sp -= 8; 18135: XEiJ.busWw (sp + 6, 0x0000 | vectorNumber << 2); //pushw。フォーマットとベクタオフセットをプッシュする 18136: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 18137: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 18138: if (XEiJ.regSRM != 0) { //マスタモードのとき 18139: save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18140: XEiJ.regSRM = 0; //割り込みモードへ移行する 18141: XEiJ.mpuMSP = sp; //XEiJ.mpuMSPを保存 18142: sp = XEiJ.mpuISP; //SSPを復元 18143: //割り込みスタックにスローアウェイフレームを作成する 18144: XEiJ.regRn[15] = sp -= 8; 18145: XEiJ.busWw (sp + 6, 0x1000 | vectorNumber << 2); //pushw。フォーマットとベクタオフセットをプッシュする 18146: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 18147: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 18148: } 18149: if (BranchLog.BLG_ON) { 18150: XEiJ.regPC0 = XEiJ.regPC; //rteによる割り込み終了と同時に次の割り込みを受け付けたとき間でpc0を更新しないと2番目の分岐レコードの終了アドレスが1番目と同じになっておかしな分岐レコードができてしまう 18151: } 18152: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (vectorNumber << 2))); //例外ベクタを取り出してジャンプする 18153: } //irpInterrupt 18154: 18155: //irpException (vectorNumber, save_pc, save_sr, format, address) 18156: // 例外処理を開始する 18157: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18158: public static void irpException (int vectorNumber, int save_pc, int save_sr, int format, int address) throws M68kException { 18159: int sp = XEiJ.regRn[15]; 18160: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18161: if (XEiJ.regSRS == 0) { //ユーザモードのとき 18162: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18163: XEiJ.mpuUSP = sp; //USPを保存 18164: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 18165: if (DataBreakPoint.DBP_ON) { 18166: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18167: } else { 18168: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18169: } 18170: if (InstructionBreakPoint.IBP_ON) { 18171: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18172: } 18173: } 18174: if (format <= 0x1000) { 18175: XEiJ.regRn[15] = sp -= 8; 18176: } else { 18177: XEiJ.regRn[15] = sp -= 12; 18178: XEiJ.busWl (sp + 8, address); //pushl。アドレスをプッシュする 18179: } 18180: XEiJ.busWw (sp + 6, format | vectorNumber << 2); //pushw。フォーマットとベクタオフセットをプッシュする 18181: XEiJ.busWl (sp + 2, save_pc); //pushl。pcをプッシュする 18182: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 18183: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (vectorNumber << 2))); //例外ベクタを取り出してジャンプする 18184: } //irpException 18185: 18186: 18187: 18188: //a = efaAnyByte (ea) //| M+-WXZPI| 18189: // 任意のモードのバイトオペランドの実効アドレスを求める 18190: // (A7)+と-(A7)はA7を奇偶に関わらず2変化させ、跨いだワードの上位バイト(アドレスの小さい方)を参照する 18191: // #<data>はオペコードに続くワードの下位バイトを参照する。上位バイトは不定なので参照してはならない 18192: @SuppressWarnings ("fallthrough") public static int efaAnyByte (int ea) throws M68kException { 18193: int t, w, x; 18194: switch (ea) { 18195: case 0b010_000: //(A0) 18196: if (XEiJ.EFA_SEPARATE_AR) { 18197: XEiJ.mpuCycleCount += 4; 18198: return XEiJ.regRn[ 8]; 18199: } 18200: //fallthrough 18201: case 0b010_001: //(A1) 18202: if (XEiJ.EFA_SEPARATE_AR) { 18203: XEiJ.mpuCycleCount += 4; 18204: return XEiJ.regRn[ 9]; 18205: } 18206: //fallthrough 18207: case 0b010_010: //(A2) 18208: if (XEiJ.EFA_SEPARATE_AR) { 18209: XEiJ.mpuCycleCount += 4; 18210: return XEiJ.regRn[10]; 18211: } 18212: //fallthrough 18213: case 0b010_011: //(A3) 18214: if (XEiJ.EFA_SEPARATE_AR) { 18215: XEiJ.mpuCycleCount += 4; 18216: return XEiJ.regRn[11]; 18217: } 18218: //fallthrough 18219: case 0b010_100: //(A4) 18220: if (XEiJ.EFA_SEPARATE_AR) { 18221: XEiJ.mpuCycleCount += 4; 18222: return XEiJ.regRn[12]; 18223: } 18224: //fallthrough 18225: case 0b010_101: //(A5) 18226: if (XEiJ.EFA_SEPARATE_AR) { 18227: XEiJ.mpuCycleCount += 4; 18228: return XEiJ.regRn[13]; 18229: } 18230: //fallthrough 18231: case 0b010_110: //(A6) 18232: if (XEiJ.EFA_SEPARATE_AR) { 18233: XEiJ.mpuCycleCount += 4; 18234: return XEiJ.regRn[14]; 18235: } 18236: //fallthrough 18237: case 0b010_111: //(A7) 18238: if (XEiJ.EFA_SEPARATE_AR) { 18239: XEiJ.mpuCycleCount += 4; 18240: return XEiJ.regRn[15]; 18241: } else { 18242: XEiJ.mpuCycleCount += 4; 18243: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18244: } 18245: case 0b011_000: //(A0)+ 18246: if (XEiJ.EFA_SEPARATE_AR) { 18247: XEiJ.mpuCycleCount += 4; 18248: return XEiJ.regRn[ 8]++; 18249: } 18250: //fallthrough 18251: case 0b011_001: //(A1)+ 18252: if (XEiJ.EFA_SEPARATE_AR) { 18253: XEiJ.mpuCycleCount += 4; 18254: return XEiJ.regRn[ 9]++; 18255: } 18256: //fallthrough 18257: case 0b011_010: //(A2)+ 18258: if (XEiJ.EFA_SEPARATE_AR) { 18259: XEiJ.mpuCycleCount += 4; 18260: return XEiJ.regRn[10]++; 18261: } 18262: //fallthrough 18263: case 0b011_011: //(A3)+ 18264: if (XEiJ.EFA_SEPARATE_AR) { 18265: XEiJ.mpuCycleCount += 4; 18266: return XEiJ.regRn[11]++; 18267: } 18268: //fallthrough 18269: case 0b011_100: //(A4)+ 18270: if (XEiJ.EFA_SEPARATE_AR) { 18271: XEiJ.mpuCycleCount += 4; 18272: return XEiJ.regRn[12]++; 18273: } 18274: //fallthrough 18275: case 0b011_101: //(A5)+ 18276: if (XEiJ.EFA_SEPARATE_AR) { 18277: XEiJ.mpuCycleCount += 4; 18278: return XEiJ.regRn[13]++; 18279: } 18280: //fallthrough 18281: case 0b011_110: //(A6)+ 18282: if (XEiJ.EFA_SEPARATE_AR) { 18283: XEiJ.mpuCycleCount += 4; 18284: return XEiJ.regRn[14]++; 18285: } else { 18286: XEiJ.mpuCycleCount += 4; 18287: return XEiJ.regRn[ea - (0b011_000 - 8)]++; 18288: } 18289: case 0b011_111: //(A7)+ 18290: XEiJ.mpuCycleCount += 4; 18291: return (XEiJ.regRn[15] += 2) - 2; 18292: case 0b100_000: //-(A0) 18293: if (XEiJ.EFA_SEPARATE_AR) { 18294: XEiJ.mpuCycleCount += 6; 18295: return --XEiJ.regRn[ 8]; 18296: } 18297: //fallthrough 18298: case 0b100_001: //-(A1) 18299: if (XEiJ.EFA_SEPARATE_AR) { 18300: XEiJ.mpuCycleCount += 6; 18301: return --XEiJ.regRn[ 9]; 18302: } 18303: //fallthrough 18304: case 0b100_010: //-(A2) 18305: if (XEiJ.EFA_SEPARATE_AR) { 18306: XEiJ.mpuCycleCount += 6; 18307: return --XEiJ.regRn[10]; 18308: } 18309: //fallthrough 18310: case 0b100_011: //-(A3) 18311: if (XEiJ.EFA_SEPARATE_AR) { 18312: XEiJ.mpuCycleCount += 6; 18313: return --XEiJ.regRn[11]; 18314: } 18315: //fallthrough 18316: case 0b100_100: //-(A4) 18317: if (XEiJ.EFA_SEPARATE_AR) { 18318: XEiJ.mpuCycleCount += 6; 18319: return --XEiJ.regRn[12]; 18320: } 18321: //fallthrough 18322: case 0b100_101: //-(A5) 18323: if (XEiJ.EFA_SEPARATE_AR) { 18324: XEiJ.mpuCycleCount += 6; 18325: return --XEiJ.regRn[13]; 18326: } 18327: //fallthrough 18328: case 0b100_110: //-(A6) 18329: if (XEiJ.EFA_SEPARATE_AR) { 18330: XEiJ.mpuCycleCount += 6; 18331: return --XEiJ.regRn[14]; 18332: } else { 18333: XEiJ.mpuCycleCount += 6; 18334: return --XEiJ.regRn[ea - (0b100_000 - 8)]; 18335: } 18336: case 0b100_111: //-(A7) 18337: XEiJ.mpuCycleCount += 6; 18338: return XEiJ.regRn[15] -= 2; 18339: case 0b101_000: //(d16,A0) 18340: case 0b101_001: //(d16,A1) 18341: case 0b101_010: //(d16,A2) 18342: case 0b101_011: //(d16,A3) 18343: case 0b101_100: //(d16,A4) 18344: case 0b101_101: //(d16,A5) 18345: case 0b101_110: //(d16,A6) 18346: case 0b101_111: //(d16,A7) 18347: XEiJ.mpuCycleCount += 8; 18348: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18349: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18350: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18351: } else { 18352: t = XEiJ.regPC; 18353: XEiJ.regPC = t + 2; 18354: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18355: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18356: } 18357: case 0b110_000: //(d8,A0,Rn.wl) 18358: case 0b110_001: //(d8,A1,Rn.wl) 18359: case 0b110_010: //(d8,A2,Rn.wl) 18360: case 0b110_011: //(d8,A3,Rn.wl) 18361: case 0b110_100: //(d8,A4,Rn.wl) 18362: case 0b110_101: //(d8,A5,Rn.wl) 18363: case 0b110_110: //(d8,A6,Rn.wl) 18364: case 0b110_111: //(d8,A7,Rn.wl) 18365: XEiJ.mpuCycleCount += 10; 18366: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18367: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18368: } else { 18369: w = XEiJ.regPC; 18370: XEiJ.regPC = w + 2; 18371: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18372: } 18373: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18374: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18375: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18376: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18377: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18378: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18379: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18380: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18381: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18382: XEiJ.regRn[w >> 12]) //ロングインデックス 18383: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18384: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18385: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18386: XEiJ.busRls (t) + x) //ポストインデックス 18387: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18388: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18389: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18390: case 0b111_000: //(xxx).W 18391: XEiJ.mpuCycleCount += 8; 18392: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 18393: case 0b111_001: //(xxx).L 18394: XEiJ.mpuCycleCount += 12; 18395: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 18396: case 0b111_010: //(d16,PC) 18397: XEiJ.mpuCycleCount += 8; 18398: t = XEiJ.regPC; 18399: XEiJ.regPC = t + 2; 18400: return (t //ベースレジスタ 18401: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18402: case 0b111_011: //(d8,PC,Rn.wl) 18403: XEiJ.mpuCycleCount += 10; 18404: t = XEiJ.regPC; 18405: XEiJ.regPC = t + 2; 18406: w = XEiJ.busRwze (t); //pcwz。拡張ワード 18407: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18408: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18409: t) //ベースレジスタ 18410: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18411: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18412: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18413: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18414: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18415: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18416: XEiJ.regRn[w >> 12]) //ロングインデックス 18417: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18418: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18419: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18420: XEiJ.busRls (t) + x) //ポストインデックス 18421: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18422: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18423: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18424: case 0b111_100: //#<data> 18425: XEiJ.mpuCycleCount += 4; 18426: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18427: return (XEiJ.regPC += 2) - 1; //下位バイト 18428: } else { 18429: t = XEiJ.regPC; 18430: XEiJ.regPC = t + 2; 18431: return t + 1; //下位バイト 18432: } 18433: } //switch 18434: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18435: throw M68kException.m6eSignal; 18436: } //efaAnyByte 18437: 18438: //a = efaMemByte (ea) //| M+-WXZP | 18439: // メモリモードのバイトオペランドの実効アドレスを求める 18440: // efaAnyByteとの違いは#<data>がないこと 18441: @SuppressWarnings ("fallthrough") public static int efaMemByte (int ea) throws M68kException { 18442: int t, w, x; 18443: switch (ea) { 18444: case 0b010_000: //(A0) 18445: if (XEiJ.EFA_SEPARATE_AR) { 18446: XEiJ.mpuCycleCount += 4; 18447: return XEiJ.regRn[ 8]; 18448: } 18449: //fallthrough 18450: case 0b010_001: //(A1) 18451: if (XEiJ.EFA_SEPARATE_AR) { 18452: XEiJ.mpuCycleCount += 4; 18453: return XEiJ.regRn[ 9]; 18454: } 18455: //fallthrough 18456: case 0b010_010: //(A2) 18457: if (XEiJ.EFA_SEPARATE_AR) { 18458: XEiJ.mpuCycleCount += 4; 18459: return XEiJ.regRn[10]; 18460: } 18461: //fallthrough 18462: case 0b010_011: //(A3) 18463: if (XEiJ.EFA_SEPARATE_AR) { 18464: XEiJ.mpuCycleCount += 4; 18465: return XEiJ.regRn[11]; 18466: } 18467: //fallthrough 18468: case 0b010_100: //(A4) 18469: if (XEiJ.EFA_SEPARATE_AR) { 18470: XEiJ.mpuCycleCount += 4; 18471: return XEiJ.regRn[12]; 18472: } 18473: //fallthrough 18474: case 0b010_101: //(A5) 18475: if (XEiJ.EFA_SEPARATE_AR) { 18476: XEiJ.mpuCycleCount += 4; 18477: return XEiJ.regRn[13]; 18478: } 18479: //fallthrough 18480: case 0b010_110: //(A6) 18481: if (XEiJ.EFA_SEPARATE_AR) { 18482: XEiJ.mpuCycleCount += 4; 18483: return XEiJ.regRn[14]; 18484: } 18485: //fallthrough 18486: case 0b010_111: //(A7) 18487: if (XEiJ.EFA_SEPARATE_AR) { 18488: XEiJ.mpuCycleCount += 4; 18489: return XEiJ.regRn[15]; 18490: } else { 18491: XEiJ.mpuCycleCount += 4; 18492: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18493: } 18494: case 0b011_000: //(A0)+ 18495: if (XEiJ.EFA_SEPARATE_AR) { 18496: XEiJ.mpuCycleCount += 4; 18497: return XEiJ.regRn[ 8]++; 18498: } 18499: //fallthrough 18500: case 0b011_001: //(A1)+ 18501: if (XEiJ.EFA_SEPARATE_AR) { 18502: XEiJ.mpuCycleCount += 4; 18503: return XEiJ.regRn[ 9]++; 18504: } 18505: //fallthrough 18506: case 0b011_010: //(A2)+ 18507: if (XEiJ.EFA_SEPARATE_AR) { 18508: XEiJ.mpuCycleCount += 4; 18509: return XEiJ.regRn[10]++; 18510: } 18511: //fallthrough 18512: case 0b011_011: //(A3)+ 18513: if (XEiJ.EFA_SEPARATE_AR) { 18514: XEiJ.mpuCycleCount += 4; 18515: return XEiJ.regRn[11]++; 18516: } 18517: //fallthrough 18518: case 0b011_100: //(A4)+ 18519: if (XEiJ.EFA_SEPARATE_AR) { 18520: XEiJ.mpuCycleCount += 4; 18521: return XEiJ.regRn[12]++; 18522: } 18523: //fallthrough 18524: case 0b011_101: //(A5)+ 18525: if (XEiJ.EFA_SEPARATE_AR) { 18526: XEiJ.mpuCycleCount += 4; 18527: return XEiJ.regRn[13]++; 18528: } 18529: //fallthrough 18530: case 0b011_110: //(A6)+ 18531: if (XEiJ.EFA_SEPARATE_AR) { 18532: XEiJ.mpuCycleCount += 4; 18533: return XEiJ.regRn[14]++; 18534: } else { 18535: XEiJ.mpuCycleCount += 4; 18536: return XEiJ.regRn[ea - (0b011_000 - 8)]++; 18537: } 18538: case 0b011_111: //(A7)+ 18539: XEiJ.mpuCycleCount += 4; 18540: return (XEiJ.regRn[15] += 2) - 2; 18541: case 0b100_000: //-(A0) 18542: if (XEiJ.EFA_SEPARATE_AR) { 18543: XEiJ.mpuCycleCount += 6; 18544: return --XEiJ.regRn[ 8]; 18545: } 18546: //fallthrough 18547: case 0b100_001: //-(A1) 18548: if (XEiJ.EFA_SEPARATE_AR) { 18549: XEiJ.mpuCycleCount += 6; 18550: return --XEiJ.regRn[ 9]; 18551: } 18552: //fallthrough 18553: case 0b100_010: //-(A2) 18554: if (XEiJ.EFA_SEPARATE_AR) { 18555: XEiJ.mpuCycleCount += 6; 18556: return --XEiJ.regRn[10]; 18557: } 18558: //fallthrough 18559: case 0b100_011: //-(A3) 18560: if (XEiJ.EFA_SEPARATE_AR) { 18561: XEiJ.mpuCycleCount += 6; 18562: return --XEiJ.regRn[11]; 18563: } 18564: //fallthrough 18565: case 0b100_100: //-(A4) 18566: if (XEiJ.EFA_SEPARATE_AR) { 18567: XEiJ.mpuCycleCount += 6; 18568: return --XEiJ.regRn[12]; 18569: } 18570: //fallthrough 18571: case 0b100_101: //-(A5) 18572: if (XEiJ.EFA_SEPARATE_AR) { 18573: XEiJ.mpuCycleCount += 6; 18574: return --XEiJ.regRn[13]; 18575: } 18576: //fallthrough 18577: case 0b100_110: //-(A6) 18578: if (XEiJ.EFA_SEPARATE_AR) { 18579: XEiJ.mpuCycleCount += 6; 18580: return --XEiJ.regRn[14]; 18581: } else { 18582: XEiJ.mpuCycleCount += 6; 18583: return --XEiJ.regRn[ea - (0b100_000 - 8)]; 18584: } 18585: case 0b100_111: //-(A7) 18586: XEiJ.mpuCycleCount += 6; 18587: return XEiJ.regRn[15] -= 2; 18588: case 0b101_000: //(d16,A0) 18589: case 0b101_001: //(d16,A1) 18590: case 0b101_010: //(d16,A2) 18591: case 0b101_011: //(d16,A3) 18592: case 0b101_100: //(d16,A4) 18593: case 0b101_101: //(d16,A5) 18594: case 0b101_110: //(d16,A6) 18595: case 0b101_111: //(d16,A7) 18596: XEiJ.mpuCycleCount += 8; 18597: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18598: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18599: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18600: } else { 18601: t = XEiJ.regPC; 18602: XEiJ.regPC = t + 2; 18603: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18604: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18605: } 18606: case 0b110_000: //(d8,A0,Rn.wl) 18607: case 0b110_001: //(d8,A1,Rn.wl) 18608: case 0b110_010: //(d8,A2,Rn.wl) 18609: case 0b110_011: //(d8,A3,Rn.wl) 18610: case 0b110_100: //(d8,A4,Rn.wl) 18611: case 0b110_101: //(d8,A5,Rn.wl) 18612: case 0b110_110: //(d8,A6,Rn.wl) 18613: case 0b110_111: //(d8,A7,Rn.wl) 18614: XEiJ.mpuCycleCount += 10; 18615: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18616: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18617: } else { 18618: w = XEiJ.regPC; 18619: XEiJ.regPC = w + 2; 18620: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18621: } 18622: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18623: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18624: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18625: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18626: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18627: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18628: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18629: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18630: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18631: XEiJ.regRn[w >> 12]) //ロングインデックス 18632: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18633: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18634: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18635: XEiJ.busRls (t) + x) //ポストインデックス 18636: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18637: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18638: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18639: case 0b111_000: //(xxx).W 18640: XEiJ.mpuCycleCount += 8; 18641: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 18642: case 0b111_001: //(xxx).L 18643: XEiJ.mpuCycleCount += 12; 18644: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 18645: case 0b111_010: //(d16,PC) 18646: XEiJ.mpuCycleCount += 8; 18647: t = XEiJ.regPC; 18648: XEiJ.regPC = t + 2; 18649: return (t //ベースレジスタ 18650: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18651: case 0b111_011: //(d8,PC,Rn.wl) 18652: XEiJ.mpuCycleCount += 10; 18653: t = XEiJ.regPC; 18654: XEiJ.regPC = t + 2; 18655: w = XEiJ.busRwze (t); //pcwz。拡張ワード 18656: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18657: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18658: t) //ベースレジスタ 18659: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18660: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18661: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18662: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18663: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18664: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18665: XEiJ.regRn[w >> 12]) //ロングインデックス 18666: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18667: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18668: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18669: XEiJ.busRls (t) + x) //ポストインデックス 18670: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18671: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18672: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18673: } //switch 18674: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18675: throw M68kException.m6eSignal; 18676: } //efaMemByte 18677: 18678: //a = efaMltByte (ea) //| M+-WXZ | 18679: // メモリ可変モードのバイトオペランドの実効アドレスを求める 18680: // efaMemByteとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 18681: @SuppressWarnings ("fallthrough") public static int efaMltByte (int ea) throws M68kException { 18682: int t, w, x; 18683: switch (ea) { 18684: case 0b010_000: //(A0) 18685: if (XEiJ.EFA_SEPARATE_AR) { 18686: XEiJ.mpuCycleCount += 4; 18687: return XEiJ.regRn[ 8]; 18688: } 18689: //fallthrough 18690: case 0b010_001: //(A1) 18691: if (XEiJ.EFA_SEPARATE_AR) { 18692: XEiJ.mpuCycleCount += 4; 18693: return XEiJ.regRn[ 9]; 18694: } 18695: //fallthrough 18696: case 0b010_010: //(A2) 18697: if (XEiJ.EFA_SEPARATE_AR) { 18698: XEiJ.mpuCycleCount += 4; 18699: return XEiJ.regRn[10]; 18700: } 18701: //fallthrough 18702: case 0b010_011: //(A3) 18703: if (XEiJ.EFA_SEPARATE_AR) { 18704: XEiJ.mpuCycleCount += 4; 18705: return XEiJ.regRn[11]; 18706: } 18707: //fallthrough 18708: case 0b010_100: //(A4) 18709: if (XEiJ.EFA_SEPARATE_AR) { 18710: XEiJ.mpuCycleCount += 4; 18711: return XEiJ.regRn[12]; 18712: } 18713: //fallthrough 18714: case 0b010_101: //(A5) 18715: if (XEiJ.EFA_SEPARATE_AR) { 18716: XEiJ.mpuCycleCount += 4; 18717: return XEiJ.regRn[13]; 18718: } 18719: //fallthrough 18720: case 0b010_110: //(A6) 18721: if (XEiJ.EFA_SEPARATE_AR) { 18722: XEiJ.mpuCycleCount += 4; 18723: return XEiJ.regRn[14]; 18724: } 18725: //fallthrough 18726: case 0b010_111: //(A7) 18727: if (XEiJ.EFA_SEPARATE_AR) { 18728: XEiJ.mpuCycleCount += 4; 18729: return XEiJ.regRn[15]; 18730: } else { 18731: XEiJ.mpuCycleCount += 4; 18732: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18733: } 18734: case 0b011_000: //(A0)+ 18735: if (XEiJ.EFA_SEPARATE_AR) { 18736: XEiJ.mpuCycleCount += 4; 18737: return XEiJ.regRn[ 8]++; 18738: } 18739: //fallthrough 18740: case 0b011_001: //(A1)+ 18741: if (XEiJ.EFA_SEPARATE_AR) { 18742: XEiJ.mpuCycleCount += 4; 18743: return XEiJ.regRn[ 9]++; 18744: } 18745: //fallthrough 18746: case 0b011_010: //(A2)+ 18747: if (XEiJ.EFA_SEPARATE_AR) { 18748: XEiJ.mpuCycleCount += 4; 18749: return XEiJ.regRn[10]++; 18750: } 18751: //fallthrough 18752: case 0b011_011: //(A3)+ 18753: if (XEiJ.EFA_SEPARATE_AR) { 18754: XEiJ.mpuCycleCount += 4; 18755: return XEiJ.regRn[11]++; 18756: } 18757: //fallthrough 18758: case 0b011_100: //(A4)+ 18759: if (XEiJ.EFA_SEPARATE_AR) { 18760: XEiJ.mpuCycleCount += 4; 18761: return XEiJ.regRn[12]++; 18762: } 18763: //fallthrough 18764: case 0b011_101: //(A5)+ 18765: if (XEiJ.EFA_SEPARATE_AR) { 18766: XEiJ.mpuCycleCount += 4; 18767: return XEiJ.regRn[13]++; 18768: } 18769: //fallthrough 18770: case 0b011_110: //(A6)+ 18771: if (XEiJ.EFA_SEPARATE_AR) { 18772: XEiJ.mpuCycleCount += 4; 18773: return XEiJ.regRn[14]++; 18774: } else { 18775: XEiJ.mpuCycleCount += 4; 18776: return XEiJ.regRn[ea - (0b011_000 - 8)]++; 18777: } 18778: case 0b011_111: //(A7)+ 18779: XEiJ.mpuCycleCount += 4; 18780: return (XEiJ.regRn[15] += 2) - 2; 18781: case 0b100_000: //-(A0) 18782: if (XEiJ.EFA_SEPARATE_AR) { 18783: XEiJ.mpuCycleCount += 6; 18784: return --XEiJ.regRn[ 8]; 18785: } 18786: //fallthrough 18787: case 0b100_001: //-(A1) 18788: if (XEiJ.EFA_SEPARATE_AR) { 18789: XEiJ.mpuCycleCount += 6; 18790: return --XEiJ.regRn[ 9]; 18791: } 18792: //fallthrough 18793: case 0b100_010: //-(A2) 18794: if (XEiJ.EFA_SEPARATE_AR) { 18795: XEiJ.mpuCycleCount += 6; 18796: return --XEiJ.regRn[10]; 18797: } 18798: //fallthrough 18799: case 0b100_011: //-(A3) 18800: if (XEiJ.EFA_SEPARATE_AR) { 18801: XEiJ.mpuCycleCount += 6; 18802: return --XEiJ.regRn[11]; 18803: } 18804: //fallthrough 18805: case 0b100_100: //-(A4) 18806: if (XEiJ.EFA_SEPARATE_AR) { 18807: XEiJ.mpuCycleCount += 6; 18808: return --XEiJ.regRn[12]; 18809: } 18810: //fallthrough 18811: case 0b100_101: //-(A5) 18812: if (XEiJ.EFA_SEPARATE_AR) { 18813: XEiJ.mpuCycleCount += 6; 18814: return --XEiJ.regRn[13]; 18815: } 18816: //fallthrough 18817: case 0b100_110: //-(A6) 18818: if (XEiJ.EFA_SEPARATE_AR) { 18819: XEiJ.mpuCycleCount += 6; 18820: return --XEiJ.regRn[14]; 18821: } else { 18822: XEiJ.mpuCycleCount += 6; 18823: return --XEiJ.regRn[ea - (0b100_000 - 8)]; 18824: } 18825: case 0b100_111: //-(A7) 18826: XEiJ.mpuCycleCount += 6; 18827: return XEiJ.regRn[15] -= 2; 18828: case 0b101_000: //(d16,A0) 18829: case 0b101_001: //(d16,A1) 18830: case 0b101_010: //(d16,A2) 18831: case 0b101_011: //(d16,A3) 18832: case 0b101_100: //(d16,A4) 18833: case 0b101_101: //(d16,A5) 18834: case 0b101_110: //(d16,A6) 18835: case 0b101_111: //(d16,A7) 18836: XEiJ.mpuCycleCount += 8; 18837: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18838: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18839: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18840: } else { 18841: t = XEiJ.regPC; 18842: XEiJ.regPC = t + 2; 18843: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18844: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18845: } 18846: case 0b110_000: //(d8,A0,Rn.wl) 18847: case 0b110_001: //(d8,A1,Rn.wl) 18848: case 0b110_010: //(d8,A2,Rn.wl) 18849: case 0b110_011: //(d8,A3,Rn.wl) 18850: case 0b110_100: //(d8,A4,Rn.wl) 18851: case 0b110_101: //(d8,A5,Rn.wl) 18852: case 0b110_110: //(d8,A6,Rn.wl) 18853: case 0b110_111: //(d8,A7,Rn.wl) 18854: XEiJ.mpuCycleCount += 10; 18855: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18856: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18857: } else { 18858: w = XEiJ.regPC; 18859: XEiJ.regPC = w + 2; 18860: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18861: } 18862: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18863: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18864: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18865: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18866: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18867: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18868: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18869: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18870: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18871: XEiJ.regRn[w >> 12]) //ロングインデックス 18872: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18873: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18874: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18875: XEiJ.busRls (t) + x) //ポストインデックス 18876: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18877: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18878: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18879: case 0b111_000: //(xxx).W 18880: XEiJ.mpuCycleCount += 8; 18881: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 18882: case 0b111_001: //(xxx).L 18883: XEiJ.mpuCycleCount += 12; 18884: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 18885: } //switch 18886: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18887: throw M68kException.m6eSignal; 18888: } //efaMltByte 18889: 18890: //a = efaCntByte (ea) //| M WXZP | 18891: // 制御モードのロングオペランドの実効アドレスを求める 18892: // efaMemByteとの違いは(Ar)+と-(Ar)がないこと 18893: @SuppressWarnings ("fallthrough") public static int efaCntByte (int ea) throws M68kException { 18894: int t, w, x; 18895: switch (ea) { 18896: case 0b010_000: //(A0) 18897: if (XEiJ.EFA_SEPARATE_AR) { 18898: XEiJ.mpuCycleCount += 4; 18899: return XEiJ.regRn[ 8]; 18900: } 18901: //fallthrough 18902: case 0b010_001: //(A1) 18903: if (XEiJ.EFA_SEPARATE_AR) { 18904: XEiJ.mpuCycleCount += 4; 18905: return XEiJ.regRn[ 9]; 18906: } 18907: //fallthrough 18908: case 0b010_010: //(A2) 18909: if (XEiJ.EFA_SEPARATE_AR) { 18910: XEiJ.mpuCycleCount += 4; 18911: return XEiJ.regRn[10]; 18912: } 18913: //fallthrough 18914: case 0b010_011: //(A3) 18915: if (XEiJ.EFA_SEPARATE_AR) { 18916: XEiJ.mpuCycleCount += 4; 18917: return XEiJ.regRn[11]; 18918: } 18919: //fallthrough 18920: case 0b010_100: //(A4) 18921: if (XEiJ.EFA_SEPARATE_AR) { 18922: XEiJ.mpuCycleCount += 4; 18923: return XEiJ.regRn[12]; 18924: } 18925: //fallthrough 18926: case 0b010_101: //(A5) 18927: if (XEiJ.EFA_SEPARATE_AR) { 18928: XEiJ.mpuCycleCount += 4; 18929: return XEiJ.regRn[13]; 18930: } 18931: //fallthrough 18932: case 0b010_110: //(A6) 18933: if (XEiJ.EFA_SEPARATE_AR) { 18934: XEiJ.mpuCycleCount += 4; 18935: return XEiJ.regRn[14]; 18936: } 18937: //fallthrough 18938: case 0b010_111: //(A7) 18939: if (XEiJ.EFA_SEPARATE_AR) { 18940: XEiJ.mpuCycleCount += 4; 18941: return XEiJ.regRn[15]; 18942: } else { 18943: XEiJ.mpuCycleCount += 4; 18944: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18945: } 18946: case 0b101_000: //(d16,A0) 18947: case 0b101_001: //(d16,A1) 18948: case 0b101_010: //(d16,A2) 18949: case 0b101_011: //(d16,A3) 18950: case 0b101_100: //(d16,A4) 18951: case 0b101_101: //(d16,A5) 18952: case 0b101_110: //(d16,A6) 18953: case 0b101_111: //(d16,A7) 18954: XEiJ.mpuCycleCount += 8; 18955: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18956: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18957: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18958: } else { 18959: t = XEiJ.regPC; 18960: XEiJ.regPC = t + 2; 18961: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18962: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18963: } 18964: case 0b110_000: //(d8,A0,Rn.wl) 18965: case 0b110_001: //(d8,A1,Rn.wl) 18966: case 0b110_010: //(d8,A2,Rn.wl) 18967: case 0b110_011: //(d8,A3,Rn.wl) 18968: case 0b110_100: //(d8,A4,Rn.wl) 18969: case 0b110_101: //(d8,A5,Rn.wl) 18970: case 0b110_110: //(d8,A6,Rn.wl) 18971: case 0b110_111: //(d8,A7,Rn.wl) 18972: XEiJ.mpuCycleCount += 10; 18973: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18974: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18975: } else { 18976: w = XEiJ.regPC; 18977: XEiJ.regPC = w + 2; 18978: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18979: } 18980: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18981: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18982: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18983: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18984: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18985: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18986: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18987: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18988: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18989: XEiJ.regRn[w >> 12]) //ロングインデックス 18990: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18991: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18992: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18993: XEiJ.busRls (t) + x) //ポストインデックス 18994: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18995: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18996: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18997: case 0b111_000: //(xxx).W 18998: XEiJ.mpuCycleCount += 8; 18999: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19000: case 0b111_001: //(xxx).L 19001: XEiJ.mpuCycleCount += 12; 19002: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19003: case 0b111_010: //(d16,PC) 19004: XEiJ.mpuCycleCount += 8; 19005: t = XEiJ.regPC; 19006: XEiJ.regPC = t + 2; 19007: return (t //ベースレジスタ 19008: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19009: case 0b111_011: //(d8,PC,Rn.wl) 19010: XEiJ.mpuCycleCount += 10; 19011: t = XEiJ.regPC; 19012: XEiJ.regPC = t + 2; 19013: w = XEiJ.busRwze (t); //pcwz。拡張ワード 19014: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19015: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19016: t) //ベースレジスタ 19017: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19018: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19019: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19020: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19021: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19022: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19023: XEiJ.regRn[w >> 12]) //ロングインデックス 19024: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19025: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19026: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19027: XEiJ.busRls (t) + x) //ポストインデックス 19028: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19029: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19030: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19031: } //switch 19032: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19033: throw M68kException.m6eSignal; 19034: } //efaCntByte 19035: 19036: //a = efaAnyWord (ea) //| M+-WXZPI| 19037: // 任意のモードのワードオペランドの実効アドレスを求める 19038: // efaAnyByteとの違いは(Ar)+と-(Ar)がArを2変化させることと、(A7)+と-(A7)と#<data>の特別な動作がないこと 19039: @SuppressWarnings ("fallthrough") public static int efaAnyWord (int ea) throws M68kException { 19040: int t, w, x; 19041: switch (ea) { 19042: case 0b010_000: //(A0) 19043: if (XEiJ.EFA_SEPARATE_AR) { 19044: XEiJ.mpuCycleCount += 4; 19045: return XEiJ.regRn[ 8]; 19046: } 19047: //fallthrough 19048: case 0b010_001: //(A1) 19049: if (XEiJ.EFA_SEPARATE_AR) { 19050: XEiJ.mpuCycleCount += 4; 19051: return XEiJ.regRn[ 9]; 19052: } 19053: //fallthrough 19054: case 0b010_010: //(A2) 19055: if (XEiJ.EFA_SEPARATE_AR) { 19056: XEiJ.mpuCycleCount += 4; 19057: return XEiJ.regRn[10]; 19058: } 19059: //fallthrough 19060: case 0b010_011: //(A3) 19061: if (XEiJ.EFA_SEPARATE_AR) { 19062: XEiJ.mpuCycleCount += 4; 19063: return XEiJ.regRn[11]; 19064: } 19065: //fallthrough 19066: case 0b010_100: //(A4) 19067: if (XEiJ.EFA_SEPARATE_AR) { 19068: XEiJ.mpuCycleCount += 4; 19069: return XEiJ.regRn[12]; 19070: } 19071: //fallthrough 19072: case 0b010_101: //(A5) 19073: if (XEiJ.EFA_SEPARATE_AR) { 19074: XEiJ.mpuCycleCount += 4; 19075: return XEiJ.regRn[13]; 19076: } 19077: //fallthrough 19078: case 0b010_110: //(A6) 19079: if (XEiJ.EFA_SEPARATE_AR) { 19080: XEiJ.mpuCycleCount += 4; 19081: return XEiJ.regRn[14]; 19082: } 19083: //fallthrough 19084: case 0b010_111: //(A7) 19085: if (XEiJ.EFA_SEPARATE_AR) { 19086: XEiJ.mpuCycleCount += 4; 19087: return XEiJ.regRn[15]; 19088: } else { 19089: XEiJ.mpuCycleCount += 4; 19090: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19091: } 19092: case 0b011_000: //(A0)+ 19093: if (XEiJ.EFA_SEPARATE_AR) { 19094: XEiJ.mpuCycleCount += 4; 19095: return (XEiJ.regRn[ 8] += 2) - 2; 19096: } 19097: //fallthrough 19098: case 0b011_001: //(A1)+ 19099: if (XEiJ.EFA_SEPARATE_AR) { 19100: XEiJ.mpuCycleCount += 4; 19101: return (XEiJ.regRn[ 9] += 2) - 2; 19102: } 19103: //fallthrough 19104: case 0b011_010: //(A2)+ 19105: if (XEiJ.EFA_SEPARATE_AR) { 19106: XEiJ.mpuCycleCount += 4; 19107: return (XEiJ.regRn[10] += 2) - 2; 19108: } 19109: //fallthrough 19110: case 0b011_011: //(A3)+ 19111: if (XEiJ.EFA_SEPARATE_AR) { 19112: XEiJ.mpuCycleCount += 4; 19113: return (XEiJ.regRn[11] += 2) - 2; 19114: } 19115: //fallthrough 19116: case 0b011_100: //(A4)+ 19117: if (XEiJ.EFA_SEPARATE_AR) { 19118: XEiJ.mpuCycleCount += 4; 19119: return (XEiJ.regRn[12] += 2) - 2; 19120: } 19121: //fallthrough 19122: case 0b011_101: //(A5)+ 19123: if (XEiJ.EFA_SEPARATE_AR) { 19124: XEiJ.mpuCycleCount += 4; 19125: return (XEiJ.regRn[13] += 2) - 2; 19126: } 19127: //fallthrough 19128: case 0b011_110: //(A6)+ 19129: if (XEiJ.EFA_SEPARATE_AR) { 19130: XEiJ.mpuCycleCount += 4; 19131: return (XEiJ.regRn[14] += 2) - 2; 19132: } 19133: //fallthrough 19134: case 0b011_111: //(A7)+ 19135: if (XEiJ.EFA_SEPARATE_AR) { 19136: XEiJ.mpuCycleCount += 4; 19137: return (XEiJ.regRn[15] += 2) - 2; 19138: } else { 19139: XEiJ.mpuCycleCount += 4; 19140: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2; 19141: } 19142: case 0b100_000: //-(A0) 19143: if (XEiJ.EFA_SEPARATE_AR) { 19144: XEiJ.mpuCycleCount += 6; 19145: return XEiJ.regRn[ 8] -= 2; 19146: } 19147: //fallthrough 19148: case 0b100_001: //-(A1) 19149: if (XEiJ.EFA_SEPARATE_AR) { 19150: XEiJ.mpuCycleCount += 6; 19151: return XEiJ.regRn[ 9] -= 2; 19152: } 19153: //fallthrough 19154: case 0b100_010: //-(A2) 19155: if (XEiJ.EFA_SEPARATE_AR) { 19156: XEiJ.mpuCycleCount += 6; 19157: return XEiJ.regRn[10] -= 2; 19158: } 19159: //fallthrough 19160: case 0b100_011: //-(A3) 19161: if (XEiJ.EFA_SEPARATE_AR) { 19162: XEiJ.mpuCycleCount += 6; 19163: return XEiJ.regRn[11] -= 2; 19164: } 19165: //fallthrough 19166: case 0b100_100: //-(A4) 19167: if (XEiJ.EFA_SEPARATE_AR) { 19168: XEiJ.mpuCycleCount += 6; 19169: return XEiJ.regRn[12] -= 2; 19170: } 19171: //fallthrough 19172: case 0b100_101: //-(A5) 19173: if (XEiJ.EFA_SEPARATE_AR) { 19174: XEiJ.mpuCycleCount += 6; 19175: return XEiJ.regRn[13] -= 2; 19176: } 19177: //fallthrough 19178: case 0b100_110: //-(A6) 19179: if (XEiJ.EFA_SEPARATE_AR) { 19180: XEiJ.mpuCycleCount += 6; 19181: return XEiJ.regRn[14] -= 2; 19182: } 19183: //fallthrough 19184: case 0b100_111: //-(A7) 19185: if (XEiJ.EFA_SEPARATE_AR) { 19186: XEiJ.mpuCycleCount += 6; 19187: return XEiJ.regRn[15] -= 2; 19188: } else { 19189: XEiJ.mpuCycleCount += 6; 19190: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2; 19191: } 19192: case 0b101_000: //(d16,A0) 19193: case 0b101_001: //(d16,A1) 19194: case 0b101_010: //(d16,A2) 19195: case 0b101_011: //(d16,A3) 19196: case 0b101_100: //(d16,A4) 19197: case 0b101_101: //(d16,A5) 19198: case 0b101_110: //(d16,A6) 19199: case 0b101_111: //(d16,A7) 19200: XEiJ.mpuCycleCount += 8; 19201: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19202: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19203: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19204: } else { 19205: t = XEiJ.regPC; 19206: XEiJ.regPC = t + 2; 19207: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19208: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19209: } 19210: case 0b110_000: //(d8,A0,Rn.wl) 19211: case 0b110_001: //(d8,A1,Rn.wl) 19212: case 0b110_010: //(d8,A2,Rn.wl) 19213: case 0b110_011: //(d8,A3,Rn.wl) 19214: case 0b110_100: //(d8,A4,Rn.wl) 19215: case 0b110_101: //(d8,A5,Rn.wl) 19216: case 0b110_110: //(d8,A6,Rn.wl) 19217: case 0b110_111: //(d8,A7,Rn.wl) 19218: XEiJ.mpuCycleCount += 10; 19219: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19220: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19221: } else { 19222: w = XEiJ.regPC; 19223: XEiJ.regPC = w + 2; 19224: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19225: } 19226: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19227: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19228: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19229: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19230: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19231: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19232: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19233: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19234: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19235: XEiJ.regRn[w >> 12]) //ロングインデックス 19236: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19237: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19238: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19239: XEiJ.busRls (t) + x) //ポストインデックス 19240: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19241: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19242: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19243: case 0b111_000: //(xxx).W 19244: XEiJ.mpuCycleCount += 8; 19245: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19246: case 0b111_001: //(xxx).L 19247: XEiJ.mpuCycleCount += 12; 19248: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19249: case 0b111_010: //(d16,PC) 19250: XEiJ.mpuCycleCount += 8; 19251: t = XEiJ.regPC; 19252: XEiJ.regPC = t + 2; 19253: return (t //ベースレジスタ 19254: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19255: case 0b111_011: //(d8,PC,Rn.wl) 19256: XEiJ.mpuCycleCount += 10; 19257: t = XEiJ.regPC; 19258: XEiJ.regPC = t + 2; 19259: w = XEiJ.busRwze (t); //pcwz。拡張ワード 19260: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19261: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19262: t) //ベースレジスタ 19263: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19264: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19265: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19266: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19267: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19268: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19269: XEiJ.regRn[w >> 12]) //ロングインデックス 19270: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19271: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19272: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19273: XEiJ.busRls (t) + x) //ポストインデックス 19274: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19275: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19276: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19277: case 0b111_100: //#<data> 19278: XEiJ.mpuCycleCount += 4; 19279: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19280: return (XEiJ.regPC += 2) - 2; 19281: } else { 19282: t = XEiJ.regPC; 19283: XEiJ.regPC = t + 2; 19284: return t; 19285: } 19286: } //switch 19287: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19288: throw M68kException.m6eSignal; 19289: } //efaAnyWord 19290: 19291: //a = efaMemWord (ea) //| M+-WXZP | 19292: // メモリモードのワードオペランドの実効アドレスを求める 19293: // efaAnyWordとの違いは#<data>がないこと 19294: @SuppressWarnings ("fallthrough") public static int efaMemWord (int ea) throws M68kException { 19295: int t, w, x; 19296: switch (ea) { 19297: case 0b010_000: //(A0) 19298: if (XEiJ.EFA_SEPARATE_AR) { 19299: XEiJ.mpuCycleCount += 4; 19300: return XEiJ.regRn[ 8]; 19301: } 19302: //fallthrough 19303: case 0b010_001: //(A1) 19304: if (XEiJ.EFA_SEPARATE_AR) { 19305: XEiJ.mpuCycleCount += 4; 19306: return XEiJ.regRn[ 9]; 19307: } 19308: //fallthrough 19309: case 0b010_010: //(A2) 19310: if (XEiJ.EFA_SEPARATE_AR) { 19311: XEiJ.mpuCycleCount += 4; 19312: return XEiJ.regRn[10]; 19313: } 19314: //fallthrough 19315: case 0b010_011: //(A3) 19316: if (XEiJ.EFA_SEPARATE_AR) { 19317: XEiJ.mpuCycleCount += 4; 19318: return XEiJ.regRn[11]; 19319: } 19320: //fallthrough 19321: case 0b010_100: //(A4) 19322: if (XEiJ.EFA_SEPARATE_AR) { 19323: XEiJ.mpuCycleCount += 4; 19324: return XEiJ.regRn[12]; 19325: } 19326: //fallthrough 19327: case 0b010_101: //(A5) 19328: if (XEiJ.EFA_SEPARATE_AR) { 19329: XEiJ.mpuCycleCount += 4; 19330: return XEiJ.regRn[13]; 19331: } 19332: //fallthrough 19333: case 0b010_110: //(A6) 19334: if (XEiJ.EFA_SEPARATE_AR) { 19335: XEiJ.mpuCycleCount += 4; 19336: return XEiJ.regRn[14]; 19337: } 19338: //fallthrough 19339: case 0b010_111: //(A7) 19340: if (XEiJ.EFA_SEPARATE_AR) { 19341: XEiJ.mpuCycleCount += 4; 19342: return XEiJ.regRn[15]; 19343: } else { 19344: XEiJ.mpuCycleCount += 4; 19345: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19346: } 19347: case 0b011_000: //(A0)+ 19348: if (XEiJ.EFA_SEPARATE_AR) { 19349: XEiJ.mpuCycleCount += 4; 19350: return (XEiJ.regRn[ 8] += 2) - 2; 19351: } 19352: //fallthrough 19353: case 0b011_001: //(A1)+ 19354: if (XEiJ.EFA_SEPARATE_AR) { 19355: XEiJ.mpuCycleCount += 4; 19356: return (XEiJ.regRn[ 9] += 2) - 2; 19357: } 19358: //fallthrough 19359: case 0b011_010: //(A2)+ 19360: if (XEiJ.EFA_SEPARATE_AR) { 19361: XEiJ.mpuCycleCount += 4; 19362: return (XEiJ.regRn[10] += 2) - 2; 19363: } 19364: //fallthrough 19365: case 0b011_011: //(A3)+ 19366: if (XEiJ.EFA_SEPARATE_AR) { 19367: XEiJ.mpuCycleCount += 4; 19368: return (XEiJ.regRn[11] += 2) - 2; 19369: } 19370: //fallthrough 19371: case 0b011_100: //(A4)+ 19372: if (XEiJ.EFA_SEPARATE_AR) { 19373: XEiJ.mpuCycleCount += 4; 19374: return (XEiJ.regRn[12] += 2) - 2; 19375: } 19376: //fallthrough 19377: case 0b011_101: //(A5)+ 19378: if (XEiJ.EFA_SEPARATE_AR) { 19379: XEiJ.mpuCycleCount += 4; 19380: return (XEiJ.regRn[13] += 2) - 2; 19381: } 19382: //fallthrough 19383: case 0b011_110: //(A6)+ 19384: if (XEiJ.EFA_SEPARATE_AR) { 19385: XEiJ.mpuCycleCount += 4; 19386: return (XEiJ.regRn[14] += 2) - 2; 19387: } 19388: //fallthrough 19389: case 0b011_111: //(A7)+ 19390: if (XEiJ.EFA_SEPARATE_AR) { 19391: XEiJ.mpuCycleCount += 4; 19392: return (XEiJ.regRn[15] += 2) - 2; 19393: } else { 19394: XEiJ.mpuCycleCount += 4; 19395: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2; 19396: } 19397: case 0b100_000: //-(A0) 19398: if (XEiJ.EFA_SEPARATE_AR) { 19399: XEiJ.mpuCycleCount += 6; 19400: return XEiJ.regRn[ 8] -= 2; 19401: } 19402: //fallthrough 19403: case 0b100_001: //-(A1) 19404: if (XEiJ.EFA_SEPARATE_AR) { 19405: XEiJ.mpuCycleCount += 6; 19406: return XEiJ.regRn[ 9] -= 2; 19407: } 19408: //fallthrough 19409: case 0b100_010: //-(A2) 19410: if (XEiJ.EFA_SEPARATE_AR) { 19411: XEiJ.mpuCycleCount += 6; 19412: return XEiJ.regRn[10] -= 2; 19413: } 19414: //fallthrough 19415: case 0b100_011: //-(A3) 19416: if (XEiJ.EFA_SEPARATE_AR) { 19417: XEiJ.mpuCycleCount += 6; 19418: return XEiJ.regRn[11] -= 2; 19419: } 19420: //fallthrough 19421: case 0b100_100: //-(A4) 19422: if (XEiJ.EFA_SEPARATE_AR) { 19423: XEiJ.mpuCycleCount += 6; 19424: return XEiJ.regRn[12] -= 2; 19425: } 19426: //fallthrough 19427: case 0b100_101: //-(A5) 19428: if (XEiJ.EFA_SEPARATE_AR) { 19429: XEiJ.mpuCycleCount += 6; 19430: return XEiJ.regRn[13] -= 2; 19431: } 19432: //fallthrough 19433: case 0b100_110: //-(A6) 19434: if (XEiJ.EFA_SEPARATE_AR) { 19435: XEiJ.mpuCycleCount += 6; 19436: return XEiJ.regRn[14] -= 2; 19437: } 19438: //fallthrough 19439: case 0b100_111: //-(A7) 19440: if (XEiJ.EFA_SEPARATE_AR) { 19441: XEiJ.mpuCycleCount += 6; 19442: return XEiJ.regRn[15] -= 2; 19443: } else { 19444: XEiJ.mpuCycleCount += 6; 19445: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2; 19446: } 19447: case 0b101_000: //(d16,A0) 19448: case 0b101_001: //(d16,A1) 19449: case 0b101_010: //(d16,A2) 19450: case 0b101_011: //(d16,A3) 19451: case 0b101_100: //(d16,A4) 19452: case 0b101_101: //(d16,A5) 19453: case 0b101_110: //(d16,A6) 19454: case 0b101_111: //(d16,A7) 19455: XEiJ.mpuCycleCount += 8; 19456: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19457: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19458: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19459: } else { 19460: t = XEiJ.regPC; 19461: XEiJ.regPC = t + 2; 19462: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19463: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19464: } 19465: case 0b110_000: //(d8,A0,Rn.wl) 19466: case 0b110_001: //(d8,A1,Rn.wl) 19467: case 0b110_010: //(d8,A2,Rn.wl) 19468: case 0b110_011: //(d8,A3,Rn.wl) 19469: case 0b110_100: //(d8,A4,Rn.wl) 19470: case 0b110_101: //(d8,A5,Rn.wl) 19471: case 0b110_110: //(d8,A6,Rn.wl) 19472: case 0b110_111: //(d8,A7,Rn.wl) 19473: XEiJ.mpuCycleCount += 10; 19474: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19475: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19476: } else { 19477: w = XEiJ.regPC; 19478: XEiJ.regPC = w + 2; 19479: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19480: } 19481: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19482: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19483: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19484: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19485: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19486: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19487: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19488: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19489: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19490: XEiJ.regRn[w >> 12]) //ロングインデックス 19491: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19492: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19493: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19494: XEiJ.busRls (t) + x) //ポストインデックス 19495: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19496: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19497: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19498: case 0b111_000: //(xxx).W 19499: XEiJ.mpuCycleCount += 8; 19500: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19501: case 0b111_001: //(xxx).L 19502: XEiJ.mpuCycleCount += 12; 19503: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19504: case 0b111_010: //(d16,PC) 19505: XEiJ.mpuCycleCount += 8; 19506: t = XEiJ.regPC; 19507: XEiJ.regPC = t + 2; 19508: return (t //ベースレジスタ 19509: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19510: case 0b111_011: //(d8,PC,Rn.wl) 19511: XEiJ.mpuCycleCount += 10; 19512: t = XEiJ.regPC; 19513: XEiJ.regPC = t + 2; 19514: w = XEiJ.busRwze (t); //pcwz。拡張ワード 19515: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19516: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19517: t) //ベースレジスタ 19518: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19519: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19520: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19521: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19522: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19523: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19524: XEiJ.regRn[w >> 12]) //ロングインデックス 19525: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19526: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19527: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19528: XEiJ.busRls (t) + x) //ポストインデックス 19529: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19530: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19531: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19532: } //switch 19533: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19534: throw M68kException.m6eSignal; 19535: } //efaMemWord 19536: 19537: //a = efaMltWord (ea) //| M+-WXZ | 19538: // メモリ可変モードのワードオペランドの実効アドレスを求める 19539: // efaMemWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 19540: @SuppressWarnings ("fallthrough") public static int efaMltWord (int ea) throws M68kException { 19541: int t, w, x; 19542: switch (ea) { 19543: case 0b010_000: //(A0) 19544: if (XEiJ.EFA_SEPARATE_AR) { 19545: XEiJ.mpuCycleCount += 4; 19546: return XEiJ.regRn[ 8]; 19547: } 19548: //fallthrough 19549: case 0b010_001: //(A1) 19550: if (XEiJ.EFA_SEPARATE_AR) { 19551: XEiJ.mpuCycleCount += 4; 19552: return XEiJ.regRn[ 9]; 19553: } 19554: //fallthrough 19555: case 0b010_010: //(A2) 19556: if (XEiJ.EFA_SEPARATE_AR) { 19557: XEiJ.mpuCycleCount += 4; 19558: return XEiJ.regRn[10]; 19559: } 19560: //fallthrough 19561: case 0b010_011: //(A3) 19562: if (XEiJ.EFA_SEPARATE_AR) { 19563: XEiJ.mpuCycleCount += 4; 19564: return XEiJ.regRn[11]; 19565: } 19566: //fallthrough 19567: case 0b010_100: //(A4) 19568: if (XEiJ.EFA_SEPARATE_AR) { 19569: XEiJ.mpuCycleCount += 4; 19570: return XEiJ.regRn[12]; 19571: } 19572: //fallthrough 19573: case 0b010_101: //(A5) 19574: if (XEiJ.EFA_SEPARATE_AR) { 19575: XEiJ.mpuCycleCount += 4; 19576: return XEiJ.regRn[13]; 19577: } 19578: //fallthrough 19579: case 0b010_110: //(A6) 19580: if (XEiJ.EFA_SEPARATE_AR) { 19581: XEiJ.mpuCycleCount += 4; 19582: return XEiJ.regRn[14]; 19583: } 19584: //fallthrough 19585: case 0b010_111: //(A7) 19586: if (XEiJ.EFA_SEPARATE_AR) { 19587: XEiJ.mpuCycleCount += 4; 19588: return XEiJ.regRn[15]; 19589: } else { 19590: XEiJ.mpuCycleCount += 4; 19591: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19592: } 19593: case 0b011_000: //(A0)+ 19594: if (XEiJ.EFA_SEPARATE_AR) { 19595: XEiJ.mpuCycleCount += 4; 19596: return (XEiJ.regRn[ 8] += 2) - 2; 19597: } 19598: //fallthrough 19599: case 0b011_001: //(A1)+ 19600: if (XEiJ.EFA_SEPARATE_AR) { 19601: XEiJ.mpuCycleCount += 4; 19602: return (XEiJ.regRn[ 9] += 2) - 2; 19603: } 19604: //fallthrough 19605: case 0b011_010: //(A2)+ 19606: if (XEiJ.EFA_SEPARATE_AR) { 19607: XEiJ.mpuCycleCount += 4; 19608: return (XEiJ.regRn[10] += 2) - 2; 19609: } 19610: //fallthrough 19611: case 0b011_011: //(A3)+ 19612: if (XEiJ.EFA_SEPARATE_AR) { 19613: XEiJ.mpuCycleCount += 4; 19614: return (XEiJ.regRn[11] += 2) - 2; 19615: } 19616: //fallthrough 19617: case 0b011_100: //(A4)+ 19618: if (XEiJ.EFA_SEPARATE_AR) { 19619: XEiJ.mpuCycleCount += 4; 19620: return (XEiJ.regRn[12] += 2) - 2; 19621: } 19622: //fallthrough 19623: case 0b011_101: //(A5)+ 19624: if (XEiJ.EFA_SEPARATE_AR) { 19625: XEiJ.mpuCycleCount += 4; 19626: return (XEiJ.regRn[13] += 2) - 2; 19627: } 19628: //fallthrough 19629: case 0b011_110: //(A6)+ 19630: if (XEiJ.EFA_SEPARATE_AR) { 19631: XEiJ.mpuCycleCount += 4; 19632: return (XEiJ.regRn[14] += 2) - 2; 19633: } 19634: //fallthrough 19635: case 0b011_111: //(A7)+ 19636: if (XEiJ.EFA_SEPARATE_AR) { 19637: XEiJ.mpuCycleCount += 4; 19638: return (XEiJ.regRn[15] += 2) - 2; 19639: } else { 19640: XEiJ.mpuCycleCount += 4; 19641: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2; 19642: } 19643: case 0b100_000: //-(A0) 19644: if (XEiJ.EFA_SEPARATE_AR) { 19645: XEiJ.mpuCycleCount += 6; 19646: return XEiJ.regRn[ 8] -= 2; 19647: } 19648: //fallthrough 19649: case 0b100_001: //-(A1) 19650: if (XEiJ.EFA_SEPARATE_AR) { 19651: XEiJ.mpuCycleCount += 6; 19652: return XEiJ.regRn[ 9] -= 2; 19653: } 19654: //fallthrough 19655: case 0b100_010: //-(A2) 19656: if (XEiJ.EFA_SEPARATE_AR) { 19657: XEiJ.mpuCycleCount += 6; 19658: return XEiJ.regRn[10] -= 2; 19659: } 19660: //fallthrough 19661: case 0b100_011: //-(A3) 19662: if (XEiJ.EFA_SEPARATE_AR) { 19663: XEiJ.mpuCycleCount += 6; 19664: return XEiJ.regRn[11] -= 2; 19665: } 19666: //fallthrough 19667: case 0b100_100: //-(A4) 19668: if (XEiJ.EFA_SEPARATE_AR) { 19669: XEiJ.mpuCycleCount += 6; 19670: return XEiJ.regRn[12] -= 2; 19671: } 19672: //fallthrough 19673: case 0b100_101: //-(A5) 19674: if (XEiJ.EFA_SEPARATE_AR) { 19675: XEiJ.mpuCycleCount += 6; 19676: return XEiJ.regRn[13] -= 2; 19677: } 19678: //fallthrough 19679: case 0b100_110: //-(A6) 19680: if (XEiJ.EFA_SEPARATE_AR) { 19681: XEiJ.mpuCycleCount += 6; 19682: return XEiJ.regRn[14] -= 2; 19683: } 19684: //fallthrough 19685: case 0b100_111: //-(A7) 19686: if (XEiJ.EFA_SEPARATE_AR) { 19687: XEiJ.mpuCycleCount += 6; 19688: return XEiJ.regRn[15] -= 2; 19689: } else { 19690: XEiJ.mpuCycleCount += 6; 19691: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2; 19692: } 19693: case 0b101_000: //(d16,A0) 19694: case 0b101_001: //(d16,A1) 19695: case 0b101_010: //(d16,A2) 19696: case 0b101_011: //(d16,A3) 19697: case 0b101_100: //(d16,A4) 19698: case 0b101_101: //(d16,A5) 19699: case 0b101_110: //(d16,A6) 19700: case 0b101_111: //(d16,A7) 19701: XEiJ.mpuCycleCount += 8; 19702: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19703: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19704: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19705: } else { 19706: t = XEiJ.regPC; 19707: XEiJ.regPC = t + 2; 19708: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19709: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19710: } 19711: case 0b110_000: //(d8,A0,Rn.wl) 19712: case 0b110_001: //(d8,A1,Rn.wl) 19713: case 0b110_010: //(d8,A2,Rn.wl) 19714: case 0b110_011: //(d8,A3,Rn.wl) 19715: case 0b110_100: //(d8,A4,Rn.wl) 19716: case 0b110_101: //(d8,A5,Rn.wl) 19717: case 0b110_110: //(d8,A6,Rn.wl) 19718: case 0b110_111: //(d8,A7,Rn.wl) 19719: XEiJ.mpuCycleCount += 10; 19720: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19721: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19722: } else { 19723: w = XEiJ.regPC; 19724: XEiJ.regPC = w + 2; 19725: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19726: } 19727: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19728: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19729: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19730: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19731: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19732: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19733: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19734: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19735: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19736: XEiJ.regRn[w >> 12]) //ロングインデックス 19737: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19738: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19739: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19740: XEiJ.busRls (t) + x) //ポストインデックス 19741: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19742: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19743: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19744: case 0b111_000: //(xxx).W 19745: XEiJ.mpuCycleCount += 8; 19746: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19747: case 0b111_001: //(xxx).L 19748: XEiJ.mpuCycleCount += 12; 19749: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19750: } //switch 19751: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19752: throw M68kException.m6eSignal; 19753: } //efaMltWord 19754: 19755: //a = efaCntWord (ea) //| M WXZP | 19756: // 制御モードのワードオペランドの実効アドレスを求める 19757: // efaMemWordとの違いは(Ar)+と-(Ar)がないこと 19758: // efaCntLongとの違いはサイクル数のみ 19759: @SuppressWarnings ("fallthrough") public static int efaCntWord (int ea) throws M68kException { 19760: int t, w, x; 19761: switch (ea) { 19762: case 0b010_000: //(A0) 19763: if (XEiJ.EFA_SEPARATE_AR) { 19764: XEiJ.mpuCycleCount += 4; 19765: return XEiJ.regRn[ 8]; 19766: } 19767: //fallthrough 19768: case 0b010_001: //(A1) 19769: if (XEiJ.EFA_SEPARATE_AR) { 19770: XEiJ.mpuCycleCount += 4; 19771: return XEiJ.regRn[ 9]; 19772: } 19773: //fallthrough 19774: case 0b010_010: //(A2) 19775: if (XEiJ.EFA_SEPARATE_AR) { 19776: XEiJ.mpuCycleCount += 4; 19777: return XEiJ.regRn[10]; 19778: } 19779: //fallthrough 19780: case 0b010_011: //(A3) 19781: if (XEiJ.EFA_SEPARATE_AR) { 19782: XEiJ.mpuCycleCount += 4; 19783: return XEiJ.regRn[11]; 19784: } 19785: //fallthrough 19786: case 0b010_100: //(A4) 19787: if (XEiJ.EFA_SEPARATE_AR) { 19788: XEiJ.mpuCycleCount += 4; 19789: return XEiJ.regRn[12]; 19790: } 19791: //fallthrough 19792: case 0b010_101: //(A5) 19793: if (XEiJ.EFA_SEPARATE_AR) { 19794: XEiJ.mpuCycleCount += 4; 19795: return XEiJ.regRn[13]; 19796: } 19797: //fallthrough 19798: case 0b010_110: //(A6) 19799: if (XEiJ.EFA_SEPARATE_AR) { 19800: XEiJ.mpuCycleCount += 4; 19801: return XEiJ.regRn[14]; 19802: } 19803: //fallthrough 19804: case 0b010_111: //(A7) 19805: if (XEiJ.EFA_SEPARATE_AR) { 19806: XEiJ.mpuCycleCount += 4; 19807: return XEiJ.regRn[15]; 19808: } else { 19809: XEiJ.mpuCycleCount += 4; 19810: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19811: } 19812: case 0b101_000: //(d16,A0) 19813: case 0b101_001: //(d16,A1) 19814: case 0b101_010: //(d16,A2) 19815: case 0b101_011: //(d16,A3) 19816: case 0b101_100: //(d16,A4) 19817: case 0b101_101: //(d16,A5) 19818: case 0b101_110: //(d16,A6) 19819: case 0b101_111: //(d16,A7) 19820: XEiJ.mpuCycleCount += 8; 19821: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19822: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19823: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19824: } else { 19825: t = XEiJ.regPC; 19826: XEiJ.regPC = t + 2; 19827: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19828: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19829: } 19830: case 0b110_000: //(d8,A0,Rn.wl) 19831: case 0b110_001: //(d8,A1,Rn.wl) 19832: case 0b110_010: //(d8,A2,Rn.wl) 19833: case 0b110_011: //(d8,A3,Rn.wl) 19834: case 0b110_100: //(d8,A4,Rn.wl) 19835: case 0b110_101: //(d8,A5,Rn.wl) 19836: case 0b110_110: //(d8,A6,Rn.wl) 19837: case 0b110_111: //(d8,A7,Rn.wl) 19838: XEiJ.mpuCycleCount += 10; 19839: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19840: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19841: } else { 19842: w = XEiJ.regPC; 19843: XEiJ.regPC = w + 2; 19844: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19845: } 19846: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19847: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19848: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19849: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19850: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19851: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19852: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19853: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19854: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19855: XEiJ.regRn[w >> 12]) //ロングインデックス 19856: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19857: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19858: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19859: XEiJ.busRls (t) + x) //ポストインデックス 19860: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19861: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19862: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19863: case 0b111_000: //(xxx).W 19864: XEiJ.mpuCycleCount += 8; 19865: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19866: case 0b111_001: //(xxx).L 19867: XEiJ.mpuCycleCount += 12; 19868: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19869: case 0b111_010: //(d16,PC) 19870: XEiJ.mpuCycleCount += 8; 19871: t = XEiJ.regPC; 19872: XEiJ.regPC = t + 2; 19873: return (t //ベースレジスタ 19874: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19875: case 0b111_011: //(d8,PC,Rn.wl) 19876: XEiJ.mpuCycleCount += 10; 19877: t = XEiJ.regPC; 19878: XEiJ.regPC = t + 2; 19879: w = XEiJ.busRwze (t); //pcwz。拡張ワード 19880: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19881: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19882: t) //ベースレジスタ 19883: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19884: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19885: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19886: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19887: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19888: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19889: XEiJ.regRn[w >> 12]) //ロングインデックス 19890: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19891: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19892: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19893: XEiJ.busRls (t) + x) //ポストインデックス 19894: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19895: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19896: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19897: } //switch 19898: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19899: throw M68kException.m6eSignal; 19900: } //efaCntWord 19901: 19902: //a = efaCltWord (ea) //| M WXZ | 19903: // 制御可変モードのワードオペランドの実効アドレスを求める 19904: // efaCntWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 19905: // efaCltLongとの違いはサイクル数のみ 19906: @SuppressWarnings ("fallthrough") public static int efaCltWord (int ea) throws M68kException { 19907: int t, w, x; 19908: switch (ea) { 19909: case 0b010_000: //(A0) 19910: if (XEiJ.EFA_SEPARATE_AR) { 19911: XEiJ.mpuCycleCount += 4; 19912: return XEiJ.regRn[ 8]; 19913: } 19914: //fallthrough 19915: case 0b010_001: //(A1) 19916: if (XEiJ.EFA_SEPARATE_AR) { 19917: XEiJ.mpuCycleCount += 4; 19918: return XEiJ.regRn[ 9]; 19919: } 19920: //fallthrough 19921: case 0b010_010: //(A2) 19922: if (XEiJ.EFA_SEPARATE_AR) { 19923: XEiJ.mpuCycleCount += 4; 19924: return XEiJ.regRn[10]; 19925: } 19926: //fallthrough 19927: case 0b010_011: //(A3) 19928: if (XEiJ.EFA_SEPARATE_AR) { 19929: XEiJ.mpuCycleCount += 4; 19930: return XEiJ.regRn[11]; 19931: } 19932: //fallthrough 19933: case 0b010_100: //(A4) 19934: if (XEiJ.EFA_SEPARATE_AR) { 19935: XEiJ.mpuCycleCount += 4; 19936: return XEiJ.regRn[12]; 19937: } 19938: //fallthrough 19939: case 0b010_101: //(A5) 19940: if (XEiJ.EFA_SEPARATE_AR) { 19941: XEiJ.mpuCycleCount += 4; 19942: return XEiJ.regRn[13]; 19943: } 19944: //fallthrough 19945: case 0b010_110: //(A6) 19946: if (XEiJ.EFA_SEPARATE_AR) { 19947: XEiJ.mpuCycleCount += 4; 19948: return XEiJ.regRn[14]; 19949: } 19950: //fallthrough 19951: case 0b010_111: //(A7) 19952: if (XEiJ.EFA_SEPARATE_AR) { 19953: XEiJ.mpuCycleCount += 4; 19954: return XEiJ.regRn[15]; 19955: } else { 19956: XEiJ.mpuCycleCount += 4; 19957: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19958: } 19959: case 0b101_000: //(d16,A0) 19960: case 0b101_001: //(d16,A1) 19961: case 0b101_010: //(d16,A2) 19962: case 0b101_011: //(d16,A3) 19963: case 0b101_100: //(d16,A4) 19964: case 0b101_101: //(d16,A5) 19965: case 0b101_110: //(d16,A6) 19966: case 0b101_111: //(d16,A7) 19967: XEiJ.mpuCycleCount += 8; 19968: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19969: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19970: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19971: } else { 19972: t = XEiJ.regPC; 19973: XEiJ.regPC = t + 2; 19974: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19975: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19976: } 19977: case 0b110_000: //(d8,A0,Rn.wl) 19978: case 0b110_001: //(d8,A1,Rn.wl) 19979: case 0b110_010: //(d8,A2,Rn.wl) 19980: case 0b110_011: //(d8,A3,Rn.wl) 19981: case 0b110_100: //(d8,A4,Rn.wl) 19982: case 0b110_101: //(d8,A5,Rn.wl) 19983: case 0b110_110: //(d8,A6,Rn.wl) 19984: case 0b110_111: //(d8,A7,Rn.wl) 19985: XEiJ.mpuCycleCount += 10; 19986: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19987: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19988: } else { 19989: w = XEiJ.regPC; 19990: XEiJ.regPC = w + 2; 19991: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19992: } 19993: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19994: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19995: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19996: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19997: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19998: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19999: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20000: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20001: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20002: XEiJ.regRn[w >> 12]) //ロングインデックス 20003: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20004: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20005: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20006: XEiJ.busRls (t) + x) //ポストインデックス 20007: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20008: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20009: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20010: case 0b111_000: //(xxx).W 20011: XEiJ.mpuCycleCount += 8; 20012: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20013: case 0b111_001: //(xxx).L 20014: XEiJ.mpuCycleCount += 12; 20015: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20016: } //switch 20017: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20018: throw M68kException.m6eSignal; 20019: } //efaCltWord 20020: 20021: //a = efaAnyLong (ea) //| M+-WXZPI| 20022: // 任意のモードのロングオペランドの実効アドレスを求める 20023: // efaAnyWordとの違いは(Ar)+と-(Ar)がArを4変化させることと、#<data>がPCを4変化させることと、 20024: // オペランドのアクセスが1ワード増える分の4サイクルが追加されていること 20025: @SuppressWarnings ("fallthrough") public static int efaAnyLong (int ea) throws M68kException { 20026: int t, w, x; 20027: switch (ea) { 20028: case 0b010_000: //(A0) 20029: if (XEiJ.EFA_SEPARATE_AR) { 20030: XEiJ.mpuCycleCount += 8; 20031: return XEiJ.regRn[ 8]; 20032: } 20033: //fallthrough 20034: case 0b010_001: //(A1) 20035: if (XEiJ.EFA_SEPARATE_AR) { 20036: XEiJ.mpuCycleCount += 8; 20037: return XEiJ.regRn[ 9]; 20038: } 20039: //fallthrough 20040: case 0b010_010: //(A2) 20041: if (XEiJ.EFA_SEPARATE_AR) { 20042: XEiJ.mpuCycleCount += 8; 20043: return XEiJ.regRn[10]; 20044: } 20045: //fallthrough 20046: case 0b010_011: //(A3) 20047: if (XEiJ.EFA_SEPARATE_AR) { 20048: XEiJ.mpuCycleCount += 8; 20049: return XEiJ.regRn[11]; 20050: } 20051: //fallthrough 20052: case 0b010_100: //(A4) 20053: if (XEiJ.EFA_SEPARATE_AR) { 20054: XEiJ.mpuCycleCount += 8; 20055: return XEiJ.regRn[12]; 20056: } 20057: //fallthrough 20058: case 0b010_101: //(A5) 20059: if (XEiJ.EFA_SEPARATE_AR) { 20060: XEiJ.mpuCycleCount += 8; 20061: return XEiJ.regRn[13]; 20062: } 20063: //fallthrough 20064: case 0b010_110: //(A6) 20065: if (XEiJ.EFA_SEPARATE_AR) { 20066: XEiJ.mpuCycleCount += 8; 20067: return XEiJ.regRn[14]; 20068: } 20069: //fallthrough 20070: case 0b010_111: //(A7) 20071: if (XEiJ.EFA_SEPARATE_AR) { 20072: XEiJ.mpuCycleCount += 8; 20073: return XEiJ.regRn[15]; 20074: } else { 20075: XEiJ.mpuCycleCount += 8; 20076: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20077: } 20078: case 0b011_000: //(A0)+ 20079: if (XEiJ.EFA_SEPARATE_AR) { 20080: XEiJ.mpuCycleCount += 8; 20081: return (XEiJ.regRn[ 8] += 4) - 4; 20082: } 20083: //fallthrough 20084: case 0b011_001: //(A1)+ 20085: if (XEiJ.EFA_SEPARATE_AR) { 20086: XEiJ.mpuCycleCount += 8; 20087: return (XEiJ.regRn[ 9] += 4) - 4; 20088: } 20089: //fallthrough 20090: case 0b011_010: //(A2)+ 20091: if (XEiJ.EFA_SEPARATE_AR) { 20092: XEiJ.mpuCycleCount += 8; 20093: return (XEiJ.regRn[10] += 4) - 4; 20094: } 20095: //fallthrough 20096: case 0b011_011: //(A3)+ 20097: if (XEiJ.EFA_SEPARATE_AR) { 20098: XEiJ.mpuCycleCount += 8; 20099: return (XEiJ.regRn[11] += 4) - 4; 20100: } 20101: //fallthrough 20102: case 0b011_100: //(A4)+ 20103: if (XEiJ.EFA_SEPARATE_AR) { 20104: XEiJ.mpuCycleCount += 8; 20105: return (XEiJ.regRn[12] += 4) - 4; 20106: } 20107: //fallthrough 20108: case 0b011_101: //(A5)+ 20109: if (XEiJ.EFA_SEPARATE_AR) { 20110: XEiJ.mpuCycleCount += 8; 20111: return (XEiJ.regRn[13] += 4) - 4; 20112: } 20113: //fallthrough 20114: case 0b011_110: //(A6)+ 20115: if (XEiJ.EFA_SEPARATE_AR) { 20116: XEiJ.mpuCycleCount += 8; 20117: return (XEiJ.regRn[14] += 4) - 4; 20118: } 20119: //fallthrough 20120: case 0b011_111: //(A7)+ 20121: if (XEiJ.EFA_SEPARATE_AR) { 20122: XEiJ.mpuCycleCount += 8; 20123: return (XEiJ.regRn[15] += 4) - 4; 20124: } else { 20125: XEiJ.mpuCycleCount += 8; 20126: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4; 20127: } 20128: case 0b100_000: //-(A0) 20129: if (XEiJ.EFA_SEPARATE_AR) { 20130: XEiJ.mpuCycleCount += 10; 20131: return XEiJ.regRn[ 8] -= 4; 20132: } 20133: //fallthrough 20134: case 0b100_001: //-(A1) 20135: if (XEiJ.EFA_SEPARATE_AR) { 20136: XEiJ.mpuCycleCount += 10; 20137: return XEiJ.regRn[ 9] -= 4; 20138: } 20139: //fallthrough 20140: case 0b100_010: //-(A2) 20141: if (XEiJ.EFA_SEPARATE_AR) { 20142: XEiJ.mpuCycleCount += 10; 20143: return XEiJ.regRn[10] -= 4; 20144: } 20145: //fallthrough 20146: case 0b100_011: //-(A3) 20147: if (XEiJ.EFA_SEPARATE_AR) { 20148: XEiJ.mpuCycleCount += 10; 20149: return XEiJ.regRn[11] -= 4; 20150: } 20151: //fallthrough 20152: case 0b100_100: //-(A4) 20153: if (XEiJ.EFA_SEPARATE_AR) { 20154: XEiJ.mpuCycleCount += 10; 20155: return XEiJ.regRn[12] -= 4; 20156: } 20157: //fallthrough 20158: case 0b100_101: //-(A5) 20159: if (XEiJ.EFA_SEPARATE_AR) { 20160: XEiJ.mpuCycleCount += 10; 20161: return XEiJ.regRn[13] -= 4; 20162: } 20163: //fallthrough 20164: case 0b100_110: //-(A6) 20165: if (XEiJ.EFA_SEPARATE_AR) { 20166: XEiJ.mpuCycleCount += 10; 20167: return XEiJ.regRn[14] -= 4; 20168: } 20169: //fallthrough 20170: case 0b100_111: //-(A7) 20171: if (XEiJ.EFA_SEPARATE_AR) { 20172: XEiJ.mpuCycleCount += 10; 20173: return XEiJ.regRn[15] -= 4; 20174: } else { 20175: XEiJ.mpuCycleCount += 10; 20176: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4; 20177: } 20178: case 0b101_000: //(d16,A0) 20179: case 0b101_001: //(d16,A1) 20180: case 0b101_010: //(d16,A2) 20181: case 0b101_011: //(d16,A3) 20182: case 0b101_100: //(d16,A4) 20183: case 0b101_101: //(d16,A5) 20184: case 0b101_110: //(d16,A6) 20185: case 0b101_111: //(d16,A7) 20186: XEiJ.mpuCycleCount += 12; 20187: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20188: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20189: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20190: } else { 20191: t = XEiJ.regPC; 20192: XEiJ.regPC = t + 2; 20193: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20194: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20195: } 20196: case 0b110_000: //(d8,A0,Rn.wl) 20197: case 0b110_001: //(d8,A1,Rn.wl) 20198: case 0b110_010: //(d8,A2,Rn.wl) 20199: case 0b110_011: //(d8,A3,Rn.wl) 20200: case 0b110_100: //(d8,A4,Rn.wl) 20201: case 0b110_101: //(d8,A5,Rn.wl) 20202: case 0b110_110: //(d8,A6,Rn.wl) 20203: case 0b110_111: //(d8,A7,Rn.wl) 20204: XEiJ.mpuCycleCount += 14; 20205: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20206: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20207: } else { 20208: w = XEiJ.regPC; 20209: XEiJ.regPC = w + 2; 20210: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20211: } 20212: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20213: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20214: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20215: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20216: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20217: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20218: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20219: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20220: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20221: XEiJ.regRn[w >> 12]) //ロングインデックス 20222: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20223: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20224: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20225: XEiJ.busRls (t) + x) //ポストインデックス 20226: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20227: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20228: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20229: case 0b111_000: //(xxx).W 20230: XEiJ.mpuCycleCount += 12; 20231: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20232: case 0b111_001: //(xxx).L 20233: XEiJ.mpuCycleCount += 16; 20234: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20235: case 0b111_010: //(d16,PC) 20236: XEiJ.mpuCycleCount += 12; 20237: t = XEiJ.regPC; 20238: XEiJ.regPC = t + 2; 20239: return (t //ベースレジスタ 20240: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20241: case 0b111_011: //(d8,PC,Rn.wl) 20242: XEiJ.mpuCycleCount += 14; 20243: t = XEiJ.regPC; 20244: XEiJ.regPC = t + 2; 20245: w = XEiJ.busRwze (t); //pcwz。拡張ワード 20246: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20247: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20248: t) //ベースレジスタ 20249: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20250: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20251: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20252: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20253: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20254: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20255: XEiJ.regRn[w >> 12]) //ロングインデックス 20256: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20257: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20258: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20259: XEiJ.busRls (t) + x) //ポストインデックス 20260: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20261: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20262: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20263: case 0b111_100: //#<data> 20264: XEiJ.mpuCycleCount += 8; 20265: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20266: return (XEiJ.regPC += 4) - 4; 20267: } else { 20268: t = XEiJ.regPC; 20269: XEiJ.regPC = t + 4; 20270: return t; 20271: } 20272: } //switch 20273: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20274: throw M68kException.m6eSignal; 20275: } //efaAnyLong 20276: 20277: //a = efaMemLong (ea) //| M+-WXZP | 20278: // メモリモードのロングオペランドの実効アドレスを求める 20279: // efaAnyLongとの違いは#<data>がないこと 20280: @SuppressWarnings ("fallthrough") public static int efaMemLong (int ea) throws M68kException { 20281: int t, w, x; 20282: switch (ea) { 20283: case 0b010_000: //(A0) 20284: if (XEiJ.EFA_SEPARATE_AR) { 20285: XEiJ.mpuCycleCount += 8; 20286: return XEiJ.regRn[ 8]; 20287: } 20288: //fallthrough 20289: case 0b010_001: //(A1) 20290: if (XEiJ.EFA_SEPARATE_AR) { 20291: XEiJ.mpuCycleCount += 8; 20292: return XEiJ.regRn[ 9]; 20293: } 20294: //fallthrough 20295: case 0b010_010: //(A2) 20296: if (XEiJ.EFA_SEPARATE_AR) { 20297: XEiJ.mpuCycleCount += 8; 20298: return XEiJ.regRn[10]; 20299: } 20300: //fallthrough 20301: case 0b010_011: //(A3) 20302: if (XEiJ.EFA_SEPARATE_AR) { 20303: XEiJ.mpuCycleCount += 8; 20304: return XEiJ.regRn[11]; 20305: } 20306: //fallthrough 20307: case 0b010_100: //(A4) 20308: if (XEiJ.EFA_SEPARATE_AR) { 20309: XEiJ.mpuCycleCount += 8; 20310: return XEiJ.regRn[12]; 20311: } 20312: //fallthrough 20313: case 0b010_101: //(A5) 20314: if (XEiJ.EFA_SEPARATE_AR) { 20315: XEiJ.mpuCycleCount += 8; 20316: return XEiJ.regRn[13]; 20317: } 20318: //fallthrough 20319: case 0b010_110: //(A6) 20320: if (XEiJ.EFA_SEPARATE_AR) { 20321: XEiJ.mpuCycleCount += 8; 20322: return XEiJ.regRn[14]; 20323: } 20324: //fallthrough 20325: case 0b010_111: //(A7) 20326: if (XEiJ.EFA_SEPARATE_AR) { 20327: XEiJ.mpuCycleCount += 8; 20328: return XEiJ.regRn[15]; 20329: } else { 20330: XEiJ.mpuCycleCount += 8; 20331: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20332: } 20333: case 0b011_000: //(A0)+ 20334: if (XEiJ.EFA_SEPARATE_AR) { 20335: XEiJ.mpuCycleCount += 8; 20336: return (XEiJ.regRn[ 8] += 4) - 4; 20337: } 20338: //fallthrough 20339: case 0b011_001: //(A1)+ 20340: if (XEiJ.EFA_SEPARATE_AR) { 20341: XEiJ.mpuCycleCount += 8; 20342: return (XEiJ.regRn[ 9] += 4) - 4; 20343: } 20344: //fallthrough 20345: case 0b011_010: //(A2)+ 20346: if (XEiJ.EFA_SEPARATE_AR) { 20347: XEiJ.mpuCycleCount += 8; 20348: return (XEiJ.regRn[10] += 4) - 4; 20349: } 20350: //fallthrough 20351: case 0b011_011: //(A3)+ 20352: if (XEiJ.EFA_SEPARATE_AR) { 20353: XEiJ.mpuCycleCount += 8; 20354: return (XEiJ.regRn[11] += 4) - 4; 20355: } 20356: //fallthrough 20357: case 0b011_100: //(A4)+ 20358: if (XEiJ.EFA_SEPARATE_AR) { 20359: XEiJ.mpuCycleCount += 8; 20360: return (XEiJ.regRn[12] += 4) - 4; 20361: } 20362: //fallthrough 20363: case 0b011_101: //(A5)+ 20364: if (XEiJ.EFA_SEPARATE_AR) { 20365: XEiJ.mpuCycleCount += 8; 20366: return (XEiJ.regRn[13] += 4) - 4; 20367: } 20368: //fallthrough 20369: case 0b011_110: //(A6)+ 20370: if (XEiJ.EFA_SEPARATE_AR) { 20371: XEiJ.mpuCycleCount += 8; 20372: return (XEiJ.regRn[14] += 4) - 4; 20373: } 20374: //fallthrough 20375: case 0b011_111: //(A7)+ 20376: if (XEiJ.EFA_SEPARATE_AR) { 20377: XEiJ.mpuCycleCount += 8; 20378: return (XEiJ.regRn[15] += 4) - 4; 20379: } else { 20380: XEiJ.mpuCycleCount += 8; 20381: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4; 20382: } 20383: case 0b100_000: //-(A0) 20384: if (XEiJ.EFA_SEPARATE_AR) { 20385: XEiJ.mpuCycleCount += 10; 20386: return XEiJ.regRn[ 8] -= 4; 20387: } 20388: //fallthrough 20389: case 0b100_001: //-(A1) 20390: if (XEiJ.EFA_SEPARATE_AR) { 20391: XEiJ.mpuCycleCount += 10; 20392: return XEiJ.regRn[ 9] -= 4; 20393: } 20394: //fallthrough 20395: case 0b100_010: //-(A2) 20396: if (XEiJ.EFA_SEPARATE_AR) { 20397: XEiJ.mpuCycleCount += 10; 20398: return XEiJ.regRn[10] -= 4; 20399: } 20400: //fallthrough 20401: case 0b100_011: //-(A3) 20402: if (XEiJ.EFA_SEPARATE_AR) { 20403: XEiJ.mpuCycleCount += 10; 20404: return XEiJ.regRn[11] -= 4; 20405: } 20406: //fallthrough 20407: case 0b100_100: //-(A4) 20408: if (XEiJ.EFA_SEPARATE_AR) { 20409: XEiJ.mpuCycleCount += 10; 20410: return XEiJ.regRn[12] -= 4; 20411: } 20412: //fallthrough 20413: case 0b100_101: //-(A5) 20414: if (XEiJ.EFA_SEPARATE_AR) { 20415: XEiJ.mpuCycleCount += 10; 20416: return XEiJ.regRn[13] -= 4; 20417: } 20418: //fallthrough 20419: case 0b100_110: //-(A6) 20420: if (XEiJ.EFA_SEPARATE_AR) { 20421: XEiJ.mpuCycleCount += 10; 20422: return XEiJ.regRn[14] -= 4; 20423: } 20424: //fallthrough 20425: case 0b100_111: //-(A7) 20426: if (XEiJ.EFA_SEPARATE_AR) { 20427: XEiJ.mpuCycleCount += 10; 20428: return XEiJ.regRn[15] -= 4; 20429: } else { 20430: XEiJ.mpuCycleCount += 10; 20431: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4; 20432: } 20433: case 0b101_000: //(d16,A0) 20434: case 0b101_001: //(d16,A1) 20435: case 0b101_010: //(d16,A2) 20436: case 0b101_011: //(d16,A3) 20437: case 0b101_100: //(d16,A4) 20438: case 0b101_101: //(d16,A5) 20439: case 0b101_110: //(d16,A6) 20440: case 0b101_111: //(d16,A7) 20441: XEiJ.mpuCycleCount += 12; 20442: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20443: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20444: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20445: } else { 20446: t = XEiJ.regPC; 20447: XEiJ.regPC = t + 2; 20448: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20449: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20450: } 20451: case 0b110_000: //(d8,A0,Rn.wl) 20452: case 0b110_001: //(d8,A1,Rn.wl) 20453: case 0b110_010: //(d8,A2,Rn.wl) 20454: case 0b110_011: //(d8,A3,Rn.wl) 20455: case 0b110_100: //(d8,A4,Rn.wl) 20456: case 0b110_101: //(d8,A5,Rn.wl) 20457: case 0b110_110: //(d8,A6,Rn.wl) 20458: case 0b110_111: //(d8,A7,Rn.wl) 20459: XEiJ.mpuCycleCount += 14; 20460: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20461: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20462: } else { 20463: w = XEiJ.regPC; 20464: XEiJ.regPC = w + 2; 20465: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20466: } 20467: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20468: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20469: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20470: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20471: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20472: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20473: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20474: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20475: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20476: XEiJ.regRn[w >> 12]) //ロングインデックス 20477: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20478: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20479: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20480: XEiJ.busRls (t) + x) //ポストインデックス 20481: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20482: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20483: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20484: case 0b111_000: //(xxx).W 20485: XEiJ.mpuCycleCount += 12; 20486: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20487: case 0b111_001: //(xxx).L 20488: XEiJ.mpuCycleCount += 16; 20489: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20490: case 0b111_010: //(d16,PC) 20491: XEiJ.mpuCycleCount += 12; 20492: t = XEiJ.regPC; 20493: XEiJ.regPC = t + 2; 20494: return (t //ベースレジスタ 20495: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20496: case 0b111_011: //(d8,PC,Rn.wl) 20497: XEiJ.mpuCycleCount += 14; 20498: t = XEiJ.regPC; 20499: XEiJ.regPC = t + 2; 20500: w = XEiJ.busRwze (t); //pcwz。拡張ワード 20501: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20502: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20503: t) //ベースレジスタ 20504: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20505: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20506: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20507: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20508: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20509: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20510: XEiJ.regRn[w >> 12]) //ロングインデックス 20511: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20512: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20513: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20514: XEiJ.busRls (t) + x) //ポストインデックス 20515: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20516: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20517: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20518: } //switch 20519: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20520: throw M68kException.m6eSignal; 20521: } //efaMemLong 20522: 20523: //a = efaMltLong (ea) //| M+-WXZ | 20524: // メモリ可変モードのロングオペランドの実効アドレスを求める 20525: // efaMemLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 20526: @SuppressWarnings ("fallthrough") public static int efaMltLong (int ea) throws M68kException { 20527: int t, w, x; 20528: switch (ea) { 20529: case 0b010_000: //(A0) 20530: if (XEiJ.EFA_SEPARATE_AR) { 20531: XEiJ.mpuCycleCount += 8; 20532: return XEiJ.regRn[ 8]; 20533: } 20534: //fallthrough 20535: case 0b010_001: //(A1) 20536: if (XEiJ.EFA_SEPARATE_AR) { 20537: XEiJ.mpuCycleCount += 8; 20538: return XEiJ.regRn[ 9]; 20539: } 20540: //fallthrough 20541: case 0b010_010: //(A2) 20542: if (XEiJ.EFA_SEPARATE_AR) { 20543: XEiJ.mpuCycleCount += 8; 20544: return XEiJ.regRn[10]; 20545: } 20546: //fallthrough 20547: case 0b010_011: //(A3) 20548: if (XEiJ.EFA_SEPARATE_AR) { 20549: XEiJ.mpuCycleCount += 8; 20550: return XEiJ.regRn[11]; 20551: } 20552: //fallthrough 20553: case 0b010_100: //(A4) 20554: if (XEiJ.EFA_SEPARATE_AR) { 20555: XEiJ.mpuCycleCount += 8; 20556: return XEiJ.regRn[12]; 20557: } 20558: //fallthrough 20559: case 0b010_101: //(A5) 20560: if (XEiJ.EFA_SEPARATE_AR) { 20561: XEiJ.mpuCycleCount += 8; 20562: return XEiJ.regRn[13]; 20563: } 20564: //fallthrough 20565: case 0b010_110: //(A6) 20566: if (XEiJ.EFA_SEPARATE_AR) { 20567: XEiJ.mpuCycleCount += 8; 20568: return XEiJ.regRn[14]; 20569: } 20570: //fallthrough 20571: case 0b010_111: //(A7) 20572: if (XEiJ.EFA_SEPARATE_AR) { 20573: XEiJ.mpuCycleCount += 8; 20574: return XEiJ.regRn[15]; 20575: } else { 20576: XEiJ.mpuCycleCount += 8; 20577: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20578: } 20579: case 0b011_000: //(A0)+ 20580: if (XEiJ.EFA_SEPARATE_AR) { 20581: XEiJ.mpuCycleCount += 8; 20582: return (XEiJ.regRn[ 8] += 4) - 4; 20583: } 20584: //fallthrough 20585: case 0b011_001: //(A1)+ 20586: if (XEiJ.EFA_SEPARATE_AR) { 20587: XEiJ.mpuCycleCount += 8; 20588: return (XEiJ.regRn[ 9] += 4) - 4; 20589: } 20590: //fallthrough 20591: case 0b011_010: //(A2)+ 20592: if (XEiJ.EFA_SEPARATE_AR) { 20593: XEiJ.mpuCycleCount += 8; 20594: return (XEiJ.regRn[10] += 4) - 4; 20595: } 20596: //fallthrough 20597: case 0b011_011: //(A3)+ 20598: if (XEiJ.EFA_SEPARATE_AR) { 20599: XEiJ.mpuCycleCount += 8; 20600: return (XEiJ.regRn[11] += 4) - 4; 20601: } 20602: //fallthrough 20603: case 0b011_100: //(A4)+ 20604: if (XEiJ.EFA_SEPARATE_AR) { 20605: XEiJ.mpuCycleCount += 8; 20606: return (XEiJ.regRn[12] += 4) - 4; 20607: } 20608: //fallthrough 20609: case 0b011_101: //(A5)+ 20610: if (XEiJ.EFA_SEPARATE_AR) { 20611: XEiJ.mpuCycleCount += 8; 20612: return (XEiJ.regRn[13] += 4) - 4; 20613: } 20614: //fallthrough 20615: case 0b011_110: //(A6)+ 20616: if (XEiJ.EFA_SEPARATE_AR) { 20617: XEiJ.mpuCycleCount += 8; 20618: return (XEiJ.regRn[14] += 4) - 4; 20619: } 20620: //fallthrough 20621: case 0b011_111: //(A7)+ 20622: if (XEiJ.EFA_SEPARATE_AR) { 20623: XEiJ.mpuCycleCount += 8; 20624: return (XEiJ.regRn[15] += 4) - 4; 20625: } else { 20626: XEiJ.mpuCycleCount += 8; 20627: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4; 20628: } 20629: case 0b100_000: //-(A0) 20630: if (XEiJ.EFA_SEPARATE_AR) { 20631: XEiJ.mpuCycleCount += 10; 20632: return XEiJ.regRn[ 8] -= 4; 20633: } 20634: //fallthrough 20635: case 0b100_001: //-(A1) 20636: if (XEiJ.EFA_SEPARATE_AR) { 20637: XEiJ.mpuCycleCount += 10; 20638: return XEiJ.regRn[ 9] -= 4; 20639: } 20640: //fallthrough 20641: case 0b100_010: //-(A2) 20642: if (XEiJ.EFA_SEPARATE_AR) { 20643: XEiJ.mpuCycleCount += 10; 20644: return XEiJ.regRn[10] -= 4; 20645: } 20646: //fallthrough 20647: case 0b100_011: //-(A3) 20648: if (XEiJ.EFA_SEPARATE_AR) { 20649: XEiJ.mpuCycleCount += 10; 20650: return XEiJ.regRn[11] -= 4; 20651: } 20652: //fallthrough 20653: case 0b100_100: //-(A4) 20654: if (XEiJ.EFA_SEPARATE_AR) { 20655: XEiJ.mpuCycleCount += 10; 20656: return XEiJ.regRn[12] -= 4; 20657: } 20658: //fallthrough 20659: case 0b100_101: //-(A5) 20660: if (XEiJ.EFA_SEPARATE_AR) { 20661: XEiJ.mpuCycleCount += 10; 20662: return XEiJ.regRn[13] -= 4; 20663: } 20664: //fallthrough 20665: case 0b100_110: //-(A6) 20666: if (XEiJ.EFA_SEPARATE_AR) { 20667: XEiJ.mpuCycleCount += 10; 20668: return XEiJ.regRn[14] -= 4; 20669: } 20670: //fallthrough 20671: case 0b100_111: //-(A7) 20672: if (XEiJ.EFA_SEPARATE_AR) { 20673: XEiJ.mpuCycleCount += 10; 20674: return XEiJ.regRn[15] -= 4; 20675: } else { 20676: XEiJ.mpuCycleCount += 10; 20677: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4; 20678: } 20679: case 0b101_000: //(d16,A0) 20680: case 0b101_001: //(d16,A1) 20681: case 0b101_010: //(d16,A2) 20682: case 0b101_011: //(d16,A3) 20683: case 0b101_100: //(d16,A4) 20684: case 0b101_101: //(d16,A5) 20685: case 0b101_110: //(d16,A6) 20686: case 0b101_111: //(d16,A7) 20687: XEiJ.mpuCycleCount += 12; 20688: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20689: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20690: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20691: } else { 20692: t = XEiJ.regPC; 20693: XEiJ.regPC = t + 2; 20694: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20695: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20696: } 20697: case 0b110_000: //(d8,A0,Rn.wl) 20698: case 0b110_001: //(d8,A1,Rn.wl) 20699: case 0b110_010: //(d8,A2,Rn.wl) 20700: case 0b110_011: //(d8,A3,Rn.wl) 20701: case 0b110_100: //(d8,A4,Rn.wl) 20702: case 0b110_101: //(d8,A5,Rn.wl) 20703: case 0b110_110: //(d8,A6,Rn.wl) 20704: case 0b110_111: //(d8,A7,Rn.wl) 20705: XEiJ.mpuCycleCount += 14; 20706: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20707: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20708: } else { 20709: w = XEiJ.regPC; 20710: XEiJ.regPC = w + 2; 20711: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20712: } 20713: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20714: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20715: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20716: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20717: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20718: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20719: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20720: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20721: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20722: XEiJ.regRn[w >> 12]) //ロングインデックス 20723: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20724: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20725: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20726: XEiJ.busRls (t) + x) //ポストインデックス 20727: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20728: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20729: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20730: case 0b111_000: //(xxx).W 20731: XEiJ.mpuCycleCount += 12; 20732: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20733: case 0b111_001: //(xxx).L 20734: XEiJ.mpuCycleCount += 16; 20735: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20736: } //switch 20737: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20738: throw M68kException.m6eSignal; 20739: } //efaMltLong 20740: 20741: //a = efaCntLong (ea) //| M WXZP | 20742: // 制御モードのロングオペランドの実効アドレスを求める 20743: // efaMemLongとの違いは(Ar)+と-(Ar)がないこと 20744: // efaCntWordとの違いはサイクル数のみ 20745: @SuppressWarnings ("fallthrough") public static int efaCntLong (int ea) throws M68kException { 20746: int t, w, x; 20747: switch (ea) { 20748: case 0b010_000: //(A0) 20749: if (XEiJ.EFA_SEPARATE_AR) { 20750: XEiJ.mpuCycleCount += 8; 20751: return XEiJ.regRn[ 8]; 20752: } 20753: //fallthrough 20754: case 0b010_001: //(A1) 20755: if (XEiJ.EFA_SEPARATE_AR) { 20756: XEiJ.mpuCycleCount += 8; 20757: return XEiJ.regRn[ 9]; 20758: } 20759: //fallthrough 20760: case 0b010_010: //(A2) 20761: if (XEiJ.EFA_SEPARATE_AR) { 20762: XEiJ.mpuCycleCount += 8; 20763: return XEiJ.regRn[10]; 20764: } 20765: //fallthrough 20766: case 0b010_011: //(A3) 20767: if (XEiJ.EFA_SEPARATE_AR) { 20768: XEiJ.mpuCycleCount += 8; 20769: return XEiJ.regRn[11]; 20770: } 20771: //fallthrough 20772: case 0b010_100: //(A4) 20773: if (XEiJ.EFA_SEPARATE_AR) { 20774: XEiJ.mpuCycleCount += 8; 20775: return XEiJ.regRn[12]; 20776: } 20777: //fallthrough 20778: case 0b010_101: //(A5) 20779: if (XEiJ.EFA_SEPARATE_AR) { 20780: XEiJ.mpuCycleCount += 8; 20781: return XEiJ.regRn[13]; 20782: } 20783: //fallthrough 20784: case 0b010_110: //(A6) 20785: if (XEiJ.EFA_SEPARATE_AR) { 20786: XEiJ.mpuCycleCount += 8; 20787: return XEiJ.regRn[14]; 20788: } 20789: //fallthrough 20790: case 0b010_111: //(A7) 20791: if (XEiJ.EFA_SEPARATE_AR) { 20792: XEiJ.mpuCycleCount += 8; 20793: return XEiJ.regRn[15]; 20794: } else { 20795: XEiJ.mpuCycleCount += 8; 20796: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20797: } 20798: case 0b101_000: //(d16,A0) 20799: case 0b101_001: //(d16,A1) 20800: case 0b101_010: //(d16,A2) 20801: case 0b101_011: //(d16,A3) 20802: case 0b101_100: //(d16,A4) 20803: case 0b101_101: //(d16,A5) 20804: case 0b101_110: //(d16,A6) 20805: case 0b101_111: //(d16,A7) 20806: XEiJ.mpuCycleCount += 12; 20807: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20808: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20809: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20810: } else { 20811: t = XEiJ.regPC; 20812: XEiJ.regPC = t + 2; 20813: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20814: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20815: } 20816: case 0b110_000: //(d8,A0,Rn.wl) 20817: case 0b110_001: //(d8,A1,Rn.wl) 20818: case 0b110_010: //(d8,A2,Rn.wl) 20819: case 0b110_011: //(d8,A3,Rn.wl) 20820: case 0b110_100: //(d8,A4,Rn.wl) 20821: case 0b110_101: //(d8,A5,Rn.wl) 20822: case 0b110_110: //(d8,A6,Rn.wl) 20823: case 0b110_111: //(d8,A7,Rn.wl) 20824: XEiJ.mpuCycleCount += 14; 20825: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20826: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20827: } else { 20828: w = XEiJ.regPC; 20829: XEiJ.regPC = w + 2; 20830: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20831: } 20832: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20833: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20834: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20835: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20836: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20837: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20838: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20839: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20840: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20841: XEiJ.regRn[w >> 12]) //ロングインデックス 20842: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20843: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20844: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20845: XEiJ.busRls (t) + x) //ポストインデックス 20846: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20847: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20848: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20849: case 0b111_000: //(xxx).W 20850: XEiJ.mpuCycleCount += 12; 20851: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20852: case 0b111_001: //(xxx).L 20853: XEiJ.mpuCycleCount += 16; 20854: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20855: case 0b111_010: //(d16,PC) 20856: XEiJ.mpuCycleCount += 12; 20857: t = XEiJ.regPC; 20858: XEiJ.regPC = t + 2; 20859: return (t //ベースレジスタ 20860: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20861: case 0b111_011: //(d8,PC,Rn.wl) 20862: XEiJ.mpuCycleCount += 14; 20863: t = XEiJ.regPC; 20864: XEiJ.regPC = t + 2; 20865: w = XEiJ.busRwze (t); //pcwz。拡張ワード 20866: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20867: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20868: t) //ベースレジスタ 20869: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20870: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20871: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20872: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20873: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20874: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20875: XEiJ.regRn[w >> 12]) //ロングインデックス 20876: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20877: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20878: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20879: XEiJ.busRls (t) + x) //ポストインデックス 20880: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20881: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20882: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20883: } //switch 20884: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20885: throw M68kException.m6eSignal; 20886: } //efaCntLong 20887: 20888: //a = efaCltLong (ea) //| M WXZ | 20889: // 制御可変モードのワードオペランドの実効アドレスを求める 20890: // efaCntLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 20891: // efaCltWordとの違いはサイクル数のみ 20892: @SuppressWarnings ("fallthrough") public static int efaCltLong (int ea) throws M68kException { 20893: int t, w, x; 20894: switch (ea) { 20895: case 0b010_000: //(A0) 20896: if (XEiJ.EFA_SEPARATE_AR) { 20897: XEiJ.mpuCycleCount += 8; 20898: return XEiJ.regRn[ 8]; 20899: } 20900: //fallthrough 20901: case 0b010_001: //(A1) 20902: if (XEiJ.EFA_SEPARATE_AR) { 20903: XEiJ.mpuCycleCount += 8; 20904: return XEiJ.regRn[ 9]; 20905: } 20906: //fallthrough 20907: case 0b010_010: //(A2) 20908: if (XEiJ.EFA_SEPARATE_AR) { 20909: XEiJ.mpuCycleCount += 8; 20910: return XEiJ.regRn[10]; 20911: } 20912: //fallthrough 20913: case 0b010_011: //(A3) 20914: if (XEiJ.EFA_SEPARATE_AR) { 20915: XEiJ.mpuCycleCount += 8; 20916: return XEiJ.regRn[11]; 20917: } 20918: //fallthrough 20919: case 0b010_100: //(A4) 20920: if (XEiJ.EFA_SEPARATE_AR) { 20921: XEiJ.mpuCycleCount += 8; 20922: return XEiJ.regRn[12]; 20923: } 20924: //fallthrough 20925: case 0b010_101: //(A5) 20926: if (XEiJ.EFA_SEPARATE_AR) { 20927: XEiJ.mpuCycleCount += 8; 20928: return XEiJ.regRn[13]; 20929: } 20930: //fallthrough 20931: case 0b010_110: //(A6) 20932: if (XEiJ.EFA_SEPARATE_AR) { 20933: XEiJ.mpuCycleCount += 8; 20934: return XEiJ.regRn[14]; 20935: } 20936: //fallthrough 20937: case 0b010_111: //(A7) 20938: if (XEiJ.EFA_SEPARATE_AR) { 20939: XEiJ.mpuCycleCount += 8; 20940: return XEiJ.regRn[15]; 20941: } else { 20942: XEiJ.mpuCycleCount += 8; 20943: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20944: } 20945: case 0b101_000: //(d16,A0) 20946: case 0b101_001: //(d16,A1) 20947: case 0b101_010: //(d16,A2) 20948: case 0b101_011: //(d16,A3) 20949: case 0b101_100: //(d16,A4) 20950: case 0b101_101: //(d16,A5) 20951: case 0b101_110: //(d16,A6) 20952: case 0b101_111: //(d16,A7) 20953: XEiJ.mpuCycleCount += 12; 20954: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20955: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20956: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20957: } else { 20958: t = XEiJ.regPC; 20959: XEiJ.regPC = t + 2; 20960: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20961: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20962: } 20963: case 0b110_000: //(d8,A0,Rn.wl) 20964: case 0b110_001: //(d8,A1,Rn.wl) 20965: case 0b110_010: //(d8,A2,Rn.wl) 20966: case 0b110_011: //(d8,A3,Rn.wl) 20967: case 0b110_100: //(d8,A4,Rn.wl) 20968: case 0b110_101: //(d8,A5,Rn.wl) 20969: case 0b110_110: //(d8,A6,Rn.wl) 20970: case 0b110_111: //(d8,A7,Rn.wl) 20971: XEiJ.mpuCycleCount += 14; 20972: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20973: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20974: } else { 20975: w = XEiJ.regPC; 20976: XEiJ.regPC = w + 2; 20977: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20978: } 20979: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20980: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20981: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20982: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20983: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20984: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20985: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20986: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20987: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20988: XEiJ.regRn[w >> 12]) //ロングインデックス 20989: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20990: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20991: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20992: XEiJ.busRls (t) + x) //ポストインデックス 20993: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20994: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20995: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20996: case 0b111_000: //(xxx).W 20997: XEiJ.mpuCycleCount += 12; 20998: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20999: case 0b111_001: //(xxx).L 21000: XEiJ.mpuCycleCount += 16; 21001: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21002: } //switch 21003: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21004: throw M68kException.m6eSignal; 21005: } //efaCltLong 21006: 21007: //a = efaAnyQuad (ea) //| M+-WXZPI| 21008: // 任意のモードのクワッドオペランドの実効アドレスを求める 21009: // efaAnyLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、 21010: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 21011: @SuppressWarnings ("fallthrough") public static int efaAnyQuad (int ea) throws M68kException { 21012: int t, w, x; 21013: switch (ea) { 21014: case 0b010_000: //(A0) 21015: if (XEiJ.EFA_SEPARATE_AR) { 21016: XEiJ.mpuCycleCount += 16; 21017: return XEiJ.regRn[ 8]; 21018: } 21019: //fallthrough 21020: case 0b010_001: //(A1) 21021: if (XEiJ.EFA_SEPARATE_AR) { 21022: XEiJ.mpuCycleCount += 16; 21023: return XEiJ.regRn[ 9]; 21024: } 21025: //fallthrough 21026: case 0b010_010: //(A2) 21027: if (XEiJ.EFA_SEPARATE_AR) { 21028: XEiJ.mpuCycleCount += 16; 21029: return XEiJ.regRn[10]; 21030: } 21031: //fallthrough 21032: case 0b010_011: //(A3) 21033: if (XEiJ.EFA_SEPARATE_AR) { 21034: XEiJ.mpuCycleCount += 16; 21035: return XEiJ.regRn[11]; 21036: } 21037: //fallthrough 21038: case 0b010_100: //(A4) 21039: if (XEiJ.EFA_SEPARATE_AR) { 21040: XEiJ.mpuCycleCount += 16; 21041: return XEiJ.regRn[12]; 21042: } 21043: //fallthrough 21044: case 0b010_101: //(A5) 21045: if (XEiJ.EFA_SEPARATE_AR) { 21046: XEiJ.mpuCycleCount += 16; 21047: return XEiJ.regRn[13]; 21048: } 21049: //fallthrough 21050: case 0b010_110: //(A6) 21051: if (XEiJ.EFA_SEPARATE_AR) { 21052: XEiJ.mpuCycleCount += 16; 21053: return XEiJ.regRn[14]; 21054: } 21055: //fallthrough 21056: case 0b010_111: //(A7) 21057: if (XEiJ.EFA_SEPARATE_AR) { 21058: XEiJ.mpuCycleCount += 16; 21059: return XEiJ.regRn[15]; 21060: } else { 21061: XEiJ.mpuCycleCount += 16; 21062: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21063: } 21064: case 0b011_000: //(A0)+ 21065: if (XEiJ.EFA_SEPARATE_AR) { 21066: XEiJ.mpuCycleCount += 16; 21067: return (XEiJ.regRn[ 8] += 8) - 8; 21068: } 21069: //fallthrough 21070: case 0b011_001: //(A1)+ 21071: if (XEiJ.EFA_SEPARATE_AR) { 21072: XEiJ.mpuCycleCount += 16; 21073: return (XEiJ.regRn[ 9] += 8) - 8; 21074: } 21075: //fallthrough 21076: case 0b011_010: //(A2)+ 21077: if (XEiJ.EFA_SEPARATE_AR) { 21078: XEiJ.mpuCycleCount += 16; 21079: return (XEiJ.regRn[10] += 8) - 8; 21080: } 21081: //fallthrough 21082: case 0b011_011: //(A3)+ 21083: if (XEiJ.EFA_SEPARATE_AR) { 21084: XEiJ.mpuCycleCount += 16; 21085: return (XEiJ.regRn[11] += 8) - 8; 21086: } 21087: //fallthrough 21088: case 0b011_100: //(A4)+ 21089: if (XEiJ.EFA_SEPARATE_AR) { 21090: XEiJ.mpuCycleCount += 16; 21091: return (XEiJ.regRn[12] += 8) - 8; 21092: } 21093: //fallthrough 21094: case 0b011_101: //(A5)+ 21095: if (XEiJ.EFA_SEPARATE_AR) { 21096: XEiJ.mpuCycleCount += 16; 21097: return (XEiJ.regRn[13] += 8) - 8; 21098: } 21099: //fallthrough 21100: case 0b011_110: //(A6)+ 21101: if (XEiJ.EFA_SEPARATE_AR) { 21102: XEiJ.mpuCycleCount += 16; 21103: return (XEiJ.regRn[14] += 8) - 8; 21104: } 21105: //fallthrough 21106: case 0b011_111: //(A7)+ 21107: if (XEiJ.EFA_SEPARATE_AR) { 21108: XEiJ.mpuCycleCount += 16; 21109: return (XEiJ.regRn[15] += 8) - 8; 21110: } else { 21111: XEiJ.mpuCycleCount += 16; 21112: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8; 21113: } 21114: case 0b100_000: //-(A0) 21115: if (XEiJ.EFA_SEPARATE_AR) { 21116: XEiJ.mpuCycleCount += 18; 21117: return XEiJ.regRn[ 8] -= 8; 21118: } 21119: //fallthrough 21120: case 0b100_001: //-(A1) 21121: if (XEiJ.EFA_SEPARATE_AR) { 21122: XEiJ.mpuCycleCount += 18; 21123: return XEiJ.regRn[ 9] -= 8; 21124: } 21125: //fallthrough 21126: case 0b100_010: //-(A2) 21127: if (XEiJ.EFA_SEPARATE_AR) { 21128: XEiJ.mpuCycleCount += 18; 21129: return XEiJ.regRn[10] -= 8; 21130: } 21131: //fallthrough 21132: case 0b100_011: //-(A3) 21133: if (XEiJ.EFA_SEPARATE_AR) { 21134: XEiJ.mpuCycleCount += 18; 21135: return XEiJ.regRn[11] -= 8; 21136: } 21137: //fallthrough 21138: case 0b100_100: //-(A4) 21139: if (XEiJ.EFA_SEPARATE_AR) { 21140: XEiJ.mpuCycleCount += 18; 21141: return XEiJ.regRn[12] -= 8; 21142: } 21143: //fallthrough 21144: case 0b100_101: //-(A5) 21145: if (XEiJ.EFA_SEPARATE_AR) { 21146: XEiJ.mpuCycleCount += 18; 21147: return XEiJ.regRn[13] -= 8; 21148: } 21149: //fallthrough 21150: case 0b100_110: //-(A6) 21151: if (XEiJ.EFA_SEPARATE_AR) { 21152: XEiJ.mpuCycleCount += 18; 21153: return XEiJ.regRn[14] -= 8; 21154: } 21155: //fallthrough 21156: case 0b100_111: //-(A7) 21157: if (XEiJ.EFA_SEPARATE_AR) { 21158: XEiJ.mpuCycleCount += 18; 21159: return XEiJ.regRn[15] -= 8; 21160: } else { 21161: XEiJ.mpuCycleCount += 18; 21162: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8; 21163: } 21164: case 0b101_000: //(d16,A0) 21165: case 0b101_001: //(d16,A1) 21166: case 0b101_010: //(d16,A2) 21167: case 0b101_011: //(d16,A3) 21168: case 0b101_100: //(d16,A4) 21169: case 0b101_101: //(d16,A5) 21170: case 0b101_110: //(d16,A6) 21171: case 0b101_111: //(d16,A7) 21172: XEiJ.mpuCycleCount += 20; 21173: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21174: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21175: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21176: } else { 21177: t = XEiJ.regPC; 21178: XEiJ.regPC = t + 2; 21179: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21180: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21181: } 21182: case 0b110_000: //(d8,A0,Rn.wl) 21183: case 0b110_001: //(d8,A1,Rn.wl) 21184: case 0b110_010: //(d8,A2,Rn.wl) 21185: case 0b110_011: //(d8,A3,Rn.wl) 21186: case 0b110_100: //(d8,A4,Rn.wl) 21187: case 0b110_101: //(d8,A5,Rn.wl) 21188: case 0b110_110: //(d8,A6,Rn.wl) 21189: case 0b110_111: //(d8,A7,Rn.wl) 21190: XEiJ.mpuCycleCount += 22; 21191: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21192: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21193: } else { 21194: w = XEiJ.regPC; 21195: XEiJ.regPC = w + 2; 21196: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21197: } 21198: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21199: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21200: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21201: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21202: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21203: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21204: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21205: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21206: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21207: XEiJ.regRn[w >> 12]) //ロングインデックス 21208: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21209: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21210: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21211: XEiJ.busRls (t) + x) //ポストインデックス 21212: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21213: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21214: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21215: case 0b111_000: //(xxx).W 21216: XEiJ.mpuCycleCount += 20; 21217: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21218: case 0b111_001: //(xxx).L 21219: XEiJ.mpuCycleCount += 24; 21220: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21221: case 0b111_010: //(d16,PC) 21222: XEiJ.mpuCycleCount += 20; 21223: t = XEiJ.regPC; 21224: XEiJ.regPC = t + 2; 21225: return (t //ベースレジスタ 21226: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21227: case 0b111_011: //(d8,PC,Rn.wl) 21228: XEiJ.mpuCycleCount += 22; 21229: t = XEiJ.regPC; 21230: XEiJ.regPC = t + 2; 21231: w = XEiJ.busRwze (t); //pcwz。拡張ワード 21232: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21233: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21234: t) //ベースレジスタ 21235: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21236: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21237: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21238: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21239: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21240: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21241: XEiJ.regRn[w >> 12]) //ロングインデックス 21242: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21243: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21244: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21245: XEiJ.busRls (t) + x) //ポストインデックス 21246: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21247: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21248: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21249: case 0b111_100: //#<data> 21250: XEiJ.mpuCycleCount += 16; 21251: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21252: return (XEiJ.regPC += 8) - 8; 21253: } else { 21254: t = XEiJ.regPC; 21255: XEiJ.regPC = t + 8; 21256: return t; 21257: } 21258: } //switch 21259: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21260: throw M68kException.m6eSignal; 21261: } //efaAnyQuad 21262: 21263: //a = efaMltQuad (ea) //| M+-WXZ | 21264: // メモリ可変モードのクワッドオペランドの実効アドレスを求める 21265: // efaMltLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、 21266: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 21267: @SuppressWarnings ("fallthrough") public static int efaMltQuad (int ea) throws M68kException { 21268: int t, w, x; 21269: switch (ea) { 21270: case 0b010_000: //(A0) 21271: if (XEiJ.EFA_SEPARATE_AR) { 21272: XEiJ.mpuCycleCount += 16; 21273: return XEiJ.regRn[ 8]; 21274: } 21275: //fallthrough 21276: case 0b010_001: //(A1) 21277: if (XEiJ.EFA_SEPARATE_AR) { 21278: XEiJ.mpuCycleCount += 16; 21279: return XEiJ.regRn[ 9]; 21280: } 21281: //fallthrough 21282: case 0b010_010: //(A2) 21283: if (XEiJ.EFA_SEPARATE_AR) { 21284: XEiJ.mpuCycleCount += 16; 21285: return XEiJ.regRn[10]; 21286: } 21287: //fallthrough 21288: case 0b010_011: //(A3) 21289: if (XEiJ.EFA_SEPARATE_AR) { 21290: XEiJ.mpuCycleCount += 16; 21291: return XEiJ.regRn[11]; 21292: } 21293: //fallthrough 21294: case 0b010_100: //(A4) 21295: if (XEiJ.EFA_SEPARATE_AR) { 21296: XEiJ.mpuCycleCount += 16; 21297: return XEiJ.regRn[12]; 21298: } 21299: //fallthrough 21300: case 0b010_101: //(A5) 21301: if (XEiJ.EFA_SEPARATE_AR) { 21302: XEiJ.mpuCycleCount += 16; 21303: return XEiJ.regRn[13]; 21304: } 21305: //fallthrough 21306: case 0b010_110: //(A6) 21307: if (XEiJ.EFA_SEPARATE_AR) { 21308: XEiJ.mpuCycleCount += 16; 21309: return XEiJ.regRn[14]; 21310: } 21311: //fallthrough 21312: case 0b010_111: //(A7) 21313: if (XEiJ.EFA_SEPARATE_AR) { 21314: XEiJ.mpuCycleCount += 16; 21315: return XEiJ.regRn[15]; 21316: } else { 21317: XEiJ.mpuCycleCount += 16; 21318: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21319: } 21320: case 0b011_000: //(A0)+ 21321: if (XEiJ.EFA_SEPARATE_AR) { 21322: XEiJ.mpuCycleCount += 16; 21323: return (XEiJ.regRn[ 8] += 8) - 8; 21324: } 21325: //fallthrough 21326: case 0b011_001: //(A1)+ 21327: if (XEiJ.EFA_SEPARATE_AR) { 21328: XEiJ.mpuCycleCount += 16; 21329: return (XEiJ.regRn[ 9] += 8) - 8; 21330: } 21331: //fallthrough 21332: case 0b011_010: //(A2)+ 21333: if (XEiJ.EFA_SEPARATE_AR) { 21334: XEiJ.mpuCycleCount += 16; 21335: return (XEiJ.regRn[10] += 8) - 8; 21336: } 21337: //fallthrough 21338: case 0b011_011: //(A3)+ 21339: if (XEiJ.EFA_SEPARATE_AR) { 21340: XEiJ.mpuCycleCount += 16; 21341: return (XEiJ.regRn[11] += 8) - 8; 21342: } 21343: //fallthrough 21344: case 0b011_100: //(A4)+ 21345: if (XEiJ.EFA_SEPARATE_AR) { 21346: XEiJ.mpuCycleCount += 16; 21347: return (XEiJ.regRn[12] += 8) - 8; 21348: } 21349: //fallthrough 21350: case 0b011_101: //(A5)+ 21351: if (XEiJ.EFA_SEPARATE_AR) { 21352: XEiJ.mpuCycleCount += 16; 21353: return (XEiJ.regRn[13] += 8) - 8; 21354: } 21355: //fallthrough 21356: case 0b011_110: //(A6)+ 21357: if (XEiJ.EFA_SEPARATE_AR) { 21358: XEiJ.mpuCycleCount += 16; 21359: return (XEiJ.regRn[14] += 8) - 8; 21360: } 21361: //fallthrough 21362: case 0b011_111: //(A7)+ 21363: if (XEiJ.EFA_SEPARATE_AR) { 21364: XEiJ.mpuCycleCount += 16; 21365: return (XEiJ.regRn[15] += 8) - 8; 21366: } else { 21367: XEiJ.mpuCycleCount += 16; 21368: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8; 21369: } 21370: case 0b100_000: //-(A0) 21371: if (XEiJ.EFA_SEPARATE_AR) { 21372: XEiJ.mpuCycleCount += 18; 21373: return XEiJ.regRn[ 8] -= 8; 21374: } 21375: //fallthrough 21376: case 0b100_001: //-(A1) 21377: if (XEiJ.EFA_SEPARATE_AR) { 21378: XEiJ.mpuCycleCount += 18; 21379: return XEiJ.regRn[ 9] -= 8; 21380: } 21381: //fallthrough 21382: case 0b100_010: //-(A2) 21383: if (XEiJ.EFA_SEPARATE_AR) { 21384: XEiJ.mpuCycleCount += 18; 21385: return XEiJ.regRn[10] -= 8; 21386: } 21387: //fallthrough 21388: case 0b100_011: //-(A3) 21389: if (XEiJ.EFA_SEPARATE_AR) { 21390: XEiJ.mpuCycleCount += 18; 21391: return XEiJ.regRn[11] -= 8; 21392: } 21393: //fallthrough 21394: case 0b100_100: //-(A4) 21395: if (XEiJ.EFA_SEPARATE_AR) { 21396: XEiJ.mpuCycleCount += 18; 21397: return XEiJ.regRn[12] -= 8; 21398: } 21399: //fallthrough 21400: case 0b100_101: //-(A5) 21401: if (XEiJ.EFA_SEPARATE_AR) { 21402: XEiJ.mpuCycleCount += 18; 21403: return XEiJ.regRn[13] -= 8; 21404: } 21405: //fallthrough 21406: case 0b100_110: //-(A6) 21407: if (XEiJ.EFA_SEPARATE_AR) { 21408: XEiJ.mpuCycleCount += 18; 21409: return XEiJ.regRn[14] -= 8; 21410: } 21411: //fallthrough 21412: case 0b100_111: //-(A7) 21413: if (XEiJ.EFA_SEPARATE_AR) { 21414: XEiJ.mpuCycleCount += 18; 21415: return XEiJ.regRn[15] -= 8; 21416: } else { 21417: XEiJ.mpuCycleCount += 18; 21418: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8; 21419: } 21420: case 0b101_000: //(d16,A0) 21421: case 0b101_001: //(d16,A1) 21422: case 0b101_010: //(d16,A2) 21423: case 0b101_011: //(d16,A3) 21424: case 0b101_100: //(d16,A4) 21425: case 0b101_101: //(d16,A5) 21426: case 0b101_110: //(d16,A6) 21427: case 0b101_111: //(d16,A7) 21428: XEiJ.mpuCycleCount += 20; 21429: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21430: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21431: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21432: } else { 21433: t = XEiJ.regPC; 21434: XEiJ.regPC = t + 2; 21435: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21436: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21437: } 21438: case 0b110_000: //(d8,A0,Rn.wl) 21439: case 0b110_001: //(d8,A1,Rn.wl) 21440: case 0b110_010: //(d8,A2,Rn.wl) 21441: case 0b110_011: //(d8,A3,Rn.wl) 21442: case 0b110_100: //(d8,A4,Rn.wl) 21443: case 0b110_101: //(d8,A5,Rn.wl) 21444: case 0b110_110: //(d8,A6,Rn.wl) 21445: case 0b110_111: //(d8,A7,Rn.wl) 21446: XEiJ.mpuCycleCount += 22; 21447: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21448: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21449: } else { 21450: w = XEiJ.regPC; 21451: XEiJ.regPC = w + 2; 21452: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21453: } 21454: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21455: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21456: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21457: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21458: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21459: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21460: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21461: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21462: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21463: XEiJ.regRn[w >> 12]) //ロングインデックス 21464: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21465: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21466: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21467: XEiJ.busRls (t) + x) //ポストインデックス 21468: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21469: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21470: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21471: case 0b111_000: //(xxx).W 21472: XEiJ.mpuCycleCount += 20; 21473: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21474: case 0b111_001: //(xxx).L 21475: XEiJ.mpuCycleCount += 24; 21476: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21477: } //switch 21478: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21479: throw M68kException.m6eSignal; 21480: } //efaMltQuad 21481: 21482: //a = efaAnyExtd (ea) //| M+-WXZPI| 21483: // 任意のモードのエクステンデッドオペランドの実効アドレスを求める 21484: // efaAnyQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、 21485: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 21486: @SuppressWarnings ("fallthrough") public static int efaAnyExtd (int ea) throws M68kException { 21487: int t, w, x; 21488: switch (ea) { 21489: case 0b010_000: //(A0) 21490: if (XEiJ.EFA_SEPARATE_AR) { 21491: XEiJ.mpuCycleCount += 24; 21492: return XEiJ.regRn[ 8]; 21493: } 21494: //fallthrough 21495: case 0b010_001: //(A1) 21496: if (XEiJ.EFA_SEPARATE_AR) { 21497: XEiJ.mpuCycleCount += 24; 21498: return XEiJ.regRn[ 9]; 21499: } 21500: //fallthrough 21501: case 0b010_010: //(A2) 21502: if (XEiJ.EFA_SEPARATE_AR) { 21503: XEiJ.mpuCycleCount += 24; 21504: return XEiJ.regRn[10]; 21505: } 21506: //fallthrough 21507: case 0b010_011: //(A3) 21508: if (XEiJ.EFA_SEPARATE_AR) { 21509: XEiJ.mpuCycleCount += 24; 21510: return XEiJ.regRn[11]; 21511: } 21512: //fallthrough 21513: case 0b010_100: //(A4) 21514: if (XEiJ.EFA_SEPARATE_AR) { 21515: XEiJ.mpuCycleCount += 24; 21516: return XEiJ.regRn[12]; 21517: } 21518: //fallthrough 21519: case 0b010_101: //(A5) 21520: if (XEiJ.EFA_SEPARATE_AR) { 21521: XEiJ.mpuCycleCount += 24; 21522: return XEiJ.regRn[13]; 21523: } 21524: //fallthrough 21525: case 0b010_110: //(A6) 21526: if (XEiJ.EFA_SEPARATE_AR) { 21527: XEiJ.mpuCycleCount += 24; 21528: return XEiJ.regRn[14]; 21529: } 21530: //fallthrough 21531: case 0b010_111: //(A7) 21532: if (XEiJ.EFA_SEPARATE_AR) { 21533: XEiJ.mpuCycleCount += 24; 21534: return XEiJ.regRn[15]; 21535: } else { 21536: XEiJ.mpuCycleCount += 24; 21537: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21538: } 21539: case 0b011_000: //(A0)+ 21540: if (XEiJ.EFA_SEPARATE_AR) { 21541: XEiJ.mpuCycleCount += 24; 21542: return (XEiJ.regRn[ 8] += 12) - 12; 21543: } 21544: //fallthrough 21545: case 0b011_001: //(A1)+ 21546: if (XEiJ.EFA_SEPARATE_AR) { 21547: XEiJ.mpuCycleCount += 24; 21548: return (XEiJ.regRn[ 9] += 12) - 12; 21549: } 21550: //fallthrough 21551: case 0b011_010: //(A2)+ 21552: if (XEiJ.EFA_SEPARATE_AR) { 21553: XEiJ.mpuCycleCount += 24; 21554: return (XEiJ.regRn[10] += 12) - 12; 21555: } 21556: //fallthrough 21557: case 0b011_011: //(A3)+ 21558: if (XEiJ.EFA_SEPARATE_AR) { 21559: XEiJ.mpuCycleCount += 24; 21560: return (XEiJ.regRn[11] += 12) - 12; 21561: } 21562: //fallthrough 21563: case 0b011_100: //(A4)+ 21564: if (XEiJ.EFA_SEPARATE_AR) { 21565: XEiJ.mpuCycleCount += 24; 21566: return (XEiJ.regRn[12] += 12) - 12; 21567: } 21568: //fallthrough 21569: case 0b011_101: //(A5)+ 21570: if (XEiJ.EFA_SEPARATE_AR) { 21571: XEiJ.mpuCycleCount += 24; 21572: return (XEiJ.regRn[13] += 12) - 12; 21573: } 21574: //fallthrough 21575: case 0b011_110: //(A6)+ 21576: if (XEiJ.EFA_SEPARATE_AR) { 21577: XEiJ.mpuCycleCount += 24; 21578: return (XEiJ.regRn[14] += 12) - 12; 21579: } 21580: //fallthrough 21581: case 0b011_111: //(A7)+ 21582: if (XEiJ.EFA_SEPARATE_AR) { 21583: XEiJ.mpuCycleCount += 24; 21584: return (XEiJ.regRn[15] += 12) - 12; 21585: } else { 21586: XEiJ.mpuCycleCount += 24; 21587: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12; 21588: } 21589: case 0b100_000: //-(A0) 21590: if (XEiJ.EFA_SEPARATE_AR) { 21591: XEiJ.mpuCycleCount += 26; 21592: return XEiJ.regRn[ 8] -= 12; 21593: } 21594: //fallthrough 21595: case 0b100_001: //-(A1) 21596: if (XEiJ.EFA_SEPARATE_AR) { 21597: XEiJ.mpuCycleCount += 26; 21598: return XEiJ.regRn[ 9] -= 12; 21599: } 21600: //fallthrough 21601: case 0b100_010: //-(A2) 21602: if (XEiJ.EFA_SEPARATE_AR) { 21603: XEiJ.mpuCycleCount += 26; 21604: return XEiJ.regRn[10] -= 12; 21605: } 21606: //fallthrough 21607: case 0b100_011: //-(A3) 21608: if (XEiJ.EFA_SEPARATE_AR) { 21609: XEiJ.mpuCycleCount += 26; 21610: return XEiJ.regRn[11] -= 12; 21611: } 21612: //fallthrough 21613: case 0b100_100: //-(A4) 21614: if (XEiJ.EFA_SEPARATE_AR) { 21615: XEiJ.mpuCycleCount += 26; 21616: return XEiJ.regRn[12] -= 12; 21617: } 21618: //fallthrough 21619: case 0b100_101: //-(A5) 21620: if (XEiJ.EFA_SEPARATE_AR) { 21621: XEiJ.mpuCycleCount += 26; 21622: return XEiJ.regRn[13] -= 12; 21623: } 21624: //fallthrough 21625: case 0b100_110: //-(A6) 21626: if (XEiJ.EFA_SEPARATE_AR) { 21627: XEiJ.mpuCycleCount += 26; 21628: return XEiJ.regRn[14] -= 12; 21629: } 21630: //fallthrough 21631: case 0b100_111: //-(A7) 21632: if (XEiJ.EFA_SEPARATE_AR) { 21633: XEiJ.mpuCycleCount += 26; 21634: return XEiJ.regRn[15] -= 12; 21635: } else { 21636: XEiJ.mpuCycleCount += 26; 21637: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12; 21638: } 21639: case 0b101_000: //(d16,A0) 21640: case 0b101_001: //(d16,A1) 21641: case 0b101_010: //(d16,A2) 21642: case 0b101_011: //(d16,A3) 21643: case 0b101_100: //(d16,A4) 21644: case 0b101_101: //(d16,A5) 21645: case 0b101_110: //(d16,A6) 21646: case 0b101_111: //(d16,A7) 21647: XEiJ.mpuCycleCount += 28; 21648: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21649: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21650: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21651: } else { 21652: t = XEiJ.regPC; 21653: XEiJ.regPC = t + 2; 21654: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21655: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21656: } 21657: case 0b110_000: //(d8,A0,Rn.wl) 21658: case 0b110_001: //(d8,A1,Rn.wl) 21659: case 0b110_010: //(d8,A2,Rn.wl) 21660: case 0b110_011: //(d8,A3,Rn.wl) 21661: case 0b110_100: //(d8,A4,Rn.wl) 21662: case 0b110_101: //(d8,A5,Rn.wl) 21663: case 0b110_110: //(d8,A6,Rn.wl) 21664: case 0b110_111: //(d8,A7,Rn.wl) 21665: XEiJ.mpuCycleCount += 30; 21666: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21667: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21668: } else { 21669: w = XEiJ.regPC; 21670: XEiJ.regPC = w + 2; 21671: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21672: } 21673: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21674: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21675: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21676: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21677: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21678: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21679: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21680: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21681: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21682: XEiJ.regRn[w >> 12]) //ロングインデックス 21683: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21684: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21685: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21686: XEiJ.busRls (t) + x) //ポストインデックス 21687: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21688: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21689: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21690: case 0b111_000: //(xxx).W 21691: XEiJ.mpuCycleCount += 28; 21692: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21693: case 0b111_001: //(xxx).L 21694: XEiJ.mpuCycleCount += 32; 21695: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21696: case 0b111_010: //(d16,PC) 21697: XEiJ.mpuCycleCount += 28; 21698: t = XEiJ.regPC; 21699: XEiJ.regPC = t + 2; 21700: return (t //ベースレジスタ 21701: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21702: case 0b111_011: //(d8,PC,Rn.wl) 21703: XEiJ.mpuCycleCount += 30; 21704: t = XEiJ.regPC; 21705: XEiJ.regPC = t + 2; 21706: w = XEiJ.busRwze (t); //pcwz。拡張ワード 21707: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21708: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21709: t) //ベースレジスタ 21710: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21711: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21712: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21713: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21714: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21715: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21716: XEiJ.regRn[w >> 12]) //ロングインデックス 21717: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21718: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21719: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21720: XEiJ.busRls (t) + x) //ポストインデックス 21721: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21722: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21723: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21724: case 0b111_100: //#<data> 21725: XEiJ.mpuCycleCount += 24; 21726: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21727: return (XEiJ.regPC += 12) - 12; 21728: } else { 21729: t = XEiJ.regPC; 21730: XEiJ.regPC = t + 12; 21731: return t; 21732: } 21733: } //switch 21734: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21735: throw M68kException.m6eSignal; 21736: } //efaAnyExtd 21737: 21738: //a = efaMltExtd (ea) //| M+-WXZ | 21739: // メモリ可変モードのエクステンデッドオペランドの実効アドレスを求める 21740: // efaMltQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、 21741: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 21742: @SuppressWarnings ("fallthrough") public static int efaMltExtd (int ea) throws M68kException { 21743: int t, w, x; 21744: switch (ea) { 21745: case 0b010_000: //(A0) 21746: if (XEiJ.EFA_SEPARATE_AR) { 21747: XEiJ.mpuCycleCount += 24; 21748: return XEiJ.regRn[ 8]; 21749: } 21750: //fallthrough 21751: case 0b010_001: //(A1) 21752: if (XEiJ.EFA_SEPARATE_AR) { 21753: XEiJ.mpuCycleCount += 24; 21754: return XEiJ.regRn[ 9]; 21755: } 21756: //fallthrough 21757: case 0b010_010: //(A2) 21758: if (XEiJ.EFA_SEPARATE_AR) { 21759: XEiJ.mpuCycleCount += 24; 21760: return XEiJ.regRn[10]; 21761: } 21762: //fallthrough 21763: case 0b010_011: //(A3) 21764: if (XEiJ.EFA_SEPARATE_AR) { 21765: XEiJ.mpuCycleCount += 24; 21766: return XEiJ.regRn[11]; 21767: } 21768: //fallthrough 21769: case 0b010_100: //(A4) 21770: if (XEiJ.EFA_SEPARATE_AR) { 21771: XEiJ.mpuCycleCount += 24; 21772: return XEiJ.regRn[12]; 21773: } 21774: //fallthrough 21775: case 0b010_101: //(A5) 21776: if (XEiJ.EFA_SEPARATE_AR) { 21777: XEiJ.mpuCycleCount += 24; 21778: return XEiJ.regRn[13]; 21779: } 21780: //fallthrough 21781: case 0b010_110: //(A6) 21782: if (XEiJ.EFA_SEPARATE_AR) { 21783: XEiJ.mpuCycleCount += 24; 21784: return XEiJ.regRn[14]; 21785: } 21786: //fallthrough 21787: case 0b010_111: //(A7) 21788: if (XEiJ.EFA_SEPARATE_AR) { 21789: XEiJ.mpuCycleCount += 24; 21790: return XEiJ.regRn[15]; 21791: } else { 21792: XEiJ.mpuCycleCount += 24; 21793: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21794: } 21795: case 0b011_000: //(A0)+ 21796: if (XEiJ.EFA_SEPARATE_AR) { 21797: XEiJ.mpuCycleCount += 24; 21798: return (XEiJ.regRn[ 8] += 12) - 12; 21799: } 21800: //fallthrough 21801: case 0b011_001: //(A1)+ 21802: if (XEiJ.EFA_SEPARATE_AR) { 21803: XEiJ.mpuCycleCount += 24; 21804: return (XEiJ.regRn[ 9] += 12) - 12; 21805: } 21806: //fallthrough 21807: case 0b011_010: //(A2)+ 21808: if (XEiJ.EFA_SEPARATE_AR) { 21809: XEiJ.mpuCycleCount += 24; 21810: return (XEiJ.regRn[10] += 12) - 12; 21811: } 21812: //fallthrough 21813: case 0b011_011: //(A3)+ 21814: if (XEiJ.EFA_SEPARATE_AR) { 21815: XEiJ.mpuCycleCount += 24; 21816: return (XEiJ.regRn[11] += 12) - 12; 21817: } 21818: //fallthrough 21819: case 0b011_100: //(A4)+ 21820: if (XEiJ.EFA_SEPARATE_AR) { 21821: XEiJ.mpuCycleCount += 24; 21822: return (XEiJ.regRn[12] += 12) - 12; 21823: } 21824: //fallthrough 21825: case 0b011_101: //(A5)+ 21826: if (XEiJ.EFA_SEPARATE_AR) { 21827: XEiJ.mpuCycleCount += 24; 21828: return (XEiJ.regRn[13] += 12) - 12; 21829: } 21830: //fallthrough 21831: case 0b011_110: //(A6)+ 21832: if (XEiJ.EFA_SEPARATE_AR) { 21833: XEiJ.mpuCycleCount += 24; 21834: return (XEiJ.regRn[14] += 12) - 12; 21835: } 21836: //fallthrough 21837: case 0b011_111: //(A7)+ 21838: if (XEiJ.EFA_SEPARATE_AR) { 21839: XEiJ.mpuCycleCount += 24; 21840: return (XEiJ.regRn[15] += 12) - 12; 21841: } else { 21842: XEiJ.mpuCycleCount += 24; 21843: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12; 21844: } 21845: case 0b100_000: //-(A0) 21846: case 0b100_001: //-(A1) 21847: case 0b100_010: //-(A2) 21848: case 0b100_011: //-(A3) 21849: case 0b100_100: //-(A4) 21850: case 0b100_101: //-(A5) 21851: case 0b100_110: //-(A6) 21852: case 0b100_111: //-(A7) 21853: XEiJ.mpuCycleCount += 26; 21854: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12; 21855: case 0b101_000: //(d16,A0) 21856: case 0b101_001: //(d16,A1) 21857: case 0b101_010: //(d16,A2) 21858: case 0b101_011: //(d16,A3) 21859: case 0b101_100: //(d16,A4) 21860: case 0b101_101: //(d16,A5) 21861: case 0b101_110: //(d16,A6) 21862: case 0b101_111: //(d16,A7) 21863: XEiJ.mpuCycleCount += 28; 21864: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21865: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21866: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21867: } else { 21868: t = XEiJ.regPC; 21869: XEiJ.regPC = t + 2; 21870: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21871: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21872: } 21873: case 0b110_000: //(d8,A0,Rn.wl) 21874: case 0b110_001: //(d8,A1,Rn.wl) 21875: case 0b110_010: //(d8,A2,Rn.wl) 21876: case 0b110_011: //(d8,A3,Rn.wl) 21877: case 0b110_100: //(d8,A4,Rn.wl) 21878: case 0b110_101: //(d8,A5,Rn.wl) 21879: case 0b110_110: //(d8,A6,Rn.wl) 21880: case 0b110_111: //(d8,A7,Rn.wl) 21881: XEiJ.mpuCycleCount += 30; 21882: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21883: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21884: } else { 21885: w = XEiJ.regPC; 21886: XEiJ.regPC = w + 2; 21887: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21888: } 21889: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21890: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21891: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21892: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21893: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21894: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21895: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21896: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21897: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21898: XEiJ.regRn[w >> 12]) //ロングインデックス 21899: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21900: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21901: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21902: XEiJ.busRls (t) + x) //ポストインデックス 21903: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21904: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21905: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21906: case 0b111_000: //(xxx).W 21907: XEiJ.mpuCycleCount += 28; 21908: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21909: case 0b111_001: //(xxx).L 21910: XEiJ.mpuCycleCount += 32; 21911: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21912: } //switch 21913: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21914: throw M68kException.m6eSignal; 21915: } //efaMltExtd 21916: 21917: //a = efaLeaPea (ea) //| M WXZP | 21918: // LEA命令とPEA命令のオペランドの実効アドレスを求める 21919: // efaCntWordとの違いはサイクル数のみ 21920: // LEA命令のベースサイクル数4を含んでいるのでLEA命令ではベースサイクル数を加えなくてよい 21921: // PEA命令のベースサイクル数は12-4=8 21922: @SuppressWarnings ("fallthrough") public static int efaLeaPea (int ea) throws M68kException { 21923: int t, w, x; 21924: switch (ea) { 21925: case 0b010_000: //(A0) 21926: if (XEiJ.EFA_SEPARATE_AR) { 21927: XEiJ.mpuCycleCount += 4; 21928: return XEiJ.regRn[ 8]; 21929: } 21930: //fallthrough 21931: case 0b010_001: //(A1) 21932: if (XEiJ.EFA_SEPARATE_AR) { 21933: XEiJ.mpuCycleCount += 4; 21934: return XEiJ.regRn[ 9]; 21935: } 21936: //fallthrough 21937: case 0b010_010: //(A2) 21938: if (XEiJ.EFA_SEPARATE_AR) { 21939: XEiJ.mpuCycleCount += 4; 21940: return XEiJ.regRn[10]; 21941: } 21942: //fallthrough 21943: case 0b010_011: //(A3) 21944: if (XEiJ.EFA_SEPARATE_AR) { 21945: XEiJ.mpuCycleCount += 4; 21946: return XEiJ.regRn[11]; 21947: } 21948: //fallthrough 21949: case 0b010_100: //(A4) 21950: if (XEiJ.EFA_SEPARATE_AR) { 21951: XEiJ.mpuCycleCount += 4; 21952: return XEiJ.regRn[12]; 21953: } 21954: //fallthrough 21955: case 0b010_101: //(A5) 21956: if (XEiJ.EFA_SEPARATE_AR) { 21957: XEiJ.mpuCycleCount += 4; 21958: return XEiJ.regRn[13]; 21959: } 21960: //fallthrough 21961: case 0b010_110: //(A6) 21962: if (XEiJ.EFA_SEPARATE_AR) { 21963: XEiJ.mpuCycleCount += 4; 21964: return XEiJ.regRn[14]; 21965: } 21966: //fallthrough 21967: case 0b010_111: //(A7) 21968: if (XEiJ.EFA_SEPARATE_AR) { 21969: XEiJ.mpuCycleCount += 4; 21970: return XEiJ.regRn[15]; 21971: } else { 21972: XEiJ.mpuCycleCount += 4; 21973: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21974: } 21975: case 0b101_000: //(d16,A0) 21976: case 0b101_001: //(d16,A1) 21977: case 0b101_010: //(d16,A2) 21978: case 0b101_011: //(d16,A3) 21979: case 0b101_100: //(d16,A4) 21980: case 0b101_101: //(d16,A5) 21981: case 0b101_110: //(d16,A6) 21982: case 0b101_111: //(d16,A7) 21983: XEiJ.mpuCycleCount += 8; 21984: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21985: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21986: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21987: } else { 21988: t = XEiJ.regPC; 21989: XEiJ.regPC = t + 2; 21990: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21991: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21992: } 21993: case 0b110_000: //(d8,A0,Rn.wl) 21994: case 0b110_001: //(d8,A1,Rn.wl) 21995: case 0b110_010: //(d8,A2,Rn.wl) 21996: case 0b110_011: //(d8,A3,Rn.wl) 21997: case 0b110_100: //(d8,A4,Rn.wl) 21998: case 0b110_101: //(d8,A5,Rn.wl) 21999: case 0b110_110: //(d8,A6,Rn.wl) 22000: case 0b110_111: //(d8,A7,Rn.wl) 22001: XEiJ.mpuCycleCount += 12; 22002: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 22003: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 22004: } else { 22005: w = XEiJ.regPC; 22006: XEiJ.regPC = w + 2; 22007: w = XEiJ.busRwze (w); //pcwz。拡張ワード 22008: } 22009: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 22010: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 22011: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 22012: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 22013: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 22014: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 22015: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 22016: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 22017: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 22018: XEiJ.regRn[w >> 12]) //ロングインデックス 22019: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 22020: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 22021: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 22022: XEiJ.busRls (t) + x) //ポストインデックス 22023: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 22024: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 22025: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 22026: case 0b111_000: //(xxx).W 22027: XEiJ.mpuCycleCount += 8; 22028: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 22029: case 0b111_001: //(xxx).L 22030: XEiJ.mpuCycleCount += 12; 22031: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 22032: case 0b111_010: //(d16,PC) 22033: XEiJ.mpuCycleCount += 8; 22034: t = XEiJ.regPC; 22035: XEiJ.regPC = t + 2; 22036: return (t //ベースレジスタ 22037: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 22038: case 0b111_011: //(d8,PC,Rn.wl) 22039: XEiJ.mpuCycleCount += 12; 22040: t = XEiJ.regPC; 22041: XEiJ.regPC = t + 2; 22042: w = XEiJ.busRwze (t); //pcwz。拡張ワード 22043: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 22044: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 22045: t) //ベースレジスタ 22046: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 22047: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 22048: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 22049: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 22050: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 22051: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 22052: XEiJ.regRn[w >> 12]) //ロングインデックス 22053: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 22054: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 22055: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 22056: XEiJ.busRls (t) + x) //ポストインデックス 22057: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 22058: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 22059: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 22060: } //switch 22061: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 22062: throw M68kException.m6eSignal; 22063: } //efaLeaPea 22064: 22065: //a = efaJmpJsr (ea) //| M WXZP | 22066: // JMP命令とJSR命令のオペランドの実効アドレスを求める 22067: // efaCntWordとの違いはサイクル数のみ 22068: // JMP命令のベースサイクル数8を含んでいるのでJMP命令ではベースサイクル数を加えなくてよい 22069: // JSR命令のベースサイクル数は16-8=8 22070: @SuppressWarnings ("fallthrough") public static int efaJmpJsr (int ea) throws M68kException { 22071: int t, w, x; 22072: switch (ea) { 22073: case 0b010_000: //(A0) 22074: if (XEiJ.EFA_SEPARATE_AR) { 22075: XEiJ.mpuCycleCount += 8; 22076: return XEiJ.regRn[ 8]; 22077: } 22078: //fallthrough 22079: case 0b010_001: //(A1) 22080: if (XEiJ.EFA_SEPARATE_AR) { 22081: XEiJ.mpuCycleCount += 8; 22082: return XEiJ.regRn[ 9]; 22083: } 22084: //fallthrough 22085: case 0b010_010: //(A2) 22086: if (XEiJ.EFA_SEPARATE_AR) { 22087: XEiJ.mpuCycleCount += 8; 22088: return XEiJ.regRn[10]; 22089: } 22090: //fallthrough 22091: case 0b010_011: //(A3) 22092: if (XEiJ.EFA_SEPARATE_AR) { 22093: XEiJ.mpuCycleCount += 8; 22094: return XEiJ.regRn[11]; 22095: } 22096: //fallthrough 22097: case 0b010_100: //(A4) 22098: if (XEiJ.EFA_SEPARATE_AR) { 22099: XEiJ.mpuCycleCount += 8; 22100: return XEiJ.regRn[12]; 22101: } 22102: //fallthrough 22103: case 0b010_101: //(A5) 22104: if (XEiJ.EFA_SEPARATE_AR) { 22105: XEiJ.mpuCycleCount += 8; 22106: return XEiJ.regRn[13]; 22107: } 22108: //fallthrough 22109: case 0b010_110: //(A6) 22110: if (XEiJ.EFA_SEPARATE_AR) { 22111: XEiJ.mpuCycleCount += 8; 22112: return XEiJ.regRn[14]; 22113: } 22114: //fallthrough 22115: case 0b010_111: //(A7) 22116: if (XEiJ.EFA_SEPARATE_AR) { 22117: XEiJ.mpuCycleCount += 8; 22118: return XEiJ.regRn[15]; 22119: } else { 22120: XEiJ.mpuCycleCount += 8; 22121: return XEiJ.regRn[ea - (0b010_000 - 8)]; 22122: } 22123: case 0b101_000: //(d16,A0) 22124: case 0b101_001: //(d16,A1) 22125: case 0b101_010: //(d16,A2) 22126: case 0b101_011: //(d16,A3) 22127: case 0b101_100: //(d16,A4) 22128: case 0b101_101: //(d16,A5) 22129: case 0b101_110: //(d16,A6) 22130: case 0b101_111: //(d16,A7) 22131: XEiJ.mpuCycleCount += 10; 22132: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 22133: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 22134: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 22135: } else { 22136: t = XEiJ.regPC; 22137: XEiJ.regPC = t + 2; 22138: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 22139: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 22140: } 22141: case 0b110_000: //(d8,A0,Rn.wl) 22142: case 0b110_001: //(d8,A1,Rn.wl) 22143: case 0b110_010: //(d8,A2,Rn.wl) 22144: case 0b110_011: //(d8,A3,Rn.wl) 22145: case 0b110_100: //(d8,A4,Rn.wl) 22146: case 0b110_101: //(d8,A5,Rn.wl) 22147: case 0b110_110: //(d8,A6,Rn.wl) 22148: case 0b110_111: //(d8,A7,Rn.wl) 22149: XEiJ.mpuCycleCount += 14; 22150: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 22151: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 22152: } else { 22153: w = XEiJ.regPC; 22154: XEiJ.regPC = w + 2; 22155: w = XEiJ.busRwze (w); //pcwz。拡張ワード 22156: } 22157: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 22158: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 22159: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 22160: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 22161: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 22162: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 22163: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 22164: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 22165: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 22166: XEiJ.regRn[w >> 12]) //ロングインデックス 22167: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 22168: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 22169: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 22170: XEiJ.busRls (t) + x) //ポストインデックス 22171: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 22172: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 22173: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 22174: case 0b111_000: //(xxx).W 22175: XEiJ.mpuCycleCount += 10; 22176: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 22177: case 0b111_001: //(xxx).L 22178: XEiJ.mpuCycleCount += 12; 22179: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 22180: case 0b111_010: //(d16,PC) 22181: XEiJ.mpuCycleCount += 10; 22182: t = XEiJ.regPC; 22183: XEiJ.regPC = t + 2; 22184: return (t //ベースレジスタ 22185: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 22186: case 0b111_011: //(d8,PC,Rn.wl) 22187: XEiJ.mpuCycleCount += 14; 22188: t = XEiJ.regPC; 22189: XEiJ.regPC = t + 2; 22190: w = XEiJ.busRwze (t); //pcwz。拡張ワード 22191: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 22192: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 22193: t) //ベースレジスタ 22194: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 22195: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 22196: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 22197: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 22198: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 22199: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 22200: XEiJ.regRn[w >> 12]) //ロングインデックス 22201: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 22202: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 22203: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 22204: XEiJ.busRls (t) + x) //ポストインデックス 22205: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 22206: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 22207: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 22208: } //switch 22209: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 22210: throw M68kException.m6eSignal; 22211: } //efaJmpJsr 22212: 22213: 22214: 22215: } //class MC68EC030 22216: 22217: 22218: