1: //======================================================================================== 2: // MC68EC030.java 3: // en:MC68EC030 core 4: // ja:MC68EC030コア 5: // Copyright (C) 2003-2024 Makoto Kamada 6: // 7: // This file is part of the XEiJ (X68000 Emulator in Java). 8: // You can use, modify and redistribute the XEiJ if the conditions are met. 9: // Read the XEiJ License for more details. 10: // https://stdkmd.net/xeij/ 11: //======================================================================================== 12: 13: package xeij; 14: 15: import java.lang.*; //Boolean,Character,Class,Comparable,Double,Exception,Float,IllegalArgumentException,Integer,Long,Math,Number,Object,Runnable,SecurityException,String,StringBuilder,System 16: 17: public class MC68EC030 { 18: 19: //ゼロ除算のときの未定義フラグ 20: // MC68030はゼロ除算のときオペランド以外の要因でZとVが変化する 21: // VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 22: // 参考 23: // https://twitter.com/moveccr/status/814032098692513792 24: // https://twitter.com/isaki68k/status/814036909030682624 25: public static final boolean M30_DIV_ZERO_V_FLAG = true; //true=ゼロ除算のVフラグの再現を試みる 26: public static boolean m30DivZeroVFlag; 27: 28: public static void mpuCore () { 29: 30: //例外ループ 31: // 別のメソッドで検出された例外を命令ループの外側でcatchすることで命令ループを高速化する 32: errorLoop: 33: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 34: try { 35: //命令ループ 36: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 37: int t; 38: //命令を実行する 39: XEiJ.mpuTraceFlag = XEiJ.regSRT1; //命令実行前のsrT1 40: XEiJ.mpuCycleCount = 0; //第1オペコードからROMのアクセスウエイトを有効にする。命令のサイクル数はすべてXEiJ.mpuCycleCount+=～で加えること 41: XEiJ.regPC0 = t = XEiJ.regPC; //命令の先頭アドレス 42: XEiJ.regPC = t + 2; 43: XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1MemoryMap : DataBreakPoint.DBP_ON ? XEiJ.regSRS != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap : XEiJ.busMemoryMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); //第1オペコード。必ずゼロ拡張すること。pcに奇数が入っていることはないのでアドレスエラーのチェックを省略する 44: 45: //命令の処理 46: // 第1オペコードの上位10ビットで分岐する 47: irpSwitch: 48: switch (XEiJ.regOC >>> 6) { //第1オペコードの上位10ビット。XEiJ.regOCはゼロ拡張されているので0b1111_111_111&を省略 49: 50: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 51: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 52: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 53: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 54: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 55: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 56: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 57: case 0b0000_000_000: 58: irpOriByte (); 59: break irpSwitch; 60: 61: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 62: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 63: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 64: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 65: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 66: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 67: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 68: case 0b0000_000_001: 69: irpOriWord (); 70: break irpSwitch; 71: 72: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 73: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 74: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 75: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 76: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 77: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 78: case 0b0000_000_010: 79: irpOriLong (); 80: break irpSwitch; 81: 82: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 83: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 84: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 85: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 86: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 87: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 88: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 89: case 0b0000_000_011: 90: irpCmp2Chk2Byte (); 91: break irpSwitch; 92: 93: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 94: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 95: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 96: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 97: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 98: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 99: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 100: case 0b0000_000_100: 101: case 0b0000_001_100: 102: case 0b0000_010_100: 103: case 0b0000_011_100: 104: case 0b0000_100_100: 105: case 0b0000_101_100: 106: case 0b0000_110_100: 107: case 0b0000_111_100: 108: irpBtstReg (); 109: break irpSwitch; 110: 111: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 112: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 113: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 114: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 115: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 116: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 117: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 118: case 0b0000_000_101: 119: case 0b0000_001_101: 120: case 0b0000_010_101: 121: case 0b0000_011_101: 122: case 0b0000_100_101: 123: case 0b0000_101_101: 124: case 0b0000_110_101: 125: case 0b0000_111_101: 126: irpBchgReg (); 127: break irpSwitch; 128: 129: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 130: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 131: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 132: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 133: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 134: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 135: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 136: case 0b0000_000_110: 137: case 0b0000_001_110: 138: case 0b0000_010_110: 139: case 0b0000_011_110: 140: case 0b0000_100_110: 141: case 0b0000_101_110: 142: case 0b0000_110_110: 143: case 0b0000_111_110: 144: irpBclrReg (); 145: break irpSwitch; 146: 147: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 148: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 149: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 150: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 151: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 152: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 153: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 154: case 0b0000_000_111: 155: case 0b0000_001_111: 156: case 0b0000_010_111: 157: case 0b0000_011_111: 158: case 0b0000_100_111: 159: case 0b0000_101_111: 160: case 0b0000_110_111: 161: case 0b0000_111_111: 162: irpBsetReg (); 163: break irpSwitch; 164: 165: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 166: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 167: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 168: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 169: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 170: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 171: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 172: case 0b0000_001_000: 173: irpAndiByte (); 174: break irpSwitch; 175: 176: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 177: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 178: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 179: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 180: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 181: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 182: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 183: case 0b0000_001_001: 184: irpAndiWord (); 185: break irpSwitch; 186: 187: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 188: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 189: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 190: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 191: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 192: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 193: case 0b0000_001_010: 194: irpAndiLong (); 195: break irpSwitch; 196: 197: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 198: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 199: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 200: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 201: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 202: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 203: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 204: case 0b0000_001_011: 205: irpCmp2Chk2Word (); 206: break irpSwitch; 207: 208: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 209: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 210: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 211: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 212: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 213: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 214: case 0b0000_010_000: 215: irpSubiByte (); 216: break irpSwitch; 217: 218: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 219: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 220: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 221: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 222: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 223: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 224: case 0b0000_010_001: 225: irpSubiWord (); 226: break irpSwitch; 227: 228: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 229: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 230: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 231: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 232: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 233: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 234: case 0b0000_010_010: 235: irpSubiLong (); 236: break irpSwitch; 237: 238: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 239: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 240: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 241: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 242: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 243: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 244: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 245: case 0b0000_010_011: 246: irpCmp2Chk2Long (); 247: break irpSwitch; 248: 249: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 250: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 251: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 252: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 253: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 254: case 0b0000_011_000: 255: irpAddiByte (); 256: break irpSwitch; 257: 258: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 259: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 260: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 261: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 262: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 263: case 0b0000_011_001: 264: irpAddiWord (); 265: break irpSwitch; 266: 267: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 268: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 269: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 270: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 271: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 272: case 0b0000_011_010: 273: irpAddiLong (); 274: break irpSwitch; 275: 276: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 277: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 278: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 279: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 280: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 281: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 282: case 0b0000_100_000: 283: irpBtstImm (); 284: break irpSwitch; 285: 286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 287: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 288: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 290: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 291: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 292: case 0b0000_100_001: 293: irpBchgImm (); 294: break irpSwitch; 295: 296: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 297: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 298: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 300: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 301: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 302: case 0b0000_100_010: 303: irpBclrImm (); 304: break irpSwitch; 305: 306: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 307: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 308: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 310: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 311: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 312: case 0b0000_100_011: 313: irpBsetImm (); 314: break irpSwitch; 315: 316: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 317: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 318: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 319: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 320: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 321: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 322: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 323: case 0b0000_101_000: 324: irpEoriByte (); 325: break irpSwitch; 326: 327: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 328: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 329: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 330: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 331: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 332: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 333: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 334: case 0b0000_101_001: 335: irpEoriWord (); 336: break irpSwitch; 337: 338: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 339: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 340: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 342: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 343: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 344: case 0b0000_101_010: 345: irpEoriLong (); 346: break irpSwitch; 347: 348: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 349: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 350: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 351: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 352: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 353: case 0b0000_101_011: 354: irpCasByte (); 355: break irpSwitch; 356: 357: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 358: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 359: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 360: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 361: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 362: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 363: case 0b0000_110_000: 364: irpCmpiByte (); 365: break irpSwitch; 366: 367: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 368: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 369: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 370: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 371: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 372: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 373: case 0b0000_110_001: 374: irpCmpiWord (); 375: break irpSwitch; 376: 377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 378: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 379: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 380: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 381: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 382: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 383: case 0b0000_110_010: 384: irpCmpiLong (); 385: break irpSwitch; 386: 387: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 388: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 389: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 390: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 391: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 392: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 393: case 0b0000_110_011: 394: irpCasWord (); 395: break irpSwitch; 396: 397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 398: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 399: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 400: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 401: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 402: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 403: case 0b0000_111_000: 404: irpMovesByte (); 405: break irpSwitch; 406: 407: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 408: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 409: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 410: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 411: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 412: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 413: case 0b0000_111_001: 414: irpMovesWord (); 415: break irpSwitch; 416: 417: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 418: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 419: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 420: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 421: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 422: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 423: case 0b0000_111_010: 424: irpMovesLong (); 425: break irpSwitch; 426: 427: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 428: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 429: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 430: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 431: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 432: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 433: case 0b0000_111_011: 434: irpCasLong (); 435: break irpSwitch; 436: 437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 441: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 442: case 0b0001_000_000: 443: case 0b0001_001_000: 444: case 0b0001_010_000: 445: case 0b0001_011_000: 446: case 0b0001_100_000: 447: case 0b0001_101_000: 448: case 0b0001_110_000: 449: case 0b0001_111_000: 450: irpMoveToDRByte (); 451: break irpSwitch; 452: 453: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 454: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 455: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 456: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 457: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 458: case 0b0001_000_010: 459: case 0b0001_001_010: 460: case 0b0001_010_010: 461: case 0b0001_011_010: 462: case 0b0001_100_010: 463: case 0b0001_101_010: 464: case 0b0001_110_010: 465: case 0b0001_111_010: 466: irpMoveToMMByte (); 467: break irpSwitch; 468: 469: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 470: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 471: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 472: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 473: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 474: case 0b0001_000_011: 475: case 0b0001_001_011: 476: case 0b0001_010_011: 477: case 0b0001_011_011: 478: case 0b0001_100_011: 479: case 0b0001_101_011: 480: case 0b0001_110_011: 481: case 0b0001_111_011: 482: irpMoveToMPByte (); 483: break irpSwitch; 484: 485: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 486: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 487: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 489: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 490: case 0b0001_000_100: 491: case 0b0001_001_100: 492: case 0b0001_010_100: 493: case 0b0001_011_100: 494: case 0b0001_100_100: 495: case 0b0001_101_100: 496: case 0b0001_110_100: 497: case 0b0001_111_100: 498: irpMoveToMNByte (); 499: break irpSwitch; 500: 501: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 502: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 503: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 504: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 505: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 506: case 0b0001_000_101: 507: case 0b0001_001_101: 508: case 0b0001_010_101: 509: case 0b0001_011_101: 510: case 0b0001_100_101: 511: case 0b0001_101_101: 512: case 0b0001_110_101: 513: case 0b0001_111_101: 514: irpMoveToMWByte (); 515: break irpSwitch; 516: 517: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 518: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 519: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 520: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 521: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 522: case 0b0001_000_110: 523: case 0b0001_001_110: 524: case 0b0001_010_110: 525: case 0b0001_011_110: 526: case 0b0001_100_110: 527: case 0b0001_101_110: 528: case 0b0001_110_110: 529: case 0b0001_111_110: 530: irpMoveToMXByte (); 531: break irpSwitch; 532: 533: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 534: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 535: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 536: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 537: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 538: case 0b0001_000_111: 539: irpMoveToZWByte (); 540: break irpSwitch; 541: 542: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 543: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 544: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 545: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 546: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 547: case 0b0001_001_111: 548: irpMoveToZLByte (); 549: break irpSwitch; 550: 551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 552: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 553: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 554: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 555: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 556: case 0b0010_000_000: 557: case 0b0010_001_000: 558: case 0b0010_010_000: 559: case 0b0010_011_000: 560: case 0b0010_100_000: 561: case 0b0010_101_000: 562: case 0b0010_110_000: 563: case 0b0010_111_000: 564: irpMoveToDRLong (); 565: break irpSwitch; 566: 567: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 568: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 569: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 570: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 571: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 572: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 573: case 0b0010_000_001: 574: case 0b0010_001_001: 575: case 0b0010_010_001: 576: case 0b0010_011_001: 577: case 0b0010_100_001: 578: case 0b0010_101_001: 579: case 0b0010_110_001: 580: case 0b0010_111_001: 581: irpMoveaLong (); 582: break irpSwitch; 583: 584: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 585: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 586: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 587: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 588: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 589: case 0b0010_000_010: 590: case 0b0010_001_010: 591: case 0b0010_010_010: 592: case 0b0010_011_010: 593: case 0b0010_100_010: 594: case 0b0010_101_010: 595: case 0b0010_110_010: 596: case 0b0010_111_010: 597: irpMoveToMMLong (); 598: break irpSwitch; 599: 600: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 601: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 602: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 603: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 604: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 605: case 0b0010_000_011: 606: case 0b0010_001_011: 607: case 0b0010_010_011: 608: case 0b0010_011_011: 609: case 0b0010_100_011: 610: case 0b0010_101_011: 611: case 0b0010_110_011: 612: case 0b0010_111_011: 613: irpMoveToMPLong (); 614: break irpSwitch; 615: 616: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 617: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 618: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 619: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 620: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 621: case 0b0010_000_100: 622: case 0b0010_001_100: 623: case 0b0010_010_100: 624: case 0b0010_011_100: 625: case 0b0010_100_100: 626: case 0b0010_101_100: 627: case 0b0010_110_100: 628: case 0b0010_111_100: 629: irpMoveToMNLong (); 630: break irpSwitch; 631: 632: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 633: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 634: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 635: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 636: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 637: case 0b0010_000_101: 638: case 0b0010_001_101: 639: case 0b0010_010_101: 640: case 0b0010_011_101: 641: case 0b0010_100_101: 642: case 0b0010_101_101: 643: case 0b0010_110_101: 644: case 0b0010_111_101: 645: irpMoveToMWLong (); 646: break irpSwitch; 647: 648: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 649: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 650: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 651: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 652: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 653: case 0b0010_000_110: 654: case 0b0010_001_110: 655: case 0b0010_010_110: 656: case 0b0010_011_110: 657: case 0b0010_100_110: 658: case 0b0010_101_110: 659: case 0b0010_110_110: 660: case 0b0010_111_110: 661: irpMoveToMXLong (); 662: break irpSwitch; 663: 664: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 665: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 666: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 667: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 668: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 669: case 0b0010_000_111: 670: irpMoveToZWLong (); 671: break irpSwitch; 672: 673: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 674: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 675: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 676: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 677: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 678: case 0b0010_001_111: 679: irpMoveToZLLong (); 680: break irpSwitch; 681: 682: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 683: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 684: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 685: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 686: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 687: case 0b0011_000_000: 688: case 0b0011_001_000: 689: case 0b0011_010_000: 690: case 0b0011_011_000: 691: case 0b0011_100_000: 692: case 0b0011_101_000: 693: case 0b0011_110_000: 694: case 0b0011_111_000: 695: irpMoveToDRWord (); 696: break irpSwitch; 697: 698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 699: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 700: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 702: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 703: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 704: case 0b0011_000_001: 705: case 0b0011_001_001: 706: case 0b0011_010_001: 707: case 0b0011_011_001: 708: case 0b0011_100_001: 709: case 0b0011_101_001: 710: case 0b0011_110_001: 711: case 0b0011_111_001: 712: irpMoveaWord (); 713: break irpSwitch; 714: 715: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 716: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 717: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 718: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 719: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 720: case 0b0011_000_010: 721: case 0b0011_001_010: 722: case 0b0011_010_010: 723: case 0b0011_011_010: 724: case 0b0011_100_010: 725: case 0b0011_101_010: 726: case 0b0011_110_010: 727: case 0b0011_111_010: 728: irpMoveToMMWord (); 729: break irpSwitch; 730: 731: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 732: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 733: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 734: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 735: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 736: case 0b0011_000_011: 737: case 0b0011_001_011: 738: case 0b0011_010_011: 739: case 0b0011_011_011: 740: case 0b0011_100_011: 741: case 0b0011_101_011: 742: case 0b0011_110_011: 743: case 0b0011_111_011: 744: irpMoveToMPWord (); 745: break irpSwitch; 746: 747: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 748: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 749: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 750: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 751: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 752: case 0b0011_000_100: 753: case 0b0011_001_100: 754: case 0b0011_010_100: 755: case 0b0011_011_100: 756: case 0b0011_100_100: 757: case 0b0011_101_100: 758: case 0b0011_110_100: 759: case 0b0011_111_100: 760: irpMoveToMNWord (); 761: break irpSwitch; 762: 763: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 764: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 765: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 767: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 768: case 0b0011_000_101: 769: case 0b0011_001_101: 770: case 0b0011_010_101: 771: case 0b0011_011_101: 772: case 0b0011_100_101: 773: case 0b0011_101_101: 774: case 0b0011_110_101: 775: case 0b0011_111_101: 776: irpMoveToMWWord (); 777: break irpSwitch; 778: 779: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 780: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 781: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 782: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 783: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 784: case 0b0011_000_110: 785: case 0b0011_001_110: 786: case 0b0011_010_110: 787: case 0b0011_011_110: 788: case 0b0011_100_110: 789: case 0b0011_101_110: 790: case 0b0011_110_110: 791: case 0b0011_111_110: 792: irpMoveToMXWord (); 793: break irpSwitch; 794: 795: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 796: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 797: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 798: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 799: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 800: case 0b0011_000_111: 801: irpMoveToZWWord (); 802: break irpSwitch; 803: 804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 805: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 806: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 808: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 809: case 0b0011_001_111: 810: irpMoveToZLWord (); 811: break irpSwitch; 812: 813: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 814: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 815: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 816: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 817: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 818: case 0b0100_000_000: 819: irpNegxByte (); 820: break irpSwitch; 821: 822: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 823: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 824: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 825: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 826: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 827: case 0b0100_000_001: 828: irpNegxWord (); 829: break irpSwitch; 830: 831: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 832: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 833: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 834: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 835: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 836: case 0b0100_000_010: 837: irpNegxLong (); 838: break irpSwitch; 839: 840: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 841: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 842: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 843: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 844: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 845: case 0b0100_000_011: 846: irpMoveFromSR (); 847: break irpSwitch; 848: 849: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 850: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 851: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 852: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 853: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 854: case 0b0100_000_100: 855: case 0b0100_001_100: 856: case 0b0100_010_100: 857: case 0b0100_011_100: 858: case 0b0100_100_100: 859: case 0b0100_101_100: 860: case 0b0100_110_100: 861: case 0b0100_111_100: 862: irpChkLong (); 863: break irpSwitch; 864: 865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 869: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 870: case 0b0100_000_110: 871: case 0b0100_001_110: 872: case 0b0100_010_110: 873: case 0b0100_011_110: 874: case 0b0100_100_110: 875: case 0b0100_101_110: 876: case 0b0100_110_110: 877: case 0b0100_111_110: 878: irpChkWord (); 879: break irpSwitch; 880: 881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 882: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 883: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 884: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 885: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 886: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 887: case 0b0100_000_111: 888: case 0b0100_001_111: 889: case 0b0100_010_111: 890: case 0b0100_011_111: 891: case 0b0100_100_111: 892: case 0b0100_101_111: 893: case 0b0100_110_111: 894: case 0b0100_111_111: 895: irpLea (); 896: break irpSwitch; 897: 898: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 899: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 900: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 901: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 902: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 903: case 0b0100_001_000: 904: irpClrByte (); 905: break irpSwitch; 906: 907: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 908: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 909: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 911: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 912: case 0b0100_001_001: 913: irpClrWord (); 914: break irpSwitch; 915: 916: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 917: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 918: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 919: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 920: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 921: case 0b0100_001_010: 922: irpClrLong (); 923: break irpSwitch; 924: 925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 926: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 927: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 928: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 929: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 930: case 0b0100_001_011: 931: irpMoveFromCCR (); 932: break irpSwitch; 933: 934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 935: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 936: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 938: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 939: case 0b0100_010_000: 940: irpNegByte (); 941: break irpSwitch; 942: 943: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 944: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 945: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 946: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 947: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 948: case 0b0100_010_001: 949: irpNegWord (); 950: break irpSwitch; 951: 952: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 953: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 954: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 956: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 957: case 0b0100_010_010: 958: irpNegLong (); 959: break irpSwitch; 960: 961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 962: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 963: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 964: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 965: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 966: case 0b0100_010_011: 967: irpMoveToCCR (); 968: break irpSwitch; 969: 970: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 971: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 972: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 973: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 974: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 975: case 0b0100_011_000: 976: irpNotByte (); 977: break irpSwitch; 978: 979: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 980: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 981: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 982: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 983: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 984: case 0b0100_011_001: 985: irpNotWord (); 986: break irpSwitch; 987: 988: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 989: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 990: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 991: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 992: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 993: case 0b0100_011_010: 994: irpNotLong (); 995: break irpSwitch; 996: 997: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 998: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 999: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1000: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1001: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 1002: case 0b0100_011_011: 1003: irpMoveToSR (); 1004: break irpSwitch; 1005: 1006: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1007: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1008: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1010: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 1011: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 1012: case 0b0100_100_000: 1013: irpNbcd (); 1014: break irpSwitch; 1015: 1016: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1017: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1018: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1019: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1020: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 1021: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 1022: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 1023: case 0b0100_100_001: 1024: irpPea (); 1025: break irpSwitch; 1026: 1027: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1028: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1029: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1030: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1031: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 1032: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 1033: case 0b0100_100_010: 1034: irpMovemToMemWord (); 1035: break irpSwitch; 1036: 1037: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1038: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1039: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1040: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1041: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 1042: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 1043: case 0b0100_100_011: 1044: irpMovemToMemLong (); 1045: break irpSwitch; 1046: 1047: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1048: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1049: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1050: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1051: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 1052: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 1053: case 0b0100_101_000: 1054: irpTstByte (); 1055: break irpSwitch; 1056: 1057: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1058: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1059: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1061: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 1062: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 1063: case 0b0100_101_001: 1064: irpTstWord (); 1065: break irpSwitch; 1066: 1067: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1068: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1069: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1070: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1071: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 1072: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 1073: case 0b0100_101_010: 1074: irpTstLong (); 1075: break irpSwitch; 1076: 1077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1078: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1079: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1080: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1081: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 1082: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 1083: case 0b0100_101_011: 1084: irpTas (); 1085: break irpSwitch; 1086: 1087: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1088: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1089: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1090: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1091: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 1092: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 1093: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 1094: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 1095: case 0b0100_110_000: 1096: irpMuluMulsLong (); 1097: break irpSwitch; 1098: 1099: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1100: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1101: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1102: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1103: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 1104: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 1105: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 1106: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 1107: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 1108: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 1109: case 0b0100_110_001: 1110: irpDivuDivsLong (); 1111: break irpSwitch; 1112: 1113: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1114: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1115: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1116: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1117: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 1118: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 1119: case 0b0100_110_010: 1120: irpMovemToRegWord (); 1121: break irpSwitch; 1122: 1123: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1124: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1125: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1126: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1127: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 1128: case 0b0100_110_011: 1129: irpMovemToRegLong (); 1130: break irpSwitch; 1131: 1132: case 0b0100_111_001: 1133: switch (XEiJ.regOC & 0b111_111) { 1134: 1135: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1136: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1137: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1138: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1139: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 1140: case 0b000_000: 1141: case 0b000_001: 1142: case 0b000_010: 1143: case 0b000_011: 1144: case 0b000_100: 1145: case 0b000_101: 1146: case 0b000_110: 1147: case 0b000_111: 1148: case 0b001_000: 1149: case 0b001_001: 1150: case 0b001_010: 1151: case 0b001_011: 1152: case 0b001_100: 1153: case 0b001_101: 1154: case 0b001_110: 1155: irpTrap (); 1156: break irpSwitch; 1157: case 0b001_111: 1158: irpTrap15 (); 1159: break irpSwitch; 1160: 1161: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1162: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1163: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1164: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1165: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 1166: case 0b010_000: 1167: case 0b010_001: 1168: case 0b010_010: 1169: case 0b010_011: 1170: case 0b010_100: 1171: case 0b010_101: 1172: case 0b010_110: 1173: case 0b010_111: 1174: irpLinkWord (); 1175: break irpSwitch; 1176: 1177: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1178: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1179: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1180: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1181: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 1182: case 0b011_000: 1183: case 0b011_001: 1184: case 0b011_010: 1185: case 0b011_011: 1186: case 0b011_100: 1187: case 0b011_101: 1188: case 0b011_110: 1189: case 0b011_111: 1190: irpUnlk (); 1191: break irpSwitch; 1192: 1193: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1194: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1195: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1196: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1197: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 1198: case 0b100_000: 1199: case 0b100_001: 1200: case 0b100_010: 1201: case 0b100_011: 1202: case 0b100_100: 1203: case 0b100_101: 1204: case 0b100_110: 1205: case 0b100_111: 1206: irpMoveToUsp (); 1207: break irpSwitch; 1208: 1209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1210: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1211: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1213: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 1214: case 0b101_000: 1215: case 0b101_001: 1216: case 0b101_010: 1217: case 0b101_011: 1218: case 0b101_100: 1219: case 0b101_101: 1220: case 0b101_110: 1221: case 0b101_111: 1222: irpMoveFromUsp (); 1223: break irpSwitch; 1224: 1225: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1226: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1227: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1228: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1229: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 1230: case 0b110_000: 1231: irpReset (); 1232: break irpSwitch; 1233: 1234: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1235: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1236: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1237: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1238: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 1239: case 0b110_001: 1240: irpNop (); 1241: break irpSwitch; 1242: 1243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1244: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1245: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1246: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1247: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 1248: case 0b110_010: 1249: irpStop (); 1250: break irpSwitch; 1251: 1252: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1253: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1254: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1255: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1256: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 1257: case 0b110_011: 1258: irpRte (); 1259: break irpSwitch; 1260: 1261: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1262: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1263: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1264: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1265: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 1266: case 0b110_100: 1267: irpRtd (); 1268: break irpSwitch; 1269: 1270: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1271: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1272: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1273: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1274: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 1275: case 0b110_101: 1276: irpRts (); 1277: break irpSwitch; 1278: 1279: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1280: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1281: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1282: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1283: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 1284: case 0b110_110: 1285: irpTrapv (); 1286: break irpSwitch; 1287: 1288: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1289: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1290: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1291: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1292: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 1293: case 0b110_111: 1294: irpRtr (); 1295: break irpSwitch; 1296: 1297: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1298: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1299: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1300: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1301: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 1302: case 0b111_010: 1303: irpMovecFromControl (); 1304: break irpSwitch; 1305: 1306: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1307: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1308: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1310: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 1311: case 0b111_011: 1312: irpMovecToControl (); 1313: break irpSwitch; 1314: 1315: default: 1316: irpIllegal (); 1317: 1318: } //switch XEiJ.regOC & 0b111_111 1319: break irpSwitch; 1320: 1321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1322: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1323: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1324: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1325: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 1326: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 1327: case 0b0100_111_010: 1328: irpJsr (); 1329: break irpSwitch; 1330: 1331: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1332: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1333: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1334: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1335: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 1336: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 1337: case 0b0100_111_011: 1338: irpJmp (); 1339: break irpSwitch; 1340: 1341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1342: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1343: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1344: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1345: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 1346: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 1347: case 0b0101_000_000: 1348: case 0b0101_001_000: 1349: case 0b0101_010_000: 1350: case 0b0101_011_000: 1351: case 0b0101_100_000: 1352: case 0b0101_101_000: 1353: case 0b0101_110_000: 1354: case 0b0101_111_000: 1355: irpAddqByte (); 1356: break irpSwitch; 1357: 1358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1359: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1360: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1361: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1362: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 1363: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 1364: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 1365: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 1366: case 0b0101_000_001: 1367: case 0b0101_001_001: 1368: case 0b0101_010_001: 1369: case 0b0101_011_001: 1370: case 0b0101_100_001: 1371: case 0b0101_101_001: 1372: case 0b0101_110_001: 1373: case 0b0101_111_001: 1374: irpAddqWord (); 1375: break irpSwitch; 1376: 1377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1378: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1379: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1380: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1381: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 1382: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 1383: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 1384: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 1385: case 0b0101_000_010: 1386: case 0b0101_001_010: 1387: case 0b0101_010_010: 1388: case 0b0101_011_010: 1389: case 0b0101_100_010: 1390: case 0b0101_101_010: 1391: case 0b0101_110_010: 1392: case 0b0101_111_010: 1393: irpAddqLong (); 1394: break irpSwitch; 1395: 1396: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1397: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1398: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1399: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1400: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 1401: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 1402: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 1403: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 1404: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 1405: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1406: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1407: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1408: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 1409: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1410: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1411: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1412: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 1413: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1414: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1415: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1416: case 0b0101_000_011: 1417: irpSt (); 1418: break irpSwitch; 1419: 1420: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1421: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1422: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1424: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 1425: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 1426: case 0b0101_000_100: 1427: case 0b0101_001_100: 1428: case 0b0101_010_100: 1429: case 0b0101_011_100: 1430: case 0b0101_100_100: 1431: case 0b0101_101_100: 1432: case 0b0101_110_100: 1433: case 0b0101_111_100: 1434: irpSubqByte (); 1435: break irpSwitch; 1436: 1437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1441: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 1442: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 1443: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 1444: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 1445: case 0b0101_000_101: 1446: case 0b0101_001_101: 1447: case 0b0101_010_101: 1448: case 0b0101_011_101: 1449: case 0b0101_100_101: 1450: case 0b0101_101_101: 1451: case 0b0101_110_101: 1452: case 0b0101_111_101: 1453: irpSubqWord (); 1454: break irpSwitch; 1455: 1456: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1457: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1458: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1459: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1460: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 1461: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 1462: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 1463: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 1464: case 0b0101_000_110: 1465: case 0b0101_001_110: 1466: case 0b0101_010_110: 1467: case 0b0101_011_110: 1468: case 0b0101_100_110: 1469: case 0b0101_101_110: 1470: case 0b0101_110_110: 1471: case 0b0101_111_110: 1472: irpSubqLong (); 1473: break irpSwitch; 1474: 1475: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1476: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1477: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1478: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1479: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 1480: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 1481: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 1482: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1483: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1484: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 1485: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1486: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1487: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1488: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 1489: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1490: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1491: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1492: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 1493: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1494: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1495: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1496: case 0b0101_000_111: 1497: irpSf (); 1498: break irpSwitch; 1499: 1500: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1501: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1502: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1504: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 1505: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 1506: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 1507: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 1508: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 1509: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1510: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1511: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1512: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 1513: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1514: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1515: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1516: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 1517: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1518: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1519: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1520: case 0b0101_001_011: 1521: irpShi (); 1522: break irpSwitch; 1523: 1524: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1525: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1526: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1528: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 1529: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 1530: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 1531: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 1532: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1533: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1534: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1535: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1536: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1537: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1538: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1539: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1540: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 1541: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1542: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1543: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1544: case 0b0101_001_111: 1545: irpSls (); 1546: break irpSwitch; 1547: 1548: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1549: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1550: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1552: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 1553: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1554: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1555: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1556: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 1557: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1558: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1559: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1560: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 1561: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1562: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1563: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1564: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1565: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1566: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1567: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1568: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 1569: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1570: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1571: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1572: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1573: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1574: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1575: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1576: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 1577: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1578: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1579: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1580: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1581: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1582: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1583: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1584: case 0b0101_010_011: 1585: irpShs (); 1586: break irpSwitch; 1587: 1588: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1589: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1590: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1591: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1592: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 1593: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1594: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1595: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1596: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 1597: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1598: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1599: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1600: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 1601: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1602: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1603: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1604: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1605: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1606: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1607: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1608: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 1609: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1610: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1611: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1612: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1613: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1614: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1615: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1616: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 1617: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1618: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1619: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1620: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1621: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1622: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1623: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1624: case 0b0101_010_111: 1625: irpSlo (); 1626: break irpSwitch; 1627: 1628: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1629: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1630: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1631: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1632: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 1633: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1634: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1635: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1636: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 1637: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1638: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1639: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1640: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 1641: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1642: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1643: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1644: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1645: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1646: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1647: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1648: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 1649: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1650: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1651: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1652: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1653: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1654: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1655: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1656: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 1657: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1658: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1659: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1660: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1661: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1662: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1663: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1664: case 0b0101_011_011: 1665: irpSne (); 1666: break irpSwitch; 1667: 1668: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1669: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1670: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1671: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1672: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 1673: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1674: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1675: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1676: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 1677: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1678: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1679: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1680: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 1681: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1682: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1683: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1684: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1685: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1686: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1687: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1688: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 1689: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1690: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1691: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1692: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1693: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1694: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1695: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1696: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 1697: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1698: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1699: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1700: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1701: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1702: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1703: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1704: case 0b0101_011_111: 1705: irpSeq (); 1706: break irpSwitch; 1707: 1708: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1709: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1710: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1711: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1712: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 1713: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 1714: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 1715: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 1716: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 1717: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1718: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1719: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1720: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 1721: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1722: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1723: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1724: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 1725: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1726: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1727: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1728: case 0b0101_100_011: 1729: irpSvc (); 1730: break irpSwitch; 1731: 1732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1733: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1734: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1736: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 1737: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 1738: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 1739: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 1740: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 1741: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1742: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1743: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1744: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 1745: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1746: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1747: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1748: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 1749: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1750: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1751: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1752: case 0b0101_100_111: 1753: irpSvs (); 1754: break irpSwitch; 1755: 1756: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1757: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1758: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1759: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1760: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 1761: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 1762: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 1763: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 1764: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 1765: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1766: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1767: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1768: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 1769: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1770: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1771: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1772: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 1773: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1774: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1775: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1776: case 0b0101_101_011: 1777: irpSpl (); 1778: break irpSwitch; 1779: 1780: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1781: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1782: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1783: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1784: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 1785: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 1786: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 1787: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 1788: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 1789: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1790: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1791: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1792: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 1793: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1794: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1795: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1796: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 1797: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1798: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1799: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1800: case 0b0101_101_111: 1801: irpSmi (); 1802: break irpSwitch; 1803: 1804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1805: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1806: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1808: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 1809: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 1810: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 1811: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 1812: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 1813: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1814: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1815: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1816: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 1817: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1818: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1819: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1820: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 1821: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1822: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1823: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1824: case 0b0101_110_011: 1825: irpSge (); 1826: break irpSwitch; 1827: 1828: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1829: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1830: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1831: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1832: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 1833: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 1834: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 1835: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 1836: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 1837: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1838: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1839: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1840: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 1841: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1842: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1843: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1844: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 1845: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1846: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1847: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1848: case 0b0101_110_111: 1849: irpSlt (); 1850: break irpSwitch; 1851: 1852: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1853: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1854: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1855: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1856: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 1857: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 1858: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 1859: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 1860: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 1861: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1862: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1863: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1864: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 1865: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1866: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1867: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1868: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 1869: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1870: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1871: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1872: case 0b0101_111_011: 1873: irpSgt (); 1874: break irpSwitch; 1875: 1876: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1877: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1878: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1879: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1880: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 1881: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 1882: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 1883: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 1884: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 1885: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1886: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1887: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1888: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 1889: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1890: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1891: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1892: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 1893: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1894: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1895: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1896: case 0b0101_111_111: 1897: irpSle (); 1898: break irpSwitch; 1899: 1900: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1901: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1902: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1903: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1904: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 1905: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 1906: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 1907: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 1908: case 0b0110_000_000: 1909: irpBrasw (); 1910: break irpSwitch; 1911: 1912: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1913: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1914: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1915: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1916: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 1917: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 1918: case 0b0110_000_001: 1919: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1920: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1921: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1922: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1923: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 1924: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 1925: case 0b0110_000_010: 1926: irpBras (); 1927: break irpSwitch; 1928: 1929: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1930: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1931: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1932: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1933: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 1934: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 1935: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 1936: case 0b0110_000_011: 1937: irpBrasl (); 1938: break irpSwitch; 1939: 1940: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1941: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1942: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1943: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1944: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 1945: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 1946: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 1947: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 1948: case 0b0110_000_100: 1949: irpBsrsw (); 1950: break irpSwitch; 1951: 1952: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1953: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1954: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1956: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 1957: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 1958: case 0b0110_000_101: 1959: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1960: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1961: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1962: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1963: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 1964: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 1965: case 0b0110_000_110: 1966: irpBsrs (); 1967: break irpSwitch; 1968: 1969: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1970: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1971: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1972: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1973: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 1974: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 1975: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 1976: case 0b0110_000_111: 1977: irpBsrsl (); 1978: break irpSwitch; 1979: 1980: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1981: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1982: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1983: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1984: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 1985: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1986: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1987: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1988: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 1989: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1990: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1991: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1992: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1993: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1994: case 0b0110_001_000: 1995: irpBhisw (); 1996: break irpSwitch; 1997: 1998: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1999: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2000: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2001: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2002: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 2003: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2004: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2005: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2006: case 0b0110_001_001: 2007: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2008: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2009: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2010: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2011: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 2012: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2013: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2014: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2015: case 0b0110_001_010: 2016: irpBhis (); 2017: break irpSwitch; 2018: 2019: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2020: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2021: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2022: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2023: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 2024: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2025: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2026: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2027: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 2028: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 2029: case 0b0110_001_011: 2030: irpBhisl (); 2031: break irpSwitch; 2032: 2033: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2034: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2035: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2036: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2037: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 2038: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2039: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2040: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2041: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 2042: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2043: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2044: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2045: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2046: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2047: case 0b0110_001_100: 2048: irpBlssw (); 2049: break irpSwitch; 2050: 2051: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2052: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2053: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2054: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2055: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 2056: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2057: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2058: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2059: case 0b0110_001_101: 2060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2061: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2062: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2063: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2064: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 2065: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2066: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2067: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2068: case 0b0110_001_110: 2069: irpBlss (); 2070: break irpSwitch; 2071: 2072: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2073: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2074: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2075: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2076: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 2077: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2078: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2079: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2080: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 2081: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 2082: case 0b0110_001_111: 2083: irpBlssl (); 2084: break irpSwitch; 2085: 2086: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2087: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2088: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2090: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 2091: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2092: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2093: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2094: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2095: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2096: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2097: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2098: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 2099: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2100: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2101: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2102: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2103: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2104: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2105: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2106: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2107: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2108: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2109: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2110: case 0b0110_010_000: 2111: irpBhssw (); 2112: break irpSwitch; 2113: 2114: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2115: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2116: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2117: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2118: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 2119: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2120: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2121: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2122: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2123: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2124: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2125: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2126: case 0b0110_010_001: 2127: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2128: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2129: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2130: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2131: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 2132: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2133: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2134: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2135: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2136: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2137: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2138: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2139: case 0b0110_010_010: 2140: irpBhss (); 2141: break irpSwitch; 2142: 2143: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2144: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2145: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2146: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2147: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 2148: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2149: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2150: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2151: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2152: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2153: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2154: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2155: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 2156: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2157: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2158: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2159: case 0b0110_010_011: 2160: irpBhssl (); 2161: break irpSwitch; 2162: 2163: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2164: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2165: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2166: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2167: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 2168: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2169: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2170: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2171: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2172: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2173: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2174: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2175: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 2176: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2177: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2178: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2179: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2180: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2181: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2182: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2183: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2184: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2185: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2186: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2187: case 0b0110_010_100: 2188: irpBlosw (); 2189: break irpSwitch; 2190: 2191: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2192: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2193: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2194: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2195: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 2196: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2197: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2198: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2199: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2200: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2201: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2202: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2203: case 0b0110_010_101: 2204: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2205: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2206: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2207: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2208: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 2209: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2210: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2211: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2212: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2213: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2214: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2215: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2216: case 0b0110_010_110: 2217: irpBlos (); 2218: break irpSwitch; 2219: 2220: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2221: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2222: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2223: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2224: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 2225: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2226: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2227: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2228: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2229: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2230: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2231: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2232: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 2233: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2234: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2235: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2236: case 0b0110_010_111: 2237: irpBlosl (); 2238: break irpSwitch; 2239: 2240: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2241: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2242: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2244: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 2245: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2246: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2247: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2248: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2249: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2250: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2251: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2252: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 2253: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2254: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2255: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2256: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2257: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2258: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2259: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2260: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2261: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2262: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2263: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2264: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2265: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2266: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2267: case 0b0110_011_000: 2268: irpBnesw (); 2269: break irpSwitch; 2270: 2271: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2272: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2273: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2274: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2275: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 2276: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2277: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2278: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2279: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2280: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2281: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2282: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2283: case 0b0110_011_001: 2284: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2285: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2286: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2287: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2288: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 2289: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2290: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2291: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2292: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2293: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2294: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2295: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2296: case 0b0110_011_010: 2297: irpBnes (); 2298: break irpSwitch; 2299: 2300: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2301: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2302: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2303: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2304: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 2305: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2306: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2307: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2308: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2309: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2310: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2311: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2312: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 2313: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2314: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2315: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2316: case 0b0110_011_011: 2317: irpBnesl (); 2318: break irpSwitch; 2319: 2320: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2321: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2322: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2324: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 2325: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2326: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2327: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2328: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2329: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2330: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2331: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2332: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 2333: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2334: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2335: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2336: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2337: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2338: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2339: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2340: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 2341: case 0b0110_011_100: 2342: irpBeqsw (); 2343: break irpSwitch; 2344: 2345: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2346: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2347: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2348: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2349: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 2350: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2351: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2352: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2353: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2354: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2355: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2356: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2357: case 0b0110_011_101: 2358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2359: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2360: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2361: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2362: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 2363: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2364: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2365: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2366: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2367: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2368: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2369: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2370: case 0b0110_011_110: 2371: irpBeqs (); 2372: break irpSwitch; 2373: 2374: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2375: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2376: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2378: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 2379: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2380: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2381: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2382: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2383: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2384: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2385: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2386: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 2387: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2388: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2389: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2390: case 0b0110_011_111: 2391: irpBeqsl (); 2392: break irpSwitch; 2393: 2394: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2395: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2396: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2398: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 2399: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2400: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2401: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2402: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 2403: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2404: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2405: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2406: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2407: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2408: case 0b0110_100_000: 2409: irpBvcsw (); 2410: break irpSwitch; 2411: 2412: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2413: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2414: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2415: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2416: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 2417: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2418: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2419: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2420: case 0b0110_100_001: 2421: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2422: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2423: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2424: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2425: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 2426: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2427: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2428: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2429: case 0b0110_100_010: 2430: irpBvcs (); 2431: break irpSwitch; 2432: 2433: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2434: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2435: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2436: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2437: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 2438: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2439: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2440: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2441: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 2442: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 2443: case 0b0110_100_011: 2444: irpBvcsl (); 2445: break irpSwitch; 2446: 2447: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2448: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2449: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2450: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2451: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 2452: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2453: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2454: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2455: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 2456: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2457: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2458: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2459: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2460: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2461: case 0b0110_100_100: 2462: irpBvssw (); 2463: break irpSwitch; 2464: 2465: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2466: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2467: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2468: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2469: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 2470: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2471: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2472: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2473: case 0b0110_100_101: 2474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2475: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2476: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2477: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2478: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 2479: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2480: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2481: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2482: case 0b0110_100_110: 2483: irpBvss (); 2484: break irpSwitch; 2485: 2486: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2487: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2488: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2489: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2490: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 2491: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2492: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2493: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2494: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 2495: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 2496: case 0b0110_100_111: 2497: irpBvssl (); 2498: break irpSwitch; 2499: 2500: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2501: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2502: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2504: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 2505: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2506: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2507: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2508: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 2509: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2510: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2511: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2512: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2513: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2514: case 0b0110_101_000: 2515: irpBplsw (); 2516: break irpSwitch; 2517: 2518: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2519: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2520: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2521: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2522: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 2523: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2524: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2525: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2526: case 0b0110_101_001: 2527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2528: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2529: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2530: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2531: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 2532: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2533: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2534: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2535: case 0b0110_101_010: 2536: irpBpls (); 2537: break irpSwitch; 2538: 2539: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2540: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2541: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2542: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2543: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 2544: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2545: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2546: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2547: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 2548: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 2549: case 0b0110_101_011: 2550: irpBplsl (); 2551: break irpSwitch; 2552: 2553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2554: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2555: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2557: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 2558: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2559: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2560: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2561: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 2562: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2563: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2564: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2565: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2566: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2567: case 0b0110_101_100: 2568: irpBmisw (); 2569: break irpSwitch; 2570: 2571: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2572: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2573: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2574: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2575: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 2576: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2577: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2578: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2579: case 0b0110_101_101: 2580: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2581: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2582: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2583: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2584: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 2585: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2586: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2587: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2588: case 0b0110_101_110: 2589: irpBmis (); 2590: break irpSwitch; 2591: 2592: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2593: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2594: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2595: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2596: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 2597: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2598: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2599: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2600: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 2601: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 2602: case 0b0110_101_111: 2603: irpBmisl (); 2604: break irpSwitch; 2605: 2606: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2607: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2608: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2609: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2610: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 2611: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2612: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2613: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2614: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 2615: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2616: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2617: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2618: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2619: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2620: case 0b0110_110_000: 2621: irpBgesw (); 2622: break irpSwitch; 2623: 2624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2625: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2626: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2627: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2628: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 2629: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2630: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2631: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2632: case 0b0110_110_001: 2633: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2634: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2635: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2636: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2637: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 2638: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2639: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2640: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2641: case 0b0110_110_010: 2642: irpBges (); 2643: break irpSwitch; 2644: 2645: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2646: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2647: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2648: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2649: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 2650: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2651: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2652: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2653: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 2654: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 2655: case 0b0110_110_011: 2656: irpBgesl (); 2657: break irpSwitch; 2658: 2659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2660: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2661: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2663: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 2664: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2665: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2666: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2667: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 2668: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2669: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2670: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2671: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2672: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2673: case 0b0110_110_100: 2674: irpBltsw (); 2675: break irpSwitch; 2676: 2677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2678: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2679: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2680: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2681: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 2682: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2683: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2684: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2685: case 0b0110_110_101: 2686: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2687: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2688: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2689: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2690: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 2691: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2692: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2693: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2694: case 0b0110_110_110: 2695: irpBlts (); 2696: break irpSwitch; 2697: 2698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2699: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2700: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2702: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 2703: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2704: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2705: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2706: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 2707: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 2708: case 0b0110_110_111: 2709: irpBltsl (); 2710: break irpSwitch; 2711: 2712: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2713: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2714: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2715: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2716: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 2717: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2718: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2719: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2720: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 2721: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2722: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2723: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2724: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2725: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2726: case 0b0110_111_000: 2727: irpBgtsw (); 2728: break irpSwitch; 2729: 2730: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2731: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2732: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2734: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 2735: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2736: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2737: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2738: case 0b0110_111_001: 2739: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2740: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2741: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2742: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2743: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 2744: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2745: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2746: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2747: case 0b0110_111_010: 2748: irpBgts (); 2749: break irpSwitch; 2750: 2751: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2752: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2753: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2754: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2755: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 2756: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2757: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2758: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2759: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 2760: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 2761: case 0b0110_111_011: 2762: irpBgtsl (); 2763: break irpSwitch; 2764: 2765: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2766: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2767: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2768: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2769: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 2770: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2771: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2772: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2773: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 2774: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2775: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2776: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2777: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2778: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2779: case 0b0110_111_100: 2780: irpBlesw (); 2781: break irpSwitch; 2782: 2783: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2784: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2785: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2786: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2787: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 2788: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2789: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2790: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2791: case 0b0110_111_101: 2792: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2793: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2794: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2795: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2796: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 2797: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2798: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2799: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2800: case 0b0110_111_110: 2801: irpBles (); 2802: break irpSwitch; 2803: 2804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2805: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2806: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2808: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 2809: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2810: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2811: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2812: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 2813: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 2814: case 0b0110_111_111: 2815: irpBlesl (); 2816: break irpSwitch; 2817: 2818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2822: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 2823: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 2824: case 0b0111_000_000: 2825: case 0b0111_000_001: 2826: case 0b0111_000_010: 2827: case 0b0111_000_011: 2828: case 0b0111_001_000: 2829: case 0b0111_001_001: 2830: case 0b0111_001_010: 2831: case 0b0111_001_011: 2832: case 0b0111_010_000: 2833: case 0b0111_010_001: 2834: case 0b0111_010_010: 2835: case 0b0111_010_011: 2836: case 0b0111_011_000: 2837: case 0b0111_011_001: 2838: case 0b0111_011_010: 2839: case 0b0111_011_011: 2840: case 0b0111_100_000: 2841: case 0b0111_100_001: 2842: case 0b0111_100_010: 2843: case 0b0111_100_011: 2844: case 0b0111_101_000: 2845: case 0b0111_101_001: 2846: case 0b0111_101_010: 2847: case 0b0111_101_011: 2848: case 0b0111_110_000: 2849: case 0b0111_110_001: 2850: case 0b0111_110_010: 2851: case 0b0111_110_011: 2852: case 0b0111_111_000: 2853: case 0b0111_111_001: 2854: case 0b0111_111_010: 2855: case 0b0111_111_011: 2856: irpMoveq (); 2857: break irpSwitch; 2858: 2859: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2860: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2861: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2862: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2863: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 2864: case 0b0111_000_100: 2865: case 0b0111_001_100: 2866: case 0b0111_010_100: 2867: case 0b0111_011_100: 2868: case 0b0111_100_100: 2869: case 0b0111_101_100: 2870: case 0b0111_110_100: 2871: case 0b0111_111_100: 2872: irpMvsByte (); 2873: break irpSwitch; 2874: 2875: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2876: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2877: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2878: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2879: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 2880: case 0b0111_000_101: 2881: case 0b0111_001_101: 2882: case 0b0111_010_101: 2883: case 0b0111_011_101: 2884: case 0b0111_100_101: 2885: case 0b0111_101_101: 2886: case 0b0111_110_101: 2887: case 0b0111_111_101: 2888: irpMvsWord (); 2889: break irpSwitch; 2890: 2891: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2892: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2893: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2894: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2895: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 2896: case 0b0111_000_110: 2897: case 0b0111_001_110: 2898: case 0b0111_010_110: 2899: case 0b0111_011_110: 2900: case 0b0111_100_110: 2901: case 0b0111_101_110: 2902: case 0b0111_110_110: 2903: case 0b0111_111_110: 2904: irpMvzByte (); 2905: break irpSwitch; 2906: 2907: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2908: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2909: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2911: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 2912: case 0b0111_000_111: 2913: case 0b0111_001_111: 2914: case 0b0111_010_111: 2915: case 0b0111_011_111: 2916: case 0b0111_100_111: 2917: case 0b0111_101_111: 2918: case 0b0111_110_111: 2919: case 0b0111_111_111: 2920: irpMvzWord (); 2921: break irpSwitch; 2922: 2923: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2924: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2925: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2926: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2927: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 2928: case 0b1000_000_000: 2929: case 0b1000_001_000: 2930: case 0b1000_010_000: 2931: case 0b1000_011_000: 2932: case 0b1000_100_000: 2933: case 0b1000_101_000: 2934: case 0b1000_110_000: 2935: case 0b1000_111_000: 2936: irpOrToRegByte (); 2937: break irpSwitch; 2938: 2939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2940: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2941: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2943: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 2944: case 0b1000_000_001: 2945: case 0b1000_001_001: 2946: case 0b1000_010_001: 2947: case 0b1000_011_001: 2948: case 0b1000_100_001: 2949: case 0b1000_101_001: 2950: case 0b1000_110_001: 2951: case 0b1000_111_001: 2952: irpOrToRegWord (); 2953: break irpSwitch; 2954: 2955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2956: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2957: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2958: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2959: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 2960: case 0b1000_000_010: 2961: case 0b1000_001_010: 2962: case 0b1000_010_010: 2963: case 0b1000_011_010: 2964: case 0b1000_100_010: 2965: case 0b1000_101_010: 2966: case 0b1000_110_010: 2967: case 0b1000_111_010: 2968: irpOrToRegLong (); 2969: break irpSwitch; 2970: 2971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2972: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2973: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2974: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2975: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 2976: case 0b1000_000_011: 2977: case 0b1000_001_011: 2978: case 0b1000_010_011: 2979: case 0b1000_011_011: 2980: case 0b1000_100_011: 2981: case 0b1000_101_011: 2982: case 0b1000_110_011: 2983: case 0b1000_111_011: 2984: irpDivuWord (); 2985: break irpSwitch; 2986: 2987: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2988: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2989: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2990: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2991: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 2992: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 2993: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 2994: case 0b1000_000_100: 2995: case 0b1000_001_100: 2996: case 0b1000_010_100: 2997: case 0b1000_011_100: 2998: case 0b1000_100_100: 2999: case 0b1000_101_100: 3000: case 0b1000_110_100: 3001: case 0b1000_111_100: 3002: irpOrToMemByte (); 3003: break irpSwitch; 3004: 3005: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3006: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3007: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3009: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 3010: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 3011: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 3012: case 0b1000_000_101: 3013: case 0b1000_001_101: 3014: case 0b1000_010_101: 3015: case 0b1000_011_101: 3016: case 0b1000_100_101: 3017: case 0b1000_101_101: 3018: case 0b1000_110_101: 3019: case 0b1000_111_101: 3020: irpOrToMemWord (); 3021: break irpSwitch; 3022: 3023: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3024: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3025: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3026: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3027: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 3028: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 3029: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 3030: case 0b1000_000_110: 3031: case 0b1000_001_110: 3032: case 0b1000_010_110: 3033: case 0b1000_011_110: 3034: case 0b1000_100_110: 3035: case 0b1000_101_110: 3036: case 0b1000_110_110: 3037: case 0b1000_111_110: 3038: irpOrToMemLong (); 3039: break irpSwitch; 3040: 3041: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3042: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3043: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3044: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3045: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 3046: case 0b1000_000_111: 3047: case 0b1000_001_111: 3048: case 0b1000_010_111: 3049: case 0b1000_011_111: 3050: case 0b1000_100_111: 3051: case 0b1000_101_111: 3052: case 0b1000_110_111: 3053: case 0b1000_111_111: 3054: irpDivsWord (); 3055: break irpSwitch; 3056: 3057: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3058: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3059: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3061: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 3062: case 0b1001_000_000: 3063: case 0b1001_001_000: 3064: case 0b1001_010_000: 3065: case 0b1001_011_000: 3066: case 0b1001_100_000: 3067: case 0b1001_101_000: 3068: case 0b1001_110_000: 3069: case 0b1001_111_000: 3070: irpSubToRegByte (); 3071: break irpSwitch; 3072: 3073: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3074: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3075: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3076: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3077: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 3078: case 0b1001_000_001: 3079: case 0b1001_001_001: 3080: case 0b1001_010_001: 3081: case 0b1001_011_001: 3082: case 0b1001_100_001: 3083: case 0b1001_101_001: 3084: case 0b1001_110_001: 3085: case 0b1001_111_001: 3086: irpSubToRegWord (); 3087: break irpSwitch; 3088: 3089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3090: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3091: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3092: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3093: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 3094: case 0b1001_000_010: 3095: case 0b1001_001_010: 3096: case 0b1001_010_010: 3097: case 0b1001_011_010: 3098: case 0b1001_100_010: 3099: case 0b1001_101_010: 3100: case 0b1001_110_010: 3101: case 0b1001_111_010: 3102: irpSubToRegLong (); 3103: break irpSwitch; 3104: 3105: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3106: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3107: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3108: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3109: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 3110: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 3111: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 3112: case 0b1001_000_011: 3113: case 0b1001_001_011: 3114: case 0b1001_010_011: 3115: case 0b1001_011_011: 3116: case 0b1001_100_011: 3117: case 0b1001_101_011: 3118: case 0b1001_110_011: 3119: case 0b1001_111_011: 3120: irpSubaWord (); 3121: break irpSwitch; 3122: 3123: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3124: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3125: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3126: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3127: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 3128: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 3129: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 3130: case 0b1001_000_100: 3131: case 0b1001_001_100: 3132: case 0b1001_010_100: 3133: case 0b1001_011_100: 3134: case 0b1001_100_100: 3135: case 0b1001_101_100: 3136: case 0b1001_110_100: 3137: case 0b1001_111_100: 3138: irpSubToMemByte (); 3139: break irpSwitch; 3140: 3141: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3142: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3143: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3144: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3145: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 3146: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 3147: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 3148: case 0b1001_000_101: 3149: case 0b1001_001_101: 3150: case 0b1001_010_101: 3151: case 0b1001_011_101: 3152: case 0b1001_100_101: 3153: case 0b1001_101_101: 3154: case 0b1001_110_101: 3155: case 0b1001_111_101: 3156: irpSubToMemWord (); 3157: break irpSwitch; 3158: 3159: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3160: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3161: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3162: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3163: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 3164: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 3165: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 3166: case 0b1001_000_110: 3167: case 0b1001_001_110: 3168: case 0b1001_010_110: 3169: case 0b1001_011_110: 3170: case 0b1001_100_110: 3171: case 0b1001_101_110: 3172: case 0b1001_110_110: 3173: case 0b1001_111_110: 3174: irpSubToMemLong (); 3175: break irpSwitch; 3176: 3177: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3178: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3179: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3180: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3181: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 3182: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 3183: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 3184: case 0b1001_000_111: 3185: case 0b1001_001_111: 3186: case 0b1001_010_111: 3187: case 0b1001_011_111: 3188: case 0b1001_100_111: 3189: case 0b1001_101_111: 3190: case 0b1001_110_111: 3191: case 0b1001_111_111: 3192: irpSubaLong (); 3193: break irpSwitch; 3194: 3195: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3196: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3197: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3198: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3199: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 3200: case 0b1010_000_000: 3201: case 0b1010_000_001: 3202: case 0b1010_000_010: 3203: case 0b1010_000_011: 3204: case 0b1010_000_100: 3205: case 0b1010_000_101: 3206: case 0b1010_000_110: 3207: case 0b1010_000_111: 3208: case 0b1010_001_000: 3209: case 0b1010_001_001: 3210: case 0b1010_001_010: 3211: case 0b1010_001_011: 3212: case 0b1010_001_100: 3213: case 0b1010_001_101: 3214: case 0b1010_001_110: 3215: case 0b1010_001_111: 3216: case 0b1010_010_000: 3217: case 0b1010_010_001: 3218: case 0b1010_010_010: 3219: case 0b1010_010_011: 3220: case 0b1010_010_100: 3221: case 0b1010_010_101: 3222: case 0b1010_010_110: 3223: case 0b1010_010_111: 3224: case 0b1010_011_000: 3225: case 0b1010_011_001: 3226: case 0b1010_011_010: 3227: case 0b1010_011_011: 3228: case 0b1010_011_100: 3229: case 0b1010_011_101: 3230: case 0b1010_011_110: 3231: case 0b1010_011_111: 3232: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3233: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3234: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3235: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3236: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 3237: case 0b1010_100_000: 3238: case 0b1010_100_001: 3239: case 0b1010_100_010: 3240: case 0b1010_100_011: 3241: case 0b1010_100_100: 3242: case 0b1010_100_101: 3243: case 0b1010_100_110: 3244: case 0b1010_100_111: 3245: case 0b1010_101_000: 3246: case 0b1010_101_001: 3247: case 0b1010_101_010: 3248: case 0b1010_101_011: 3249: case 0b1010_101_100: 3250: case 0b1010_101_101: 3251: case 0b1010_101_110: 3252: case 0b1010_101_111: 3253: case 0b1010_110_000: 3254: case 0b1010_110_001: 3255: case 0b1010_110_010: 3256: case 0b1010_110_011: 3257: case 0b1010_110_100: 3258: case 0b1010_110_101: 3259: case 0b1010_110_110: 3260: case 0b1010_110_111: 3261: case 0b1010_111_000: 3262: case 0b1010_111_001: 3263: case 0b1010_111_010: 3264: case 0b1010_111_011: 3265: case 0b1010_111_100: 3266: case 0b1010_111_101: 3267: case 0b1010_111_110: 3268: case 0b1010_111_111: 3269: irpAline (); 3270: break irpSwitch; 3271: 3272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3273: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3274: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3275: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3276: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 3277: case 0b1011_000_000: 3278: case 0b1011_001_000: 3279: case 0b1011_010_000: 3280: case 0b1011_011_000: 3281: case 0b1011_100_000: 3282: case 0b1011_101_000: 3283: case 0b1011_110_000: 3284: case 0b1011_111_000: 3285: irpCmpByte (); 3286: break irpSwitch; 3287: 3288: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3289: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3290: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3291: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3292: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 3293: case 0b1011_000_001: 3294: case 0b1011_001_001: 3295: case 0b1011_010_001: 3296: case 0b1011_011_001: 3297: case 0b1011_100_001: 3298: case 0b1011_101_001: 3299: case 0b1011_110_001: 3300: case 0b1011_111_001: 3301: irpCmpWord (); 3302: break irpSwitch; 3303: 3304: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3305: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3306: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3307: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3308: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 3309: case 0b1011_000_010: 3310: case 0b1011_001_010: 3311: case 0b1011_010_010: 3312: case 0b1011_011_010: 3313: case 0b1011_100_010: 3314: case 0b1011_101_010: 3315: case 0b1011_110_010: 3316: case 0b1011_111_010: 3317: irpCmpLong (); 3318: break irpSwitch; 3319: 3320: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3321: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3322: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3324: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 3325: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 3326: case 0b1011_000_011: 3327: case 0b1011_001_011: 3328: case 0b1011_010_011: 3329: case 0b1011_011_011: 3330: case 0b1011_100_011: 3331: case 0b1011_101_011: 3332: case 0b1011_110_011: 3333: case 0b1011_111_011: 3334: irpCmpaWord (); 3335: break irpSwitch; 3336: 3337: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3338: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3339: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3341: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 3342: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 3343: case 0b1011_000_100: 3344: case 0b1011_001_100: 3345: case 0b1011_010_100: 3346: case 0b1011_011_100: 3347: case 0b1011_100_100: 3348: case 0b1011_101_100: 3349: case 0b1011_110_100: 3350: case 0b1011_111_100: 3351: irpEorByte (); 3352: break irpSwitch; 3353: 3354: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3355: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3356: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3357: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3358: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 3359: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 3360: case 0b1011_000_101: 3361: case 0b1011_001_101: 3362: case 0b1011_010_101: 3363: case 0b1011_011_101: 3364: case 0b1011_100_101: 3365: case 0b1011_101_101: 3366: case 0b1011_110_101: 3367: case 0b1011_111_101: 3368: irpEorWord (); 3369: break irpSwitch; 3370: 3371: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3372: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3373: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3374: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3375: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 3376: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 3377: case 0b1011_000_110: 3378: case 0b1011_001_110: 3379: case 0b1011_010_110: 3380: case 0b1011_011_110: 3381: case 0b1011_100_110: 3382: case 0b1011_101_110: 3383: case 0b1011_110_110: 3384: case 0b1011_111_110: 3385: irpEorLong (); 3386: break irpSwitch; 3387: 3388: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3389: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3390: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3391: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3392: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 3393: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 3394: case 0b1011_000_111: 3395: case 0b1011_001_111: 3396: case 0b1011_010_111: 3397: case 0b1011_011_111: 3398: case 0b1011_100_111: 3399: case 0b1011_101_111: 3400: case 0b1011_110_111: 3401: case 0b1011_111_111: 3402: irpCmpaLong (); 3403: break irpSwitch; 3404: 3405: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3406: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3407: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3408: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3409: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 3410: case 0b1100_000_000: 3411: case 0b1100_001_000: 3412: case 0b1100_010_000: 3413: case 0b1100_011_000: 3414: case 0b1100_100_000: 3415: case 0b1100_101_000: 3416: case 0b1100_110_000: 3417: case 0b1100_111_000: 3418: irpAndToRegByte (); 3419: break irpSwitch; 3420: 3421: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3422: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3423: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3424: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3425: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 3426: case 0b1100_000_001: 3427: case 0b1100_001_001: 3428: case 0b1100_010_001: 3429: case 0b1100_011_001: 3430: case 0b1100_100_001: 3431: case 0b1100_101_001: 3432: case 0b1100_110_001: 3433: case 0b1100_111_001: 3434: irpAndToRegWord (); 3435: break irpSwitch; 3436: 3437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3441: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 3442: case 0b1100_000_010: 3443: case 0b1100_001_010: 3444: case 0b1100_010_010: 3445: case 0b1100_011_010: 3446: case 0b1100_100_010: 3447: case 0b1100_101_010: 3448: case 0b1100_110_010: 3449: case 0b1100_111_010: 3450: irpAndToRegLong (); 3451: break irpSwitch; 3452: 3453: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3454: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3455: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3456: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3457: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 3458: case 0b1100_000_011: 3459: case 0b1100_001_011: 3460: case 0b1100_010_011: 3461: case 0b1100_011_011: 3462: case 0b1100_100_011: 3463: case 0b1100_101_011: 3464: case 0b1100_110_011: 3465: case 0b1100_111_011: 3466: irpMuluWord (); 3467: break irpSwitch; 3468: 3469: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3470: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3471: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3472: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3473: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 3474: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 3475: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 3476: case 0b1100_000_100: 3477: case 0b1100_001_100: 3478: case 0b1100_010_100: 3479: case 0b1100_011_100: 3480: case 0b1100_100_100: 3481: case 0b1100_101_100: 3482: case 0b1100_110_100: 3483: case 0b1100_111_100: 3484: irpAndToMemByte (); 3485: break irpSwitch; 3486: 3487: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3488: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3489: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3490: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3491: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 3492: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 3493: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 3494: case 0b1100_000_101: 3495: case 0b1100_001_101: 3496: case 0b1100_010_101: 3497: case 0b1100_011_101: 3498: case 0b1100_100_101: 3499: case 0b1100_101_101: 3500: case 0b1100_110_101: 3501: case 0b1100_111_101: 3502: irpAndToMemWord (); 3503: break irpSwitch; 3504: 3505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3506: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3507: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3508: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3509: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 3510: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 3511: case 0b1100_000_110: 3512: case 0b1100_001_110: 3513: case 0b1100_010_110: 3514: case 0b1100_011_110: 3515: case 0b1100_100_110: 3516: case 0b1100_101_110: 3517: case 0b1100_110_110: 3518: case 0b1100_111_110: 3519: irpAndToMemLong (); 3520: break irpSwitch; 3521: 3522: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3523: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3524: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3525: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3526: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 3527: case 0b1100_000_111: 3528: case 0b1100_001_111: 3529: case 0b1100_010_111: 3530: case 0b1100_011_111: 3531: case 0b1100_100_111: 3532: case 0b1100_101_111: 3533: case 0b1100_110_111: 3534: case 0b1100_111_111: 3535: irpMulsWord (); 3536: break irpSwitch; 3537: 3538: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3539: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3540: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3542: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 3543: case 0b1101_000_000: 3544: case 0b1101_001_000: 3545: case 0b1101_010_000: 3546: case 0b1101_011_000: 3547: case 0b1101_100_000: 3548: case 0b1101_101_000: 3549: case 0b1101_110_000: 3550: case 0b1101_111_000: 3551: irpAddToRegByte (); 3552: break irpSwitch; 3553: 3554: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3555: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3556: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3557: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3558: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 3559: case 0b1101_000_001: 3560: case 0b1101_001_001: 3561: case 0b1101_010_001: 3562: case 0b1101_011_001: 3563: case 0b1101_100_001: 3564: case 0b1101_101_001: 3565: case 0b1101_110_001: 3566: case 0b1101_111_001: 3567: irpAddToRegWord (); 3568: break irpSwitch; 3569: 3570: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3571: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3572: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3573: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3574: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 3575: case 0b1101_000_010: 3576: case 0b1101_001_010: 3577: case 0b1101_010_010: 3578: case 0b1101_011_010: 3579: case 0b1101_100_010: 3580: case 0b1101_101_010: 3581: case 0b1101_110_010: 3582: case 0b1101_111_010: 3583: irpAddToRegLong (); 3584: break irpSwitch; 3585: 3586: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3587: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3588: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3589: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3590: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 3591: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 3592: case 0b1101_000_011: 3593: case 0b1101_001_011: 3594: case 0b1101_010_011: 3595: case 0b1101_011_011: 3596: case 0b1101_100_011: 3597: case 0b1101_101_011: 3598: case 0b1101_110_011: 3599: case 0b1101_111_011: 3600: irpAddaWord (); 3601: break irpSwitch; 3602: 3603: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3604: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3605: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3606: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3607: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 3608: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 3609: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 3610: case 0b1101_000_100: 3611: case 0b1101_001_100: 3612: case 0b1101_010_100: 3613: case 0b1101_011_100: 3614: case 0b1101_100_100: 3615: case 0b1101_101_100: 3616: case 0b1101_110_100: 3617: case 0b1101_111_100: 3618: irpAddToMemByte (); 3619: break irpSwitch; 3620: 3621: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3622: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3623: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3625: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 3626: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 3627: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 3628: case 0b1101_000_101: 3629: case 0b1101_001_101: 3630: case 0b1101_010_101: 3631: case 0b1101_011_101: 3632: case 0b1101_100_101: 3633: case 0b1101_101_101: 3634: case 0b1101_110_101: 3635: case 0b1101_111_101: 3636: irpAddToMemWord (); 3637: break irpSwitch; 3638: 3639: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3640: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3641: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3642: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3643: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 3644: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 3645: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 3646: case 0b1101_000_110: 3647: case 0b1101_001_110: 3648: case 0b1101_010_110: 3649: case 0b1101_011_110: 3650: case 0b1101_100_110: 3651: case 0b1101_101_110: 3652: case 0b1101_110_110: 3653: case 0b1101_111_110: 3654: irpAddToMemLong (); 3655: break irpSwitch; 3656: 3657: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3658: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3659: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3660: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3661: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 3662: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 3663: case 0b1101_000_111: 3664: case 0b1101_001_111: 3665: case 0b1101_010_111: 3666: case 0b1101_011_111: 3667: case 0b1101_100_111: 3668: case 0b1101_101_111: 3669: case 0b1101_110_111: 3670: case 0b1101_111_111: 3671: irpAddaLong (); 3672: break irpSwitch; 3673: 3674: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3675: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3676: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3678: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 3679: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 3680: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 3681: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 3682: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 3683: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 3684: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 3685: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 3686: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 3687: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 3688: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 3689: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 3690: case 0b1110_000_000: 3691: case 0b1110_001_000: 3692: case 0b1110_010_000: 3693: case 0b1110_011_000: 3694: case 0b1110_100_000: 3695: case 0b1110_101_000: 3696: case 0b1110_110_000: 3697: case 0b1110_111_000: 3698: irpXxrToRegByte (); 3699: break irpSwitch; 3700: 3701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3702: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3703: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3704: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3705: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 3706: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 3707: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 3708: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 3709: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 3710: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 3711: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 3712: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 3713: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 3714: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 3715: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 3716: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 3717: case 0b1110_000_001: 3718: case 0b1110_001_001: 3719: case 0b1110_010_001: 3720: case 0b1110_011_001: 3721: case 0b1110_100_001: 3722: case 0b1110_101_001: 3723: case 0b1110_110_001: 3724: case 0b1110_111_001: 3725: irpXxrToRegWord (); 3726: break irpSwitch; 3727: 3728: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3729: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3730: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3731: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3732: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 3733: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 3734: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 3735: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 3736: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 3737: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 3738: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 3739: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 3740: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 3741: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 3742: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 3743: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 3744: case 0b1110_000_010: 3745: case 0b1110_001_010: 3746: case 0b1110_010_010: 3747: case 0b1110_011_010: 3748: case 0b1110_100_010: 3749: case 0b1110_101_010: 3750: case 0b1110_110_010: 3751: case 0b1110_111_010: 3752: irpXxrToRegLong (); 3753: break irpSwitch; 3754: 3755: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3756: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3757: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3759: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 3760: case 0b1110_000_011: 3761: irpAsrToMem (); 3762: break irpSwitch; 3763: 3764: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3765: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3766: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3767: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3768: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 3769: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 3770: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 3771: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 3772: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 3773: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 3774: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 3775: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 3776: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 3777: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 3778: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 3779: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 3780: case 0b1110_000_100: 3781: case 0b1110_001_100: 3782: case 0b1110_010_100: 3783: case 0b1110_011_100: 3784: case 0b1110_100_100: 3785: case 0b1110_101_100: 3786: case 0b1110_110_100: 3787: case 0b1110_111_100: 3788: irpXxlToRegByte (); 3789: break irpSwitch; 3790: 3791: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3792: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3793: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3794: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3795: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 3796: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 3797: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 3798: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 3799: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 3800: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 3801: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 3802: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 3803: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 3804: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 3805: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 3806: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 3807: case 0b1110_000_101: 3808: case 0b1110_001_101: 3809: case 0b1110_010_101: 3810: case 0b1110_011_101: 3811: case 0b1110_100_101: 3812: case 0b1110_101_101: 3813: case 0b1110_110_101: 3814: case 0b1110_111_101: 3815: irpXxlToRegWord (); 3816: break irpSwitch; 3817: 3818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3822: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 3823: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 3824: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 3825: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 3826: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 3827: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 3828: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 3829: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 3830: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 3831: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 3832: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 3833: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 3834: case 0b1110_000_110: 3835: case 0b1110_001_110: 3836: case 0b1110_010_110: 3837: case 0b1110_011_110: 3838: case 0b1110_100_110: 3839: case 0b1110_101_110: 3840: case 0b1110_110_110: 3841: case 0b1110_111_110: 3842: irpXxlToRegLong (); 3843: break irpSwitch; 3844: 3845: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3846: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3847: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3848: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3849: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 3850: case 0b1110_000_111: 3851: irpAslToMem (); 3852: break irpSwitch; 3853: 3854: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3855: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3856: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3857: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3858: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 3859: case 0b1110_001_011: 3860: irpLsrToMem (); 3861: break irpSwitch; 3862: 3863: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3864: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3865: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3866: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3867: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 3868: case 0b1110_001_111: 3869: irpLslToMem (); 3870: break irpSwitch; 3871: 3872: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3873: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3874: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3875: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3876: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 3877: case 0b1110_010_011: 3878: irpRoxrToMem (); 3879: break irpSwitch; 3880: 3881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3882: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3883: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3884: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3885: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 3886: case 0b1110_010_111: 3887: irpRoxlToMem (); 3888: break irpSwitch; 3889: 3890: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3891: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3892: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3893: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3894: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 3895: case 0b1110_011_011: 3896: irpRorToMem (); 3897: break irpSwitch; 3898: 3899: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3900: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3901: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3902: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3903: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 3904: case 0b1110_011_111: 3905: irpRolToMem (); 3906: break irpSwitch; 3907: 3908: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3909: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3910: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3911: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3912: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 3913: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 3914: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 3915: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 3916: case 0b1110_100_011: 3917: irpBftst (); 3918: break irpSwitch; 3919: 3920: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3921: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3922: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3923: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3924: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 3925: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 3926: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 3927: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 3928: case 0b1110_100_111: 3929: irpBfextu (); 3930: break irpSwitch; 3931: 3932: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3933: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3934: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3935: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3936: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 3937: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 3938: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 3939: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 3940: case 0b1110_101_011: 3941: irpBfchg (); 3942: break irpSwitch; 3943: 3944: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3945: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3946: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3947: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3948: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 3949: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 3950: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 3951: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 3952: case 0b1110_101_111: 3953: irpBfexts (); 3954: break irpSwitch; 3955: 3956: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3957: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3958: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3959: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3960: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 3961: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 3962: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 3963: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 3964: case 0b1110_110_011: 3965: irpBfclr (); 3966: break irpSwitch; 3967: 3968: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3969: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3970: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3972: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 3973: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 3974: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 3975: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 3976: case 0b1110_110_111: 3977: irpBfffo (); 3978: break irpSwitch; 3979: 3980: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3981: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3982: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3983: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3984: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 3985: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 3986: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 3987: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 3988: case 0b1110_111_011: 3989: irpBfset (); 3990: break irpSwitch; 3991: 3992: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3993: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3994: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3995: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3996: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 3997: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 3998: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 3999: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 4000: case 0b1110_111_111: 4001: irpBfins (); 4002: break irpSwitch; 4003: 4004: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4005: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4006: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4007: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4008: //PFLUSHA |-|---3--|P|-----|-----| |1111_000_000_000_000-0010010000000000 4009: //PFLUSH SFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00000 4010: //PFLUSH DFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00001 4011: //PFLUSH Dn,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm01nnn 4012: //PFLUSH #<data>,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm10ddd 4013: //PMOVE.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0000000000 4014: //PMOVEFD.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0100000000 4015: //PMOVE.L TTn,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n1000000000 4016: //PLOADW SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000000 4017: //PLOADW DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000001 4018: //PLOADW Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000001nnn 4019: //PLOADW #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000010ddd 4020: //PLOADR SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000000 4021: //PLOADR DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000001 4022: //PLOADR Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000001nnn 4023: //PLOADR #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000010ddd 4024: //PFLUSH SFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00000 4025: //PFLUSH DFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00001 4026: //PFLUSH Dn,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm01nnn 4027: //PFLUSH #<data>,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm10ddd 4028: //PMOVE.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000000000000 4029: //PMOVEFD.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000100000000 4030: //PMOVE.L TC,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100001000000000 4031: //PMOVE.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100000000000 4032: //PMOVEFD.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100100000000 4033: //PMOVE.Q SRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100101000000000 4034: //PMOVE.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110000000000 4035: //PMOVEFD.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110100000000 4036: //PMOVE.Q CRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100111000000000 4037: //PMOVE.W <ea>,MMUSR |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110000000000000 4038: //PMOVE.W MMUSR,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110001000000000 4039: //PTESTW SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000000 4040: //PTESTW DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000001 4041: //PTESTW Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000001nnn 4042: //PTESTW #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000010ddd 4043: //PTESTW SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00000 4044: //PTESTW DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00001 4045: //PTESTW Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn01nnn 4046: //PTESTW #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn10ddd 4047: //PTESTR SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000000 4048: //PTESTR DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000001 4049: //PTESTR Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000001nnn 4050: //PTESTR #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000010ddd 4051: //PTESTR SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00000 4052: //PTESTR DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00001 4053: //PTESTR Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn01nnn 4054: //PTESTR #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn10ddd 4055: case 0b1111_000_000: 4056: irpPgen (); 4057: break irpSwitch; 4058: 4059: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4060: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4061: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4063: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 4064: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 4065: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 4066: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 4067: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 4068: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 4069: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 4070: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 4071: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 4072: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 4073: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 4074: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 4075: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 4076: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 4077: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 4078: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 4079: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 4080: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 4081: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 4082: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 4083: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 4084: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 4085: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 4086: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 4087: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 4088: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 4089: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 4090: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 4091: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 4092: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 4093: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 4094: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 4095: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 4096: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 4097: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 4098: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 4099: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 4100: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 4101: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 4102: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 4103: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 4104: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 4105: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 4106: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4107: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4108: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4109: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4110: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4111: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4112: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 4113: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 4114: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 4115: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 4116: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 4117: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 4118: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 4119: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 4120: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 4121: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 4122: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 4123: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 4124: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 4125: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 4126: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 4127: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 4128: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 4129: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 4130: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 4131: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 4132: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 4133: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 4134: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 4135: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 4136: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 4137: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 4138: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 4139: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 4140: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 4141: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 4142: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 4143: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 4144: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 4145: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 4146: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 4147: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 4148: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 4149: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 4150: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 4151: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 4152: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 4153: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 4154: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 4155: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 4156: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 4157: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 4158: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 4159: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 4160: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 4161: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 4162: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 4163: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 4164: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 4165: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 4166: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 4167: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 4168: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 4169: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 4170: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 4171: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 4172: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 4173: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 4174: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 4175: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 4176: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 4177: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 4178: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 4179: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 4180: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 4181: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 4182: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 4183: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 4184: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 4185: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 4186: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 4187: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 4188: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 4189: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 4190: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 4191: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 4192: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 4193: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 4194: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 4195: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 4196: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 4197: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 4198: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 4199: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 4200: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 4201: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 4202: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 4203: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 4204: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 4205: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 4206: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 4207: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 4208: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 4209: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 4210: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 4211: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 4212: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 4213: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 4214: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 4215: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 4216: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 4217: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 4218: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 4219: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 4220: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 4221: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 4222: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 4223: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 4224: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 4225: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 4226: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 4227: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 4228: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 4229: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 4230: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 4231: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 4232: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 4233: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 4234: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 4235: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 4236: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 4237: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 4238: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 4239: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 4240: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 4241: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 4242: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 4243: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 4244: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 4245: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 4246: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 4247: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 4248: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 4249: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 4250: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 4251: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 4252: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 4253: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 4254: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 4255: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 4256: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 4257: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 4258: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 4259: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 4260: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 4261: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 4262: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 4263: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 4264: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4265: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4266: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4267: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4268: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4269: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4270: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 4271: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 4272: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 4273: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 4274: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 4275: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 4276: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 4277: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 4278: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 4279: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 4280: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 4281: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 4282: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 4283: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 4284: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 4285: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 4286: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 4287: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 4288: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 4289: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 4290: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 4291: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 4292: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 4293: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 4294: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 4295: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 4296: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 4297: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 4298: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 4299: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 4300: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 4301: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 4302: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 4303: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 4304: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 4305: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 4306: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 4307: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 4308: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 4309: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 4310: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 4311: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 4312: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 4313: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 4314: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 4315: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 4316: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 4317: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 4318: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 4319: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 4320: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 4321: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 4322: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 4323: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 4324: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 4325: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 4326: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 4327: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 4328: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 4329: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 4330: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 4331: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 4332: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 4333: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 4334: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 4335: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 4336: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 4337: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 4338: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 4339: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 4340: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 4341: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 4342: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 4343: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 4344: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 4345: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 4346: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 4347: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 4348: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 4349: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 4350: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 4351: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 4352: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 4353: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 4354: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 4355: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 4356: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 4357: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 4358: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 4359: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 4360: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 4361: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 4362: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 4363: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 4364: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 4365: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 4366: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 4367: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 4368: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 4369: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 4370: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 4371: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 4372: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 4373: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 4374: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 4375: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 4376: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 4377: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 4378: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 4379: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 4380: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 4381: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 4382: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 4383: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 4384: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 4385: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 4386: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 4387: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 4388: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 4389: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 4390: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 4391: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 4392: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 4393: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 4394: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 4395: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 4396: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 4397: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 4398: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 4399: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 4400: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 4401: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 4402: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 4403: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 4404: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 4405: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 4406: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 4407: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 4408: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 4409: case 0b1111_001_000: 4410: irpFgen (); 4411: break irpSwitch; 4412: 4413: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4414: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4415: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4416: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4417: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 4418: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 4419: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 4420: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 4421: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 4422: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 4423: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 4424: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 4425: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 4426: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 4427: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 4428: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 4429: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 4430: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 4431: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 4432: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 4433: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 4434: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 4435: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 4436: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 4437: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 4438: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 4439: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 4440: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 4441: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 4442: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 4443: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 4444: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 4445: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 4446: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 4447: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 4448: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 4449: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 4450: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 4451: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 4452: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 4453: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 4454: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 4455: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 4456: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 4457: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 4458: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 4459: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 4460: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 4461: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 4462: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 4463: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 4464: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 4465: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 4466: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 4467: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 4468: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 4469: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 4470: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 4471: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 4472: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 4473: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 4474: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 4475: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 4476: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 4477: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 4478: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 4479: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 4480: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 4481: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 4482: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 4483: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 4484: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 4485: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 4486: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 4487: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 4488: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 4489: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 4490: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 4491: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 4492: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 4493: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 4494: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 4495: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 4496: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 4497: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 4498: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 4499: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 4500: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 4501: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 4502: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 4503: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 4504: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 4505: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 4506: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 4507: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 4508: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 4509: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 4510: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 4511: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 4512: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 4513: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 4514: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 4515: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 4516: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 4517: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 4518: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 4519: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 4520: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 4521: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 4522: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 4523: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 4524: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 4525: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 4526: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 4527: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 4528: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 4529: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 4530: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 4531: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 4532: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 4533: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 4534: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 4535: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 4536: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 4537: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 4538: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 4539: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 4540: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 4541: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 4542: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 4543: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 4544: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 4545: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 4546: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 4547: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 4548: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 4549: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 4550: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 4551: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 4552: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 4553: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 4554: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 4555: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 4556: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 4557: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 4558: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 4559: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 4560: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 4561: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 4562: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 4563: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 4564: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 4565: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 4566: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 4567: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 4568: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 4569: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 4570: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 4571: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 4572: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 4573: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 4574: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 4575: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 4576: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 4577: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 4578: case 0b1111_001_001: 4579: irpFscc (); 4580: break irpSwitch; 4581: 4582: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4583: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4584: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4585: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4586: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 4587: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 4588: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 4589: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 4590: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 4591: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 4592: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 4593: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 4594: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 4595: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 4596: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 4597: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 4598: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 4599: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 4600: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 4601: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 4602: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 4603: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 4604: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 4605: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 4606: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 4607: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 4608: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 4609: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 4610: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 4611: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 4612: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 4613: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 4614: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 4615: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 4616: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 4617: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 4618: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 4619: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 4620: case 0b1111_001_010: 4621: irpFbccWord (); 4622: break irpSwitch; 4623: 4624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4625: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4626: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4627: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4628: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 4629: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 4630: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 4631: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 4632: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 4633: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 4634: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 4635: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 4636: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 4637: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 4638: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 4639: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 4640: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 4641: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 4642: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 4643: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 4644: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 4645: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 4646: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 4647: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 4648: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 4649: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 4650: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 4651: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 4652: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 4653: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 4654: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 4655: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 4656: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 4657: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 4658: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 4659: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 4660: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 4661: case 0b1111_001_011: 4662: irpFbccLong (); 4663: break irpSwitch; 4664: 4665: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4666: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4667: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4668: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4669: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 4670: case 0b1111_001_100: 4671: irpFsave (); 4672: break irpSwitch; 4673: 4674: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4675: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4676: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4678: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 4679: case 0b1111_001_101: 4680: irpFrestore (); 4681: break irpSwitch; 4682: 4683: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4684: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4685: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4686: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4687: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 4688: case 0b1111_111_000: 4689: case 0b1111_111_001: 4690: case 0b1111_111_010: 4691: case 0b1111_111_011: 4692: irpFpack (); 4693: break irpSwitch; 4694: 4695: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4696: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4697: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4699: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 4700: case 0b1111_111_100: 4701: case 0b1111_111_101: 4702: case 0b1111_111_110: 4703: case 0b1111_111_111: 4704: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4705: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4706: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4707: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4708: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 4709: case 0b1111_000_001: 4710: case 0b1111_000_010: 4711: case 0b1111_000_011: 4712: case 0b1111_000_100: 4713: case 0b1111_000_101: 4714: case 0b1111_000_110: 4715: case 0b1111_000_111: 4716: case 0b1111_001_110: 4717: case 0b1111_001_111: 4718: case 0b1111_010_000: 4719: case 0b1111_010_001: 4720: case 0b1111_010_010: 4721: case 0b1111_010_011: 4722: case 0b1111_010_100: 4723: case 0b1111_010_101: 4724: case 0b1111_010_110: 4725: case 0b1111_010_111: 4726: case 0b1111_011_000: 4727: case 0b1111_011_001: 4728: case 0b1111_011_010: 4729: case 0b1111_011_011: 4730: case 0b1111_011_100: 4731: case 0b1111_011_101: 4732: case 0b1111_011_110: 4733: case 0b1111_011_111: 4734: case 0b1111_100_000: 4735: case 0b1111_100_001: 4736: case 0b1111_100_010: 4737: case 0b1111_100_011: 4738: case 0b1111_100_100: 4739: case 0b1111_100_101: 4740: case 0b1111_100_110: 4741: case 0b1111_100_111: 4742: case 0b1111_101_000: 4743: case 0b1111_101_001: 4744: case 0b1111_101_010: 4745: case 0b1111_101_011: 4746: case 0b1111_101_100: 4747: case 0b1111_101_101: 4748: case 0b1111_101_110: 4749: case 0b1111_101_111: 4750: case 0b1111_110_000: 4751: case 0b1111_110_001: 4752: case 0b1111_110_010: 4753: case 0b1111_110_011: 4754: case 0b1111_110_100: 4755: case 0b1111_110_101: 4756: case 0b1111_110_110: 4757: case 0b1111_110_111: 4758: irpFline (); 4759: break irpSwitch; 4760: 4761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4762: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4763: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4764: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4765: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 4766: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 4767: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 4768: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 4769: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 4770: case 0b0100_111_000: 4771: irpEmx (); 4772: break; 4773: 4774: default: 4775: irpIllegal (); 4776: 4777: } //switch XEiJ.regOC >>> 6 4778: 4779: //トレース例外 4780: // 命令実行前にsrのTビットがセットされていたとき命令実行後にトレース例外が発生する 4781: // トレース例外の発動は命令の機能拡張であり、他の例外処理で命令が中断されたときはトレース例外は発生しない 4782: // 命令例外はトレース例外の前に、割り込み例外はトレース例外の後に処理される 4783: // 未実装命令のエミュレーションルーチンはrteの直前にsrのTビットを復元することで未実装命令が1個の命令としてトレースされたように見せる 4784: // ;DOSコールの終了 4785: // ~008616: 4786: // btst.b #$07,(sp) 4787: // bne.s ~00861E 4788: // rte 4789: // ~00861E: 4790: // ori.w #$8000,sr 4791: // rte 4792: if (XEiJ.mpuTraceFlag != 0) { //命令実行前にsrのTビットがセットされていた 4793: XEiJ.mpuCycleCount += 34; 4794: irpException (M68kException.M6E_TRACE, XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x2000, XEiJ.regPC0); //pcは次の命令 4795: } 4796: //クロックをカウントアップする 4797: // オペランドをアクセスした時点ではまだXEiJ.mpuClockTimeが更新されていないのでXEiJ.mpuClockTime<xxxClock 4798: // xxxTickを呼び出すときはXEiJ.mpuClockTime>=xxxClock 4799: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * XEiJ.mpuCycleCount; 4800: //デバイスを呼び出す 4801: TickerQueue.tkqRun (XEiJ.mpuClockTime); 4802: //割り込みを受け付ける 4803: if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) { //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき 4804: if (XEiJ.MPU_INTERRUPT_SWITCH) { 4805: switch (t) { 4806: case 0b00000001: 4807: case 0b00000011: 4808: case 0b00000101: 4809: case 0b00000111: 4810: case 0b00001001: 4811: case 0b00001011: 4812: case 0b00001101: 4813: case 0b00001111: 4814: case 0b00010001: 4815: case 0b00010011: 4816: case 0b00010101: 4817: case 0b00010111: 4818: case 0b00011001: 4819: case 0b00011011: 4820: case 0b00011101: 4821: case 0b00011111: 4822: case 0b00100001: 4823: case 0b00100011: 4824: case 0b00100101: 4825: case 0b00100111: 4826: case 0b00101001: 4827: case 0b00101011: 4828: case 0b00101101: 4829: case 0b00101111: 4830: case 0b00110001: 4831: case 0b00110011: 4832: case 0b00110101: 4833: case 0b00110111: 4834: case 0b00111001: 4835: case 0b00111011: 4836: case 0b00111101: 4837: case 0b00111111: 4838: case 0b01000001: 4839: case 0b01000011: 4840: case 0b01000101: 4841: case 0b01000111: 4842: case 0b01001001: 4843: case 0b01001011: 4844: case 0b01001101: 4845: case 0b01001111: 4846: case 0b01010001: 4847: case 0b01010011: 4848: case 0b01010101: 4849: case 0b01010111: 4850: case 0b01011001: 4851: case 0b01011011: 4852: case 0b01011101: 4853: case 0b01011111: 4854: case 0b01100001: 4855: case 0b01100011: 4856: case 0b01100101: 4857: case 0b01100111: 4858: case 0b01101001: 4859: case 0b01101011: 4860: case 0b01101101: 4861: case 0b01101111: 4862: case 0b01110001: 4863: case 0b01110011: 4864: case 0b01110101: 4865: case 0b01110111: 4866: case 0b01111001: 4867: case 0b01111011: 4868: case 0b01111101: 4869: case 0b01111111: 4870: case 0b10000001: 4871: case 0b10000011: 4872: case 0b10000101: 4873: case 0b10000111: 4874: case 0b10001001: 4875: case 0b10001011: 4876: case 0b10001101: 4877: case 0b10001111: 4878: case 0b10010001: 4879: case 0b10010011: 4880: case 0b10010101: 4881: case 0b10010111: 4882: case 0b10011001: 4883: case 0b10011011: 4884: case 0b10011101: 4885: case 0b10011111: 4886: case 0b10100001: 4887: case 0b10100011: 4888: case 0b10100101: 4889: case 0b10100111: 4890: case 0b10101001: 4891: case 0b10101011: 4892: case 0b10101101: 4893: case 0b10101111: 4894: case 0b10110001: 4895: case 0b10110011: 4896: case 0b10110101: 4897: case 0b10110111: 4898: case 0b10111001: 4899: case 0b10111011: 4900: case 0b10111101: 4901: case 0b10111111: 4902: case 0b11000001: 4903: case 0b11000011: 4904: case 0b11000101: 4905: case 0b11000111: 4906: case 0b11001001: 4907: case 0b11001011: 4908: case 0b11001101: 4909: case 0b11001111: 4910: case 0b11010001: 4911: case 0b11010011: 4912: case 0b11010101: 4913: case 0b11010111: 4914: case 0b11011001: 4915: case 0b11011011: 4916: case 0b11011101: 4917: case 0b11011111: 4918: case 0b11100001: 4919: case 0b11100011: 4920: case 0b11100101: 4921: case 0b11100111: 4922: case 0b11101001: 4923: case 0b11101011: 4924: case 0b11101101: 4925: case 0b11101111: 4926: case 0b11110001: 4927: case 0b11110011: 4928: case 0b11110101: 4929: case 0b11110111: 4930: case 0b11111001: 4931: case 0b11111011: 4932: case 0b11111101: 4933: case 0b11111111: 4934: //レベル7 4935: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 4936: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 4937: irpInterrupt (t, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 4938: } 4939: break; 4940: case 0b00000010: 4941: case 0b00000110: 4942: case 0b00001010: 4943: case 0b00001110: 4944: case 0b00010010: 4945: case 0b00010110: 4946: case 0b00011010: 4947: case 0b00011110: 4948: case 0b00100010: 4949: case 0b00100110: 4950: case 0b00101010: 4951: case 0b00101110: 4952: case 0b00110010: 4953: case 0b00110110: 4954: case 0b00111010: 4955: case 0b00111110: 4956: case 0b01000010: 4957: case 0b01000110: 4958: case 0b01001010: 4959: case 0b01001110: 4960: case 0b01010010: 4961: case 0b01010110: 4962: case 0b01011010: 4963: case 0b01011110: 4964: case 0b01100010: 4965: case 0b01100110: 4966: case 0b01101010: 4967: case 0b01101110: 4968: case 0b01110010: 4969: case 0b01110110: 4970: case 0b01111010: 4971: case 0b01111110: 4972: case 0b10000010: 4973: case 0b10000110: 4974: case 0b10001010: 4975: case 0b10001110: 4976: case 0b10010010: 4977: case 0b10010110: 4978: case 0b10011010: 4979: case 0b10011110: 4980: case 0b10100010: 4981: case 0b10100110: 4982: case 0b10101010: 4983: case 0b10101110: 4984: case 0b10110010: 4985: case 0b10110110: 4986: case 0b10111010: 4987: case 0b10111110: 4988: case 0b11000010: 4989: case 0b11000110: 4990: case 0b11001010: 4991: case 0b11001110: 4992: case 0b11010010: 4993: case 0b11010110: 4994: case 0b11011010: 4995: case 0b11011110: 4996: case 0b11100010: 4997: case 0b11100110: 4998: case 0b11101010: 4999: case 0b11101110: 5000: case 0b11110010: 5001: case 0b11110110: 5002: case 0b11111010: 5003: case 0b11111110: 5004: //レベル6 5005: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5006: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5007: irpInterrupt (t, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5008: } 5009: break; 5010: case 0b00000100: 5011: case 0b00001100: 5012: case 0b00010100: 5013: case 0b00011100: 5014: case 0b00100100: 5015: case 0b00101100: 5016: case 0b00110100: 5017: case 0b00111100: 5018: case 0b01000100: 5019: case 0b01001100: 5020: case 0b01010100: 5021: case 0b01011100: 5022: case 0b01100100: 5023: case 0b01101100: 5024: case 0b01110100: 5025: case 0b01111100: 5026: case 0b10000100: 5027: case 0b10001100: 5028: case 0b10010100: 5029: case 0b10011100: 5030: case 0b10100100: 5031: case 0b10101100: 5032: case 0b10110100: 5033: case 0b10111100: 5034: case 0b11000100: 5035: case 0b11001100: 5036: case 0b11010100: 5037: case 0b11011100: 5038: case 0b11100100: 5039: case 0b11101100: 5040: case 0b11110100: 5041: case 0b11111100: 5042: //レベル5 5043: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5044: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5045: irpInterrupt (t, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5046: } 5047: break; 5048: case 0b00010000: 5049: case 0b00110000: 5050: case 0b01010000: 5051: case 0b01110000: 5052: case 0b10010000: 5053: case 0b10110000: 5054: case 0b11010000: 5055: case 0b11110000: 5056: //レベル3 5057: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5058: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5059: irpInterrupt (t, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5060: } 5061: break; 5062: case 0b00100000: 5063: case 0b01100000: 5064: case 0b10100000: 5065: case 0b11100000: 5066: //レベル2 5067: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5068: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5069: irpInterrupt (t, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5070: } 5071: break; 5072: case 0b01000000: 5073: case 0b11000000: 5074: //レベル1 5075: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5076: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5077: irpInterrupt (t, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5078: } 5079: break; 5080: } 5081: } else { 5082: t &= -t; 5083: // x&=-xはxの最下位の1のビットだけを残す演算 5084: // すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る 5085: // 最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる 5086: // MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない 5087: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { 5088: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5089: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5090: irpInterrupt (t, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5091: } 5092: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { 5093: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5094: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5095: irpInterrupt (t, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5096: } 5097: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { 5098: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5099: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5100: irpInterrupt (t, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5101: } 5102: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { 5103: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5104: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5105: irpInterrupt (t, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5106: } 5107: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { 5108: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5109: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5110: irpInterrupt (t, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5111: } 5112: } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) { 5113: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5114: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5115: irpInterrupt (t, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5116: } 5117: } 5118: } 5119: } //if t!=0 5120: if (MC68901.MFP_DELAYED_INTERRUPT) { 5121: XEiJ.mpuIRR |= XEiJ.mpuDIRR; //遅延割り込み要求 5122: XEiJ.mpuDIRR = 0; 5123: } 5124: } //命令ループ 5125: } catch (M68kException e) { 5126: if (M68kException.m6eNumber == M68kException.M6E_WAIT_EXCEPTION) { //待機例外 5127: if (irpWaitException ()) { 5128: continue; 5129: } else { 5130: break errorLoop; 5131: } 5132: } 5133: if (M68kException.m6eNumber == M68kException.M6E_INSTRUCTION_BREAK_POINT) { //命令ブレークポイントによる停止 5134: XEiJ.regPC = XEiJ.regPC0; 5135: XEiJ.mpuStop1 (null); //"Instruction Break Point" 5136: break errorLoop; 5137: } 5138: //例外処理 5139: // ここで処理するのはベクタ番号が2～31の例外に限る。TRAP #n命令はインライン展開する 5140: // 例外処理のサイクル数はBUS_ERRORとADDRESS_ERROR以外は34になっているので必要ならば補正してからthrowする 5141: // 使用頻度が高いと思われる例外はインライン展開するのでここには来ない 5142: // 例外処理をインライン展開する場合はMC68000とMC68030のコードを分けなければならずコードが冗長になる 5143: // 使用頻度が低いと思われる例外はインライン展開しない 5144: // セーブされるpcは以下の例外は命令の先頭、これ以外は次の命令 5145: // 2 BUS_ERROR 5146: // 3 ADDRESS_ERROR 5147: // 4 ILLEGAL_INSTRUCTION 5148: // 8 PRIVILEGE_VIOLATION 5149: // 10 LINE_1010_EMULATOR 5150: // 11 LINE_1111_EMULATOR 5151: // fedcba9876543210fedcba9876543210 5152: //if ((1 << M68kException.m6eNumber & 0b00000000000000000000110100011100) != 0) { 5153: // 0123456789abcdef0123456789abcdef 5154: if (0b00111000101100000000000000000000 << M68kException.m6eNumber < 0) { 5155: XEiJ.regPC = XEiJ.regPC0; //セーブされるpcは命令の先頭 5156: } 5157: try { 5158: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 5159: int sp = XEiJ.regRn[15]; 5160: XEiJ.regSRT1 = XEiJ.regSRT0 = 0; //srのTビットを消す 5161: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5162: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 5163: XEiJ.mpuUSP = sp; //USPを保存 5164: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 5165: if (DataBreakPoint.DBP_ON) { 5166: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 5167: } else { 5168: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 5169: } 5170: if (InstructionBreakPoint.IBP_ON) { 5171: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 5172: } 5173: } 5174: if (M68kException.m6eNumber <= M68kException.M6E_ADDRESS_ERROR) { 5175: //ホストファイルシステムのデバイスコマンドを強制終了させる 5176: HFS.hfsState = HFS.HFS_STATE_IDLE; 5177: XEiJ.mpuClockTime += 50 * XEiJ.mpuModifiedUnit; 5178: if (false) { 5179: //FORMAT $Aの例外スタックフレームを作る 5180: // 命令境界のバスエラーまたはアドレスエラー 5181: XEiJ.regRn[15] = sp -= 32; 5182: XEiJ.busWl (sp + 28, 0); //31-30:内部レジスタ,29-28:内部レジスタ 5183: XEiJ.busWl (sp + 24, 0); //27-24:データ出力バッファ 5184: XEiJ.busWl (sp + 20, 0); //23-22:内部レジスタ,21-20:内部レジスタ 5185: XEiJ.busWl (sp + 16, M68kException.m6eAddress); //19-16:データサイクルフォルトアドレス 5186: XEiJ.busWl (sp + 12, 0); //15-14:命令パイプステージB,13-12:命令パイプステージC 5187: XEiJ.busWw (sp + 10, 5188: M68kException.m6eDirection << 6 | 5189: (M68kException.m6eSize == XEiJ.MPU_SS_BYTE ? 1 << 4 : 5190: M68kException.m6eSize == XEiJ.MPU_SS_WORD ? 2 << 4 : 0)); //11-10:特殊ステータスワード 5191: XEiJ.busWw (sp + 8, 0); //9-8:内部レジスタ 5192: XEiJ.busWw (sp + 6, 0xa000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5193: } else { 5194: //FORMAT $Bの例外スタックフレームを作る 5195: // 命令途中のバスエラーまたはアドレスエラー 5196: XEiJ.regRn[15] = sp -= 92; 5197: XEiJ.busWl (sp + 88, 0); //91-58:内部レジスタ 5198: XEiJ.busWl (sp + 84, 0); 5199: XEiJ.busWl (sp + 80, 0); 5200: XEiJ.busWl (sp + 76, 0); 5201: XEiJ.busWl (sp + 72, 0); 5202: XEiJ.busWl (sp + 68, 0); 5203: XEiJ.busWl (sp + 64, 0); 5204: XEiJ.busWl (sp + 60, 0); 5205: XEiJ.busWl (sp + 56, 0); //57-56:バージョンナンバーと内部情報 5206: XEiJ.busWl (sp + 52, 0); 5207: XEiJ.busWl (sp + 48, 0); //53-48:内部レジスタ 5208: XEiJ.busWl (sp + 44, 0); //47-44:データ入力バッファ 5209: XEiJ.busWl (sp + 40, 0); //43-40:内部レジスタ 5210: XEiJ.busWl (sp + 36, 0); //39-36:ステージBアドレス 5211: XEiJ.busWl (sp + 32, 0); //35-28:内部レジスタ 5212: XEiJ.busWl (sp + 28, 0); 5213: XEiJ.busWl (sp + 24, 0); //27-24:データ出力バッファ 5214: XEiJ.busWl (sp + 20, 0); //23-22:内部レジスタ,21-20:内部レジスタ 5215: XEiJ.busWl (sp + 16, M68kException.m6eAddress); //19-16:データサイクルフォルトアドレス 5216: XEiJ.busWl (sp + 12, 0); //15-14:命令パイプステージB,13-12:命令パイプステージC 5217: XEiJ.busWw (sp + 10, 5218: M68kException.m6eDirection << 6 | 5219: (M68kException.m6eSize == XEiJ.MPU_SS_BYTE ? 1 << 4 : 5220: M68kException.m6eSize == XEiJ.MPU_SS_WORD ? 2 << 4 : 0)); //11-10:特殊ステータスワード 5221: XEiJ.busWw (sp + 8, 0); //9-8:内部レジスタ 5222: XEiJ.busWw (sp + 6, 0xb000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5223: } 5224: // 111111111122222222223333333333444444444455555555556666 5225: // 0123456789012345678901234567890123456789012345678901234567890123 5226: } else if (0b0001011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) { 5227: //FORMAT $2の例外スタックフレームを作る 5228: XEiJ.mpuClockTime += 34 * XEiJ.mpuModifiedUnit; 5229: XEiJ.regRn[15] = sp -= 12; 5230: XEiJ.busWl (sp + 8, M68kException.m6eAddress); //11-8:命令アドレス 5231: XEiJ.busWw (sp + 6, 0x2000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5232: } else { 5233: //FORMAT $0の例外スタックフレームを作る 5234: XEiJ.mpuClockTime += 34 * XEiJ.mpuModifiedUnit; 5235: XEiJ.regRn[15] = sp -= 8; 5236: XEiJ.busWw (sp + 6, 0x0000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5237: } 5238: XEiJ.busWl (sp + 2, XEiJ.regPC); //5-2:プログラムカウンタ 5239: XEiJ.busWw (sp, save_sr); //1-0:ステータスレジスタ 5240: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.m6eNumber << 2))); //例外ベクタを取り出してジャンプする 5241: if (XEiJ.dbgStopOnError) { //エラーで停止する場合 5242: if (XEiJ.dbgDoStopOnError ()) { 5243: break errorLoop; 5244: } 5245: } 5246: } catch (M68kException ee) { //ダブルバスフォルト 5247: XEiJ.dbgDoubleBusFault (); 5248: break errorLoop; 5249: } 5250: } //catch M68kException 5251: } //例外ループ 5252: 5253: // 通常 5254: // pc0 最後に実行した命令 5255: // pc 次に実行する命令 5256: // バスエラー、アドレスエラー、不当命令、特権違反で停止したとき 5257: // pc0 エラーを発生させた命令 5258: // pc 例外処理ルーチンの先頭 5259: // ダブルバスフォルトで停止したとき 5260: // pc0 エラーを発生させた命令 5261: // pc エラーを発生させた命令 5262: // 命令ブレークポイントで停止したとき 5263: // pc0 命令ブレークポイントが設定された、次に実行する命令 5264: // pc 命令ブレークポイントが設定された、次に実行する命令 5265: // データブレークポイントで停止したとき 5266: // pc0 データを書き換えた、最後に実行した命令 5267: // pc 次に実行する命令 5268: 5269: //分岐ログに停止レコードを記録する 5270: if (BranchLog.BLG_ON) { 5271: //BranchLog.blgStop (); 5272: int i = (char) BranchLog.blgNewestRecord << BranchLog.BLG_RECORD_SHIFT; 5273: BranchLog.blgArray[i] = BranchLog.blgHead | BranchLog.blgSuper; 5274: BranchLog.blgArray[i + 1] = XEiJ.regPC; //次に実行する命令 5275: } 5276: 5277: } //mpuCore() 5278: 5279: 5280: 5281: //cont = irpWaitException () 5282: // 待機例外をキャッチしたとき 5283: public static boolean irpWaitException () { 5284: XEiJ.regPC = XEiJ.regPC0; //PCを巻き戻す 5285: XEiJ.regRn[8 + (XEiJ.regOC & 7)] += WaitInstruction.REWIND_AR[XEiJ.regOC >> 3]; //(Ar)+|-(Ar)で変化したArを巻き戻す 5286: try { 5287: //トレース例外を処理する 5288: if (XEiJ.mpuTraceFlag != 0) { //命令実行前にsrのTビットがセットされていた 5289: XEiJ.mpuCycleCount += 34; 5290: irpException (M68kException.M6E_TRACE, XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x2000, XEiJ.regPC0); //pcは次の命令 5291: } 5292: //デバイスを呼び出す 5293: TickerQueue.tkqRun (XEiJ.mpuClockTime); 5294: //割り込みを受け付ける 5295: int t; 5296: if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) { //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき 5297: t &= -t; 5298: // x&=-xはxの最下位の1のビットだけを残す演算 5299: // すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る 5300: // 最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる 5301: // MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない 5302: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { 5303: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5304: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5305: irpInterrupt (t, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5306: } 5307: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { 5308: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5309: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5310: irpInterrupt (t, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5311: } 5312: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { 5313: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5314: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5315: irpInterrupt (t, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5316: } 5317: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { 5318: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5319: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5320: irpInterrupt (t, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5321: } 5322: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { 5323: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5324: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5325: irpInterrupt (t, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5326: } 5327: } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) { 5328: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5329: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5330: irpInterrupt (t, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5331: } 5332: } 5333: } //if t!=0 5334: if (MC68901.MFP_DELAYED_INTERRUPT) { 5335: XEiJ.mpuIRR |= XEiJ.mpuDIRR; //遅延割り込み要求 5336: XEiJ.mpuDIRR = 0; 5337: } 5338: } catch (M68kException e) { 5339: //!!! 待機例外処理中のバスエラーの処理は省略 5340: XEiJ.dbgDoubleBusFault (); 5341: return false; 5342: } //catch M68kException 5343: return true; 5344: } //irpWaitException 5345: 5346: 5347: 5348: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5349: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5350: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5351: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5352: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 5353: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 5354: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 5355: public static void irpOriByte () throws M68kException { 5356: int ea = XEiJ.regOC & 63; 5357: int z; 5358: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5359: z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 5360: } else { 5361: z = XEiJ.regPC; 5362: XEiJ.regPC = z + 2; 5363: z = XEiJ.busRbs (z + 1); //pcbs 5364: } 5365: if (ea < XEiJ.EA_AR) { //ORI.B #<data>,Dr 5366: if (XEiJ.DBG_ORI_BYTE_ZERO_D0) { 5367: if (z == 0 && ea == 0 && XEiJ.dbgOriByteZeroD0) { //ORI.B #$00,D0 5368: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 5369: throw M68kException.m6eSignal; 5370: } 5371: } 5372: XEiJ.mpuCycleCount += 8; 5373: z = XEiJ.regRn[ea] |= 255 & z; //0拡張してからOR 5374: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5375: } else if (ea == XEiJ.EA_IM) { //ORI.B #<data>,CCR 5376: XEiJ.mpuCycleCount += 20; 5377: XEiJ.regCCR |= XEiJ.REG_CCR_MASK & z; 5378: } else { //ORI.B #<data>,<mem> 5379: XEiJ.mpuCycleCount += 12; 5380: int a = efaMltByte (ea); 5381: XEiJ.busWb (a, z |= XEiJ.busRbs (a)); 5382: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5383: } 5384: } //irpOriByte 5385: 5386: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5387: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5388: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5389: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5390: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 5391: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 5392: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 5393: public static void irpOriWord () throws M68kException { 5394: int ea = XEiJ.regOC & 63; 5395: if (ea < XEiJ.EA_AR) { //ORI.W #<data>,Dr 5396: int z; 5397: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5398: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5399: } else { 5400: z = XEiJ.regPC; 5401: XEiJ.regPC = z + 2; 5402: z = XEiJ.busRwse (z); //pcws 5403: } 5404: XEiJ.mpuCycleCount += 8; 5405: z = XEiJ.regRn[ea] |= (char) z; //0拡張してからOR 5406: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5407: } else if (ea == XEiJ.EA_IM) { //ORI.W #<data>,SR 5408: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5409: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5410: throw M68kException.m6eSignal; 5411: } 5412: //以下はスーパーバイザモード 5413: XEiJ.mpuCycleCount += 20; 5414: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5415: irpSetSR (XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 5416: } else { 5417: int t = XEiJ.regPC; 5418: XEiJ.regPC = t + 2; 5419: irpSetSR (XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | XEiJ.busRwse (t)); //pcws。特権違反チェックが先 5420: } 5421: } else { //ORI.W #<data>,<mem> 5422: int z; 5423: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5424: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5425: } else { 5426: z = XEiJ.regPC; 5427: XEiJ.regPC = z + 2; 5428: z = XEiJ.busRwse (z); //pcws 5429: } 5430: XEiJ.mpuCycleCount += 12; 5431: int a = efaMltWord (ea); 5432: XEiJ.busWw (a, z |= XEiJ.busRws (a)); 5433: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5434: } 5435: } //irpOriWord 5436: 5437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5441: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 5442: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 5443: public static void irpOriLong () throws M68kException { 5444: int ea = XEiJ.regOC & 63; 5445: int y; 5446: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5447: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 5448: } else { 5449: y = XEiJ.regPC; 5450: XEiJ.regPC = y + 4; 5451: y = XEiJ.busRlse (y); //pcls 5452: } 5453: int z; 5454: if (ea < XEiJ.EA_AR) { //ORI.L #<data>,Dr 5455: XEiJ.mpuCycleCount += 16; 5456: z = XEiJ.regRn[ea] |= y; 5457: } else { //ORI.L #<data>,<mem> 5458: XEiJ.mpuCycleCount += 20; 5459: int a = efaMltLong (ea); 5460: XEiJ.busWl (a, z = XEiJ.busRls (a) | y); 5461: } 5462: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5463: } //irpOriLong 5464: 5465: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5466: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5467: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5468: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5469: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 5470: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 5471: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 5472: // 5473: //BITREV.L Dr 5474: // Drのビットの並びを逆順にする。CCRは変化しない 5475: // 5476: //CHK2.B <ea>,Rn 5477: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5478: // CHK2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5479: // Rnが下限または上限と等しいときZをセットする 5480: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5481: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5482: // CCR 5483: // X 変化しない 5484: // N 変化しない(M68000PRMでは未定義) 5485: // Z Rn-LB==0||Rn-LB==UB-LB 5486: // V 変化しない(M68000PRMでは未定義) 5487: // C Rn-LB>UB-LB(符号なし比較) 5488: // 5489: //CMP2.B <ea>,Rn 5490: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5491: // CMP2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5492: // Rnが下限または上限と等しいときZをセットする 5493: // Rnが範囲外のときCをセットする 5494: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5495: // CCR 5496: // X 変化しない 5497: // N 変化しない(M68000PRMでは未定義) 5498: // Z Rn-LB==0||Rn-LB==UB-LB 5499: // V 変化しない(M68000PRMでは未定義) 5500: // C Rn-LB>UB-LB(符号なし比較) 5501: public static void irpCmp2Chk2Byte () throws M68kException { 5502: int ea = XEiJ.regOC & 63; 5503: if (ea < XEiJ.EA_AR) { //BITREV.L Dr 5504: XEiJ.mpuCycleCount += 4; 5505: if (XEiJ.IRP_BITREV_REVERSE) { //2.83ns 0x0f801f3c 5506: XEiJ.regRn[ea] = Integer.reverse (XEiJ.regRn[ea]); 5507: } else if (XEiJ.IRP_BITREV_SHIFT) { //2.57ns 0x0f801f3c 5508: int x = XEiJ.regRn[ea]; 5509: x = x << 16 | x >>> 16; 5510: x = x << 8 & 0xff00ff00 | x >>> 8 & 0x00ff00ff; 5511: x = x << 4 & 0xf0f0f0f0 | x >>> 4 & 0x0f0f0f0f; 5512: x = x << 2 & 0xcccccccc | x >>> 2 & 0x33333333; 5513: XEiJ.regRn[ea] = x << 1 & 0xaaaaaaaa | x >>> 1 & 0x55555555; 5514: } else if (XEiJ.IRP_BITREV_TABLE) { //1.57ns 0x0f801f3c 5515: int x = XEiJ.regRn[ea]; 5516: XEiJ.regRn[ea] = XEiJ.MPU_BITREV_TABLE_0[x & 2047] | XEiJ.MPU_BITREV_TABLE_1[x << 10 >>> 21] | XEiJ.MPU_BITREV_TABLE_2[x >>> 22]; 5517: } 5518: } else { //CMP2/CHK2.B <ea>,Rn 5519: XEiJ.mpuCycleCount += 8; 5520: int w; 5521: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5522: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 5523: } else { 5524: w = XEiJ.regPC; 5525: XEiJ.regPC = w + 2; 5526: w = XEiJ.busRwze (w); //pcwz 5527: } 5528: int d = XEiJ.regRn[w >> 12]; //Rn 5529: if (0 <= (short) w) { //Dnのとき 5530: d = (byte) d; //符号拡張する 5531: } 5532: int a = efaCntByte (ea); 5533: int l = XEiJ.busRbs (a); //LB 5534: int u = XEiJ.busRbs (a + 1); //UB 5535: //U-D,L-D,D-Lのいずれかに帰着させる 5536: // 参考 5537: // https://twitter.com/moveccr/status/814309539012976640 5538: // https://twitter.com/moveccr/status/814309679845109760 5539: // https://twitter.com/moveccr/status/814310106598871040 5540: int x, y; 5541: if (Integer.compareUnsigned (l, d) < 0 && Integer.compareUnsigned (l, u) <= 0 || d == u) { 5542: x = u; 5543: y = d; 5544: } else if (Integer.compareUnsigned (d, u) < 0 && Integer.compareUnsigned (u, l) < 0) { 5545: x = l; 5546: y = d; 5547: } else { 5548: x = d; 5549: y = l; 5550: } 5551: int z = x - y; 5552: int c = (x & (y ^ z) ^ (y | z)) >>> 31; 5553: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //X 5554: z >>> 28 & XEiJ.REG_CCR_N | //N 5555: (z == 0 ? XEiJ.REG_CCR_Z : 0) | //Z 5556: ((x ^ y) & (x ^ z)) >>> 31 << 1 | //V 5557: c); //C 5558: if ((w >> 11 & c) != 0) { //CHK2でCがセットされたとき 5559: XEiJ.mpuCycleCount += 40 - 8 - 34; 5560: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 5561: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 5562: throw M68kException.m6eSignal; 5563: } 5564: } 5565: } //irpCmp2Chk2Byte 5566: 5567: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5568: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5569: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5570: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5571: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 5572: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 5573: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 5574: public static void irpBtstReg () throws M68kException { 5575: int ea = XEiJ.regOC & 63; 5576: int qqq = XEiJ.regOC >> 9; //qqq 5577: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W (d16,Ar),Dq 5578: XEiJ.mpuCycleCount += 16; 5579: int a; 5580: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5581: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5582: } else { 5583: a = XEiJ.regPC; 5584: XEiJ.regPC = a + 2; 5585: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5586: } 5587: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | XEiJ.busRbz (a) << 8 | XEiJ.busRbz (a + 2); //Javaは評価順序が保証されている 5588: } else { //BTST.L Dq,Dr/<ea> 5589: int y = XEiJ.regRn[qqq]; 5590: if (ea < XEiJ.EA_AR) { //BTST.L Dq,Dr 5591: XEiJ.mpuCycleCount += 6; 5592: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 5593: } else { //BTST.B Dq,<ea> 5594: XEiJ.mpuCycleCount += 4; 5595: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.busRbs (efaAnyByte (ea)) >>> (y & 7) & 1) << 2; //ccr_btst 5596: } 5597: } 5598: } //irpBtstReg 5599: 5600: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5601: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5602: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5603: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5604: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 5605: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 5606: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 5607: public static void irpBchgReg () throws M68kException { 5608: int ea = XEiJ.regOC & 63; 5609: int qqq = XEiJ.regOC >> 9; //qqq 5610: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L (d16,Ar),Dq 5611: XEiJ.mpuCycleCount += 24; 5612: int a; 5613: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5614: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5615: } else { 5616: a = XEiJ.regPC; 5617: XEiJ.regPC = a + 2; 5618: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5619: } 5620: XEiJ.regRn[qqq] = XEiJ.busRbs (a) << 24 | XEiJ.busRbz (a + 2) << 16 | XEiJ.busRbz (a + 4) << 8 | XEiJ.busRbz (a + 6); //Javaは評価順序が保証されている 5621: } else { //BCHG.L Dq,Dr/<ea> 5622: int x; 5623: int y = XEiJ.regRn[qqq]; 5624: if (ea < XEiJ.EA_AR) { //BCHG.L Dq,Dr 5625: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5626: XEiJ.mpuCycleCount += (char) y != 0 ? 6 : 8; //(0xffff&y)!=0 5627: } else { //BCHG.B Dq,<ea> 5628: XEiJ.mpuCycleCount += 8; 5629: int a = efaMltByte (ea); 5630: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) ^ (y = 1 << (y & 7))); 5631: } 5632: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5633: } 5634: } //irpBchgReg 5635: 5636: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5637: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5638: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5639: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5640: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 5641: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 5642: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 5643: public static void irpBclrReg () throws M68kException { 5644: int ea = XEiJ.regOC & 63; 5645: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5646: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W Dq,(d16,Ar) 5647: XEiJ.mpuCycleCount += 16; 5648: int a; 5649: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5650: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5651: } else { 5652: a = XEiJ.regPC; 5653: XEiJ.regPC = a + 2; 5654: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5655: } 5656: XEiJ.busWb (a, y >> 8); 5657: XEiJ.busWb (a + 2, y); 5658: } else { //BCLR.L Dq,Dr/<ea> 5659: int x; 5660: if (ea < XEiJ.EA_AR) { //BCLR.L Dq,Dr 5661: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5662: XEiJ.mpuCycleCount += (char) y != 0 ? 8 : 10; //(0xffff&y)!=0 5663: } else { //BCLR.B Dq,<ea> 5664: XEiJ.mpuCycleCount += 8; 5665: int a = efaMltByte (ea); 5666: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) & ~(y = 1 << (y & 7))); 5667: } 5668: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5669: } 5670: } //irpBclrReg 5671: 5672: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5673: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5674: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5675: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5676: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 5677: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 5678: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 5679: public static void irpBsetReg () throws M68kException { 5680: int ea = XEiJ.regOC & 63; 5681: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5682: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L Dq,(d16,Ar) 5683: XEiJ.mpuCycleCount += 24; 5684: int a; 5685: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5686: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5687: } else { 5688: a = XEiJ.regPC; 5689: XEiJ.regPC = a + 2; 5690: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5691: } 5692: XEiJ.busWb (a, y >> 24); 5693: XEiJ.busWb (a + 2, y >> 16); 5694: XEiJ.busWb (a + 4, y >> 8); 5695: XEiJ.busWb (a + 6, y); 5696: } else { //BSET.L Dq,Dr/<ea> 5697: int x; 5698: if (ea < XEiJ.EA_AR) { //BSET.L Dq,Dr 5699: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5700: XEiJ.mpuCycleCount += (char) y != 0 ? 6 : 8; //(0xffff&y)!=0 5701: } else { //BSET.B Dq,<ea> 5702: XEiJ.mpuCycleCount += 8; 5703: int a = efaMltByte (ea); 5704: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) | (y = 1 << (y & 7))); 5705: } 5706: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5707: } 5708: } //irpBsetReg 5709: 5710: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5711: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5712: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5713: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5714: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 5715: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 5716: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 5717: public static void irpAndiByte () throws M68kException { 5718: int ea = XEiJ.regOC & 63; 5719: int z; 5720: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5721: z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 5722: } else { 5723: z = XEiJ.regPC; 5724: XEiJ.regPC = z + 2; 5725: z = XEiJ.busRbs (z + 1); //pcbs 5726: } 5727: if (ea < XEiJ.EA_AR) { //ANDI.B #<data>,Dr 5728: XEiJ.mpuCycleCount += 8; 5729: z = XEiJ.regRn[ea] &= ~255 | z; //1拡張してからAND 5730: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5731: } else if (ea == XEiJ.EA_IM) { //ANDI.B #<data>,CCR 5732: XEiJ.mpuCycleCount += 20; 5733: XEiJ.regCCR &= z; 5734: } else { //ANDI.B #<data>,<mem> 5735: XEiJ.mpuCycleCount += 12; 5736: int a = efaMltByte (ea); 5737: XEiJ.busWb (a, z &= XEiJ.busRbs (a)); 5738: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5739: } 5740: } //irpAndiByte 5741: 5742: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5743: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5744: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5745: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5746: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 5747: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 5748: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 5749: public static void irpAndiWord () throws M68kException { 5750: int ea = XEiJ.regOC & 63; 5751: if (ea < XEiJ.EA_AR) { //ANDI.W #<data>,Dr 5752: int z; 5753: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5754: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5755: } else { 5756: z = XEiJ.regPC; 5757: XEiJ.regPC = z + 2; 5758: z = XEiJ.busRwse (z); //pcws 5759: } 5760: XEiJ.mpuCycleCount += 8; 5761: z = XEiJ.regRn[ea] &= ~65535 | z; //1拡張してからAND 5762: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5763: } else if (ea == XEiJ.EA_IM) { //ANDI.W #<data>,SR 5764: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5765: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5766: throw M68kException.m6eSignal; 5767: } 5768: //以下はスーパーバイザモード 5769: XEiJ.mpuCycleCount += 20; 5770: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5771: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 5772: } else { 5773: int t = XEiJ.regPC; 5774: XEiJ.regPC = t + 2; 5775: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & XEiJ.busRwse (t)); //pcws。特権違反チェックが先 5776: } 5777: } else { //ANDI.W #<data>,<mem> 5778: int z; 5779: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5780: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5781: } else { 5782: z = XEiJ.regPC; 5783: XEiJ.regPC = z + 2; 5784: z = XEiJ.busRwse (z); //pcws 5785: } 5786: XEiJ.mpuCycleCount += 12; 5787: int a = efaMltWord (ea); 5788: XEiJ.busWw (a, z &= XEiJ.busRws (a)); 5789: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5790: } 5791: } //irpAndiWord 5792: 5793: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5794: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5795: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5796: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5797: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 5798: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 5799: public static void irpAndiLong () throws M68kException { 5800: int ea = XEiJ.regOC & 63; 5801: int y; 5802: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5803: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 5804: } else { 5805: y = XEiJ.regPC; 5806: XEiJ.regPC = y + 4; 5807: y = XEiJ.busRlse (y); //pcls 5808: } 5809: int z; 5810: if (ea < XEiJ.EA_AR) { //ANDI.L #<data>,Dr 5811: XEiJ.mpuCycleCount += 16; 5812: z = XEiJ.regRn[ea] &= y; 5813: } else { //ANDI.L #<data>,<mem> 5814: XEiJ.mpuCycleCount += 20; 5815: int a = efaMltLong (ea); 5816: XEiJ.busWl (a, z = XEiJ.busRls (a) & y); 5817: } 5818: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5819: } //irpAndiLong 5820: 5821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5822: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5823: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5824: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5825: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 5826: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 5827: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 5828: // 5829: //BYTEREV.L Dr 5830: // Drのバイトの並びを逆順にする。CCRは変化しない 5831: // 5832: //CHK2.W <ea>,Rn 5833: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5834: // CHK2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5835: // Rnが下限または上限と等しいときZをセットする 5836: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5837: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5838: // CCR 5839: // X 変化しない 5840: // N 変化しない(M68000PRMでは未定義) 5841: // Z Rn-LB==0||Rn-LB==UB-LB 5842: // V 変化しない(M68000PRMでは未定義) 5843: // C Rn-LB>UB-LB(符号なし比較) 5844: // 5845: //CMP2.W <ea>,Rn 5846: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5847: // CMP2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5848: // Rnが下限または上限と等しいときZをセットする 5849: // Rnが範囲外のときCをセットする 5850: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5851: // CCR 5852: // X 変化しない 5853: // N 変化しない(M68000PRMでは未定義) 5854: // Z Rn-LB==0||Rn-LB==UB-LB 5855: // V 変化しない(M68000PRMでは未定義) 5856: // C Rn-LB>UB-LB(符号なし比較) 5857: public static void irpCmp2Chk2Word () throws M68kException { 5858: int ea = XEiJ.regOC & 63; 5859: if (ea < XEiJ.EA_AR) { //BYTEREV.L Dr 5860: XEiJ.mpuCycleCount += 4; 5861: if (true) { //0.10ns-0.18ns 0x782750ec 5862: XEiJ.regRn[ea] = Integer.reverseBytes (XEiJ.regRn[ea]); 5863: } else { //1.06ns 0x782750ec 5864: int x = XEiJ.regRn[ea]; 5865: XEiJ.regRn[ea] = x << 24 | x << 8 & 0x00ff0000 | x >>> 8 & 0x0000ff00 | x >>> 24; 5866: } 5867: } else { //CMP2/CHK2.W <ea>,Rn 5868: XEiJ.mpuCycleCount += 8; 5869: int w; 5870: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5871: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 5872: } else { 5873: w = XEiJ.regPC; 5874: XEiJ.regPC = w + 2; 5875: w = XEiJ.busRwze (w); //pcwz 5876: } 5877: int d = XEiJ.regRn[w >> 12]; //Rn 5878: if (0 <= (short) w) { //Dnのとき 5879: d = (short) d; //符号拡張する 5880: } 5881: int a = efaCntWord (ea); 5882: int l = XEiJ.busRws (a); //LB 5883: int u = XEiJ.busRws (a + 2); //UB 5884: //U-D,L-D,D-Lのいずれかに帰着させる 5885: // 参考 5886: // https://twitter.com/moveccr/status/814309539012976640 5887: // https://twitter.com/moveccr/status/814309679845109760 5888: // https://twitter.com/moveccr/status/814310106598871040 5889: int x, y; 5890: if (Integer.compareUnsigned (l, d) < 0 && Integer.compareUnsigned (l, u) <= 0 || d == u) { 5891: x = u; 5892: y = d; 5893: } else if (Integer.compareUnsigned (d, u) < 0 && Integer.compareUnsigned (u, l) < 0) { 5894: x = l; 5895: y = d; 5896: } else { 5897: x = d; 5898: y = l; 5899: } 5900: int z = x - y; 5901: int c = (x & (y ^ z) ^ (y | z)) >>> 31; 5902: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //X 5903: z >>> 28 & XEiJ.REG_CCR_N | //N 5904: (z == 0 ? XEiJ.REG_CCR_Z : 0) | //Z 5905: ((x ^ y) & (x ^ z)) >>> 31 << 1 | //V 5906: c); //C 5907: if ((w >> 11 & c) != 0) { //CHK2でCがセットされたとき 5908: XEiJ.mpuCycleCount += 40 - 8 - 34; 5909: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 5910: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 5911: throw M68kException.m6eSignal; 5912: } 5913: } 5914: } //irpCmp2Chk2Word 5915: 5916: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5917: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5918: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5919: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5920: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 5921: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 5922: public static void irpSubiByte () throws M68kException { 5923: int ea = XEiJ.regOC & 63; 5924: int x; 5925: int y; 5926: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5927: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 5928: } else { 5929: y = XEiJ.regPC; 5930: XEiJ.regPC = y + 2; 5931: y = XEiJ.busRbs (y + 1); //pcbs 5932: } 5933: int z; 5934: if (ea < XEiJ.EA_AR) { //SUBI.B #<data>,Dr 5935: XEiJ.mpuCycleCount += 8; 5936: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 5937: } else { //SUBI.B #<data>,<mem> 5938: XEiJ.mpuCycleCount += 12; 5939: int a = efaMltByte (ea); 5940: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) - y)); 5941: } 5942: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5943: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5944: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5945: } //irpSubiByte 5946: 5947: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5948: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5949: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5950: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5951: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 5952: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 5953: public static void irpSubiWord () throws M68kException { 5954: int ea = XEiJ.regOC & 63; 5955: int x; 5956: int y; 5957: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5958: y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5959: } else { 5960: y = XEiJ.regPC; 5961: XEiJ.regPC = y + 2; 5962: y = XEiJ.busRwse (y); //pcws 5963: } 5964: int z; 5965: if (ea < XEiJ.EA_AR) { //SUBI.W #<data>,Dr 5966: XEiJ.mpuCycleCount += 8; 5967: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 5968: } else { //SUBI.W #<data>,<mem> 5969: XEiJ.mpuCycleCount += 12; 5970: int a = efaMltWord (ea); 5971: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) - y)); 5972: } 5973: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5974: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5975: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5976: } //irpSubiWord 5977: 5978: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5979: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5980: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5981: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5982: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 5983: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 5984: public static void irpSubiLong () throws M68kException { 5985: int ea = XEiJ.regOC & 63; 5986: int x; 5987: int y; 5988: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5989: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 5990: } else { 5991: y = XEiJ.regPC; 5992: XEiJ.regPC = y + 4; 5993: y = XEiJ.busRlse (y); //pcls 5994: } 5995: int z; 5996: if (ea < XEiJ.EA_AR) { //SUBI.L #<data>,Dr 5997: XEiJ.mpuCycleCount += 16; 5998: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 5999: } else { //SUBI.L #<data>,<mem> 6000: XEiJ.mpuCycleCount += 20; 6001: int a = efaMltLong (ea); 6002: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y); 6003: } 6004: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6005: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6006: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 6007: } //irpSubiLong 6008: 6009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6010: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6011: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6012: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6013: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 6014: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 6015: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 6016: // 6017: //CHK2.L <ea>,Rn 6018: // <ea>から下限と上限をリードしてRnが範囲内か調べる 6019: // Rnが下限または上限と等しいときZをセットする 6020: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 6021: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 6022: // CCR 6023: // X 変化しない 6024: // N 変化しない(M68000PRMでは未定義) 6025: // Z Rn-LB==0||Rn-LB==UB-LB 6026: // V 変化しない(M68000PRMでは未定義) 6027: // C Rn-LB>UB-LB(符号なし比較) 6028: // 6029: //CMP2.L <ea>,Rn 6030: // <ea>から下限と上限をリードしてRnが範囲内か調べる 6031: // Rnが下限または上限と等しいときZをセットする 6032: // Rnが範囲外のときCをセットする 6033: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 6034: // CCR 6035: // X 変化しない 6036: // N 変化しない(M68000PRMでは未定義) 6037: // Z Rn-LB==0||Rn-LB==UB-LB 6038: // V 変化しない(M68000PRMでは未定義) 6039: // C Rn-LB>UB-LB(符号なし比較) 6040: // 6041: //FF1.L Dr 6042: // Drの最上位の1のbit31からのオフセットをDrに格納する 6043: // Drが0のときは32になる 6044: public static void irpCmp2Chk2Long () throws M68kException { 6045: int ea = XEiJ.regOC & 63; 6046: if (ea < XEiJ.EA_AR) { //FF1.L Dr 6047: XEiJ.mpuCycleCount += 4; 6048: int z = XEiJ.regRn[ea]; 6049: if (true) { 6050: XEiJ.regRn[ea] = Integer.numberOfLeadingZeros (z); 6051: } else { 6052: if (z == 0) { 6053: XEiJ.regRn[ea] = 32; 6054: } else { 6055: int k = -(z >>> 16) >> 16 & 16; 6056: k += -(z >>> k + 8) >> 8 & 8; 6057: k += -(z >>> k + 4) >> 4 & 4; 6058: // bit3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 6059: // bit2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 6060: // bit1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 6061: // bit0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 6062: XEiJ.regRn[ea] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (z >>> k << 1)) & 3) + k; //intのシフトカウントは下位5bitだけが使用される 6063: } 6064: } 6065: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 6066: } else { //CMP2/CHK2.L <ea>,Rn 6067: XEiJ.mpuCycleCount += 8; 6068: int w; 6069: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6070: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6071: } else { 6072: w = XEiJ.regPC; 6073: XEiJ.regPC = w + 2; 6074: w = XEiJ.busRwze (w); //pcwz 6075: } 6076: int d = XEiJ.regRn[w >> 12]; //Rn 6077: int a = efaCntLong (ea); 6078: int l = XEiJ.busRls (a); //LB 6079: int u = XEiJ.busRls (a + 4); //UB 6080: //U-D,L-D,D-Lのいずれかに帰着させる 6081: // 参考 6082: // https://twitter.com/moveccr/status/814309539012976640 6083: // https://twitter.com/moveccr/status/814309679845109760 6084: // https://twitter.com/moveccr/status/814310106598871040 6085: int x, y; 6086: if (Integer.compareUnsigned (l, d) < 0 && Integer.compareUnsigned (l, u) <= 0 || d == u) { 6087: x = u; 6088: y = d; 6089: } else if (Integer.compareUnsigned (d, u) < 0 && Integer.compareUnsigned (u, l) < 0) { 6090: x = l; 6091: y = d; 6092: } else { 6093: x = d; 6094: y = l; 6095: } 6096: int z = x - y; 6097: int c = (x & (y ^ z) ^ (y | z)) >>> 31; 6098: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //X 6099: z >>> 28 & XEiJ.REG_CCR_N | //N 6100: (z == 0 ? XEiJ.REG_CCR_Z : 0) | //Z 6101: ((x ^ y) & (x ^ z)) >>> 31 << 1 | //V 6102: c); //C 6103: if ((w >> 11 & c) != 0) { //CHK2でCがセットされたとき 6104: XEiJ.mpuCycleCount += 40 - 8 - 34; 6105: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 6106: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 6107: throw M68kException.m6eSignal; 6108: } 6109: } 6110: } //irpCmp2Chk2Long 6111: 6112: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6113: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6114: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6115: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6116: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 6117: public static void irpAddiByte () throws M68kException { 6118: int ea = XEiJ.regOC & 63; 6119: int x; 6120: int y; 6121: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6122: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6123: } else { 6124: y = XEiJ.regPC; 6125: XEiJ.regPC = y + 2; 6126: y = XEiJ.busRbs (y + 1); //pcbs 6127: } 6128: int z; 6129: if (ea < XEiJ.EA_AR) { //ADDI.B #<data>,Dr 6130: XEiJ.mpuCycleCount += 8; 6131: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 6132: } else { //ADDI.B #<data>,<mem> 6133: XEiJ.mpuCycleCount += 12; 6134: int a = efaMltByte (ea); 6135: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) + y)); 6136: } 6137: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6138: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6139: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6140: } //irpAddiByte 6141: 6142: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6143: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6144: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6145: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6146: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 6147: public static void irpAddiWord () throws M68kException { 6148: int ea = XEiJ.regOC & 63; 6149: int x; 6150: int y; 6151: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6152: y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6153: } else { 6154: y = XEiJ.regPC; 6155: XEiJ.regPC = y + 2; 6156: y = XEiJ.busRwse (y); //pcws 6157: } 6158: int z; 6159: if (ea < XEiJ.EA_AR) { //ADDI.W #<data>,Dr 6160: XEiJ.mpuCycleCount += 8; 6161: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 6162: } else { //ADDI.W #<data>,<mem> 6163: XEiJ.mpuCycleCount += 12; 6164: int a = efaMltWord (ea); 6165: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) + y)); 6166: } 6167: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6168: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6169: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6170: } //irpAddiWord 6171: 6172: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6173: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6174: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6175: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6176: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 6177: public static void irpAddiLong () throws M68kException { 6178: int ea = XEiJ.regOC & 63; 6179: int x; 6180: int y; 6181: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6182: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6183: } else { 6184: y = XEiJ.regPC; 6185: XEiJ.regPC = y + 4; 6186: y = XEiJ.busRlse (y); //pcls 6187: } 6188: int z; 6189: if (ea < XEiJ.EA_AR) { //ADDI.L #<data>,Dr 6190: XEiJ.mpuCycleCount += 16; 6191: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 6192: } else { //ADDI.L #<data>,<mem> 6193: XEiJ.mpuCycleCount += 20; 6194: int a = efaMltLong (ea); 6195: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y); 6196: } 6197: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6198: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6199: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6200: } //irpAddiLong 6201: 6202: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6203: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6204: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6205: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6206: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 6207: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 6208: public static void irpBtstImm () throws M68kException { 6209: int ea = XEiJ.regOC & 63; 6210: int y; 6211: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6212: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6213: } else { 6214: y = XEiJ.regPC; 6215: XEiJ.regPC = y + 2; 6216: y = XEiJ.busRbs (y + 1); //pcbs 6217: } 6218: if (ea < XEiJ.EA_AR) { //BTST.L #<data>,Dr 6219: XEiJ.mpuCycleCount += 10; 6220: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 6221: } else { //BTST.B #<data>,<ea> 6222: XEiJ.mpuCycleCount += 8; 6223: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.busRbs (efaMemByte (ea)) >>> (y & 7) & 1) << 2; //ccr_btst 6224: } 6225: } //irpBtstImm 6226: 6227: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6228: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6229: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6231: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 6232: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 6233: public static void irpBchgImm () throws M68kException { 6234: int ea = XEiJ.regOC & 63; 6235: int x; 6236: int y; 6237: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6238: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6239: } else { 6240: y = XEiJ.regPC; 6241: XEiJ.regPC = y + 2; 6242: y = XEiJ.busRbs (y + 1); //pcbs 6243: } 6244: if (ea < XEiJ.EA_AR) { //BCHG.L #<data>,Dr 6245: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6246: XEiJ.mpuCycleCount += (char) y != 0 ? 10 : 12; //(0xffff&y)!=0 6247: } else { //BCHG.B #<data>,<ea> 6248: XEiJ.mpuCycleCount += 12; 6249: int a = efaMltByte (ea); 6250: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) ^ (y = 1 << (y & 7))); 6251: } 6252: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6253: } //irpBchgImm 6254: 6255: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6256: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6257: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6258: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6259: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 6260: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 6261: public static void irpBclrImm () throws M68kException { 6262: int ea = XEiJ.regOC & 63; 6263: int x; 6264: int y; 6265: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6266: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6267: } else { 6268: y = XEiJ.regPC; 6269: XEiJ.regPC = y + 2; 6270: y = XEiJ.busRbs (y + 1); //pcbs 6271: } 6272: if (ea < XEiJ.EA_AR) { //BCLR.L #<data>,Dr 6273: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6274: XEiJ.mpuCycleCount += (char) y != 0 ? 12 : 14; //(0xffff&y)!=0 6275: } else { //BCLR.B #<data>,<ea> 6276: XEiJ.mpuCycleCount += 12; 6277: int a = efaMltByte (ea); 6278: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) & ~(y = 1 << (y & 7))); 6279: } 6280: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6281: } //irpBclrImm 6282: 6283: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6284: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6285: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6287: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 6288: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 6289: public static void irpBsetImm () throws M68kException { 6290: int ea = XEiJ.regOC & 63; 6291: int x; 6292: int y; 6293: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6294: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6295: } else { 6296: y = XEiJ.regPC; 6297: XEiJ.regPC = y + 2; 6298: y = XEiJ.busRbs (y + 1); //pcbs 6299: } 6300: if (ea < XEiJ.EA_AR) { //BSET.L #<data>,Dr 6301: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6302: XEiJ.mpuCycleCount += (char) y != 0 ? 10 : 12; //(0xffff&y)!=0 6303: } else { //BSET.B #<data>,<ea> 6304: XEiJ.mpuCycleCount += 12; 6305: int a = efaMltByte (ea); 6306: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) | (y = 1 << (y & 7))); 6307: } 6308: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6309: } //irpBsetImm 6310: 6311: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6312: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6313: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6314: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6315: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 6316: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 6317: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 6318: public static void irpEoriByte () throws M68kException { 6319: int ea = XEiJ.regOC & 63; 6320: int z; 6321: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6322: z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6323: } else { 6324: z = XEiJ.regPC; 6325: XEiJ.regPC = z + 2; 6326: z = XEiJ.busRbs (z + 1); //pcbs 6327: } 6328: if (ea < XEiJ.EA_AR) { //EORI.B #<data>,Dr 6329: XEiJ.mpuCycleCount += 8; 6330: z = XEiJ.regRn[ea] ^= 255 & z; //0拡張してからEOR 6331: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6332: } else if (ea == XEiJ.EA_IM) { //EORI.B #<data>,CCR 6333: XEiJ.mpuCycleCount += 20; 6334: XEiJ.regCCR ^= XEiJ.REG_CCR_MASK & z; 6335: } else { //EORI.B #<data>,<mem> 6336: XEiJ.mpuCycleCount += 12; 6337: int a = efaMltByte (ea); 6338: XEiJ.busWb (a, z ^= XEiJ.busRbs (a)); 6339: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6340: } 6341: } //irpEoriByte 6342: 6343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6344: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6345: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6346: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6347: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 6348: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 6349: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 6350: public static void irpEoriWord () throws M68kException { 6351: int ea = XEiJ.regOC & 63; 6352: if (ea < XEiJ.EA_AR) { //EORI.W #<data>,Dr 6353: int z; 6354: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6355: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6356: } else { 6357: z = XEiJ.regPC; 6358: XEiJ.regPC = z + 2; 6359: z = XEiJ.busRwse (z); //pcws 6360: } 6361: XEiJ.mpuCycleCount += 8; 6362: z = XEiJ.regRn[ea] ^= (char) z; //0拡張してからEOR 6363: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6364: } else if (ea == XEiJ.EA_IM) { //EORI.W #<data>,SR 6365: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6366: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6367: throw M68kException.m6eSignal; 6368: } 6369: //以下はスーパーバイザモード 6370: XEiJ.mpuCycleCount += 20; 6371: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6372: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 6373: } else { 6374: int t = XEiJ.regPC; 6375: XEiJ.regPC = t + 2; 6376: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ XEiJ.busRwse (t)); //pcws。特権違反チェックが先 6377: } 6378: } else { //EORI.W #<data>,<mem> 6379: int z; 6380: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6381: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6382: } else { 6383: z = XEiJ.regPC; 6384: XEiJ.regPC = z + 2; 6385: z = XEiJ.busRwse (z); //pcws 6386: } 6387: XEiJ.mpuCycleCount += 12; 6388: int a = efaMltWord (ea); 6389: XEiJ.busWw (a, z ^= XEiJ.busRws (a)); 6390: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6391: } 6392: } //irpEoriWord 6393: 6394: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6395: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6396: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6398: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 6399: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 6400: public static void irpEoriLong () throws M68kException { 6401: int ea = XEiJ.regOC & 63; 6402: int y; 6403: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6404: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6405: } else { 6406: y = XEiJ.regPC; 6407: XEiJ.regPC = y + 4; 6408: y = XEiJ.busRlse (y); //pcls 6409: } 6410: int z; 6411: if (ea < XEiJ.EA_AR) { //EORI.L #<data>,Dr 6412: XEiJ.mpuCycleCount += 16; 6413: z = XEiJ.regRn[ea] ^= y; 6414: } else { //EORI.L #<data>,<mem> 6415: XEiJ.mpuCycleCount += 20; 6416: int a = efaMltLong (ea); 6417: XEiJ.busWl (a, z = XEiJ.busRls (a) ^ y); 6418: } 6419: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 6420: } //irpEoriLong 6421: 6422: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6423: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6424: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6425: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6426: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 6427: public static void irpCasByte () throws M68kException { 6428: int w; 6429: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6430: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 6431: } else { 6432: w = XEiJ.regPC; 6433: XEiJ.regPC = w + 2; 6434: w = XEiJ.busRwze (w); //pcwz。拡張ワード 6435: } 6436: if ((w & ~0b0000_000_111_000_111) != 0) { 6437: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6438: throw M68kException.m6eSignal; 6439: } 6440: int c = w & 7; 6441: int y = (byte) XEiJ.regRn[c]; //y=Dc 6442: int a = efaMltByte (XEiJ.regOC & 63); 6443: int x = XEiJ.busRbs (a); //x=<ea> 6444: int z = (byte) (x - y); //z=<ea>-Dc 6445: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6446: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6447: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6448: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6449: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6450: if (z == 0) { //<ea>==Dc 6451: XEiJ.mpuCycleCount += 16; 6452: XEiJ.busWb (a, XEiJ.regRn[w >> 6]); //Du→<ea> 6453: } else { //<ea>!=Dc 6454: XEiJ.mpuCycleCount += 12; 6455: XEiJ.regRn[c] = ~0xff & XEiJ.regRn[c] | 0xff & x; //<ea>→Dc 6456: } 6457: } //irpCasByte 6458: 6459: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6460: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6461: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6462: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6463: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 6464: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 6465: public static void irpCmpiByte () throws M68kException { 6466: XEiJ.mpuCycleCount += 8; 6467: int ea = XEiJ.regOC & 63; 6468: int x; 6469: int y; 6470: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6471: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6472: } else { 6473: y = XEiJ.regPC; 6474: XEiJ.regPC = y + 2; 6475: y = XEiJ.busRbs (y + 1); //pcbs 6476: } 6477: int z = (byte) ((x = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaMemByte (ea))) - y); //アドレッシングモードに注意 6478: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6479: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6480: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6481: } //irpCmpiByte 6482: 6483: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6484: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6485: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6486: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6487: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 6488: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 6489: public static void irpCmpiWord () throws M68kException { 6490: XEiJ.mpuCycleCount += 8; 6491: int ea = XEiJ.regOC & 63; 6492: int x; 6493: int y; 6494: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6495: y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6496: } else { 6497: y = XEiJ.regPC; 6498: XEiJ.regPC = y + 2; 6499: y = XEiJ.busRwse (y); //pcws 6500: } 6501: int z = (short) ((x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaMemWord (ea))) - y); //アドレッシングモードに注意 6502: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6503: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6504: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6505: } //irpCmpiWord 6506: 6507: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6508: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6509: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6510: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6511: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 6512: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 6513: public static void irpCmpiLong () throws M68kException { 6514: int ea = XEiJ.regOC & 63; 6515: int x; 6516: int y; 6517: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6518: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6519: } else { 6520: y = XEiJ.regPC; 6521: XEiJ.regPC = y + 4; 6522: y = XEiJ.busRlse (y); //pcls 6523: } 6524: int z; 6525: if (ea < XEiJ.EA_AR) { //CMPI.L #<data>,Dr 6526: XEiJ.mpuCycleCount += 14; 6527: z = (x = XEiJ.regRn[ea]) - y; 6528: } else { //CMPI.L #<data>,<mem> 6529: XEiJ.mpuCycleCount += 12; 6530: z = (x = XEiJ.busRls (efaMemLong (ea))) - y; //アドレッシングモードに注意 6531: } 6532: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6533: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6534: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6535: } //irpCmpiLong 6536: 6537: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6538: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6539: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6540: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6541: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6542: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6543: public static void irpCasWord () throws M68kException { 6544: int ea = XEiJ.regOC & 63; 6545: if (ea == XEiJ.EA_IM) { //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6546: int w; 6547: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6548: w = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6549: } else { 6550: w = XEiJ.regPC; 6551: XEiJ.regPC = w + 4; 6552: w = XEiJ.busRlse (w); //pcls 6553: } 6554: if ((w & ~0b1111_000_111_000_111_1111_000_111_000_111) != 0) { 6555: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6556: throw M68kException.m6eSignal; 6557: } 6558: int c1 = w >>> 16 & 7; 6559: int c2 = w & 7; 6560: int a1 = XEiJ.regRn[w >>> 16 + 12 ]; //a1=Rn1 6561: int a2 = XEiJ.regRn[w >>> 12 & 15]; //a2=Rn2 6562: int x1 = XEiJ.busRws (a1); //x1=(Rn1) 6563: int x2 = XEiJ.busRws (a2); //x2=(Rn2) 6564: int y = (short) XEiJ.regRn[c1]; //y=Dc1 6565: int z = (short) (x1 - y); //z=(Rn1)-Dc1 6566: if (z == 0) { //(Rn1)==Dc1 6567: y = (short) XEiJ.regRn[c2]; //y=Dc2 6568: z = (short) (x2 - y); //z=(Rn2)-Dc2 6569: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6570: ((x2 ^ y) & (x2 ^ z)) >>> 31 << 1 | 6571: (x2 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6572: if (z == 0) { //(Rn1)==Dc1&&(Rn2)==Dc2 6573: XEiJ.mpuCycleCount += 28; 6574: XEiJ.busWw (a1, XEiJ.regRn[w >>> 16 + 6 & 7]); //Du1→(Rn1) 6575: XEiJ.busWw (a2, XEiJ.regRn[w >>> 6 & 7]); //Du2→(Rn2) 6576: } else { //(Rn1)==Dc1&&(Rn2)!=Dc2 6577: XEiJ.mpuCycleCount += 20; 6578: XEiJ.regRn[c1] = ~0xffff & XEiJ.regRn[c1] | (char) x1; //(Rn1)→Dc1 6579: XEiJ.regRn[c2] = ~0xffff & XEiJ.regRn[c2] | (char) x2; //(Rn2)→Dc2 6580: } 6581: } else { //(Rn1)!=Dc1 6582: XEiJ.mpuCycleCount += 20; 6583: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6584: ((x1 ^ y) & (x1 ^ z)) >>> 31 << 1 | 6585: (x1 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6586: XEiJ.regRn[c1] = ~0xffff & XEiJ.regRn[c1] | (char) x1; //(Rn1)→Dc1 6587: XEiJ.regRn[c2] = ~0xffff & XEiJ.regRn[c2] | (char) x2; //(Rn2)→Dc2 6588: } 6589: } else { //CAS.W Dc,Du,<ea> 6590: int w; 6591: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6592: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6593: } else { 6594: w = XEiJ.regPC; 6595: XEiJ.regPC = w + 2; 6596: w = XEiJ.busRwze (w); //pcwz 6597: } 6598: if ((w & ~0b0000_000_111_000_111) != 0) { 6599: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6600: throw M68kException.m6eSignal; 6601: } 6602: int c = w & 7; 6603: int y = (short) XEiJ.regRn[c]; //y=Dc 6604: int a = efaMltWord (ea); //a=ea 6605: int x = XEiJ.busRws (a); //x=<ea> 6606: int z = (short) (x - y); //z=<ea>-Dc 6607: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6608: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6609: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6610: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6611: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6612: if (z == 0) { //<ea>==Dc 6613: XEiJ.mpuCycleCount += 16; 6614: XEiJ.busWw (a, XEiJ.regRn[w >> 6]); //Du→<ea> 6615: } else { //<ea>!=Dc 6616: XEiJ.mpuCycleCount += 12; 6617: XEiJ.regRn[c] = ~0xffff & XEiJ.regRn[c] | (char) x; //<ea>→Dc 6618: } 6619: } 6620: } //irpCasWord 6621: 6622: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6623: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6624: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6625: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6626: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 6627: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 6628: // 6629: //MOVES.B <ea>,Rn 6630: // MOVES.B <ea>,DnはDnの最下位バイトだけ更新する 6631: // MOVES.B <ea>,Anはバイトデータをロングに符号拡張してAnの全体を更新する 6632: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6633: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6634: // 6635: //MOVES.B Rn,<ea> 6636: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6637: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6638: public static void irpMovesByte () throws M68kException { 6639: int w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6640: if (w << -11 != 0) { 6641: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6642: throw M68kException.m6eSignal; 6643: } 6644: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6645: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6646: throw M68kException.m6eSignal; 6647: } 6648: //以下はスーパーバイザモード 6649: XEiJ.mpuCycleCount += 4; 6650: int a = efaMltByte (XEiJ.regOC & 63); 6651: int n = w >>> 12; //n 6652: if (w << 31 - 11 >= 0) { //MOVES.B <ea>,Rn。リード 6653: MemoryMappedDevice[] mm; 6654: if (XEiJ.mpuSFC == 1 || XEiJ.mpuSFC == 2) { //ユーザモード 6655: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6656: } else if (XEiJ.mpuSFC == 5 || XEiJ.mpuSFC == 6) { //スーパーバイザモード 6657: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6658: } else { //CPU空間などは不可 6659: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_READ; 6660: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6661: M68kException.m6eAddress = a; 6662: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6663: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6664: throw M68kException.m6eSignal; 6665: } 6666: if (n < 8) { //MOVES.B <ea>,Dn 6667: XEiJ.regRn[n] = XEiJ.regRn[n] & ~255 | mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6668: } else { //MOVES.B <ea>,An 6669: XEiJ.regRn[n] = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a); 6670: } 6671: } else { //MOVES.B Rn,<ea>。ライト 6672: MemoryMappedDevice[] mm; 6673: if (XEiJ.mpuDFC == 1 || XEiJ.mpuDFC == 2) { //ユーザモード 6674: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6675: } else if (XEiJ.mpuDFC == 5 || XEiJ.mpuDFC == 6) { //スーパーバイザモード 6676: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6677: } else { //CPU空間などは不可 6678: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE; 6679: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6680: M68kException.m6eAddress = a; 6681: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6682: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6683: throw M68kException.m6eSignal; 6684: } 6685: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, XEiJ.regRn[n]); 6686: } 6687: } //irpMovesByte 6688: 6689: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6690: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6691: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6692: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6693: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 6694: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 6695: // 6696: //MOVES.W <ea>,Rn 6697: // MOVES.W <ea>,DnはDnの下位ワードだけ更新する 6698: // MOVES.W <ea>,Anはワードデータをロングに符号拡張してAnの全体を更新する 6699: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6700: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6701: // 6702: //MOVES.W Rn,<ea> 6703: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6704: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6705: public static void irpMovesWord () throws M68kException { 6706: int w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6707: if (w << -11 != 0) { 6708: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6709: throw M68kException.m6eSignal; 6710: } 6711: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6712: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6713: throw M68kException.m6eSignal; 6714: } 6715: //以下はスーパーバイザモード 6716: XEiJ.mpuCycleCount += 4; 6717: int a = efaMltWord (XEiJ.regOC & 63); 6718: int n = w >>> 12; //n 6719: if (w << 31 - 11 >= 0) { //MOVES.W <ea>,Rn。リード 6720: MemoryMappedDevice[] mm; 6721: if (XEiJ.mpuSFC == 1 || XEiJ.mpuSFC == 2) { //ユーザモード 6722: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6723: } else if (XEiJ.mpuSFC == 5 || XEiJ.mpuSFC == 6) { //スーパーバイザモード 6724: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6725: } else { //CPU空間などは不可 6726: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_READ; 6727: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6728: M68kException.m6eAddress = a; 6729: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6730: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6731: throw M68kException.m6eSignal; 6732: } 6733: int z; 6734: if ((a & 1) == 0) { //偶数 6735: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6736: } else { //奇数 6737: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a) << 8; 6738: a++; 6739: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6740: } 6741: if (n < 8) { //MOVES.W <ea>,Dn 6742: XEiJ.regRn[n] = XEiJ.regRn[n] & ~65535 | z; 6743: } else { //MOVES.W <ea>,An 6744: XEiJ.regRn[n] = (short) z; 6745: } 6746: } else { //MOVES.W Rn,<ea>。ライト 6747: MemoryMappedDevice[] mm; 6748: if (XEiJ.mpuDFC == 1 || XEiJ.mpuDFC == 2) { //ユーザモード 6749: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6750: } else if (XEiJ.mpuDFC == 5 || XEiJ.mpuDFC == 6) { //スーパーバイザモード 6751: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6752: } else { //CPU空間などは不可 6753: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE; 6754: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6755: M68kException.m6eAddress = a; 6756: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6757: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6758: throw M68kException.m6eSignal; 6759: } 6760: int z = XEiJ.regRn[n]; 6761: if ((a & 1) == 0) { //偶数 6762: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6763: } else { //奇数 6764: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 8); 6765: a++; 6766: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6767: } 6768: } 6769: } //irpMovesWord 6770: 6771: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6772: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6773: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6774: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6775: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 6776: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 6777: // 6778: //MOVES.L <ea>,Rn 6779: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6780: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6781: // 6782: //MOVES.L Rn,<ea> 6783: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6784: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6785: public static void irpMovesLong () throws M68kException { 6786: int w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6787: if (w << -11 != 0) { 6788: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6789: throw M68kException.m6eSignal; 6790: } 6791: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6792: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6793: throw M68kException.m6eSignal; 6794: } 6795: //以下はスーパーバイザモード 6796: XEiJ.mpuCycleCount += 4; 6797: int a = efaMltLong (XEiJ.regOC & 63); 6798: int n = w >>> 12; //n 6799: if (w << 31 - 11 >= 0) { //MOVES.L <ea>,Rn。リード 6800: MemoryMappedDevice[] mm; 6801: if (XEiJ.mpuSFC == 1 || XEiJ.mpuSFC == 2) { //ユーザモード 6802: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6803: } else if (XEiJ.mpuSFC == 5 || XEiJ.mpuSFC == 6) { //スーパーバイザモード 6804: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6805: } else { //CPU空間などは不可 6806: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_READ; 6807: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6808: M68kException.m6eAddress = a; 6809: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6810: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6811: throw M68kException.m6eSignal; 6812: } 6813: int z; 6814: if ((a & 3) == 0) { //4の倍数 6815: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 6816: } else if ((a & 1) == 0) { //4の倍数+2 6817: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a) << 16; 6818: a += 2; 6819: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6820: } else { //奇数 6821: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a) << 24; 6822: a++; 6823: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a) << 8; 6824: a += 2; 6825: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6826: } 6827: XEiJ.regRn[n] = z; 6828: } else { //MOVES.L Rn,<ea>。ライト 6829: MemoryMappedDevice[] mm; 6830: if (XEiJ.mpuDFC == 1 || XEiJ.mpuDFC == 2) { //ユーザモード 6831: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6832: } else if (XEiJ.mpuDFC == 5 || XEiJ.mpuDFC == 6) { //スーパーバイザモード 6833: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6834: } else { //CPU空間などは不可 6835: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE; 6836: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6837: M68kException.m6eAddress = a; 6838: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6839: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6840: throw M68kException.m6eSignal; 6841: } 6842: int z = XEiJ.regRn[n]; 6843: if ((a & 3) == 0) { //4の倍数 6844: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, z); 6845: } else if ((a & 1) == 0) { //4の倍数+2 6846: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 16); 6847: a += 2; 6848: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6849: } else { //奇数 6850: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 24); 6851: a++; 6852: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 8); 6853: a += 2; 6854: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6855: } 6856: } 6857: } //irpMovesLong 6858: 6859: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6860: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6861: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6862: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6863: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6864: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6865: public static void irpCasLong () throws M68kException { 6866: int ea = XEiJ.regOC & 63; 6867: if (ea == XEiJ.EA_IM) { //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6868: int w; 6869: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6870: w = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6871: } else { 6872: w = XEiJ.regPC; 6873: XEiJ.regPC = w + 4; 6874: w = XEiJ.busRlse (w); //pcls 6875: } 6876: if ((w & ~0b1111_000_111_000_111_1111_000_111_000_111) != 0) { 6877: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6878: throw M68kException.m6eSignal; 6879: } 6880: int c1 = w >>> 16 & 7; 6881: int c2 = w & 7; 6882: int a1 = XEiJ.regRn[w >>> 16 + 12 ]; //a1=Rn1 6883: int a2 = XEiJ.regRn[w >>> 12 & 15]; //a2=Rn2 6884: int x1 = XEiJ.busRls (a1); //x1=(Rn1) 6885: int x2 = XEiJ.busRls (a2); //x2=(Rn2) 6886: int y = XEiJ.regRn[c1]; //y=Dc1 6887: int z = x1 - y; //z=(Rn1)-Dc1 6888: if (z == 0) { //(Rn1)==Dc1 6889: y = XEiJ.regRn[c2]; //y=Dc2 6890: z = x2 - y; //z=(Rn2)-Dc2 6891: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6892: ((x2 ^ y) & (x2 ^ z)) >>> 31 << 1 | 6893: (x2 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6894: if (z == 0) { //(Rn1)==Dc1&&(Rn2)==Dc2 6895: XEiJ.mpuCycleCount += 44; 6896: XEiJ.busWl (a1, XEiJ.regRn[w >>> 16 + 6 & 7]); //Du1→(Rn1) 6897: XEiJ.busWl (a2, XEiJ.regRn[w >>> 6 & 7]); //Du2→(Rn2) 6898: } else { //(Rn1)==Dc1&&(Rn2)!=Dc2 6899: XEiJ.mpuCycleCount += 28; 6900: XEiJ.regRn[c1] = x1; //(Rn1)→Dc1 6901: XEiJ.regRn[c2] = x2; //(Rn2)→Dc2 6902: } 6903: } else { //(Rn1)!=Dc1 6904: XEiJ.mpuCycleCount += 28; 6905: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6906: ((x1 ^ y) & (x1 ^ z)) >>> 31 << 1 | 6907: (x1 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6908: XEiJ.regRn[c1] = x1; //(Rn1)→Dc1 6909: XEiJ.regRn[c2] = x2; //(Rn2)→Dc2 6910: } 6911: } else { //CAS.L Dc,Du,<ea> 6912: int w; 6913: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6914: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6915: } else { 6916: w = XEiJ.regPC; 6917: XEiJ.regPC = w + 2; 6918: w = XEiJ.busRwze (w); //pcwz 6919: } 6920: if ((w & ~0b0000_000_111_000_111) != 0) { 6921: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6922: throw M68kException.m6eSignal; 6923: } 6924: int c = w & 7; 6925: int y = XEiJ.regRn[c]; //y=Dc 6926: int a = efaMltLong (ea); //a=ea 6927: int x = XEiJ.busRls (a); //x=<ea> 6928: int z = x - y; //z=<ea>-Dc 6929: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6930: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6931: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6932: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6933: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6934: if (z == 0) { //<ea>==Dc 6935: XEiJ.mpuCycleCount += 24; 6936: XEiJ.busWl (a, XEiJ.regRn[w >> 6]); //Du→<ea> 6937: } else { //<ea>!=Dc 6938: XEiJ.mpuCycleCount += 16; 6939: XEiJ.regRn[c] = x; //<ea>→Dc 6940: } 6941: } 6942: } //irpCasLong 6943: 6944: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6945: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6946: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6947: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6948: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 6949: public static void irpMoveToDRByte () throws M68kException { 6950: XEiJ.mpuCycleCount += 4; 6951: int ea = XEiJ.regOC & 63; 6952: int qqq = XEiJ.regOC >> 9 & 7; 6953: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 6954: XEiJ.regRn[qqq] = ~255 & XEiJ.regRn[qqq] | 255 & z; 6955: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6956: } //irpMoveToDRByte 6957: 6958: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6959: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6960: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6962: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 6963: public static void irpMoveToMMByte () throws M68kException { 6964: XEiJ.mpuCycleCount += 8; 6965: int ea = XEiJ.regOC & 63; 6966: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 6967: XEiJ.busWb (XEiJ.regRn[XEiJ.regOC >> 9], z); //1qqq=aqq 6968: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6969: } //irpMoveToMMByte 6970: 6971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6972: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6973: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6974: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6975: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 6976: public static void irpMoveToMPByte () throws M68kException { 6977: XEiJ.mpuCycleCount += 8; 6978: int ea = XEiJ.regOC & 63; 6979: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 6980: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 6981: XEiJ.busWb (aqq < 15 ? XEiJ.regRn[aqq]++ : (XEiJ.regRn[15] += 2) - 2, z); 6982: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6983: } //irpMoveToMPByte 6984: 6985: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6986: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6987: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6988: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6989: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 6990: public static void irpMoveToMNByte () throws M68kException { 6991: XEiJ.mpuCycleCount += 8; 6992: int ea = XEiJ.regOC & 63; 6993: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 6994: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 6995: XEiJ.busWb (aqq < 15 ? --XEiJ.regRn[aqq] : (XEiJ.regRn[15] -= 2), z); 6996: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6997: } //irpMoveToMNByte 6998: 6999: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7000: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7001: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7002: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7003: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 7004: public static void irpMoveToMWByte () throws M68kException { 7005: XEiJ.mpuCycleCount += 12; 7006: int ea = XEiJ.regOC & 63; 7007: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 7008: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 7009: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7010: XEiJ.busWb (XEiJ.regRn[aqq] //ベースレジスタ 7011: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws。ワードディスプレースメント 7012: z); 7013: } else { 7014: int t = XEiJ.regPC; 7015: XEiJ.regPC = t + 2; 7016: XEiJ.busWb (XEiJ.regRn[aqq] //ベースレジスタ 7017: + XEiJ.busRwse (t), //pcws。ワードディスプレースメント 7018: z); 7019: } 7020: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7021: } //irpMoveToMWByte 7022: 7023: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7024: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7025: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7026: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7027: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 7028: public static void irpMoveToMXByte () throws M68kException { 7029: XEiJ.mpuCycleCount += 14; 7030: int ea = XEiJ.regOC & 63; 7031: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 7032: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 7033: int w; 7034: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7035: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 7036: } else { 7037: w = XEiJ.regPC; 7038: XEiJ.regPC = w + 2; 7039: w = XEiJ.busRwze (w); //pcwz。拡張ワード 7040: } 7041: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 7042: int t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 7043: XEiJ.regRn[aqq]) //ベースレジスタ 7044: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 7045: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 7046: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 7047: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 7048: int x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 7049: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7050: XEiJ.regRn[w >> 12]) //ロングインデックス 7051: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 7052: XEiJ.busWb ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 7053: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 7054: XEiJ.busRls (t) + x) //ポストインデックス 7055: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 7056: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 7057: XEiJ.busRlse ((XEiJ.regPC += 4) - 4)), //pcls。ロングアウタディスプレースメント 7058: z); 7059: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7060: } //irpMoveToMXByte 7061: 7062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7063: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7064: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7065: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7066: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 7067: public static void irpMoveToZWByte () throws M68kException { 7068: XEiJ.mpuCycleCount += 12; 7069: int ea = XEiJ.regOC & 63; 7070: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 7071: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7072: XEiJ.busWb (XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws 7073: z); 7074: } else { 7075: int t = XEiJ.regPC; 7076: XEiJ.regPC = t + 2; 7077: XEiJ.busWb (XEiJ.busRwse (t), //pcws 7078: z); 7079: } 7080: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7081: } //irpMoveToZWByte 7082: 7083: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7084: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7085: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7086: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7087: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 7088: public static void irpMoveToZLByte () throws M68kException { 7089: XEiJ.mpuCycleCount += 16; 7090: int ea = XEiJ.regOC & 63; 7091: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 7092: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7093: XEiJ.busWb (XEiJ.busRlse ((XEiJ.regPC += 4) - 4), //pcls 7094: z); 7095: } else { 7096: int t = XEiJ.regPC; 7097: XEiJ.regPC = t + 4; 7098: XEiJ.busWb (XEiJ.busRlse (t), //pcls 7099: z); 7100: } 7101: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7102: } //irpMoveToZLByte 7103: 7104: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7105: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7106: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7107: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7108: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 7109: public static void irpMoveToDRLong () throws M68kException { 7110: XEiJ.mpuCycleCount += 4; 7111: int ea = XEiJ.regOC & 63; 7112: int z; 7113: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7114: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7115: } //irpMoveToDRLong 7116: 7117: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7118: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7119: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7120: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7121: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 7122: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 7123: public static void irpMoveaLong () throws M68kException { 7124: XEiJ.mpuCycleCount += 4; 7125: int ea = XEiJ.regOC & 63; 7126: XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7127: } //irpMoveaLong 7128: 7129: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7130: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7131: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7132: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7133: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 7134: public static void irpMoveToMMLong () throws M68kException { 7135: XEiJ.mpuCycleCount += 12; 7136: int ea = XEiJ.regOC & 63; 7137: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7138: XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)], z); 7139: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7140: } //irpMoveToMMLong 7141: 7142: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7143: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7144: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7145: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7146: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 7147: public static void irpMoveToMPLong () throws M68kException { 7148: XEiJ.mpuCycleCount += 12; 7149: int ea = XEiJ.regOC & 63; 7150: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7151: XEiJ.busWl ((XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] += 4) - 4, z); 7152: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7153: } //irpMoveToMPLong 7154: 7155: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7156: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7157: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7158: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7159: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 7160: public static void irpMoveToMNLong () throws M68kException { 7161: XEiJ.mpuCycleCount += 12; 7162: int ea = XEiJ.regOC & 63; 7163: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7164: XEiJ.busWl ((XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] -= 4), z); 7165: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7166: } //irpMoveToMNLong 7167: 7168: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7169: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7170: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7171: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7172: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 7173: public static void irpMoveToMWLong () throws M68kException { 7174: XEiJ.mpuCycleCount += 16; 7175: int ea = XEiJ.regOC & 63; 7176: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7177: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7178: XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] //ベースレジスタ 7179: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws。ワードディスプレースメント 7180: z); 7181: } else { 7182: int t = XEiJ.regPC; 7183: XEiJ.regPC = t + 2; 7184: XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] //ベースレジスタ 7185: + XEiJ.busRwse (t), //pcws。ワードディスプレースメント 7186: z); 7187: } 7188: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7189: } //irpMoveToMWLong 7190: 7191: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7192: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7193: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7194: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7195: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 7196: public static void irpMoveToMXLong () throws M68kException { 7197: XEiJ.mpuCycleCount += 18; 7198: int ea = XEiJ.regOC & 63; 7199: int aqq = (XEiJ.regOC >> 9) - (16 - 8); 7200: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7201: int w; 7202: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7203: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 7204: } else { 7205: w = XEiJ.regPC; 7206: XEiJ.regPC = w + 2; 7207: w = XEiJ.busRwze (w); //pcwz。拡張ワード 7208: } 7209: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 7210: int t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 7211: XEiJ.regRn[aqq]) //ベースレジスタ 7212: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 7213: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 7214: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 7215: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 7216: int x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 7217: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7218: XEiJ.regRn[w >> 12]) //ロングインデックス 7219: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 7220: XEiJ.busWl ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 7221: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 7222: XEiJ.busRls (t) + x) //ポストインデックス 7223: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 7224: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 7225: XEiJ.busRlse ((XEiJ.regPC += 4) - 4)), //pcls。ロングアウタディスプレースメント 7226: z); 7227: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7228: } //irpMoveToMXLong 7229: 7230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7231: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7232: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7233: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7234: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 7235: public static void irpMoveToZWLong () throws M68kException { 7236: XEiJ.mpuCycleCount += 16; 7237: int ea = XEiJ.regOC & 63; 7238: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7239: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7240: XEiJ.busWl (XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws 7241: z); 7242: } else { 7243: int t = XEiJ.regPC; 7244: XEiJ.regPC = t + 2; 7245: XEiJ.busWl (XEiJ.busRwse (t), //pcws 7246: z); 7247: } 7248: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7249: } //irpMoveToZWLong 7250: 7251: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7252: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7253: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7254: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7255: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 7256: public static void irpMoveToZLLong () throws M68kException { 7257: XEiJ.mpuCycleCount += 20; 7258: int ea = XEiJ.regOC & 63; 7259: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7260: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7261: XEiJ.busWl (XEiJ.busRlse ((XEiJ.regPC += 4) - 4), //pcls 7262: z); 7263: } else { 7264: int t = XEiJ.regPC; 7265: XEiJ.regPC = t + 4; 7266: XEiJ.busWl (XEiJ.busRlse (t), //pcls 7267: z); 7268: } 7269: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7270: } //irpMoveToZLLong 7271: 7272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7273: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7274: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7275: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7276: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 7277: public static void irpMoveToDRWord () throws M68kException { 7278: XEiJ.mpuCycleCount += 4; 7279: int ea = XEiJ.regOC & 63; 7280: int qqq = XEiJ.regOC >> 9 & 7; 7281: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7282: XEiJ.regRn[qqq] = ~65535 & XEiJ.regRn[qqq] | (char) z; 7283: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7284: } //irpMoveToDRWord 7285: 7286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7287: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7288: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7290: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 7291: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 7292: // 7293: //MOVEA.W <ea>,Aq 7294: // ワードデータをロングに符号拡張してAqの全体を更新する 7295: public static void irpMoveaWord () throws M68kException { 7296: XEiJ.mpuCycleCount += 4; 7297: int ea = XEiJ.regOC & 63; 7298: XEiJ.regRn[XEiJ.regOC >> 9 & 15] = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //符号拡張して32bit全部書き換える。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7299: } //irpMoveaWord 7300: 7301: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7302: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7303: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7304: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7305: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 7306: public static void irpMoveToMMWord () throws M68kException { 7307: XEiJ.mpuCycleCount += 8; 7308: int ea = XEiJ.regOC & 63; 7309: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7310: XEiJ.busWw (XEiJ.regRn[XEiJ.regOC >> 9 & 15], z); 7311: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7312: } //irpMoveToMMWord 7313: 7314: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7315: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7316: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7317: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7318: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 7319: public static void irpMoveToMPWord () throws M68kException { 7320: XEiJ.mpuCycleCount += 8; 7321: int ea = XEiJ.regOC & 63; 7322: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7323: XEiJ.busWw ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 2) - 2, z); 7324: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7325: } //irpMoveToMPWord 7326: 7327: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7328: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7329: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7330: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7331: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 7332: public static void irpMoveToMNWord () throws M68kException { 7333: XEiJ.mpuCycleCount += 8; 7334: int ea = XEiJ.regOC & 63; 7335: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7336: XEiJ.busWw ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2), z); 7337: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7338: } //irpMoveToMNWord 7339: 7340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7341: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7342: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7343: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7344: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 7345: public static void irpMoveToMWWord () throws M68kException { 7346: XEiJ.mpuCycleCount += 12; 7347: int ea = XEiJ.regOC & 63; 7348: int aqq = XEiJ.regOC >> 9 & 15; 7349: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7350: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7351: XEiJ.busWw (XEiJ.regRn[aqq] //ベースレジスタ 7352: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws。ワードディスプレースメント 7353: z); 7354: } else { 7355: int t = XEiJ.regPC; 7356: XEiJ.regPC = t + 2; 7357: XEiJ.busWw (XEiJ.regRn[aqq] //ベースレジスタ 7358: + XEiJ.busRwse (t), //pcws。ワードディスプレースメント 7359: z); 7360: } 7361: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7362: } //irpMoveToMWWord 7363: 7364: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7365: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7366: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7367: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7368: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 7369: public static void irpMoveToMXWord () throws M68kException { 7370: XEiJ.mpuCycleCount += 14; 7371: int ea = XEiJ.regOC & 63; 7372: int aqq = XEiJ.regOC >> 9 & 15; 7373: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7374: int w; 7375: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7376: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 7377: } else { 7378: w = XEiJ.regPC; 7379: XEiJ.regPC = w + 2; 7380: w = XEiJ.busRwze (w); //pcwz。拡張ワード 7381: } 7382: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 7383: int t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 7384: XEiJ.regRn[aqq]) //ベースレジスタ 7385: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 7386: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 7387: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 7388: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 7389: int x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 7390: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7391: XEiJ.regRn[w >> 12]) //ロングインデックス 7392: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 7393: XEiJ.busWw ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 7394: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 7395: XEiJ.busRls (t) + x) //ポストインデックス 7396: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 7397: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 7398: XEiJ.busRlse ((XEiJ.regPC += 4) - 4)), //pcls。ロングアウタディスプレースメント 7399: z); 7400: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7401: } //irpMoveToMXWord 7402: 7403: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7404: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7405: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7406: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7407: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 7408: public static void irpMoveToZWWord () throws M68kException { 7409: XEiJ.mpuCycleCount += 12; 7410: int ea = XEiJ.regOC & 63; 7411: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7412: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7413: XEiJ.busWw (XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws 7414: z); 7415: } else { 7416: int t = XEiJ.regPC; 7417: XEiJ.regPC = t + 2; 7418: XEiJ.busWw (XEiJ.busRwse (t), //pcws 7419: z); 7420: } 7421: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7422: } //irpMoveToZWWord 7423: 7424: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7425: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7426: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7427: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7428: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 7429: public static void irpMoveToZLWord () throws M68kException { 7430: XEiJ.mpuCycleCount += 16; 7431: int ea = XEiJ.regOC & 63; 7432: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7433: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7434: XEiJ.busWw (XEiJ.busRlse ((XEiJ.regPC += 4) - 4), //pcls 7435: z); 7436: } else { 7437: int t = XEiJ.regPC; 7438: XEiJ.regPC = t + 4; 7439: XEiJ.busWw (XEiJ.busRlse (t), //pcls 7440: z); 7441: } 7442: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7443: } //irpMoveToZLWord 7444: 7445: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7446: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7447: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7448: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7449: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 7450: public static void irpNegxByte () throws M68kException { 7451: int ea = XEiJ.regOC & 63; 7452: int y; 7453: int z; 7454: if (ea < XEiJ.EA_AR) { //NEGX.B Dr 7455: XEiJ.mpuCycleCount += 4; 7456: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y) - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 7457: } else { //NEGX.B <mem> 7458: XEiJ.mpuCycleCount += 8; 7459: int a = efaMltByte (ea); 7460: XEiJ.busWb (a, z = (byte) (-(y = XEiJ.busRbs (a)) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7461: } 7462: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7463: (y & z) >>> 31 << 1 | 7464: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7465: } //irpNegxByte 7466: 7467: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7468: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7469: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7470: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7471: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 7472: public static void irpNegxWord () throws M68kException { 7473: int ea = XEiJ.regOC & 63; 7474: int y; 7475: int z; 7476: if (ea < XEiJ.EA_AR) { //NEGX.W Dr 7477: XEiJ.mpuCycleCount += 4; 7478: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) (-(y = (short) y) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7479: } else { //NEGX.W <mem> 7480: XEiJ.mpuCycleCount += 8; 7481: int a = efaMltWord (ea); 7482: XEiJ.busWw (a, z = (short) (-(y = XEiJ.busRws (a)) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7483: } 7484: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7485: (y & z) >>> 31 << 1 | 7486: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7487: } //irpNegxWord 7488: 7489: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7490: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7491: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7492: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7493: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 7494: public static void irpNegxLong () throws M68kException { 7495: int ea = XEiJ.regOC & 63; 7496: int y; 7497: int z; 7498: if (ea < XEiJ.EA_AR) { //NEGX.L Dr 7499: XEiJ.mpuCycleCount += 6; 7500: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 7501: } else { //NEGX.L <mem> 7502: XEiJ.mpuCycleCount += 12; 7503: int a = efaMltLong (ea); 7504: XEiJ.busWl (a, z = -(y = XEiJ.busRls (a)) - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 7505: } 7506: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7507: (y & z) >>> 31 << 1 | 7508: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7509: } //irpNegxLong 7510: 7511: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7512: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7513: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7514: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7515: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 7516: public static void irpMoveFromSR () throws M68kException { 7517: //MC68010以上では特権命令 7518: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7519: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7520: throw M68kException.m6eSignal; 7521: } 7522: //以下はスーパーバイザモード 7523: int ea = XEiJ.regOC & 63; 7524: if (ea < XEiJ.EA_AR) { //MOVE.W SR,Dr 7525: XEiJ.mpuCycleCount += 6; 7526: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 7527: } else { //MOVE.W SR,<mem> 7528: XEiJ.mpuCycleCount += 8; 7529: XEiJ.busWw (efaMltWord (ea), XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR); 7530: } 7531: } //irpMoveFromSR 7532: 7533: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7534: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7535: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7536: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7537: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 7538: public static void irpChkLong () throws M68kException { 7539: XEiJ.mpuCycleCount += 14; 7540: int ea = XEiJ.regOC & 63; 7541: int x = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); 7542: int y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7543: int z = x - y; 7544: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 7545: (y < 0 ? XEiJ.REG_CCR_N : 0) | 7546: (y == 0 ? XEiJ.REG_CCR_Z : 0) | 7547: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 7548: (x & (y ^ z) ^ (y | z)) >>> 31); 7549: if (y < 0 || x < y) { 7550: XEiJ.mpuCycleCount += 40 - 14 - 34; 7551: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 7552: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7553: throw M68kException.m6eSignal; 7554: } 7555: } //irpChkLong 7556: 7557: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7558: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7559: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7560: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7561: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 7562: public static void irpChkWord () throws M68kException { 7563: XEiJ.mpuCycleCount += 10; 7564: int ea = XEiJ.regOC & 63; 7565: int x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); 7566: int y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7567: int z = (short) (x - y); 7568: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 7569: (y < 0 ? XEiJ.REG_CCR_N : 0) | 7570: (y == 0 ? XEiJ.REG_CCR_Z : 0) | 7571: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 7572: (x & (y ^ z) ^ (y | z)) >>> 31); 7573: if (y < 0 || x < y) { 7574: XEiJ.mpuCycleCount += 40 - 10 - 34; 7575: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 7576: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7577: throw M68kException.m6eSignal; 7578: } 7579: } //irpChkWord 7580: 7581: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7582: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7583: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7584: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7585: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 7586: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 7587: public static void irpLea () throws M68kException { 7588: int ea = XEiJ.regOC & 63; 7589: if (ea < XEiJ.EA_AR) { //EXTB.L Dr 7590: XEiJ.mpuCycleCount += 4; 7591: int z; 7592: XEiJ.regRn[ea] = z = (byte) XEiJ.regRn[ea]; 7593: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7594: } else { //LEA.L <ea>,Aq 7595: //XEiJ.mpuCycleCount += 4 - 4; 7596: XEiJ.regRn[(XEiJ.regOC >> 9) - (32 - 8)] = efaLeaPea (ea); 7597: } 7598: } //irpLea 7599: 7600: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7601: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7602: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7603: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7604: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 7605: public static void irpClrByte () throws M68kException { 7606: int ea = XEiJ.regOC & 63; 7607: if (ea < XEiJ.EA_AR) { //CLR.B Dr 7608: XEiJ.mpuCycleCount += 4; 7609: XEiJ.regRn[ea] &= ~0xff; 7610: } else { //CLR.B <mem> 7611: XEiJ.mpuCycleCount += 8; 7612: XEiJ.busWb (efaMltByte (ea), 0); 7613: } 7614: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7615: } //irpClrByte 7616: 7617: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7618: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7619: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7620: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7621: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 7622: public static void irpClrWord () throws M68kException { 7623: int ea = XEiJ.regOC & 63; 7624: if (ea < XEiJ.EA_AR) { //CLR.W Dr 7625: XEiJ.mpuCycleCount += 4; 7626: XEiJ.regRn[ea] &= ~0xffff; 7627: } else { //CLR.W <mem> 7628: XEiJ.mpuCycleCount += 8; 7629: XEiJ.busWw (efaMltWord (ea), 0); 7630: } 7631: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7632: } //irpClrWord 7633: 7634: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7635: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7636: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7637: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7638: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 7639: public static void irpClrLong () throws M68kException { 7640: int ea = XEiJ.regOC & 63; 7641: if (ea < XEiJ.EA_AR) { //CLR.L Dr 7642: XEiJ.mpuCycleCount += 6; 7643: XEiJ.regRn[ea] = 0; 7644: } else { //CLR.L <mem> 7645: XEiJ.mpuCycleCount += 12; 7646: XEiJ.busWl (efaMltLong (ea), 0); 7647: } 7648: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7649: } //irpClrLong 7650: 7651: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7652: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7653: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7654: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7655: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 7656: public static void irpMoveFromCCR () throws M68kException { 7657: int ea = XEiJ.regOC & 63; 7658: if (ea < XEiJ.EA_AR) { //MOVE.W CCR,Dr 7659: XEiJ.mpuCycleCount += 4; 7660: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regCCR; 7661: } else { //MOVE.W CCR,<mem> 7662: XEiJ.mpuCycleCount += 8; 7663: XEiJ.busWw (efaMltWord (ea), XEiJ.regCCR); 7664: } 7665: } //irpMoveFromCCR 7666: 7667: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7668: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7669: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7670: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7671: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 7672: public static void irpNegByte () throws M68kException { 7673: int ea = XEiJ.regOC & 63; 7674: int y; 7675: int z; 7676: if (ea < XEiJ.EA_AR) { //NEG.B Dr 7677: XEiJ.mpuCycleCount += 4; 7678: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y)); 7679: } else { //NEG.B <mem> 7680: XEiJ.mpuCycleCount += 8; 7681: int a = efaMltByte (ea); 7682: XEiJ.busWb (a, z = (byte) -(y = XEiJ.busRbs (a))); 7683: } 7684: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7685: (y & z) >>> 31 << 1 | 7686: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7687: } //irpNegByte 7688: 7689: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7690: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7691: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7692: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7693: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 7694: public static void irpNegWord () throws M68kException { 7695: int ea = XEiJ.regOC & 63; 7696: int y; 7697: int z; 7698: if (ea < XEiJ.EA_AR) { //NEG.W Dr 7699: XEiJ.mpuCycleCount += 4; 7700: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) -(y = (short) y)); 7701: } else { //NEG.W <mem> 7702: XEiJ.mpuCycleCount += 8; 7703: int a = efaMltWord (ea); 7704: XEiJ.busWw (a, z = (short) -(y = XEiJ.busRws (a))); 7705: } 7706: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7707: (y & z) >>> 31 << 1 | 7708: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7709: } //irpNegWord 7710: 7711: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7712: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7713: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7714: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7715: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 7716: public static void irpNegLong () throws M68kException { 7717: int ea = XEiJ.regOC & 63; 7718: int y; 7719: int z; 7720: if (ea < XEiJ.EA_AR) { //NEG.L Dr 7721: XEiJ.mpuCycleCount += 6; 7722: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]); 7723: } else { //NEG.L <mem> 7724: XEiJ.mpuCycleCount += 12; 7725: int a = efaMltLong (ea); 7726: XEiJ.busWl (a, z = -(y = XEiJ.busRls (a))); 7727: } 7728: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7729: (y & z) >>> 31 << 1 | 7730: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7731: } //irpNegLong 7732: 7733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7734: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7735: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7736: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7737: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 7738: public static void irpMoveToCCR () throws M68kException { 7739: XEiJ.mpuCycleCount += 12; 7740: int ea = XEiJ.regOC & 63; 7741: XEiJ.regCCR = XEiJ.REG_CCR_MASK & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea))); 7742: } //irpMoveToCCR 7743: 7744: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7745: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7746: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7747: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7748: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 7749: public static void irpNotByte () throws M68kException { 7750: int ea = XEiJ.regOC & 63; 7751: int z; 7752: if (ea < XEiJ.EA_AR) { //NOT.B Dr 7753: XEiJ.mpuCycleCount += 4; 7754: z = XEiJ.regRn[ea] ^= 255; //0拡張してからEOR 7755: } else { //NOT.B <mem> 7756: XEiJ.mpuCycleCount += 8; 7757: int a = efaMltByte (ea); 7758: XEiJ.busWb (a, z = ~XEiJ.busRbs (a)); 7759: } 7760: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7761: } //irpNotByte 7762: 7763: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7764: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7765: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7767: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 7768: public static void irpNotWord () throws M68kException { 7769: int ea = XEiJ.regOC & 63; 7770: int z; 7771: if (ea < XEiJ.EA_AR) { //NOT.W Dr 7772: XEiJ.mpuCycleCount += 4; 7773: z = XEiJ.regRn[ea] ^= 65535; //0拡張してからEOR 7774: } else { //NOT.W <mem> 7775: XEiJ.mpuCycleCount += 8; 7776: int a = efaMltWord (ea); 7777: XEiJ.busWw (a, z = ~XEiJ.busRws (a)); 7778: } 7779: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7780: } //irpNotWord 7781: 7782: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7783: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7784: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7785: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7786: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 7787: public static void irpNotLong () throws M68kException { 7788: int ea = XEiJ.regOC & 63; 7789: int z; 7790: if (ea < XEiJ.EA_AR) { //NOT.L Dr 7791: XEiJ.mpuCycleCount += 6; 7792: z = XEiJ.regRn[ea] ^= 0xffffffff; 7793: } else { //NOT.L <mem> 7794: XEiJ.mpuCycleCount += 12; 7795: int a = efaMltLong (ea); 7796: XEiJ.busWl (a, z = ~XEiJ.busRls (a)); 7797: } 7798: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7799: } //irpNotLong 7800: 7801: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7802: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7803: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7805: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 7806: public static void irpMoveToSR () throws M68kException { 7807: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7808: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7809: throw M68kException.m6eSignal; 7810: } 7811: //以下はスーパーバイザモード 7812: XEiJ.mpuCycleCount += 12; 7813: int ea = XEiJ.regOC & 63; 7814: irpSetSR (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea))); //特権違反チェックが先 7815: } //irpMoveToSR 7816: 7817: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7818: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7819: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7820: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7821: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 7822: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 7823: // 7824: //LINK.L Ar,#<data> 7825: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.L #<data>,A7と同じ 7826: // LINK.L A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 7827: public static void irpNbcd () throws M68kException { 7828: int ea = XEiJ.regOC & 63; 7829: if (ea < XEiJ.EA_AR) { //NBCD.B Dr 7830: XEiJ.mpuCycleCount += 6; 7831: XEiJ.regRn[ea] = ~0xff & XEiJ.regRn[ea] | irpSbcd (0, XEiJ.regRn[ea]); 7832: } else if (ea < XEiJ.EA_MM) { //LINK.L Ar,#<data> 7833: XEiJ.mpuCycleCount += 20; 7834: int arr = XEiJ.regOC - (0b0100_100_000_001_000 - 8); 7835: int sp = XEiJ.regRn[15] - 4; 7836: XEiJ.busWl (sp, XEiJ.regRn[arr]); //pushl 7837: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7838: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 7839: } else { 7840: int t = XEiJ.regPC; 7841: XEiJ.regPC = t + 4; 7842: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRlse (t); //pcls 7843: } 7844: } else { //NBCD.B <mem> 7845: XEiJ.mpuCycleCount += 8; 7846: int a = efaMltByte (ea); 7847: XEiJ.busWb (a, irpSbcd (0, XEiJ.busRbs (a))); 7848: } 7849: } //irpNbcd 7850: 7851: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7852: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7853: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7854: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7855: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 7856: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 7857: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 7858: public static void irpPea () throws M68kException { 7859: int ea = XEiJ.regOC & 63; 7860: if (ea < XEiJ.EA_AR) { //SWAP.W Dr 7861: XEiJ.mpuCycleCount += 4; 7862: int x; 7863: int z; 7864: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) << 16 | x >>> 16; 7865: //上位ワードと下位ワードを入れ替えた後のDrをロングでテストする 7866: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7867: } else { //PEA.L <ea> 7868: XEiJ.mpuCycleCount += 12 - 4; 7869: int a = efaLeaPea (ea); //BKPT #<data>はここでillegal instructionになる 7870: XEiJ.busWl (XEiJ.regRn[15] -= 4, a); //pushl。評価順序に注意。wl(r[15]-=4,eaz_leapea(ea))は不可 7871: } 7872: } //irpPea 7873: 7874: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7875: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7876: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7877: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7878: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 7879: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 7880: public static void irpMovemToMemWord () throws M68kException { 7881: int ea = XEiJ.regOC & 63; 7882: if (ea < XEiJ.EA_AR) { //EXT.W Dr 7883: XEiJ.mpuCycleCount += 4; 7884: int z; 7885: XEiJ.regRn[ea] = ~0xffff & (z = XEiJ.regRn[ea]) | (char) (z = (byte) z); 7886: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7887: } else { //MOVEM.W <list>,<ea> 7888: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 7889: XEiJ.regPC += 2; 7890: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 7891: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 7892: //転送するレジスタが0個のときArは変化しない 7893: int arr = ea - (XEiJ.EA_MN - 8); 7894: int a = XEiJ.regRn[arr]; 7895: XEiJ.regRn[arr] = a - 2; 7896: int t = a; 7897: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7898: if ((l & 0x0001) != 0) { 7899: XEiJ.busWw (a -= 2, XEiJ.regRn[15]); 7900: } 7901: if ((l & 0x0002) != 0) { 7902: XEiJ.busWw (a -= 2, XEiJ.regRn[14]); 7903: } 7904: if ((l & 0x0004) != 0) { 7905: XEiJ.busWw (a -= 2, XEiJ.regRn[13]); 7906: } 7907: if ((l & 0x0008) != 0) { 7908: XEiJ.busWw (a -= 2, XEiJ.regRn[12]); 7909: } 7910: if ((l & 0x0010) != 0) { 7911: XEiJ.busWw (a -= 2, XEiJ.regRn[11]); 7912: } 7913: if ((l & 0x0020) != 0) { 7914: XEiJ.busWw (a -= 2, XEiJ.regRn[10]); 7915: } 7916: if ((l & 0x0040) != 0) { 7917: XEiJ.busWw (a -= 2, XEiJ.regRn[ 9]); 7918: } 7919: if ((byte) l < 0) { //(l & 0x0080) != 0 7920: XEiJ.busWw (a -= 2, XEiJ.regRn[ 8]); 7921: } 7922: if ((l & 0x0100) != 0) { 7923: XEiJ.busWw (a -= 2, XEiJ.regRn[ 7]); 7924: } 7925: if ((l & 0x0200) != 0) { 7926: XEiJ.busWw (a -= 2, XEiJ.regRn[ 6]); 7927: } 7928: if ((l & 0x0400) != 0) { 7929: XEiJ.busWw (a -= 2, XEiJ.regRn[ 5]); 7930: } 7931: if ((l & 0x0800) != 0) { 7932: XEiJ.busWw (a -= 2, XEiJ.regRn[ 4]); 7933: } 7934: if ((l & 0x1000) != 0) { 7935: XEiJ.busWw (a -= 2, XEiJ.regRn[ 3]); 7936: } 7937: if ((l & 0x2000) != 0) { 7938: XEiJ.busWw (a -= 2, XEiJ.regRn[ 2]); 7939: } 7940: if ((l & 0x4000) != 0) { 7941: XEiJ.busWw (a -= 2, XEiJ.regRn[ 1]); 7942: } 7943: if ((short) l < 0) { //(l & 0x8000) != 0 7944: XEiJ.busWw (a -= 2, XEiJ.regRn[ 0]); 7945: } 7946: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 7947: for (int i = 15; i >= 0; i--) { 7948: if ((l & 0x8000 >>> i) != 0) { 7949: XEiJ.busWw (a -= 2, XEiJ.regRn[i]); 7950: } 7951: } 7952: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 7953: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 7954: for (int i = 15; l != 0; i--, l <<= 1) { 7955: if (l < 0) { 7956: XEiJ.busWw (a -= 2, XEiJ.regRn[i]); 7957: } 7958: } 7959: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 7960: for (int i = 15; l != 0; i--, l >>>= 1) { 7961: if ((l & 1) != 0) { 7962: XEiJ.busWw (a -= 2, XEiJ.regRn[i]); 7963: } 7964: } 7965: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 7966: for (int i = 15; l != 0; ) { 7967: int k = Integer.numberOfTrailingZeros (l); 7968: XEiJ.busWw (a -= 2, XEiJ.regRn[i -= k]); 7969: l = l >>> k & ~1; 7970: } 7971: } 7972: XEiJ.regRn[arr] = a; 7973: XEiJ.mpuCycleCount += 8 + (t - a << 1); //2バイト/個→4サイクル/個 7974: } else { //-(Ar)以外 7975: int a = efaCltWord (ea); 7976: int t = a; 7977: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7978: if ((l & 0x0001) != 0) { 7979: XEiJ.busWw (a, XEiJ.regRn[ 0]); 7980: a += 2; 7981: } 7982: if ((l & 0x0002) != 0) { 7983: XEiJ.busWw (a, XEiJ.regRn[ 1]); 7984: a += 2; 7985: } 7986: if ((l & 0x0004) != 0) { 7987: XEiJ.busWw (a, XEiJ.regRn[ 2]); 7988: a += 2; 7989: } 7990: if ((l & 0x0008) != 0) { 7991: XEiJ.busWw (a, XEiJ.regRn[ 3]); 7992: a += 2; 7993: } 7994: if ((l & 0x0010) != 0) { 7995: XEiJ.busWw (a, XEiJ.regRn[ 4]); 7996: a += 2; 7997: } 7998: if ((l & 0x0020) != 0) { 7999: XEiJ.busWw (a, XEiJ.regRn[ 5]); 8000: a += 2; 8001: } 8002: if ((l & 0x0040) != 0) { 8003: XEiJ.busWw (a, XEiJ.regRn[ 6]); 8004: a += 2; 8005: } 8006: if ((byte) l < 0) { //(l & 0x0080) != 0 8007: XEiJ.busWw (a, XEiJ.regRn[ 7]); 8008: a += 2; 8009: } 8010: if ((l & 0x0100) != 0) { 8011: XEiJ.busWw (a, XEiJ.regRn[ 8]); 8012: a += 2; 8013: } 8014: if ((l & 0x0200) != 0) { 8015: XEiJ.busWw (a, XEiJ.regRn[ 9]); 8016: a += 2; 8017: } 8018: if ((l & 0x0400) != 0) { 8019: XEiJ.busWw (a, XEiJ.regRn[10]); 8020: a += 2; 8021: } 8022: if ((l & 0x0800) != 0) { 8023: XEiJ.busWw (a, XEiJ.regRn[11]); 8024: a += 2; 8025: } 8026: if ((l & 0x1000) != 0) { 8027: XEiJ.busWw (a, XEiJ.regRn[12]); 8028: a += 2; 8029: } 8030: if ((l & 0x2000) != 0) { 8031: XEiJ.busWw (a, XEiJ.regRn[13]); 8032: a += 2; 8033: } 8034: if ((l & 0x4000) != 0) { 8035: XEiJ.busWw (a, XEiJ.regRn[14]); 8036: a += 2; 8037: } 8038: if ((short) l < 0) { //(l & 0x8000) != 0 8039: XEiJ.busWw (a, XEiJ.regRn[15]); 8040: a += 2; 8041: } 8042: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8043: for (int i = 0; i <= 15; i++) { 8044: if ((l & 0x0001 << i) != 0) { 8045: XEiJ.busWw (a, XEiJ.regRn[i]); 8046: a += 2; 8047: } 8048: } 8049: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8050: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8051: for (int i = 0; l != 0; i++, l <<= 1) { 8052: if (l < 0) { 8053: XEiJ.busWw (a, XEiJ.regRn[i]); 8054: a += 2; 8055: } 8056: } 8057: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8058: for (int i = 0; l != 0; i++, l >>>= 1) { 8059: if ((l & 1) != 0) { 8060: XEiJ.busWw (a, XEiJ.regRn[i]); 8061: a += 2; 8062: } 8063: } 8064: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8065: for (int i = 0; l != 0; ) { 8066: int k = Integer.numberOfTrailingZeros (l); 8067: XEiJ.busWw (a, XEiJ.regRn[i += k]); 8068: a += 2; 8069: l = l >>> k & ~1; 8070: } 8071: } 8072: XEiJ.mpuCycleCount += 4 + (a - t << 1); //2バイト/個→4サイクル/個 8073: } 8074: } 8075: } //irpMovemToMemWord 8076: 8077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8078: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8079: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8080: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8081: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 8082: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 8083: public static void irpMovemToMemLong () throws M68kException { 8084: int ea = XEiJ.regOC & 63; 8085: if (ea < XEiJ.EA_AR) { //EXT.L Dr 8086: XEiJ.mpuCycleCount += 4; 8087: int z; 8088: XEiJ.regRn[ea] = z = (short) XEiJ.regRn[ea]; 8089: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8090: } else { //MOVEM.L <list>,<ea> 8091: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 8092: XEiJ.regPC += 2; 8093: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 8094: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 8095: //転送するレジスタが0個のときArは変化しない 8096: int arr = ea - (XEiJ.EA_MN - 8); 8097: int a = XEiJ.regRn[arr]; 8098: XEiJ.regRn[arr] = a - 4; 8099: int t = a; 8100: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8101: if ((l & 0x0001) != 0) { 8102: XEiJ.busWl (a -= 4, XEiJ.regRn[15]); 8103: } 8104: if ((l & 0x0002) != 0) { 8105: XEiJ.busWl (a -= 4, XEiJ.regRn[14]); 8106: } 8107: if ((l & 0x0004) != 0) { 8108: XEiJ.busWl (a -= 4, XEiJ.regRn[13]); 8109: } 8110: if ((l & 0x0008) != 0) { 8111: XEiJ.busWl (a -= 4, XEiJ.regRn[12]); 8112: } 8113: if ((l & 0x0010) != 0) { 8114: XEiJ.busWl (a -= 4, XEiJ.regRn[11]); 8115: } 8116: if ((l & 0x0020) != 0) { 8117: XEiJ.busWl (a -= 4, XEiJ.regRn[10]); 8118: } 8119: if ((l & 0x0040) != 0) { 8120: XEiJ.busWl (a -= 4, XEiJ.regRn[ 9]); 8121: } 8122: if ((byte) l < 0) { //(l & 0x0080) != 0 8123: XEiJ.busWl (a -= 4, XEiJ.regRn[ 8]); 8124: } 8125: if ((l & 0x0100) != 0) { 8126: XEiJ.busWl (a -= 4, XEiJ.regRn[ 7]); 8127: } 8128: if ((l & 0x0200) != 0) { 8129: XEiJ.busWl (a -= 4, XEiJ.regRn[ 6]); 8130: } 8131: if ((l & 0x0400) != 0) { 8132: XEiJ.busWl (a -= 4, XEiJ.regRn[ 5]); 8133: } 8134: if ((l & 0x0800) != 0) { 8135: XEiJ.busWl (a -= 4, XEiJ.regRn[ 4]); 8136: } 8137: if ((l & 0x1000) != 0) { 8138: XEiJ.busWl (a -= 4, XEiJ.regRn[ 3]); 8139: } 8140: if ((l & 0x2000) != 0) { 8141: XEiJ.busWl (a -= 4, XEiJ.regRn[ 2]); 8142: } 8143: if ((l & 0x4000) != 0) { 8144: XEiJ.busWl (a -= 4, XEiJ.regRn[ 1]); 8145: } 8146: if ((short) l < 0) { //(l & 0x8000) != 0 8147: XEiJ.busWl (a -= 4, XEiJ.regRn[ 0]); 8148: } 8149: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8150: for (int i = 15; i >= 0; i--) { 8151: if ((l & 0x8000 >>> i) != 0) { 8152: XEiJ.busWl (a -= 4, XEiJ.regRn[i]); 8153: } 8154: } 8155: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8156: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8157: for (int i = 15; l != 0; i--, l <<= 1) { 8158: if (l < 0) { 8159: XEiJ.busWl (a -= 4, XEiJ.regRn[i]); 8160: } 8161: } 8162: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8163: for (int i = 15; l != 0; i--, l >>>= 1) { 8164: if ((l & 1) != 0) { 8165: XEiJ.busWl (a -= 4, XEiJ.regRn[i]); 8166: } 8167: } 8168: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8169: for (int i = 15; l != 0; ) { 8170: int k = Integer.numberOfTrailingZeros (l); 8171: XEiJ.busWl (a -= 4, XEiJ.regRn[i -= k]); 8172: l = l >>> k & ~1; 8173: } 8174: } 8175: XEiJ.regRn[arr] = a; 8176: XEiJ.mpuCycleCount += 8 + (t - a << 1); //4バイト/個→8サイクル/個 8177: } else { //-(Ar)以外 8178: int a = efaCltLong (ea); 8179: int t = a; 8180: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8181: if ((l & 0x0001) != 0) { 8182: XEiJ.busWl (a, XEiJ.regRn[ 0]); 8183: a += 4; 8184: } 8185: if ((l & 0x0002) != 0) { 8186: XEiJ.busWl (a, XEiJ.regRn[ 1]); 8187: a += 4; 8188: } 8189: if ((l & 0x0004) != 0) { 8190: XEiJ.busWl (a, XEiJ.regRn[ 2]); 8191: a += 4; 8192: } 8193: if ((l & 0x0008) != 0) { 8194: XEiJ.busWl (a, XEiJ.regRn[ 3]); 8195: a += 4; 8196: } 8197: if ((l & 0x0010) != 0) { 8198: XEiJ.busWl (a, XEiJ.regRn[ 4]); 8199: a += 4; 8200: } 8201: if ((l & 0x0020) != 0) { 8202: XEiJ.busWl (a, XEiJ.regRn[ 5]); 8203: a += 4; 8204: } 8205: if ((l & 0x0040) != 0) { 8206: XEiJ.busWl (a, XEiJ.regRn[ 6]); 8207: a += 4; 8208: } 8209: if ((byte) l < 0) { //(l & 0x0080) != 0 8210: XEiJ.busWl (a, XEiJ.regRn[ 7]); 8211: a += 4; 8212: } 8213: if ((l & 0x0100) != 0) { 8214: XEiJ.busWl (a, XEiJ.regRn[ 8]); 8215: a += 4; 8216: } 8217: if ((l & 0x0200) != 0) { 8218: XEiJ.busWl (a, XEiJ.regRn[ 9]); 8219: a += 4; 8220: } 8221: if ((l & 0x0400) != 0) { 8222: XEiJ.busWl (a, XEiJ.regRn[10]); 8223: a += 4; 8224: } 8225: if ((l & 0x0800) != 0) { 8226: XEiJ.busWl (a, XEiJ.regRn[11]); 8227: a += 4; 8228: } 8229: if ((l & 0x1000) != 0) { 8230: XEiJ.busWl (a, XEiJ.regRn[12]); 8231: a += 4; 8232: } 8233: if ((l & 0x2000) != 0) { 8234: XEiJ.busWl (a, XEiJ.regRn[13]); 8235: a += 4; 8236: } 8237: if ((l & 0x4000) != 0) { 8238: XEiJ.busWl (a, XEiJ.regRn[14]); 8239: a += 4; 8240: } 8241: if ((short) l < 0) { //(l & 0x8000) != 0 8242: XEiJ.busWl (a, XEiJ.regRn[15]); 8243: a += 4; 8244: } 8245: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8246: for (int i = 0; i <= 15; i++) { 8247: if ((l & 0x0001 << i) != 0) { 8248: XEiJ.busWl (a, XEiJ.regRn[i]); 8249: a += 4; 8250: } 8251: } 8252: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8253: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8254: for (int i = 0; l != 0; i++, l <<= 1) { 8255: if (l < 0) { 8256: XEiJ.busWl (a, XEiJ.regRn[i]); 8257: a += 4; 8258: } 8259: } 8260: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8261: for (int i = 0; l != 0; i++, l >>>= 1) { 8262: if ((l & 1) != 0) { 8263: XEiJ.busWl (a, XEiJ.regRn[i]); 8264: a += 4; 8265: } 8266: } 8267: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8268: for (int i = 0; l != 0; ) { 8269: int k = Integer.numberOfTrailingZeros (l); 8270: XEiJ.busWl (a, XEiJ.regRn[i += k]); 8271: a += 4; 8272: l = l >>> k & ~1; 8273: } 8274: } 8275: XEiJ.mpuCycleCount += 4 + (a - t << 1); //4バイト/個→8サイクル/個 8276: } 8277: } 8278: } //irpMovemToMemLong 8279: 8280: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8281: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8282: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8283: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8284: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 8285: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 8286: public static void irpTstByte () throws M68kException { 8287: XEiJ.mpuCycleCount += 4; 8288: int ea = XEiJ.regOC & 63; 8289: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)))]; //ccr_tst_byte。アドレッシングモードに注意 8290: } //irpTstByte 8291: 8292: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8293: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8294: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8295: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8296: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 8297: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 8298: public static void irpTstWord () throws M68kException { 8299: XEiJ.mpuCycleCount += 4; 8300: int ea = XEiJ.regOC & 63; 8301: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8302: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 8303: } //irpTstWord 8304: 8305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8306: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8307: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8309: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 8310: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 8311: public static void irpTstLong () throws M68kException { 8312: XEiJ.mpuCycleCount += 4; 8313: int ea = XEiJ.regOC & 63; 8314: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8315: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8316: } //irpTstLong 8317: 8318: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8319: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8320: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8322: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 8323: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 8324: public static void irpTas () throws M68kException { 8325: int ea = XEiJ.regOC & 63; 8326: int z; 8327: if (ea < XEiJ.EA_AR) { //TAS.B Dr 8328: XEiJ.mpuCycleCount += 4; 8329: XEiJ.regRn[ea] = 0x80 | (z = XEiJ.regRn[ea]); 8330: } else { //TAS.B <mem> 8331: XEiJ.mpuCycleCount += 14; 8332: int a = efaMltByte (ea); 8333: XEiJ.busWb (a, 0x80 | (z = XEiJ.busRbs (a))); 8334: } 8335: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 8336: } //irpTas 8337: 8338: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8339: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8340: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8342: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 8343: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 8344: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 8345: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 8346: public static void irpMuluMulsLong () throws M68kException { 8347: int w; 8348: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 8349: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 8350: } else { 8351: w = XEiJ.regPC; 8352: XEiJ.regPC = w + 2; 8353: w = XEiJ.busRwze (w); //pcwz。拡張ワード 8354: } 8355: if ((w & ~0b0111_110_000_000_111) != 0) { 8356: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8357: throw M68kException.m6eSignal; 8358: } 8359: int l = w >> 12; //被乗数,積の下位32bit 8360: int s = w & 0b0000_100_000_000_000; //0=MULU,1=MULS 8361: int q = w & 0b0000_010_000_000_000; //0=32bit,1=64bit 8362: int h = w & 7; //積の上位32bit 8363: XEiJ.mpuCycleCount += 72; //72*0.6=43.2≒44 8364: int ea = XEiJ.regOC & 63; 8365: long yy = (long) (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea))); 8366: long xx = (long) XEiJ.regRn[l]; 8367: if (s == 0) { //MULU 8368: long zz = (0xffffffffL & xx) * (0xffffffffL & yy); 8369: int z = XEiJ.regRn[l] = (int) zz; 8370: if (q == 0) { //32bit 8371: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (zz >>> 32 != 0L ? XEiJ.REG_CCR_V : 0); 8372: } else { //64bit 8373: XEiJ.regRn[h] = (int) (zz >>> 32); 8374: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (zz > 0L ? 0 : zz < 0L ? XEiJ.REG_CCR_N : XEiJ.REG_CCR_Z); 8375: } 8376: } else { //MULS 8377: long zz = xx * yy; 8378: int z = XEiJ.regRn[l] = (int) zz; 8379: if (q == 0) { //32bit 8380: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (z != zz ? XEiJ.REG_CCR_V : 0); 8381: } else { //64bit 8382: XEiJ.regRn[h] = (int) (zz >> 32); 8383: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (zz > 0L ? 0 : zz < 0L ? XEiJ.REG_CCR_N : XEiJ.REG_CCR_Z); 8384: } 8385: } 8386: if (M30_DIV_ZERO_V_FLAG) { 8387: m30DivZeroVFlag = false; 8388: } 8389: } //irpMuluMulsLong 8390: 8391: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8392: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8393: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8394: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8395: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 8396: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 8397: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 8398: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 8399: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 8400: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 8401: // 8402: //DIVS.L <ea>,Dq 8403: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8404: // 8405: //DIVS.L <ea>,Dr:Dq 8406: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8407: // M68000PRMでDIVS.Lのアドレッシングモードがデータ可変と書かれているのはデータの間違い 8408: // 8409: //DIVSL.L <ea>,Dr:Dq 8410: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8411: // 8412: //DIVU.L <ea>,Dq 8413: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8414: // 8415: //DIVU.L <ea>,Dr:Dq 8416: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8417: // 8418: //DIVUL.L <ea>,Dr:Dq 8419: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8420: public static void irpDivuDivsLong () throws M68kException { 8421: int w; 8422: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 8423: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 8424: } else { 8425: w = XEiJ.regPC; 8426: XEiJ.regPC = w + 2; 8427: w = XEiJ.busRwze (w); //pcwz。拡張ワード 8428: } 8429: if ((w & ~0b0111_110_000_000_111) != 0) { 8430: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8431: throw M68kException.m6eSignal; 8432: } 8433: int l = w >> 12; //被除数の下位32bit,商 8434: int s = w & 0b0000_100_000_000_000; //0=DIVU,1=DIVS 8435: int q = w & 0b0000_010_000_000_000; //0=32bit被除数,1=64bit被除数 8436: int h = w & 7; //被除数の上位32bit,余り 8437: int ea = XEiJ.regOC & 63; 8438: int y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //除数 8439: if (s == 0) { //符号なし。DIVU.L <ea>,* 8440: XEiJ.mpuCycleCount += 130; //最大。130*0.6=78 8441: long yy = (long) y & 0xffffffffL; //除数 8442: if (q == 0) { //符号なし、32bit被除数。DIVU.L <ea>,Dq/DIVUL.L <ea>,Dr:Dq 8443: if (y == 0) { //ゼロ除算 8444: if (h == l) { //DIVU.L <ea>,Dq 8445: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8446: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8447: (xx < 0L ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 8448: (xx == 0L ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が0のときセット、さもなくばクリア 8449: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8450: ); //Cは常にクリア 8451: } else { //DIVUL.L <ea>,Dr:Dq 8452: int x = XEiJ.regRn[l]; //32bit被除数 8453: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8454: (x < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 8455: (x == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が0のときセット、さもなくばクリア 8456: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8457: ); //Cは常にクリア 8458: } 8459: XEiJ.mpuCycleCount += 38 - 34; 8460: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8461: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8462: throw M68kException.m6eSignal; 8463: } //if ゼロ除算 8464: long xx = (long) XEiJ.regRn[l] & 0xffffffffL; //32bit被除数 8465: long zz = (long) ((double) xx / (double) yy); //double→intのキャストは飽和変換で0xffffffff/0x00000001が0x7fffffffになってしまうのでdouble→longとする 8466: int z = XEiJ.regRn[l] = (int) zz; //商 8467: if (h != l) { 8468: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8469: } 8470: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8471: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8472: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8473: ); //VとCは常にクリア 8474: } else { //符号なし、64bit被除数。DIVU.L <ea>,Dr:Dq 8475: if (y == 0) { //ゼロ除算 8476: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8477: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8478: (((int) xx < 0 && (int) xx != 0x7fffffff) || (int) xx == 0x80000000 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が$xxxxxxxx7fffffffを除く負または$xxxxxxxx80000000のときセット、さもなくばクリア 8479: ((int) xx == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が$xxxxxxxx00000000のときセット、さもなくばクリア 8480: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8481: ); //Cは常にクリア 8482: XEiJ.mpuCycleCount += 38 - 34; 8483: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8484: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8485: throw M68kException.m6eSignal; 8486: } //if ゼロ除算 8487: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8488: long zz = Long.divideUnsigned (xx, yy); //商。Long.divideUnsigned(long,long)は1.8から 8489: int z = (int) zz; //商の下位32bit 8490: if (zz >>> 32 != 0L) { //オーバーフローあり 8491: //Dr:Dqは変化しない 8492: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8493: ((int) xx < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数の下位32bitが負のときセット、さもなくばクリア 8494: ((int) xx == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数の下位32bitが0のときセット、さもなくばクリア 8495: XEiJ.REG_CCR_V //Vは常にセット 8496: ); //Cは常にクリア 8497: } else { //オーバーフローなし 8498: XEiJ.regRn[l] = (int) zz; //Dr=商 8499: if (h != l) { 8500: XEiJ.regRn[h] = (int) (xx - yy * zz); //Dq=余り 8501: } 8502: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8503: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8504: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8505: ); //VとCは常にクリア 8506: } //if オーバーフローあり/オーバーフローなし 8507: } //if 32bit被除数/64bit被除数 8508: } else { //符号あり。DIVS.L <ea>,* 8509: XEiJ.mpuCycleCount += 150; //最大。150*0.6=90 8510: if (q == 0) { //符号あり、32bit被除数。DIVS.L <ea>,Dq/DIVSL.L <ea>,Dr:Dq 8511: long yy = (long) y; //除数 8512: if (y == 0) { //ゼロ除算 8513: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8514: if (h == l) { //DIVS.L <ea>,Dq 8515: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8516: //Nは常にクリア 8517: XEiJ.REG_CCR_Z | //Zは常にセット 8518: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8519: ); //Cは常にクリア 8520: } else { //DIVSL.L <ea>,Dr:Dq 8521: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8522: //Nは常にクリア 8523: XEiJ.REG_CCR_Z | //Zは常にセット 8524: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8525: ); //Cは常にクリア 8526: } //if DIVS.L <ea>,Dq/DIVSL.L <ea>,Dr:Dq 8527: XEiJ.mpuCycleCount += 38 - 34; 8528: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8529: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8530: throw M68kException.m6eSignal; 8531: } //if ゼロ除算 8532: long xx = (long) XEiJ.regRn[l]; //32bit被除数 8533: long zz = xx / yy; //商 8534: if ((int) zz != zz) { //オーバーフローあり 8535: //Dqは変化しない 8536: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8537: (xx == 0xffffffff80000000L && y == -1 ? XEiJ.REG_CCR_Z : 0) | //Zは0x80000000/-1のときセット、さもなくばクリア 8538: XEiJ.REG_CCR_V //Vは常にセット 8539: ); //NとCは常にクリア 8540: } else { //オーバーフローなし 8541: int z = XEiJ.regRn[l] = (int) zz; //商 8542: if (h != l) { //DIVSL.L <ea>,Dr:Dq 8543: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8544: } 8545: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8546: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8547: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8548: ); //VとCは常にクリア 8549: } //if オーバーフローあり/オーバーフローなし 8550: } else { //符号あり、64bit被除数。DIVS.L <ea>,Dr:Dq 8551: long yy = (long) y; //除数 8552: if (y == 0) { //ゼロ除算 8553: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8554: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8555: //Nは常にクリア 8556: XEiJ.REG_CCR_Z | //Zは常にセット 8557: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8558: ); //Cは常にクリア 8559: XEiJ.mpuCycleCount += 38 - 34; 8560: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8561: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8562: throw M68kException.m6eSignal; 8563: } //if ゼロ除算 8564: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8565: long zz = xx / yy; //商 8566: if ((int) zz != zz) { //オーバーフローあり 8567: int zh = (int) (zz >> 32); 8568: int zl = (int) zz; 8569: int xh = (int) (xx >> 32); 8570: int xl = (int) xx; 8571: //Dr:Dqは変化しない 8572: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8573: ((zh == 0x00000000 || zh == 0xffffffff) && zl != 0x00000000 8574: ? //商が$0000000000000000を除く$00000000xxxxxxqqまたは$ffffffff00000000を除く$ffffffffxxxxxxqqのとき 8575: (zl << 24 < 0 ? XEiJ.REG_CCR_N : 0) | //qqが負ならばN=1,さもなくばN=0 8576: (zl << 24 == 0 ? XEiJ.REG_CCR_Z : 0) //qqが0ならばZ=1,さもなくばZ=0 8577: : //商が$0000000000000000を除く$00000000xxxxxxqqまたは$ffffffff00000000を除く$ffffffffxxxxxxqqでないとき 8578: (xl == 0x80000000 || //被除数が$xxxxxxxx80000000または 8579: (xh == 0x80000000 && xl != 0x00000000) || //被除数が$8000000000000000を除く$80000000xxxxxxxxまたは 8580: (xl == 0x7fffffff && xh != 0x7fffffff) || //被除数が$7fffffff7fffffffを除く$xxxxxxxx7fffffffまたは 8581: (xh == 0x7fffffff && xl != 0x7fffffff) || //被除数が$7fffffff7fffffffを除く$7fffffffxxxxxxxxまたは 8582: (xl == 0xffffffff && 0x00000000 <= xh) ? XEiJ.REG_CCR_N : 0) | //被除数が正で$xxxxxxxxffffffffならばN=1,さもなくばN=0 8583: (xl == 0x00000000 ? XEiJ.REG_CCR_Z : 0)) | //被除数が$xxxxxxxx00000000ならばZ=1,さもなくばZ=0 8584: XEiJ.REG_CCR_V //Vは常にセット 8585: ); //Cは常にクリア 8586: } else { //オーバーフローなし 8587: int z = XEiJ.regRn[l] = (int) zz; //商 8588: if (h != l) { 8589: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8590: } 8591: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8592: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8593: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8594: ); //VとCは常にクリア 8595: } //if オーバーフローあり/オーバーフローなし 8596: } //if 32bit被除数/64bit被除数 8597: } //if 符号なし/符号あり 8598: if (M30_DIV_ZERO_V_FLAG) { 8599: m30DivZeroVFlag = false; 8600: } 8601: } //irpDivuDivsLong 8602: 8603: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8604: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8605: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8606: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8607: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 8608: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 8609: // 8610: //SATS.L Dr 8611: // VがセットされていたらDrを符号が逆で絶対値が最大の値にする(直前のDrに対する演算を飽和演算にする) 8612: public static void irpMovemToRegWord () throws M68kException { 8613: int ea = XEiJ.regOC & 63; 8614: if (ea < XEiJ.EA_AR) { //SATS.L Dr 8615: XEiJ.mpuCycleCount += 4; 8616: int z = XEiJ.regRn[ea]; 8617: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 < 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) != 0) { //Vがセットされているとき 8618: XEiJ.regRn[ea] = z = z >> 31 ^ 0x80000000; //符号が逆で絶対値が最大の値にする 8619: } 8620: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8621: } else { //MOVEM.W <ea>,<list> 8622: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 8623: XEiJ.regPC += 2; 8624: int arr, a; 8625: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8626: XEiJ.mpuCycleCount += 12; 8627: arr = ea - (XEiJ.EA_MP - 8); 8628: a = XEiJ.regRn[arr]; 8629: } else { //(Ar)+以外 8630: XEiJ.mpuCycleCount += 8; 8631: arr = 16; 8632: a = efaCntWord (ea); 8633: } 8634: int t = a; 8635: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8636: if ((l & 0x0001) != 0) { 8637: XEiJ.regRn[ 0] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8638: a += 2; 8639: } 8640: if ((l & 0x0002) != 0) { 8641: XEiJ.regRn[ 1] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8642: a += 2; 8643: } 8644: if ((l & 0x0004) != 0) { 8645: XEiJ.regRn[ 2] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8646: a += 2; 8647: } 8648: if ((l & 0x0008) != 0) { 8649: XEiJ.regRn[ 3] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8650: a += 2; 8651: } 8652: if ((l & 0x0010) != 0) { 8653: XEiJ.regRn[ 4] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8654: a += 2; 8655: } 8656: if ((l & 0x0020) != 0) { 8657: XEiJ.regRn[ 5] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8658: a += 2; 8659: } 8660: if ((l & 0x0040) != 0) { 8661: XEiJ.regRn[ 6] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8662: a += 2; 8663: } 8664: if ((byte) l < 0) { //(l & 0x0080) != 0 8665: XEiJ.regRn[ 7] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8666: a += 2; 8667: } 8668: if ((l & 0x0100) != 0) { 8669: XEiJ.regRn[ 8] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8670: a += 2; 8671: } 8672: if ((l & 0x0200) != 0) { 8673: XEiJ.regRn[ 9] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8674: a += 2; 8675: } 8676: if ((l & 0x0400) != 0) { 8677: XEiJ.regRn[10] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8678: a += 2; 8679: } 8680: if ((l & 0x0800) != 0) { 8681: XEiJ.regRn[11] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8682: a += 2; 8683: } 8684: if ((l & 0x1000) != 0) { 8685: XEiJ.regRn[12] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8686: a += 2; 8687: } 8688: if ((l & 0x2000) != 0) { 8689: XEiJ.regRn[13] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8690: a += 2; 8691: } 8692: if ((l & 0x4000) != 0) { 8693: XEiJ.regRn[14] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8694: a += 2; 8695: } 8696: if ((short) l < 0) { //(l & 0x8000) != 0 8697: XEiJ.regRn[15] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8698: a += 2; 8699: } 8700: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8701: for (int i = 0; i <= 15; i++) { 8702: if ((l & 0x0001 << i) != 0) { 8703: XEiJ.regRn[i] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8704: a += 2; 8705: } 8706: } 8707: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8708: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8709: for (int i = 0; l != 0; i++, l <<= 1) { 8710: if (l < 0) { 8711: XEiJ.regRn[i] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8712: a += 2; 8713: } 8714: } 8715: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8716: for (int i = 0; l != 0; i++, l >>>= 1) { 8717: if ((l & 1) != 0) { 8718: XEiJ.regRn[i] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8719: a += 2; 8720: } 8721: } 8722: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8723: for (int i = 0; l != 0; ) { 8724: int k = Integer.numberOfTrailingZeros (l); 8725: XEiJ.regRn[i += k] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8726: a += 2; 8727: l = l >>> k & ~1; 8728: } 8729: } 8730: //MOVEM.W (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8731: XEiJ.regRn[arr] = a; 8732: XEiJ.mpuCycleCount += a - t << 1; //2バイト/個→4サイクル/個 8733: } 8734: } //irpMovemToRegWord 8735: 8736: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8737: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8738: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8739: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8740: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 8741: public static void irpMovemToRegLong () throws M68kException { 8742: int ea = XEiJ.regOC & 63; 8743: { 8744: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 8745: XEiJ.regPC += 2; 8746: int arr, a; 8747: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8748: XEiJ.mpuCycleCount += 12; 8749: arr = ea - (XEiJ.EA_MP - 8); 8750: a = XEiJ.regRn[arr]; 8751: } else { //(Ar)+以外 8752: XEiJ.mpuCycleCount += 8; 8753: arr = 16; 8754: a = efaCntLong (ea); 8755: } 8756: int t = a; 8757: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8758: if ((l & 0x0001) != 0) { 8759: XEiJ.regRn[ 0] = XEiJ.busRls (a); 8760: a += 4; 8761: } 8762: if ((l & 0x0002) != 0) { 8763: XEiJ.regRn[ 1] = XEiJ.busRls (a); 8764: a += 4; 8765: } 8766: if ((l & 0x0004) != 0) { 8767: XEiJ.regRn[ 2] = XEiJ.busRls (a); 8768: a += 4; 8769: } 8770: if ((l & 0x0008) != 0) { 8771: XEiJ.regRn[ 3] = XEiJ.busRls (a); 8772: a += 4; 8773: } 8774: if ((l & 0x0010) != 0) { 8775: XEiJ.regRn[ 4] = XEiJ.busRls (a); 8776: a += 4; 8777: } 8778: if ((l & 0x0020) != 0) { 8779: XEiJ.regRn[ 5] = XEiJ.busRls (a); 8780: a += 4; 8781: } 8782: if ((l & 0x0040) != 0) { 8783: XEiJ.regRn[ 6] = XEiJ.busRls (a); 8784: a += 4; 8785: } 8786: if ((byte) l < 0) { //(l & 0x0080) != 0 8787: XEiJ.regRn[ 7] = XEiJ.busRls (a); 8788: a += 4; 8789: } 8790: if ((l & 0x0100) != 0) { 8791: XEiJ.regRn[ 8] = XEiJ.busRls (a); 8792: a += 4; 8793: } 8794: if ((l & 0x0200) != 0) { 8795: XEiJ.regRn[ 9] = XEiJ.busRls (a); 8796: a += 4; 8797: } 8798: if ((l & 0x0400) != 0) { 8799: XEiJ.regRn[10] = XEiJ.busRls (a); 8800: a += 4; 8801: } 8802: if ((l & 0x0800) != 0) { 8803: XEiJ.regRn[11] = XEiJ.busRls (a); 8804: a += 4; 8805: } 8806: if ((l & 0x1000) != 0) { 8807: XEiJ.regRn[12] = XEiJ.busRls (a); 8808: a += 4; 8809: } 8810: if ((l & 0x2000) != 0) { 8811: XEiJ.regRn[13] = XEiJ.busRls (a); 8812: a += 4; 8813: } 8814: if ((l & 0x4000) != 0) { 8815: XEiJ.regRn[14] = XEiJ.busRls (a); 8816: a += 4; 8817: } 8818: if ((short) l < 0) { //(l & 0x8000) != 0 8819: XEiJ.regRn[15] = XEiJ.busRls (a); 8820: a += 4; 8821: } 8822: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8823: for (int i = 0; i <= 15; i++) { 8824: if ((l & 0x0001 << i) != 0) { 8825: XEiJ.regRn[i] = XEiJ.busRls (a); 8826: a += 4; 8827: } 8828: } 8829: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8830: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8831: for (int i = 0; l != 0; i++, l <<= 1) { 8832: if (l < 0) { 8833: XEiJ.regRn[i] = XEiJ.busRls (a); 8834: a += 4; 8835: } 8836: } 8837: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8838: for (int i = 0; l != 0; i++, l >>>= 1) { 8839: if ((l & 1) != 0) { 8840: XEiJ.regRn[i] = XEiJ.busRls (a); 8841: a += 4; 8842: } 8843: } 8844: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8845: for (int i = 0; l != 0; ) { 8846: int k = Integer.numberOfTrailingZeros (l); 8847: XEiJ.regRn[i += k] = XEiJ.busRls (a); 8848: a += 4; 8849: l = l >>> k & ~1; 8850: } 8851: } 8852: //MOVEM.L (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8853: XEiJ.regRn[arr] = a; 8854: XEiJ.mpuCycleCount += a - t << 1; //4バイト/個→8サイクル/個 8855: } 8856: } //irpMovemToRegLong 8857: 8858: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8859: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8860: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8861: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8862: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 8863: public static void irpTrap () throws M68kException { 8864: XEiJ.mpuCycleCount += 34; 8865: if (XEiJ.MPU_INLINE_EXCEPTION) { 8866: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 8867: int sp = XEiJ.regRn[15]; 8868: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 8869: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8870: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 8871: XEiJ.mpuUSP = sp; //USPを保存 8872: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 8873: if (DataBreakPoint.DBP_ON) { 8874: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 8875: } else { 8876: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 8877: } 8878: if (InstructionBreakPoint.IBP_ON) { 8879: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 8880: } 8881: } 8882: XEiJ.regRn[15] = sp -= 8; 8883: XEiJ.busWw (sp + 6, 0x0000 | XEiJ.regOC - (0x4e40 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2); //pushw。フォーマットとベクタオフセットをプッシュする 8884: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 8885: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 8886: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (XEiJ.regOC - (0x4e40 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2))); //例外ベクタを取り出してジャンプする 8887: } else { 8888: irpException (XEiJ.regOC - (0x4e40 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR), XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは次の命令 8889: } 8890: } //irpTrap 8891: public static void irpTrap15 () throws M68kException { 8892: if ((XEiJ.regRn[0] & 255) == 0x8e) { //IOCS _BOOTINF 8893: MainMemory.mmrCheckHuman (); 8894: } 8895: XEiJ.mpuCycleCount += 34; 8896: if (XEiJ.MPU_INLINE_EXCEPTION) { 8897: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 8898: int sp = XEiJ.regRn[15]; 8899: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 8900: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8901: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 8902: XEiJ.mpuUSP = sp; //USPを保存 8903: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 8904: if (DataBreakPoint.DBP_ON) { 8905: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 8906: } else { 8907: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 8908: } 8909: if (InstructionBreakPoint.IBP_ON) { 8910: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 8911: } 8912: } 8913: XEiJ.regRn[15] = sp -= 8; 8914: XEiJ.busWw (sp + 6, 0x0000 | M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR); //pushw。フォーマットとベクタオフセットをプッシュする 8915: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 8916: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 8917: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR << 2))); //例外ベクタを取り出してジャンプする 8918: } else { 8919: irpException (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR, XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは次の命令 8920: } 8921: } //irpTrap15 8922: 8923: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8924: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8925: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8926: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8927: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 8928: // 8929: //LINK.W Ar,#<data> 8930: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.W #<data>,A7と同じ 8931: // LINK.W A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 8932: public static void irpLinkWord () throws M68kException { 8933: XEiJ.mpuCycleCount += 16; 8934: int arr = XEiJ.regOC - (0b0100_111_001_010_000 - 8); 8935: //評価順序に注意 8936: // wl(r[15]-=4,r[8+rrr])は不可 8937: int sp = XEiJ.regRn[15] - 4; 8938: XEiJ.busWl (sp, XEiJ.regRn[arr]); //pushl 8939: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 8940: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 8941: } else { 8942: int t = XEiJ.regPC; 8943: XEiJ.regPC = t + 2; 8944: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRwse (t); //pcws 8945: } 8946: } //irpLinkWord 8947: 8948: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8949: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8950: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8951: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8952: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 8953: // 8954: //UNLK Ar 8955: // MOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ 8956: // UNLK A7はMOVEA.L A7,A7;MOVEA.L (A7)+,A7すなわちMOVEA.L (A7),A7と同じ 8957: // ソースオペランドのポストインクリメントはデスティネーションオペランドが評価される前に完了しているとみなされる 8958: // 例えばMOVE.L (A0)+,(A0)+はMOVE.L (A0),(4,A0);ADDQ.L #8,A0と同じ 8959: // MOVEA.L (A0)+,A0はポストインクリメントされたA0が(A0)から読み出された値で上書きされるのでMOVEA.L (A0),A0と同じ 8960: // M68000PRMにUNLK Anの動作はAn→SP;(SP)→An;SP+4→SPだと書かれているがこれはn=7の場合に当てはまらない 8961: // 余談だが68040の初期のマスクセットはUNLK A7を実行すると固まるらしい 8962: public static void irpUnlk () throws M68kException { 8963: XEiJ.mpuCycleCount += 12; 8964: int arr = XEiJ.regOC - (0b0100_111_001_011_000 - 8); 8965: //評価順序に注意 8966: int sp = XEiJ.regRn[arr]; 8967: XEiJ.regRn[15] = sp + 4; 8968: XEiJ.regRn[arr] = XEiJ.busRls (sp); //popls 8969: } //irpUnlk 8970: 8971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8972: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8973: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8974: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8975: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 8976: public static void irpMoveToUsp () throws M68kException { 8977: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8978: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8979: throw M68kException.m6eSignal; 8980: } 8981: //以下はスーパーバイザモード 8982: XEiJ.mpuCycleCount += 4; 8983: XEiJ.mpuUSP = XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_100_000 - 8)]; 8984: } //irpMoveToUsp 8985: 8986: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8987: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8988: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8989: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8990: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 8991: public static void irpMoveFromUsp () throws M68kException { 8992: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8993: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8994: throw M68kException.m6eSignal; 8995: } 8996: //以下はスーパーバイザモード 8997: XEiJ.mpuCycleCount += 4; 8998: XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_101_000 - 8)] = XEiJ.mpuUSP; 8999: } //irpMoveFromUsp 9000: 9001: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9002: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9003: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9004: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9005: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 9006: public static void irpReset () throws M68kException { 9007: if (XEiJ.regSRS == 0) { //ユーザモードのとき 9008: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9009: throw M68kException.m6eSignal; 9010: } 9011: //以下はスーパーバイザモード 9012: XEiJ.mpuCycleCount += 132; 9013: XEiJ.irpReset (); 9014: } //irpReset 9015: 9016: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9017: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9018: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9019: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9020: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 9021: public static void irpNop () throws M68kException { 9022: XEiJ.mpuCycleCount += 4; 9023: //何もしない 9024: } //irpNop 9025: 9026: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9027: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9028: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9029: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9030: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 9031: // 9032: //STOP #<data> 9033: // 1. #<data>をsrに設定する 9034: // 2. pcを進める 9035: // 3. 以下のいずれかの条件が成立するまで停止する 9036: // 3a. トレース 9037: // 3b. マスクされているレベルよりも高い割り込み要求 9038: // 3c. リセット 9039: // コアと一緒にデバイスを止めるわけにいかないので、ここでは条件が成立するまで同じ命令を繰り返すループ命令として実装する 9040: public static void irpStop () throws M68kException { 9041: if (XEiJ.regSRS == 0) { //ユーザモードのとき 9042: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9043: throw M68kException.m6eSignal; 9044: } 9045: //以下はスーパーバイザモード 9046: XEiJ.mpuCycleCount += 4; 9047: irpSetSR (XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 9048: if (XEiJ.mpuTraceFlag == 0) { //トレースまたはマスクされているレベルよりも高い割り込み要求がない 9049: XEiJ.regPC = XEiJ.regPC0; //ループ 9050: //任意の負荷率を100%に設定しているときSTOP命令が軽すぎると動作周波数が大きくなりすぎて割り込みがかかったとき次に進めなくなる 9051: //負荷率の計算にSTOP命令で止まっていた時間を含めないことにする 9052: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。25MHzのとき100clk 9053: XEiJ.mpuLastNano += 4000L; 9054: } 9055: } //irpStop 9056: 9057: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9058: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9059: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9061: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 9062: public static void irpRte () throws M68kException { 9063: if (XEiJ.regSRS == 0) { //ユーザモードのとき 9064: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9065: throw M68kException.m6eSignal; 9066: } 9067: //以下はスーパーバイザモード 9068: XEiJ.mpuCycleCount += 20; 9069: int sp = XEiJ.regRn[15]; 9070: int format = XEiJ.busRws (sp + 6) & 0xf000; 9071: XEiJ.regRn[15] = sp + (format == 0x0000 ? 8 : //010,020,030,040,060 9072: format == 0x1000 ? 8 : //020,030,040 9073: format == 0x2000 ? 12 : //020,030,040,060 9074: //format == 0x3000 ? 12 : //040,060 9075: //format == 0x4000 ? 16 : //060 9076: //format == 0x7000 ? 60 : //040 9077: //format == 0x8000 ? 58 : //010 9078: format == 0x9000 ? 20 : //020,030 9079: format == 0xa000 ? 32 : //020,030 9080: format == 0xb000 ? 92 : //020,030 9081: 8); //??? 9082: int newSR = XEiJ.busRwz (sp); //popwz。ここでバスエラーが生じる可能性がある 9083: int newPC = XEiJ.busRls (sp + 2); //popls 9084: //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと 9085: irpSetSR (newSR); //ここでユーザモードに戻る場合がある。特権違反チェックが先 9086: irpSetPC (newPC); //分岐ログが新しいsrを使う。順序に注意 9087: if (format == 0x1000) { //スローアウェイフレームだったとき 9088: sp = XEiJ.regRn[15]; 9089: format = XEiJ.busRws (sp + 6) & 0xf000; 9090: XEiJ.regRn[15] = sp + (format == 0x0000 ? 8 : //010,020,030,040,060 9091: format == 0x1000 ? 8 : //020,030,040 9092: format == 0x2000 ? 12 : //020,030,040,060 9093: //format == 0x3000 ? 12 : //040,060 9094: //format == 0x4000 ? 16 : //060 9095: //format == 0x7000 ? 60 : //040 9096: //format == 0x8000 ? 58 : //010 9097: format == 0x9000 ? 20 : //020,030 9098: format == 0xa000 ? 32 : //020,030 9099: format == 0xb000 ? 92 : //020,030 9100: 8); //??? 9101: newSR = XEiJ.busRwz (sp); //popwz。ここでバスエラーが生じる可能性がある 9102: newPC = XEiJ.busRlse (sp + 2); //popls 9103: //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと 9104: irpSetSR (newSR); //ここでユーザモードに戻る場合がある。特権違反チェックが先 9105: irpSetPC (newPC); //分岐ログが新しいsrを使う。順序に注意 9106: } 9107: } //irpRte 9108: 9109: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9110: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9111: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9112: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9113: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 9114: public static void irpRtd () throws M68kException { 9115: XEiJ.mpuCycleCount += 20; 9116: int sp = XEiJ.regRn[15]; 9117: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 9118: XEiJ.regRn[15] = sp + 4 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 9119: } else { 9120: int t = XEiJ.regPC; 9121: XEiJ.regPC = t + 2; 9122: XEiJ.regRn[15] = sp + 4 + XEiJ.busRwse (t); //pcws 9123: } 9124: irpSetPC (XEiJ.busRls (sp)); //popls 9125: } //irpRtd 9126: 9127: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9128: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9129: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9130: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9131: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 9132: public static void irpRts () throws M68kException { 9133: XEiJ.mpuCycleCount += 16; 9134: int sp = XEiJ.regRn[15]; 9135: XEiJ.regRn[15] = sp + 4; 9136: irpSetPC (XEiJ.busRls (sp)); //popls 9137: } //irpRts 9138: 9139: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9140: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9141: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9142: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9143: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 9144: public static void irpTrapv () throws M68kException { 9145: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 >= 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) == 0) { //通過 9146: XEiJ.mpuCycleCount += 4; 9147: } else { 9148: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9149: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9150: throw M68kException.m6eSignal; 9151: } 9152: } //irpTrapv 9153: 9154: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9155: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9156: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9157: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9158: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 9159: public static void irpRtr () throws M68kException { 9160: XEiJ.mpuCycleCount += 20; 9161: int sp = XEiJ.regRn[15]; 9162: XEiJ.regRn[15] = sp + 6; 9163: XEiJ.regCCR = XEiJ.REG_CCR_MASK & XEiJ.busRwz (sp); //popwz 9164: irpSetPC (XEiJ.busRls (sp + 2)); //popls 9165: } //irpRtr 9166: 9167: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9168: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9169: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9170: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9171: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 9172: public static void irpMovecFromControl () throws M68kException { 9173: if (XEiJ.regSRS == 0) { //ユーザモードのとき 9174: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9175: throw M68kException.m6eSignal; 9176: } 9177: //以下はスーパーバイザモード 9178: XEiJ.mpuCycleCount += 10; 9179: int w; 9180: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 9181: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 9182: } else { 9183: w = XEiJ.regPC; 9184: XEiJ.regPC = w + 2; 9185: w = XEiJ.busRwze (w); //pcwz。拡張ワード 9186: } 9187: switch (w & 0x0fff) { 9188: case 0x000: //SFC 9189: XEiJ.regRn[w >> 12] = XEiJ.mpuSFC; 9190: break; 9191: case 0x001: //DFC 9192: XEiJ.regRn[w >> 12] = XEiJ.mpuDFC; 9193: break; 9194: case 0x002: //CACR 9195: XEiJ.regRn[w >> 12] = XEiJ.mpuCACR; 9196: break; 9197: case 0x800: //USP 9198: XEiJ.regRn[w >> 12] = XEiJ.mpuUSP; 9199: break; 9200: case 0x801: //VBR 9201: XEiJ.regRn[w >> 12] = XEiJ.mpuVBR; 9202: break; 9203: case 0x802: //CAAR 9204: XEiJ.regRn[w >> 12] = XEiJ.mpuCAAR; 9205: break; 9206: case 0x803: //MSP 9207: XEiJ.regRn[w >> 12] = XEiJ.regSRM != 0 ? XEiJ.regRn[15] : XEiJ.mpuMSP; 9208: break; 9209: case 0x804: //ISP 9210: XEiJ.regRn[w >> 12] = XEiJ.regSRM != 0 ? XEiJ.mpuISP : XEiJ.regRn[15]; 9211: break; 9212: default: 9213: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 9214: throw M68kException.m6eSignal; 9215: } 9216: } //irpMovecFromControl 9217: 9218: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9219: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9220: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9221: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9222: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 9223: public static void irpMovecToControl () throws M68kException { 9224: if (XEiJ.regSRS == 0) { //ユーザモードのとき 9225: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9226: throw M68kException.m6eSignal; 9227: } 9228: //以下はスーパーバイザモード 9229: XEiJ.mpuCycleCount += 12; 9230: int w; 9231: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 9232: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 9233: } else { 9234: w = XEiJ.regPC; 9235: XEiJ.regPC = w + 2; 9236: w = XEiJ.busRwze (w); //pcwz。拡張ワード 9237: } 9238: int d = XEiJ.regRn[w >> 12]; 9239: switch (w & 0x0fff) { 9240: case 0x000: //SFC 9241: XEiJ.mpuSFC = d & 0x00000007; 9242: break; 9243: case 0x001: //DFC 9244: XEiJ.mpuDFC = d & 0x00000007; 9245: break; 9246: case 0x002: //CACR 9247: XEiJ.mpuCACR = d & 0x00003f1f; 9248: { 9249: boolean cacheOn = (XEiJ.mpuCACR & 0x00000101) != 0; 9250: if (XEiJ.mpuCacheOn != cacheOn) { 9251: XEiJ.mpuCacheOn = cacheOn; 9252: XEiJ.mpuSetWait (); 9253: } 9254: } 9255: break; 9256: case 0x800: //USP 9257: XEiJ.mpuUSP = d; 9258: break; 9259: case 0x801: //VBR 9260: XEiJ.mpuVBR = d & -4; //4の倍数でないと困る 9261: break; 9262: case 0x802: //CAAR 9263: XEiJ.mpuCAAR = d; 9264: break; 9265: case 0x803: //MSP 9266: if (XEiJ.regSRM != 0) { 9267: XEiJ.regRn[15] = d; 9268: } else { 9269: XEiJ.mpuMSP = d; 9270: } 9271: break; 9272: case 0x804: //ISP 9273: if (XEiJ.regSRM != 0) { 9274: XEiJ.mpuISP = d; 9275: } else { 9276: XEiJ.regRn[15] = d; 9277: } 9278: break; 9279: default: 9280: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 9281: throw M68kException.m6eSignal; 9282: } 9283: } //irpMovecToControl 9284: 9285: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9286: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9287: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9288: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9289: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 9290: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 9291: public static void irpJsr () throws M68kException { 9292: XEiJ.mpuCycleCount += 16 - 8; 9293: int a = efaJmpJsr (XEiJ.regOC & 63); //プッシュする前に実効アドレスを計算する 9294: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 9295: irpSetPC (a); 9296: } //irpJsr 9297: 9298: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9299: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9300: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9301: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9302: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 9303: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 9304: public static void irpJmp () throws M68kException { 9305: //XEiJ.mpuCycleCount += 8 - 8; 9306: irpSetPC (efaJmpJsr (XEiJ.regOC & 63)); 9307: } //irpJmp 9308: 9309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9310: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9311: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9312: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9313: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 9314: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 9315: public static void irpAddqByte () throws M68kException { 9316: int ea = XEiJ.regOC & 63; 9317: int x; 9318: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9319: int z; 9320: if (ea < XEiJ.EA_AR) { //ADDQ.B #<data>,Dr 9321: XEiJ.mpuCycleCount += 4; 9322: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 9323: } else { //ADDQ.B #<data>,<mem> 9324: XEiJ.mpuCycleCount += 8; 9325: int a = efaMltByte (ea); 9326: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) + y)); 9327: } 9328: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9329: (~x & z) >>> 31 << 1 | 9330: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9331: } //irpAddqByte 9332: 9333: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9334: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9335: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9336: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9337: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 9338: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 9339: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 9340: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 9341: // 9342: //ADDQ.W #<data>,Ar 9343: // ソースを符号拡張してロングで加算する 9344: public static void irpAddqWord () throws M68kException { 9345: int ea = XEiJ.regOC & 63; 9346: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9347: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.W #<data>,Ar 9348: XEiJ.mpuCycleCount += 8; //MC68000 User's Manualに4と書いてあるのは8の間違い 9349: XEiJ.regRn[ea] += y; //ロングで計算する。このr[ea]はアドレスレジスタ 9350: //ccrは操作しない 9351: } else { 9352: int x; 9353: int z; 9354: if (ea < XEiJ.EA_AR) { //ADDQ.W #<data>,Dr 9355: XEiJ.mpuCycleCount += 4; 9356: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 9357: } else { //ADDQ.W #<data>,<mem> 9358: XEiJ.mpuCycleCount += 8; 9359: int a = efaMltWord (ea); 9360: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) + y)); 9361: } 9362: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9363: (~x & z) >>> 31 << 1 | 9364: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9365: } 9366: } //irpAddqWord 9367: 9368: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9369: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9370: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9371: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9372: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 9373: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 9374: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 9375: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 9376: public static void irpAddqLong () throws M68kException { 9377: int ea = XEiJ.regOC & 63; 9378: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9379: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.L #<data>,Ar 9380: XEiJ.mpuCycleCount += 8; 9381: XEiJ.regRn[ea] += y; //このr[ea]はアドレスレジスタ 9382: //ccrは操作しない 9383: } else { 9384: int x; 9385: int z; 9386: if (ea < XEiJ.EA_AR) { //ADDQ.L #<data>,Dr 9387: XEiJ.mpuCycleCount += 8; 9388: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 9389: } else { //ADDQ.L #<data>,<mem> 9390: XEiJ.mpuCycleCount += 12; 9391: int a = efaMltLong (ea); 9392: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y); 9393: } 9394: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9395: (~x & z) >>> 31 << 1 | 9396: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9397: } 9398: } //irpAddqLong 9399: 9400: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9401: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9402: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9403: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9404: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 9405: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 9406: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 9407: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 9408: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 9409: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9410: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9411: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9412: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 9413: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9414: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9415: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9416: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 9417: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9418: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9419: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9420: public static void irpSt () throws M68kException { 9421: int ea = XEiJ.regOC & 63; 9422: //DBT.W Dr,<label>よりもST.B Drを優先する 9423: if (ea < XEiJ.EA_AR) { //ST.B Dr 9424: XEiJ.mpuCycleCount += 6; 9425: XEiJ.regRn[ea] |= 0xff; 9426: } else if (ea < XEiJ.EA_MM) { //DBT.W Dr,<label> 9427: //条件が成立しているので通過 9428: XEiJ.mpuCycleCount += 12; 9429: XEiJ.regPC += 2; //オフセットを読み飛ばす 9430: if (M30_DIV_ZERO_V_FLAG) { 9431: m30DivZeroVFlag = !m30DivZeroVFlag; 9432: } 9433: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPT.W/TRAPT.L/TRAPT 9434: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9435: XEiJ.regPC += t; 9436: //条件が成立しているのでTRAPする 9437: XEiJ.mpuCycleCount += t << 1; 9438: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9439: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9440: throw M68kException.m6eSignal; 9441: } else { //ST.B <mem> 9442: XEiJ.mpuCycleCount += 8; 9443: XEiJ.busWb (efaMltByte (ea), 0xff); 9444: } 9445: } //irpSt 9446: 9447: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9448: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9449: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9450: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9451: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 9452: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 9453: public static void irpSubqByte () throws M68kException { 9454: int ea = XEiJ.regOC & 63; 9455: int x; 9456: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9457: int z; 9458: if (ea < XEiJ.EA_AR) { //SUBQ.B #<data>,Dr 9459: XEiJ.mpuCycleCount += 4; 9460: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 9461: } else { //SUBQ.B #<data>,<mem> 9462: XEiJ.mpuCycleCount += 8; 9463: int a = efaMltByte (ea); 9464: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) - y)); 9465: } 9466: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9467: (x & ~z) >>> 31 << 1 | 9468: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9469: } //irpSubqByte 9470: 9471: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9472: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9473: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9475: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 9476: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 9477: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 9478: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 9479: // 9480: //SUBQ.W #<data>,Ar 9481: // ソースを符号拡張してロングで減算する 9482: public static void irpSubqWord () throws M68kException { 9483: int ea = XEiJ.regOC & 63; 9484: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9485: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.W #<data>,Ar 9486: XEiJ.mpuCycleCount += 8; 9487: XEiJ.regRn[ea] -= y; //ロングで計算する。このr[ea]はアドレスレジスタ 9488: //ccrは操作しない 9489: } else { 9490: int x; 9491: int z; 9492: if (ea < XEiJ.EA_AR) { //SUBQ.W #<data>,Dr 9493: XEiJ.mpuCycleCount += 4; 9494: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 9495: } else { //SUBQ.W #<data>,<mem> 9496: XEiJ.mpuCycleCount += 8; 9497: int a = efaMltWord (ea); 9498: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) - y)); 9499: } 9500: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9501: (x & ~z) >>> 31 << 1 | 9502: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9503: } 9504: } //irpSubqWord 9505: 9506: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9507: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9508: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9509: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9510: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 9511: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 9512: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 9513: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 9514: public static void irpSubqLong () throws M68kException { 9515: int ea = XEiJ.regOC & 63; 9516: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9517: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.L #<data>,Ar 9518: XEiJ.mpuCycleCount += 8; 9519: XEiJ.regRn[ea] -= y; //このr[ea]はアドレスレジスタ 9520: //ccrは操作しない 9521: } else { 9522: int x; 9523: int z; 9524: if (ea < XEiJ.EA_AR) { //SUBQ.L #<data>,Dr 9525: XEiJ.mpuCycleCount += 8; 9526: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 9527: } else { //SUBQ.L #<data>,<mem> 9528: XEiJ.mpuCycleCount += 12; 9529: int a = efaMltLong (ea); 9530: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y); 9531: } 9532: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9533: (x & ~z) >>> 31 << 1 | 9534: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9535: } 9536: } //irpSubqLong 9537: 9538: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9539: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9540: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9542: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 9543: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 9544: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 9545: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9546: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9547: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 9548: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9549: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9550: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9551: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 9552: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9553: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9554: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9555: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 9556: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9557: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9558: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9559: public static void irpSf () throws M68kException { 9560: int ea = XEiJ.regOC & 63; 9561: //DBRA.W Dr,<label>よりもSF.B Drを優先する 9562: if (ea < XEiJ.EA_AR) { //SF.B Dr 9563: XEiJ.mpuCycleCount += 4; 9564: XEiJ.regRn[ea] &= ~0xff; 9565: } else if (ea < XEiJ.EA_MM) { //DBRA.W Dr,<label> 9566: //条件が成立していないのでデクリメント 9567: int rrr = XEiJ.regOC & 7; 9568: int t = XEiJ.regRn[rrr]; 9569: if ((short) t == 0) { //Drの下位16bitが0なので通過 9570: XEiJ.mpuCycleCount += 14; 9571: XEiJ.regRn[rrr] = t + 65535; 9572: XEiJ.regPC += 2; //オフセットを読み飛ばす 9573: } else { //Drの下位16bitが0でないのでジャンプ 9574: XEiJ.mpuCycleCount += 10; 9575: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9576: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9577: } 9578: if (M30_DIV_ZERO_V_FLAG) { 9579: m30DivZeroVFlag = !m30DivZeroVFlag; 9580: } 9581: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPF.W/TRAPF.L/TRAPF 9582: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9583: XEiJ.regPC += t; 9584: //条件が成立していないのでTRAPしない 9585: XEiJ.mpuCycleCount += 4 + (t << 1); 9586: } else { //SF.B <mem> 9587: XEiJ.mpuCycleCount += 8; 9588: XEiJ.busWb (efaMltByte (ea), 0x00); 9589: } 9590: } //irpSf 9591: 9592: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9593: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9594: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9595: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9596: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 9597: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 9598: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 9599: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 9600: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 9601: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9602: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9603: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9604: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 9605: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9606: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9607: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9608: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 9609: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9610: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9611: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9612: public static void irpShi () throws M68kException { 9613: int ea = XEiJ.regOC & 63; 9614: if (ea >> 3 == XEiJ.MMM_AR) { //DBHI.W Dr,<label> 9615: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { 9616: //条件が成立しているので通過 9617: XEiJ.mpuCycleCount += 12; 9618: XEiJ.regPC += 2; //オフセットを読み飛ばす 9619: } else { 9620: //条件が成立していないのでデクリメント 9621: int rrr = XEiJ.regOC & 7; 9622: int t = XEiJ.regRn[rrr]; 9623: if ((short) t == 0) { //Drの下位16bitが0なので通過 9624: XEiJ.mpuCycleCount += 14; 9625: XEiJ.regRn[rrr] = t + 65535; 9626: XEiJ.regPC += 2; //オフセットを読み飛ばす 9627: } else { //Drの下位16bitが0でないのでジャンプ 9628: XEiJ.mpuCycleCount += 10; 9629: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9630: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9631: } 9632: } 9633: if (M30_DIV_ZERO_V_FLAG) { 9634: m30DivZeroVFlag = !m30DivZeroVFlag; 9635: } 9636: } else if (ea < XEiJ.EA_AR) { //SHI.B Dr 9637: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //セット 9638: XEiJ.mpuCycleCount += 6; 9639: XEiJ.regRn[ea] |= 0xff; 9640: } else { //クリア 9641: XEiJ.mpuCycleCount += 4; 9642: XEiJ.regRn[ea] &= ~0xff; 9643: } 9644: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHI.W/TRAPHI.L/TRAPHI 9645: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9646: XEiJ.regPC += t; 9647: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { 9648: //条件が成立しているのでTRAPする 9649: XEiJ.mpuCycleCount += t << 1; 9650: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9651: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9652: throw M68kException.m6eSignal; 9653: } else { 9654: //条件が成立していないのでTRAPしない 9655: XEiJ.mpuCycleCount += 4 + (t << 1); 9656: } 9657: } else { //SHI.B <mem> 9658: XEiJ.mpuCycleCount += 8; 9659: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_HI << XEiJ.regCCR >> 31); 9660: } 9661: } //irpShi 9662: 9663: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9664: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9665: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9666: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9667: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 9668: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 9669: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 9670: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 9671: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 9672: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9673: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9674: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9675: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 9676: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9677: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9678: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9679: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 9680: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9681: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9682: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9683: public static void irpSls () throws M68kException { 9684: int ea = XEiJ.regOC & 63; 9685: if (ea >> 3 == XEiJ.MMM_AR) { //DBLS.W Dr,<label> 9686: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { 9687: //条件が成立しているので通過 9688: XEiJ.mpuCycleCount += 12; 9689: XEiJ.regPC += 2; //オフセットを読み飛ばす 9690: } else { 9691: //条件が成立していないのでデクリメント 9692: int rrr = XEiJ.regOC & 7; 9693: int t = XEiJ.regRn[rrr]; 9694: if ((short) t == 0) { //Drの下位16bitが0なので通過 9695: XEiJ.mpuCycleCount += 14; 9696: XEiJ.regRn[rrr] = t + 65535; 9697: XEiJ.regPC += 2; //オフセットを読み飛ばす 9698: } else { //Drの下位16bitが0でないのでジャンプ 9699: XEiJ.mpuCycleCount += 10; 9700: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9701: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9702: } 9703: } 9704: if (M30_DIV_ZERO_V_FLAG) { 9705: m30DivZeroVFlag = !m30DivZeroVFlag; 9706: } 9707: } else if (ea < XEiJ.EA_AR) { //SLS.B Dr 9708: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //セット 9709: XEiJ.mpuCycleCount += 6; 9710: XEiJ.regRn[ea] |= 0xff; 9711: } else { //クリア 9712: XEiJ.mpuCycleCount += 4; 9713: XEiJ.regRn[ea] &= ~0xff; 9714: } 9715: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLS.W/TRAPLS.L/TRAPLS 9716: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9717: XEiJ.regPC += t; 9718: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { 9719: //条件が成立しているのでTRAPする 9720: XEiJ.mpuCycleCount += t << 1; 9721: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9722: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9723: throw M68kException.m6eSignal; 9724: } else { 9725: //条件が成立していないのでTRAPしない 9726: XEiJ.mpuCycleCount += 4 + (t << 1); 9727: } 9728: } else { //SLS.B <mem> 9729: XEiJ.mpuCycleCount += 8; 9730: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LS << XEiJ.regCCR >> 31); 9731: } 9732: } //irpSls 9733: 9734: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9735: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9736: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9737: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9738: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 9739: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9740: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9741: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9742: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 9743: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9744: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9745: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9746: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 9747: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9748: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9749: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9750: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9751: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9752: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9753: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9754: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 9755: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9756: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9757: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9758: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9759: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9760: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9761: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9762: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 9763: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9764: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9765: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9766: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9767: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9768: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9769: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9770: public static void irpShs () throws M68kException { 9771: int ea = XEiJ.regOC & 63; 9772: if (ea >> 3 == XEiJ.MMM_AR) { //DBHS.W Dr,<label> 9773: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { 9774: //条件が成立しているので通過 9775: XEiJ.mpuCycleCount += 12; 9776: XEiJ.regPC += 2; //オフセットを読み飛ばす 9777: } else { 9778: //条件が成立していないのでデクリメント 9779: int rrr = XEiJ.regOC & 7; 9780: int t = XEiJ.regRn[rrr]; 9781: if ((short) t == 0) { //Drの下位16bitが0なので通過 9782: XEiJ.mpuCycleCount += 14; 9783: XEiJ.regRn[rrr] = t + 65535; 9784: XEiJ.regPC += 2; //オフセットを読み飛ばす 9785: } else { //Drの下位16bitが0でないのでジャンプ 9786: XEiJ.mpuCycleCount += 10; 9787: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9788: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9789: } 9790: } 9791: if (M30_DIV_ZERO_V_FLAG) { 9792: m30DivZeroVFlag = !m30DivZeroVFlag; 9793: } 9794: } else if (ea < XEiJ.EA_AR) { //SHS.B Dr 9795: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //セット 9796: XEiJ.mpuCycleCount += 6; 9797: XEiJ.regRn[ea] |= 0xff; 9798: } else { //クリア 9799: XEiJ.mpuCycleCount += 4; 9800: XEiJ.regRn[ea] &= ~0xff; 9801: } 9802: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHS.W/TRAPHS.L/TRAPHS 9803: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9804: XEiJ.regPC += t; 9805: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { 9806: //条件が成立しているのでTRAPする 9807: XEiJ.mpuCycleCount += t << 1; 9808: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9809: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9810: throw M68kException.m6eSignal; 9811: } else { 9812: //条件が成立していないのでTRAPしない 9813: XEiJ.mpuCycleCount += 4 + (t << 1); 9814: } 9815: } else { //SHS.B <mem> 9816: XEiJ.mpuCycleCount += 8; 9817: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_HS << XEiJ.regCCR >> 31); 9818: } 9819: } //irpShs 9820: 9821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9822: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9823: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9824: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9825: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 9826: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9827: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9828: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9829: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 9830: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9831: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9832: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9833: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 9834: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9835: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9836: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9837: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9838: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9839: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9840: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9841: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 9842: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9843: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9844: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9845: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9846: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9847: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9848: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9849: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 9850: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9851: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9852: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9853: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9854: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9855: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9856: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9857: public static void irpSlo () throws M68kException { 9858: int ea = XEiJ.regOC & 63; 9859: if (ea >> 3 == XEiJ.MMM_AR) { //DBLO.W Dr,<label> 9860: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { 9861: //条件が成立しているので通過 9862: XEiJ.mpuCycleCount += 12; 9863: XEiJ.regPC += 2; //オフセットを読み飛ばす 9864: } else { 9865: //条件が成立していないのでデクリメント 9866: int rrr = XEiJ.regOC & 7; 9867: int t = XEiJ.regRn[rrr]; 9868: if ((short) t == 0) { //Drの下位16bitが0なので通過 9869: XEiJ.mpuCycleCount += 14; 9870: XEiJ.regRn[rrr] = t + 65535; 9871: XEiJ.regPC += 2; //オフセットを読み飛ばす 9872: } else { //Drの下位16bitが0でないのでジャンプ 9873: XEiJ.mpuCycleCount += 10; 9874: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9875: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9876: } 9877: } 9878: if (M30_DIV_ZERO_V_FLAG) { 9879: m30DivZeroVFlag = !m30DivZeroVFlag; 9880: } 9881: } else if (ea < XEiJ.EA_AR) { //SLO.B Dr 9882: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //セット 9883: XEiJ.mpuCycleCount += 6; 9884: XEiJ.regRn[ea] |= 0xff; 9885: } else { //クリア 9886: XEiJ.mpuCycleCount += 4; 9887: XEiJ.regRn[ea] &= ~0xff; 9888: } 9889: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLO.W/TRAPLO.L/TRAPLO 9890: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9891: XEiJ.regPC += t; 9892: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { 9893: //条件が成立しているのでTRAPする 9894: XEiJ.mpuCycleCount += t << 1; 9895: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9896: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9897: throw M68kException.m6eSignal; 9898: } else { 9899: //条件が成立していないのでTRAPしない 9900: XEiJ.mpuCycleCount += 4 + (t << 1); 9901: } 9902: } else { //SLO.B <mem> 9903: XEiJ.mpuCycleCount += 8; 9904: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LO << XEiJ.regCCR >> 31); 9905: } 9906: } //irpSlo 9907: 9908: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9909: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9910: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9911: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9912: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 9913: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9914: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9915: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9916: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 9917: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9918: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9919: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9920: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 9921: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9922: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9923: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9924: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9925: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9926: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9927: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9928: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 9929: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9930: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9931: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9932: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9933: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9934: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9935: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9936: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 9937: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9938: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9939: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9940: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9941: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9942: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9943: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9944: public static void irpSne () throws M68kException { 9945: int ea = XEiJ.regOC & 63; 9946: if (ea >> 3 == XEiJ.MMM_AR) { //DBNE.W Dr,<label> 9947: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { 9948: //条件が成立しているので通過 9949: XEiJ.mpuCycleCount += 12; 9950: XEiJ.regPC += 2; //オフセットを読み飛ばす 9951: } else { 9952: //条件が成立していないのでデクリメント 9953: int rrr = XEiJ.regOC & 7; 9954: int t = XEiJ.regRn[rrr]; 9955: if ((short) t == 0) { //Drの下位16bitが0なので通過 9956: XEiJ.mpuCycleCount += 14; 9957: XEiJ.regRn[rrr] = t + 65535; 9958: XEiJ.regPC += 2; //オフセットを読み飛ばす 9959: } else { //Drの下位16bitが0でないのでジャンプ 9960: XEiJ.mpuCycleCount += 10; 9961: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9962: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9963: } 9964: } 9965: if (M30_DIV_ZERO_V_FLAG) { 9966: m30DivZeroVFlag = !m30DivZeroVFlag; 9967: } 9968: } else if (ea < XEiJ.EA_AR) { //SNE.B Dr 9969: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //セット 9970: XEiJ.mpuCycleCount += 6; 9971: XEiJ.regRn[ea] |= 0xff; 9972: } else { //クリア 9973: XEiJ.mpuCycleCount += 4; 9974: XEiJ.regRn[ea] &= ~0xff; 9975: } 9976: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPNE.W/TRAPNE.L/TRAPNE 9977: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9978: XEiJ.regPC += t; 9979: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { 9980: //条件が成立しているのでTRAPする 9981: XEiJ.mpuCycleCount += t << 1; 9982: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9983: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9984: throw M68kException.m6eSignal; 9985: } else { 9986: //条件が成立していないのでTRAPしない 9987: XEiJ.mpuCycleCount += 4 + (t << 1); 9988: } 9989: } else { //SNE.B <mem> 9990: XEiJ.mpuCycleCount += 8; 9991: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_NE << XEiJ.regCCR >> 31); 9992: } 9993: } //irpSne 9994: 9995: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9996: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9997: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9998: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9999: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 10000: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 10001: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 10002: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 10003: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 10004: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 10005: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 10006: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 10007: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 10008: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10009: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10010: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10011: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10012: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10013: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10014: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 10015: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 10016: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10017: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10018: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10019: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10020: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10021: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10022: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 10023: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 10024: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10025: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10026: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10027: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10028: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10029: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10030: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 10031: public static void irpSeq () throws M68kException { 10032: int ea = XEiJ.regOC & 63; 10033: if (ea >> 3 == XEiJ.MMM_AR) { //DBEQ.W Dr,<label> 10034: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { 10035: //条件が成立しているので通過 10036: XEiJ.mpuCycleCount += 12; 10037: XEiJ.regPC += 2; //オフセットを読み飛ばす 10038: } else { 10039: //条件が成立していないのでデクリメント 10040: int rrr = XEiJ.regOC & 7; 10041: int t = XEiJ.regRn[rrr]; 10042: if ((short) t == 0) { //Drの下位16bitが0なので通過 10043: XEiJ.mpuCycleCount += 14; 10044: XEiJ.regRn[rrr] = t + 65535; 10045: XEiJ.regPC += 2; //オフセットを読み飛ばす 10046: } else { //Drの下位16bitが0でないのでジャンプ 10047: XEiJ.mpuCycleCount += 10; 10048: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10049: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10050: } 10051: } 10052: if (M30_DIV_ZERO_V_FLAG) { 10053: m30DivZeroVFlag = !m30DivZeroVFlag; 10054: } 10055: } else if (ea < XEiJ.EA_AR) { //SEQ.B Dr 10056: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //セット 10057: XEiJ.mpuCycleCount += 6; 10058: XEiJ.regRn[ea] |= 0xff; 10059: } else { //クリア 10060: XEiJ.mpuCycleCount += 4; 10061: XEiJ.regRn[ea] &= ~0xff; 10062: } 10063: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPEQ.W/TRAPEQ.L/TRAPEQ 10064: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10065: XEiJ.regPC += t; 10066: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { 10067: //条件が成立しているのでTRAPする 10068: XEiJ.mpuCycleCount += t << 1; 10069: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10070: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10071: throw M68kException.m6eSignal; 10072: } else { 10073: //条件が成立していないのでTRAPしない 10074: XEiJ.mpuCycleCount += 4 + (t << 1); 10075: } 10076: } else { //SEQ.B <mem> 10077: XEiJ.mpuCycleCount += 8; 10078: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_EQ << XEiJ.regCCR >> 31); 10079: } 10080: } //irpSeq 10081: 10082: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10083: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10084: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10085: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10086: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 10087: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 10088: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 10089: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 10090: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 10091: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 10092: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 10093: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 10094: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 10095: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 10096: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 10097: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 10098: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 10099: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 10100: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 10101: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 10102: public static void irpSvc () throws M68kException { 10103: int ea = XEiJ.regOC & 63; 10104: if (ea >> 3 == XEiJ.MMM_AR) { //DBVC.W Dr,<label> 10105: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { 10106: //条件が成立しているので通過 10107: XEiJ.mpuCycleCount += 12; 10108: XEiJ.regPC += 2; //オフセットを読み飛ばす 10109: } else { 10110: //条件が成立していないのでデクリメント 10111: int rrr = XEiJ.regOC & 7; 10112: int t = XEiJ.regRn[rrr]; 10113: if ((short) t == 0) { //Drの下位16bitが0なので通過 10114: XEiJ.mpuCycleCount += 14; 10115: XEiJ.regRn[rrr] = t + 65535; 10116: XEiJ.regPC += 2; //オフセットを読み飛ばす 10117: } else { //Drの下位16bitが0でないのでジャンプ 10118: XEiJ.mpuCycleCount += 10; 10119: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10120: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10121: } 10122: } 10123: if (M30_DIV_ZERO_V_FLAG) { 10124: m30DivZeroVFlag = !m30DivZeroVFlag; 10125: } 10126: } else if (ea < XEiJ.EA_AR) { //SVC.B Dr 10127: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //セット 10128: XEiJ.mpuCycleCount += 6; 10129: XEiJ.regRn[ea] |= 0xff; 10130: } else { //クリア 10131: XEiJ.mpuCycleCount += 4; 10132: XEiJ.regRn[ea] &= ~0xff; 10133: } 10134: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVC.W/TRAPVC.L/TRAPVC 10135: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10136: XEiJ.regPC += t; 10137: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { 10138: //条件が成立しているのでTRAPする 10139: XEiJ.mpuCycleCount += t << 1; 10140: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10141: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10142: throw M68kException.m6eSignal; 10143: } else { 10144: //条件が成立していないのでTRAPしない 10145: XEiJ.mpuCycleCount += 4 + (t << 1); 10146: } 10147: } else { //SVC.B <mem> 10148: XEiJ.mpuCycleCount += 8; 10149: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_VC << XEiJ.regCCR >> 31); 10150: } 10151: } //irpSvc 10152: 10153: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10154: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10155: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10156: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10157: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 10158: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 10159: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 10160: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 10161: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 10162: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10163: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10164: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10165: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 10166: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10167: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10168: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10169: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 10170: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10171: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10172: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10173: public static void irpSvs () throws M68kException { 10174: int ea = XEiJ.regOC & 63; 10175: if (ea >> 3 == XEiJ.MMM_AR) { //DBVS.W Dr,<label> 10176: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { 10177: //条件が成立しているので通過 10178: XEiJ.mpuCycleCount += 12; 10179: XEiJ.regPC += 2; //オフセットを読み飛ばす 10180: } else { 10181: //条件が成立していないのでデクリメント 10182: int rrr = XEiJ.regOC & 7; 10183: int t = XEiJ.regRn[rrr]; 10184: if ((short) t == 0) { //Drの下位16bitが0なので通過 10185: XEiJ.mpuCycleCount += 14; 10186: XEiJ.regRn[rrr] = t + 65535; 10187: XEiJ.regPC += 2; //オフセットを読み飛ばす 10188: } else { //Drの下位16bitが0でないのでジャンプ 10189: XEiJ.mpuCycleCount += 10; 10190: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10191: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10192: } 10193: } 10194: if (M30_DIV_ZERO_V_FLAG) { 10195: m30DivZeroVFlag = !m30DivZeroVFlag; 10196: } 10197: } else if (ea < XEiJ.EA_AR) { //SVS.B Dr 10198: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //セット 10199: XEiJ.mpuCycleCount += 6; 10200: XEiJ.regRn[ea] |= 0xff; 10201: } else { //クリア 10202: XEiJ.mpuCycleCount += 4; 10203: XEiJ.regRn[ea] &= ~0xff; 10204: } 10205: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVS.W/TRAPVS.L/TRAPVS 10206: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10207: XEiJ.regPC += t; 10208: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { 10209: //条件が成立しているのでTRAPする 10210: XEiJ.mpuCycleCount += t << 1; 10211: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10212: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10213: throw M68kException.m6eSignal; 10214: } else { 10215: //条件が成立していないのでTRAPしない 10216: XEiJ.mpuCycleCount += 4 + (t << 1); 10217: } 10218: } else { //SVS.B <mem> 10219: XEiJ.mpuCycleCount += 8; 10220: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_VS << XEiJ.regCCR >> 31); 10221: } 10222: } //irpSvs 10223: 10224: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10225: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10226: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10227: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10228: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 10229: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 10230: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 10231: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 10232: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 10233: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10234: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10235: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10236: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 10237: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10238: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10239: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10240: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 10241: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10242: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10243: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10244: public static void irpSpl () throws M68kException { 10245: int ea = XEiJ.regOC & 63; 10246: if (ea >> 3 == XEiJ.MMM_AR) { //DBPL.W Dr,<label> 10247: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { 10248: //条件が成立しているので通過 10249: XEiJ.mpuCycleCount += 12; 10250: XEiJ.regPC += 2; //オフセットを読み飛ばす 10251: } else { 10252: //条件が成立していないのでデクリメント 10253: int rrr = XEiJ.regOC & 7; 10254: int t = XEiJ.regRn[rrr]; 10255: if ((short) t == 0) { //Drの下位16bitが0なので通過 10256: XEiJ.mpuCycleCount += 14; 10257: XEiJ.regRn[rrr] = t + 65535; 10258: XEiJ.regPC += 2; //オフセットを読み飛ばす 10259: } else { //Drの下位16bitが0でないのでジャンプ 10260: XEiJ.mpuCycleCount += 10; 10261: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10262: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10263: } 10264: } 10265: if (M30_DIV_ZERO_V_FLAG) { 10266: m30DivZeroVFlag = !m30DivZeroVFlag; 10267: } 10268: } else if (ea < XEiJ.EA_AR) { //SPL.B Dr 10269: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //セット 10270: XEiJ.mpuCycleCount += 6; 10271: XEiJ.regRn[ea] |= 0xff; 10272: } else { //クリア 10273: XEiJ.mpuCycleCount += 4; 10274: XEiJ.regRn[ea] &= ~0xff; 10275: } 10276: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPPL.W/TRAPPL.L/TRAPPL 10277: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10278: XEiJ.regPC += t; 10279: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { 10280: //条件が成立しているのでTRAPする 10281: XEiJ.mpuCycleCount += t << 1; 10282: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10283: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10284: throw M68kException.m6eSignal; 10285: } else { 10286: //条件が成立していないのでTRAPしない 10287: XEiJ.mpuCycleCount += 4 + (t << 1); 10288: } 10289: } else { //SPL.B <mem> 10290: XEiJ.mpuCycleCount += 8; 10291: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_PL << XEiJ.regCCR >> 31); 10292: } 10293: } //irpSpl 10294: 10295: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10296: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10297: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10298: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10299: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 10300: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 10301: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 10302: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 10303: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 10304: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10305: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10306: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10307: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 10308: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10309: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10310: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10311: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 10312: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10313: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10314: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10315: public static void irpSmi () throws M68kException { 10316: int ea = XEiJ.regOC & 63; 10317: if (ea >> 3 == XEiJ.MMM_AR) { //DBMI.W Dr,<label> 10318: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { 10319: //条件が成立しているので通過 10320: XEiJ.mpuCycleCount += 12; 10321: XEiJ.regPC += 2; //オフセットを読み飛ばす 10322: } else { 10323: //条件が成立していないのでデクリメント 10324: int rrr = XEiJ.regOC & 7; 10325: int t = XEiJ.regRn[rrr]; 10326: if ((short) t == 0) { //Drの下位16bitが0なので通過 10327: XEiJ.mpuCycleCount += 14; 10328: XEiJ.regRn[rrr] = t + 65535; 10329: XEiJ.regPC += 2; //オフセットを読み飛ばす 10330: } else { //Drの下位16bitが0でないのでジャンプ 10331: XEiJ.mpuCycleCount += 10; 10332: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10333: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10334: } 10335: } 10336: if (M30_DIV_ZERO_V_FLAG) { 10337: m30DivZeroVFlag = !m30DivZeroVFlag; 10338: } 10339: } else if (ea < XEiJ.EA_AR) { //SMI.B Dr 10340: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //セット 10341: XEiJ.mpuCycleCount += 6; 10342: XEiJ.regRn[ea] |= 0xff; 10343: } else { //クリア 10344: XEiJ.mpuCycleCount += 4; 10345: XEiJ.regRn[ea] &= ~0xff; 10346: } 10347: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPMI.W/TRAPMI.L/TRAPMI 10348: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10349: XEiJ.regPC += t; 10350: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { 10351: //条件が成立しているのでTRAPする 10352: XEiJ.mpuCycleCount += t << 1; 10353: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10354: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10355: throw M68kException.m6eSignal; 10356: } else { 10357: //条件が成立していないのでTRAPしない 10358: XEiJ.mpuCycleCount += 4 + (t << 1); 10359: } 10360: } else { //SMI.B <mem> 10361: XEiJ.mpuCycleCount += 8; 10362: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_MI << XEiJ.regCCR >> 31); 10363: } 10364: } //irpSmi 10365: 10366: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10367: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10368: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10369: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10370: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 10371: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 10372: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 10373: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 10374: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 10375: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10376: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10377: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10378: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 10379: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10380: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10381: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10382: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 10383: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10384: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10385: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10386: public static void irpSge () throws M68kException { 10387: int ea = XEiJ.regOC & 63; 10388: if (ea >> 3 == XEiJ.MMM_AR) { //DBGE.W Dr,<label> 10389: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { 10390: //条件が成立しているので通過 10391: XEiJ.mpuCycleCount += 12; 10392: XEiJ.regPC += 2; //オフセットを読み飛ばす 10393: } else { 10394: //条件が成立していないのでデクリメント 10395: int rrr = XEiJ.regOC & 7; 10396: int t = XEiJ.regRn[rrr]; 10397: if ((short) t == 0) { //Drの下位16bitが0なので通過 10398: XEiJ.mpuCycleCount += 14; 10399: XEiJ.regRn[rrr] = t + 65535; 10400: XEiJ.regPC += 2; //オフセットを読み飛ばす 10401: } else { //Drの下位16bitが0でないのでジャンプ 10402: XEiJ.mpuCycleCount += 10; 10403: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10404: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10405: } 10406: } 10407: if (M30_DIV_ZERO_V_FLAG) { 10408: m30DivZeroVFlag = !m30DivZeroVFlag; 10409: } 10410: } else if (ea < XEiJ.EA_AR) { //SGE.B Dr 10411: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //セット 10412: XEiJ.mpuCycleCount += 6; 10413: XEiJ.regRn[ea] |= 0xff; 10414: } else { //クリア 10415: XEiJ.mpuCycleCount += 4; 10416: XEiJ.regRn[ea] &= ~0xff; 10417: } 10418: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGE.W/TRAPGE.L/TRAPGE 10419: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10420: XEiJ.regPC += t; 10421: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { 10422: //条件が成立しているのでTRAPする 10423: XEiJ.mpuCycleCount += t << 1; 10424: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10425: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10426: throw M68kException.m6eSignal; 10427: } else { 10428: //条件が成立していないのでTRAPしない 10429: XEiJ.mpuCycleCount += 4 + (t << 1); 10430: } 10431: } else { //SGE.B <mem> 10432: XEiJ.mpuCycleCount += 8; 10433: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_GE << XEiJ.regCCR >> 31); 10434: } 10435: } //irpSge 10436: 10437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10441: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 10442: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 10443: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 10444: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 10445: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 10446: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10447: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10448: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10449: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 10450: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10451: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10452: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10453: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 10454: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10455: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10456: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10457: public static void irpSlt () throws M68kException { 10458: int ea = XEiJ.regOC & 63; 10459: if (ea >> 3 == XEiJ.MMM_AR) { //DBLT.W Dr,<label> 10460: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { 10461: //条件が成立しているので通過 10462: XEiJ.mpuCycleCount += 12; 10463: XEiJ.regPC += 2; //オフセットを読み飛ばす 10464: } else { 10465: //条件が成立していないのでデクリメント 10466: int rrr = XEiJ.regOC & 7; 10467: int t = XEiJ.regRn[rrr]; 10468: if ((short) t == 0) { //Drの下位16bitが0なので通過 10469: XEiJ.mpuCycleCount += 14; 10470: XEiJ.regRn[rrr] = t + 65535; 10471: XEiJ.regPC += 2; //オフセットを読み飛ばす 10472: } else { //Drの下位16bitが0でないのでジャンプ 10473: XEiJ.mpuCycleCount += 10; 10474: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10475: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10476: } 10477: } 10478: if (M30_DIV_ZERO_V_FLAG) { 10479: m30DivZeroVFlag = !m30DivZeroVFlag; 10480: } 10481: } else if (ea < XEiJ.EA_AR) { //SLT.B Dr 10482: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //セット 10483: XEiJ.mpuCycleCount += 6; 10484: XEiJ.regRn[ea] |= 0xff; 10485: } else { //クリア 10486: XEiJ.mpuCycleCount += 4; 10487: XEiJ.regRn[ea] &= ~0xff; 10488: } 10489: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLT.W/TRAPLT.L/TRAPLT 10490: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10491: XEiJ.regPC += t; 10492: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { 10493: //条件が成立しているのでTRAPする 10494: XEiJ.mpuCycleCount += t << 1; 10495: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10496: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10497: throw M68kException.m6eSignal; 10498: } else { 10499: //条件が成立していないのでTRAPしない 10500: XEiJ.mpuCycleCount += 4 + (t << 1); 10501: } 10502: } else { //SLT.B <mem> 10503: XEiJ.mpuCycleCount += 8; 10504: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LT << XEiJ.regCCR >> 31); 10505: } 10506: } //irpSlt 10507: 10508: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10509: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10510: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10511: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10512: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 10513: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 10514: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 10515: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 10516: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 10517: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10518: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10519: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10520: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 10521: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10522: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10523: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10524: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 10525: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10526: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10527: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10528: public static void irpSgt () throws M68kException { 10529: int ea = XEiJ.regOC & 63; 10530: if (ea >> 3 == XEiJ.MMM_AR) { //DBGT.W Dr,<label> 10531: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { 10532: //条件が成立しているので通過 10533: XEiJ.mpuCycleCount += 12; 10534: XEiJ.regPC += 2; //オフセットを読み飛ばす 10535: } else { 10536: //条件が成立していないのでデクリメント 10537: int rrr = XEiJ.regOC & 7; 10538: int t = XEiJ.regRn[rrr]; 10539: if ((short) t == 0) { //Drの下位16bitが0なので通過 10540: XEiJ.mpuCycleCount += 14; 10541: XEiJ.regRn[rrr] = t + 65535; 10542: XEiJ.regPC += 2; //オフセットを読み飛ばす 10543: } else { //Drの下位16bitが0でないのでジャンプ 10544: XEiJ.mpuCycleCount += 10; 10545: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10546: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10547: } 10548: } 10549: if (M30_DIV_ZERO_V_FLAG) { 10550: m30DivZeroVFlag = !m30DivZeroVFlag; 10551: } 10552: } else if (ea < XEiJ.EA_AR) { //SGT.B Dr 10553: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //セット 10554: XEiJ.mpuCycleCount += 6; 10555: XEiJ.regRn[ea] |= 0xff; 10556: } else { //クリア 10557: XEiJ.mpuCycleCount += 4; 10558: XEiJ.regRn[ea] &= ~0xff; 10559: } 10560: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGT.W/TRAPGT.L/TRAPGT 10561: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10562: XEiJ.regPC += t; 10563: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { 10564: //条件が成立しているのでTRAPする 10565: XEiJ.mpuCycleCount += t << 1; 10566: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10567: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10568: throw M68kException.m6eSignal; 10569: } else { 10570: //条件が成立していないのでTRAPしない 10571: XEiJ.mpuCycleCount += 4 + (t << 1); 10572: } 10573: } else { //SGT.B <mem> 10574: XEiJ.mpuCycleCount += 8; 10575: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_GT << XEiJ.regCCR >> 31); 10576: } 10577: } //irpSgt 10578: 10579: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10580: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10581: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10582: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10583: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 10584: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 10585: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 10586: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 10587: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 10588: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10589: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10590: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10591: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 10592: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10593: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10594: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10595: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 10596: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10597: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10598: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10599: public static void irpSle () throws M68kException { 10600: int ea = XEiJ.regOC & 63; 10601: if (ea >> 3 == XEiJ.MMM_AR) { //DBLE.W Dr,<label> 10602: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { 10603: //条件が成立しているので通過 10604: XEiJ.mpuCycleCount += 12; 10605: XEiJ.regPC += 2; //オフセットを読み飛ばす 10606: } else { 10607: //条件が成立していないのでデクリメント 10608: int rrr = XEiJ.regOC & 7; 10609: int t = XEiJ.regRn[rrr]; 10610: if ((short) t == 0) { //Drの下位16bitが0なので通過 10611: XEiJ.mpuCycleCount += 14; 10612: XEiJ.regRn[rrr] = t + 65535; 10613: XEiJ.regPC += 2; //オフセットを読み飛ばす 10614: } else { //Drの下位16bitが0でないのでジャンプ 10615: XEiJ.mpuCycleCount += 10; 10616: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10617: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10618: } 10619: } 10620: if (M30_DIV_ZERO_V_FLAG) { 10621: m30DivZeroVFlag = !m30DivZeroVFlag; 10622: } 10623: } else if (ea < XEiJ.EA_AR) { //SLE.B Dr 10624: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //セット 10625: XEiJ.mpuCycleCount += 6; 10626: XEiJ.regRn[ea] |= 0xff; 10627: } else { //クリア 10628: XEiJ.mpuCycleCount += 4; 10629: XEiJ.regRn[ea] &= ~0xff; 10630: } 10631: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLE.W/TRAPLE.L/TRAPLE 10632: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10633: XEiJ.regPC += t; 10634: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { 10635: //条件が成立しているのでTRAPする 10636: XEiJ.mpuCycleCount += t << 1; 10637: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10638: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10639: throw M68kException.m6eSignal; 10640: } else { 10641: //条件が成立していないのでTRAPしない 10642: XEiJ.mpuCycleCount += 4 + (t << 1); 10643: } 10644: } else { //SLE.B <mem> 10645: XEiJ.mpuCycleCount += 8; 10646: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LE << XEiJ.regCCR >> 31); 10647: } 10648: } //irpSle 10649: 10650: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10651: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10652: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10653: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10654: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 10655: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 10656: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 10657: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 10658: public static void irpBrasw () throws M68kException { 10659: XEiJ.mpuCycleCount += 10; 10660: int t = XEiJ.regPC; //pc0+2 10661: int s = (byte) XEiJ.regOC; //オフセット 10662: if (s == 0) { //BRA.W 10663: XEiJ.regPC = t + 2; 10664: s = XEiJ.busRwse (t); //pcws 10665: } 10666: irpSetPC (t + s); //pc0+2+オフセット 10667: } //irpBrasw 10668: 10669: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10670: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10671: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10672: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10673: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 10674: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 10675: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10676: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10677: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10678: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10679: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 10680: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 10681: public static void irpBras () throws M68kException { 10682: XEiJ.mpuCycleCount += 10; 10683: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10684: } //irpBras 10685: 10686: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10687: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10688: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10689: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10690: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 10691: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 10692: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 10693: public static void irpBrasl () throws M68kException { 10694: int t = XEiJ.regPC; //pc0+2 10695: int s = (byte) XEiJ.regOC; //オフセット 10696: if (s == -1) { //BRA.L 10697: XEiJ.mpuCycleCount += 14; 10698: XEiJ.regPC = t + 4; 10699: s = XEiJ.busRlse (t); //pcls 10700: } else { //BRA.S 10701: XEiJ.mpuCycleCount += 10; 10702: } 10703: irpSetPC (t + s); //pc0+2+オフセット 10704: } //irpBrasl 10705: 10706: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10707: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10708: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10709: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10710: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 10711: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 10712: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 10713: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 10714: public static void irpBsrsw () throws M68kException { 10715: XEiJ.mpuCycleCount += 18; 10716: int t = XEiJ.regPC; //pc0+2 10717: int s = (byte) XEiJ.regOC; //オフセット 10718: if (s == 0) { //BSR.W 10719: XEiJ.regPC = t + 2; 10720: s = XEiJ.busRwse (t); //pcws 10721: } 10722: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 10723: irpSetPC (t + s); //pc0+2+オフセット 10724: } //irpBsrsw 10725: 10726: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10727: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10728: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10729: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10730: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 10731: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 10732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10733: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10734: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10736: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 10737: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 10738: public static void irpBsrs () throws M68kException { 10739: XEiJ.mpuCycleCount += 18; 10740: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 10741: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10742: } //irpBsrs 10743: 10744: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10745: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10746: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10747: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10748: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 10749: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 10750: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 10751: public static void irpBsrsl () throws M68kException { 10752: int t = XEiJ.regPC; //pc0+2 10753: int s = (byte) XEiJ.regOC; //オフセット 10754: if (s == -1) { //BSR.L 10755: XEiJ.mpuCycleCount += 22; 10756: XEiJ.regPC = t + 4; 10757: s = XEiJ.busRlse (t); //pcls 10758: } else { //BSR.S 10759: XEiJ.mpuCycleCount += 18; 10760: } 10761: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 10762: irpSetPC (t + s); //pc0+2+オフセット 10763: } //irpBsrsl 10764: 10765: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10766: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10767: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10768: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10769: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 10770: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10771: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10772: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10773: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 10774: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10775: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10776: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10777: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10778: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10779: public static void irpBhisw () throws M68kException { 10780: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //Bccでジャンプ 10781: XEiJ.mpuCycleCount += 10; 10782: int t = XEiJ.regPC; //pc0+2 10783: int s = (byte) XEiJ.regOC; //オフセット 10784: if (s == 0) { //Bcc.Wでジャンプ 10785: XEiJ.regPC = t + 2; 10786: s = XEiJ.busRwse (t); //pcws 10787: } 10788: irpSetPC (t + s); //pc0+2+オフセット 10789: } else if (XEiJ.regOC == 0x6200) { //Bcc.Wで通過 10790: XEiJ.mpuCycleCount += 12; 10791: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 10792: } else { //Bcc.Sで通過 10793: XEiJ.mpuCycleCount += 8; 10794: } 10795: } //irpBhisw 10796: 10797: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10798: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10799: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10800: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10801: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 10802: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10803: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10804: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10805: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10806: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10807: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10808: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10809: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 10810: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10811: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10812: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10813: public static void irpBhis () throws M68kException { 10814: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //Bccでジャンプ 10815: XEiJ.mpuCycleCount += 10; 10816: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10817: } else { //Bcc.Sで通過 10818: XEiJ.mpuCycleCount += 8; 10819: } 10820: } //irpBhis 10821: 10822: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10823: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10824: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10825: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10826: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 10827: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10828: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10829: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10830: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 10831: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 10832: public static void irpBhisl () throws M68kException { 10833: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //Bccでジャンプ 10834: int t = XEiJ.regPC; //pc0+2 10835: int s = (byte) XEiJ.regOC; //オフセット 10836: if (s == -1) { //Bcc.Lでジャンプ 10837: XEiJ.mpuCycleCount += 14; 10838: XEiJ.regPC = t + 4; 10839: s = XEiJ.busRlse (t); //pcls 10840: } else { //Bcc.Sでジャンプ 10841: XEiJ.mpuCycleCount += 10; 10842: } 10843: irpSetPC (t + s); //pc0+2+オフセット 10844: } else if (XEiJ.regOC == 0x62ff) { //Bcc.Lで通過 10845: XEiJ.mpuCycleCount += 12; 10846: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 10847: } else { //Bcc.Sで通過 10848: XEiJ.mpuCycleCount += 8; 10849: } 10850: } //irpBhisl 10851: 10852: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10853: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10854: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10855: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10856: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 10857: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10858: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10859: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10860: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 10861: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10862: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10863: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10864: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10865: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10866: public static void irpBlssw () throws M68kException { 10867: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //Bccでジャンプ 10868: XEiJ.mpuCycleCount += 10; 10869: int t = XEiJ.regPC; //pc0+2 10870: int s = (byte) XEiJ.regOC; //オフセット 10871: if (s == 0) { //Bcc.Wでジャンプ 10872: XEiJ.regPC = t + 2; 10873: s = XEiJ.busRwse (t); //pcws 10874: } 10875: irpSetPC (t + s); //pc0+2+オフセット 10876: } else if (XEiJ.regOC == 0x6300) { //Bcc.Wで通過 10877: XEiJ.mpuCycleCount += 12; 10878: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 10879: } else { //Bcc.Sで通過 10880: XEiJ.mpuCycleCount += 8; 10881: } 10882: } //irpBlssw 10883: 10884: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10885: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10886: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10887: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10888: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 10889: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10890: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10891: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10892: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10893: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10894: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10895: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10896: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 10897: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10898: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10899: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10900: public static void irpBlss () throws M68kException { 10901: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //Bccでジャンプ 10902: XEiJ.mpuCycleCount += 10; 10903: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10904: } else { //Bcc.Sで通過 10905: XEiJ.mpuCycleCount += 8; 10906: } 10907: } //irpBlss 10908: 10909: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10910: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10911: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10912: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10913: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 10914: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10915: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10916: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10917: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 10918: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 10919: public static void irpBlssl () throws M68kException { 10920: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //Bccでジャンプ 10921: int t = XEiJ.regPC; //pc0+2 10922: int s = (byte) XEiJ.regOC; //オフセット 10923: if (s == -1) { //Bcc.Lでジャンプ 10924: XEiJ.mpuCycleCount += 14; 10925: XEiJ.regPC = t + 4; 10926: s = XEiJ.busRlse (t); //pcls 10927: } else { //Bcc.Sでジャンプ 10928: XEiJ.mpuCycleCount += 10; 10929: } 10930: irpSetPC (t + s); //pc0+2+オフセット 10931: } else if (XEiJ.regOC == 0x63ff) { //Bcc.Lで通過 10932: XEiJ.mpuCycleCount += 12; 10933: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 10934: } else { //Bcc.Sで通過 10935: XEiJ.mpuCycleCount += 8; 10936: } 10937: } //irpBlssl 10938: 10939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10940: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10941: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10943: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 10944: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10945: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10946: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10947: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10948: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10949: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10950: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10951: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 10952: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10953: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10954: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10955: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10956: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10957: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10958: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10959: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10960: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10961: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10962: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10963: public static void irpBhssw () throws M68kException { 10964: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //Bccでジャンプ 10965: XEiJ.mpuCycleCount += 10; 10966: int t = XEiJ.regPC; //pc0+2 10967: int s = (byte) XEiJ.regOC; //オフセット 10968: if (s == 0) { //Bcc.Wでジャンプ 10969: XEiJ.regPC = t + 2; 10970: s = XEiJ.busRwse (t); //pcws 10971: } 10972: irpSetPC (t + s); //pc0+2+オフセット 10973: } else if (XEiJ.regOC == 0x6400) { //Bcc.Wで通過 10974: XEiJ.mpuCycleCount += 12; 10975: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 10976: } else { //Bcc.Sで通過 10977: XEiJ.mpuCycleCount += 8; 10978: } 10979: } //irpBhssw 10980: 10981: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10982: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10983: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10984: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10985: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 10986: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10987: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10988: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10989: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10990: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10991: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10992: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10993: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10994: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10995: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10996: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10997: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 10998: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10999: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 11000: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 11001: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 11002: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 11003: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 11004: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 11005: public static void irpBhss () throws M68kException { 11006: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //Bccでジャンプ 11007: XEiJ.mpuCycleCount += 10; 11008: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11009: } else { //Bcc.Sで通過 11010: XEiJ.mpuCycleCount += 8; 11011: } 11012: } //irpBhss 11013: 11014: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11015: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11016: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11017: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11018: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 11019: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11020: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11021: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11022: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11023: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11024: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11025: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 11026: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 11027: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 11028: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 11029: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 11030: public static void irpBhssl () throws M68kException { 11031: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //Bccでジャンプ 11032: int t = XEiJ.regPC; //pc0+2 11033: int s = (byte) XEiJ.regOC; //オフセット 11034: if (s == -1) { //Bcc.Lでジャンプ 11035: XEiJ.mpuCycleCount += 14; 11036: XEiJ.regPC = t + 4; 11037: s = XEiJ.busRlse (t); //pcls 11038: } else { //Bcc.Sでジャンプ 11039: XEiJ.mpuCycleCount += 10; 11040: } 11041: irpSetPC (t + s); //pc0+2+オフセット 11042: } else if (XEiJ.regOC == 0x64ff) { //Bcc.Lで通過 11043: XEiJ.mpuCycleCount += 12; 11044: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11045: } else { //Bcc.Sで通過 11046: XEiJ.mpuCycleCount += 8; 11047: } 11048: } //irpBhssl 11049: 11050: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11051: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11052: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11053: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11054: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 11055: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11056: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11057: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11058: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11059: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11060: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11061: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 11062: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 11063: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11064: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11065: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11066: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11067: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11068: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11069: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 11070: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 11071: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 11072: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 11073: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 11074: public static void irpBlosw () throws M68kException { 11075: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //Bccでジャンプ 11076: XEiJ.mpuCycleCount += 10; 11077: int t = XEiJ.regPC; //pc0+2 11078: int s = (byte) XEiJ.regOC; //オフセット 11079: if (s == 0) { //Bcc.Wでジャンプ 11080: XEiJ.regPC = t + 2; 11081: s = XEiJ.busRwse (t); //pcws 11082: } 11083: irpSetPC (t + s); //pc0+2+オフセット 11084: } else if (XEiJ.regOC == 0x6500) { //Bcc.Wで通過 11085: XEiJ.mpuCycleCount += 12; 11086: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11087: } else { //Bcc.Sで通過 11088: XEiJ.mpuCycleCount += 8; 11089: } 11090: } //irpBlosw 11091: 11092: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11093: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11094: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11095: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11096: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 11097: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11098: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11099: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11100: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11101: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11102: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11103: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11104: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11105: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11106: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11107: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11108: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 11109: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11110: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11111: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11112: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11113: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11114: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11115: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11116: public static void irpBlos () throws M68kException { 11117: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //Bccでジャンプ 11118: XEiJ.mpuCycleCount += 10; 11119: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11120: } else { //Bcc.Sで通過 11121: XEiJ.mpuCycleCount += 8; 11122: } 11123: } //irpBlos 11124: 11125: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11126: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11127: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11129: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 11130: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11131: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11132: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11133: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11134: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11135: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11136: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11137: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 11138: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11139: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11140: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11141: public static void irpBlosl () throws M68kException { 11142: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //Bccでジャンプ 11143: int t = XEiJ.regPC; //pc0+2 11144: int s = (byte) XEiJ.regOC; //オフセット 11145: if (s == -1) { //Bcc.Lでジャンプ 11146: XEiJ.mpuCycleCount += 14; 11147: XEiJ.regPC = t + 4; 11148: s = XEiJ.busRlse (t); //pcls 11149: } else { //Bcc.Sでジャンプ 11150: XEiJ.mpuCycleCount += 10; 11151: } 11152: irpSetPC (t + s); //pc0+2+オフセット 11153: } else if (XEiJ.regOC == 0x65ff) { //Bcc.Lで通過 11154: XEiJ.mpuCycleCount += 12; 11155: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11156: } else { //Bcc.Sで通過 11157: XEiJ.mpuCycleCount += 8; 11158: } 11159: } //irpBlosl 11160: 11161: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11162: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11163: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11164: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11165: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 11166: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11167: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11168: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11169: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11170: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11171: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11172: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11173: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 11174: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11175: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11176: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11177: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11178: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11179: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11180: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11181: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11182: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11183: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11184: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11185: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11186: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11187: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11188: public static void irpBnesw () throws M68kException { 11189: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //Bccでジャンプ 11190: XEiJ.mpuCycleCount += 10; 11191: int t = XEiJ.regPC; //pc0+2 11192: int s = (byte) XEiJ.regOC; //オフセット 11193: if (s == 0) { //Bcc.Wでジャンプ 11194: XEiJ.regPC = t + 2; 11195: s = XEiJ.busRwse (t); //pcws 11196: } 11197: irpSetPC (t + s); //pc0+2+オフセット 11198: } else if (XEiJ.regOC == 0x6600) { //Bcc.Wで通過 11199: XEiJ.mpuCycleCount += 12; 11200: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11201: } else { //Bcc.Sで通過 11202: XEiJ.mpuCycleCount += 8; 11203: } 11204: } //irpBnesw 11205: 11206: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11207: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11208: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11210: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 11211: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11212: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11213: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11214: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11215: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11216: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11217: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11218: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11219: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11220: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11221: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11222: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 11223: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11224: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11225: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11226: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11227: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11228: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11229: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11230: public static void irpBnes () throws M68kException { 11231: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //Bccでジャンプ 11232: XEiJ.mpuCycleCount += 10; 11233: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11234: } else { //Bcc.Sで通過 11235: XEiJ.mpuCycleCount += 8; 11236: } 11237: } //irpBnes 11238: 11239: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11240: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11241: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11242: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11243: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 11244: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11245: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11246: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11247: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11248: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11249: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11250: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11251: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 11252: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11253: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11254: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11255: public static void irpBnesl () throws M68kException { 11256: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //Bccでジャンプ 11257: int t = XEiJ.regPC; //pc0+2 11258: int s = (byte) XEiJ.regOC; //オフセット 11259: if (s == -1) { //Bcc.Lでジャンプ 11260: XEiJ.mpuCycleCount += 14; 11261: XEiJ.regPC = t + 4; 11262: s = XEiJ.busRlse (t); //pcls 11263: } else { //Bcc.Sでジャンプ 11264: XEiJ.mpuCycleCount += 10; 11265: } 11266: irpSetPC (t + s); //pc0+2+オフセット 11267: } else if (XEiJ.regOC == 0x66ff) { //Bcc.Lで通過 11268: XEiJ.mpuCycleCount += 12; 11269: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11270: } else { //Bcc.Sで通過 11271: XEiJ.mpuCycleCount += 8; 11272: } 11273: } //irpBnesl 11274: 11275: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11276: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11277: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11278: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11279: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 11280: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11281: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11282: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11283: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11284: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11285: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11286: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11287: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 11288: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11289: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11290: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11291: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11292: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11293: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11294: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11295: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 11296: public static void irpBeqsw () throws M68kException { 11297: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //Bccでジャンプ 11298: XEiJ.mpuCycleCount += 10; 11299: int t = XEiJ.regPC; //pc0+2 11300: int s = (byte) XEiJ.regOC; //オフセット 11301: if (s == 0) { //Bcc.Wでジャンプ 11302: XEiJ.regPC = t + 2; 11303: s = XEiJ.busRwse (t); //pcws 11304: } 11305: irpSetPC (t + s); //pc0+2+オフセット 11306: } else if (XEiJ.regOC == 0x6700) { //Bcc.Wで通過 11307: XEiJ.mpuCycleCount += 12; 11308: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11309: } else { //Bcc.Sで通過 11310: XEiJ.mpuCycleCount += 8; 11311: } 11312: } //irpBeqsw 11313: 11314: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11315: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11316: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11317: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11318: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 11319: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11320: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11321: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11322: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11323: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11324: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11325: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11326: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11327: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11328: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11329: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11330: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 11331: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11332: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11333: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11334: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11335: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11336: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11337: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11338: public static void irpBeqs () throws M68kException { 11339: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //Bccでジャンプ 11340: XEiJ.mpuCycleCount += 10; 11341: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11342: } else { //Bcc.Sで通過 11343: XEiJ.mpuCycleCount += 8; 11344: } 11345: } //irpBeqs 11346: 11347: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11348: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11349: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11350: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11351: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 11352: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11353: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11354: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11355: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11356: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11357: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11358: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11359: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 11360: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11361: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11362: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11363: public static void irpBeqsl () throws M68kException { 11364: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //Bccでジャンプ 11365: int t = XEiJ.regPC; //pc0+2 11366: int s = (byte) XEiJ.regOC; //オフセット 11367: if (s == -1) { //Bcc.Lでジャンプ 11368: XEiJ.mpuCycleCount += 14; 11369: XEiJ.regPC = t + 4; 11370: s = XEiJ.busRlse (t); //pcls 11371: } else { //Bcc.Sでジャンプ 11372: XEiJ.mpuCycleCount += 10; 11373: } 11374: irpSetPC (t + s); //pc0+2+オフセット 11375: } else if (XEiJ.regOC == 0x67ff) { //Bcc.Lで通過 11376: XEiJ.mpuCycleCount += 12; 11377: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11378: } else { //Bcc.Sで通過 11379: XEiJ.mpuCycleCount += 8; 11380: } 11381: } //irpBeqsl 11382: 11383: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11384: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11385: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11386: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11387: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 11388: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11389: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11390: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11391: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 11392: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11393: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11394: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11395: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11396: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11397: public static void irpBvcsw () throws M68kException { 11398: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //Bccでジャンプ 11399: XEiJ.mpuCycleCount += 10; 11400: int t = XEiJ.regPC; //pc0+2 11401: int s = (byte) XEiJ.regOC; //オフセット 11402: if (s == 0) { //Bcc.Wでジャンプ 11403: XEiJ.regPC = t + 2; 11404: s = XEiJ.busRwse (t); //pcws 11405: } 11406: irpSetPC (t + s); //pc0+2+オフセット 11407: } else if (XEiJ.regOC == 0x6800) { //Bcc.Wで通過 11408: XEiJ.mpuCycleCount += 12; 11409: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11410: } else { //Bcc.Sで通過 11411: XEiJ.mpuCycleCount += 8; 11412: } 11413: } //irpBvcsw 11414: 11415: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11416: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11417: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11418: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11419: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 11420: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11421: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11422: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11424: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11425: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11426: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11427: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 11428: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11429: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11430: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11431: public static void irpBvcs () throws M68kException { 11432: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //Bccでジャンプ 11433: XEiJ.mpuCycleCount += 10; 11434: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11435: } else { //Bcc.Sで通過 11436: XEiJ.mpuCycleCount += 8; 11437: } 11438: } //irpBvcs 11439: 11440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11441: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11442: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11443: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11444: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 11445: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11446: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11447: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11448: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 11449: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 11450: public static void irpBvcsl () throws M68kException { 11451: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //Bccでジャンプ 11452: int t = XEiJ.regPC; //pc0+2 11453: int s = (byte) XEiJ.regOC; //オフセット 11454: if (s == -1) { //Bcc.Lでジャンプ 11455: XEiJ.mpuCycleCount += 14; 11456: XEiJ.regPC = t + 4; 11457: s = XEiJ.busRlse (t); //pcls 11458: } else { //Bcc.Sでジャンプ 11459: XEiJ.mpuCycleCount += 10; 11460: } 11461: irpSetPC (t + s); //pc0+2+オフセット 11462: } else if (XEiJ.regOC == 0x68ff) { //Bcc.Lで通過 11463: XEiJ.mpuCycleCount += 12; 11464: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11465: } else { //Bcc.Sで通過 11466: XEiJ.mpuCycleCount += 8; 11467: } 11468: } //irpBvcsl 11469: 11470: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11471: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11472: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11473: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11474: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 11475: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11476: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11477: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11478: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 11479: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11480: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11481: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11482: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11483: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11484: public static void irpBvssw () throws M68kException { 11485: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //Bccでジャンプ 11486: XEiJ.mpuCycleCount += 10; 11487: int t = XEiJ.regPC; //pc0+2 11488: int s = (byte) XEiJ.regOC; //オフセット 11489: if (s == 0) { //Bcc.Wでジャンプ 11490: XEiJ.regPC = t + 2; 11491: s = XEiJ.busRwse (t); //pcws 11492: } 11493: irpSetPC (t + s); //pc0+2+オフセット 11494: } else if (XEiJ.regOC == 0x6900) { //Bcc.Wで通過 11495: XEiJ.mpuCycleCount += 12; 11496: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11497: } else { //Bcc.Sで通過 11498: XEiJ.mpuCycleCount += 8; 11499: } 11500: } //irpBvssw 11501: 11502: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11503: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11504: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11506: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 11507: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11508: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11509: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11510: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11511: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11512: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11513: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11514: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 11515: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11516: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11517: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11518: public static void irpBvss () throws M68kException { 11519: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //Bccでジャンプ 11520: XEiJ.mpuCycleCount += 10; 11521: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11522: } else { //Bcc.Sで通過 11523: XEiJ.mpuCycleCount += 8; 11524: } 11525: } //irpBvss 11526: 11527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11528: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11529: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11530: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11531: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 11532: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11533: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11534: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11535: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 11536: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 11537: public static void irpBvssl () throws M68kException { 11538: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //Bccでジャンプ 11539: int t = XEiJ.regPC; //pc0+2 11540: int s = (byte) XEiJ.regOC; //オフセット 11541: if (s == -1) { //Bcc.Lでジャンプ 11542: XEiJ.mpuCycleCount += 14; 11543: XEiJ.regPC = t + 4; 11544: s = XEiJ.busRlse (t); //pcls 11545: } else { //Bcc.Sでジャンプ 11546: XEiJ.mpuCycleCount += 10; 11547: } 11548: irpSetPC (t + s); //pc0+2+オフセット 11549: } else if (XEiJ.regOC == 0x69ff) { //Bcc.Lで通過 11550: XEiJ.mpuCycleCount += 12; 11551: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11552: } else { //Bcc.Sで通過 11553: XEiJ.mpuCycleCount += 8; 11554: } 11555: } //irpBvssl 11556: 11557: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11558: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11559: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11560: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11561: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 11562: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11563: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11564: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11565: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 11566: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11567: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11568: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11569: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11570: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11571: public static void irpBplsw () throws M68kException { 11572: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //Bccでジャンプ 11573: XEiJ.mpuCycleCount += 10; 11574: int t = XEiJ.regPC; //pc0+2 11575: int s = (byte) XEiJ.regOC; //オフセット 11576: if (s == 0) { //Bcc.Wでジャンプ 11577: XEiJ.regPC = t + 2; 11578: s = XEiJ.busRwse (t); //pcws 11579: } 11580: irpSetPC (t + s); //pc0+2+オフセット 11581: } else if (XEiJ.regOC == 0x6a00) { //Bcc.Wで通過 11582: XEiJ.mpuCycleCount += 12; 11583: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11584: } else { //Bcc.Sで通過 11585: XEiJ.mpuCycleCount += 8; 11586: } 11587: } //irpBplsw 11588: 11589: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11590: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11591: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11592: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11593: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 11594: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11595: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11596: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11597: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11598: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11599: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11600: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11601: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 11602: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11603: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11604: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11605: public static void irpBpls () throws M68kException { 11606: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //Bccでジャンプ 11607: XEiJ.mpuCycleCount += 10; 11608: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11609: } else { //Bcc.Sで通過 11610: XEiJ.mpuCycleCount += 8; 11611: } 11612: } //irpBpls 11613: 11614: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11615: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11616: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11617: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11618: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 11619: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11620: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11621: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11622: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 11623: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 11624: public static void irpBplsl () throws M68kException { 11625: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //Bccでジャンプ 11626: int t = XEiJ.regPC; //pc0+2 11627: int s = (byte) XEiJ.regOC; //オフセット 11628: if (s == -1) { //Bcc.Lでジャンプ 11629: XEiJ.mpuCycleCount += 14; 11630: XEiJ.regPC = t + 4; 11631: s = XEiJ.busRlse (t); //pcls 11632: } else { //Bcc.Sでジャンプ 11633: XEiJ.mpuCycleCount += 10; 11634: } 11635: irpSetPC (t + s); //pc0+2+オフセット 11636: } else if (XEiJ.regOC == 0x6aff) { //Bcc.Lで通過 11637: XEiJ.mpuCycleCount += 12; 11638: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11639: } else { //Bcc.Sで通過 11640: XEiJ.mpuCycleCount += 8; 11641: } 11642: } //irpBplsl 11643: 11644: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11645: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11646: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11647: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11648: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 11649: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11650: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11651: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11652: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 11653: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11654: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11655: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11656: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11657: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11658: public static void irpBmisw () throws M68kException { 11659: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //Bccでジャンプ 11660: XEiJ.mpuCycleCount += 10; 11661: int t = XEiJ.regPC; //pc0+2 11662: int s = (byte) XEiJ.regOC; //オフセット 11663: if (s == 0) { //Bcc.Wでジャンプ 11664: XEiJ.regPC = t + 2; 11665: s = XEiJ.busRwse (t); //pcws 11666: } 11667: irpSetPC (t + s); //pc0+2+オフセット 11668: } else if (XEiJ.regOC == 0x6b00) { //Bcc.Wで通過 11669: XEiJ.mpuCycleCount += 12; 11670: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11671: } else { //Bcc.Sで通過 11672: XEiJ.mpuCycleCount += 8; 11673: } 11674: } //irpBmisw 11675: 11676: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11677: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11678: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11679: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11680: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 11681: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11682: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11683: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11684: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11685: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11686: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11687: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11688: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 11689: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11690: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11691: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11692: public static void irpBmis () throws M68kException { 11693: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //Bccでジャンプ 11694: XEiJ.mpuCycleCount += 10; 11695: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11696: } else { //Bcc.Sで通過 11697: XEiJ.mpuCycleCount += 8; 11698: } 11699: } //irpBmis 11700: 11701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11702: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11703: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11704: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11705: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 11706: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11707: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11708: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11709: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 11710: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 11711: public static void irpBmisl () throws M68kException { 11712: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //Bccでジャンプ 11713: int t = XEiJ.regPC; //pc0+2 11714: int s = (byte) XEiJ.regOC; //オフセット 11715: if (s == -1) { //Bcc.Lでジャンプ 11716: XEiJ.mpuCycleCount += 14; 11717: XEiJ.regPC = t + 4; 11718: s = XEiJ.busRlse (t); //pcls 11719: } else { //Bcc.Sでジャンプ 11720: XEiJ.mpuCycleCount += 10; 11721: } 11722: irpSetPC (t + s); //pc0+2+オフセット 11723: } else if (XEiJ.regOC == 0x6bff) { //Bcc.Lで通過 11724: XEiJ.mpuCycleCount += 12; 11725: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11726: } else { //Bcc.Sで通過 11727: XEiJ.mpuCycleCount += 8; 11728: } 11729: } //irpBmisl 11730: 11731: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11732: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11733: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11734: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11735: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 11736: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11737: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11738: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11739: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 11740: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11741: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11742: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11743: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11744: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11745: public static void irpBgesw () throws M68kException { 11746: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //Bccでジャンプ 11747: XEiJ.mpuCycleCount += 10; 11748: int t = XEiJ.regPC; //pc0+2 11749: int s = (byte) XEiJ.regOC; //オフセット 11750: if (s == 0) { //Bcc.Wでジャンプ 11751: XEiJ.regPC = t + 2; 11752: s = XEiJ.busRwse (t); //pcws 11753: } 11754: irpSetPC (t + s); //pc0+2+オフセット 11755: } else if (XEiJ.regOC == 0x6c00) { //Bcc.Wで通過 11756: XEiJ.mpuCycleCount += 12; 11757: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11758: } else { //Bcc.Sで通過 11759: XEiJ.mpuCycleCount += 8; 11760: } 11761: } //irpBgesw 11762: 11763: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11764: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11765: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11767: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 11768: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11769: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11770: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11771: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11772: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11773: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11774: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11775: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 11776: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11777: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11778: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11779: public static void irpBges () throws M68kException { 11780: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //Bccでジャンプ 11781: XEiJ.mpuCycleCount += 10; 11782: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11783: } else { //Bcc.Sで通過 11784: XEiJ.mpuCycleCount += 8; 11785: } 11786: } //irpBges 11787: 11788: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11789: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11790: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11791: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11792: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 11793: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11794: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11795: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11796: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 11797: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 11798: public static void irpBgesl () throws M68kException { 11799: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //Bccでジャンプ 11800: int t = XEiJ.regPC; //pc0+2 11801: int s = (byte) XEiJ.regOC; //オフセット 11802: if (s == -1) { //Bcc.Lでジャンプ 11803: XEiJ.mpuCycleCount += 14; 11804: XEiJ.regPC = t + 4; 11805: s = XEiJ.busRlse (t); //pcls 11806: } else { //Bcc.Sでジャンプ 11807: XEiJ.mpuCycleCount += 10; 11808: } 11809: irpSetPC (t + s); //pc0+2+オフセット 11810: } else if (XEiJ.regOC == 0x6cff) { //Bcc.Lで通過 11811: XEiJ.mpuCycleCount += 12; 11812: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11813: } else { //Bcc.Sで通過 11814: XEiJ.mpuCycleCount += 8; 11815: } 11816: } //irpBgesl 11817: 11818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11822: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 11823: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11824: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11825: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11826: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 11827: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11828: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11829: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11830: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11831: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11832: public static void irpBltsw () throws M68kException { 11833: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //Bccでジャンプ 11834: XEiJ.mpuCycleCount += 10; 11835: int t = XEiJ.regPC; //pc0+2 11836: int s = (byte) XEiJ.regOC; //オフセット 11837: if (s == 0) { //Bcc.Wでジャンプ 11838: XEiJ.regPC = t + 2; 11839: s = XEiJ.busRwse (t); //pcws 11840: } 11841: irpSetPC (t + s); //pc0+2+オフセット 11842: } else if (XEiJ.regOC == 0x6d00) { //Bcc.Wで通過 11843: XEiJ.mpuCycleCount += 12; 11844: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11845: } else { //Bcc.Sで通過 11846: XEiJ.mpuCycleCount += 8; 11847: } 11848: } //irpBltsw 11849: 11850: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11851: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11852: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11853: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11854: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 11855: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11856: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11857: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11858: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11859: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11860: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11861: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11862: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 11863: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11864: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11865: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11866: public static void irpBlts () throws M68kException { 11867: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //Bccでジャンプ 11868: XEiJ.mpuCycleCount += 10; 11869: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11870: } else { //Bcc.Sで通過 11871: XEiJ.mpuCycleCount += 8; 11872: } 11873: } //irpBlts 11874: 11875: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11876: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11877: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11878: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11879: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 11880: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11881: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11882: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11883: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 11884: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 11885: public static void irpBltsl () throws M68kException { 11886: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //Bccでジャンプ 11887: int t = XEiJ.regPC; //pc0+2 11888: int s = (byte) XEiJ.regOC; //オフセット 11889: if (s == -1) { //Bcc.Lでジャンプ 11890: XEiJ.mpuCycleCount += 14; 11891: XEiJ.regPC = t + 4; 11892: s = XEiJ.busRlse (t); //pcls 11893: } else { //Bcc.Sでジャンプ 11894: XEiJ.mpuCycleCount += 10; 11895: } 11896: irpSetPC (t + s); //pc0+2+オフセット 11897: } else if (XEiJ.regOC == 0x6dff) { //Bcc.Lで通過 11898: XEiJ.mpuCycleCount += 12; 11899: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11900: } else { //Bcc.Sで通過 11901: XEiJ.mpuCycleCount += 8; 11902: } 11903: } //irpBltsl 11904: 11905: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11906: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11907: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11908: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11909: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 11910: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11911: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11912: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11913: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 11914: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11915: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11916: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11917: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11918: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11919: public static void irpBgtsw () throws M68kException { 11920: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //Bccでジャンプ 11921: XEiJ.mpuCycleCount += 10; 11922: int t = XEiJ.regPC; //pc0+2 11923: int s = (byte) XEiJ.regOC; //オフセット 11924: if (s == 0) { //Bcc.Wでジャンプ 11925: XEiJ.regPC = t + 2; 11926: s = XEiJ.busRwse (t); //pcws 11927: } 11928: irpSetPC (t + s); //pc0+2+オフセット 11929: } else if (XEiJ.regOC == 0x6e00) { //Bcc.Wで通過 11930: XEiJ.mpuCycleCount += 12; 11931: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11932: } else { //Bcc.Sで通過 11933: XEiJ.mpuCycleCount += 8; 11934: } 11935: } //irpBgtsw 11936: 11937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11938: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11939: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11940: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11941: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 11942: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11943: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11944: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11945: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11946: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11947: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11948: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11949: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 11950: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11951: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11952: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11953: public static void irpBgts () throws M68kException { 11954: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //Bccでジャンプ 11955: XEiJ.mpuCycleCount += 10; 11956: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11957: } else { //Bcc.Sで通過 11958: XEiJ.mpuCycleCount += 8; 11959: } 11960: } //irpBgts 11961: 11962: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11963: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11964: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11965: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11966: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 11967: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11968: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11969: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11970: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 11971: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 11972: public static void irpBgtsl () throws M68kException { 11973: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //Bccでジャンプ 11974: int t = XEiJ.regPC; //pc0+2 11975: int s = (byte) XEiJ.regOC; //オフセット 11976: if (s == -1) { //Bcc.Lでジャンプ 11977: XEiJ.mpuCycleCount += 14; 11978: XEiJ.regPC = t + 4; 11979: s = XEiJ.busRlse (t); //pcls 11980: } else { //Bcc.Sでジャンプ 11981: XEiJ.mpuCycleCount += 10; 11982: } 11983: irpSetPC (t + s); //pc0+2+オフセット 11984: } else if (XEiJ.regOC == 0x6eff) { //Bcc.Lで通過 11985: XEiJ.mpuCycleCount += 12; 11986: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11987: } else { //Bcc.Sで通過 11988: XEiJ.mpuCycleCount += 8; 11989: } 11990: } //irpBgtsl 11991: 11992: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11993: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11994: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11995: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11996: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 11997: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11998: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11999: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 12000: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 12001: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 12002: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 12003: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 12004: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 12005: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 12006: public static void irpBlesw () throws M68kException { 12007: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //Bccでジャンプ 12008: XEiJ.mpuCycleCount += 10; 12009: int t = XEiJ.regPC; //pc0+2 12010: int s = (byte) XEiJ.regOC; //オフセット 12011: if (s == 0) { //Bcc.Wでジャンプ 12012: XEiJ.regPC = t + 2; 12013: s = XEiJ.busRwse (t); //pcws 12014: } 12015: irpSetPC (t + s); //pc0+2+オフセット 12016: } else if (XEiJ.regOC == 0x6f00) { //Bcc.Wで通過 12017: XEiJ.mpuCycleCount += 12; 12018: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 12019: } else { //Bcc.Sで通過 12020: XEiJ.mpuCycleCount += 8; 12021: } 12022: } //irpBlesw 12023: 12024: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12025: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12026: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12027: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12028: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 12029: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 12030: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 12031: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 12032: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12033: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12034: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12035: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12036: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 12037: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 12038: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 12039: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 12040: public static void irpBles () throws M68kException { 12041: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //Bccでジャンプ 12042: XEiJ.mpuCycleCount += 10; 12043: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 12044: } else { //Bcc.Sで通過 12045: XEiJ.mpuCycleCount += 8; 12046: } 12047: } //irpBles 12048: 12049: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12050: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12051: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12052: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12053: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 12054: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 12055: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 12056: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 12057: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 12058: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 12059: public static void irpBlesl () throws M68kException { 12060: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //Bccでジャンプ 12061: int t = XEiJ.regPC; //pc0+2 12062: int s = (byte) XEiJ.regOC; //オフセット 12063: if (s == -1) { //Bcc.Lでジャンプ 12064: XEiJ.mpuCycleCount += 14; 12065: XEiJ.regPC = t + 4; 12066: s = XEiJ.busRlse (t); //pcls 12067: } else { //Bcc.Sでジャンプ 12068: XEiJ.mpuCycleCount += 10; 12069: } 12070: irpSetPC (t + s); //pc0+2+オフセット 12071: } else if (XEiJ.regOC == 0x6fff) { //Bcc.Lで通過 12072: XEiJ.mpuCycleCount += 12; 12073: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 12074: } else { //Bcc.Sで通過 12075: XEiJ.mpuCycleCount += 8; 12076: } 12077: } //irpBlesl 12078: 12079: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12080: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12081: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12082: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12083: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 12084: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 12085: public static void irpMoveq () throws M68kException { 12086: XEiJ.mpuCycleCount += 4; 12087: int z; 12088: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = (byte) XEiJ.regOC; 12089: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12090: } //irpMoveq 12091: 12092: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12093: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12094: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12095: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12096: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 12097: // 12098: //MVS.B <ea>,Dq 12099: // バイトデータをロングに符号拡張してDqの全体を更新する 12100: public static void irpMvsByte () throws M68kException { 12101: XEiJ.mpuCycleCount += 4; 12102: int ea = XEiJ.regOC & 63; 12103: int z; 12104: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 12105: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12106: } //irpMvsByte 12107: 12108: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12109: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12110: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12111: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12112: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 12113: // 12114: //MVS.W <ea>,Dq 12115: // ワードデータをロングに符号拡張してDqの全体を更新する 12116: public static void irpMvsWord () throws M68kException { 12117: XEiJ.mpuCycleCount += 4; 12118: int ea = XEiJ.regOC & 63; 12119: int z; 12120: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); 12121: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12122: } //irpMvsWord 12123: 12124: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12125: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12126: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12127: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12128: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 12129: // 12130: //MVZ.B <ea>,Dq 12131: // バイトデータをロングにゼロ拡張してDqの全体を更新する 12132: public static void irpMvzByte () throws M68kException { 12133: XEiJ.mpuCycleCount += 4; 12134: int ea = XEiJ.regOC & 63; 12135: int z; 12136: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? 0xff & XEiJ.regRn[ea] : XEiJ.busRbz (efaAnyByte (ea)); 12137: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12138: } //irpMvzByte 12139: 12140: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12141: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12142: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12143: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12144: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 12145: // 12146: //MVZ.W <ea>,Dq 12147: // ワードデータをロングにゼロ拡張してDqの全体を更新する 12148: public static void irpMvzWord () throws M68kException { 12149: XEiJ.mpuCycleCount += 4; 12150: int ea = XEiJ.regOC & 63; 12151: int z; 12152: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea)); 12153: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12154: } //irpMvzWord 12155: 12156: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12157: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12158: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12159: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12160: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 12161: public static void irpOrToRegByte () throws M68kException { 12162: XEiJ.mpuCycleCount += 4; 12163: int ea = XEiJ.regOC & 63; 12164: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= 255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea))))]; //ccr_tst_byte。0拡張してからOR 12165: } //irpOrToRegByte 12166: 12167: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12168: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12169: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12170: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12171: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 12172: public static void irpOrToRegWord () throws M68kException { 12173: XEiJ.mpuCycleCount += 4; 12174: int ea = XEiJ.regOC & 63; 12175: int z = (short) (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea))); //0拡張してからOR 12176: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12177: } //irpOrToRegWord 12178: 12179: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12180: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12181: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12182: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12183: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 12184: public static void irpOrToRegLong () throws M68kException { 12185: int ea = XEiJ.regOC & 63; 12186: int qqq = XEiJ.regOC >> 9 & 7; 12187: int z; 12188: if (ea < XEiJ.EA_AR) { //OR.L Dr,Dq 12189: XEiJ.mpuCycleCount += 8; 12190: XEiJ.regRn[qqq] = z = XEiJ.regRn[qqq] | XEiJ.regRn[ea]; 12191: } else { //OR.L <mem>,Dq 12192: XEiJ.mpuCycleCount += ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 12193: XEiJ.regRn[qqq] = z = XEiJ.regRn[qqq] | XEiJ.busRls (efaAnyLong (ea)); 12194: } 12195: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12196: } //irpOrToRegLong 12197: 12198: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12199: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12200: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12201: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12202: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 12203: // 12204: //DIVU.W <ea>,Dq 12205: // M68000PRMでDIVU.Wのオーバーフローの条件が16bit符号あり整数と書かれているのは16bit符号なし整数の間違い 12206: public static void irpDivuWord () throws M68kException { 12207: // X 変化しない 12208: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12209: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12210: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12211: // C 常にクリア 12212: XEiJ.mpuCycleCount += 140; //最大 12213: int ea = XEiJ.regOC & 63; 12214: int qqq = XEiJ.regOC >> 9 & 7; 12215: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea)); //除数 12216: int x = XEiJ.regRn[qqq]; //被除数 12217: if (y == 0) { //ゼロ除算 12218: //Dqは変化しない 12219: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12220: (x < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 12221: (x >> 16 == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が$0000xxxxのときセット、さもなくばクリア 12222: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 12223: ); //Cは常にクリア 12224: XEiJ.mpuCycleCount += 38 - 140 - 34; 12225: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 12226: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12227: throw M68kException.m6eSignal; 12228: } 12229: //無理にintで符号なし除算をやろうとするよりもdoubleにキャストしてから割ったほうが速い 12230: // intの除算をdoubleの除算器で行うプロセッサならばなおさら 12231: //被除数を符号なし32ビットとみなすためlongを経由してdoubleに変換する 12232: //doubleからlongやintへのキャストは小数点以下が切り捨てられ、オーバーフローは表現できる絶対値最大の値になる 12233: //doubleから直接intに戻しているので0xffffffff/0x0001=0xffffffffが絶対値最大の0x7fffffffになってしまうが、 12234: //DIVU.Wではオーバーフローになることに変わりはないのでよいことにする 12235: // 符号なし32ビットの0xffffffffにしたいときは戻すときもlongを経由すればよい 12236: int z = (int) ((double) ((long) x & 0xffffffffL) / (double) y); //商 12237: if (z >>> 16 != 0) { //オーバーフローあり 12238: //Dqは変化しない 12239: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12240: (x < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 12241: //Zは常にクリア 12242: XEiJ.REG_CCR_V //Vは常にセット 12243: ); //Cは常にクリア 12244: } else { //オーバーフローなし 12245: XEiJ.regRn[qqq] = x - y * z << 16 | z; //余り<<16|商 12246: z = (short) z; 12247: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12248: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12249: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12250: //Vは常にクリア 12251: ); //Cは常にクリア 12252: } //if オーバーフローあり/オーバーフローなし 12253: if (M30_DIV_ZERO_V_FLAG) { 12254: m30DivZeroVFlag = false; 12255: } 12256: } //irpDivuWord 12257: 12258: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12259: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12260: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12261: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12262: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 12263: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 12264: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 12265: public static void irpOrToMemByte () throws M68kException { 12266: int ea = XEiJ.regOC & 63; 12267: if (ea >= XEiJ.EA_MM) { //OR.B Dq,<ea> 12268: XEiJ.mpuCycleCount += 8; 12269: int a = efaMltByte (ea); 12270: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRbs (a); 12271: XEiJ.busWb (a, z); 12272: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12273: } else if (ea < XEiJ.EA_AR) { //SBCD.B Dr,Dq 12274: int qqq = XEiJ.regOC >> 9 & 7; 12275: XEiJ.mpuCycleCount += 6; 12276: int x; 12277: XEiJ.regRn[qqq] = ~0xff & (x = XEiJ.regRn[qqq]) | irpSbcd (x, XEiJ.regRn[ea]); 12278: } else { //SBCD.B -(Ar),-(Aq) 12279: XEiJ.mpuCycleCount += 18; 12280: int y = XEiJ.busRbz (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 12281: int a = --XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)]; 12282: XEiJ.busWb (a, irpSbcd (XEiJ.busRbz (a), y)); 12283: } 12284: } //irpOrToMemByte 12285: 12286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12287: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12288: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12290: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 12291: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 12292: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 12293: // 12294: //PACK Dr,Dq,#<data> 12295: //PACK -(Ar),-(Aq),#<data> 12296: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12297: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12298: public static void irpOrToMemWord () throws M68kException { 12299: int ea = XEiJ.regOC & 63; 12300: if (ea >= XEiJ.EA_MM) { //OR.W Dq,<ea> 12301: XEiJ.mpuCycleCount += 8; 12302: int a = efaMltWord (ea); 12303: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRws (a); 12304: XEiJ.busWw (a, z); 12305: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12306: } else if (ea < XEiJ.EA_AR) { //PACK Dr,Dq,#<data> 12307: XEiJ.mpuCycleCount += 8; 12308: int qqq = XEiJ.regOC >> 9 & 7; 12309: int t; 12310: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12311: t = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 12312: } else { 12313: t = XEiJ.regPC; 12314: XEiJ.regPC = t + 2; 12315: t = XEiJ.regRn[ea] + XEiJ.busRwse (t); //pcws 12316: } 12317: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | t >> 4 & 0xf0 | t & 15; 12318: } else { //PACK -(Ar),-(Aq),#<data> 12319: XEiJ.mpuCycleCount += 16; 12320: int t; 12321: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12322: t = XEiJ.busRws (XEiJ.regRn[ea] -= 2) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。020以上なのでアドレスエラーは出ない 12323: } else { 12324: t = XEiJ.regPC; 12325: XEiJ.regPC = t + 2; 12326: t = XEiJ.busRws (XEiJ.regRn[ea] -= 2) + XEiJ.busRwse (t); //pcws。020以上なのでアドレスエラーは出ない 12327: } 12328: XEiJ.busWb (--XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)], t >> 4 & 0xf0 | t & 15); 12329: } 12330: } //irpOrToMemWord 12331: 12332: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12333: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12334: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12335: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12336: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 12337: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 12338: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 12339: // 12340: //UNPK Dr,Dq,#<data> 12341: //UNPK -(Ar),-(Aq),#<data> 12342: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12343: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12344: public static void irpOrToMemLong () throws M68kException { 12345: int ea = XEiJ.regOC & 63; 12346: if (ea >= XEiJ.EA_MM) { //OR.L Dq,<ea> 12347: XEiJ.mpuCycleCount += 12; 12348: int a = efaMltLong (ea); 12349: int z; 12350: XEiJ.busWl (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRls (a)); 12351: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12352: } else if (ea < XEiJ.EA_AR) { //UNPK Dr,Dq,#<data> 12353: int qqq = XEiJ.regOC >> 9 & 7; 12354: int t = XEiJ.regRn[ea]; 12355: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12356: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws 12357: } else { 12358: int s = XEiJ.regPC; 12359: XEiJ.regPC = s + 2; 12360: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse (s)); //pcws 12361: } 12362: } else { //UNPK -(Ar),-(Aq),#<data> 12363: int t = XEiJ.busRbs (--XEiJ.regRn[ea]); 12364: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12365: XEiJ.busWw (XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)] -= 2, (t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。020以上なのでアドレスエラーは出ない 12366: } else { 12367: int s = XEiJ.regPC; 12368: XEiJ.regPC = s + 2; 12369: XEiJ.busWw (XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)] -= 2, (t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse (s)); //pcws。020以上なのでアドレスエラーは出ない 12370: } 12371: } 12372: } //irpOrToMemLong 12373: 12374: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12375: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12376: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12378: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 12379: // 12380: //DIVS.W <ea>,Dq 12381: // DIVSの余りの符号は被除数と一致 12382: // M68000PRMでDIVS.Wのアドレッシングモードがデータ可変と書かれているのはデータの間違い 12383: public static void irpDivsWord () throws M68kException { 12384: // X 変化しない 12385: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12386: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12387: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12388: // C 常にクリア 12389: //divsの余りの符号は被除数と一致 12390: //Javaの除算演算子の挙動 12391: // 10 / 3 == 3 10 % 3 == 1 10 = 3 * 3 + 1 12392: // 10 / -3 == -3 10 % -3 == 1 10 = -3 * -3 + 1 12393: // -10 / 3 == -3 -10 % 3 == -1 -10 = 3 * -3 + -1 12394: // -10 / -3 == 3 -10 % -3 == -1 -10 = -3 * 3 + -1 12395: XEiJ.mpuCycleCount += 158; //最大 12396: int ea = XEiJ.regOC & 63; 12397: int qqq = XEiJ.regOC >> 9 & 7; 12398: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //除数 12399: int x = XEiJ.regRn[qqq]; //被除数 12400: if (y == 0) { //ゼロ除算 12401: //Dqは変化しない 12402: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12403: //Nは常にクリア 12404: XEiJ.REG_CCR_Z | //Zは常にセット 12405: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 12406: ); //Cは常にクリア 12407: XEiJ.mpuCycleCount += 38 - 158 - 34; 12408: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 12409: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12410: throw M68kException.m6eSignal; 12411: } 12412: int z = x / y; //商 12413: if ((short) z != z) { //オーバーフローあり 12414: //Dqは変化しない 12415: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12416: (x == 0x80000000 || (z & 0xffff0080) == 0x00000080 || (z & 0xffff0080) == 0xffff0080 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が$80000000または商が$0000xxyyまたは$ffffxxyyでyyが負のときセット、さもなくばクリア 12417: (z == 0x00008000 || (((z & 0xffff00ff) == 0x00000000 || (z & 0xffff00ff) == 0xffff0000) && (z & 0x0000ff00) != 0) ? XEiJ.REG_CCR_Z : 0) | //Zは商が$00008000または商が$0000xxyyまたは$ffffxxyyでxxが0でなくてyyが0のときセット、さもなくばクリア 12418: XEiJ.REG_CCR_V //Vは常にセット 12419: ); //Cは常にクリア 12420: } else { //オーバーフローなし 12421: XEiJ.regRn[qqq] = x - y * z << 16 | (char) z; //Dqは余り<<16|商&$ffff 12422: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12423: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12424: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12425: //Vは常にクリア 12426: ); //Cは常にクリア 12427: } //if オーバーフローあり/オーバーフローなし 12428: if (M30_DIV_ZERO_V_FLAG) { 12429: m30DivZeroVFlag = false; 12430: } 12431: } //irpDivsWord 12432: 12433: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12434: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12435: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12436: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12437: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 12438: public static void irpSubToRegByte () throws M68kException { 12439: XEiJ.mpuCycleCount += 4; 12440: int ea = XEiJ.regOC & 63; 12441: int qqq = XEiJ.regOC >> 9 & 7; 12442: int x, y, z; 12443: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 12444: x = XEiJ.regRn[qqq]; 12445: z = x - y; 12446: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12447: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12448: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12449: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12450: } //irpSubToRegByte 12451: 12452: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12453: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12454: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12455: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12456: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 12457: public static void irpSubToRegWord () throws M68kException { 12458: XEiJ.mpuCycleCount += 4; 12459: int ea = XEiJ.regOC & 63; 12460: int qqq = XEiJ.regOC >> 9 & 7; 12461: int x, y, z; 12462: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 12463: x = XEiJ.regRn[qqq]; 12464: z = x - y; 12465: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12466: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12467: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12468: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12469: } //irpSubToRegWord 12470: 12471: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12472: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12473: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12475: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 12476: public static void irpSubToRegLong () throws M68kException { 12477: int ea = XEiJ.regOC & 63; 12478: int qqq = XEiJ.regOC >> 9 & 7; 12479: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 12480: int x, y, z; 12481: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 12482: x = XEiJ.regRn[qqq]; 12483: z = x - y; 12484: XEiJ.regRn[qqq] = z; 12485: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12486: ((x ^ y) & (x ^ z)) >> 30 & XEiJ.REG_CCR_V | 12487: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12488: } //irpSubToRegLong 12489: 12490: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12491: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12492: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12493: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12494: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 12495: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 12496: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 12497: // 12498: //SUBA.W <ea>,Aq 12499: // ソースを符号拡張してロングで減算する 12500: public static void irpSubaWord () throws M68kException { 12501: XEiJ.mpuCycleCount += 8; 12502: int ea = XEiJ.regOC & 63; 12503: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12504: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 12505: //ccrは変化しない 12506: } //irpSubaWord 12507: 12508: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12509: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12510: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12511: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12512: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 12513: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 12514: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 12515: public static void irpSubToMemByte () throws M68kException { 12516: int ea = XEiJ.regOC & 63; 12517: int a, x, y, z; 12518: if (ea < XEiJ.EA_MM) { 12519: if (ea < XEiJ.EA_AR) { //SUBX.B Dr,Dq 12520: int qqq = XEiJ.regOC >> 9 & 7; 12521: XEiJ.mpuCycleCount += 4; 12522: y = XEiJ.regRn[ea]; 12523: x = XEiJ.regRn[qqq]; 12524: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12525: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12526: } else { //SUBX.B -(Ar),-(Aq) 12527: XEiJ.mpuCycleCount += 18; 12528: y = XEiJ.busRbs (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 12529: a = --XEiJ.regRn[XEiJ.regOC >> 9 & 15]; //1qqq=aqq 12530: x = XEiJ.busRbs (a); 12531: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12532: XEiJ.busWb (a, z); 12533: } 12534: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //SUBXはZをクリアすることはあるがセットすることはない 12535: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12536: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_byte 12537: } else { //SUB.B Dq,<ea> 12538: XEiJ.mpuCycleCount += 8; 12539: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12540: a = efaMltByte (ea); 12541: x = XEiJ.busRbs (a); 12542: z = x - y; 12543: XEiJ.busWb (a, z); 12544: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12545: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12546: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12547: } 12548: } //irpSubToMemByte 12549: 12550: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12551: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12552: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12554: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 12555: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 12556: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 12557: public static void irpSubToMemWord () throws M68kException { 12558: int ea = XEiJ.regOC & 63; 12559: int a, x, y, z; 12560: if (ea < XEiJ.EA_MM) { 12561: if (ea < XEiJ.EA_AR) { //SUBX.W Dr,Dq 12562: int qqq = XEiJ.regOC >> 9 & 7; 12563: XEiJ.mpuCycleCount += 4; 12564: y = XEiJ.regRn[ea]; 12565: x = XEiJ.regRn[qqq]; 12566: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12567: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12568: } else { //SUBX.W -(Ar),-(Aq) 12569: XEiJ.mpuCycleCount += 18; 12570: y = XEiJ.busRws (XEiJ.regRn[ea] -= 2); //このr[ea]はアドレスレジスタ 12571: a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2; 12572: x = XEiJ.busRws (a); 12573: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12574: XEiJ.busWw (a, z); 12575: } 12576: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 12577: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12578: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_word 12579: } else { //SUB.W Dq,<ea> 12580: XEiJ.mpuCycleCount += 8; 12581: y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12582: a = efaMltWord (ea); 12583: x = XEiJ.busRws (a); 12584: z = x - y; 12585: XEiJ.busWw (a, z); 12586: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12587: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12588: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12589: } 12590: } //irpSubToMemWord 12591: 12592: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12593: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12594: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12595: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12596: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 12597: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 12598: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 12599: public static void irpSubToMemLong () throws M68kException { 12600: int ea = XEiJ.regOC & 63; 12601: if (ea < XEiJ.EA_MM) { 12602: int x; 12603: int y; 12604: int z; 12605: if (ea < XEiJ.EA_AR) { //SUBX.L Dr,Dq 12606: int qqq = XEiJ.regOC >> 9 & 7; 12607: XEiJ.mpuCycleCount += 8; 12608: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) - (y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12609: } else { //SUBX.L -(Ar),-(Aq) 12610: XEiJ.mpuCycleCount += 30; 12611: y = XEiJ.busRls (XEiJ.regRn[ea] -= 4); //このr[ea]はアドレスレジスタ 12612: int a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 4; 12613: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 12614: } 12615: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 12616: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12617: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx 12618: } else { //SUB.L Dq,<ea> 12619: XEiJ.mpuCycleCount += 12; 12620: int a = efaMltLong (ea); 12621: int x; 12622: int y; 12623: int z; 12624: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7])); 12625: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12626: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12627: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12628: } 12629: } //irpSubToMemLong 12630: 12631: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12632: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12633: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12634: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12635: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 12636: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 12637: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 12638: public static void irpSubaLong () throws M68kException { 12639: int ea = XEiJ.regOC & 63; 12640: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //Dr/Ar/#<data>のとき8+、それ以外は6+ 12641: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12642: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 12643: //ccrは変化しない 12644: } //irpSubaLong 12645: 12646: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12647: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12648: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12649: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12650: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 12651: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12652: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12653: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12654: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12655: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 12656: public static void irpAline () throws M68kException { 12657: XEiJ.mpuCycleCount += 34; 12658: if (XEiJ.MPU_INLINE_EXCEPTION) { 12659: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 12660: int sp = XEiJ.regRn[15]; 12661: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 12662: if (XEiJ.regSRS == 0) { //ユーザモードのとき 12663: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 12664: XEiJ.mpuUSP = sp; //USPを保存 12665: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 12666: if (DataBreakPoint.DBP_ON) { 12667: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 12668: } else { 12669: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 12670: } 12671: if (InstructionBreakPoint.IBP_ON) { 12672: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 12673: } 12674: } 12675: XEiJ.regRn[15] = sp -= 8; 12676: XEiJ.busWw (sp + 6, 0x0000 | M68kException.M6E_LINE_1010_EMULATOR << 2); //pushw。フォーマットとベクタオフセットをプッシュする 12677: XEiJ.busWl (sp + 2, XEiJ.regPC0); //pushl。pcをプッシュする 12678: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 12679: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.M6E_LINE_1010_EMULATOR << 2))); //例外ベクタを取り出してジャンプする 12680: } else { 12681: irpException (M68kException.M6E_LINE_1010_EMULATOR, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 12682: } 12683: } //irpAline 12684: 12685: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12686: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12687: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12688: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12689: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 12690: public static void irpCmpByte () throws M68kException { 12691: XEiJ.mpuCycleCount += 4; 12692: int ea = XEiJ.regOC & 63; 12693: int x; 12694: int y; 12695: int z = (byte) ((x = (byte) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)))); 12696: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12697: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12698: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12699: } //irpCmpByte 12700: 12701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12702: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12703: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12704: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12705: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 12706: public static void irpCmpWord () throws M68kException { 12707: XEiJ.mpuCycleCount += 4; 12708: int ea = XEiJ.regOC & 63; 12709: int x; 12710: int y; 12711: int z = (short) ((x = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)))); //このr[ea]はデータレジスタまたはアドレスレジスタ 12712: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12713: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12714: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12715: } //irpCmpWord 12716: 12717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12718: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12719: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12720: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12721: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 12722: public static void irpCmpLong () throws M68kException { 12723: XEiJ.mpuCycleCount += 6; 12724: int ea = XEiJ.regOC & 63; 12725: int x; 12726: int y; 12727: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea))); //このr[ea]はデータレジスタまたはアドレスレジスタ 12728: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12729: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12730: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12731: } //irpCmpLong 12732: 12733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12734: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12735: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12736: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12737: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 12738: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 12739: // 12740: //CMPA.W <ea>,Aq 12741: // ソースを符号拡張してロングで比較する 12742: public static void irpCmpaWord () throws M68kException { 12743: XEiJ.mpuCycleCount += 6; 12744: int ea = XEiJ.regOC & 63; 12745: //ソースを符号拡張してからロングで比較する 12746: int y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12747: int x; 12748: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12749: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12750: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12751: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12752: } //irpCmpaWord 12753: 12754: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12755: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12756: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12757: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12758: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 12759: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 12760: public static void irpEorByte () throws M68kException { 12761: int ea = XEiJ.regOC & 63; 12762: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.B (Ar)+,(Aq)+ 12763: XEiJ.mpuCycleCount += 12; 12764: int y = XEiJ.busRbs (XEiJ.regRn[ea]++); //このr[ea]はアドレスレジスタ 12765: int x; 12766: int z = (byte) ((x = XEiJ.busRbs (XEiJ.regRn[XEiJ.regOC >> 9 & 15]++)) - y); 12767: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12768: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12769: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12770: } else { 12771: int qqq = XEiJ.regOC >> 9 & 7; 12772: int z; 12773: if (ea < XEiJ.EA_AR) { //EOR.B Dq,Dr 12774: XEiJ.mpuCycleCount += 4; 12775: z = XEiJ.regRn[ea] ^= 255 & XEiJ.regRn[qqq]; //0拡張してからEOR 12776: } else { //EOR.B Dq,<mem> 12777: XEiJ.mpuCycleCount += 8; 12778: int a = efaMltByte (ea); 12779: XEiJ.busWb (a, z = XEiJ.regRn[qqq] ^ XEiJ.busRbs (a)); 12780: } 12781: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12782: } 12783: } //irpEorByte 12784: 12785: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12786: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12787: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12788: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12789: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 12790: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 12791: public static void irpEorWord () throws M68kException { 12792: int ea = XEiJ.regOC & 63; 12793: int rrr = XEiJ.regOC & 7; 12794: int mmm = ea >> 3; 12795: if (mmm == XEiJ.MMM_AR) { //CMPM.W (Ar)+,(Aq)+ 12796: XEiJ.mpuCycleCount += 12; 12797: int y = XEiJ.busRws ((XEiJ.regRn[ea] += 2) - 2); //このr[ea]はアドレスレジスタ 12798: int x; 12799: int z = (short) ((x = XEiJ.busRws ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 2) - 2)) - y); 12800: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12801: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12802: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12803: } else { 12804: int qqq = XEiJ.regOC >> 9 & 7; 12805: int z; 12806: if (ea < XEiJ.EA_AR) { //EOR.W Dq,Dr 12807: XEiJ.mpuCycleCount += 4; 12808: z = XEiJ.regRn[rrr] ^= (char) XEiJ.regRn[qqq]; //0拡張してからEOR 12809: } else { //EOR.W Dq,<mem> 12810: XEiJ.mpuCycleCount += 8; 12811: int a = efaMltWord (ea); 12812: XEiJ.busWw (a, z = XEiJ.regRn[qqq] ^ XEiJ.busRws (a)); 12813: } 12814: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12815: } 12816: } //irpEorWord 12817: 12818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12822: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 12823: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 12824: public static void irpEorLong () throws M68kException { 12825: int ea = XEiJ.regOC & 63; 12826: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.L (Ar)+,(Aq)+ 12827: XEiJ.mpuCycleCount += 20; 12828: int y = XEiJ.busRls ((XEiJ.regRn[ea] += 4) - 4); //このr[ea]はアドレスレジスタ 12829: int x; 12830: int z = (x = XEiJ.busRls ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 4) - 4)) - y; 12831: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12832: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12833: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12834: } else { 12835: int qqq = XEiJ.regOC >> 9 & 7; 12836: int z; 12837: if (ea < XEiJ.EA_AR) { //EOR.L Dq,Dr 12838: XEiJ.mpuCycleCount += 8; 12839: XEiJ.regRn[ea] = z = XEiJ.regRn[ea] ^ XEiJ.regRn[qqq]; 12840: } else { //EOR.L Dq,<mem> 12841: XEiJ.mpuCycleCount += 12; 12842: int a = efaMltLong (ea); 12843: XEiJ.busWl (a, z = XEiJ.busRls (a) ^ XEiJ.regRn[qqq]); 12844: } 12845: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12846: } 12847: } //irpEorLong 12848: 12849: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12850: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12851: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12852: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12853: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 12854: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 12855: public static void irpCmpaLong () throws M68kException { 12856: XEiJ.mpuCycleCount += 6; 12857: int ea = XEiJ.regOC & 63; 12858: int y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12859: int x; 12860: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12861: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12862: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12863: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12864: } //irpCmpaLong 12865: 12866: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12867: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12868: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12869: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12870: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 12871: public static void irpAndToRegByte () throws M68kException { 12872: XEiJ.mpuCycleCount += 4; 12873: int ea = XEiJ.regOC & 63; 12874: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~255 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea))))]; //ccr_tst_byte。1拡張してからAND 12875: } //irpAndToRegByte 12876: 12877: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12878: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12879: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12880: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12881: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 12882: public static void irpAndToRegWord () throws M68kException { 12883: XEiJ.mpuCycleCount += 4; 12884: int ea = XEiJ.regOC & 63; 12885: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~65535 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea))); //1拡張してからAND 12886: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12887: } //irpAndToRegWord 12888: 12889: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12890: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12891: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12892: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12893: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 12894: public static void irpAndToRegLong () throws M68kException { 12895: int ea = XEiJ.regOC & 63; 12896: int qqq = XEiJ.regOC >> 9 & 7; 12897: int z; 12898: if (ea < XEiJ.EA_AR) { //AND.L Dr,Dq 12899: XEiJ.mpuCycleCount += 8; 12900: z = XEiJ.regRn[qqq] &= XEiJ.regRn[ea]; 12901: } else { //AND.L <mem>,Dq 12902: XEiJ.mpuCycleCount += ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 12903: z = XEiJ.regRn[qqq] &= XEiJ.busRls (efaAnyLong (ea)); 12904: } 12905: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12906: } //irpAndToRegLong 12907: 12908: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12909: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12910: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12911: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12912: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 12913: public static void irpMuluWord () throws M68kException { 12914: int ea = XEiJ.regOC & 63; 12915: int qqq = XEiJ.regOC >> 9 & 7; 12916: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea)); 12917: //muluの所要サイクル数は38+2n 12918: //nはソースに含まれる1の数 12919: int s = y & 0x5555; 12920: s += y - s >> 1; 12921: int t = s & 0x3333; 12922: t += s - t >> 2; 12923: t += t >> 4; 12924: XEiJ.mpuCycleCount += 38 + ((t & 15) + (t >> 8 & 15)) << 1; //38+2n 12925: //XEiJ.mpuCycleCount += 38 + (Integer.bitCount (y) << 1); //少し遅くなる 12926: int z; 12927: XEiJ.regRn[qqq] = z = (char) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 12928: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12929: if (M30_DIV_ZERO_V_FLAG) { 12930: m30DivZeroVFlag = false; 12931: } 12932: } //irpMuluWord 12933: 12934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12935: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12936: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12938: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 12939: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 12940: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 12941: public static void irpAndToMemByte () throws M68kException { 12942: int ea = XEiJ.regOC & 63; 12943: if (ea >= XEiJ.EA_MM) { //AND.B Dq,<ea> 12944: XEiJ.mpuCycleCount += 8; 12945: int a = efaMltByte (ea); 12946: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & XEiJ.busRbs (a); 12947: XEiJ.busWb (a, z); 12948: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12949: } else if (ea < XEiJ.EA_AR) { //ABCD.B Dr,Dq 12950: int qqq = XEiJ.regOC >> 9 & 7; 12951: XEiJ.mpuCycleCount += 6; 12952: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | irpAbcd (XEiJ.regRn[qqq], XEiJ.regRn[ea]); 12953: } else { //ABCD.B -(Ar),-(Aq) 12954: XEiJ.mpuCycleCount += 18; 12955: int y = XEiJ.busRbz (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 12956: int a = --XEiJ.regRn[(XEiJ.regOC >> 9) - (96 - 8)]; 12957: XEiJ.busWb (a, irpAbcd (XEiJ.busRbz (a), y)); 12958: } 12959: } //irpAndToMemByte 12960: 12961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12962: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12963: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12964: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12965: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 12966: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 12967: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 12968: public static void irpAndToMemWord () throws M68kException { 12969: int ea = XEiJ.regOC & 63; 12970: if (ea < XEiJ.EA_MM) { //EXG 12971: XEiJ.mpuCycleCount += 6; 12972: if (ea < XEiJ.EA_AR) { //EXG.L Dq,Dr 12973: int qqq = XEiJ.regOC >> 9 & 7; 12974: int t = XEiJ.regRn[qqq]; 12975: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; 12976: XEiJ.regRn[ea] = t; 12977: } else { //EXG.L Aq,Ar 12978: int aqq = (XEiJ.regOC >> 9) - (96 - 8); 12979: int t = XEiJ.regRn[aqq]; 12980: XEiJ.regRn[aqq] = XEiJ.regRn[ea]; //このr[ea]アドレスレジスタ 12981: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 12982: } 12983: } else { //AND.W Dq,<ea> 12984: XEiJ.mpuCycleCount += 8; 12985: int a = efaMltWord (ea); 12986: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & XEiJ.busRws (a); 12987: XEiJ.busWw (a, z); 12988: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12989: } 12990: } //irpAndToMemWord 12991: 12992: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12993: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12994: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12995: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12996: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 12997: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 12998: public static void irpAndToMemLong () throws M68kException { 12999: int ea = XEiJ.regOC & 63; 13000: int qqq = XEiJ.regOC >> 9 & 7; 13001: if (ea >> 3 == XEiJ.MMM_AR) { //EXG.L Dq,Ar 13002: XEiJ.mpuCycleCount += 6; 13003: int t = XEiJ.regRn[qqq]; 13004: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 13005: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 13006: } else { //AND.L Dq,<ea> 13007: XEiJ.mpuCycleCount += 12; 13008: int a = efaMltLong (ea); 13009: int z; 13010: XEiJ.busWl (a, z = XEiJ.busRls (a) & XEiJ.regRn[qqq]); 13011: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 13012: } 13013: } //irpAndToMemLong 13014: 13015: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13016: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13017: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13018: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13019: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 13020: public static void irpMulsWord () throws M68kException { 13021: int ea = XEiJ.regOC & 63; 13022: int qqq = XEiJ.regOC >> 9 & 7; 13023: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); 13024: int t = y << 1 ^ y; //右側が1である0と右側が0または末尾である1は1、それ以外は0。ソースは符号拡張されているので上位16ビットはすべて0 13025: //mulsの所要サイクル数は38+2n 13026: //nはソースの末尾に0を付け加えた17ビットに含まれる10または01の数 13027: int s = t & 0x5555; 13028: s += t - s >> 1; 13029: t = s & 0x3333; 13030: t += s - t >> 2; 13031: t += t >> 4; 13032: XEiJ.mpuCycleCount += 38 + ((t & 15) + (t >> 8 & 15)) << 1; //38+2n 13033: int z; 13034: XEiJ.regRn[qqq] = z = (short) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 13035: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 13036: if (M30_DIV_ZERO_V_FLAG) { 13037: m30DivZeroVFlag = false; 13038: } 13039: } //irpMulsWord 13040: 13041: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13042: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13043: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13044: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13045: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 13046: public static void irpAddToRegByte () throws M68kException { 13047: XEiJ.mpuCycleCount += 4; 13048: int ea = XEiJ.regOC & 63; 13049: int qqq = XEiJ.regOC >> 9 & 7; 13050: int x, y, z; 13051: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 13052: x = XEiJ.regRn[qqq]; 13053: z = x + y; 13054: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 13055: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 13056: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 13057: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 13058: } //irpAddToRegByte 13059: 13060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13061: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13062: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13063: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13064: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 13065: public static void irpAddToRegWord () throws M68kException { 13066: XEiJ.mpuCycleCount += 4; 13067: int ea = XEiJ.regOC & 63; 13068: int qqq = XEiJ.regOC >> 9 & 7; 13069: int x, y, z; 13070: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 13071: x = XEiJ.regRn[qqq]; 13072: z = x + y; 13073: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 13074: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 13075: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13076: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 13077: } //irpAddToRegWord 13078: 13079: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13080: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13081: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13082: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13083: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 13084: public static void irpAddToRegLong () throws M68kException { 13085: int ea = XEiJ.regOC & 63; 13086: int qqq = XEiJ.regOC >> 9 & 7; 13087: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 13088: int x, y, z; 13089: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 13090: x = XEiJ.regRn[qqq]; 13091: z = x + y; 13092: XEiJ.regRn[qqq] = z; 13093: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13094: ((x ^ z) & (y ^ z)) >> 30 & XEiJ.REG_CCR_V | 13095: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 13096: } //irpAddToRegLong 13097: 13098: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13099: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13100: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13101: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13102: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 13103: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 13104: // 13105: //ADDA.W <ea>,Aq 13106: // ソースを符号拡張してロングで加算する 13107: public static void irpAddaWord () throws M68kException { 13108: XEiJ.mpuCycleCount += 8; 13109: int ea = XEiJ.regOC & 63; 13110: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 13111: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 13112: //ccrは変化しない 13113: } //irpAddaWord 13114: 13115: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13116: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13117: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13118: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13119: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 13120: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 13121: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 13122: public static void irpAddToMemByte () throws M68kException { 13123: int ea = XEiJ.regOC & 63; 13124: int a, x, y, z; 13125: if (ea < XEiJ.EA_MM) { 13126: if (ea < XEiJ.EA_AR) { //ADDX.B Dr,Dq 13127: int qqq = XEiJ.regOC >> 9 & 7; 13128: XEiJ.mpuCycleCount += 4; 13129: y = XEiJ.regRn[ea]; 13130: x = XEiJ.regRn[qqq]; 13131: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13132: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 13133: } else { //ADDX.B -(Ar),-(Aq) 13134: XEiJ.mpuCycleCount += 18; 13135: y = XEiJ.busRbs (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 13136: a = --XEiJ.regRn[XEiJ.regOC >> 9 & 15]; //1qqq=aqq 13137: x = XEiJ.busRbs (a); 13138: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13139: XEiJ.busWb (a, z); 13140: } 13141: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 13142: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 13143: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_byte 13144: } else { //ADD.B Dq,<ea> 13145: XEiJ.mpuCycleCount += 8; 13146: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 13147: a = efaMltByte (ea); 13148: x = XEiJ.busRbs (a); 13149: z = x + y; 13150: XEiJ.busWb (a, z); 13151: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 13152: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 13153: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 13154: } 13155: } //irpAddToMemByte 13156: 13157: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13158: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13159: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13160: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13161: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 13162: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 13163: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 13164: public static void irpAddToMemWord () throws M68kException { 13165: int ea = XEiJ.regOC & 63; 13166: int a, x, y, z; 13167: if (ea < XEiJ.EA_MM) { 13168: if (ea < XEiJ.EA_AR) { //ADDX.W Dr,Dq 13169: int qqq = XEiJ.regOC >> 9 & 7; 13170: XEiJ.mpuCycleCount += 4; 13171: y = XEiJ.regRn[ea]; 13172: x = XEiJ.regRn[qqq]; 13173: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13174: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 13175: } else { //ADDX.W -(Ar),-(Aq) 13176: XEiJ.mpuCycleCount += 18; 13177: y = XEiJ.busRws (XEiJ.regRn[ea] -= 2); //このr[ea]はアドレスレジスタ 13178: a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2; 13179: x = XEiJ.busRws (a); 13180: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13181: XEiJ.busWw (a, z); 13182: } 13183: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 13184: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13185: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_word 13186: } else { //ADD.W Dq,<ea> 13187: XEiJ.mpuCycleCount += 8; 13188: a = efaMltWord (ea); 13189: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 13190: x = XEiJ.busRws (a); 13191: z = x + y; 13192: XEiJ.busWw (a, z); 13193: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 13194: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13195: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 13196: } 13197: } //irpAddToMemWord 13198: 13199: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13200: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13201: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13202: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13203: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 13204: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 13205: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 13206: public static void irpAddToMemLong () throws M68kException { 13207: int ea = XEiJ.regOC & 63; 13208: if (ea < XEiJ.EA_MM) { 13209: int x; 13210: int y; 13211: int z; 13212: if (ea < XEiJ.EA_AR) { //ADDX.L Dr,Dq 13213: int qqq = XEiJ.regOC >> 9 & 7; 13214: XEiJ.mpuCycleCount += 8; 13215: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) + (y = XEiJ.regRn[ea]) + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13216: } else { //ADDX.L -(Ar),-(Aq) 13217: XEiJ.mpuCycleCount += 30; 13218: y = XEiJ.busRls (XEiJ.regRn[ea] -= 4); //このr[ea]はアドレスレジスタ 13219: int a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 4; 13220: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y + (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 13221: } 13222: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 13223: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13224: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx 13225: } else { //ADD.L Dq,<ea> 13226: XEiJ.mpuCycleCount += 12; 13227: int a = efaMltLong (ea); 13228: int x; 13229: int y; 13230: int z; 13231: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7])); 13232: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13233: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13234: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 13235: } 13236: } //irpAddToMemLong 13237: 13238: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13239: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13240: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13241: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13242: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 13243: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 13244: public static void irpAddaLong () throws M68kException { 13245: int ea = XEiJ.regOC & 63; 13246: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //Dr/Ar/#<data>のとき8+、それ以外は6+ 13247: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 13248: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 13249: //ccrは変化しない 13250: } //irpAddaLong 13251: 13252: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13253: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13254: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13255: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13256: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 13257: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 13258: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 13259: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 13260: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 13261: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 13262: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 13263: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 13264: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 13265: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 13266: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 13267: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 13268: // 13269: //ASR.B #<data>,Dr 13270: //ASR.B Dq,Dr 13271: // 算術右シフトバイト 13272: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13273: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13274: // 1 ........................ｱｱｲｳｴｵｶｷ ｸｱ*0ｸ Z=ｱｲｳｴｵｶｷ==0 13275: // 2 ........................ｱｱｱｲｳｴｵｶ ｷｱ*0ｷ Z=ｱｲｳｴｵｶ==0 13276: // 3 ........................ｱｱｱｱｲｳｴｵ ｶｱ*0ｶ Z=ｱｲｳｴｵ==0 13277: // 4 ........................ｱｱｱｱｱｲｳｴ ｵｱ*0ｵ Z=ｱｲｳｴ==0 13278: // 5 ........................ｱｱｱｱｱｱｲｳ ｴｱ*0ｴ Z=ｱｲｳ==0 13279: // 6 ........................ｱｱｱｱｱｱｱｲ ｳｱ*0ｳ Z=ｱｲ==0 13280: // 7 ........................ｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13281: // 8 ........................ｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13282: // CCR 13283: // X countが0のとき変化しない。他は最後に押し出されたビット 13284: // N 結果の最上位ビット 13285: // Z 結果が0のときセット。他はクリア 13286: // V 常にクリア 13287: // C countが0のときクリア。他は最後に押し出されたビット 13288: // 13289: //LSR.B #<data>,Dr 13290: //LSR.B Dq,Dr 13291: // 論理右シフトバイト 13292: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13293: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13294: // 1 ........................0ｱｲｳｴｵｶｷ ｸ0*0ｸ Z=ｱｲｳｴｵｶｷ==0 13295: // 2 ........................00ｱｲｳｴｵｶ ｷ0*0ｷ Z=ｱｲｳｴｵｶ==0 13296: // 3 ........................000ｱｲｳｴｵ ｶ0*0ｶ Z=ｱｲｳｴｵ==0 13297: // 4 ........................0000ｱｲｳｴ ｵ0*0ｵ Z=ｱｲｳｴ==0 13298: // 5 ........................00000ｱｲｳ ｴ0*0ｴ Z=ｱｲｳ==0 13299: // 6 ........................000000ｱｲ ｳ0*0ｳ Z=ｱｲ==0 13300: // 7 ........................0000000ｱ ｲ0*0ｲ Z=ｱ==0 13301: // 8 ........................00000000 ｱ010ｱ 13302: // 9 ........................00000000 00100 13303: // CCR 13304: // X countが0のとき変化しない。他は最後に押し出されたビット 13305: // N 結果の最上位ビット 13306: // Z 結果が0のときセット。他はクリア 13307: // V 常にクリア 13308: // C countが0のときクリア。他は最後に押し出されたビット 13309: // 13310: //ROR.B #<data>,Dr 13311: //ROR.B Dq,Dr 13312: // 右ローテートバイト 13313: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13314: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13315: // 1 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13316: // : 13317: // 7 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸ==0 13318: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13319: // CCR 13320: // X 常に変化しない 13321: // N 結果の最上位ビット 13322: // Z 結果が0のときセット。他はクリア 13323: // V 常にクリア 13324: // C countが0のときクリア。他は結果の最上位ビット 13325: // 13326: //ROXR.B #<data>,Dr 13327: //ROXR.B Dq,Dr 13328: // 拡張右ローテートバイト 13329: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13330: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13331: // 1 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13332: // 2 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13333: // 3 ........................ｷｸXｱｲｳｴｵ ｶｷ*0ｶ Z=ｱｲｳｴｵｷｸX==0 13334: // 4 ........................ｶｷｸXｱｲｳｴ ｵｶ*0ｵ Z=ｱｲｳｴｶｷｸX==0 13335: // 5 ........................ｵｶｷｸXｱｲｳ ｴｵ*0ｴ Z=ｱｲｳｵｶｷｸX==0 13336: // 6 ........................ｴｵｶｷｸXｱｲ ｳｴ*0ｳ Z=ｱｲｴｵｶｷｸX==0 13337: // 7 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13338: // 8 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13339: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13340: // CCR 13341: // X countが0のとき変化しない。他は最後に押し出されたビット 13342: // N 結果の最上位ビット 13343: // Z 結果が0のときセット。他はクリア 13344: // V 常にクリア 13345: // C countが0のときXのコピー。他は最後に押し出されたビット 13346: public static void irpXxrToRegByte () throws M68kException { 13347: int rrr; 13348: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13349: int y; 13350: int z; 13351: int t; 13352: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13353: case 0b000_000 >> 3: //ASR.B #<data>,Dr 13354: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13355: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> y) >> 1); 13356: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13357: break; 13358: case 0b001_000 >> 3: //LSR.B #<data>,Dr 13359: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13360: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = (0xff & x) >>> y) >>> 1); 13361: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13362: break; 13363: case 0b010_000 >> 3: //ROXR.B #<data>,Dr 13364: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13365: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13366: if (y == 1 - 1) { //y=data-1=1-1 13367: t = x; 13368: } else { //y=data-1=2-1～8-1 13369: z = x << 9 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13370: } 13371: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13372: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13373: break; 13374: case 0b011_000 >> 3: //ROR.B #<data>,Dr 13375: XEiJ.mpuCycleCount += 6 + ((y = XEiJ.regOC >> 9 & 7) << 1); //y=data&7 13376: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13377: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 7 & 1; //Xは変化しない。Cは結果の最上位ビット 13378: break; 13379: case 0b100_000 >> 3: //ASR.B Dq,Dr 13380: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13381: XEiJ.mpuCycleCount += 6 + (y << 1); 13382: if (y == 0) { //y=data=0 13383: z = (byte) x; 13384: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13385: } else { //y=data=1～63 13386: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> (y <= 8 ? y - 1 : 7)) >> 1); 13387: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13388: } 13389: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13390: break; 13391: case 0b101_000 >> 3: //LSR.B Dq,Dr 13392: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13393: XEiJ.mpuCycleCount += 6 + (y << 1); 13394: if (y == 0) { //y=data=0 13395: z = (byte) x; 13396: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13397: } else { //y=data=1～63 13398: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = y <= 8 ? (0xff & x) >>> y - 1 : 0) >>> 1); 13399: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13400: } 13401: break; 13402: case 0b110_000 >> 3: //ROXR.B Dq,Dr 13403: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13404: XEiJ.mpuCycleCount += 6 + (y << 1); 13405: //y %= 9; 13406: y = (y & 7) - (y >> 3); //y=data=-7～7 13407: y += y >> 3 & 9; //y=data=0～8 13408: if (y == 0) { //y=data=0 13409: z = (byte) x; 13410: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13411: } else { //y=data=1～8 13412: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13413: if (y == 1) { //y=data=1 13414: t = x; //Cは最後に押し出されたビット 13415: } else { //y=data=2～8 13416: z = x << 9 - y | (t = z >>> y - 2) >>> 1; 13417: } 13418: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13419: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13420: } 13421: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13422: break; 13423: case 0b111_000 >> 3: //ROR.B Dq,Dr 13424: default: 13425: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13426: XEiJ.mpuCycleCount += 6 + (y << 1); 13427: if (y == 0) { 13428: z = (byte) x; 13429: t = 0; //Cはクリア 13430: } else { 13431: y &= 7; //y=data=0～7 13432: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13433: t = z >>> 7 & 1; //Cは結果の最上位ビット 13434: } 13435: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13436: } 13437: } //irpXxrToRegByte 13438: 13439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13440: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13441: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13442: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13443: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 13444: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 13445: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 13446: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 13447: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 13448: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 13449: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 13450: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 13451: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 13452: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 13453: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 13454: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 13455: // 13456: //ASR.W #<data>,Dr 13457: //ASR.W Dq,Dr 13458: //ASR.W <ea> 13459: // 算術右シフトワード 13460: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13461: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13462: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13463: // : 13464: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13465: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13466: // CCR 13467: // X countが0のとき変化しない。他は最後に押し出されたビット 13468: // N 結果の最上位ビット 13469: // Z 結果が0のときセット。他はクリア 13470: // V 常にクリア 13471: // C countが0のときクリア。他は最後に押し出されたビット 13472: // 13473: //LSR.W #<data>,Dr 13474: //LSR.W Dq,Dr 13475: //LSR.W <ea> 13476: // 論理右シフトワード 13477: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13478: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13479: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13480: // : 13481: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13482: // 16 ................0000000000000000 ｱ010ｱ 13483: // 17 ................0000000000000000 00100 13484: // CCR 13485: // X countが0のとき変化しない。他は最後に押し出されたビット 13486: // N 結果の最上位ビット 13487: // Z 結果が0のときセット。他はクリア 13488: // V 常にクリア 13489: // C countが0のときクリア。他は最後に押し出されたビット 13490: // 13491: //ROR.W #<data>,Dr 13492: //ROR.W Dq,Dr 13493: //ROR.W <ea> 13494: // 右ローテートワード 13495: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13496: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13497: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13498: // : 13499: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13500: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13501: // CCR 13502: // X 常に変化しない 13503: // N 結果の最上位ビット 13504: // Z 結果が0のときセット。他はクリア 13505: // V 常にクリア 13506: // C countが0のときクリア。他は結果の最上位ビット 13507: // 13508: //ROXR.W #<data>,Dr 13509: //ROXR.W Dq,Dr 13510: //ROXR.W <ea> 13511: // 拡張右ローテートワード 13512: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13513: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13514: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 13515: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 13516: // : 13517: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13518: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13519: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13520: // CCR 13521: // X countが0のとき変化しない。他は最後に押し出されたビット 13522: // N 結果の最上位ビット 13523: // Z 結果が0のときセット。他はクリア 13524: // V 常にクリア 13525: // C countが0のときXのコピー。他は最後に押し出されたビット 13526: public static void irpXxrToRegWord () throws M68kException { 13527: int rrr; 13528: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13529: int y; 13530: int z; 13531: int t; 13532: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13533: case 0b000_000 >> 3: //ASR.W #<data>,Dr 13534: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13535: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> y) >> 1); 13536: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13537: break; 13538: case 0b001_000 >> 3: //LSR.W #<data>,Dr 13539: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13540: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = (char) x >>> y) >>> 1); 13541: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13542: break; 13543: case 0b010_000 >> 3: //ROXR.W #<data>,Dr 13544: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13545: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13546: if (y == 1 - 1) { //y=data-1=1-1 13547: t = x; 13548: } else { //y=data-1=2-1～8-1 13549: z = x << 17 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13550: } 13551: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13552: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13553: break; 13554: case 0b011_000 >> 3: //ROR.W #<data>,Dr 13555: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13556: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - 1 - y | (char) x >>> y + 1)); 13557: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 15 & 1; //Xは変化しない。Cは結果の最上位ビット 13558: break; 13559: case 0b100_000 >> 3: //ASR.W Dq,Dr 13560: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13561: XEiJ.mpuCycleCount += 6 + (y << 1); 13562: if (y == 0) { //y=data=0 13563: z = (short) x; 13564: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13565: } else { //y=data=1～63 13566: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> (y <= 16 ? y - 1 : 15)) >> 1); 13567: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13568: } 13569: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13570: break; 13571: case 0b101_000 >> 3: //LSR.W Dq,Dr 13572: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13573: XEiJ.mpuCycleCount += 6 + (y << 1); 13574: if (y == 0) { //y=data=0 13575: z = (short) x; 13576: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13577: } else { //y=data=1～63 13578: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = y <= 16 ? (char) x >>> y - 1 : 0) >>> 1); 13579: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13580: } 13581: break; 13582: case 0b110_000 >> 3: //ROXR.W Dq,Dr 13583: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13584: XEiJ.mpuCycleCount += 6 + (y << 1); 13585: //y %= 17; 13586: y = (y & 15) - (y >> 4); //y=data=-3～15 13587: y += y >> 4 & 17; //y=data=0～16 13588: if (y == 0) { //y=data=0 13589: z = (short) x; 13590: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13591: } else { //y=data=1～16 13592: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13593: if (y == 1) { //y=data=1 13594: t = x; //Cは最後に押し出されたビット 13595: } else { //y=data=2～16 13596: z = x << 17 - y | (t = z >>> y - 2) >>> 1; 13597: } 13598: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13599: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13600: } 13601: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13602: break; 13603: case 0b111_000 >> 3: //ROR.W Dq,Dr 13604: default: 13605: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13606: XEiJ.mpuCycleCount += 6 + (y << 1); 13607: if (y == 0) { 13608: z = (short) x; 13609: t = 0; //Cはクリア 13610: } else { 13611: y &= 15; //y=data=0～15 13612: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - y | (char) x >>> y)); 13613: t = z >>> 15 & 1; //Cは結果の最上位ビット 13614: } 13615: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13616: } 13617: } //irpXxrToRegWord 13618: 13619: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13620: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13621: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13622: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13623: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 13624: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 13625: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 13626: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 13627: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 13628: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 13629: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 13630: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 13631: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 13632: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 13633: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 13634: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 13635: // 13636: //ASR.L #<data>,Dr 13637: //ASR.L Dq,Dr 13638: // 算術右シフトロング 13639: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13640: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13641: // 1 ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13642: // : 13643: // 31 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13644: // 32 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13645: // CCR 13646: // X countが0のとき変化しない。他は最後に押し出されたビット 13647: // N 結果の最上位ビット 13648: // Z 結果が0のときセット。他はクリア 13649: // V 常にクリア 13650: // C countが0のときクリア。他は最後に押し出されたビット 13651: // 13652: //LSR.L #<data>,Dr 13653: //LSR.L Dq,Dr 13654: // 論理右シフトロング 13655: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13656: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13657: // 1 0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐ0*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13658: // : 13659: // 31 0000000000000000000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13660: // 32 00000000000000000000000000000000 ｱ010ｱ 13661: // 33 00000000000000000000000000000000 00100 13662: // CCR 13663: // X countが0のとき変化しない。他は最後に押し出されたビット 13664: // N 結果の最上位ビット 13665: // Z 結果が0のときセット。他はクリア 13666: // V 常にクリア 13667: // C countが0のときクリア。他は最後に押し出されたビット 13668: // 13669: //ROR.L #<data>,Dr 13670: //ROR.L Dq,Dr 13671: // 右ローテートロング 13672: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13673: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13674: // 1 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13675: // : 13676: // 31 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13677: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13678: // CCR 13679: // X 常に変化しない 13680: // N 結果の最上位ビット 13681: // Z 結果が0のときセット。他はクリア 13682: // V 常にクリア 13683: // C countが0のときクリア。他は結果の最上位ビット 13684: // 13685: //ROXR.L #<data>,Dr 13686: //ROXR.L Dq,Dr 13687: // 拡張右ローテートロング 13688: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13689: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13690: // 1 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 13691: // 2 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 13692: // : 13693: // 31 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13694: // 32 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13695: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13696: // CCR 13697: // X countが0のとき変化しない。他は最後に押し出されたビット 13698: // N 結果の最上位ビット 13699: // Z 結果が0のときセット。他はクリア 13700: // V 常にクリア 13701: // C countが0のときXのコピー。他は最後に押し出されたビット 13702: public static void irpXxrToRegLong () throws M68kException { 13703: int rrr; 13704: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13705: int y; 13706: int z; 13707: int t; 13708: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13709: case 0b000_000 >> 3: //ASR.L #<data>,Dr 13710: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13711: XEiJ.regRn[rrr] = z = (t = x >> y) >> 1; 13712: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13713: break; 13714: case 0b001_000 >> 3: //LSR.L #<data>,Dr 13715: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13716: XEiJ.regRn[rrr] = z = (t = x >>> y) >>> 1; 13717: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13718: break; 13719: case 0b010_000 >> 3: //ROXR.L #<data>,Dr 13720: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13721: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13722: if (y == 1 - 1) { //y=data-1=1-1 13723: t = x; 13724: } else { //y=data-1=2-1～8-1 13725: z = x << -y | (t = z >>> y - (2 - 1)) >>> 1; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 13726: } 13727: XEiJ.regRn[rrr] = z; 13728: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13729: break; 13730: case 0b011_000 >> 3: //ROR.L #<data>,Dr 13731: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13732: XEiJ.regRn[rrr] = z = x << ~y | x >>> y + 1; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 13733: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 31; //Xは変化しない。Cは結果の最上位ビット 13734: break; 13735: case 0b100_000 >> 3: //ASR.L Dq,Dr 13736: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13737: XEiJ.mpuCycleCount += 6 + (y << 1); 13738: if (y == 0) { //y=data=0 13739: z = x; 13740: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13741: } else { //y=data=1～63 13742: XEiJ.regRn[rrr] = z = (t = x >> (y <= 32 ? y - 1 : 31)) >> 1; 13743: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13744: } 13745: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13746: break; 13747: case 0b101_000 >> 3: //LSR.L Dq,Dr 13748: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13749: XEiJ.mpuCycleCount += 6 + (y << 1); 13750: if (y == 0) { //y=data=0 13751: z = x; 13752: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13753: } else { //y=data=1～63 13754: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x >>> y - 1 : 0) >>> 1; 13755: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13756: } 13757: break; 13758: case 0b110_000 >> 3: //ROXR.L Dq,Dr 13759: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13760: XEiJ.mpuCycleCount += 6 + (y << 1); 13761: //y %= 33; 13762: y -= 32 - y >> 6 & 33; //y=data=0～32 13763: if (y == 0) { //y=data=0 13764: z = x; 13765: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13766: } else { //y=data=1～32 13767: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13768: if (y == 1) { //y=data=1 13769: t = x; //Cは最後に押し出されたビット 13770: } else { //y=data=2～32 13771: z = x << 33 - y | (t = z >>> y - 2) >>> 1; 13772: } 13773: XEiJ.regRn[rrr] = z; 13774: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13775: } 13776: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13777: break; 13778: case 0b111_000 >> 3: //ROR.L Dq,Dr 13779: default: 13780: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13781: XEiJ.mpuCycleCount += 6 + (y << 1); 13782: if (y == 0) { 13783: z = x; 13784: t = 0; //Cはクリア 13785: } else { 13786: y &= 31; //y=data=0～31 13787: XEiJ.regRn[rrr] = z = x << -y | x >>> y; //Javaのシフト演算子は5ビットでマスクされるので32-yを-yに省略。y=32のときx|xになるが問題ない 13788: t = z >>> 31; //Cは結果の最上位ビット 13789: } 13790: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13791: } 13792: } //irpXxrToRegLong 13793: 13794: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13795: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13796: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13797: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13798: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 13799: // 13800: //ASR.W #<data>,Dr 13801: //ASR.W Dq,Dr 13802: //ASR.W <ea> 13803: // 算術右シフトワード 13804: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13805: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13806: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13807: // : 13808: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13809: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13810: // CCR 13811: // X countが0のとき変化しない。他は最後に押し出されたビット 13812: // N 結果の最上位ビット 13813: // Z 結果が0のときセット。他はクリア 13814: // V 常にクリア 13815: // C countが0のときクリア。他は最後に押し出されたビット 13816: public static void irpAsrToMem () throws M68kException { 13817: XEiJ.mpuCycleCount += 8; 13818: int ea = XEiJ.regOC & 63; 13819: int a = efaMltWord (ea); 13820: int x = XEiJ.busRws (a); 13821: int z = x >> 1; 13822: XEiJ.busWw (a, z); 13823: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 13824: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13825: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 13826: } //irpAsrToMem 13827: 13828: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13829: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13830: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13831: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13832: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 13833: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 13834: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 13835: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 13836: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 13837: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 13838: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 13839: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 13840: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 13841: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 13842: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 13843: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 13844: // 13845: //ASL.B #<data>,Dr 13846: //ASL.B Dq,Dr 13847: // 算術左シフトバイト 13848: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13849: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13850: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸ==0,V=ｱｲ!=0/-1 13851: // : 13852: // 7 ........................ｸ0000000 ｷｸ**ｷ Z=ｸ==0,V=ｱｲｳｴｵｶｷｸ!=0/-1 13853: // 8 ........................00000000 ｸ01*ｸ V=ｱｲｳｴｵｶｷｸ!=0 13854: // 9 ........................00000000 001*0 V=ｱｲｳｴｵｶｷｸ!=0 13855: // CCR 13856: // X countが0のとき変化しない。他は最後に押し出されたビット 13857: // N 結果の最上位ビット 13858: // Z 結果が0のときセット。他はクリア 13859: // V ASRで元に戻せないときセット。他はクリア 13860: // C countが0のときクリア。他は最後に押し出されたビット 13861: // 13862: //LSL.B #<data>,Dr 13863: //LSL.B Dq,Dr 13864: // 論理左シフトバイト 13865: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13866: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13867: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸ==0 13868: // : 13869: // 7 ........................ｸ0000000 ｷｸ*0ｷ Z=ｸ==0 13870: // 8 ........................00000000 ｸ010ｸ 13871: // 9 ........................00000000 00100 13872: // CCR 13873: // X countが0のとき変化しない。他は最後に押し出されたビット 13874: // N 結果の最上位ビット 13875: // Z 結果が0のときセット。他はクリア 13876: // V 常にクリア 13877: // C countが0のときクリア。他は最後に押し出されたビット 13878: // 13879: //ROL.B #<data>,Dr 13880: //ROL.B Dq,Dr 13881: // 左ローテートバイト 13882: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13883: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13884: // 1 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13885: // : 13886: // 7 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｷ Z=ｱｲｳｴｵｶｷｸ==0 13887: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13888: // CCR 13889: // X 常に変化しない 13890: // N 結果の最上位ビット 13891: // Z 結果が0のときセット。他はクリア 13892: // V 常にクリア 13893: // C countが0のときクリア。他は結果の最下位ビット 13894: // 13895: //ROXL.B #<data>,Dr 13896: //ROXL.B Dq,Dr 13897: // 拡張左ローテートバイト 13898: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13899: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13900: // 1 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13901: // 2 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13902: // : 13903: // 7 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13904: // 8 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13905: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13906: // CCR 13907: // X countが0のとき変化しない。他は最後に押し出されたビット 13908: // N 結果の最上位ビット 13909: // Z 結果が0のときセット。他はクリア 13910: // V 常にクリア 13911: // C countが0のときXのコピー。他は最後に押し出されたビット 13912: public static void irpXxlToRegByte () throws M68kException { 13913: int rrr; 13914: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13915: int y; 13916: int z; 13917: int t; 13918: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13919: case 0b000_000 >> 3: //ASL.B #<data>,Dr 13920: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13921: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13922: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13923: break; 13924: case 0b001_000 >> 3: //LSL.B #<data>,Dr 13925: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13926: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13927: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13928: break; 13929: case 0b010_000 >> 3: //ROXL.B #<data>,Dr 13930: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13931: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13932: if (y == 1 - 1) { //y=data-1=1-1 13933: t = x; 13934: } else { //y=data-1=2-1～8-1 13935: z = (t = z << y - (2 - 1)) << 1 | (0xff & x) >>> 9 - 1 - y; 13936: } 13937: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13938: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13939: break; 13940: case 0b011_000 >> 3: //ROL.B #<data>,Dr 13941: XEiJ.mpuCycleCount += 6 + ((y = XEiJ.regOC >> 9 & 7) << 1); //y=data&7 13942: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 13943: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 13944: break; 13945: case 0b100_000 >> 3: //ASL.B Dq,Dr 13946: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13947: XEiJ.mpuCycleCount += 6 + (y << 1); 13948: if (y <= 7) { //y=data=0～7 13949: if (y == 0) { //y=data=0 13950: z = (byte) x; 13951: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 13952: } else { //y=data=1～7 13953: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y - 1) << 1)); 13954: t = (z >> y != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13955: } 13956: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13957: } else { //y=data=8～63 13958: XEiJ.regRn[rrr] = ~0xff & x; 13959: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((byte) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 8 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 13960: } 13961: break; 13962: case 0b101_000 >> 3: //LSL.B Dq,Dr 13963: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13964: XEiJ.mpuCycleCount += 6 + (y << 1); 13965: if (y == 0) { //y=data=0 13966: z = (byte) x; 13967: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13968: } else { //y=data=1～63 13969: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = y <= 8 ? x << y - 1 : 0) << 1)); 13970: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13971: } 13972: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13973: break; 13974: case 0b110_000 >> 3: //ROXL.B Dq,Dr 13975: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13976: XEiJ.mpuCycleCount += 6 + (y << 1); 13977: //y %= 9; 13978: y = (y & 7) - (y >> 3); //y=data=-7～7 13979: y += y >> 3 & 9; //y=data=0～8 13980: if (y == 0) { //y=data=0 13981: z = (byte) x; 13982: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13983: } else { //y=data=1～8 13984: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13985: if (y == 1) { //y=data=1 13986: t = x; //Cは最後に押し出されたビット 13987: } else { //y=data=2～8 13988: z = (t = z << y - 2) << 1 | (0xff & x) >>> 9 - y; 13989: } 13990: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13991: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13992: } 13993: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13994: break; 13995: case 0b111_000 >> 3: //ROL.B Dq,Dr 13996: default: 13997: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13998: XEiJ.mpuCycleCount += 6 + (y << 1); 13999: if (y == 0) { 14000: z = (byte) x; 14001: t = 0; //Cはクリア 14002: } else { 14003: y &= 7; //y=data=0～7 14004: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 14005: t = z & 1; //Cは結果の最下位ビット 14006: } 14007: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14008: } 14009: } //irpXxlToRegByte 14010: 14011: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14012: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14013: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14014: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14015: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 14016: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 14017: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 14018: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 14019: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 14020: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 14021: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 14022: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 14023: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 14024: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 14025: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 14026: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 14027: // 14028: //ASL.W #<data>,Dr 14029: //ASL.W Dq,Dr 14030: //ASL.W <ea> 14031: // 算術左シフトワード 14032: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14033: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14034: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 14035: // : 14036: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 14037: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14038: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14039: // CCR 14040: // X countが0のとき変化しない。他は最後に押し出されたビット 14041: // N 結果の最上位ビット 14042: // Z 結果が0のときセット。他はクリア 14043: // V ASRで元に戻せないときセット。他はクリア 14044: // C countが0のときクリア。他は最後に押し出されたビット 14045: // 14046: //LSL.W #<data>,Dr 14047: //LSL.W Dq,Dr 14048: //LSL.W <ea> 14049: // 論理左シフトワード 14050: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14051: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14052: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14053: // : 14054: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 14055: // 16 ................0000000000000000 ﾀ010ﾀ 14056: // 17 ................0000000000000000 00100 14057: // CCR 14058: // X countが0のとき変化しない。他は最後に押し出されたビット 14059: // N 結果の最上位ビット 14060: // Z 結果が0のときセット。他はクリア 14061: // V 常にクリア 14062: // C countが0のときクリア。他は最後に押し出されたビット 14063: // 14064: //ROL.W #<data>,Dr 14065: //ROL.W Dq,Dr 14066: //ROL.W <ea> 14067: // 左ローテートワード 14068: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14069: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14070: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14071: // : 14072: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14073: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14074: // CCR 14075: // X 常に変化しない 14076: // N 結果の最上位ビット 14077: // Z 結果が0のときセット。他はクリア 14078: // V 常にクリア 14079: // C countが0のときクリア。他は結果の最下位ビット 14080: // 14081: //ROXL.W #<data>,Dr 14082: //ROXL.W Dq,Dr 14083: //ROXL.W <ea> 14084: // 拡張左ローテートワード 14085: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14086: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14087: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14088: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14089: // : 14090: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14091: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14092: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14093: // CCR 14094: // X countが0のとき変化しない。他は最後に押し出されたビット 14095: // N 結果の最上位ビット 14096: // Z 結果が0のときセット。他はクリア 14097: // V 常にクリア 14098: // C countが0のときXのコピー。他は最後に押し出されたビット 14099: public static void irpXxlToRegWord () throws M68kException { 14100: int rrr; 14101: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 14102: int y; 14103: int z; 14104: int t; 14105: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 14106: case 0b000_000 >> 3: //ASL.W #<data>,Dr 14107: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14108: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 14109: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14110: break; 14111: case 0b001_000 >> 3: //LSL.W #<data>,Dr 14112: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14113: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 14114: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14115: break; 14116: case 0b010_000 >> 3: //ROXL.W #<data>,Dr 14117: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14118: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14119: if (y == 1 - 1) { //y=data-1=1-1 14120: t = x; 14121: } else { //y=data-1=2-1～8-1 14122: z = (t = z << y - (2 - 1)) << 1 | (char) x >>> 17 - 1 - y; 14123: } 14124: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 14125: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14126: break; 14127: case 0b011_000 >> 3: //ROL.W #<data>,Dr 14128: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14129: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y + 1 | (char) x >>> 16 - 1 - y)); 14130: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 14131: break; 14132: case 0b100_000 >> 3: //ASL.W Dq,Dr 14133: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14134: XEiJ.mpuCycleCount += 6 + (y << 1); 14135: if (y <= 15) { //y=data=0～15 14136: if (y == 0) { //y=data=0 14137: z = (short) x; 14138: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 14139: } else { //y=data=1～15 14140: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y - 1) << 1)); 14141: t = (z >> y != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14142: } 14143: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14144: } else { //y=data=16～63 14145: XEiJ.regRn[rrr] = ~0xffff & x; 14146: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((short) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 16 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 14147: } 14148: break; 14149: case 0b101_000 >> 3: //LSL.W Dq,Dr 14150: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14151: XEiJ.mpuCycleCount += 6 + (y << 1); 14152: if (y == 0) { //y=data=0 14153: z = (short) x; 14154: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 14155: } else { //y=data=1～63 14156: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = y <= 16 ? x << y - 1 : 0) << 1)); 14157: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14158: } 14159: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14160: break; 14161: case 0b110_000 >> 3: //ROXL.W Dq,Dr 14162: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14163: XEiJ.mpuCycleCount += 6 + (y << 1); 14164: //y %= 17; 14165: y = (y & 15) - (y >> 4); //y=data=-3～15 14166: y += y >> 4 & 17; //y=data=0～16 14167: if (y == 0) { //y=data=0 14168: z = (short) x; 14169: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 14170: } else { //y=data=1～16 14171: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14172: if (y == 1) { //y=data=1 14173: t = x; //Cは最後に押し出されたビット 14174: } else { //y=data=2～16 14175: z = (t = z << y - 2) << 1 | (char) x >>> 17 - y; 14176: } 14177: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 14178: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14179: } 14180: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14181: break; 14182: case 0b111_000 >> 3: //ROL.W Dq,Dr 14183: default: 14184: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14185: XEiJ.mpuCycleCount += 6 + (y << 1); 14186: if (y == 0) { 14187: z = (short) x; 14188: t = 0; //Cはクリア 14189: } else { 14190: y &= 15; //y=data=0～15 14191: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y | (char) x >>> 16 - y)); 14192: t = z & 1; //Cは結果の最下位ビット 14193: } 14194: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14195: } 14196: } //irpXxlToRegWord 14197: 14198: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14199: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14200: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14201: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14202: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 14203: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 14204: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 14205: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 14206: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 14207: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 14208: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 14209: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 14210: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 14211: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 14212: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 14213: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 14214: // 14215: //ASL.L #<data>,Dr 14216: //ASL.L Dq,Dr 14217: // 算術左シフトロング 14218: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14219: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ**0 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14220: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0,V=ｱｲ!=0/-1 14221: // : 14222: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ**ﾏ Z=ﾐ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0/-1 14223: // 32 00000000000000000000000000000000 ﾐ01*ﾐ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14224: // 33 00000000000000000000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14225: // CCR 14226: // X countが0のとき変化しない。他は最後に押し出されたビット 14227: // N 結果の最上位ビット 14228: // Z 結果が0のときセット。他はクリア 14229: // V ASRで元に戻せないときセット。他はクリア 14230: // C countが0のときクリア。他は最後に押し出されたビット 14231: // 14232: //LSL.L #<data>,Dr 14233: //LSL.L Dq,Dr 14234: // 論理左シフトロング 14235: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14236: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14237: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14238: // : 14239: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ*0ﾏ Z=ﾐ==0 14240: // 32 00000000000000000000000000000000 ﾐ010ﾐ 14241: // 33 00000000000000000000000000000000 00100 14242: // CCR 14243: // X countが0のとき変化しない。他は最後に押し出されたビット 14244: // N 結果の最上位ビット 14245: // Z 結果が0のときセット。他はクリア 14246: // V 常にクリア 14247: // C countが0のときクリア。他は最後に押し出されたビット 14248: // 14249: //ROL.L #<data>,Dr 14250: //ROL.L Dq,Dr 14251: // 左ローテートロング 14252: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14253: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14254: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14255: // : 14256: // 31 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14257: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14258: // CCR 14259: // X 常に変化しない 14260: // N 結果の最上位ビット 14261: // Z 結果が0のときセット。他はクリア 14262: // V 常にクリア 14263: // C countが0のときクリア。他は結果の最下位ビット 14264: // 14265: //ROXL.L #<data>,Dr 14266: //ROXL.L Dq,Dr 14267: // 拡張左ローテートロング 14268: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14269: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14270: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14271: // 2 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14272: // : 14273: // 31 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 14274: // 32 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 14275: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14276: // CCR 14277: // X countが0のとき変化しない。他は最後に押し出されたビット 14278: // N 結果の最上位ビット 14279: // Z 結果が0のときセット。他はクリア 14280: // V 常にクリア 14281: // C countが0のときXのコピー。他は最後に押し出されたビット 14282: public static void irpXxlToRegLong () throws M68kException { 14283: int rrr; 14284: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 14285: int y; 14286: int z; 14287: int t; 14288: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 14289: case 0b000_000 >> 3: //ASL.L #<data>,Dr 14290: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14291: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14292: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14293: break; 14294: case 0b001_000 >> 3: //LSL.L #<data>,Dr 14295: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14296: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14297: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14298: break; 14299: case 0b010_000 >> 3: //ROXL.L #<data>,Dr 14300: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14301: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14302: if (y == 1 - 1) { //y=data-1=1-1 14303: t = x; 14304: } else { //y=data-1=2-1～8-1 14305: z = (t = z << y - (2 - 1)) << 1 | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 14306: } 14307: XEiJ.regRn[rrr] = z; 14308: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14309: break; 14310: case 0b011_000 >> 3: //ROL.L #<data>,Dr 14311: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14312: XEiJ.regRn[rrr] = z = x << y + 1 | x >>> ~y; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 14313: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 14314: break; 14315: case 0b100_000 >> 3: //ASL.L Dq,Dr 14316: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14317: XEiJ.mpuCycleCount += 8 + (y << 1); 14318: if (y <= 31) { //y=data=0～31 14319: if (y == 0) { //y=data=0 14320: z = x; 14321: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 14322: } else { //y=data=1～31 14323: XEiJ.regRn[rrr] = z = (t = x << y - 1) << 1; 14324: t = (z >> y != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14325: } 14326: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14327: } else { //y=data=32～63 14328: XEiJ.regRn[rrr] = 0; 14329: XEiJ.regCCR = XEiJ.REG_CCR_Z | (x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 32 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 14330: } 14331: break; 14332: case 0b101_000 >> 3: //LSL.L Dq,Dr 14333: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14334: XEiJ.mpuCycleCount += 8 + (y << 1); 14335: if (y == 0) { //y=data=0 14336: z = x; 14337: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 14338: } else { //y=data=1～63 14339: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x << y - 1 : 0) << 1; 14340: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14341: } 14342: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14343: break; 14344: case 0b110_000 >> 3: //ROXL.L Dq,Dr 14345: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14346: XEiJ.mpuCycleCount += 8 + (y << 1); 14347: //y %= 33; 14348: y -= 32 - y >> 6 & 33; //y=data=0～32 14349: if (y == 0) { //y=data=0 14350: z = x; 14351: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 14352: } else { //y=data=1～32 14353: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14354: if (y == 1) { //y=data=1 14355: t = x; //Cは最後に押し出されたビット 14356: } else { //y=data=2～32 14357: z = (t = z << y - 2) << 1 | x >>> 33 - y; 14358: } 14359: XEiJ.regRn[rrr] = z; 14360: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14361: } 14362: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14363: break; 14364: case 0b111_000 >> 3: //ROL.L Dq,Dr 14365: default: 14366: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14367: XEiJ.mpuCycleCount += 8 + (y << 1); 14368: if (y == 0) { 14369: z = x; 14370: t = 0; //Cはクリア 14371: } else { 14372: XEiJ.regRn[rrr] = z = x << y | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるのでy&31をyに、32-(y&31)を-yに省略。y=32のときx|xになるが問題ない 14373: t = z & 1; 14374: } 14375: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14376: } 14377: } //irpXxlToRegLong 14378: 14379: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14380: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14381: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14382: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14383: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 14384: // 14385: //ASL.W #<data>,Dr 14386: //ASL.W Dq,Dr 14387: //ASL.W <ea> 14388: // 算術左シフトワード 14389: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14390: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14391: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 14392: // : 14393: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 14394: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14395: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14396: // CCR 14397: // X countが0のとき変化しない。他は最後に押し出されたビット 14398: // N 結果の最上位ビット 14399: // Z 結果が0のときセット。他はクリア 14400: // V ASRで元に戻せないときセット。他はクリア 14401: // C countが0のときクリア。他は最後に押し出されたビット 14402: public static void irpAslToMem () throws M68kException { 14403: XEiJ.mpuCycleCount += 8; 14404: int ea = XEiJ.regOC & 63; 14405: int a = efaMltWord (ea); 14406: int x = XEiJ.busRws (a); 14407: int z = (short) (x << 1); 14408: XEiJ.busWw (a, z); 14409: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14410: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14411: (x ^ z) >>> 31 << 1 | //Vは最上位ビットが変化したときセット 14412: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14413: } //irpAslToMem 14414: 14415: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14416: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14417: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14418: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14419: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 14420: // 14421: //LSR.W #<data>,Dr 14422: //LSR.W Dq,Dr 14423: //LSR.W <ea> 14424: // 論理右シフトワード 14425: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14426: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14427: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 14428: // : 14429: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 14430: // 16 ................0000000000000000 ｱ010ｱ 14431: // 17 ................0000000000000000 00100 14432: // CCR 14433: // X countが0のとき変化しない。他は最後に押し出されたビット 14434: // N 結果の最上位ビット 14435: // Z 結果が0のときセット。他はクリア 14436: // V 常にクリア 14437: // C countが0のときクリア。他は最後に押し出されたビット 14438: public static void irpLsrToMem () throws M68kException { 14439: XEiJ.mpuCycleCount += 8; 14440: int ea = XEiJ.regOC & 63; 14441: int a = efaMltWord (ea); 14442: int x = XEiJ.busRwz (a); 14443: int z = x >>> 1; 14444: XEiJ.busWw (a, z); 14445: XEiJ.regCCR = ((z == 0 ? XEiJ.REG_CCR_Z : 0) | 14446: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14447: } //irpLsrToMem 14448: 14449: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14450: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14451: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14452: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14453: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 14454: // 14455: //LSL.W #<data>,Dr 14456: //LSL.W Dq,Dr 14457: //LSL.W <ea> 14458: // 論理左シフトワード 14459: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14460: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14461: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14462: // : 14463: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 14464: // 16 ................0000000000000000 ﾀ010ﾀ 14465: // 17 ................0000000000000000 00100 14466: // CCR 14467: // X countが0のとき変化しない。他は最後に押し出されたビット 14468: // N 結果の最上位ビット 14469: // Z 結果が0のときセット。他はクリア 14470: // V 常にクリア 14471: // C countが0のときクリア。他は最後に押し出されたビット 14472: public static void irpLslToMem () throws M68kException { 14473: XEiJ.mpuCycleCount += 8; 14474: int ea = XEiJ.regOC & 63; 14475: int a = efaMltWord (ea); 14476: int x = XEiJ.busRws (a); 14477: int z = (short) (x << 1); 14478: XEiJ.busWw (a, z); 14479: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14480: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14481: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14482: } //irpLslToMem 14483: 14484: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14485: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14486: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14487: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14488: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 14489: // 14490: //ROXR.W #<data>,Dr 14491: //ROXR.W Dq,Dr 14492: //ROXR.W <ea> 14493: // 拡張右ローテートワード 14494: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14495: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14496: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14497: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14498: // : 14499: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14500: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14501: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14502: // CCR 14503: // X countが0のとき変化しない。他は最後に押し出されたビット 14504: // N 結果の最上位ビット 14505: // Z 結果が0のときセット。他はクリア 14506: // V 常にクリア 14507: // C countが0のときXのコピー。他は最後に押し出されたビット 14508: public static void irpRoxrToMem () throws M68kException { 14509: XEiJ.mpuCycleCount += 8; 14510: int ea = XEiJ.regOC & 63; 14511: int a = efaMltWord (ea); 14512: int x = XEiJ.busRwz (a); 14513: int z = -(XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | x >>> 1; 14514: XEiJ.busWw (a, z); 14515: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14516: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14517: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14518: } //irpRoxrToMem 14519: 14520: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14521: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14522: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14523: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14524: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 14525: // 14526: //ROXL.W #<data>,Dr 14527: //ROXL.W Dq,Dr 14528: //ROXL.W <ea> 14529: // 拡張左ローテートワード 14530: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14531: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14532: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14533: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14534: // : 14535: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14536: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14537: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14538: // CCR 14539: // X countが0のとき変化しない。他は最後に押し出されたビット 14540: // N 結果の最上位ビット 14541: // Z 結果が0のときセット。他はクリア 14542: // V 常にクリア 14543: // C countが0のときXのコピー。他は最後に押し出されたビット 14544: public static void irpRoxlToMem () throws M68kException { 14545: XEiJ.mpuCycleCount += 8; 14546: int ea = XEiJ.regOC & 63; 14547: int a = efaMltWord (ea); 14548: int x = XEiJ.busRws (a); 14549: int z = (short) (x << 1 | XEiJ.regCCR >> 4 & 1); 14550: XEiJ.busWw (a, z); 14551: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14552: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14553: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14554: } //irpRoxlToMem 14555: 14556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14557: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14558: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14559: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14560: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 14561: // 14562: //ROR.W #<data>,Dr 14563: //ROR.W Dq,Dr 14564: //ROR.W <ea> 14565: // 右ローテートワード 14566: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14567: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14568: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14569: // : 14570: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14571: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14572: // CCR 14573: // X 常に変化しない 14574: // N 結果の最上位ビット 14575: // Z 結果が0のときセット。他はクリア 14576: // V 常にクリア 14577: // C countが0のときクリア。他は結果の最上位ビット 14578: public static void irpRorToMem () throws M68kException { 14579: XEiJ.mpuCycleCount += 8; 14580: int ea = XEiJ.regOC & 63; 14581: int a = efaMltWord (ea); 14582: int x = XEiJ.busRwz (a); 14583: int z = (short) (x << 15 | x >>> 1); 14584: XEiJ.busWw (a, z); 14585: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14586: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14587: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14588: z >>> 31); //Cは結果の最上位ビット 14589: } //irpRorToMem 14590: 14591: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14592: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14593: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14594: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14595: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 14596: // 14597: //ROL.W #<data>,Dr 14598: //ROL.W Dq,Dr 14599: //ROL.W <ea> 14600: // 左ローテートワード 14601: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14602: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14603: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14604: // : 14605: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14606: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14607: // CCR 14608: // X 常に変化しない 14609: // N 結果の最上位ビット 14610: // Z 結果が0のときセット。他はクリア 14611: // V 常にクリア 14612: // C countが0のときクリア。他は結果の最下位ビット 14613: public static void irpRolToMem () throws M68kException { 14614: XEiJ.mpuCycleCount += 8; 14615: int ea = XEiJ.regOC & 63; 14616: int a = efaMltWord (ea); 14617: int x = XEiJ.busRwz (a); 14618: int z = (short) (x << 1 | x >>> 15); 14619: XEiJ.busWw (a, z); 14620: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14621: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14622: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14623: z & 1); //Cは結果の最下位ビット 14624: } //irpRolToMem 14625: 14626: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14627: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14628: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14629: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14630: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 14631: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 14632: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 14633: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 14634: public static void irpBftst () throws M68kException { 14635: int w; 14636: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14637: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14638: } else { 14639: w = XEiJ.regPC; 14640: XEiJ.regPC = w + 2; 14641: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14642: } 14643: if ((w & ~0b0000_111_111_111_111) != 0 || 14644: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14645: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14646: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14647: throw M68kException.m6eSignal; 14648: } 14649: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14650: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14651: XEiJ.mpuCycleCount += 4; 14652: int ea = XEiJ.regOC & 63; 14653: int z; 14654: if (ea < XEiJ.EA_AR) { //BFTST Dr{～} 14655: z = XEiJ.regRn[ea]; 14656: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14657: } else { //BFTST <mem>{～} 14658: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14659: o &= 7; 14660: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14661: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o : //不要なバイトにアクセスしない 14662: z == 1 ? XEiJ.busRws (a) << 16 + o : //020以上なのでアドレスエラーは出ない 14663: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o : 14664: z == 3 ? XEiJ.busRls (a) << o : 14665: XEiJ.busRls (a) << o | XEiJ.busRbz (a + 4) >>> 8 - o); 14666: } 14667: z >>= w; //符号拡張。下位のゴミを消す 14668: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14669: } //irpBftst 14670: 14671: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14672: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14673: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14674: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14675: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 14676: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 14677: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 14678: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 14679: public static void irpBfextu () throws M68kException { 14680: int w; 14681: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14682: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14683: } else { 14684: w = XEiJ.regPC; 14685: XEiJ.regPC = w + 2; 14686: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14687: } 14688: if ((w & ~0b0111_111_111_111_111) != 0 || 14689: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14690: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14691: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14692: throw M68kException.m6eSignal; 14693: } 14694: int n = w >> 12; 14695: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14696: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14697: XEiJ.mpuCycleCount += 4; 14698: int ea = XEiJ.regOC & 63; 14699: int z; 14700: if (ea < XEiJ.EA_AR) { //BFEXTU Dr{～} 14701: z = XEiJ.regRn[ea]; 14702: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14703: } else { //BFEXTU <mem>{～} 14704: int a = efaCntLong (ea) + (o >> 3); 14705: o &= 7; 14706: z = 31 - w + o >> 3; 14707: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o : //不要なバイトにアクセスしない 14708: z == 1 ? XEiJ.busRws (a) << 16 + o : //020以上なのでアドレスエラーは出ない 14709: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o : 14710: z == 3 ? XEiJ.busRls (a) << o : 14711: XEiJ.busRls (a) << o | XEiJ.busRbz (a + 4) >>> 8 - o); 14712: } 14713: XEiJ.regRn[n] = z >>> w; //ゼロ拡張 14714: z >>= w; //符号拡張。下位のゴミを消す 14715: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14716: } //irpBfextu 14717: 14718: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14719: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14720: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14721: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14722: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 14723: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 14724: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 14725: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 14726: public static void irpBfchg () throws M68kException { 14727: int w; 14728: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14729: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14730: } else { 14731: w = XEiJ.regPC; 14732: XEiJ.regPC = w + 2; 14733: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14734: } 14735: if ((w & ~0b0000_111_111_111_111) != 0 || 14736: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14737: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14738: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14739: throw M68kException.m6eSignal; 14740: } 14741: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14742: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14743: XEiJ.mpuCycleCount += 4; 14744: int ea = XEiJ.regOC & 63; 14745: int z; 14746: if (ea < XEiJ.EA_AR) { //BFCHG Dr{～} 14747: z = XEiJ.regRn[ea]; 14748: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14749: int t = z ^ -1 << w; //フィールドの幅だけ反転する 14750: XEiJ.regRn[ea] = t << -o | t >>> o; 14751: } else { //BFCHG <mem>{～} 14752: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14753: o &= 7; 14754: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14755: if (z == 0) { 14756: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14757: int t = XEiJ.busRbs (a) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14758: z = t << o; // z abcde-00 00000000 00000000 00000000 14759: // // -1<<w 11111000 00000000 00000000 00000000 14760: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14761: // //t^-1<<w>>>o --ABCDE- 00000000 00000000 00000000 14762: XEiJ.busWb (a, (t ^ -1 << w >>> o) >>> 24); // <ea> --ABCDE- 14763: } else if (z == 1) { 14764: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14765: int t = XEiJ.busRws (a) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14766: z = t << o; // z abcde--- -0000000 00000000 00000000 14767: // // -1<<w 11111000 00000000 00000000 00000000 14768: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14769: // //t^-1<<w>>>o -------A BCDE---- 00000000 00000000 14770: XEiJ.busWw (a, (t ^ -1 << w >>> o) >>> 16); // <ea> -------A BCDE---- 14771: } else if (z == 2) { 14772: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14773: int t = XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8; // t -------a bcdefghi jkl----- 00000000 14774: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14775: // // -1<<w 11111111 11110000 00000000 00000000 14776: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14777: t ^= -1 << w >>> o; // t -------A BCDEFGHI JKL----- 00000000 14778: XEiJ.busWw (a, t >>> 16); // <ea> -------A BCDEFGHI jkl----- 14779: XEiJ.busWb (a + 2, t >>> 8); // <ea> -------A BCDEFGHI JKL----- 14780: } else if (z == 3) { 14781: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14782: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rs------ 14783: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14784: // // -1<<w 11111111 11111111 11100000 00000000 14785: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14786: XEiJ.busWl (a, t ^ -1 << w >>> o); // <ea> -------A BCDEFGHI JKLMNOPQ RS------ 14787: } else { 14788: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14789: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rstuvwxy 14790: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14791: // -1>>>o 00000001 11111111 11111111 11111111 14792: XEiJ.busWl (a, t ^ -1 >>> o); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY 14793: t = XEiJ.busRbz (a + 4); // t 00000000 00000000 00000000 z------- 14794: // // t>>>8-o 00000000 00000000 00000000 0z------ 14795: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14796: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14797: XEiJ.busWb (a + 4, t ^ -1 << 8 - o + w); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY Z------- 14798: } 14799: } 14800: z >>= w; //符号拡張。下位のゴミを消す 14801: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14802: } //irpBfchg 14803: 14804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14805: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14806: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14808: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 14809: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 14810: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 14811: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 14812: public static void irpBfexts () throws M68kException { 14813: int w; 14814: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14815: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14816: } else { 14817: w = XEiJ.regPC; 14818: XEiJ.regPC = w + 2; 14819: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14820: } 14821: if ((w & ~0b0111_111_111_111_111) != 0 || 14822: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14823: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14824: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14825: throw M68kException.m6eSignal; 14826: } 14827: int n = w >> 12; 14828: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14829: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14830: XEiJ.mpuCycleCount += 4; 14831: int ea = XEiJ.regOC & 63; 14832: int z; 14833: if (ea < XEiJ.EA_AR) { //BFEXTS Dr{～} 14834: z = XEiJ.regRn[ea]; 14835: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14836: } else { //BFEXTS <mem>{～} 14837: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14838: o &= 7; 14839: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14840: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o : //不要なバイトにアクセスしない 14841: z == 1 ? XEiJ.busRws (a) << 16 + o : //020以上なのでアドレスエラーは出ない 14842: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o : 14843: z == 3 ? XEiJ.busRls (a) << o : 14844: XEiJ.busRls (a) << o | XEiJ.busRbz (a + 4) >>> 8 - o); 14845: } 14846: XEiJ.regRn[n] = z >>= w; //符号拡張。下位のゴミを消す 14847: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14848: } //irpBfexts 14849: 14850: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14851: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14852: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14853: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14854: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 14855: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 14856: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 14857: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 14858: public static void irpBfclr () throws M68kException { 14859: int w; 14860: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14861: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14862: } else { 14863: w = XEiJ.regPC; 14864: XEiJ.regPC = w + 2; 14865: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14866: } 14867: if ((w & ~0b0000_111_111_111_111) != 0 || 14868: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14869: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14870: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14871: throw M68kException.m6eSignal; 14872: } 14873: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14874: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14875: XEiJ.mpuCycleCount += 4; 14876: int ea = XEiJ.regOC & 63; 14877: int z; 14878: if (ea < XEiJ.EA_AR) { //BFCLR Dr{～} 14879: z = XEiJ.regRn[ea]; 14880: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14881: int t = z & ~(-1 << w); //フィールドの幅だけ0を並べる 14882: XEiJ.regRn[ea] = t << -o | t >>> o; 14883: } else { //BFCLR <mem>{～} 14884: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14885: o &= 7; 14886: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14887: if (z == 0) { 14888: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14889: int t = XEiJ.busRbs (a) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14890: z = t << o; // z abcde-00 00000000 00000000 00000000 14891: // // -1<<w 11111000 00000000 00000000 00000000 14892: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14893: // //~(-1<<w>>>o) 11000001 11111111 11111111 11111111 14894: // //t&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 14895: XEiJ.busWb (a, (t & ~(-1 << w >>> o)) >>> 24); // <ea> --00000- 14896: } else if (z == 1) { 14897: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14898: int t = XEiJ.busRws (a) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14899: z = t << o; // z abcde--- -0000000 00000000 00000000 14900: // // -1<<w 11111000 00000000 00000000 00000000 14901: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14902: // //~(-1<<w>>>o) 11111110 00001111 11111111 11111111 14903: // //t&~(-1<<w>>>o) -------0 0000---- 00000000 00000000 14904: XEiJ.busWw (a, (t & ~(-1 << w >>> o)) >>> 16); // <ea> -------0 0000---- 14905: } else if (z == 2) { 14906: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14907: int t = XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8; // t -------a bcdefghi jkl----- 00000000 14908: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14909: // // -1<<w 11111111 11110000 00000000 00000000 14910: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14911: // //~(-1<<w>>>o) 11111110 00000000 00011111 11111111 14912: t &= ~(-1 << w >>> o); // t -------0 00000000 000----- 00000000 14913: XEiJ.busWw (a, t >>> 16); // <ea> -------0 00000000 jkl----- 14914: XEiJ.busWb (a + 2, t >>> 8); // <ea> -------0 00000000 000----- 14915: } else if (z == 3) { 14916: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14917: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rs------ 14918: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14919: // // -1<<w 11111111 11111111 11100000 00000000 14920: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14921: // //~(-1<<w>>>o) 11111110 00000000 00000000 00111111 14922: XEiJ.busWl (a, t & ~(-1 << w >>> o)); // <ea> -------0 00000000 00000000 00------ 14923: } else { 14924: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14925: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rstuvwxy 14926: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14927: // -1>>>o 00000001 11111111 11111111 11111111 14928: // ~(-1>>>o) 11111110 00000000 00000000 00000000 14929: XEiJ.busWl (a, t & ~(-1 >>> o)); // <ea> -------0 00000000 00000000 00000000 14930: t = XEiJ.busRbz (a + 4); // t 00000000 00000000 00000000 z------- 14931: // // t>>>8-o 00000000 00000000 00000000 0z------ 14932: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14933: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14934: // //~(-1<<8-o+w) 00000000 00000000 00000000 01111111 14935: XEiJ.busWb (a + 4, t & ~(-1 << 8 - o + w)); // <ea> -------0 00000000 00000000 00000000 0------- 14936: } 14937: } 14938: z >>= w; //符号拡張。下位のゴミを消す 14939: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14940: } //irpBfclr 14941: 14942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14943: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14944: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14945: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14946: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 14947: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 14948: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 14949: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 14950: public static void irpBfffo () throws M68kException { 14951: int w; 14952: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14953: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14954: } else { 14955: w = XEiJ.regPC; 14956: XEiJ.regPC = w + 2; 14957: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14958: } 14959: if ((w & ~0b0111_111_111_111_111) != 0 || 14960: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14961: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14962: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14963: throw M68kException.m6eSignal; 14964: } 14965: int n = w >> 12; 14966: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14967: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14968: XEiJ.mpuCycleCount += 4; 14969: int ea = XEiJ.regOC & 63; 14970: int z; 14971: if (ea < XEiJ.EA_AR) { //BFFFO Dr{～} 14972: z = XEiJ.regRn[ea]; 14973: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14974: } else { //BFFFO <mem>{～} 14975: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14976: int o7 = o & 7; 14977: z = 31 - w + o7 >> 3; //フィールドが跨ぐバイト境界の数。0～4 14978: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o7 : //不要なバイトにアクセスしない 14979: z == 1 ? XEiJ.busRws (a) << 16 + o7 : //020以上なのでアドレスエラーは出ない 14980: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o7 : 14981: z == 3 ? XEiJ.busRls (a) << o7 : 14982: XEiJ.busRls (a) << o7 | XEiJ.busRbz (a + 4) >>> 8 - o7); 14983: } 14984: if (true) { 14985: XEiJ.regRn[n] = Integer.numberOfLeadingZeros (z >>> w) - w + o; //ゼロ拡張してから1のビットを探す。見つからないときはoffset+widthになる 14986: } else { 14987: int t = z >>> w; 14988: if (t == 0) { 14989: XEiJ.regRn[n] = 32 - w + o; 14990: } else { 14991: int k = -(t >>> 16) >> 16 & 16; 14992: k += -(t >>> k + 8) >> 8 & 8; 14993: k += -(t >>> k + 4) >> 4 & 4; 14994: // bit3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 14995: // bit2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 14996: // bit1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 14997: // bit0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 14998: XEiJ.regRn[n] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (t >>> k << 1)) & 3) + k - w + o; //intのシフトカウントは下位5bitだけが使用される 14999: } 15000: } 15001: z >>= w; //符号拡張。下位のゴミを消す 15002: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 15003: } //irpBfffo 15004: 15005: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15006: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15007: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15009: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 15010: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 15011: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 15012: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 15013: public static void irpBfset () throws M68kException { 15014: int w; 15015: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 15016: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 15017: } else { 15018: w = XEiJ.regPC; 15019: XEiJ.regPC = w + 2; 15020: w = XEiJ.busRwze (w); //pcwz。拡張ワード 15021: } 15022: if ((w & ~0b0000_111_111_111_111) != 0 || 15023: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 15024: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 15025: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 15026: throw M68kException.m6eSignal; 15027: } 15028: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 15029: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 15030: XEiJ.mpuCycleCount += 4; 15031: int ea = XEiJ.regOC & 63; 15032: int z; 15033: if (ea < XEiJ.EA_AR) { //BFSET Dr{～} 15034: z = XEiJ.regRn[ea]; 15035: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 15036: int t = z | -1 << w; //フィールドの幅だけ1を並べる 15037: XEiJ.regRn[ea] = t << -o | t >>> o; 15038: } else { //BFSET <mem>{～} 15039: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 15040: o &= 7; 15041: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 15042: if (z == 0) { 15043: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 15044: int t = XEiJ.busRbs (a) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 15045: z = t << o; // z abcde-00 00000000 00000000 00000000 15046: // // -1<<w 11111000 00000000 00000000 00000000 15047: // // -1<<w>>>o 00111110 00000000 00000000 00000000 15048: // //t|-1<<w>>>o --11111- 00000000 00000000 00000000 15049: XEiJ.busWb (a, (t | -1 << w >>> o) >>> 24); // <ea> --11111- 15050: } else if (z == 1) { 15051: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 15052: int t = XEiJ.busRws (a) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 15053: z = t << o; // z abcde--- -0000000 00000000 00000000 15054: // // -1<<w 11111000 00000000 00000000 00000000 15055: // // -1<<w>>>o 00000001 11110000 00000000 00000000 15056: // //t|-1<<w>>>o -------1 1111---- 00000000 00000000 15057: XEiJ.busWw (a, (t | -1 << w >>> o) >>> 16); // <ea> -------1 1111---- 15058: } else if (z == 2) { 15059: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 15060: int t = XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8; // t -------a bcdefghi jkl----- 00000000 15061: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 15062: // // -1<<w 11111111 11110000 00000000 00000000 15063: // // -1<<w>>>o 00000001 11111111 11100000 00000000 15064: t |= -1 << w >>> o; // t -------1 11111111 111----- 00000000 15065: XEiJ.busWw (a, t >>> 16); // <ea> -------1 11111111 jkl----- 15066: XEiJ.busWb (a + 2, t >>> 8); // <ea> -------1 11111111 111----- 15067: } else if (z == 3) { 15068: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 15069: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rs------ 15070: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 15071: // // -1<<w 11111111 11111111 11100000 00000000 15072: // // -1<<w>>>o 00000001 11111111 11111111 11000000 15073: XEiJ.busWl (a, t | -1 << w >>> o); // <ea> -------1 11111111 11111111 11------ 15074: } else { 15075: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 15076: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rstuvwxy 15077: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 15078: // -1>>>o 00000001 11111111 11111111 11111111 15079: XEiJ.busWl (a, t | -1 >>> o); // <ea> -------1 11111111 11111111 11111111 15080: t = XEiJ.busRbz (a + 4); // t 00000000 00000000 00000000 z------- 15081: // // t>>>8-o 00000000 00000000 00000000 0z------ 15082: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 15083: // // -1<<8-o+w 11111111 11111111 11111111 10000000 15084: XEiJ.busWb (a + 4, t | -1 << 8 - o + w); // <ea> -------1 11111111 11111111 11111111 1------- 15085: } 15086: } 15087: z >>= w; //符号拡張。下位のゴミを消す 15088: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 15089: } //irpBfset 15090: 15091: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15092: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15093: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15094: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15095: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 15096: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 15097: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 15098: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 15099: public static void irpBfins () throws M68kException { 15100: int w; 15101: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 15102: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 15103: } else { 15104: w = XEiJ.regPC; 15105: XEiJ.regPC = w + 2; 15106: w = XEiJ.busRwze (w); //pcwz。拡張ワード 15107: } 15108: if ((w & ~0b0111_111_111_111_111) != 0 || 15109: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 15110: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 15111: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 15112: throw M68kException.m6eSignal; 15113: } 15114: int n = w >> 12; 15115: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 15116: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 15117: XEiJ.mpuCycleCount += 4; 15118: int ea = XEiJ.regOC & 63; 15119: int z = XEiJ.regRn[n] << w; //z=Dn<<-width 15120: if (ea < XEiJ.EA_AR) { //BFINS Dn,Dr{～} 15121: // Dr{30,5} o=30,w=32-5=27 t=Dr cde----- -------- -------- ------ab 15122: // t<<o ab000000 00000000 00000000 00000000 15123: // t>>>-o 00cde--- -------- -------- -------- 15124: // t<<o|t>>>-o abcde--- -------- -------- -------- 15125: // -1<<w 11111000 00000000 00000000 00000000 15126: // ~(-1<<w) 00000111 11111111 11111111 11111111 15127: // (t<<o|t>>>-o)&~(-1<<w) 00000--- -------- -------- -------- 15128: // r[n] -------- -------- -------- ---ABCDE 15129: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 15130: // t=(t<<o|t>>>-o)&~(-1<<w)|z ABCDE--- -------- -------- -------- 15131: // t<<-o CDE----- -------- -------- ------00 15132: // t>>>o 00000000 00000000 00000000 000000AB 15133: // t<<-o|t>>>o CDE----- -------- -------- ------AB 15134: int t = XEiJ.regRn[ea]; 15135: t = (t << o | t >>> -o) & ~(-1 << w) | z; 15136: XEiJ.regRn[ea] = t << -o | t >>> o; 15137: } else { //BFINS Dn,<mem>{～} 15138: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 15139: o &= 7; 15140: n = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 15141: if (n == 0) { 15142: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 15143: // XEiJ.busRbs(a)<<24 --abcde- 00000000 00000000 00000000 15144: // -1<<w 11111000 00000000 00000000 00000000 15145: // -1<<w>>>o 00111110 00000000 00000000 00000000 15146: // ~(-1<<w>>>o) 11000001 11111111 11111111 11111111 15147: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 15148: // r[n] -------- -------- -------- ---ABCDE 15149: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 15150: // z>>>o 00ABCDE0 00000000 00000000 00000000 15151: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o)|z>>>o --ABCDE- 00000000 00000000 00000000 15152: XEiJ.busWb (a, (XEiJ.busRbs (a) << 24 & ~(-1 << w >>> o) | z >>> o) >>> 24); 15153: } else if (n == 1) { 15154: // <ea>{3,11} o=3,w=32-11=21 <ea> ---abcde fghijk-- 15155: // rws(a)<<16 ---abcde fghijk-- 00000000 00000000 15156: // -1<<w 11111111 11100000 00000000 00000000 15157: // -1<<w>>>o 00011111 11111100 00000000 00000000 15158: // ~(-1<<w>>>o) 11100000 00000011 11111111 11111111 15159: // rws(a)<<16&~(-1<<w>>>o) ---00000 000000-- 00000000 00000000 15160: // r[n] -------- -------- -----ABC DEFGHIJK 15161: // z=r[n]<<w ABCDEFGH IJK00000 00000000 00000000 15162: // z>>>o 000ABCDE FGHIJK00 00000000 00000000 15163: // rws(a)<<16&~(-1<<w>>>o)|z>>>o ---ABCDE FGHIJK-- 00000000 00000000 15164: XEiJ.busWw (a, (XEiJ.busRws (a) << 16 & ~(-1 << w >>> o) | z >>> o) >>> 16); 15165: } else if (n == 2) { 15166: // <ea>{4,17} o=4,w=32-17=15 <ea> ----abcd efghijkl mnopq--- 15167: // rws(a)<<16|rbz(a+2)<<8 ----abcd efghijkl mnopq--- 00000000 15168: // -1<<w 11111111 11111111 10000000 00000000 15169: // -1<<w>>>o 00001111 11111111 11111000 00000000 15170: // ~(-1<<w>>>o) 11110000 00000000 00000111 11111111 15171: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o) ----0000 00000000 00000--- 00000000 15172: // r[n] -------- -------A BCDEFGHI JKLMNOPQ 15173: // z=r[n]<<w ABCDEFGH IJKLMNOP Q0000000 00000000 15174: // z>>>o 0000ABCD EFGHIJKL MNOPQ000 00000000 15175: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)|z>>>o ----ABCD EFGHIJKL MNOPQ--- 00000000 15176: int t = (XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8) & ~(-1 << w >>> o) | z >>> o; 15177: XEiJ.busWw (a, t >>> 16); 15178: XEiJ.busWb (a + 2, t >>> 8); 15179: } else if (n == 3) { 15180: // <ea>{5,23} o=5,w=32-23=9 <ea> -----abc defghijk lmnopqrs tuvw---- 15181: // rls(a) -----abc defghijk lmnopqrs tuvw---- 15182: // -1<<w 11111111 11111111 11111110 00000000 15183: // -1<<w>>>o 00000111 11111111 11111111 11110000 15184: // ~(-1<<w>>>o) 11111000 00000000 00000000 00001111 15185: // rls(a)&~(-1<<w>>>o) -----000 00000000 00000000 0000---- 15186: // r[n] -------- -ABCDEFG HIJKLMNO PQRSTUVW 15187: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVW0 00000000 15188: // z>>>o 00000ABC DEFGHIJK LMNOPQRS TUVW0000 15189: // rls(a)&~(-1<<w>>>o)|z>>>o -----ABC DEFGHIJK LMNOPQRS TUVW---- 15190: XEiJ.busWl (a, XEiJ.busRls (a) & ~(-1 << w >>> o) | z >>> o); 15191: } else { 15192: // <ea>{6,29} o=6,w=32-29=3 <ea> ------ab cdefghij klmnopqr stuvwxyz abc----- 15193: // rls(a) ------ab cdefghij klmnopqr stuvwxyz 15194: // -1>>>o 00000011 11111111 11111111 11111111 15195: // ~(-1>>>o) 11111100 00000000 00000000 00000000 15196: // rls(a)&~(-1>>>o) ------00 00000000 00000000 00000000 15197: // r[n] ---ABCDE FGHIJKLM NOPQRSTU VWXYZABC 15198: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVWX YZABC000 15199: // z>>>o 000000AB CDEFGHIJ KLMNOPQR STUVWXYZ 15200: // rls(a)&~(-1>>>o)|z>>>o ------AB CDEFGHIJ KLMNOPQR STUVWXYZ 15201: XEiJ.busWl (a, XEiJ.busRls (a) & ~(-1 >>> o) | z >>> o); 15202: // rbz(a+4) 00000000 00000000 00000000 abc----- 15203: // -1<<8-o+w 11111111 11111111 11111111 11100000 15204: // ~(-1<<8-o+w) 00000000 00000000 00000000 00011111 15205: // rbz(a+4)&~(-1<<8-o+w) 00000000 00000000 00000000 000----- 15206: // z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC00000 15207: // rbz(a+4)&~(-1<<8-o+w)|z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC----- 15208: XEiJ.busWb (a + 4, XEiJ.busRbz (a + 4) & ~(-1 << 8 - o + w) | z << 8 - o); 15209: } 15210: } 15211: //zは上位に寄ったままだが下位の空きは0なのでそのままテストする 15212: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 15213: } //irpBfins 15214: 15215: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15216: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15217: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15218: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15219: //PFLUSHA |-|---3--|P|-----|-----| |1111_000_000_000_000-0010010000000000 15220: //PFLUSH SFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00000 15221: //PFLUSH DFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00001 15222: //PFLUSH Dn,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm01nnn 15223: //PFLUSH #<data>,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm10ddd 15224: //PMOVE.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0000000000 15225: //PMOVEFD.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0100000000 15226: //PMOVE.L TTn,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n1000000000 15227: //PLOADW SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000000 15228: //PLOADW DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000001 15229: //PLOADW Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000001nnn 15230: //PLOADW #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000010ddd 15231: //PLOADR SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000000 15232: //PLOADR DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000001 15233: //PLOADR Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000001nnn 15234: //PLOADR #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000010ddd 15235: //PFLUSH SFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00000 15236: //PFLUSH DFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00001 15237: //PFLUSH Dn,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm01nnn 15238: //PFLUSH #<data>,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm10ddd 15239: //PMOVE.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000000000000 15240: //PMOVEFD.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000100000000 15241: //PMOVE.L TC,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100001000000000 15242: //PMOVE.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100000000000 15243: //PMOVEFD.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100100000000 15244: //PMOVE.Q SRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100101000000000 15245: //PMOVE.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110000000000 15246: //PMOVEFD.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110100000000 15247: //PMOVE.Q CRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100111000000000 15248: //PMOVE.W <ea>,MMUSR |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110000000000000 15249: //PMOVE.W MMUSR,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110001000000000 15250: //PTESTW SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000000 15251: //PTESTW DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000001 15252: //PTESTW Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000001nnn 15253: //PTESTW #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000010ddd 15254: //PTESTW SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00000 15255: //PTESTW DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00001 15256: //PTESTW Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn01nnn 15257: //PTESTW #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn10ddd 15258: //PTESTR SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000000 15259: //PTESTR DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000001 15260: //PTESTR Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000001nnn 15261: //PTESTR #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000010ddd 15262: //PTESTR SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00000 15263: //PTESTR DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00001 15264: //PTESTR Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn01nnn 15265: //PTESTR #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn10ddd 15266: public static void irpPgen () throws M68kException { 15267: int ea = XEiJ.regOC & 63; 15268: int mmm = ea >> 3; 15269: if (mmm == XEiJ.MMM_DR || 15270: mmm == XEiJ.MMM_MM || 15271: mmm == XEiJ.MMM_MW || 15272: mmm == XEiJ.MMM_MX || 15273: ea == XEiJ.EA_ZW || 15274: ea == XEiJ.EA_ZL) { 15275: //! 未対応。030チェックを通すためのダミー。拡張ワードを読み飛ばして何もしない 15276: XEiJ.regPC += 2; //第2オペコード 15277: if (ea >= XEiJ.EA_MM) { 15278: efaAnyByte (ea); 15279: } 15280: } else { 15281: irpFline (); 15282: } 15283: } //irpPgen 15284: 15285: //浮動小数点例外 15286: // 48 BSUN FP分岐または比較不能状態でのセット 15287: // 49 INEX FP不正確な結果 15288: // 50 DZ FPゼロによる除算 15289: // 51 UNFL FPアンダーフロー 15290: // 52 OPERR FPオペランドエラー 15291: // 53 OVFL FPオーバーフロー 15292: // 54 SNAN FPシグナリングNAN 15293: // 55 FP未実装データ型 15294: //FPSRのビットオフセット→例外ベクタ番号 15295: /* 15296: public static final int[] FP_OFFSET_TO_NUMBER = { 15297: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15298: 48, //16 15 BSUN 48 BSUN FP分岐または比較不能状態でのセット 15299: 54, //17 14 SNAN 54 SNAN FPシグナリングNAN 15300: 52, //18 13 OPERR 52 OPERR FPオペランドエラー 15301: 53, //19 12 OVFL 53 OVFL FPオーバーフロー 15302: 51, //20 11 UNFL 51 UNFL FPアンダーフロー 15303: 50, //21 10 DZ 50 DZ FPゼロによる除算 15304: 49, //22 9 INEX2 49 INEX FP不正確な結果 15305: 49, //23 8 INEX1 49 INEX FP不正確な結果 15306: 0, 0, 0, 0, 0, 0, 0, 0, 15307: }; 15308: */ 15309: public static final byte[] FP_OFFSET_TO_NUMBER = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\00006453211\0\0\0\0\0\0\0\0".getBytes (XEiJ.ISO_8859_1); 15310: 15311: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15312: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15313: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15314: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15315: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 15316: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 15317: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 15318: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 15319: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 15320: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 15321: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 15322: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 15323: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 15324: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 15325: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 15326: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 15327: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 15328: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 15329: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 15330: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 15331: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 15332: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 15333: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 15334: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 15335: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 15336: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 15337: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 15338: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 15339: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 15340: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 15341: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 15342: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 15343: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 15344: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 15345: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 15346: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 15347: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 15348: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 15349: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 15350: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 15351: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 15352: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 15353: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 15354: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 15355: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 15356: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 15357: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 15358: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15359: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15360: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15361: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15362: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15363: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15364: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 15365: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 15366: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 15367: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 15368: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 15369: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 15370: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 15371: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 15372: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 15373: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 15374: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 15375: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 15376: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 15377: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 15378: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 15379: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 15380: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 15381: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 15382: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 15383: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 15384: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 15385: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 15386: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 15387: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 15388: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 15389: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 15390: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 15391: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 15392: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 15393: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 15394: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 15395: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 15396: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 15397: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 15398: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 15399: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 15400: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 15401: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 15402: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 15403: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 15404: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 15405: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 15406: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 15407: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 15408: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 15409: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 15410: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 15411: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 15412: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 15413: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 15414: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 15415: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 15416: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 15417: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 15418: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 15419: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 15420: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 15421: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 15422: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 15423: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 15424: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 15425: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 15426: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 15427: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 15428: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 15429: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 15430: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 15431: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 15432: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 15433: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 15434: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 15435: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 15436: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 15437: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 15438: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 15439: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 15440: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 15441: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 15442: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 15443: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 15444: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 15445: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 15446: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 15447: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 15448: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 15449: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 15450: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 15451: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 15452: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 15453: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 15454: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 15455: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 15456: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 15457: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 15458: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 15459: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 15460: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 15461: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 15462: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 15463: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 15464: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 15465: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 15466: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 15467: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 15468: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 15469: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 15470: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 15471: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 15472: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 15473: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 15474: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 15475: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 15476: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 15477: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 15478: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 15479: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 15480: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 15481: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 15482: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 15483: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 15484: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 15485: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 15486: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 15487: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 15488: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 15489: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 15490: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 15491: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 15492: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 15493: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 15494: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 15495: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 15496: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 15497: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 15498: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 15499: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 15500: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 15501: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 15502: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 15503: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 15504: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 15505: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 15506: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 15507: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 15508: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 15509: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 15510: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 15511: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 15512: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 15513: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 15514: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 15515: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 15516: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15517: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15518: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15519: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15520: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15521: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15522: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 15523: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 15524: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 15525: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 15526: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 15527: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 15528: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 15529: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 15530: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 15531: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 15532: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 15533: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 15534: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 15535: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 15536: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 15537: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 15538: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 15539: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 15540: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 15541: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 15542: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 15543: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 15544: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 15545: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 15546: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 15547: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 15548: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 15549: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 15550: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 15551: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 15552: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 15553: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 15554: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 15555: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 15556: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 15557: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 15558: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 15559: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 15560: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 15561: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 15562: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 15563: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 15564: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 15565: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 15566: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 15567: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 15568: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 15569: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 15570: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 15571: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 15572: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 15573: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 15574: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 15575: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 15576: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 15577: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 15578: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 15579: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 15580: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 15581: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 15582: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 15583: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 15584: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 15585: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 15586: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 15587: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 15588: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 15589: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 15590: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 15591: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 15592: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 15593: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 15594: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 15595: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 15596: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 15597: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 15598: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 15599: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 15600: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 15601: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 15602: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 15603: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 15604: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 15605: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 15606: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 15607: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 15608: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 15609: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 15610: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 15611: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 15612: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 15613: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 15614: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 15615: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 15616: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 15617: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 15618: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 15619: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 15620: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 15621: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 15622: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 15623: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 15624: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 15625: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 15626: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 15627: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 15628: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 15629: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 15630: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 15631: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 15632: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 15633: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 15634: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 15635: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 15636: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 15637: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 15638: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 15639: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 15640: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 15641: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 15642: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 15643: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 15644: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 15645: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 15646: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 15647: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 15648: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 15649: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 15650: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 15651: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 15652: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 15653: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 15654: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 15655: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 15656: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 15657: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 15658: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 15659: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 15660: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 15661: @SuppressWarnings ("fallthrough") public static void irpFgen () throws M68kException { 15662: fgen: { 15663: if (XEiJ.currentFPU == 0) { 15664: irpFline (); 15665: break fgen; 15666: } 15667: XEiJ.mpuCycleCount += 16; 15668: int ea = XEiJ.regOC & 63; 15669: int w; 15670: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 15671: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 15672: } else { 15673: w = XEiJ.regPC; 15674: XEiJ.regPC = w + 2; 15675: w = XEiJ.busRwze (w); //pcwz。拡張ワード 15676: } 15677: int m = w >> 10 & 7; 15678: int n = w >> 7 & 7; 15679: int c = w & 0x7f; 15680: XEiJ.fpuBox.epbSetRoundingPrec (XEiJ.fpuBox.epbFpcr >> 6 & 3); //丸め桁数 15681: XEiJ.fpuBox.epbSetRoundingMode (XEiJ.fpuBox.epbFpcr >> 4 & 3); //丸めモード 15682: int a = 0; //実効アドレス 15683: 15684: 15685: switch (w >> 13) { 15686: 15687: 15688: case 0b010: //$4xxx-$5xxx: Fop.* <ea>,FPn 15689: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15690: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15691: 15692: switch (m) { 15693: 15694: case 0b000: //$40xx-$43xx: Fop.L <ea>,FPn 15695: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))); 15696: break; 15697: 15698: case 0b001: //$44xx-$47xx: Fop.S <ea>,FPn 15699: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setf0 (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))); 15700: break; 15701: 15702: case 0b010: //$48xx-$4Bxx: Fop.X <ea>,FPn 15703: { 15704: a = efaAnyExtd (ea); 15705: int i = XEiJ.busRls (a); 15706: long l = (long) XEiJ.busRls (a + 4) << 32 | 0xffffffffL & XEiJ.busRls (a + 8); 15707: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 15708: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].sety012 (i, l); 15709: } else { //拡張精度 15710: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setx012 (i, l); 15711: } 15712: } 15713: break; 15714: 15715: case 0b011: //$4Cxx-$4Fxx: Fop.P <ea>,FPn 15716: { 15717: a = efaAnyExtd (ea); 15718: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setp012 (XEiJ.busRls (a), (long) XEiJ.busRls (a + 4) << 32 | 0xffffffffL & XEiJ.busRls (a + 8)); 15719: } 15720: break; 15721: 15722: case 0b100: //$50xx-$53xx: Fop.W <ea>,FPn 15723: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (a = efaAnyWord (ea))); 15724: break; 15725: 15726: case 0b101: //$54xx-$57xx: Fop.D <ea>,FPn 15727: { 15728: a = efaAnyQuad (ea); 15729: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setd01 ((long) XEiJ.busRls (a) << 32 | 0xffffffffL & XEiJ.busRls (a + 4)); 15730: } 15731: break; 15732: 15733: case 0b110: //$58xx-$5Bxx: Fop.B <ea>,FPn 15734: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (a = efaAnyByte (ea))); 15735: break; 15736: 15737: case 0b111: //$5Cxx-$5Fxx: FMOVECR.X #ccc,FPn 15738: default: 15739: if (0x40 <= c) { 15740: //マニュアルにはFMOVECRの命令フォーマットのROMオフセットが7bitあるように書かれているが実際は6bit 15741: //MC68882で0x40以上を指定すると命令実行前例外のF-Line Emulator(レスポンス$1C0B)が返る 15742: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 15743: irpFline (); 15744: break fgen; 15745: } 15746: if (false) { 15747: m = EFPBox.EPB_CONST_START + c; //定数 15748: c = 0; //FMOVE 15749: } else { 15750: //FMOVECR 15751: XEiJ.fpuBox.epbFmovecr (XEiJ.fpuFPn[n], c); 15752: //FPSRのAEXCを設定する 15753: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 15754: //浮動小数点命令実行後例外 floating-point post-instruction exception 15755: if (irpFPPostInstruction (a)) { 15756: break fgen; 15757: } 15758: break fgen; 15759: } 15760: } 15761: //浮動小数点命令実行前例外 floating-point pre-instruction exception 15762: if (irpFPPreInstruction ()) { 15763: break fgen; 15764: } 15765: //Fop.X <ea>,FPn → Fop.X FP[EFPBox.EPB_SRC_TMP],FPn 15766: //FMOVECR.X #ccc,FPn → FMOVE.X FPc,FPn 15767: 15768: 15769: //fallthrough 15770: case 0b000: //$0xxx-$1xxx: Fop.X FPm,FPn 15771: if (w >> 13 == 0) { 15772: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15773: } 15774: //Fop.* <ea>,FPnのときFPIARは設定済み 15775: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15776: 15777: switch (c) { 15778: 15779: case 0b000_0000: //$xx00: FMOVE.* *m,FPn 15780: // BSUN 常にクリア 15781: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15782: // OPERR 常にクリア 15783: // OVFL 常にクリア 15784: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15785: // DZ 常にクリア 15786: // INEX2 結果に誤差があるときセット、それ以外はクリア 15787: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15788: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 15789: break; 15790: 15791: case 0b000_0001: //$xx01: FINT.* *m,FPn 15792: // BSUN 常にクリア 15793: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15794: // OPERR 常にクリア 15795: // OVFL 常にクリア 15796: // 正規化数の最大値は整数なので丸めても大きくなることはない 15797: // UNFL 常にクリア 15798: // 結果は整数なので非正規化数にはならない 15799: // DZ 常にクリア 15800: // INEX2 結果に誤差があるときセット、それ以外はクリア 15801: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15802: // FINTはsingleとdoubleの丸め処理を行わない 15803: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15804: XEiJ.fpuFPn[n].round (XEiJ.fpuFPn[m], XEiJ.fpuBox.epbRoundingMode); 15805: break; 15806: 15807: case 0b000_0010: //$xx02: FSINH.* *m,FPn 15808: // BSUN 常にクリア 15809: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15810: // OPERR 常にクリア 15811: // OVFL オーバーフローしたときセット、それ以外はクリア 15812: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15813: // DZ 常にクリア 15814: // INEX2 結果に誤差があるときセット、それ以外はクリア 15815: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15816: XEiJ.fpuFPn[n].sinh (XEiJ.fpuFPn[m]); 15817: break; 15818: 15819: case 0b000_0011: //$xx03: FINTRZ.* *m,FPn 15820: // BSUN 常にクリア 15821: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15822: // OPERR 常にクリア 15823: // OVFL 常にクリア 15824: // UNFL 常にクリア 15825: // 結果は整数なので非正規化数にはならない 15826: // DZ 常にクリア 15827: // INEX2 結果に誤差があるときセット、それ以外はクリア 15828: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15829: // FINTRZはsingleとdoubleの丸め処理を行わない 15830: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15831: XEiJ.fpuFPn[n].trunc (XEiJ.fpuFPn[m]); 15832: break; 15833: 15834: case 0b000_0100: //$xx04: FSQRT.* *m,FPn 15835: case 0b000_0101: //$xx05: FSQRT.* *m,FPn (MC68882) 15836: // BSUN 常にクリア 15837: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15838: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 15839: // OVFL 常にクリア 15840: // 1よりも大きい数は小さくなるので溢れることはない 15841: // UNFL 常にクリア 15842: // 非正規化数の平方根は正規化数なので結果が非正規化数になることはない 15843: // DZ 常にクリア 15844: // INEX2 結果に誤差があるときセット、それ以外はクリア 15845: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15846: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 15847: break; 15848: 15849: case 0b000_0110: //$xx06: FLOGNP1.* *m,FPn 15850: case 0b000_0111: //$xx07: FLOGNP1.* *m,FPn (MC68882) 15851: // BSUN 常にクリア 15852: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15853: // OPERR 引数が-1よりも小さいときセット、それ以外はクリア 15854: // OVFL 常にクリア 15855: // log(1+0)=0,log(1+x)<=xなので結果が引数よりも大きくなることはない 15856: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15857: // DZ 引数が-1のときセット、それ以外はクリア 15858: // INEX2 結果に誤差があるときセット、それ以外はクリア 15859: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15860: XEiJ.fpuFPn[n].log1p (XEiJ.fpuFPn[m]); 15861: break; 15862: 15863: case 0b000_1000: //$xx08: FETOXM1.* *m,FPn 15864: // BSUN 常にクリア 15865: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15866: // OPERR 常にクリア 15867: // OVFL オーバーフローしたときセット、それ以外はクリア 15868: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15869: // DZ 常にクリア 15870: // INEX2 結果に誤差があるときセット、それ以外はクリア 15871: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15872: XEiJ.fpuFPn[n].expm1 (XEiJ.fpuFPn[m]); 15873: break; 15874: 15875: case 0b000_1001: //$xx09: FTANH.* *m,FPn 15876: // BSUN 常にクリア 15877: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15878: // OPERR 常にクリア 15879: // OVFL 常にクリア 15880: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15881: // DZ 常にクリア 15882: // INEX2 結果に誤差があるときセット、それ以外はクリア 15883: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15884: XEiJ.fpuFPn[n].tanh (XEiJ.fpuFPn[m]); 15885: break; 15886: 15887: case 0b000_1010: //$xx0A: FATAN.* *m,FPn 15888: case 0b000_1011: //$xx0B: FATAN.* *m,FPn (MC68882) 15889: // BSUN 常にクリア 15890: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15891: // OPERR 常にクリア 15892: // OVFL 常にクリア 15893: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15894: // DZ 常にクリア 15895: // INEX2 結果に誤差があるときセット、それ以外はクリア 15896: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15897: XEiJ.fpuFPn[n].atan (XEiJ.fpuFPn[m]); 15898: break; 15899: 15900: case 0b000_1100: //$xx0C: FASIN.* *m,FPn 15901: // BSUN 常にクリア 15902: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15903: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15904: // OVFL 常にクリア 15905: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15906: // DZ 常にクリア 15907: // INEX2 結果に誤差があるときセット、それ以外はクリア 15908: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15909: XEiJ.fpuFPn[n].asin (XEiJ.fpuFPn[m]); 15910: break; 15911: 15912: case 0b000_1101: //$xx0D: FATANH.* *m,FPn 15913: // BSUN 常にクリア 15914: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15915: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15916: // OVFL 常にクリア 15917: // 1のとき無限大なのだから1の近くでオーバーフローしそうに思えるがatanh(1-2^-80)≒28.07くらい 15918: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15919: // DZ 引数の絶対値が1のときセット、それ以外はクリア 15920: // INEX2 結果に誤差があるときセット、それ以外はクリア 15921: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15922: XEiJ.fpuFPn[n].atanh (XEiJ.fpuFPn[m]); 15923: break; 15924: 15925: case 0b000_1110: //$xx0E: FSIN.* *m,FPn 15926: // BSUN 常にクリア 15927: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15928: // OPERR 引数が無限大のときセット、それ以外はクリア 15929: // OVFL 常にクリア 15930: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15931: // DZ 常にクリア 15932: // INEX2 結果に誤差があるときセット、それ以外はクリア 15933: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15934: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[m]); 15935: break; 15936: 15937: case 0b000_1111: //$xx0F: FTAN.* *m,FPn 15938: // BSUN 常にクリア 15939: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15940: // OPERR 引数が無限大のときセット、それ以外はクリア 15941: // OVFL オーバーフローしたときセット、それ以外はクリア 15942: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15943: // DZ 常にクリア 15944: // cos(x)=0を満たすxは正確に表現できないのだからsin(x)/cos(x)がゼロ除算になるのはおかしい 15945: // INEX2 結果に誤差があるときセット、それ以外はクリア 15946: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15947: XEiJ.fpuFPn[n].tan (XEiJ.fpuFPn[m]); 15948: break; 15949: 15950: case 0b001_0000: //$xx10: FETOX.* *m,FPn 15951: // BSUN 常にクリア 15952: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15953: // OPERR 常にクリア 15954: // OVFL オーバーフローしたときセット、それ以外はクリア 15955: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15956: // DZ 常にクリア 15957: // INEX2 結果に誤差があるときセット、それ以外はクリア 15958: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15959: XEiJ.fpuFPn[n].exp (XEiJ.fpuFPn[m]); 15960: break; 15961: 15962: case 0b001_0001: //$xx11: FTWOTOX.* *m,FPn 15963: // BSUN 常にクリア 15964: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15965: // OPERR 常にクリア 15966: // OVFL オーバーフローしたときセット、それ以外はクリア 15967: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15968: // DZ 常にクリア 15969: // INEX2 結果に誤差があるときセット、それ以外はクリア 15970: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15971: XEiJ.fpuFPn[n].exp2 (XEiJ.fpuFPn[m]); 15972: break; 15973: 15974: case 0b001_0010: //$xx12: FTENTOX.* *m,FPn 15975: case 0b001_0011: //$xx13: FTENTOX.* *m,FPn (MC68882) 15976: // BSUN 常にクリア 15977: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15978: // OPERR 常にクリア 15979: // OVFL オーバーフローしたときセット、それ以外はクリア 15980: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15981: // DZ 常にクリア 15982: // INEX2 結果に誤差があるときセット、それ以外はクリア 15983: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15984: XEiJ.fpuFPn[n].exp10 (XEiJ.fpuFPn[m]); 15985: break; 15986: 15987: case 0b001_0100: //$xx14: FLOGN.* *m,FPn 15988: // BSUN 常にクリア 15989: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15990: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 15991: // OVFL 常にクリア 15992: // log(1)=0,log(x)<=x-1なので結果が引数よりも大きくなることはない 15993: // UNFL 常にクリア 15994: // log(1+2^-80)≒2^-80 15995: // DZ 引数がゼロのときセット、それ以外はクリア 15996: // INEX2 結果に誤差があるときセット、それ以外はクリア 15997: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15998: XEiJ.fpuFPn[n].log (XEiJ.fpuFPn[m]); 15999: break; 16000: 16001: case 0b001_0101: //$xx15: FLOG10.* *m,FPn 16002: // BSUN 常にクリア 16003: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16004: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 16005: // OVFL 常にクリア 16006: // UNFL 常にクリア 16007: // DZ 引数がゼロのときセット、それ以外はクリア 16008: // INEX2 結果に誤差があるときセット、それ以外はクリア 16009: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16010: XEiJ.fpuFPn[n].log10 (XEiJ.fpuFPn[m]); 16011: break; 16012: 16013: case 0b001_0110: //$xx16: FLOG2.* *m,FPn 16014: case 0b001_0111: //$xx17: FLOG2.* *m,FPn (MC68882) 16015: // BSUN 常にクリア 16016: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16017: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 16018: // OVFL 常にクリア 16019: // UNFL 常にクリア 16020: // DZ 引数がゼロのときセット、それ以外はクリア 16021: // INEX2 結果に誤差があるときセット、それ以外はクリア 16022: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16023: XEiJ.fpuFPn[n].log2 (XEiJ.fpuFPn[m]); 16024: break; 16025: 16026: case 0b001_1000: //$xx18: FABS.* *m,FPn 16027: // BSUN 常にクリア 16028: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16029: // OPERR 常にクリア 16030: // OVFL 常にクリア 16031: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16032: // DZ 常にクリア 16033: // INEX2 常にクリア 16034: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16035: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16036: break; 16037: 16038: case 0b001_1001: //$xx19: FCOSH.* *m,FPn 16039: // BSUN 常にクリア 16040: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16041: // OPERR 常にクリア 16042: // OVFL オーバーフローしたときセット、それ以外はクリア 16043: // UNFL 常にクリア 16044: // DZ 常にクリア 16045: // INEX2 結果に誤差があるときセット、それ以外はクリア 16046: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16047: XEiJ.fpuFPn[n].cosh (XEiJ.fpuFPn[m]); 16048: break; 16049: 16050: case 0b001_1010: //$xx1A: FNEG.* *m,FPn 16051: case 0b001_1011: //$xx1B: FNEG.* *m,FPn (MC68882) 16052: // BSUN 常にクリア 16053: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16054: // OPERR 常にクリア 16055: // OVFL 常にクリア 16056: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16057: // DZ 常にクリア 16058: // INEX2 常にクリア 16059: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16060: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16061: break; 16062: 16063: case 0b001_1100: //$xx1C: FACOS.* *m,FPn 16064: // BSUN 常にクリア 16065: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16066: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 16067: // OVFL 常にクリア 16068: // UNFL 常にクリア 16069: // acos(1-ulp(1))はulp(1)よりも大きい 16070: // DZ 常にクリア 16071: // INEX2 結果に誤差があるときセット、それ以外はクリア 16072: // おそらくセットされないのはacos(1)=0だけ 16073: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16074: XEiJ.fpuFPn[n].acos (XEiJ.fpuFPn[m]); 16075: break; 16076: 16077: case 0b001_1101: //$xx1D: FCOS.* *m,FPn 16078: // BSUN 常にクリア 16079: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16080: // OPERR 引数が無限大のときセット、それ以外はクリア 16081: // OVFL 常にクリア 16082: // UNFL 常にクリア 16083: // cos(x)=0を満たすxは正確に表現できず、cos(pi/2)とcos(3*pi/2)が正規化数になってしまう 16084: // DZ 常にクリア 16085: // INEX2 結果に誤差があるときセット、それ以外はクリア 16086: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16087: XEiJ.fpuFPn[n].cos (XEiJ.fpuFPn[m]); 16088: break; 16089: 16090: case 0b001_1110: //$xx1E: FGETEXP.* *m,FPn 16091: // BSUN 常にクリア 16092: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16093: // OPERR 引数が無限大のときセット、それ以外はクリア 16094: // OVFL 常にクリア 16095: // UNFL 常にクリア 16096: // DZ 常にクリア 16097: // INEX2 常にクリア 16098: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16099: XEiJ.fpuFPn[n].getexp (XEiJ.fpuFPn[m]); 16100: break; 16101: 16102: case 0b001_1111: //$xx1F: FGETMAN.* *m,FPn 16103: // BSUN 常にクリア 16104: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16105: // OPERR 引数が無限大のときセット、それ以外はクリア 16106: // OVFL 常にクリア 16107: // UNFL 常にクリア 16108: // DZ 常にクリア 16109: // INEX2 常にクリア 16110: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16111: XEiJ.fpuFPn[n].getman (XEiJ.fpuFPn[m]); 16112: break; 16113: 16114: case 0b010_0000: //$xx20: FDIV.* *m,FPn 16115: // BSUN 常にクリア 16116: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16117: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16118: // OVFL オーバーフローしたときセット、それ以外はクリア 16119: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16120: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16121: // INEX2 結果に誤差があるときセット、それ以外はクリア 16122: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16123: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16124: break; 16125: 16126: case 0b010_0001: //$xx21: FMOD.* *m,FPn 16127: // BSUN 常にクリア 16128: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16129: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16130: // OVFL 常にクリア 16131: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16132: // DZ 常にクリア 16133: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16134: // INEX2 結果に誤差があるときセット、それ以外はクリア 16135: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16136: // FPSRのquotient byteに符号付き商の下位7bitが入る 16137: XEiJ.fpuFPn[n].rem (XEiJ.fpuFPn[m]); 16138: break; 16139: 16140: case 0b010_0010: //$xx22: FADD.* *m,FPn 16141: // BSUN 常にクリア 16142: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16143: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16144: // OVFL オーバーフローしたときセット、それ以外はクリア 16145: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16146: // DZ 常にクリア 16147: // INEX2 結果に誤差があるときセット、それ以外はクリア 16148: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16149: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16150: break; 16151: 16152: case 0b010_0011: //$xx23: FMUL.* *m,FPn 16153: // BSUN 常にクリア 16154: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16155: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16156: // OVFL オーバーフローしたときセット、それ以外はクリア 16157: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16158: // DZ 常にクリア 16159: // INEX2 結果に誤差があるときセット、それ以外はクリア 16160: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16161: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16162: break; 16163: 16164: case 0b010_0100: //$xx24: FSGLDIV.* *m,FPn 16165: // BSUN 常にクリア 16166: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16167: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16168: // OVFL オーバーフローしたときセット、それ以外はクリア 16169: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16170: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16171: // INEX2 結果に誤差があるときセット、それ以外はクリア 16172: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16173: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16174: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16175: break; 16176: 16177: case 0b010_0101: //$xx25: FREM.* *m,FPn 16178: // BSUN 常にクリア 16179: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16180: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16181: // OVFL 常にクリア 16182: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16183: // DZ 常にクリア 16184: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16185: // INEX2 結果に誤差があるときセット、それ以外はクリア 16186: // マニュアルにClearedと書いてあるのは間違い 16187: // 除数が無限大で被除数をそのまま返す場合でもサイズが減ればアンダーフローや不正確な結果になることはマニュアルにも書かれている 16188: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16189: // FPSRのquotient byteに符号付き商の下位7bitが入る 16190: XEiJ.fpuFPn[n].ieeerem (XEiJ.fpuFPn[m]); 16191: break; 16192: 16193: case 0b010_0110: //$xx26: FSCALE.* *m,FPn 16194: // BSUN 常にクリア 16195: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16196: // OPERR 引数が無限大のときセット、それ以外はクリア 16197: // OVFL オーバーフローしたときセット、それ以外はクリア 16198: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16199: // DZ 常にクリア 16200: // INEX2 常にクリア 16201: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16202: //! 本来はソースが整数のとき浮動小数点数を経由しないが、これは経由してしまっている。結果は同じだが効率が悪い 16203: XEiJ.fpuFPn[n].scale (XEiJ.fpuFPn[m]); 16204: break; 16205: 16206: case 0b010_0111: //$xx27: FSGLMUL.* *m,FPn 16207: // BSUN 常にクリア 16208: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16209: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16210: // OVFL オーバーフローしたときセット、それ以外はクリア 16211: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16212: // DZ 常にクリア 16213: // INEX2 結果に誤差があるときセット、それ以外はクリア 16214: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16215: { 16216: //引数を24bitに切り捨てるときX2をセットしない 16217: int sr = XEiJ.fpuBox.epbFpsr; 16218: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].roundmanf (XEiJ.fpuFPn[m], EFPBox.EPB_MODE_RZ); 16219: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].roundmanf (XEiJ.fpuFPn[n], EFPBox.EPB_MODE_RZ); 16220: XEiJ.fpuBox.epbFpsr = sr; 16221: } 16222: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16223: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[EFPBox.EPB_DST_TMP], XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16224: break; 16225: 16226: case 0b010_1000: //$xx28: FSUB.* *m,FPn 16227: case 0b010_1001: //$xx29: FSUB.* *m,FPn (MC68882) 16228: case 0b010_1010: //$xx2A: FSUB.* *m,FPn (MC68882) 16229: case 0b010_1011: //$xx2B: FSUB.* *m,FPn (MC68882) 16230: case 0b010_1100: //$xx2C: FSUB.* *m,FPn (MC68882) 16231: case 0b010_1101: //$xx2D: FSUB.* *m,FPn (MC68882) 16232: case 0b010_1110: //$xx2E: FSUB.* *m,FPn (MC68882) 16233: case 0b010_1111: //$xx2F: FSUB.* *m,FPn (MC68882) 16234: // BSUN 常にクリア 16235: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16236: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16237: // OVFL オーバーフローしたときセット、それ以外はクリア 16238: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16239: // DZ 常にクリア 16240: // INEX2 結果に誤差があるときセット、それ以外はクリア 16241: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16242: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16243: break; 16244: 16245: case 0b011_0000: //$xx30: FSINCOS.* *m,FP0:FPn (c=0,s=n) 16246: case 0b011_0001: //$xx31: FSINCOS.* *m,FP1:FPn (c=1,s=n) 16247: case 0b011_0010: //$xx32: FSINCOS.* *m,FP2:FPn (c=2,s=n) 16248: case 0b011_0011: //$xx33: FSINCOS.* *m,FP3:FPn (c=3,s=n) 16249: case 0b011_0100: //$xx34: FSINCOS.* *m,FP4:FPn (c=4,s=n) 16250: case 0b011_0101: //$xx35: FSINCOS.* *m,FP5:FPn (c=5,s=n) 16251: case 0b011_0110: //$xx36: FSINCOS.* *m,FP6:FPn (c=6,s=n) 16252: case 0b011_0111: //$xx37: FSINCOS.* *m,FP7:FPn (c=7,s=n) 16253: // BSUN 常にクリア 16254: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16255: // OPERR 引数が無限大のときセット、それ以外はクリア 16256: // OVFL 常にクリア 16257: // UNFL sin(x)の結果が非正規化数のときセット、それ以外はクリア 16258: // cos(x)の結果は非正規化数にならない 16259: // DZ 常にクリア 16260: // INEX2 結果に誤差があるときセット、それ以外はクリア 16261: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16262: c &= 7; 16263: //m==EFPBox.EPB_SRC_TMP||m==n||m==cの場合があることに注意する 16264: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].sete (XEiJ.fpuFPn[m]); 16265: XEiJ.fpuFPn[c].cos (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16266: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16267: break; 16268: 16269: case 0b011_1000: //$xx38: FCMP.* *m,FPn 16270: case 0b011_1001: //$xx39: FCMP.* *m,FPn (MC68882) 16271: case 0b011_1100: //$xx3C: FCMP.* *m,FPn (MC68882) コマンドワードの不連続箇所に注意 16272: case 0b011_1101: //$xx3D: FCMP.* *m,FPn (MC68882) 16273: // BSUN 常にクリア 16274: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16275: // OPERR 常にクリア 16276: // OVFL 常にクリア 16277: // UNFL 常にクリア 16278: // DZ 常にクリア 16279: // INEX2 常にクリア 16280: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16281: // FCMPはinfinityを常にクリアする 16282: // efp.compareTo(x,y)を使う 16283: // efp.compareTo(x,y)はefp.sub(x,y)よりも速い 16284: // efp.sub(x,y)はINEX2をセットしてしまう 16285: // efp.compareTo(x,y)は-0<+0だがFCMPは-0==+0なのでこれだけ調節する 16286: { 16287: int xf = XEiJ.fpuFPn[n].flg; 16288: int yf = XEiJ.fpuFPn[m].flg; 16289: if ((xf | yf) << 3 < 0) { //どちらかがNaN 16290: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].setnan (); 16291: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.N; 16292: } else { 16293: int i = ((xf & yf) << 1 < 0 ? 0 : //両方±0 16294: XEiJ.fpuFPn[n].compareTo (XEiJ.fpuFPn[m])); //-Inf==-Inf<-x<-0<+0<+x<+Inf==+Inf<NaN==NaN 16295: if (i == 0) { 16296: if (xf < 0) { 16297: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset0 (); 16298: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.M | EFPBox.Z; 16299: } else { 16300: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set0 (); 16301: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.P | EFPBox.Z; 16302: } 16303: } else if (i < 0) { 16304: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset1 (); 16305: } else { 16306: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set1 (); 16307: } 16308: } 16309: n = EFPBox.EPB_DST_TMP; 16310: } 16311: break; 16312: 16313: case 0b011_1010: //$xx3A: FTST.* *m 16314: case 0b011_1011: //$xx3B: FTST.* *m (MC68882) 16315: case 0b011_1110: //$xx3E: FTST.* *m (MC68882) コマンドワードの不連続箇所に注意 16316: case 0b011_1111: //$xx3F: FTST.* *m (MC68882) 16317: // BSUN 常にクリア 16318: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16319: // OPERR 常にクリア 16320: // OVFL 常にクリア 16321: // UNFL 常にクリア 16322: // DZ 常にクリア 16323: // INEX2 常にクリア 16324: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16325: // ソースオペランドをダミーのデスティネーションオペランドにコピーしてテストする 16326: // デスティネーションオペランドは変化しない 16327: // デスティネーションオペランドにはFP0が指定される場合が多いがFP0である必要はない 16328: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].sete (XEiJ.fpuFPn[m]); 16329: n = EFPBox.EPB_DST_TMP; 16330: break; 16331: 16332: case 0b100_0000: //$xx40: FSMOVE.* *m,FPn 16333: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16334: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16335: irpFline (); 16336: break fgen; 16337: } 16338: // BSUN 常にクリア 16339: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16340: // OPERR 常にクリア 16341: // OVFL 常にクリア 16342: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16343: // DZ 常にクリア 16344: // INEX2 結果に誤差があるときセット、それ以外はクリア 16345: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16346: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16347: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16348: break; 16349: 16350: case 0b100_0001: //$xx41: FSSQRT.* *m,FPn 16351: // BSUN 常にクリア 16352: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16353: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16354: // OVFL 常にクリア 16355: // UNFL 常にクリア 16356: // DZ 常にクリア 16357: // INEX2 結果に誤差があるときセット、それ以外はクリア 16358: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16359: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16360: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16361: irpFline (); 16362: break fgen; 16363: } 16364: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16365: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16366: break; 16367: 16368: //case 0b100_0010: //$xx42: 16369: //case 0b100_0011: //$xx43: 16370: 16371: case 0b100_0100: //$xx44: FDMOVE.* *m,FPn 16372: // BSUN 常にクリア 16373: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16374: // OPERR 常にクリア 16375: // OVFL 常にクリア 16376: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16377: // DZ 常にクリア 16378: // INEX2 結果に誤差があるときセット、それ以外はクリア 16379: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16380: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16381: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16382: irpFline (); 16383: break fgen; 16384: } 16385: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16386: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16387: break; 16388: 16389: case 0b100_0101: //$xx45: FDSQRT.* *m,FPn 16390: // BSUN 常にクリア 16391: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16392: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16393: // OVFL 常にクリア 16394: // UNFL 常にクリア 16395: // DZ 常にクリア 16396: // INEX2 結果に誤差があるときセット、それ以外はクリア 16397: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16398: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16399: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16400: irpFline (); 16401: break fgen; 16402: } 16403: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16404: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16405: break; 16406: 16407: //case 0b100_0110: //$xx46: 16408: //case 0b100_0111: //$xx47: 16409: //case 0b100_1000: //$xx48: 16410: //case 0b100_1001: //$xx49: 16411: //case 0b100_1010: //$xx4A: 16412: //case 0b100_1011: //$xx4B: 16413: //case 0b100_1100: //$xx4C: 16414: //case 0b100_1101: //$xx4D: 16415: //case 0b100_1110: //$xx4E: 16416: //case 0b100_1111: //$xx4F: 16417: //case 0b101_0000: //$xx50: 16418: //case 0b101_0001: //$xx51: 16419: //case 0b101_0010: //$xx52: 16420: //case 0b101_0011: //$xx53: 16421: //case 0b101_0100: //$xx54: 16422: //case 0b101_0101: //$xx55: 16423: //case 0b101_0110: //$xx56: 16424: //case 0b101_0111: //$xx57: 16425: 16426: case 0b101_1000: //$xx58: FSABS.* *m,FPn 16427: // BSUN 常にクリア 16428: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16429: // OPERR 常にクリア 16430: // OVFL 常にクリア 16431: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16432: // DZ 常にクリア 16433: // INEX2 常にクリア 16434: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16435: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16436: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16437: irpFline (); 16438: break fgen; 16439: } 16440: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16441: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16442: break; 16443: 16444: //case 0b101_1001: //$xx59: 16445: 16446: case 0b101_1010: //$xx5A: FSNEG.* *m,FPn 16447: // BSUN 常にクリア 16448: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16449: // OPERR 常にクリア 16450: // OVFL 常にクリア 16451: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16452: // DZ 常にクリア 16453: // INEX2 常にクリア 16454: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16455: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16456: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16457: irpFline (); 16458: break fgen; 16459: } 16460: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16461: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16462: break; 16463: 16464: //case 0b101_1011: //$xx5B: 16465: 16466: case 0b101_1100: //$xx5C: FDABS.* *m,FPn 16467: // BSUN 常にクリア 16468: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16469: // OPERR 常にクリア 16470: // OVFL 常にクリア 16471: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16472: // DZ 常にクリア 16473: // INEX2 常にクリア 16474: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16475: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16476: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16477: irpFline (); 16478: break fgen; 16479: } 16480: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16481: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16482: break; 16483: 16484: //case 0b101_1101: //$xx5D: 16485: 16486: case 0b101_1110: //$xx5E: FDNEG.* *m,FPn 16487: // BSUN 常にクリア 16488: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16489: // OPERR 常にクリア 16490: // OVFL 常にクリア 16491: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16492: // DZ 常にクリア 16493: // INEX2 常にクリア 16494: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16495: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16496: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16497: irpFline (); 16498: break fgen; 16499: } 16500: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16501: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16502: break; 16503: 16504: //case 0b101_1111: //$xx5F: 16505: 16506: case 0b110_0000: //$xx60: FSDIV.* *m,FPn 16507: // BSUN 常にクリア 16508: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16509: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16510: // OVFL オーバーフローしたときセット、それ以外はクリア 16511: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16512: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16513: // INEX2 結果に誤差があるときセット、それ以外はクリア 16514: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16515: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16516: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16517: irpFline (); 16518: break fgen; 16519: } 16520: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16521: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16522: break; 16523: 16524: //case 0b110_0001: //$xx61: 16525: 16526: case 0b110_0010: //$xx62: FSADD.* *m,FPn 16527: // BSUN 常にクリア 16528: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16529: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16530: // OVFL オーバーフローしたときセット、それ以外はクリア 16531: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16532: // DZ 常にクリア 16533: // INEX2 結果に誤差があるときセット、それ以外はクリア 16534: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16535: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16536: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16537: irpFline (); 16538: break fgen; 16539: } 16540: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16541: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16542: break; 16543: 16544: case 0b110_0011: //$xx63: FSMUL.* *m,FPn 16545: // BSUN 常にクリア 16546: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16547: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16548: // OVFL オーバーフローしたときセット、それ以外はクリア 16549: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16550: // DZ 常にクリア 16551: // INEX2 結果に誤差があるときセット、それ以外はクリア 16552: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16553: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16554: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16555: irpFline (); 16556: break fgen; 16557: } 16558: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16559: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16560: break; 16561: 16562: case 0b110_0100: //$xx64: FDDIV.* *m,FPn 16563: // BSUN 常にクリア 16564: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16565: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16566: // OVFL オーバーフローしたときセット、それ以外はクリア 16567: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16568: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16569: // INEX2 結果に誤差があるときセット、それ以外はクリア 16570: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16571: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16572: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16573: irpFline (); 16574: break fgen; 16575: } 16576: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16577: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16578: break; 16579: 16580: //case 0b110_0101: //$xx65: 16581: 16582: case 0b110_0110: //$xx66: FDADD.* *m,FPn 16583: // BSUN 常にクリア 16584: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16585: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16586: // OVFL オーバーフローしたときセット、それ以外はクリア 16587: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16588: // DZ 常にクリア 16589: // INEX2 結果に誤差があるときセット、それ以外はクリア 16590: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16591: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16592: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16593: irpFline (); 16594: break fgen; 16595: } 16596: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16597: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16598: break; 16599: 16600: case 0b110_0111: //$xx67: FDMUL.* *m,FPn 16601: // BSUN 常にクリア 16602: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16603: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16604: // OVFL オーバーフローしたときセット、それ以外はクリア 16605: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16606: // DZ 常にクリア 16607: // INEX2 結果に誤差があるときセット、それ以外はクリア 16608: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16609: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16610: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16611: irpFline (); 16612: break fgen; 16613: } 16614: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16615: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16616: break; 16617: 16618: case 0b110_1000: //$xx68: FSSUB.* *m,FPn 16619: // BSUN 常にクリア 16620: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16621: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16622: // OVFL オーバーフローしたときセット、それ以外はクリア 16623: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16624: // DZ 常にクリア 16625: // INEX2 結果に誤差があるときセット、それ以外はクリア 16626: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16627: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16628: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16629: irpFline (); 16630: break fgen; 16631: } 16632: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16633: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16634: break; 16635: 16636: //case 0b110_1001: //$xx69: 16637: //case 0b110_1010: //$xx6A: 16638: //case 0b110_1011: //$xx6B: 16639: 16640: case 0b110_1100: //$xx6C: FDSUB.* *m,FPn 16641: // BSUN 常にクリア 16642: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16643: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16644: // OVFL オーバーフローしたときセット、それ以外はクリア 16645: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16646: // DZ 常にクリア 16647: // INEX2 結果に誤差があるときセット、それ以外はクリア 16648: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16649: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16650: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16651: irpFline (); 16652: break fgen; 16653: } 16654: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16655: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16656: break; 16657: 16658: //case 0b110_1101: //$xx6D: 16659: //case 0b110_1110: //$xx6E: 16660: //case 0b110_1111: //$xx6F: 16661: 16662: case 0b111_0000: //$xx70: FLGAMMA *m,FPn 16663: if (EFPBox.EPB_EXTRA_OPERATION) { 16664: XEiJ.fpuFPn[n].lgamma (XEiJ.fpuFPn[m]); 16665: break; 16666: } else { 16667: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16668: irpFline (); 16669: break fgen; 16670: } 16671: 16672: case 0b111_0001: //$xx71: FTGAMMA *m,FPn 16673: if (EFPBox.EPB_EXTRA_OPERATION) { 16674: XEiJ.fpuFPn[n].tgamma (XEiJ.fpuFPn[m]); 16675: break; 16676: } else { 16677: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16678: irpFline (); 16679: break fgen; 16680: } 16681: 16682: //case 0b111_0010: //$xx72: 16683: //case 0b111_0011: //$xx73: 16684: //case 0b111_0100: //$xx74: 16685: //case 0b111_0101: //$xx75: 16686: //case 0b111_0110: //$xx76: 16687: //case 0b111_0111: //$xx77: 16688: //case 0b111_1000: //$xx78: 16689: //case 0b111_1001: //$xx79: 16690: //case 0b111_1010: //$xx7A: 16691: //case 0b111_1011: //$xx7B: 16692: //case 0b111_1100: //$xx7C: 16693: //case 0b111_1101: //$xx7D: 16694: //case 0b111_1110: //$xx7E: 16695: //case 0b111_1111: //$xx7F: 16696: 16697: default: //未定義 16698: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16699: irpFline (); 16700: break fgen; 16701: } 16702: //FPSRのFPCCを設定する 16703: XEiJ.fpuBox.epbFpsr |= XEiJ.fpuFPn[n].flg >>> 4; 16704: //FPSRのAEXCを設定する 16705: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16706: //浮動小数点命令実行後例外 floating-point post-instruction exception 16707: if (irpFPPostInstruction (a)) { 16708: break fgen; 16709: } 16710: break fgen; 16711: 16712: 16713: case 0b011: //$6xxx-$7xxx: FMOVE.* FPn,<ea> 16714: // BSUN 常にクリア 16715: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16716: // OPERR byte,word,longで無限大または指定されたサイズに収まらないとき、packedでk-factorが17よりも大きいか指数部が3桁に収まらないときセット、それ以外はクリア 16717: // OVFL packedではなくてオーバーフローしたときセット、それ以外はクリア 16718: // UNFL packedではなくて結果が非正規化数のときセット、それ以外はクリア 16719: // DZ 常にクリア 16720: // INEX2 結果に誤差があるときセット、それ以外はクリア 16721: // INEX1 常にクリア 16722: XEiJ.fpuBox.epbFpsr &= 0xffff00ff; //FMOVE.* FPn,<ea>でFPSRのコンディションコードバイトは変化しない 16723: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 16724: 16725: switch (m) { 16726: 16727: case 0b000: //$60xx-$63xx: FMOVE.L FPn,<ea> 16728: if (ea < XEiJ.EA_AR) { //FMOVE.L FPn,Dr 16729: XEiJ.regRn[ea] = XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode); 16730: } else { //FMOVE.L FPn,<mem> 16731: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode)); 16732: } 16733: break; 16734: 16735: case 0b001: //$64xx-$67xx: FMOVE.S FPn,<ea> 16736: if (ea < XEiJ.EA_AR) { //FMOVE.S FPn,Dr 16737: XEiJ.regRn[ea] = XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode); 16738: } else { //FMOVE.S FPn,<mem> 16739: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode)); 16740: } 16741: break; 16742: 16743: case 0b010: //$68xx-$6Bxx: FMOVE.X FPn,<ea> 16744: { 16745: byte[] b = new byte[12]; 16746: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16747: XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16748: } else { //拡張精度 16749: XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16750: } 16751: XEiJ.busWbb (a = efaMltExtd (ea), b, 0, 12); 16752: } 16753: break; 16754: 16755: case 0b011: //$6Cxx-$6Fxx: FMOVE.P FPn,<ea>{#k} 16756: { 16757: byte[] b = new byte[12]; 16758: XEiJ.fpuFPn[n].getp012 (b, 0, w); //k-factor付き 16759: XEiJ.busWbb (a = efaMltExtd (ea), b, 0, 12); 16760: } 16761: break; 16762: 16763: case 0b100: //$70xx-$73xx: FMOVE.W FPn,<ea> 16764: if (ea < XEiJ.EA_AR) { //FMOVE.W FPn,Dr 16765: XEiJ.regRn[ea] = XEiJ.regRn[ea] & 0xffff0000 | (char) XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode); 16766: } else { //FMOVE.W FPn,<mem> 16767: XEiJ.busWw (a = efaMltWord (ea), XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode)); 16768: } 16769: break; 16770: 16771: case 0b101: //$74xx-$77xx: FMOVE.D FPn,<ea> 16772: { 16773: a = efaMltQuad (ea); 16774: long d = XEiJ.fpuFPn[n].getd01 (XEiJ.fpuBox.epbRoundingMode); 16775: XEiJ.busWl (a, (int) (d >>> 32)); 16776: XEiJ.busWl (a + 4, (int) d); 16777: } 16778: break; 16779: 16780: case 0b110: //$78xx-$7Bxx: FMOVE.B FPn,<ea> 16781: if (ea < XEiJ.EA_AR) { //FMOVE.B FPn,Dr 16782: XEiJ.regRn[ea] = XEiJ.regRn[ea] & 0xffffff00 | XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode) & 0xff; 16783: } else { //FMOVE.B FPn,<mem> 16784: XEiJ.busWb (a = efaMltByte (ea), XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode)); 16785: } 16786: break; 16787: 16788: case 0b111: //$7Cxx-$7Fxx: FMOVE.P FPn,<ea>{Dl} 16789: default: 16790: { 16791: byte[] b = new byte[12]; 16792: XEiJ.fpuFPn[n].getp012 (b, 0, XEiJ.regRn[w >> 4 & 7]); //k-factor付き 16793: XEiJ.busWbb (a = efaMltExtd (ea), b, 0, 12); 16794: } 16795: } 16796: //FPSRのAEXCを設定する 16797: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16798: //浮動小数点命令実行後例外 floating-point post-instruction exception 16799: if (irpFPPostInstruction (a)) { 16800: break fgen; 16801: } 16802: break fgen; 16803: 16804: 16805: case 0b100: //$8xxx-$9xxx: FMOVEM.L <ea>,FPCR/FPSR/FPIAR 16806: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16807: // 格納順序はFPCRが下位アドレス(連結したとき上位),FPIARが上位アドレス(連結したとき下位) 16808: 16809: switch (m) { 16810: 16811: case 0b000: //$8000: FMOVE.L <ea>,<> 16812: // レジスタを1個も指定しないとFPIARが指定されたものとみなされる 16813: 16814: case 0b001: //$8400: FMOVE.L <ea>,FPIAR 16815: XEiJ.fpuBox.epbFpiar = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea)); //Ar可 16816: break; 16817: 16818: case 0b010: //$8800: FMOVE.L <ea>,FPSR 16819: XEiJ.fpuBox.epbFpsr = (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))) & EFPBox.EPB_FPSR_ALL; //Ar不可 16820: //fmove.lでfpsrのEXCに書き込んだだけではAEXCは更新されない 16821: //fmove.lでfpsrに0x0000ff00を書き込んですぐに読み出しても0x0000ff00のまま 16822: break; 16823: 16824: case 0b011: //$8C00: FMOVEM.L <ea>,FPSR/FPIAR 16825: { 16826: a = efaAnyQuad (ea); 16827: XEiJ.fpuBox.epbFpsr = (XEiJ.busRls (a)) & EFPBox.EPB_FPSR_ALL; 16828: XEiJ.fpuBox.epbFpiar = XEiJ.busRls (a + 4); 16829: } 16830: break; 16831: 16832: case 0b100: //$9000: FMOVE.L <ea>,FPCR 16833: XEiJ.fpuBox.epbFpcr = (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))) & EFPBox.EPB_FPCR_ALL; //Ar不可 16834: break; 16835: 16836: case 0b101: //$9400: FMOVEM.L <ea>,FPCR/FPIAR 16837: { 16838: a = efaAnyQuad (ea); 16839: XEiJ.fpuBox.epbFpcr = (XEiJ.busRls (a)) & EFPBox.EPB_FPCR_ALL; 16840: XEiJ.fpuBox.epbFpiar = XEiJ.busRls (a + 4); 16841: } 16842: break; 16843: 16844: case 0b110: //$9800: FMOVEM.L <ea>,FPCR/FPSR 16845: { 16846: a = efaAnyQuad (ea); 16847: XEiJ.fpuBox.epbFpcr = (XEiJ.busRls (a)) & EFPBox.EPB_FPCR_ALL; 16848: XEiJ.fpuBox.epbFpsr = (XEiJ.busRls (a + 4)) & EFPBox.EPB_FPSR_ALL; 16849: } 16850: break; 16851: 16852: case 0b111: //$9C00: FMOVEM.L <ea>,FPCR/FPSR/FPIAR 16853: default: 16854: { 16855: a = efaAnyExtd (ea); 16856: XEiJ.fpuBox.epbFpcr = (XEiJ.busRls (a)) & EFPBox.EPB_FPCR_ALL; 16857: XEiJ.fpuBox.epbFpsr = (XEiJ.busRls (a + 4)) & EFPBox.EPB_FPSR_ALL; 16858: XEiJ.fpuBox.epbFpiar = XEiJ.busRls (a + 8); 16859: } 16860: break; 16861: } 16862: break fgen; 16863: 16864: 16865: case 0b101: //$Axxx-$Bxxx: FMOVEM.L FPCR/FPSR/FPIAR,<ea> 16866: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16867: 16868: switch (m) { 16869: 16870: case 0b000: //$A000: FMOVE.L <>,<ea> 16871: // レジスタを1個も指定しないとFPIARが指定されたものとみなされる 16872: 16873: case 0b001: //$A400: FMOVE.L FPIAR,<ea> 16874: if (ea < XEiJ.EA_MM) { //Ar可 16875: XEiJ.regRn[ea] = XEiJ.fpuBox.epbFpiar; 16876: } else { 16877: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuBox.epbFpiar); 16878: } 16879: break; 16880: 16881: case 0b010: //$A800: FMOVE.L FPSR,<ea> 16882: if (ea < XEiJ.EA_AR) { //Ar不可 16883: XEiJ.regRn[ea] = XEiJ.fpuBox.epbFpsr; 16884: } else { 16885: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuBox.epbFpsr); 16886: } 16887: break; 16888: 16889: case 0b011: //$AC00: FMOVEM.L FPSR/FPIAR,<ea> 16890: { 16891: a = efaMltQuad (ea); 16892: XEiJ.busWl (a, XEiJ.fpuBox.epbFpsr); 16893: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpiar); 16894: } 16895: break; 16896: 16897: case 0b100: //$B000: FMOVE.L FPCR,<ea> 16898: if (ea < XEiJ.EA_AR) { //Ar不可 16899: XEiJ.regRn[ea] = XEiJ.fpuBox.epbFpcr; 16900: } else { 16901: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuBox.epbFpcr); 16902: } 16903: break; 16904: 16905: case 0b101: //$B400: FMOVEM.L FPCR/FPIAR,<ea> 16906: { 16907: a = efaMltQuad (ea); 16908: XEiJ.busWl (a, XEiJ.fpuBox.epbFpcr); 16909: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpiar); 16910: } 16911: break; 16912: 16913: case 0b110: //$B800: FMOVEM.L FPCR/FPSR,<ea> 16914: { 16915: a = efaMltQuad (ea); 16916: XEiJ.busWl (a, XEiJ.fpuBox.epbFpcr); 16917: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpsr); 16918: } 16919: break; 16920: 16921: case 0b111: //$BC00: FMOVEM.L FPCR/FPSR/FPIAR,<ea> 16922: default: 16923: { 16924: a = efaMltExtd (ea); 16925: XEiJ.busWl (a, XEiJ.fpuBox.epbFpcr); 16926: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpsr); 16927: XEiJ.busWl (a + 8, XEiJ.fpuBox.epbFpiar); 16928: } 16929: break; 16930: } 16931: break fgen; 16932: 16933: 16934: case 0b110: //$Cxxx-$Dxxx: FMOVEM.X <ea>,<list> 16935: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16936: { 16937: byte[] b = new byte[12]; 16938: int list = ((m & 2) == 0 ? w : XEiJ.regRn[w >> 4 & 7]) << 24; 16939: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 16940: int arr = XEiJ.regOC & 7 | 8; 16941: a = XEiJ.regRn[arr]; 16942: for (n = 0; list != 0; n++, list <<= 1) { 16943: if (list < 0) { 16944: XEiJ.busRbb (a, b, 0, 12); 16945: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16946: XEiJ.fpuFPn[n].sety012 (b, 0); 16947: } else { //拡張精度 16948: XEiJ.fpuFPn[n].setx012 (b, 0); 16949: } 16950: a += 12; 16951: } 16952: } 16953: XEiJ.regRn[arr] = a; 16954: } else { //(Ar)+以外 16955: a = efaCntLong (ea); 16956: for (n = 0; list != 0; n++, list <<= 1) { 16957: if (list < 0) { 16958: XEiJ.busRbb (a, b, 0, 12); 16959: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16960: XEiJ.fpuFPn[n].sety012 (b, 0); 16961: } else { //拡張精度 16962: XEiJ.fpuFPn[n].setx012 (b, 0); 16963: } 16964: a += 12; 16965: } 16966: } 16967: } 16968: } 16969: break fgen; 16970: 16971: 16972: case 0b111: //$Exxx-$Fxxx: FMOVEM.X <list>,<ea> 16973: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16974: { 16975: byte[] b = new byte[12]; 16976: int list = ((m & 2) == 0 ? w : XEiJ.regRn[w >> 4 & 7]) << 24; 16977: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 16978: int arr = XEiJ.regOC & 7 | 8; 16979: a = XEiJ.regRn[arr]; 16980: for (n = 7; list != 0; n--, list <<= 1) { 16981: if (list < 0) { 16982: a -= 12; 16983: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16984: XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16985: } else { //拡張精度 16986: XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16987: } 16988: XEiJ.busWbb (a, b, 0, 12); 16989: } 16990: } 16991: XEiJ.regRn[arr] = a; 16992: } else { //-(Ar)以外 16993: a = efaCltLong (ea); 16994: for (n = 0; list != 0; n++, list <<= 1) { 16995: if (list < 0) { 16996: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16997: XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16998: } else { //拡張精度 16999: XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 17000: } 17001: XEiJ.busWbb (a, b, 0, 12); 17002: a += 12; 17003: } 17004: } 17005: } 17006: } 17007: break fgen; 17008: 17009: 17010: case 0b001: //$2xxx-$3xxx: 未定義 17011: default: //未定義 17012: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17013: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 17014: irpFline (); 17015: break fgen; 17016: } 17017: } //fgen 17018: } //irpFgen 17019: 17020: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17021: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17022: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17023: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17024: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 17025: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 17026: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 17027: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 17028: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 17029: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 17030: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 17031: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 17032: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 17033: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 17034: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 17035: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 17036: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 17037: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 17038: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 17039: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 17040: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 17041: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 17042: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 17043: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 17044: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 17045: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 17046: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 17047: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 17048: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 17049: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 17050: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 17051: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 17052: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 17053: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 17054: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 17055: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 17056: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 17057: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 17058: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 17059: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 17060: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 17061: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 17062: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 17063: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 17064: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 17065: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 17066: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 17067: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 17068: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 17069: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 17070: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 17071: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 17072: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 17073: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 17074: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 17075: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 17076: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 17077: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 17078: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 17079: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 17080: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 17081: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 17082: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 17083: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 17084: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 17085: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 17086: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 17087: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 17088: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 17089: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 17090: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 17091: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 17092: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 17093: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 17094: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 17095: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 17096: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 17097: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 17098: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 17099: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 17100: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 17101: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 17102: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 17103: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 17104: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 17105: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 17106: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 17107: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 17108: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 17109: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 17110: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 17111: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 17112: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 17113: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 17114: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 17115: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 17116: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 17117: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 17118: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 17119: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 17120: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 17121: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 17122: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 17123: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 17124: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 17125: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 17126: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 17127: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 17128: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 17129: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 17130: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 17131: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 17132: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 17133: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 17134: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 17135: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 17136: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 17137: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 17138: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 17139: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 17140: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 17141: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 17142: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 17143: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 17144: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 17145: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 17146: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 17147: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 17148: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 17149: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 17150: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 17151: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 17152: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 17153: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 17154: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 17155: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 17156: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 17157: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 17158: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 17159: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 17160: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 17161: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 17162: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 17163: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 17164: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 17165: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 17166: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 17167: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 17168: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 17169: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 17170: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 17171: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 17172: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 17173: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 17174: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 17175: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 17176: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 17177: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 17178: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 17179: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 17180: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 17181: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 17182: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 17183: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 17184: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 17185: public static void irpFscc () throws M68kException { 17186: fscc: { 17187: if (XEiJ.currentFPU == 0) { 17188: irpFline (); 17189: break fscc; 17190: } 17191: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17192: int w; 17193: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 17194: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 17195: } else { 17196: w = XEiJ.regPC; 17197: XEiJ.regPC = w + 2; 17198: w = XEiJ.busRwze (w); //pcwz。拡張ワード 17199: } 17200: if ((w & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17201: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17202: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17203: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17204: irpException (M68kException.M6E_FP_BRANCH_SET_UNORDERED, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17205: break fscc; 17206: } 17207: } 17208: int ea = XEiJ.regOC & 63; 17209: if (ea < XEiJ.EA_AR) { //FScc.B Dr 17210: if (XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //セット 17211: XEiJ.mpuCycleCount += 10; 17212: XEiJ.regRn[ea] |= 0xff; 17213: } else { //クリア 17214: XEiJ.mpuCycleCount += 8; 17215: XEiJ.regRn[ea] &= ~0xff; 17216: } 17217: } else if (ea < XEiJ.EA_MM) { //FDBcc Dr,<label> 17218: if (XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //条件が成立しているので通過 17219: XEiJ.mpuCycleCount += 16; 17220: XEiJ.regPC += 2; //オフセットを読み飛ばす 17221: } else { 17222: int rrr = XEiJ.regOC & 7; 17223: int t = XEiJ.regRn[rrr]; 17224: if ((short) t == 0) { //Drの下位16bitが0なので通過 17225: XEiJ.mpuCycleCount += 18; 17226: XEiJ.regRn[rrr] = t + 65535; 17227: XEiJ.regPC += 2; //オフセットを読み飛ばす 17228: } else { //Drの下位16bitが0でないのでジャンプ 17229: XEiJ.mpuCycleCount += 14; 17230: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 17231: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 17232: } 17233: } 17234: } else if (ea < XEiJ.EA_PW) { //FScc.B <mem> 17235: XEiJ.mpuCycleCount += 12; 17236: XEiJ.busWb (efaMltByte (ea), XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15] ? 0xff : 0x00); 17237: } else if (ea <= XEiJ.EA_IM) { //FTRAPcc.W/FTRAPcc.L/FTRAPcc 17238: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 17239: XEiJ.regPC += t; 17240: if (!XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //通過 17241: XEiJ.mpuCycleCount += 8 + (t << 1); 17242: } else { 17243: XEiJ.mpuCycleCount += 4 + (t << 1); 17244: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 17245: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 17246: throw M68kException.m6eSignal; 17247: } 17248: } else { 17249: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 17250: irpFline (); 17251: break fscc; 17252: } 17253: } //fscc 17254: } //irpFscc 17255: 17256: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17257: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17258: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17259: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17260: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 17261: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 17262: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 17263: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 17264: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 17265: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 17266: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 17267: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 17268: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 17269: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 17270: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 17271: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 17272: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 17273: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 17274: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 17275: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 17276: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 17277: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 17278: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 17279: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 17280: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 17281: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 17282: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 17283: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 17284: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 17285: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 17286: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 17287: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 17288: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 17289: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 17290: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 17291: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 17292: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 17293: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 17294: public static void irpFbccWord () throws M68kException { 17295: fbcc: { 17296: if (XEiJ.currentFPU == 0) { 17297: irpFline (); 17298: break fbcc; 17299: } 17300: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17301: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17302: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17303: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17304: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17305: irpException (M68kException.M6E_FP_BRANCH_SET_UNORDERED, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17306: break fbcc; 17307: } 17308: } 17309: if (XEiJ.FPU_CCMAP_882[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //ジャンプ 17310: XEiJ.mpuCycleCount += 10; 17311: int s; 17312: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 17313: s = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 17314: } else { 17315: s = XEiJ.regPC; 17316: XEiJ.regPC = s + 2; 17317: s = XEiJ.busRwse (s); //pcws 17318: } 17319: irpSetPC (XEiJ.regPC0 + 2 + s); 17320: } else { //通過 17321: XEiJ.mpuCycleCount += 12; 17322: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 17323: } 17324: } //fbcc 17325: } //irpFbccWord 17326: 17327: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17328: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17329: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17330: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17331: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 17332: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 17333: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 17334: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 17335: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 17336: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 17337: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 17338: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 17339: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 17340: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 17341: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 17342: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 17343: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 17344: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 17345: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 17346: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 17347: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 17348: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 17349: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 17350: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 17351: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 17352: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 17353: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 17354: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 17355: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 17356: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 17357: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 17358: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 17359: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 17360: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 17361: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 17362: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 17363: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 17364: public static void irpFbccLong () throws M68kException { 17365: fbcc: { 17366: if (XEiJ.currentFPU == 0) { 17367: irpFline (); 17368: break fbcc; 17369: } 17370: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17371: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17372: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17373: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17374: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17375: irpException (M68kException.M6E_FP_BRANCH_SET_UNORDERED, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17376: break fbcc; 17377: } 17378: } 17379: if (XEiJ.FPU_CCMAP_882[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //ジャンプ 17380: XEiJ.mpuCycleCount += 14; 17381: int s; 17382: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 17383: s = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 17384: } else { 17385: s = XEiJ.regPC; 17386: XEiJ.regPC = s + 4; 17387: s = XEiJ.busRlse (s); //pcls 17388: } 17389: irpSetPC (XEiJ.regPC0 + 2 + s); 17390: } else { //通過 17391: XEiJ.mpuCycleCount += 12; 17392: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 17393: } 17394: } //fbcc 17395: } //irpFbccLong 17396: 17397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17398: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17399: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17400: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17401: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 17402: public static void irpFsave () throws M68kException { 17403: if (XEiJ.currentFPU == 0) { 17404: irpFline (); 17405: return; 17406: } 17407: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17408: irpFline (); //特権違反またはFライン 17409: return; 17410: } 17411: //以下はスーパーバイザモード 17412: int ea = XEiJ.regOC & 63; 17413: int a; 17414: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 17415: int arr = XEiJ.regOC & 7 | 8; 17416: a = XEiJ.regRn[arr] -= 4; 17417: XEiJ.mpuCycleCount += 8; 17418: } else { //-(Ar)以外 17419: a = efaCltLong (ea); 17420: } 17421: XEiJ.busWl (a, 0); //NULL 17422: } //irpFsave 17423: 17424: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17425: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17426: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17427: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17428: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 17429: public static void irpFrestore () throws M68kException { 17430: if (XEiJ.currentFPU == 0) { 17431: irpFline (); 17432: return; 17433: } 17434: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17435: irpFline (); //特権違反またはFライン 17436: return; 17437: } 17438: //以下はスーパーバイザモード 17439: int ea = XEiJ.regOC & 63; 17440: int a; 17441: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 17442: int arr = XEiJ.regOC & 7 | 8; 17443: a = XEiJ.regRn[arr]; 17444: XEiJ.regRn[arr] = a + 4; 17445: XEiJ.mpuCycleCount += 8; 17446: } else { //(Ar)+以外 17447: a = efaCntLong (ea); 17448: } 17449: XEiJ.busRls (a); //NULL 17450: //FPSRのAEXCをクリアする 17451: XEiJ.fpuBox.epbFpsr = 0; 17452: //FPIARをクリアする 17453: XEiJ.fpuBox.epbFpiar = 0; 17454: } //irpFrestore 17455: 17456: //irpFPPreInstruction () 17457: // 浮動小数点命令実行前例外 floating-point pre-instruction exception 17458: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17459: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17460: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17461: public static boolean irpFPPreInstruction () throws M68kException { 17462: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17463: if (mask == 0) { 17464: return false; 17465: } 17466: irpException (FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)], 17467: XEiJ.regPC0, //pcは命令の先頭 17468: XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 17469: 0x0000, 17470: 0); 17471: return true; 17472: } //irpFPPreInstruction() 17473: 17474: //irpFPPostInstruction (a) 17475: // 浮動小数点命令実行後例外 floating-point post-instruction exception 17476: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17477: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17478: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17479: public static boolean irpFPPostInstruction (int a) throws M68kException { 17480: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17481: if (mask == 0) { 17482: return false; 17483: } 17484: irpException (FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)], 17485: XEiJ.regPC, //pcは次の命令 17486: XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 17487: 0x3000, 17488: a); 17489: return true; 17490: } //irpFPPostInstruction(int) 17491: 17492: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17493: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17494: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17495: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17496: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 17497: public static void irpFpack () throws M68kException { 17498: if (!MainMemory.mmrFEfuncActivated) { 17499: irpFline (); 17500: return; 17501: } 17502: StringBuilder sb; 17503: int a0; 17504: if (FEFunction.FPK_DEBUG_TRACE) { 17505: sb = new StringBuilder (); 17506: String name = Disassembler.DIS_FPACK_NAME[XEiJ.regOC & 255]; 17507: if (name.length () == 0) { 17508: XEiJ.fmtHex4 (sb.append ('$'), XEiJ.regOC); 17509: } else { 17510: sb.append (name); 17511: } 17512: sb.append ('\n'); 17513: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 17514: a0 = XEiJ.regRn[8]; 17515: MainMemory.mmrRstr (sb.append (" (A0)=\""), a0, MainMemory.mmrStrlen (a0, 20)).append ("\"\n"); 17516: } 17517: XEiJ.mpuCycleCount += FEFunction.FPK_CLOCK; //一律にFEFunction.FPK_CLOCKサイクルかかることにする 17518: switch (XEiJ.regOC & 255) { 17519: case 0x00: FEFunction.fpkLMUL (); break; 17520: case 0x01: FEFunction.fpkLDIV (); break; 17521: case 0x02: FEFunction.fpkLMOD (); break; 17522: //case 0x03: break; 17523: case 0x04: FEFunction.fpkUMUL (); break; 17524: case 0x05: FEFunction.fpkUDIV (); break; 17525: case 0x06: FEFunction.fpkUMOD (); break; 17526: //case 0x07: break; 17527: case 0x08: FEFunction.fpkIMUL (); break; 17528: case 0x09: FEFunction.fpkIDIV (); break; 17529: //case 0x0a: break; 17530: //case 0x0b: break; 17531: case 0x0c: FEFunction.fpkRANDOMIZE (); break; 17532: case 0x0d: FEFunction.fpkSRAND (); break; 17533: case 0x0e: FEFunction.fpkRAND (); break; 17534: //case 0x0f: break; 17535: case 0x10: FEFunction.fpkSTOL (); break; 17536: case 0x11: FEFunction.fpkLTOS (); break; 17537: case 0x12: FEFunction.fpkSTOH (); break; 17538: case 0x13: FEFunction.fpkHTOS (); break; 17539: case 0x14: FEFunction.fpkSTOO (); break; 17540: case 0x15: FEFunction.fpkOTOS (); break; 17541: case 0x16: FEFunction.fpkSTOB (); break; 17542: case 0x17: FEFunction.fpkBTOS (); break; 17543: case 0x18: FEFunction.fpkIUSING (); break; 17544: //case 0x19: break; 17545: case 0x1a: FEFunction.fpkLTOD (); break; 17546: case 0x1b: FEFunction.fpkDTOL (); break; 17547: case 0x1c: FEFunction.fpkLTOF (); break; 17548: case 0x1d: FEFunction.fpkFTOL (); break; 17549: case 0x1e: FEFunction.fpkFTOD (); break; 17550: case 0x1f: FEFunction.fpkDTOF (); break; 17551: case 0x20: FEFunction.fpkVAL (); break; 17552: case 0x21: FEFunction.fpkUSING (); break; 17553: case 0x22: FEFunction.fpkSTOD (); break; 17554: case 0x23: FEFunction.fpkDTOS (); break; 17555: case 0x24: FEFunction.fpkECVT (); break; 17556: case 0x25: FEFunction.fpkFCVT (); break; 17557: case 0x26: FEFunction.fpkGCVT (); break; 17558: //case 0x27: break; 17559: case 0x28: FEFunction.fpkDTST (); break; 17560: case 0x29: FEFunction.fpkDCMP (); break; 17561: case 0x2a: FEFunction.fpkDNEG (); break; 17562: case 0x2b: FEFunction.fpkDADD (); break; 17563: case 0x2c: FEFunction.fpkDSUB (); break; 17564: case 0x2d: FEFunction.fpkDMUL (); break; 17565: case 0x2e: FEFunction.fpkDDIV (); break; 17566: case 0x2f: FEFunction.fpkDMOD (); break; 17567: case 0x30: FEFunction.fpkDABS (); break; 17568: case 0x31: FEFunction.fpkDCEIL (); break; 17569: case 0x32: FEFunction.fpkDFIX (); break; 17570: case 0x33: FEFunction.fpkDFLOOR (); break; 17571: case 0x34: FEFunction.fpkDFRAC (); break; 17572: case 0x35: FEFunction.fpkDSGN (); break; 17573: case 0x36: FEFunction.fpkSIN (); break; 17574: case 0x37: FEFunction.fpkCOS (); break; 17575: case 0x38: FEFunction.fpkTAN (); break; 17576: case 0x39: FEFunction.fpkATAN (); break; 17577: case 0x3a: FEFunction.fpkLOG (); break; 17578: case 0x3b: FEFunction.fpkEXP (); break; 17579: case 0x3c: FEFunction.fpkSQR (); break; 17580: case 0x3d: FEFunction.fpkPI (); break; 17581: case 0x3e: FEFunction.fpkNPI (); break; 17582: case 0x3f: FEFunction.fpkPOWER (); break; 17583: case 0x40: FEFunction.fpkRND (); break; 17584: case 0x41: FEFunction.fpkSINH (); break; 17585: case 0x42: FEFunction.fpkCOSH (); break; 17586: case 0x43: FEFunction.fpkTANH (); break; 17587: case 0x44: FEFunction.fpkATANH (); break; 17588: case 0x45: FEFunction.fpkASIN (); break; 17589: case 0x46: FEFunction.fpkACOS (); break; 17590: case 0x47: FEFunction.fpkLOG10 (); break; 17591: case 0x48: FEFunction.fpkLOG2 (); break; 17592: case 0x49: FEFunction.fpkDFREXP (); break; 17593: case 0x4a: FEFunction.fpkDLDEXP (); break; 17594: case 0x4b: FEFunction.fpkDADDONE (); break; 17595: case 0x4c: FEFunction.fpkDSUBONE (); break; 17596: case 0x4d: FEFunction.fpkDDIVTWO (); break; 17597: case 0x4e: FEFunction.fpkDIEECNV (); break; 17598: case 0x4f: FEFunction.fpkIEEDCNV (); break; 17599: case 0x50: FEFunction.fpkFVAL (); break; 17600: case 0x51: FEFunction.fpkFUSING (); break; 17601: case 0x52: FEFunction.fpkSTOF (); break; 17602: case 0x53: FEFunction.fpkFTOS (); break; 17603: case 0x54: FEFunction.fpkFECVT (); break; 17604: case 0x55: FEFunction.fpkFFCVT (); break; 17605: case 0x56: FEFunction.fpkFGCVT (); break; 17606: //case 0x57: break; 17607: case 0x58: FEFunction.fpkFTST (); break; 17608: case 0x59: FEFunction.fpkFCMP (); break; 17609: case 0x5a: FEFunction.fpkFNEG (); break; 17610: case 0x5b: FEFunction.fpkFADD (); break; 17611: case 0x5c: FEFunction.fpkFSUB (); break; 17612: case 0x5d: FEFunction.fpkFMUL (); break; 17613: case 0x5e: FEFunction.fpkFDIV (); break; 17614: case 0x5f: FEFunction.fpkFMOD (); break; 17615: case 0x60: FEFunction.fpkFABS (); break; 17616: case 0x61: FEFunction.fpkFCEIL (); break; 17617: case 0x62: FEFunction.fpkFFIX (); break; 17618: case 0x63: FEFunction.fpkFFLOOR (); break; 17619: case 0x64: FEFunction.fpkFFRAC (); break; 17620: case 0x65: FEFunction.fpkFSGN (); break; 17621: case 0x66: FEFunction.fpkFSIN (); break; 17622: case 0x67: FEFunction.fpkFCOS (); break; 17623: case 0x68: FEFunction.fpkFTAN (); break; 17624: case 0x69: FEFunction.fpkFATAN (); break; 17625: case 0x6a: FEFunction.fpkFLOG (); break; 17626: case 0x6b: FEFunction.fpkFEXP (); break; 17627: case 0x6c: FEFunction.fpkFSQR (); break; 17628: case 0x6d: FEFunction.fpkFPI (); break; 17629: case 0x6e: FEFunction.fpkFNPI (); break; 17630: case 0x6f: FEFunction.fpkFPOWER (); break; 17631: case 0x70: FEFunction.fpkFRND (); break; 17632: case 0x71: FEFunction.fpkFSINH (); break; 17633: case 0x72: FEFunction.fpkFCOSH (); break; 17634: case 0x73: FEFunction.fpkFTANH (); break; 17635: case 0x74: FEFunction.fpkFATANH (); break; 17636: case 0x75: FEFunction.fpkFASIN (); break; 17637: case 0x76: FEFunction.fpkFACOS (); break; 17638: case 0x77: FEFunction.fpkFLOG10 (); break; 17639: case 0x78: FEFunction.fpkFLOG2 (); break; 17640: case 0x79: FEFunction.fpkFFREXP (); break; 17641: case 0x7a: FEFunction.fpkFLDEXP (); break; 17642: case 0x7b: FEFunction.fpkFADDONE (); break; 17643: case 0x7c: FEFunction.fpkFSUBONE (); break; 17644: case 0x7d: FEFunction.fpkFDIVTWO (); break; 17645: case 0x7e: FEFunction.fpkFIEECNV (); break; 17646: case 0x7f: FEFunction.fpkIEEFCNV (); break; 17647: //case 0x80: break; 17648: //case 0x81: break; 17649: //case 0x82: break; 17650: //case 0x83: break; 17651: //case 0x84: break; 17652: //case 0x85: break; 17653: //case 0x86: break; 17654: //case 0x87: break; 17655: //case 0x88: break; 17656: //case 0x89: break; 17657: //case 0x8a: break; 17658: //case 0x8b: break; 17659: //case 0x8c: break; 17660: //case 0x8d: break; 17661: //case 0x8e: break; 17662: //case 0x8f: break; 17663: //case 0x90: break; 17664: //case 0x91: break; 17665: //case 0x92: break; 17666: //case 0x93: break; 17667: //case 0x94: break; 17668: //case 0x95: break; 17669: //case 0x96: break; 17670: //case 0x97: break; 17671: //case 0x98: break; 17672: //case 0x99: break; 17673: //case 0x9a: break; 17674: //case 0x9b: break; 17675: //case 0x9c: break; 17676: //case 0x9d: break; 17677: //case 0x9e: break; 17678: //case 0x9f: break; 17679: //case 0xa0: break; 17680: //case 0xa1: break; 17681: //case 0xa2: break; 17682: //case 0xa3: break; 17683: //case 0xa4: break; 17684: //case 0xa5: break; 17685: //case 0xa6: break; 17686: //case 0xa7: break; 17687: //case 0xa8: break; 17688: //case 0xa9: break; 17689: //case 0xaa: break; 17690: //case 0xab: break; 17691: //case 0xac: break; 17692: //case 0xad: break; 17693: //case 0xae: break; 17694: //case 0xaf: break; 17695: //case 0xb0: break; 17696: //case 0xb1: break; 17697: //case 0xb2: break; 17698: //case 0xb3: break; 17699: //case 0xb4: break; 17700: //case 0xb5: break; 17701: //case 0xb6: break; 17702: //case 0xb7: break; 17703: //case 0xb8: break; 17704: //case 0xb9: break; 17705: //case 0xba: break; 17706: //case 0xbb: break; 17707: //case 0xbc: break; 17708: //case 0xbd: break; 17709: //case 0xbe: break; 17710: //case 0xbf: break; 17711: //case 0xc0: break; 17712: //case 0xc1: break; 17713: //case 0xc2: break; 17714: //case 0xc3: break; 17715: //case 0xc4: break; 17716: //case 0xc5: break; 17717: //case 0xc6: break; 17718: //case 0xc7: break; 17719: //case 0xc8: break; 17720: //case 0xc9: break; 17721: //case 0xca: break; 17722: //case 0xcb: break; 17723: //case 0xcc: break; 17724: //case 0xcd: break; 17725: //case 0xce: break; 17726: //case 0xcf: break; 17727: //case 0xd0: break; 17728: //case 0xd1: break; 17729: //case 0xd2: break; 17730: //case 0xd3: break; 17731: //case 0xd4: break; 17732: //case 0xd5: break; 17733: //case 0xd6: break; 17734: //case 0xd7: break; 17735: //case 0xd8: break; 17736: //case 0xd9: break; 17737: //case 0xda: break; 17738: //case 0xdb: break; 17739: //case 0xdc: break; 17740: //case 0xdd: break; 17741: //case 0xde: break; 17742: //case 0xdf: break; 17743: case 0xe0: FEFunction.fpkCLMUL (); break; 17744: case 0xe1: FEFunction.fpkCLDIV (); break; 17745: case 0xe2: FEFunction.fpkCLMOD (); break; 17746: case 0xe3: FEFunction.fpkCUMUL (); break; 17747: case 0xe4: FEFunction.fpkCUDIV (); break; 17748: case 0xe5: FEFunction.fpkCUMOD (); break; 17749: case 0xe6: FEFunction.fpkCLTOD (); break; 17750: case 0xe7: FEFunction.fpkCDTOL (); break; 17751: case 0xe8: FEFunction.fpkCLTOF (); break; 17752: case 0xe9: FEFunction.fpkCFTOL (); break; 17753: case 0xea: FEFunction.fpkCFTOD (); break; 17754: case 0xeb: FEFunction.fpkCDTOF (); break; 17755: case 0xec: FEFunction.fpkCDCMP (); break; 17756: case 0xed: FEFunction.fpkCDADD (); break; 17757: case 0xee: FEFunction.fpkCDSUB (); break; 17758: case 0xef: FEFunction.fpkCDMUL (); break; 17759: case 0xf0: FEFunction.fpkCDDIV (); break; 17760: case 0xf1: FEFunction.fpkCDMOD (); break; 17761: case 0xf2: FEFunction.fpkCFCMP (); break; 17762: case 0xf3: FEFunction.fpkCFADD (); break; 17763: case 0xf4: FEFunction.fpkCFSUB (); break; 17764: case 0xf5: FEFunction.fpkCFMUL (); break; 17765: case 0xf6: FEFunction.fpkCFDIV (); break; 17766: case 0xf7: FEFunction.fpkCFMOD (); break; 17767: case 0xf8: FEFunction.fpkCDTST (); break; 17768: case 0xf9: FEFunction.fpkCFTST (); break; 17769: case 0xfa: FEFunction.fpkCDINC (); break; 17770: case 0xfb: FEFunction.fpkCFINC (); break; 17771: case 0xfc: FEFunction.fpkCDDEC (); break; 17772: case 0xfd: FEFunction.fpkCFDEC (); break; 17773: case 0xfe: FEFunction.fpkFEVARG (); break; 17774: //case 0xff: FEFunction.fpkFEVECS (); break; //FLOATn.Xに処理させる 17775: default: 17776: XEiJ.mpuCycleCount -= FEFunction.FPK_CLOCK; //戻す 17777: irpFline (); 17778: } 17779: if (FEFunction.FPK_DEBUG_TRACE) { 17780: int i = sb.length (); 17781: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 17782: int l = MainMemory.mmrStrlen (a0, 20); 17783: sb.append (" (A0)=\""); 17784: i = sb.length () - i; 17785: MainMemory.mmrRstr (sb, a0, l).append ("\"\n"); 17786: if (a0 <= XEiJ.regRn[8] && XEiJ.regRn[8] <= a0 + l) { 17787: for (i += sb.length () + XEiJ.regRn[8] - a0; sb.length () < i; ) { 17788: sb.append (' '); 17789: } 17790: sb.append ('^'); 17791: } 17792: System.out.println (sb.toString ()); 17793: } 17794: } //irpFpack 17795: 17796: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17797: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17798: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17799: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17800: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 17801: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17802: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17803: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17805: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 17806: public static void irpFline () throws M68kException { 17807: int oc9 = XEiJ.regOC & 0b0000_000_111_111_111; //命令コードの下位9bit 17808: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17809: if ((0b100_010_000 <= oc9 && oc9 <= 0b100_010_111) || //cpSAVE (Ar) 17810: (0b100_100_000 <= oc9 && oc9 <= 0b100_111_001) || //cpSAVE -(Ar)|(d16,Ar)|(d8,Ar,Rn.wl)|(xxx).W|(xxx).L 17811: (0b101_010_000 <= oc9 && oc9 <= 0b101_011_111) || //cpRESTORE (Ar)|(Ar)+ 17812: (0b101_101_000 <= oc9 && oc9 <= 0b101_111_011) //cpRESTORE (d16,Ar)|(d8,Ar,Rn.wl)|(xxx).W|(xxx).L|(d16,PC)|(d8,PC,Rn.wl) 17813: ) { //cpSAVEまたはcpRESTOREでアドレッシングモードが有効なとき 17814: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; //特権違反 17815: throw M68kException.m6eSignal; 17816: } 17817: } else { //スーパーバイザモードのとき 17818: if ((0b101_010_000 <= oc9 && oc9 <= 0b101_011_111) || //cpRESTORE (Ar)|(Ar)+ 17819: (0b101_101_000 <= oc9 && oc9 <= 0b101_111_011) //cpRESTORE (d16,Ar)|(d8,Ar,Rn.wl)|(xxx).W|(xxx).L|(d16,PC)|(d8,PC,Rn.wl) 17820: ) { //cpRESTOREでアドレッシングモードが有効なとき 17821: int ea = oc9 & 63; 17822: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+を 17823: ea += (XEiJ.MMM_MM - XEiJ.MMM_MP) << 3; //(Ar)とみなす 17824: } 17825: XEiJ.busRls (efaCntLong (ea)); //<ea>をリードする。ここでバスエラーが発生する可能性がある 17826: } 17827: } 17828: XEiJ.mpuCycleCount += 34; 17829: if (XEiJ.MPU_INLINE_EXCEPTION) { 17830: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 17831: int sp = XEiJ.regRn[15]; 17832: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 17833: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17834: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 17835: XEiJ.mpuUSP = sp; //USPを保存 17836: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 17837: if (DataBreakPoint.DBP_ON) { 17838: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 17839: } else { 17840: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 17841: } 17842: if (InstructionBreakPoint.IBP_ON) { 17843: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 17844: } 17845: } 17846: XEiJ.regRn[15] = sp -= 8; 17847: XEiJ.busWw (sp + 6, 0x0000 | M68kException.M6E_LINE_1111_EMULATOR << 2); //pushw。フォーマットとベクタオフセットをプッシュする 17848: XEiJ.busWl (sp + 2, XEiJ.regPC0); //pushl。pcをプッシュする 17849: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 17850: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.M6E_LINE_1111_EMULATOR << 2))); //例外ベクタを取り出してジャンプする 17851: } else { 17852: irpException (M68kException.M6E_LINE_1111_EMULATOR, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17853: } 17854: } //irpFline 17855: 17856: //irpIllegal () 17857: // オペコードの上位10bitで分類されなかった未実装命令 17858: // 命令実行回数をカウントするために分けてある 17859: // 0x4afcのILLEGAL命令はTASに分類されて未実装実効アドレスで処理されるのでここには来ない 17860: public static void irpIllegal () throws M68kException { 17861: if (true) { 17862: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17863: throw M68kException.m6eSignal; 17864: } 17865: } //irpIllegal 17866: 17867: //z = irpAbcd (x, y) 17868: // ABCD 17869: public static int irpAbcd (int x, int y) { 17870: int c = XEiJ.regCCR >> 4; 17871: int t = (x & 0xff) + (y & 0xff) + c; //仮の結果 17872: int z = t; //結果 17873: if (0x0a <= (x & 0x0f) + (y & 0x0f) + c) { //ハーフキャリー 17874: z += 0x10 - 0x0a; 17875: } 17876: //XとCはキャリーがあるときセット、さもなくばクリア 17877: if (0xa0 <= z) { //キャリー 17878: z += 0x100 - 0xa0; 17879: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 17880: } else { 17881: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 17882: } 17883: //Zは結果が0でないときクリア、さもなくば変化しない 17884: z &= 0xff; 17885: if (z != 0x00) { 17886: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 17887: } 17888: if (false) { 17889: //000/030のときNは結果の最上位ビット 17890: if ((z & 0x80) != 0) { 17891: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17892: } else { 17893: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17894: } 17895: //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア 17896: int a = z - t; //補正値 17897: if ((((t ^ z) & (a ^ z)) & 0x80) != 0) { 17898: XEiJ.regCCR |= XEiJ.REG_CCR_V; 17899: } else { 17900: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17901: } 17902: } else if (true) { 17903: //000/030のときNは結果の最上位ビット 17904: if ((z & 0x80) != 0) { 17905: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17906: } else { 17907: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17908: } 17909: //030のときVはクリア 17910: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17911: } else { 17912: //060のときNとVは変化しない 17913: } 17914: return z; 17915: } //irpAbcd 17916: 17917: //z = irpSbcd (x, y) 17918: // SBCD 17919: public static int irpSbcd (int x, int y) { 17920: int b = XEiJ.regCCR >> 4; 17921: int t = (x & 0xff) - (y & 0xff) - b; //仮の結果 17922: int z = t; //結果 17923: if ((x & 0x0f) - (y & 0x0f) - b < 0) { //ハーフボロー 17924: z -= 0x10 - 0x0a; 17925: } 17926: //XとCはボローがあるときセット、さもなくばクリア 17927: if (z < 0) { //ボロー 17928: if (t < 0) { 17929: z -= 0x100 - 0xa0; 17930: } 17931: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 17932: } else { 17933: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 17934: } 17935: //Zは結果が0でないときクリア、さもなくば変化しない 17936: z &= 0xff; 17937: if (z != 0x00) { 17938: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 17939: } 17940: if (false) { 17941: //000/030のときNは結果の最上位ビット 17942: if ((z & 0x80) != 0) { 17943: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17944: } else { 17945: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17946: } 17947: //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア 17948: int a = z - t; //補正値 17949: if ((((t ^ z) & (a ^ z)) & 0x80) != 0) { 17950: XEiJ.regCCR |= XEiJ.REG_CCR_V; 17951: } else { 17952: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17953: } 17954: } else if (true) { 17955: //000/030のときNは結果の最上位ビット 17956: if ((z & 0x80) != 0) { 17957: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17958: } else { 17959: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17960: } 17961: //030のときVはクリア 17962: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17963: } else { 17964: //060のときNとVは変化しない 17965: } 17966: return z; 17967: } //irpSbcd 17968: 17969: 17970: 17971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17972: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17973: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17974: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17975: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 17976: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 17977: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 17978: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 17979: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 17980: // エミュレータ拡張命令 17981: public static void irpEmx () throws M68kException { 17982: switch (XEiJ.regOC & 63) { 17983: case XEiJ.EMX_OPCODE_HFSBOOT & 63: 17984: XEiJ.mpuCycleCount += 40; 17985: if (HFS.hfsIPLBoot ()) { 17986: //JMP $6800.W 17987: irpSetPC (0x00006800); 17988: } 17989: break; 17990: case XEiJ.EMX_OPCODE_HFSINST & 63: 17991: XEiJ.mpuCycleCount += 40; 17992: HFS.hfsInstall (); 17993: break; 17994: case XEiJ.EMX_OPCODE_HFSSTR & 63: 17995: XEiJ.mpuCycleCount += 40; 17996: HFS.hfsStrategy (); 17997: break; 17998: case XEiJ.EMX_OPCODE_HFSINT & 63: 17999: XEiJ.mpuCycleCount += 40; 18000: //XEiJ.mpuClockTime += (int) (TMR_FREQ / 100000L); //0.01ms 18001: if (HFS.hfsInterrupt ()) { 18002: //WAIT 18003: XEiJ.mpuTraceFlag = 0; //トレース例外を発生させない 18004: XEiJ.regPC = XEiJ.regPC0; //ループ 18005: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。10MHzのとき40clk 18006: XEiJ.mpuLastNano += 4000L; 18007: } 18008: break; 18009: case XEiJ.EMX_OPCODE_EMXNOP & 63: 18010: XEiJ.emxNop (); 18011: break; 18012: case XEiJ.EMX_OPCODE_EMXWAIT & 63: 18013: WaitInstruction.execute (); //待機命令を実行する 18014: break; 18015: default: 18016: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18017: throw M68kException.m6eSignal; 18018: } 18019: } //irpEmx 18020: 18021: 18022: 18023: //irpSetPC (a) 18024: // pcへデータを書き込む 18025: // 奇数のときはアドレスエラーが発生する 18026: public static void irpSetPC (int a) throws M68kException { 18027: if (XEiJ.TEST_BIT_0_SHIFT ? a << 31 - 0 < 0 : (a & 1) != 0) { 18028: M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR; 18029: M68kException.m6eAddress = a & -2; //アドレスを偶数にする 18030: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 18031: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 18032: throw M68kException.m6eSignal; 18033: } 18034: XEiJ.mpuTraceFlag |= XEiJ.regSRT0; //フロートレース 18035: if (BranchLog.BLG_ON) { 18036: //BranchLog.blgJump (a); //分岐ログに分岐レコードを追加する 18037: if (BranchLog.blgPrevHeadSuper != (BranchLog.blgHead | BranchLog.blgSuper) || BranchLog.blgPrevTail != XEiJ.regPC0) { //前回のレコードと異なるとき 18038: int i = (char) BranchLog.blgNewestRecord++ << BranchLog.BLG_RECORD_SHIFT; 18039: BranchLog.blgArray[i] = BranchLog.blgPrevHeadSuper = BranchLog.blgHead | BranchLog.blgSuper; 18040: BranchLog.blgArray[i + 1] = BranchLog.blgPrevTail = XEiJ.regPC0; 18041: } 18042: BranchLog.blgHead = XEiJ.regPC = a; 18043: BranchLog.blgSuper = XEiJ.regSRS >>> 13; 18044: } else { 18045: XEiJ.regPC = a; 18046: } 18047: } //irpSetPC 18048: 18049: //irpSetSR (newSr) 18050: // srへデータを書き込む 18051: // ori to sr/andi to sr/eori to sr/move to sr/stop/rteで使用される 18052: // スーパーバイザモードになっていることを確認してから呼び出すこと 18053: // rteではr[15]が指すアドレスからsrとpcを取り出してr[15]を更新してから呼び出すこと 18054: // スーパーバイザモード→ユーザモードのときは移行のための処理を行う 18055: // 新しい割り込みマスクレベルよりも高い割り込み処理の終了をデバイスに通知する 18056: public static void irpSetSR (int newSr) { 18057: XEiJ.regSRT1 = XEiJ.REG_SR_T1 & newSr; 18058: XEiJ.regSRT0 = XEiJ.REG_SR_T0 & newSr; 18059: int old_srM = XEiJ.regSRM; 18060: XEiJ.regSRM = XEiJ.REG_SR_M & newSr; 18061: if ((XEiJ.regSRS = XEiJ.REG_SR_S & newSr) == 0) { //スーパーバイザモード→ユーザモード 18062: if (old_srM != 0) { //スーパーバイザマスタモード→ユーザモード 18063: XEiJ.mpuMSP = XEiJ.regRn[15]; //XEiJ.mpuMSPを保存 18064: } else { //スーパーバイザ割り込みモード→ユーザモード 18065: XEiJ.mpuISP = XEiJ.regRn[15]; //XEiJ.mpuISPを保存 18066: } 18067: XEiJ.regRn[15] = XEiJ.mpuUSP; //XEiJ.mpuUSPを復元 18068: if (DataBreakPoint.DBP_ON) { 18069: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpUserMap; //ユーザメモリマップに切り替える 18070: } else { 18071: XEiJ.busMemoryMap = XEiJ.busUserMap; //ユーザメモリマップに切り替える 18072: } 18073: if (InstructionBreakPoint.IBP_ON) { 18074: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1UserMap; 18075: } 18076: } else if (old_srM != XEiJ.regSRM) { 18077: if (old_srM != 0) { //マスタモード→割り込みモード 18078: XEiJ.mpuMSP = XEiJ.regRn[15]; //XEiJ.mpuMSPを保存 18079: XEiJ.regRn[15] = XEiJ.mpuISP; //XEiJ.mpuISPを復元 18080: } else { //割り込みモード→マスタモード 18081: XEiJ.mpuISP = XEiJ.regRn[15]; //XEiJ.mpuISPを保存 18082: XEiJ.regRn[15] = XEiJ.mpuMSP; //XEiJ.mpuMSPを復元 18083: } 18084: } 18085: int t = (XEiJ.mpuIMR = 0x7f >> ((XEiJ.regSRI = XEiJ.REG_SR_I & newSr) >> 8)) & XEiJ.mpuISR; //XEiJ.mpuISRで1→0とするビット 18086: if (t != 0) { //終了する割り込みがあるとき 18087: XEiJ.mpuISR ^= t; 18088: //デバイスに割り込み処理の終了を通知する 18089: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { //MFPのみ 18090: MC68901.mfpDone (); 18091: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { //DMAのみ 18092: HD63450.dmaDone (); 18093: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { //SCCのみ 18094: Z8530.sccDone (); 18095: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { //IOIのみ 18096: IOInterrupt.ioiDone (); 18097: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { //EB2のみ 18098: XEiJ.eb2Done (); 18099: } else { //SYSのみまたは複数 18100: if (XEiJ.TEST_BIT_1_SHIFT ? t << 24 + XEiJ.MPU_MFP_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_MFP_INTERRUPT_MASK) != 0) { 18101: MC68901.mfpDone (); 18102: } 18103: if (t << 24 + XEiJ.MPU_DMA_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_DMA_INTERRUPT_MASK) != 0 18104: HD63450.dmaDone (); 18105: } 18106: if (XEiJ.TEST_BIT_2_SHIFT ? t << 24 + XEiJ.MPU_SCC_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SCC_INTERRUPT_MASK) != 0) { 18107: Z8530.sccDone (); 18108: } 18109: if (t << 24 + XEiJ.MPU_IOI_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_IOI_INTERRUPT_MASK) != 0 18110: IOInterrupt.ioiDone (); 18111: } 18112: if (t << 24 + XEiJ.MPU_EB2_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_EB2_INTERRUPT_MASK) != 0 18113: XEiJ.eb2Done (); 18114: } 18115: if (XEiJ.TEST_BIT_0_SHIFT ? t << 24 + XEiJ.MPU_SYS_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SYS_INTERRUPT_MASK) != 0) { 18116: XEiJ.sysDone (); 18117: } 18118: } 18119: } 18120: XEiJ.mpuIMR |= ~XEiJ.mpuISR & XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みマスクレベルが7のときレベル7割り込みの処理中でなければレベル7割り込みを許可する 18121: XEiJ.regCCR = XEiJ.REG_CCR_MASK & newSr; 18122: } //irpSetSR 18123: 18124: //irpInterrupt (vectorNumber, level) 18125: // 割り込み処理を開始する 18126: public static void irpInterrupt (int vectorNumber, int level) throws M68kException { 18127: if (XEiJ.regOC == 0b0100_111_001_110_010) { //最後に実行した命令はSTOP命令 18128: XEiJ.regPC = XEiJ.regPC0 + 4; //次の命令に進む 18129: } 18130: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 44; 18131: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18132: XEiJ.regSRI = level << 8; //割り込みマスクを要求されたレベルに変更する 18133: XEiJ.mpuIMR = 0x7f >> level; 18134: XEiJ.mpuISR |= 0x80 >> level; 18135: int sp = XEiJ.regRn[15]; 18136: XEiJ.regSRT1 = XEiJ.regSRT0 = 0; //srのTビットを消す 18137: if (XEiJ.regSRS == 0) { //ユーザモードのとき 18138: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18139: XEiJ.mpuUSP = sp; //USPを保存 18140: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 18141: if (DataBreakPoint.DBP_ON) { 18142: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18143: } else { 18144: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18145: } 18146: if (InstructionBreakPoint.IBP_ON) { 18147: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18148: } 18149: } 18150: XEiJ.regRn[15] = sp -= 8; 18151: XEiJ.busWw (sp + 6, 0x0000 | vectorNumber << 2); //pushw。フォーマットとベクタオフセットをプッシュする 18152: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 18153: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 18154: if (XEiJ.regSRM != 0) { //マスタモードのとき 18155: save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18156: XEiJ.regSRM = 0; //割り込みモードへ移行する 18157: XEiJ.mpuMSP = sp; //XEiJ.mpuMSPを保存 18158: sp = XEiJ.mpuISP; //SSPを復元 18159: //割り込みスタックにスローアウェイフレームを作成する 18160: XEiJ.regRn[15] = sp -= 8; 18161: XEiJ.busWw (sp + 6, 0x1000 | vectorNumber << 2); //pushw。フォーマットとベクタオフセットをプッシュする 18162: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 18163: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 18164: } 18165: if (BranchLog.BLG_ON) { 18166: XEiJ.regPC0 = XEiJ.regPC; //rteによる割り込み終了と同時に次の割り込みを受け付けたとき間でpc0を更新しないと2番目の分岐レコードの終了アドレスが1番目と同じになっておかしな分岐レコードができてしまう 18167: } 18168: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (vectorNumber << 2))); //例外ベクタを取り出してジャンプする 18169: } //irpInterrupt 18170: 18171: //irpException (vectorNumber, save_pc, save_sr, format, address) 18172: // 例外処理を開始する 18173: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18174: public static void irpException (int vectorNumber, int save_pc, int save_sr, int format, int address) throws M68kException { 18175: int sp = XEiJ.regRn[15]; 18176: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18177: if (XEiJ.regSRS == 0) { //ユーザモードのとき 18178: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18179: XEiJ.mpuUSP = sp; //USPを保存 18180: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 18181: if (DataBreakPoint.DBP_ON) { 18182: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18183: } else { 18184: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18185: } 18186: if (InstructionBreakPoint.IBP_ON) { 18187: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18188: } 18189: } 18190: if (format <= 0x1000) { 18191: XEiJ.regRn[15] = sp -= 8; 18192: } else { 18193: XEiJ.regRn[15] = sp -= 12; 18194: XEiJ.busWl (sp + 8, address); //pushl。アドレスをプッシュする 18195: } 18196: XEiJ.busWw (sp + 6, format | vectorNumber << 2); //pushw。フォーマットとベクタオフセットをプッシュする 18197: XEiJ.busWl (sp + 2, save_pc); //pushl。pcをプッシュする 18198: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 18199: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (vectorNumber << 2))); //例外ベクタを取り出してジャンプする 18200: } //irpException 18201: 18202: 18203: 18204: //a = efaAnyByte (ea) //| M+-WXZPI| 18205: // 任意のモードのバイトオペランドの実効アドレスを求める 18206: // (A7)+と-(A7)はA7を奇偶に関わらず2変化させ、跨いだワードの上位バイト(アドレスの小さい方)を参照する 18207: // #<data>はオペコードに続くワードの下位バイトを参照する。上位バイトは不定なので参照してはならない 18208: @SuppressWarnings ("fallthrough") public static int efaAnyByte (int ea) throws M68kException { 18209: int t, w, x; 18210: switch (ea) { 18211: case 0b010_000: //(A0) 18212: if (XEiJ.EFA_SEPARATE_AR) { 18213: XEiJ.mpuCycleCount += 4; 18214: return XEiJ.regRn[ 8]; 18215: } 18216: //fallthrough 18217: case 0b010_001: //(A1) 18218: if (XEiJ.EFA_SEPARATE_AR) { 18219: XEiJ.mpuCycleCount += 4; 18220: return XEiJ.regRn[ 9]; 18221: } 18222: //fallthrough 18223: case 0b010_010: //(A2) 18224: if (XEiJ.EFA_SEPARATE_AR) { 18225: XEiJ.mpuCycleCount += 4; 18226: return XEiJ.regRn[10]; 18227: } 18228: //fallthrough 18229: case 0b010_011: //(A3) 18230: if (XEiJ.EFA_SEPARATE_AR) { 18231: XEiJ.mpuCycleCount += 4; 18232: return XEiJ.regRn[11]; 18233: } 18234: //fallthrough 18235: case 0b010_100: //(A4) 18236: if (XEiJ.EFA_SEPARATE_AR) { 18237: XEiJ.mpuCycleCount += 4; 18238: return XEiJ.regRn[12]; 18239: } 18240: //fallthrough 18241: case 0b010_101: //(A5) 18242: if (XEiJ.EFA_SEPARATE_AR) { 18243: XEiJ.mpuCycleCount += 4; 18244: return XEiJ.regRn[13]; 18245: } 18246: //fallthrough 18247: case 0b010_110: //(A6) 18248: if (XEiJ.EFA_SEPARATE_AR) { 18249: XEiJ.mpuCycleCount += 4; 18250: return XEiJ.regRn[14]; 18251: } 18252: //fallthrough 18253: case 0b010_111: //(A7) 18254: if (XEiJ.EFA_SEPARATE_AR) { 18255: XEiJ.mpuCycleCount += 4; 18256: return XEiJ.regRn[15]; 18257: } else { 18258: XEiJ.mpuCycleCount += 4; 18259: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18260: } 18261: case 0b011_000: //(A0)+ 18262: if (XEiJ.EFA_SEPARATE_AR) { 18263: XEiJ.mpuCycleCount += 4; 18264: return XEiJ.regRn[ 8]++; 18265: } 18266: //fallthrough 18267: case 0b011_001: //(A1)+ 18268: if (XEiJ.EFA_SEPARATE_AR) { 18269: XEiJ.mpuCycleCount += 4; 18270: return XEiJ.regRn[ 9]++; 18271: } 18272: //fallthrough 18273: case 0b011_010: //(A2)+ 18274: if (XEiJ.EFA_SEPARATE_AR) { 18275: XEiJ.mpuCycleCount += 4; 18276: return XEiJ.regRn[10]++; 18277: } 18278: //fallthrough 18279: case 0b011_011: //(A3)+ 18280: if (XEiJ.EFA_SEPARATE_AR) { 18281: XEiJ.mpuCycleCount += 4; 18282: return XEiJ.regRn[11]++; 18283: } 18284: //fallthrough 18285: case 0b011_100: //(A4)+ 18286: if (XEiJ.EFA_SEPARATE_AR) { 18287: XEiJ.mpuCycleCount += 4; 18288: return XEiJ.regRn[12]++; 18289: } 18290: //fallthrough 18291: case 0b011_101: //(A5)+ 18292: if (XEiJ.EFA_SEPARATE_AR) { 18293: XEiJ.mpuCycleCount += 4; 18294: return XEiJ.regRn[13]++; 18295: } 18296: //fallthrough 18297: case 0b011_110: //(A6)+ 18298: if (XEiJ.EFA_SEPARATE_AR) { 18299: XEiJ.mpuCycleCount += 4; 18300: return XEiJ.regRn[14]++; 18301: } else { 18302: XEiJ.mpuCycleCount += 4; 18303: return XEiJ.regRn[ea - (0b011_000 - 8)]++; 18304: } 18305: case 0b011_111: //(A7)+ 18306: XEiJ.mpuCycleCount += 4; 18307: return (XEiJ.regRn[15] += 2) - 2; 18308: case 0b100_000: //-(A0) 18309: if (XEiJ.EFA_SEPARATE_AR) { 18310: XEiJ.mpuCycleCount += 6; 18311: return --XEiJ.regRn[ 8]; 18312: } 18313: //fallthrough 18314: case 0b100_001: //-(A1) 18315: if (XEiJ.EFA_SEPARATE_AR) { 18316: XEiJ.mpuCycleCount += 6; 18317: return --XEiJ.regRn[ 9]; 18318: } 18319: //fallthrough 18320: case 0b100_010: //-(A2) 18321: if (XEiJ.EFA_SEPARATE_AR) { 18322: XEiJ.mpuCycleCount += 6; 18323: return --XEiJ.regRn[10]; 18324: } 18325: //fallthrough 18326: case 0b100_011: //-(A3) 18327: if (XEiJ.EFA_SEPARATE_AR) { 18328: XEiJ.mpuCycleCount += 6; 18329: return --XEiJ.regRn[11]; 18330: } 18331: //fallthrough 18332: case 0b100_100: //-(A4) 18333: if (XEiJ.EFA_SEPARATE_AR) { 18334: XEiJ.mpuCycleCount += 6; 18335: return --XEiJ.regRn[12]; 18336: } 18337: //fallthrough 18338: case 0b100_101: //-(A5) 18339: if (XEiJ.EFA_SEPARATE_AR) { 18340: XEiJ.mpuCycleCount += 6; 18341: return --XEiJ.regRn[13]; 18342: } 18343: //fallthrough 18344: case 0b100_110: //-(A6) 18345: if (XEiJ.EFA_SEPARATE_AR) { 18346: XEiJ.mpuCycleCount += 6; 18347: return --XEiJ.regRn[14]; 18348: } else { 18349: XEiJ.mpuCycleCount += 6; 18350: return --XEiJ.regRn[ea - (0b100_000 - 8)]; 18351: } 18352: case 0b100_111: //-(A7) 18353: XEiJ.mpuCycleCount += 6; 18354: return XEiJ.regRn[15] -= 2; 18355: case 0b101_000: //(d16,A0) 18356: case 0b101_001: //(d16,A1) 18357: case 0b101_010: //(d16,A2) 18358: case 0b101_011: //(d16,A3) 18359: case 0b101_100: //(d16,A4) 18360: case 0b101_101: //(d16,A5) 18361: case 0b101_110: //(d16,A6) 18362: case 0b101_111: //(d16,A7) 18363: XEiJ.mpuCycleCount += 8; 18364: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18365: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18366: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18367: } else { 18368: t = XEiJ.regPC; 18369: XEiJ.regPC = t + 2; 18370: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18371: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18372: } 18373: case 0b110_000: //(d8,A0,Rn.wl) 18374: case 0b110_001: //(d8,A1,Rn.wl) 18375: case 0b110_010: //(d8,A2,Rn.wl) 18376: case 0b110_011: //(d8,A3,Rn.wl) 18377: case 0b110_100: //(d8,A4,Rn.wl) 18378: case 0b110_101: //(d8,A5,Rn.wl) 18379: case 0b110_110: //(d8,A6,Rn.wl) 18380: case 0b110_111: //(d8,A7,Rn.wl) 18381: XEiJ.mpuCycleCount += 10; 18382: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18383: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18384: } else { 18385: w = XEiJ.regPC; 18386: XEiJ.regPC = w + 2; 18387: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18388: } 18389: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18390: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18391: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18392: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18393: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18394: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18395: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18396: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18397: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18398: XEiJ.regRn[w >> 12]) //ロングインデックス 18399: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18400: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18401: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18402: XEiJ.busRls (t) + x) //ポストインデックス 18403: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18404: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18405: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18406: case 0b111_000: //(xxx).W 18407: XEiJ.mpuCycleCount += 8; 18408: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 18409: case 0b111_001: //(xxx).L 18410: XEiJ.mpuCycleCount += 12; 18411: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 18412: case 0b111_010: //(d16,PC) 18413: XEiJ.mpuCycleCount += 8; 18414: t = XEiJ.regPC; 18415: XEiJ.regPC = t + 2; 18416: return (t //ベースレジスタ 18417: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18418: case 0b111_011: //(d8,PC,Rn.wl) 18419: XEiJ.mpuCycleCount += 10; 18420: t = XEiJ.regPC; 18421: XEiJ.regPC = t + 2; 18422: w = XEiJ.busRwze (t); //pcwz。拡張ワード 18423: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18424: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18425: t) //ベースレジスタ 18426: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18427: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18428: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18429: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18430: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18431: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18432: XEiJ.regRn[w >> 12]) //ロングインデックス 18433: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18434: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18435: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18436: XEiJ.busRls (t) + x) //ポストインデックス 18437: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18438: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18439: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18440: case 0b111_100: //#<data> 18441: XEiJ.mpuCycleCount += 4; 18442: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18443: return (XEiJ.regPC += 2) - 1; //下位バイト 18444: } else { 18445: t = XEiJ.regPC; 18446: XEiJ.regPC = t + 2; 18447: return t + 1; //下位バイト 18448: } 18449: } //switch 18450: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18451: throw M68kException.m6eSignal; 18452: } //efaAnyByte 18453: 18454: //a = efaMemByte (ea) //| M+-WXZP | 18455: // メモリモードのバイトオペランドの実効アドレスを求める 18456: // efaAnyByteとの違いは#<data>がないこと 18457: @SuppressWarnings ("fallthrough") public static int efaMemByte (int ea) throws M68kException { 18458: int t, w, x; 18459: switch (ea) { 18460: case 0b010_000: //(A0) 18461: if (XEiJ.EFA_SEPARATE_AR) { 18462: XEiJ.mpuCycleCount += 4; 18463: return XEiJ.regRn[ 8]; 18464: } 18465: //fallthrough 18466: case 0b010_001: //(A1) 18467: if (XEiJ.EFA_SEPARATE_AR) { 18468: XEiJ.mpuCycleCount += 4; 18469: return XEiJ.regRn[ 9]; 18470: } 18471: //fallthrough 18472: case 0b010_010: //(A2) 18473: if (XEiJ.EFA_SEPARATE_AR) { 18474: XEiJ.mpuCycleCount += 4; 18475: return XEiJ.regRn[10]; 18476: } 18477: //fallthrough 18478: case 0b010_011: //(A3) 18479: if (XEiJ.EFA_SEPARATE_AR) { 18480: XEiJ.mpuCycleCount += 4; 18481: return XEiJ.regRn[11]; 18482: } 18483: //fallthrough 18484: case 0b010_100: //(A4) 18485: if (XEiJ.EFA_SEPARATE_AR) { 18486: XEiJ.mpuCycleCount += 4; 18487: return XEiJ.regRn[12]; 18488: } 18489: //fallthrough 18490: case 0b010_101: //(A5) 18491: if (XEiJ.EFA_SEPARATE_AR) { 18492: XEiJ.mpuCycleCount += 4; 18493: return XEiJ.regRn[13]; 18494: } 18495: //fallthrough 18496: case 0b010_110: //(A6) 18497: if (XEiJ.EFA_SEPARATE_AR) { 18498: XEiJ.mpuCycleCount += 4; 18499: return XEiJ.regRn[14]; 18500: } 18501: //fallthrough 18502: case 0b010_111: //(A7) 18503: if (XEiJ.EFA_SEPARATE_AR) { 18504: XEiJ.mpuCycleCount += 4; 18505: return XEiJ.regRn[15]; 18506: } else { 18507: XEiJ.mpuCycleCount += 4; 18508: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18509: } 18510: case 0b011_000: //(A0)+ 18511: if (XEiJ.EFA_SEPARATE_AR) { 18512: XEiJ.mpuCycleCount += 4; 18513: return XEiJ.regRn[ 8]++; 18514: } 18515: //fallthrough 18516: case 0b011_001: //(A1)+ 18517: if (XEiJ.EFA_SEPARATE_AR) { 18518: XEiJ.mpuCycleCount += 4; 18519: return XEiJ.regRn[ 9]++; 18520: } 18521: //fallthrough 18522: case 0b011_010: //(A2)+ 18523: if (XEiJ.EFA_SEPARATE_AR) { 18524: XEiJ.mpuCycleCount += 4; 18525: return XEiJ.regRn[10]++; 18526: } 18527: //fallthrough 18528: case 0b011_011: //(A3)+ 18529: if (XEiJ.EFA_SEPARATE_AR) { 18530: XEiJ.mpuCycleCount += 4; 18531: return XEiJ.regRn[11]++; 18532: } 18533: //fallthrough 18534: case 0b011_100: //(A4)+ 18535: if (XEiJ.EFA_SEPARATE_AR) { 18536: XEiJ.mpuCycleCount += 4; 18537: return XEiJ.regRn[12]++; 18538: } 18539: //fallthrough 18540: case 0b011_101: //(A5)+ 18541: if (XEiJ.EFA_SEPARATE_AR) { 18542: XEiJ.mpuCycleCount += 4; 18543: return XEiJ.regRn[13]++; 18544: } 18545: //fallthrough 18546: case 0b011_110: //(A6)+ 18547: if (XEiJ.EFA_SEPARATE_AR) { 18548: XEiJ.mpuCycleCount += 4; 18549: return XEiJ.regRn[14]++; 18550: } else { 18551: XEiJ.mpuCycleCount += 4; 18552: return XEiJ.regRn[ea - (0b011_000 - 8)]++; 18553: } 18554: case 0b011_111: //(A7)+ 18555: XEiJ.mpuCycleCount += 4; 18556: return (XEiJ.regRn[15] += 2) - 2; 18557: case 0b100_000: //-(A0) 18558: if (XEiJ.EFA_SEPARATE_AR) { 18559: XEiJ.mpuCycleCount += 6; 18560: return --XEiJ.regRn[ 8]; 18561: } 18562: //fallthrough 18563: case 0b100_001: //-(A1) 18564: if (XEiJ.EFA_SEPARATE_AR) { 18565: XEiJ.mpuCycleCount += 6; 18566: return --XEiJ.regRn[ 9]; 18567: } 18568: //fallthrough 18569: case 0b100_010: //-(A2) 18570: if (XEiJ.EFA_SEPARATE_AR) { 18571: XEiJ.mpuCycleCount += 6; 18572: return --XEiJ.regRn[10]; 18573: } 18574: //fallthrough 18575: case 0b100_011: //-(A3) 18576: if (XEiJ.EFA_SEPARATE_AR) { 18577: XEiJ.mpuCycleCount += 6; 18578: return --XEiJ.regRn[11]; 18579: } 18580: //fallthrough 18581: case 0b100_100: //-(A4) 18582: if (XEiJ.EFA_SEPARATE_AR) { 18583: XEiJ.mpuCycleCount += 6; 18584: return --XEiJ.regRn[12]; 18585: } 18586: //fallthrough 18587: case 0b100_101: //-(A5) 18588: if (XEiJ.EFA_SEPARATE_AR) { 18589: XEiJ.mpuCycleCount += 6; 18590: return --XEiJ.regRn[13]; 18591: } 18592: //fallthrough 18593: case 0b100_110: //-(A6) 18594: if (XEiJ.EFA_SEPARATE_AR) { 18595: XEiJ.mpuCycleCount += 6; 18596: return --XEiJ.regRn[14]; 18597: } else { 18598: XEiJ.mpuCycleCount += 6; 18599: return --XEiJ.regRn[ea - (0b100_000 - 8)]; 18600: } 18601: case 0b100_111: //-(A7) 18602: XEiJ.mpuCycleCount += 6; 18603: return XEiJ.regRn[15] -= 2; 18604: case 0b101_000: //(d16,A0) 18605: case 0b101_001: //(d16,A1) 18606: case 0b101_010: //(d16,A2) 18607: case 0b101_011: //(d16,A3) 18608: case 0b101_100: //(d16,A4) 18609: case 0b101_101: //(d16,A5) 18610: case 0b101_110: //(d16,A6) 18611: case 0b101_111: //(d16,A7) 18612: XEiJ.mpuCycleCount += 8; 18613: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18614: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18615: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18616: } else { 18617: t = XEiJ.regPC; 18618: XEiJ.regPC = t + 2; 18619: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18620: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18621: } 18622: case 0b110_000: //(d8,A0,Rn.wl) 18623: case 0b110_001: //(d8,A1,Rn.wl) 18624: case 0b110_010: //(d8,A2,Rn.wl) 18625: case 0b110_011: //(d8,A3,Rn.wl) 18626: case 0b110_100: //(d8,A4,Rn.wl) 18627: case 0b110_101: //(d8,A5,Rn.wl) 18628: case 0b110_110: //(d8,A6,Rn.wl) 18629: case 0b110_111: //(d8,A7,Rn.wl) 18630: XEiJ.mpuCycleCount += 10; 18631: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18632: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18633: } else { 18634: w = XEiJ.regPC; 18635: XEiJ.regPC = w + 2; 18636: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18637: } 18638: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18639: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18640: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18641: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18642: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18643: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18644: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18645: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18646: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18647: XEiJ.regRn[w >> 12]) //ロングインデックス 18648: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18649: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18650: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18651: XEiJ.busRls (t) + x) //ポストインデックス 18652: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18653: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18654: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18655: case 0b111_000: //(xxx).W 18656: XEiJ.mpuCycleCount += 8; 18657: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 18658: case 0b111_001: //(xxx).L 18659: XEiJ.mpuCycleCount += 12; 18660: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 18661: case 0b111_010: //(d16,PC) 18662: XEiJ.mpuCycleCount += 8; 18663: t = XEiJ.regPC; 18664: XEiJ.regPC = t + 2; 18665: return (t //ベースレジスタ 18666: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18667: case 0b111_011: //(d8,PC,Rn.wl) 18668: XEiJ.mpuCycleCount += 10; 18669: t = XEiJ.regPC; 18670: XEiJ.regPC = t + 2; 18671: w = XEiJ.busRwze (t); //pcwz。拡張ワード 18672: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18673: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18674: t) //ベースレジスタ 18675: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18676: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18677: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18678: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18679: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18680: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18681: XEiJ.regRn[w >> 12]) //ロングインデックス 18682: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18683: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18684: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18685: XEiJ.busRls (t) + x) //ポストインデックス 18686: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18687: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18688: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18689: } //switch 18690: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18691: throw M68kException.m6eSignal; 18692: } //efaMemByte 18693: 18694: //a = efaMltByte (ea) //| M+-WXZ | 18695: // メモリ可変モードのバイトオペランドの実効アドレスを求める 18696: // efaMemByteとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 18697: @SuppressWarnings ("fallthrough") public static int efaMltByte (int ea) throws M68kException { 18698: int t, w, x; 18699: switch (ea) { 18700: case 0b010_000: //(A0) 18701: if (XEiJ.EFA_SEPARATE_AR) { 18702: XEiJ.mpuCycleCount += 4; 18703: return XEiJ.regRn[ 8]; 18704: } 18705: //fallthrough 18706: case 0b010_001: //(A1) 18707: if (XEiJ.EFA_SEPARATE_AR) { 18708: XEiJ.mpuCycleCount += 4; 18709: return XEiJ.regRn[ 9]; 18710: } 18711: //fallthrough 18712: case 0b010_010: //(A2) 18713: if (XEiJ.EFA_SEPARATE_AR) { 18714: XEiJ.mpuCycleCount += 4; 18715: return XEiJ.regRn[10]; 18716: } 18717: //fallthrough 18718: case 0b010_011: //(A3) 18719: if (XEiJ.EFA_SEPARATE_AR) { 18720: XEiJ.mpuCycleCount += 4; 18721: return XEiJ.regRn[11]; 18722: } 18723: //fallthrough 18724: case 0b010_100: //(A4) 18725: if (XEiJ.EFA_SEPARATE_AR) { 18726: XEiJ.mpuCycleCount += 4; 18727: return XEiJ.regRn[12]; 18728: } 18729: //fallthrough 18730: case 0b010_101: //(A5) 18731: if (XEiJ.EFA_SEPARATE_AR) { 18732: XEiJ.mpuCycleCount += 4; 18733: return XEiJ.regRn[13]; 18734: } 18735: //fallthrough 18736: case 0b010_110: //(A6) 18737: if (XEiJ.EFA_SEPARATE_AR) { 18738: XEiJ.mpuCycleCount += 4; 18739: return XEiJ.regRn[14]; 18740: } 18741: //fallthrough 18742: case 0b010_111: //(A7) 18743: if (XEiJ.EFA_SEPARATE_AR) { 18744: XEiJ.mpuCycleCount += 4; 18745: return XEiJ.regRn[15]; 18746: } else { 18747: XEiJ.mpuCycleCount += 4; 18748: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18749: } 18750: case 0b011_000: //(A0)+ 18751: if (XEiJ.EFA_SEPARATE_AR) { 18752: XEiJ.mpuCycleCount += 4; 18753: return XEiJ.regRn[ 8]++; 18754: } 18755: //fallthrough 18756: case 0b011_001: //(A1)+ 18757: if (XEiJ.EFA_SEPARATE_AR) { 18758: XEiJ.mpuCycleCount += 4; 18759: return XEiJ.regRn[ 9]++; 18760: } 18761: //fallthrough 18762: case 0b011_010: //(A2)+ 18763: if (XEiJ.EFA_SEPARATE_AR) { 18764: XEiJ.mpuCycleCount += 4; 18765: return XEiJ.regRn[10]++; 18766: } 18767: //fallthrough 18768: case 0b011_011: //(A3)+ 18769: if (XEiJ.EFA_SEPARATE_AR) { 18770: XEiJ.mpuCycleCount += 4; 18771: return XEiJ.regRn[11]++; 18772: } 18773: //fallthrough 18774: case 0b011_100: //(A4)+ 18775: if (XEiJ.EFA_SEPARATE_AR) { 18776: XEiJ.mpuCycleCount += 4; 18777: return XEiJ.regRn[12]++; 18778: } 18779: //fallthrough 18780: case 0b011_101: //(A5)+ 18781: if (XEiJ.EFA_SEPARATE_AR) { 18782: XEiJ.mpuCycleCount += 4; 18783: return XEiJ.regRn[13]++; 18784: } 18785: //fallthrough 18786: case 0b011_110: //(A6)+ 18787: if (XEiJ.EFA_SEPARATE_AR) { 18788: XEiJ.mpuCycleCount += 4; 18789: return XEiJ.regRn[14]++; 18790: } else { 18791: XEiJ.mpuCycleCount += 4; 18792: return XEiJ.regRn[ea - (0b011_000 - 8)]++; 18793: } 18794: case 0b011_111: //(A7)+ 18795: XEiJ.mpuCycleCount += 4; 18796: return (XEiJ.regRn[15] += 2) - 2; 18797: case 0b100_000: //-(A0) 18798: if (XEiJ.EFA_SEPARATE_AR) { 18799: XEiJ.mpuCycleCount += 6; 18800: return --XEiJ.regRn[ 8]; 18801: } 18802: //fallthrough 18803: case 0b100_001: //-(A1) 18804: if (XEiJ.EFA_SEPARATE_AR) { 18805: XEiJ.mpuCycleCount += 6; 18806: return --XEiJ.regRn[ 9]; 18807: } 18808: //fallthrough 18809: case 0b100_010: //-(A2) 18810: if (XEiJ.EFA_SEPARATE_AR) { 18811: XEiJ.mpuCycleCount += 6; 18812: return --XEiJ.regRn[10]; 18813: } 18814: //fallthrough 18815: case 0b100_011: //-(A3) 18816: if (XEiJ.EFA_SEPARATE_AR) { 18817: XEiJ.mpuCycleCount += 6; 18818: return --XEiJ.regRn[11]; 18819: } 18820: //fallthrough 18821: case 0b100_100: //-(A4) 18822: if (XEiJ.EFA_SEPARATE_AR) { 18823: XEiJ.mpuCycleCount += 6; 18824: return --XEiJ.regRn[12]; 18825: } 18826: //fallthrough 18827: case 0b100_101: //-(A5) 18828: if (XEiJ.EFA_SEPARATE_AR) { 18829: XEiJ.mpuCycleCount += 6; 18830: return --XEiJ.regRn[13]; 18831: } 18832: //fallthrough 18833: case 0b100_110: //-(A6) 18834: if (XEiJ.EFA_SEPARATE_AR) { 18835: XEiJ.mpuCycleCount += 6; 18836: return --XEiJ.regRn[14]; 18837: } else { 18838: XEiJ.mpuCycleCount += 6; 18839: return --XEiJ.regRn[ea - (0b100_000 - 8)]; 18840: } 18841: case 0b100_111: //-(A7) 18842: XEiJ.mpuCycleCount += 6; 18843: return XEiJ.regRn[15] -= 2; 18844: case 0b101_000: //(d16,A0) 18845: case 0b101_001: //(d16,A1) 18846: case 0b101_010: //(d16,A2) 18847: case 0b101_011: //(d16,A3) 18848: case 0b101_100: //(d16,A4) 18849: case 0b101_101: //(d16,A5) 18850: case 0b101_110: //(d16,A6) 18851: case 0b101_111: //(d16,A7) 18852: XEiJ.mpuCycleCount += 8; 18853: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18854: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18855: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18856: } else { 18857: t = XEiJ.regPC; 18858: XEiJ.regPC = t + 2; 18859: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18860: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18861: } 18862: case 0b110_000: //(d8,A0,Rn.wl) 18863: case 0b110_001: //(d8,A1,Rn.wl) 18864: case 0b110_010: //(d8,A2,Rn.wl) 18865: case 0b110_011: //(d8,A3,Rn.wl) 18866: case 0b110_100: //(d8,A4,Rn.wl) 18867: case 0b110_101: //(d8,A5,Rn.wl) 18868: case 0b110_110: //(d8,A6,Rn.wl) 18869: case 0b110_111: //(d8,A7,Rn.wl) 18870: XEiJ.mpuCycleCount += 10; 18871: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18872: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18873: } else { 18874: w = XEiJ.regPC; 18875: XEiJ.regPC = w + 2; 18876: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18877: } 18878: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18879: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18880: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18881: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18882: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18883: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18884: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18885: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18886: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18887: XEiJ.regRn[w >> 12]) //ロングインデックス 18888: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18889: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18890: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18891: XEiJ.busRls (t) + x) //ポストインデックス 18892: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18893: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18894: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18895: case 0b111_000: //(xxx).W 18896: XEiJ.mpuCycleCount += 8; 18897: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 18898: case 0b111_001: //(xxx).L 18899: XEiJ.mpuCycleCount += 12; 18900: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 18901: } //switch 18902: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18903: throw M68kException.m6eSignal; 18904: } //efaMltByte 18905: 18906: //a = efaCntByte (ea) //| M WXZP | 18907: // 制御モードのロングオペランドの実効アドレスを求める 18908: // efaMemByteとの違いは(Ar)+と-(Ar)がないこと 18909: @SuppressWarnings ("fallthrough") public static int efaCntByte (int ea) throws M68kException { 18910: int t, w, x; 18911: switch (ea) { 18912: case 0b010_000: //(A0) 18913: if (XEiJ.EFA_SEPARATE_AR) { 18914: XEiJ.mpuCycleCount += 4; 18915: return XEiJ.regRn[ 8]; 18916: } 18917: //fallthrough 18918: case 0b010_001: //(A1) 18919: if (XEiJ.EFA_SEPARATE_AR) { 18920: XEiJ.mpuCycleCount += 4; 18921: return XEiJ.regRn[ 9]; 18922: } 18923: //fallthrough 18924: case 0b010_010: //(A2) 18925: if (XEiJ.EFA_SEPARATE_AR) { 18926: XEiJ.mpuCycleCount += 4; 18927: return XEiJ.regRn[10]; 18928: } 18929: //fallthrough 18930: case 0b010_011: //(A3) 18931: if (XEiJ.EFA_SEPARATE_AR) { 18932: XEiJ.mpuCycleCount += 4; 18933: return XEiJ.regRn[11]; 18934: } 18935: //fallthrough 18936: case 0b010_100: //(A4) 18937: if (XEiJ.EFA_SEPARATE_AR) { 18938: XEiJ.mpuCycleCount += 4; 18939: return XEiJ.regRn[12]; 18940: } 18941: //fallthrough 18942: case 0b010_101: //(A5) 18943: if (XEiJ.EFA_SEPARATE_AR) { 18944: XEiJ.mpuCycleCount += 4; 18945: return XEiJ.regRn[13]; 18946: } 18947: //fallthrough 18948: case 0b010_110: //(A6) 18949: if (XEiJ.EFA_SEPARATE_AR) { 18950: XEiJ.mpuCycleCount += 4; 18951: return XEiJ.regRn[14]; 18952: } 18953: //fallthrough 18954: case 0b010_111: //(A7) 18955: if (XEiJ.EFA_SEPARATE_AR) { 18956: XEiJ.mpuCycleCount += 4; 18957: return XEiJ.regRn[15]; 18958: } else { 18959: XEiJ.mpuCycleCount += 4; 18960: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18961: } 18962: case 0b101_000: //(d16,A0) 18963: case 0b101_001: //(d16,A1) 18964: case 0b101_010: //(d16,A2) 18965: case 0b101_011: //(d16,A3) 18966: case 0b101_100: //(d16,A4) 18967: case 0b101_101: //(d16,A5) 18968: case 0b101_110: //(d16,A6) 18969: case 0b101_111: //(d16,A7) 18970: XEiJ.mpuCycleCount += 8; 18971: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18972: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18973: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18974: } else { 18975: t = XEiJ.regPC; 18976: XEiJ.regPC = t + 2; 18977: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18978: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18979: } 18980: case 0b110_000: //(d8,A0,Rn.wl) 18981: case 0b110_001: //(d8,A1,Rn.wl) 18982: case 0b110_010: //(d8,A2,Rn.wl) 18983: case 0b110_011: //(d8,A3,Rn.wl) 18984: case 0b110_100: //(d8,A4,Rn.wl) 18985: case 0b110_101: //(d8,A5,Rn.wl) 18986: case 0b110_110: //(d8,A6,Rn.wl) 18987: case 0b110_111: //(d8,A7,Rn.wl) 18988: XEiJ.mpuCycleCount += 10; 18989: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18990: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18991: } else { 18992: w = XEiJ.regPC; 18993: XEiJ.regPC = w + 2; 18994: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18995: } 18996: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18997: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18998: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18999: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19000: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19001: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19002: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19003: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19004: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19005: XEiJ.regRn[w >> 12]) //ロングインデックス 19006: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19007: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19008: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19009: XEiJ.busRls (t) + x) //ポストインデックス 19010: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19011: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19012: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19013: case 0b111_000: //(xxx).W 19014: XEiJ.mpuCycleCount += 8; 19015: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19016: case 0b111_001: //(xxx).L 19017: XEiJ.mpuCycleCount += 12; 19018: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19019: case 0b111_010: //(d16,PC) 19020: XEiJ.mpuCycleCount += 8; 19021: t = XEiJ.regPC; 19022: XEiJ.regPC = t + 2; 19023: return (t //ベースレジスタ 19024: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19025: case 0b111_011: //(d8,PC,Rn.wl) 19026: XEiJ.mpuCycleCount += 10; 19027: t = XEiJ.regPC; 19028: XEiJ.regPC = t + 2; 19029: w = XEiJ.busRwze (t); //pcwz。拡張ワード 19030: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19031: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19032: t) //ベースレジスタ 19033: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19034: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19035: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19036: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19037: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19038: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19039: XEiJ.regRn[w >> 12]) //ロングインデックス 19040: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19041: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19042: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19043: XEiJ.busRls (t) + x) //ポストインデックス 19044: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19045: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19046: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19047: } //switch 19048: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19049: throw M68kException.m6eSignal; 19050: } //efaCntByte 19051: 19052: //a = efaAnyWord (ea) //| M+-WXZPI| 19053: // 任意のモードのワードオペランドの実効アドレスを求める 19054: // efaAnyByteとの違いは(Ar)+と-(Ar)がArを2変化させることと、(A7)+と-(A7)と#<data>の特別な動作がないこと 19055: @SuppressWarnings ("fallthrough") public static int efaAnyWord (int ea) throws M68kException { 19056: int t, w, x; 19057: switch (ea) { 19058: case 0b010_000: //(A0) 19059: if (XEiJ.EFA_SEPARATE_AR) { 19060: XEiJ.mpuCycleCount += 4; 19061: return XEiJ.regRn[ 8]; 19062: } 19063: //fallthrough 19064: case 0b010_001: //(A1) 19065: if (XEiJ.EFA_SEPARATE_AR) { 19066: XEiJ.mpuCycleCount += 4; 19067: return XEiJ.regRn[ 9]; 19068: } 19069: //fallthrough 19070: case 0b010_010: //(A2) 19071: if (XEiJ.EFA_SEPARATE_AR) { 19072: XEiJ.mpuCycleCount += 4; 19073: return XEiJ.regRn[10]; 19074: } 19075: //fallthrough 19076: case 0b010_011: //(A3) 19077: if (XEiJ.EFA_SEPARATE_AR) { 19078: XEiJ.mpuCycleCount += 4; 19079: return XEiJ.regRn[11]; 19080: } 19081: //fallthrough 19082: case 0b010_100: //(A4) 19083: if (XEiJ.EFA_SEPARATE_AR) { 19084: XEiJ.mpuCycleCount += 4; 19085: return XEiJ.regRn[12]; 19086: } 19087: //fallthrough 19088: case 0b010_101: //(A5) 19089: if (XEiJ.EFA_SEPARATE_AR) { 19090: XEiJ.mpuCycleCount += 4; 19091: return XEiJ.regRn[13]; 19092: } 19093: //fallthrough 19094: case 0b010_110: //(A6) 19095: if (XEiJ.EFA_SEPARATE_AR) { 19096: XEiJ.mpuCycleCount += 4; 19097: return XEiJ.regRn[14]; 19098: } 19099: //fallthrough 19100: case 0b010_111: //(A7) 19101: if (XEiJ.EFA_SEPARATE_AR) { 19102: XEiJ.mpuCycleCount += 4; 19103: return XEiJ.regRn[15]; 19104: } else { 19105: XEiJ.mpuCycleCount += 4; 19106: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19107: } 19108: case 0b011_000: //(A0)+ 19109: if (XEiJ.EFA_SEPARATE_AR) { 19110: XEiJ.mpuCycleCount += 4; 19111: return (XEiJ.regRn[ 8] += 2) - 2; 19112: } 19113: //fallthrough 19114: case 0b011_001: //(A1)+ 19115: if (XEiJ.EFA_SEPARATE_AR) { 19116: XEiJ.mpuCycleCount += 4; 19117: return (XEiJ.regRn[ 9] += 2) - 2; 19118: } 19119: //fallthrough 19120: case 0b011_010: //(A2)+ 19121: if (XEiJ.EFA_SEPARATE_AR) { 19122: XEiJ.mpuCycleCount += 4; 19123: return (XEiJ.regRn[10] += 2) - 2; 19124: } 19125: //fallthrough 19126: case 0b011_011: //(A3)+ 19127: if (XEiJ.EFA_SEPARATE_AR) { 19128: XEiJ.mpuCycleCount += 4; 19129: return (XEiJ.regRn[11] += 2) - 2; 19130: } 19131: //fallthrough 19132: case 0b011_100: //(A4)+ 19133: if (XEiJ.EFA_SEPARATE_AR) { 19134: XEiJ.mpuCycleCount += 4; 19135: return (XEiJ.regRn[12] += 2) - 2; 19136: } 19137: //fallthrough 19138: case 0b011_101: //(A5)+ 19139: if (XEiJ.EFA_SEPARATE_AR) { 19140: XEiJ.mpuCycleCount += 4; 19141: return (XEiJ.regRn[13] += 2) - 2; 19142: } 19143: //fallthrough 19144: case 0b011_110: //(A6)+ 19145: if (XEiJ.EFA_SEPARATE_AR) { 19146: XEiJ.mpuCycleCount += 4; 19147: return (XEiJ.regRn[14] += 2) - 2; 19148: } 19149: //fallthrough 19150: case 0b011_111: //(A7)+ 19151: if (XEiJ.EFA_SEPARATE_AR) { 19152: XEiJ.mpuCycleCount += 4; 19153: return (XEiJ.regRn[15] += 2) - 2; 19154: } else { 19155: XEiJ.mpuCycleCount += 4; 19156: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2; 19157: } 19158: case 0b100_000: //-(A0) 19159: if (XEiJ.EFA_SEPARATE_AR) { 19160: XEiJ.mpuCycleCount += 6; 19161: return XEiJ.regRn[ 8] -= 2; 19162: } 19163: //fallthrough 19164: case 0b100_001: //-(A1) 19165: if (XEiJ.EFA_SEPARATE_AR) { 19166: XEiJ.mpuCycleCount += 6; 19167: return XEiJ.regRn[ 9] -= 2; 19168: } 19169: //fallthrough 19170: case 0b100_010: //-(A2) 19171: if (XEiJ.EFA_SEPARATE_AR) { 19172: XEiJ.mpuCycleCount += 6; 19173: return XEiJ.regRn[10] -= 2; 19174: } 19175: //fallthrough 19176: case 0b100_011: //-(A3) 19177: if (XEiJ.EFA_SEPARATE_AR) { 19178: XEiJ.mpuCycleCount += 6; 19179: return XEiJ.regRn[11] -= 2; 19180: } 19181: //fallthrough 19182: case 0b100_100: //-(A4) 19183: if (XEiJ.EFA_SEPARATE_AR) { 19184: XEiJ.mpuCycleCount += 6; 19185: return XEiJ.regRn[12] -= 2; 19186: } 19187: //fallthrough 19188: case 0b100_101: //-(A5) 19189: if (XEiJ.EFA_SEPARATE_AR) { 19190: XEiJ.mpuCycleCount += 6; 19191: return XEiJ.regRn[13] -= 2; 19192: } 19193: //fallthrough 19194: case 0b100_110: //-(A6) 19195: if (XEiJ.EFA_SEPARATE_AR) { 19196: XEiJ.mpuCycleCount += 6; 19197: return XEiJ.regRn[14] -= 2; 19198: } 19199: //fallthrough 19200: case 0b100_111: //-(A7) 19201: if (XEiJ.EFA_SEPARATE_AR) { 19202: XEiJ.mpuCycleCount += 6; 19203: return XEiJ.regRn[15] -= 2; 19204: } else { 19205: XEiJ.mpuCycleCount += 6; 19206: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2; 19207: } 19208: case 0b101_000: //(d16,A0) 19209: case 0b101_001: //(d16,A1) 19210: case 0b101_010: //(d16,A2) 19211: case 0b101_011: //(d16,A3) 19212: case 0b101_100: //(d16,A4) 19213: case 0b101_101: //(d16,A5) 19214: case 0b101_110: //(d16,A6) 19215: case 0b101_111: //(d16,A7) 19216: XEiJ.mpuCycleCount += 8; 19217: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19218: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19219: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19220: } else { 19221: t = XEiJ.regPC; 19222: XEiJ.regPC = t + 2; 19223: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19224: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19225: } 19226: case 0b110_000: //(d8,A0,Rn.wl) 19227: case 0b110_001: //(d8,A1,Rn.wl) 19228: case 0b110_010: //(d8,A2,Rn.wl) 19229: case 0b110_011: //(d8,A3,Rn.wl) 19230: case 0b110_100: //(d8,A4,Rn.wl) 19231: case 0b110_101: //(d8,A5,Rn.wl) 19232: case 0b110_110: //(d8,A6,Rn.wl) 19233: case 0b110_111: //(d8,A7,Rn.wl) 19234: XEiJ.mpuCycleCount += 10; 19235: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19236: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19237: } else { 19238: w = XEiJ.regPC; 19239: XEiJ.regPC = w + 2; 19240: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19241: } 19242: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19243: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19244: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19245: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19246: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19247: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19248: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19249: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19250: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19251: XEiJ.regRn[w >> 12]) //ロングインデックス 19252: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19253: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19254: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19255: XEiJ.busRls (t) + x) //ポストインデックス 19256: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19257: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19258: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19259: case 0b111_000: //(xxx).W 19260: XEiJ.mpuCycleCount += 8; 19261: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19262: case 0b111_001: //(xxx).L 19263: XEiJ.mpuCycleCount += 12; 19264: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19265: case 0b111_010: //(d16,PC) 19266: XEiJ.mpuCycleCount += 8; 19267: t = XEiJ.regPC; 19268: XEiJ.regPC = t + 2; 19269: return (t //ベースレジスタ 19270: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19271: case 0b111_011: //(d8,PC,Rn.wl) 19272: XEiJ.mpuCycleCount += 10; 19273: t = XEiJ.regPC; 19274: XEiJ.regPC = t + 2; 19275: w = XEiJ.busRwze (t); //pcwz。拡張ワード 19276: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19277: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19278: t) //ベースレジスタ 19279: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19280: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19281: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19282: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19283: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19284: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19285: XEiJ.regRn[w >> 12]) //ロングインデックス 19286: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19287: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19288: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19289: XEiJ.busRls (t) + x) //ポストインデックス 19290: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19291: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19292: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19293: case 0b111_100: //#<data> 19294: XEiJ.mpuCycleCount += 4; 19295: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19296: return (XEiJ.regPC += 2) - 2; 19297: } else { 19298: t = XEiJ.regPC; 19299: XEiJ.regPC = t + 2; 19300: return t; 19301: } 19302: } //switch 19303: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19304: throw M68kException.m6eSignal; 19305: } //efaAnyWord 19306: 19307: //a = efaMemWord (ea) //| M+-WXZP | 19308: // メモリモードのワードオペランドの実効アドレスを求める 19309: // efaAnyWordとの違いは#<data>がないこと 19310: @SuppressWarnings ("fallthrough") public static int efaMemWord (int ea) throws M68kException { 19311: int t, w, x; 19312: switch (ea) { 19313: case 0b010_000: //(A0) 19314: if (XEiJ.EFA_SEPARATE_AR) { 19315: XEiJ.mpuCycleCount += 4; 19316: return XEiJ.regRn[ 8]; 19317: } 19318: //fallthrough 19319: case 0b010_001: //(A1) 19320: if (XEiJ.EFA_SEPARATE_AR) { 19321: XEiJ.mpuCycleCount += 4; 19322: return XEiJ.regRn[ 9]; 19323: } 19324: //fallthrough 19325: case 0b010_010: //(A2) 19326: if (XEiJ.EFA_SEPARATE_AR) { 19327: XEiJ.mpuCycleCount += 4; 19328: return XEiJ.regRn[10]; 19329: } 19330: //fallthrough 19331: case 0b010_011: //(A3) 19332: if (XEiJ.EFA_SEPARATE_AR) { 19333: XEiJ.mpuCycleCount += 4; 19334: return XEiJ.regRn[11]; 19335: } 19336: //fallthrough 19337: case 0b010_100: //(A4) 19338: if (XEiJ.EFA_SEPARATE_AR) { 19339: XEiJ.mpuCycleCount += 4; 19340: return XEiJ.regRn[12]; 19341: } 19342: //fallthrough 19343: case 0b010_101: //(A5) 19344: if (XEiJ.EFA_SEPARATE_AR) { 19345: XEiJ.mpuCycleCount += 4; 19346: return XEiJ.regRn[13]; 19347: } 19348: //fallthrough 19349: case 0b010_110: //(A6) 19350: if (XEiJ.EFA_SEPARATE_AR) { 19351: XEiJ.mpuCycleCount += 4; 19352: return XEiJ.regRn[14]; 19353: } 19354: //fallthrough 19355: case 0b010_111: //(A7) 19356: if (XEiJ.EFA_SEPARATE_AR) { 19357: XEiJ.mpuCycleCount += 4; 19358: return XEiJ.regRn[15]; 19359: } else { 19360: XEiJ.mpuCycleCount += 4; 19361: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19362: } 19363: case 0b011_000: //(A0)+ 19364: if (XEiJ.EFA_SEPARATE_AR) { 19365: XEiJ.mpuCycleCount += 4; 19366: return (XEiJ.regRn[ 8] += 2) - 2; 19367: } 19368: //fallthrough 19369: case 0b011_001: //(A1)+ 19370: if (XEiJ.EFA_SEPARATE_AR) { 19371: XEiJ.mpuCycleCount += 4; 19372: return (XEiJ.regRn[ 9] += 2) - 2; 19373: } 19374: //fallthrough 19375: case 0b011_010: //(A2)+ 19376: if (XEiJ.EFA_SEPARATE_AR) { 19377: XEiJ.mpuCycleCount += 4; 19378: return (XEiJ.regRn[10] += 2) - 2; 19379: } 19380: //fallthrough 19381: case 0b011_011: //(A3)+ 19382: if (XEiJ.EFA_SEPARATE_AR) { 19383: XEiJ.mpuCycleCount += 4; 19384: return (XEiJ.regRn[11] += 2) - 2; 19385: } 19386: //fallthrough 19387: case 0b011_100: //(A4)+ 19388: if (XEiJ.EFA_SEPARATE_AR) { 19389: XEiJ.mpuCycleCount += 4; 19390: return (XEiJ.regRn[12] += 2) - 2; 19391: } 19392: //fallthrough 19393: case 0b011_101: //(A5)+ 19394: if (XEiJ.EFA_SEPARATE_AR) { 19395: XEiJ.mpuCycleCount += 4; 19396: return (XEiJ.regRn[13] += 2) - 2; 19397: } 19398: //fallthrough 19399: case 0b011_110: //(A6)+ 19400: if (XEiJ.EFA_SEPARATE_AR) { 19401: XEiJ.mpuCycleCount += 4; 19402: return (XEiJ.regRn[14] += 2) - 2; 19403: } 19404: //fallthrough 19405: case 0b011_111: //(A7)+ 19406: if (XEiJ.EFA_SEPARATE_AR) { 19407: XEiJ.mpuCycleCount += 4; 19408: return (XEiJ.regRn[15] += 2) - 2; 19409: } else { 19410: XEiJ.mpuCycleCount += 4; 19411: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2; 19412: } 19413: case 0b100_000: //-(A0) 19414: if (XEiJ.EFA_SEPARATE_AR) { 19415: XEiJ.mpuCycleCount += 6; 19416: return XEiJ.regRn[ 8] -= 2; 19417: } 19418: //fallthrough 19419: case 0b100_001: //-(A1) 19420: if (XEiJ.EFA_SEPARATE_AR) { 19421: XEiJ.mpuCycleCount += 6; 19422: return XEiJ.regRn[ 9] -= 2; 19423: } 19424: //fallthrough 19425: case 0b100_010: //-(A2) 19426: if (XEiJ.EFA_SEPARATE_AR) { 19427: XEiJ.mpuCycleCount += 6; 19428: return XEiJ.regRn[10] -= 2; 19429: } 19430: //fallthrough 19431: case 0b100_011: //-(A3) 19432: if (XEiJ.EFA_SEPARATE_AR) { 19433: XEiJ.mpuCycleCount += 6; 19434: return XEiJ.regRn[11] -= 2; 19435: } 19436: //fallthrough 19437: case 0b100_100: //-(A4) 19438: if (XEiJ.EFA_SEPARATE_AR) { 19439: XEiJ.mpuCycleCount += 6; 19440: return XEiJ.regRn[12] -= 2; 19441: } 19442: //fallthrough 19443: case 0b100_101: //-(A5) 19444: if (XEiJ.EFA_SEPARATE_AR) { 19445: XEiJ.mpuCycleCount += 6; 19446: return XEiJ.regRn[13] -= 2; 19447: } 19448: //fallthrough 19449: case 0b100_110: //-(A6) 19450: if (XEiJ.EFA_SEPARATE_AR) { 19451: XEiJ.mpuCycleCount += 6; 19452: return XEiJ.regRn[14] -= 2; 19453: } 19454: //fallthrough 19455: case 0b100_111: //-(A7) 19456: if (XEiJ.EFA_SEPARATE_AR) { 19457: XEiJ.mpuCycleCount += 6; 19458: return XEiJ.regRn[15] -= 2; 19459: } else { 19460: XEiJ.mpuCycleCount += 6; 19461: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2; 19462: } 19463: case 0b101_000: //(d16,A0) 19464: case 0b101_001: //(d16,A1) 19465: case 0b101_010: //(d16,A2) 19466: case 0b101_011: //(d16,A3) 19467: case 0b101_100: //(d16,A4) 19468: case 0b101_101: //(d16,A5) 19469: case 0b101_110: //(d16,A6) 19470: case 0b101_111: //(d16,A7) 19471: XEiJ.mpuCycleCount += 8; 19472: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19473: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19474: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19475: } else { 19476: t = XEiJ.regPC; 19477: XEiJ.regPC = t + 2; 19478: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19479: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19480: } 19481: case 0b110_000: //(d8,A0,Rn.wl) 19482: case 0b110_001: //(d8,A1,Rn.wl) 19483: case 0b110_010: //(d8,A2,Rn.wl) 19484: case 0b110_011: //(d8,A3,Rn.wl) 19485: case 0b110_100: //(d8,A4,Rn.wl) 19486: case 0b110_101: //(d8,A5,Rn.wl) 19487: case 0b110_110: //(d8,A6,Rn.wl) 19488: case 0b110_111: //(d8,A7,Rn.wl) 19489: XEiJ.mpuCycleCount += 10; 19490: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19491: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19492: } else { 19493: w = XEiJ.regPC; 19494: XEiJ.regPC = w + 2; 19495: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19496: } 19497: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19498: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19499: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19500: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19501: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19502: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19503: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19504: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19505: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19506: XEiJ.regRn[w >> 12]) //ロングインデックス 19507: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19508: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19509: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19510: XEiJ.busRls (t) + x) //ポストインデックス 19511: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19512: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19513: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19514: case 0b111_000: //(xxx).W 19515: XEiJ.mpuCycleCount += 8; 19516: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19517: case 0b111_001: //(xxx).L 19518: XEiJ.mpuCycleCount += 12; 19519: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19520: case 0b111_010: //(d16,PC) 19521: XEiJ.mpuCycleCount += 8; 19522: t = XEiJ.regPC; 19523: XEiJ.regPC = t + 2; 19524: return (t //ベースレジスタ 19525: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19526: case 0b111_011: //(d8,PC,Rn.wl) 19527: XEiJ.mpuCycleCount += 10; 19528: t = XEiJ.regPC; 19529: XEiJ.regPC = t + 2; 19530: w = XEiJ.busRwze (t); //pcwz。拡張ワード 19531: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19532: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19533: t) //ベースレジスタ 19534: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19535: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19536: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19537: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19538: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19539: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19540: XEiJ.regRn[w >> 12]) //ロングインデックス 19541: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19542: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19543: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19544: XEiJ.busRls (t) + x) //ポストインデックス 19545: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19546: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19547: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19548: } //switch 19549: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19550: throw M68kException.m6eSignal; 19551: } //efaMemWord 19552: 19553: //a = efaMltWord (ea) //| M+-WXZ | 19554: // メモリ可変モードのワードオペランドの実効アドレスを求める 19555: // efaMemWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 19556: @SuppressWarnings ("fallthrough") public static int efaMltWord (int ea) throws M68kException { 19557: int t, w, x; 19558: switch (ea) { 19559: case 0b010_000: //(A0) 19560: if (XEiJ.EFA_SEPARATE_AR) { 19561: XEiJ.mpuCycleCount += 4; 19562: return XEiJ.regRn[ 8]; 19563: } 19564: //fallthrough 19565: case 0b010_001: //(A1) 19566: if (XEiJ.EFA_SEPARATE_AR) { 19567: XEiJ.mpuCycleCount += 4; 19568: return XEiJ.regRn[ 9]; 19569: } 19570: //fallthrough 19571: case 0b010_010: //(A2) 19572: if (XEiJ.EFA_SEPARATE_AR) { 19573: XEiJ.mpuCycleCount += 4; 19574: return XEiJ.regRn[10]; 19575: } 19576: //fallthrough 19577: case 0b010_011: //(A3) 19578: if (XEiJ.EFA_SEPARATE_AR) { 19579: XEiJ.mpuCycleCount += 4; 19580: return XEiJ.regRn[11]; 19581: } 19582: //fallthrough 19583: case 0b010_100: //(A4) 19584: if (XEiJ.EFA_SEPARATE_AR) { 19585: XEiJ.mpuCycleCount += 4; 19586: return XEiJ.regRn[12]; 19587: } 19588: //fallthrough 19589: case 0b010_101: //(A5) 19590: if (XEiJ.EFA_SEPARATE_AR) { 19591: XEiJ.mpuCycleCount += 4; 19592: return XEiJ.regRn[13]; 19593: } 19594: //fallthrough 19595: case 0b010_110: //(A6) 19596: if (XEiJ.EFA_SEPARATE_AR) { 19597: XEiJ.mpuCycleCount += 4; 19598: return XEiJ.regRn[14]; 19599: } 19600: //fallthrough 19601: case 0b010_111: //(A7) 19602: if (XEiJ.EFA_SEPARATE_AR) { 19603: XEiJ.mpuCycleCount += 4; 19604: return XEiJ.regRn[15]; 19605: } else { 19606: XEiJ.mpuCycleCount += 4; 19607: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19608: } 19609: case 0b011_000: //(A0)+ 19610: if (XEiJ.EFA_SEPARATE_AR) { 19611: XEiJ.mpuCycleCount += 4; 19612: return (XEiJ.regRn[ 8] += 2) - 2; 19613: } 19614: //fallthrough 19615: case 0b011_001: //(A1)+ 19616: if (XEiJ.EFA_SEPARATE_AR) { 19617: XEiJ.mpuCycleCount += 4; 19618: return (XEiJ.regRn[ 9] += 2) - 2; 19619: } 19620: //fallthrough 19621: case 0b011_010: //(A2)+ 19622: if (XEiJ.EFA_SEPARATE_AR) { 19623: XEiJ.mpuCycleCount += 4; 19624: return (XEiJ.regRn[10] += 2) - 2; 19625: } 19626: //fallthrough 19627: case 0b011_011: //(A3)+ 19628: if (XEiJ.EFA_SEPARATE_AR) { 19629: XEiJ.mpuCycleCount += 4; 19630: return (XEiJ.regRn[11] += 2) - 2; 19631: } 19632: //fallthrough 19633: case 0b011_100: //(A4)+ 19634: if (XEiJ.EFA_SEPARATE_AR) { 19635: XEiJ.mpuCycleCount += 4; 19636: return (XEiJ.regRn[12] += 2) - 2; 19637: } 19638: //fallthrough 19639: case 0b011_101: //(A5)+ 19640: if (XEiJ.EFA_SEPARATE_AR) { 19641: XEiJ.mpuCycleCount += 4; 19642: return (XEiJ.regRn[13] += 2) - 2; 19643: } 19644: //fallthrough 19645: case 0b011_110: //(A6)+ 19646: if (XEiJ.EFA_SEPARATE_AR) { 19647: XEiJ.mpuCycleCount += 4; 19648: return (XEiJ.regRn[14] += 2) - 2; 19649: } 19650: //fallthrough 19651: case 0b011_111: //(A7)+ 19652: if (XEiJ.EFA_SEPARATE_AR) { 19653: XEiJ.mpuCycleCount += 4; 19654: return (XEiJ.regRn[15] += 2) - 2; 19655: } else { 19656: XEiJ.mpuCycleCount += 4; 19657: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2; 19658: } 19659: case 0b100_000: //-(A0) 19660: if (XEiJ.EFA_SEPARATE_AR) { 19661: XEiJ.mpuCycleCount += 6; 19662: return XEiJ.regRn[ 8] -= 2; 19663: } 19664: //fallthrough 19665: case 0b100_001: //-(A1) 19666: if (XEiJ.EFA_SEPARATE_AR) { 19667: XEiJ.mpuCycleCount += 6; 19668: return XEiJ.regRn[ 9] -= 2; 19669: } 19670: //fallthrough 19671: case 0b100_010: //-(A2) 19672: if (XEiJ.EFA_SEPARATE_AR) { 19673: XEiJ.mpuCycleCount += 6; 19674: return XEiJ.regRn[10] -= 2; 19675: } 19676: //fallthrough 19677: case 0b100_011: //-(A3) 19678: if (XEiJ.EFA_SEPARATE_AR) { 19679: XEiJ.mpuCycleCount += 6; 19680: return XEiJ.regRn[11] -= 2; 19681: } 19682: //fallthrough 19683: case 0b100_100: //-(A4) 19684: if (XEiJ.EFA_SEPARATE_AR) { 19685: XEiJ.mpuCycleCount += 6; 19686: return XEiJ.regRn[12] -= 2; 19687: } 19688: //fallthrough 19689: case 0b100_101: //-(A5) 19690: if (XEiJ.EFA_SEPARATE_AR) { 19691: XEiJ.mpuCycleCount += 6; 19692: return XEiJ.regRn[13] -= 2; 19693: } 19694: //fallthrough 19695: case 0b100_110: //-(A6) 19696: if (XEiJ.EFA_SEPARATE_AR) { 19697: XEiJ.mpuCycleCount += 6; 19698: return XEiJ.regRn[14] -= 2; 19699: } 19700: //fallthrough 19701: case 0b100_111: //-(A7) 19702: if (XEiJ.EFA_SEPARATE_AR) { 19703: XEiJ.mpuCycleCount += 6; 19704: return XEiJ.regRn[15] -= 2; 19705: } else { 19706: XEiJ.mpuCycleCount += 6; 19707: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2; 19708: } 19709: case 0b101_000: //(d16,A0) 19710: case 0b101_001: //(d16,A1) 19711: case 0b101_010: //(d16,A2) 19712: case 0b101_011: //(d16,A3) 19713: case 0b101_100: //(d16,A4) 19714: case 0b101_101: //(d16,A5) 19715: case 0b101_110: //(d16,A6) 19716: case 0b101_111: //(d16,A7) 19717: XEiJ.mpuCycleCount += 8; 19718: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19719: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19720: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19721: } else { 19722: t = XEiJ.regPC; 19723: XEiJ.regPC = t + 2; 19724: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19725: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19726: } 19727: case 0b110_000: //(d8,A0,Rn.wl) 19728: case 0b110_001: //(d8,A1,Rn.wl) 19729: case 0b110_010: //(d8,A2,Rn.wl) 19730: case 0b110_011: //(d8,A3,Rn.wl) 19731: case 0b110_100: //(d8,A4,Rn.wl) 19732: case 0b110_101: //(d8,A5,Rn.wl) 19733: case 0b110_110: //(d8,A6,Rn.wl) 19734: case 0b110_111: //(d8,A7,Rn.wl) 19735: XEiJ.mpuCycleCount += 10; 19736: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19737: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19738: } else { 19739: w = XEiJ.regPC; 19740: XEiJ.regPC = w + 2; 19741: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19742: } 19743: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19744: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19745: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19746: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19747: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19748: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19749: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19750: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19751: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19752: XEiJ.regRn[w >> 12]) //ロングインデックス 19753: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19754: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19755: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19756: XEiJ.busRls (t) + x) //ポストインデックス 19757: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19758: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19759: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19760: case 0b111_000: //(xxx).W 19761: XEiJ.mpuCycleCount += 8; 19762: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19763: case 0b111_001: //(xxx).L 19764: XEiJ.mpuCycleCount += 12; 19765: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19766: } //switch 19767: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19768: throw M68kException.m6eSignal; 19769: } //efaMltWord 19770: 19771: //a = efaCntWord (ea) //| M WXZP | 19772: // 制御モードのワードオペランドの実効アドレスを求める 19773: // efaMemWordとの違いは(Ar)+と-(Ar)がないこと 19774: // efaCntLongとの違いはサイクル数のみ 19775: @SuppressWarnings ("fallthrough") public static int efaCntWord (int ea) throws M68kException { 19776: int t, w, x; 19777: switch (ea) { 19778: case 0b010_000: //(A0) 19779: if (XEiJ.EFA_SEPARATE_AR) { 19780: XEiJ.mpuCycleCount += 4; 19781: return XEiJ.regRn[ 8]; 19782: } 19783: //fallthrough 19784: case 0b010_001: //(A1) 19785: if (XEiJ.EFA_SEPARATE_AR) { 19786: XEiJ.mpuCycleCount += 4; 19787: return XEiJ.regRn[ 9]; 19788: } 19789: //fallthrough 19790: case 0b010_010: //(A2) 19791: if (XEiJ.EFA_SEPARATE_AR) { 19792: XEiJ.mpuCycleCount += 4; 19793: return XEiJ.regRn[10]; 19794: } 19795: //fallthrough 19796: case 0b010_011: //(A3) 19797: if (XEiJ.EFA_SEPARATE_AR) { 19798: XEiJ.mpuCycleCount += 4; 19799: return XEiJ.regRn[11]; 19800: } 19801: //fallthrough 19802: case 0b010_100: //(A4) 19803: if (XEiJ.EFA_SEPARATE_AR) { 19804: XEiJ.mpuCycleCount += 4; 19805: return XEiJ.regRn[12]; 19806: } 19807: //fallthrough 19808: case 0b010_101: //(A5) 19809: if (XEiJ.EFA_SEPARATE_AR) { 19810: XEiJ.mpuCycleCount += 4; 19811: return XEiJ.regRn[13]; 19812: } 19813: //fallthrough 19814: case 0b010_110: //(A6) 19815: if (XEiJ.EFA_SEPARATE_AR) { 19816: XEiJ.mpuCycleCount += 4; 19817: return XEiJ.regRn[14]; 19818: } 19819: //fallthrough 19820: case 0b010_111: //(A7) 19821: if (XEiJ.EFA_SEPARATE_AR) { 19822: XEiJ.mpuCycleCount += 4; 19823: return XEiJ.regRn[15]; 19824: } else { 19825: XEiJ.mpuCycleCount += 4; 19826: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19827: } 19828: case 0b101_000: //(d16,A0) 19829: case 0b101_001: //(d16,A1) 19830: case 0b101_010: //(d16,A2) 19831: case 0b101_011: //(d16,A3) 19832: case 0b101_100: //(d16,A4) 19833: case 0b101_101: //(d16,A5) 19834: case 0b101_110: //(d16,A6) 19835: case 0b101_111: //(d16,A7) 19836: XEiJ.mpuCycleCount += 8; 19837: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19838: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19839: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19840: } else { 19841: t = XEiJ.regPC; 19842: XEiJ.regPC = t + 2; 19843: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19844: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19845: } 19846: case 0b110_000: //(d8,A0,Rn.wl) 19847: case 0b110_001: //(d8,A1,Rn.wl) 19848: case 0b110_010: //(d8,A2,Rn.wl) 19849: case 0b110_011: //(d8,A3,Rn.wl) 19850: case 0b110_100: //(d8,A4,Rn.wl) 19851: case 0b110_101: //(d8,A5,Rn.wl) 19852: case 0b110_110: //(d8,A6,Rn.wl) 19853: case 0b110_111: //(d8,A7,Rn.wl) 19854: XEiJ.mpuCycleCount += 10; 19855: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19856: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19857: } else { 19858: w = XEiJ.regPC; 19859: XEiJ.regPC = w + 2; 19860: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19861: } 19862: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19863: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19864: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19865: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19866: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19867: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19868: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19869: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19870: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19871: XEiJ.regRn[w >> 12]) //ロングインデックス 19872: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19873: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19874: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19875: XEiJ.busRls (t) + x) //ポストインデックス 19876: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19877: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19878: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19879: case 0b111_000: //(xxx).W 19880: XEiJ.mpuCycleCount += 8; 19881: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19882: case 0b111_001: //(xxx).L 19883: XEiJ.mpuCycleCount += 12; 19884: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19885: case 0b111_010: //(d16,PC) 19886: XEiJ.mpuCycleCount += 8; 19887: t = XEiJ.regPC; 19888: XEiJ.regPC = t + 2; 19889: return (t //ベースレジスタ 19890: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19891: case 0b111_011: //(d8,PC,Rn.wl) 19892: XEiJ.mpuCycleCount += 10; 19893: t = XEiJ.regPC; 19894: XEiJ.regPC = t + 2; 19895: w = XEiJ.busRwze (t); //pcwz。拡張ワード 19896: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19897: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19898: t) //ベースレジスタ 19899: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19900: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19901: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19902: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19903: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19904: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19905: XEiJ.regRn[w >> 12]) //ロングインデックス 19906: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19907: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19908: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19909: XEiJ.busRls (t) + x) //ポストインデックス 19910: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19911: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19912: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19913: } //switch 19914: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19915: throw M68kException.m6eSignal; 19916: } //efaCntWord 19917: 19918: //a = efaCltWord (ea) //| M WXZ | 19919: // 制御可変モードのワードオペランドの実効アドレスを求める 19920: // efaCntWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 19921: // efaCltLongとの違いはサイクル数のみ 19922: @SuppressWarnings ("fallthrough") public static int efaCltWord (int ea) throws M68kException { 19923: int t, w, x; 19924: switch (ea) { 19925: case 0b010_000: //(A0) 19926: if (XEiJ.EFA_SEPARATE_AR) { 19927: XEiJ.mpuCycleCount += 4; 19928: return XEiJ.regRn[ 8]; 19929: } 19930: //fallthrough 19931: case 0b010_001: //(A1) 19932: if (XEiJ.EFA_SEPARATE_AR) { 19933: XEiJ.mpuCycleCount += 4; 19934: return XEiJ.regRn[ 9]; 19935: } 19936: //fallthrough 19937: case 0b010_010: //(A2) 19938: if (XEiJ.EFA_SEPARATE_AR) { 19939: XEiJ.mpuCycleCount += 4; 19940: return XEiJ.regRn[10]; 19941: } 19942: //fallthrough 19943: case 0b010_011: //(A3) 19944: if (XEiJ.EFA_SEPARATE_AR) { 19945: XEiJ.mpuCycleCount += 4; 19946: return XEiJ.regRn[11]; 19947: } 19948: //fallthrough 19949: case 0b010_100: //(A4) 19950: if (XEiJ.EFA_SEPARATE_AR) { 19951: XEiJ.mpuCycleCount += 4; 19952: return XEiJ.regRn[12]; 19953: } 19954: //fallthrough 19955: case 0b010_101: //(A5) 19956: if (XEiJ.EFA_SEPARATE_AR) { 19957: XEiJ.mpuCycleCount += 4; 19958: return XEiJ.regRn[13]; 19959: } 19960: //fallthrough 19961: case 0b010_110: //(A6) 19962: if (XEiJ.EFA_SEPARATE_AR) { 19963: XEiJ.mpuCycleCount += 4; 19964: return XEiJ.regRn[14]; 19965: } 19966: //fallthrough 19967: case 0b010_111: //(A7) 19968: if (XEiJ.EFA_SEPARATE_AR) { 19969: XEiJ.mpuCycleCount += 4; 19970: return XEiJ.regRn[15]; 19971: } else { 19972: XEiJ.mpuCycleCount += 4; 19973: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19974: } 19975: case 0b101_000: //(d16,A0) 19976: case 0b101_001: //(d16,A1) 19977: case 0b101_010: //(d16,A2) 19978: case 0b101_011: //(d16,A3) 19979: case 0b101_100: //(d16,A4) 19980: case 0b101_101: //(d16,A5) 19981: case 0b101_110: //(d16,A6) 19982: case 0b101_111: //(d16,A7) 19983: XEiJ.mpuCycleCount += 8; 19984: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19985: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19986: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19987: } else { 19988: t = XEiJ.regPC; 19989: XEiJ.regPC = t + 2; 19990: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19991: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19992: } 19993: case 0b110_000: //(d8,A0,Rn.wl) 19994: case 0b110_001: //(d8,A1,Rn.wl) 19995: case 0b110_010: //(d8,A2,Rn.wl) 19996: case 0b110_011: //(d8,A3,Rn.wl) 19997: case 0b110_100: //(d8,A4,Rn.wl) 19998: case 0b110_101: //(d8,A5,Rn.wl) 19999: case 0b110_110: //(d8,A6,Rn.wl) 20000: case 0b110_111: //(d8,A7,Rn.wl) 20001: XEiJ.mpuCycleCount += 10; 20002: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20003: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20004: } else { 20005: w = XEiJ.regPC; 20006: XEiJ.regPC = w + 2; 20007: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20008: } 20009: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20010: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20011: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20012: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20013: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20014: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20015: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20016: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20017: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20018: XEiJ.regRn[w >> 12]) //ロングインデックス 20019: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20020: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20021: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20022: XEiJ.busRls (t) + x) //ポストインデックス 20023: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20024: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20025: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20026: case 0b111_000: //(xxx).W 20027: XEiJ.mpuCycleCount += 8; 20028: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20029: case 0b111_001: //(xxx).L 20030: XEiJ.mpuCycleCount += 12; 20031: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20032: } //switch 20033: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20034: throw M68kException.m6eSignal; 20035: } //efaCltWord 20036: 20037: //a = efaAnyLong (ea) //| M+-WXZPI| 20038: // 任意のモードのロングオペランドの実効アドレスを求める 20039: // efaAnyWordとの違いは(Ar)+と-(Ar)がArを4変化させることと、#<data>がPCを4変化させることと、 20040: // オペランドのアクセスが1ワード増える分の4サイクルが追加されていること 20041: @SuppressWarnings ("fallthrough") public static int efaAnyLong (int ea) throws M68kException { 20042: int t, w, x; 20043: switch (ea) { 20044: case 0b010_000: //(A0) 20045: if (XEiJ.EFA_SEPARATE_AR) { 20046: XEiJ.mpuCycleCount += 8; 20047: return XEiJ.regRn[ 8]; 20048: } 20049: //fallthrough 20050: case 0b010_001: //(A1) 20051: if (XEiJ.EFA_SEPARATE_AR) { 20052: XEiJ.mpuCycleCount += 8; 20053: return XEiJ.regRn[ 9]; 20054: } 20055: //fallthrough 20056: case 0b010_010: //(A2) 20057: if (XEiJ.EFA_SEPARATE_AR) { 20058: XEiJ.mpuCycleCount += 8; 20059: return XEiJ.regRn[10]; 20060: } 20061: //fallthrough 20062: case 0b010_011: //(A3) 20063: if (XEiJ.EFA_SEPARATE_AR) { 20064: XEiJ.mpuCycleCount += 8; 20065: return XEiJ.regRn[11]; 20066: } 20067: //fallthrough 20068: case 0b010_100: //(A4) 20069: if (XEiJ.EFA_SEPARATE_AR) { 20070: XEiJ.mpuCycleCount += 8; 20071: return XEiJ.regRn[12]; 20072: } 20073: //fallthrough 20074: case 0b010_101: //(A5) 20075: if (XEiJ.EFA_SEPARATE_AR) { 20076: XEiJ.mpuCycleCount += 8; 20077: return XEiJ.regRn[13]; 20078: } 20079: //fallthrough 20080: case 0b010_110: //(A6) 20081: if (XEiJ.EFA_SEPARATE_AR) { 20082: XEiJ.mpuCycleCount += 8; 20083: return XEiJ.regRn[14]; 20084: } 20085: //fallthrough 20086: case 0b010_111: //(A7) 20087: if (XEiJ.EFA_SEPARATE_AR) { 20088: XEiJ.mpuCycleCount += 8; 20089: return XEiJ.regRn[15]; 20090: } else { 20091: XEiJ.mpuCycleCount += 8; 20092: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20093: } 20094: case 0b011_000: //(A0)+ 20095: if (XEiJ.EFA_SEPARATE_AR) { 20096: XEiJ.mpuCycleCount += 8; 20097: return (XEiJ.regRn[ 8] += 4) - 4; 20098: } 20099: //fallthrough 20100: case 0b011_001: //(A1)+ 20101: if (XEiJ.EFA_SEPARATE_AR) { 20102: XEiJ.mpuCycleCount += 8; 20103: return (XEiJ.regRn[ 9] += 4) - 4; 20104: } 20105: //fallthrough 20106: case 0b011_010: //(A2)+ 20107: if (XEiJ.EFA_SEPARATE_AR) { 20108: XEiJ.mpuCycleCount += 8; 20109: return (XEiJ.regRn[10] += 4) - 4; 20110: } 20111: //fallthrough 20112: case 0b011_011: //(A3)+ 20113: if (XEiJ.EFA_SEPARATE_AR) { 20114: XEiJ.mpuCycleCount += 8; 20115: return (XEiJ.regRn[11] += 4) - 4; 20116: } 20117: //fallthrough 20118: case 0b011_100: //(A4)+ 20119: if (XEiJ.EFA_SEPARATE_AR) { 20120: XEiJ.mpuCycleCount += 8; 20121: return (XEiJ.regRn[12] += 4) - 4; 20122: } 20123: //fallthrough 20124: case 0b011_101: //(A5)+ 20125: if (XEiJ.EFA_SEPARATE_AR) { 20126: XEiJ.mpuCycleCount += 8; 20127: return (XEiJ.regRn[13] += 4) - 4; 20128: } 20129: //fallthrough 20130: case 0b011_110: //(A6)+ 20131: if (XEiJ.EFA_SEPARATE_AR) { 20132: XEiJ.mpuCycleCount += 8; 20133: return (XEiJ.regRn[14] += 4) - 4; 20134: } 20135: //fallthrough 20136: case 0b011_111: //(A7)+ 20137: if (XEiJ.EFA_SEPARATE_AR) { 20138: XEiJ.mpuCycleCount += 8; 20139: return (XEiJ.regRn[15] += 4) - 4; 20140: } else { 20141: XEiJ.mpuCycleCount += 8; 20142: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4; 20143: } 20144: case 0b100_000: //-(A0) 20145: if (XEiJ.EFA_SEPARATE_AR) { 20146: XEiJ.mpuCycleCount += 10; 20147: return XEiJ.regRn[ 8] -= 4; 20148: } 20149: //fallthrough 20150: case 0b100_001: //-(A1) 20151: if (XEiJ.EFA_SEPARATE_AR) { 20152: XEiJ.mpuCycleCount += 10; 20153: return XEiJ.regRn[ 9] -= 4; 20154: } 20155: //fallthrough 20156: case 0b100_010: //-(A2) 20157: if (XEiJ.EFA_SEPARATE_AR) { 20158: XEiJ.mpuCycleCount += 10; 20159: return XEiJ.regRn[10] -= 4; 20160: } 20161: //fallthrough 20162: case 0b100_011: //-(A3) 20163: if (XEiJ.EFA_SEPARATE_AR) { 20164: XEiJ.mpuCycleCount += 10; 20165: return XEiJ.regRn[11] -= 4; 20166: } 20167: //fallthrough 20168: case 0b100_100: //-(A4) 20169: if (XEiJ.EFA_SEPARATE_AR) { 20170: XEiJ.mpuCycleCount += 10; 20171: return XEiJ.regRn[12] -= 4; 20172: } 20173: //fallthrough 20174: case 0b100_101: //-(A5) 20175: if (XEiJ.EFA_SEPARATE_AR) { 20176: XEiJ.mpuCycleCount += 10; 20177: return XEiJ.regRn[13] -= 4; 20178: } 20179: //fallthrough 20180: case 0b100_110: //-(A6) 20181: if (XEiJ.EFA_SEPARATE_AR) { 20182: XEiJ.mpuCycleCount += 10; 20183: return XEiJ.regRn[14] -= 4; 20184: } 20185: //fallthrough 20186: case 0b100_111: //-(A7) 20187: if (XEiJ.EFA_SEPARATE_AR) { 20188: XEiJ.mpuCycleCount += 10; 20189: return XEiJ.regRn[15] -= 4; 20190: } else { 20191: XEiJ.mpuCycleCount += 10; 20192: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4; 20193: } 20194: case 0b101_000: //(d16,A0) 20195: case 0b101_001: //(d16,A1) 20196: case 0b101_010: //(d16,A2) 20197: case 0b101_011: //(d16,A3) 20198: case 0b101_100: //(d16,A4) 20199: case 0b101_101: //(d16,A5) 20200: case 0b101_110: //(d16,A6) 20201: case 0b101_111: //(d16,A7) 20202: XEiJ.mpuCycleCount += 12; 20203: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20204: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20205: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20206: } else { 20207: t = XEiJ.regPC; 20208: XEiJ.regPC = t + 2; 20209: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20210: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20211: } 20212: case 0b110_000: //(d8,A0,Rn.wl) 20213: case 0b110_001: //(d8,A1,Rn.wl) 20214: case 0b110_010: //(d8,A2,Rn.wl) 20215: case 0b110_011: //(d8,A3,Rn.wl) 20216: case 0b110_100: //(d8,A4,Rn.wl) 20217: case 0b110_101: //(d8,A5,Rn.wl) 20218: case 0b110_110: //(d8,A6,Rn.wl) 20219: case 0b110_111: //(d8,A7,Rn.wl) 20220: XEiJ.mpuCycleCount += 14; 20221: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20222: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20223: } else { 20224: w = XEiJ.regPC; 20225: XEiJ.regPC = w + 2; 20226: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20227: } 20228: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20229: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20230: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20231: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20232: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20233: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20234: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20235: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20236: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20237: XEiJ.regRn[w >> 12]) //ロングインデックス 20238: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20239: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20240: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20241: XEiJ.busRls (t) + x) //ポストインデックス 20242: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20243: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20244: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20245: case 0b111_000: //(xxx).W 20246: XEiJ.mpuCycleCount += 12; 20247: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20248: case 0b111_001: //(xxx).L 20249: XEiJ.mpuCycleCount += 16; 20250: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20251: case 0b111_010: //(d16,PC) 20252: XEiJ.mpuCycleCount += 12; 20253: t = XEiJ.regPC; 20254: XEiJ.regPC = t + 2; 20255: return (t //ベースレジスタ 20256: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20257: case 0b111_011: //(d8,PC,Rn.wl) 20258: XEiJ.mpuCycleCount += 14; 20259: t = XEiJ.regPC; 20260: XEiJ.regPC = t + 2; 20261: w = XEiJ.busRwze (t); //pcwz。拡張ワード 20262: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20263: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20264: t) //ベースレジスタ 20265: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20266: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20267: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20268: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20269: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20270: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20271: XEiJ.regRn[w >> 12]) //ロングインデックス 20272: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20273: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20274: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20275: XEiJ.busRls (t) + x) //ポストインデックス 20276: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20277: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20278: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20279: case 0b111_100: //#<data> 20280: XEiJ.mpuCycleCount += 8; 20281: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20282: return (XEiJ.regPC += 4) - 4; 20283: } else { 20284: t = XEiJ.regPC; 20285: XEiJ.regPC = t + 4; 20286: return t; 20287: } 20288: } //switch 20289: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20290: throw M68kException.m6eSignal; 20291: } //efaAnyLong 20292: 20293: //a = efaMemLong (ea) //| M+-WXZP | 20294: // メモリモードのロングオペランドの実効アドレスを求める 20295: // efaAnyLongとの違いは#<data>がないこと 20296: @SuppressWarnings ("fallthrough") public static int efaMemLong (int ea) throws M68kException { 20297: int t, w, x; 20298: switch (ea) { 20299: case 0b010_000: //(A0) 20300: if (XEiJ.EFA_SEPARATE_AR) { 20301: XEiJ.mpuCycleCount += 8; 20302: return XEiJ.regRn[ 8]; 20303: } 20304: //fallthrough 20305: case 0b010_001: //(A1) 20306: if (XEiJ.EFA_SEPARATE_AR) { 20307: XEiJ.mpuCycleCount += 8; 20308: return XEiJ.regRn[ 9]; 20309: } 20310: //fallthrough 20311: case 0b010_010: //(A2) 20312: if (XEiJ.EFA_SEPARATE_AR) { 20313: XEiJ.mpuCycleCount += 8; 20314: return XEiJ.regRn[10]; 20315: } 20316: //fallthrough 20317: case 0b010_011: //(A3) 20318: if (XEiJ.EFA_SEPARATE_AR) { 20319: XEiJ.mpuCycleCount += 8; 20320: return XEiJ.regRn[11]; 20321: } 20322: //fallthrough 20323: case 0b010_100: //(A4) 20324: if (XEiJ.EFA_SEPARATE_AR) { 20325: XEiJ.mpuCycleCount += 8; 20326: return XEiJ.regRn[12]; 20327: } 20328: //fallthrough 20329: case 0b010_101: //(A5) 20330: if (XEiJ.EFA_SEPARATE_AR) { 20331: XEiJ.mpuCycleCount += 8; 20332: return XEiJ.regRn[13]; 20333: } 20334: //fallthrough 20335: case 0b010_110: //(A6) 20336: if (XEiJ.EFA_SEPARATE_AR) { 20337: XEiJ.mpuCycleCount += 8; 20338: return XEiJ.regRn[14]; 20339: } 20340: //fallthrough 20341: case 0b010_111: //(A7) 20342: if (XEiJ.EFA_SEPARATE_AR) { 20343: XEiJ.mpuCycleCount += 8; 20344: return XEiJ.regRn[15]; 20345: } else { 20346: XEiJ.mpuCycleCount += 8; 20347: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20348: } 20349: case 0b011_000: //(A0)+ 20350: if (XEiJ.EFA_SEPARATE_AR) { 20351: XEiJ.mpuCycleCount += 8; 20352: return (XEiJ.regRn[ 8] += 4) - 4; 20353: } 20354: //fallthrough 20355: case 0b011_001: //(A1)+ 20356: if (XEiJ.EFA_SEPARATE_AR) { 20357: XEiJ.mpuCycleCount += 8; 20358: return (XEiJ.regRn[ 9] += 4) - 4; 20359: } 20360: //fallthrough 20361: case 0b011_010: //(A2)+ 20362: if (XEiJ.EFA_SEPARATE_AR) { 20363: XEiJ.mpuCycleCount += 8; 20364: return (XEiJ.regRn[10] += 4) - 4; 20365: } 20366: //fallthrough 20367: case 0b011_011: //(A3)+ 20368: if (XEiJ.EFA_SEPARATE_AR) { 20369: XEiJ.mpuCycleCount += 8; 20370: return (XEiJ.regRn[11] += 4) - 4; 20371: } 20372: //fallthrough 20373: case 0b011_100: //(A4)+ 20374: if (XEiJ.EFA_SEPARATE_AR) { 20375: XEiJ.mpuCycleCount += 8; 20376: return (XEiJ.regRn[12] += 4) - 4; 20377: } 20378: //fallthrough 20379: case 0b011_101: //(A5)+ 20380: if (XEiJ.EFA_SEPARATE_AR) { 20381: XEiJ.mpuCycleCount += 8; 20382: return (XEiJ.regRn[13] += 4) - 4; 20383: } 20384: //fallthrough 20385: case 0b011_110: //(A6)+ 20386: if (XEiJ.EFA_SEPARATE_AR) { 20387: XEiJ.mpuCycleCount += 8; 20388: return (XEiJ.regRn[14] += 4) - 4; 20389: } 20390: //fallthrough 20391: case 0b011_111: //(A7)+ 20392: if (XEiJ.EFA_SEPARATE_AR) { 20393: XEiJ.mpuCycleCount += 8; 20394: return (XEiJ.regRn[15] += 4) - 4; 20395: } else { 20396: XEiJ.mpuCycleCount += 8; 20397: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4; 20398: } 20399: case 0b100_000: //-(A0) 20400: if (XEiJ.EFA_SEPARATE_AR) { 20401: XEiJ.mpuCycleCount += 10; 20402: return XEiJ.regRn[ 8] -= 4; 20403: } 20404: //fallthrough 20405: case 0b100_001: //-(A1) 20406: if (XEiJ.EFA_SEPARATE_AR) { 20407: XEiJ.mpuCycleCount += 10; 20408: return XEiJ.regRn[ 9] -= 4; 20409: } 20410: //fallthrough 20411: case 0b100_010: //-(A2) 20412: if (XEiJ.EFA_SEPARATE_AR) { 20413: XEiJ.mpuCycleCount += 10; 20414: return XEiJ.regRn[10] -= 4; 20415: } 20416: //fallthrough 20417: case 0b100_011: //-(A3) 20418: if (XEiJ.EFA_SEPARATE_AR) { 20419: XEiJ.mpuCycleCount += 10; 20420: return XEiJ.regRn[11] -= 4; 20421: } 20422: //fallthrough 20423: case 0b100_100: //-(A4) 20424: if (XEiJ.EFA_SEPARATE_AR) { 20425: XEiJ.mpuCycleCount += 10; 20426: return XEiJ.regRn[12] -= 4; 20427: } 20428: //fallthrough 20429: case 0b100_101: //-(A5) 20430: if (XEiJ.EFA_SEPARATE_AR) { 20431: XEiJ.mpuCycleCount += 10; 20432: return XEiJ.regRn[13] -= 4; 20433: } 20434: //fallthrough 20435: case 0b100_110: //-(A6) 20436: if (XEiJ.EFA_SEPARATE_AR) { 20437: XEiJ.mpuCycleCount += 10; 20438: return XEiJ.regRn[14] -= 4; 20439: } 20440: //fallthrough 20441: case 0b100_111: //-(A7) 20442: if (XEiJ.EFA_SEPARATE_AR) { 20443: XEiJ.mpuCycleCount += 10; 20444: return XEiJ.regRn[15] -= 4; 20445: } else { 20446: XEiJ.mpuCycleCount += 10; 20447: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4; 20448: } 20449: case 0b101_000: //(d16,A0) 20450: case 0b101_001: //(d16,A1) 20451: case 0b101_010: //(d16,A2) 20452: case 0b101_011: //(d16,A3) 20453: case 0b101_100: //(d16,A4) 20454: case 0b101_101: //(d16,A5) 20455: case 0b101_110: //(d16,A6) 20456: case 0b101_111: //(d16,A7) 20457: XEiJ.mpuCycleCount += 12; 20458: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20459: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20460: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20461: } else { 20462: t = XEiJ.regPC; 20463: XEiJ.regPC = t + 2; 20464: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20465: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20466: } 20467: case 0b110_000: //(d8,A0,Rn.wl) 20468: case 0b110_001: //(d8,A1,Rn.wl) 20469: case 0b110_010: //(d8,A2,Rn.wl) 20470: case 0b110_011: //(d8,A3,Rn.wl) 20471: case 0b110_100: //(d8,A4,Rn.wl) 20472: case 0b110_101: //(d8,A5,Rn.wl) 20473: case 0b110_110: //(d8,A6,Rn.wl) 20474: case 0b110_111: //(d8,A7,Rn.wl) 20475: XEiJ.mpuCycleCount += 14; 20476: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20477: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20478: } else { 20479: w = XEiJ.regPC; 20480: XEiJ.regPC = w + 2; 20481: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20482: } 20483: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20484: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20485: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20486: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20487: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20488: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20489: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20490: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20491: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20492: XEiJ.regRn[w >> 12]) //ロングインデックス 20493: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20494: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20495: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20496: XEiJ.busRls (t) + x) //ポストインデックス 20497: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20498: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20499: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20500: case 0b111_000: //(xxx).W 20501: XEiJ.mpuCycleCount += 12; 20502: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20503: case 0b111_001: //(xxx).L 20504: XEiJ.mpuCycleCount += 16; 20505: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20506: case 0b111_010: //(d16,PC) 20507: XEiJ.mpuCycleCount += 12; 20508: t = XEiJ.regPC; 20509: XEiJ.regPC = t + 2; 20510: return (t //ベースレジスタ 20511: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20512: case 0b111_011: //(d8,PC,Rn.wl) 20513: XEiJ.mpuCycleCount += 14; 20514: t = XEiJ.regPC; 20515: XEiJ.regPC = t + 2; 20516: w = XEiJ.busRwze (t); //pcwz。拡張ワード 20517: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20518: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20519: t) //ベースレジスタ 20520: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20521: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20522: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20523: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20524: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20525: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20526: XEiJ.regRn[w >> 12]) //ロングインデックス 20527: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20528: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20529: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20530: XEiJ.busRls (t) + x) //ポストインデックス 20531: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20532: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20533: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20534: } //switch 20535: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20536: throw M68kException.m6eSignal; 20537: } //efaMemLong 20538: 20539: //a = efaMltLong (ea) //| M+-WXZ | 20540: // メモリ可変モードのロングオペランドの実効アドレスを求める 20541: // efaMemLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 20542: @SuppressWarnings ("fallthrough") public static int efaMltLong (int ea) throws M68kException { 20543: int t, w, x; 20544: switch (ea) { 20545: case 0b010_000: //(A0) 20546: if (XEiJ.EFA_SEPARATE_AR) { 20547: XEiJ.mpuCycleCount += 8; 20548: return XEiJ.regRn[ 8]; 20549: } 20550: //fallthrough 20551: case 0b010_001: //(A1) 20552: if (XEiJ.EFA_SEPARATE_AR) { 20553: XEiJ.mpuCycleCount += 8; 20554: return XEiJ.regRn[ 9]; 20555: } 20556: //fallthrough 20557: case 0b010_010: //(A2) 20558: if (XEiJ.EFA_SEPARATE_AR) { 20559: XEiJ.mpuCycleCount += 8; 20560: return XEiJ.regRn[10]; 20561: } 20562: //fallthrough 20563: case 0b010_011: //(A3) 20564: if (XEiJ.EFA_SEPARATE_AR) { 20565: XEiJ.mpuCycleCount += 8; 20566: return XEiJ.regRn[11]; 20567: } 20568: //fallthrough 20569: case 0b010_100: //(A4) 20570: if (XEiJ.EFA_SEPARATE_AR) { 20571: XEiJ.mpuCycleCount += 8; 20572: return XEiJ.regRn[12]; 20573: } 20574: //fallthrough 20575: case 0b010_101: //(A5) 20576: if (XEiJ.EFA_SEPARATE_AR) { 20577: XEiJ.mpuCycleCount += 8; 20578: return XEiJ.regRn[13]; 20579: } 20580: //fallthrough 20581: case 0b010_110: //(A6) 20582: if (XEiJ.EFA_SEPARATE_AR) { 20583: XEiJ.mpuCycleCount += 8; 20584: return XEiJ.regRn[14]; 20585: } 20586: //fallthrough 20587: case 0b010_111: //(A7) 20588: if (XEiJ.EFA_SEPARATE_AR) { 20589: XEiJ.mpuCycleCount += 8; 20590: return XEiJ.regRn[15]; 20591: } else { 20592: XEiJ.mpuCycleCount += 8; 20593: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20594: } 20595: case 0b011_000: //(A0)+ 20596: if (XEiJ.EFA_SEPARATE_AR) { 20597: XEiJ.mpuCycleCount += 8; 20598: return (XEiJ.regRn[ 8] += 4) - 4; 20599: } 20600: //fallthrough 20601: case 0b011_001: //(A1)+ 20602: if (XEiJ.EFA_SEPARATE_AR) { 20603: XEiJ.mpuCycleCount += 8; 20604: return (XEiJ.regRn[ 9] += 4) - 4; 20605: } 20606: //fallthrough 20607: case 0b011_010: //(A2)+ 20608: if (XEiJ.EFA_SEPARATE_AR) { 20609: XEiJ.mpuCycleCount += 8; 20610: return (XEiJ.regRn[10] += 4) - 4; 20611: } 20612: //fallthrough 20613: case 0b011_011: //(A3)+ 20614: if (XEiJ.EFA_SEPARATE_AR) { 20615: XEiJ.mpuCycleCount += 8; 20616: return (XEiJ.regRn[11] += 4) - 4; 20617: } 20618: //fallthrough 20619: case 0b011_100: //(A4)+ 20620: if (XEiJ.EFA_SEPARATE_AR) { 20621: XEiJ.mpuCycleCount += 8; 20622: return (XEiJ.regRn[12] += 4) - 4; 20623: } 20624: //fallthrough 20625: case 0b011_101: //(A5)+ 20626: if (XEiJ.EFA_SEPARATE_AR) { 20627: XEiJ.mpuCycleCount += 8; 20628: return (XEiJ.regRn[13] += 4) - 4; 20629: } 20630: //fallthrough 20631: case 0b011_110: //(A6)+ 20632: if (XEiJ.EFA_SEPARATE_AR) { 20633: XEiJ.mpuCycleCount += 8; 20634: return (XEiJ.regRn[14] += 4) - 4; 20635: } 20636: //fallthrough 20637: case 0b011_111: //(A7)+ 20638: if (XEiJ.EFA_SEPARATE_AR) { 20639: XEiJ.mpuCycleCount += 8; 20640: return (XEiJ.regRn[15] += 4) - 4; 20641: } else { 20642: XEiJ.mpuCycleCount += 8; 20643: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4; 20644: } 20645: case 0b100_000: //-(A0) 20646: if (XEiJ.EFA_SEPARATE_AR) { 20647: XEiJ.mpuCycleCount += 10; 20648: return XEiJ.regRn[ 8] -= 4; 20649: } 20650: //fallthrough 20651: case 0b100_001: //-(A1) 20652: if (XEiJ.EFA_SEPARATE_AR) { 20653: XEiJ.mpuCycleCount += 10; 20654: return XEiJ.regRn[ 9] -= 4; 20655: } 20656: //fallthrough 20657: case 0b100_010: //-(A2) 20658: if (XEiJ.EFA_SEPARATE_AR) { 20659: XEiJ.mpuCycleCount += 10; 20660: return XEiJ.regRn[10] -= 4; 20661: } 20662: //fallthrough 20663: case 0b100_011: //-(A3) 20664: if (XEiJ.EFA_SEPARATE_AR) { 20665: XEiJ.mpuCycleCount += 10; 20666: return XEiJ.regRn[11] -= 4; 20667: } 20668: //fallthrough 20669: case 0b100_100: //-(A4) 20670: if (XEiJ.EFA_SEPARATE_AR) { 20671: XEiJ.mpuCycleCount += 10; 20672: return XEiJ.regRn[12] -= 4; 20673: } 20674: //fallthrough 20675: case 0b100_101: //-(A5) 20676: if (XEiJ.EFA_SEPARATE_AR) { 20677: XEiJ.mpuCycleCount += 10; 20678: return XEiJ.regRn[13] -= 4; 20679: } 20680: //fallthrough 20681: case 0b100_110: //-(A6) 20682: if (XEiJ.EFA_SEPARATE_AR) { 20683: XEiJ.mpuCycleCount += 10; 20684: return XEiJ.regRn[14] -= 4; 20685: } 20686: //fallthrough 20687: case 0b100_111: //-(A7) 20688: if (XEiJ.EFA_SEPARATE_AR) { 20689: XEiJ.mpuCycleCount += 10; 20690: return XEiJ.regRn[15] -= 4; 20691: } else { 20692: XEiJ.mpuCycleCount += 10; 20693: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4; 20694: } 20695: case 0b101_000: //(d16,A0) 20696: case 0b101_001: //(d16,A1) 20697: case 0b101_010: //(d16,A2) 20698: case 0b101_011: //(d16,A3) 20699: case 0b101_100: //(d16,A4) 20700: case 0b101_101: //(d16,A5) 20701: case 0b101_110: //(d16,A6) 20702: case 0b101_111: //(d16,A7) 20703: XEiJ.mpuCycleCount += 12; 20704: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20705: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20706: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20707: } else { 20708: t = XEiJ.regPC; 20709: XEiJ.regPC = t + 2; 20710: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20711: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20712: } 20713: case 0b110_000: //(d8,A0,Rn.wl) 20714: case 0b110_001: //(d8,A1,Rn.wl) 20715: case 0b110_010: //(d8,A2,Rn.wl) 20716: case 0b110_011: //(d8,A3,Rn.wl) 20717: case 0b110_100: //(d8,A4,Rn.wl) 20718: case 0b110_101: //(d8,A5,Rn.wl) 20719: case 0b110_110: //(d8,A6,Rn.wl) 20720: case 0b110_111: //(d8,A7,Rn.wl) 20721: XEiJ.mpuCycleCount += 14; 20722: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20723: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20724: } else { 20725: w = XEiJ.regPC; 20726: XEiJ.regPC = w + 2; 20727: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20728: } 20729: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20730: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20731: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20732: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20733: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20734: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20735: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20736: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20737: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20738: XEiJ.regRn[w >> 12]) //ロングインデックス 20739: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20740: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20741: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20742: XEiJ.busRls (t) + x) //ポストインデックス 20743: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20744: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20745: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20746: case 0b111_000: //(xxx).W 20747: XEiJ.mpuCycleCount += 12; 20748: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20749: case 0b111_001: //(xxx).L 20750: XEiJ.mpuCycleCount += 16; 20751: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20752: } //switch 20753: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20754: throw M68kException.m6eSignal; 20755: } //efaMltLong 20756: 20757: //a = efaCntLong (ea) //| M WXZP | 20758: // 制御モードのロングオペランドの実効アドレスを求める 20759: // efaMemLongとの違いは(Ar)+と-(Ar)がないこと 20760: // efaCntWordとの違いはサイクル数のみ 20761: @SuppressWarnings ("fallthrough") public static int efaCntLong (int ea) throws M68kException { 20762: int t, w, x; 20763: switch (ea) { 20764: case 0b010_000: //(A0) 20765: if (XEiJ.EFA_SEPARATE_AR) { 20766: XEiJ.mpuCycleCount += 8; 20767: return XEiJ.regRn[ 8]; 20768: } 20769: //fallthrough 20770: case 0b010_001: //(A1) 20771: if (XEiJ.EFA_SEPARATE_AR) { 20772: XEiJ.mpuCycleCount += 8; 20773: return XEiJ.regRn[ 9]; 20774: } 20775: //fallthrough 20776: case 0b010_010: //(A2) 20777: if (XEiJ.EFA_SEPARATE_AR) { 20778: XEiJ.mpuCycleCount += 8; 20779: return XEiJ.regRn[10]; 20780: } 20781: //fallthrough 20782: case 0b010_011: //(A3) 20783: if (XEiJ.EFA_SEPARATE_AR) { 20784: XEiJ.mpuCycleCount += 8; 20785: return XEiJ.regRn[11]; 20786: } 20787: //fallthrough 20788: case 0b010_100: //(A4) 20789: if (XEiJ.EFA_SEPARATE_AR) { 20790: XEiJ.mpuCycleCount += 8; 20791: return XEiJ.regRn[12]; 20792: } 20793: //fallthrough 20794: case 0b010_101: //(A5) 20795: if (XEiJ.EFA_SEPARATE_AR) { 20796: XEiJ.mpuCycleCount += 8; 20797: return XEiJ.regRn[13]; 20798: } 20799: //fallthrough 20800: case 0b010_110: //(A6) 20801: if (XEiJ.EFA_SEPARATE_AR) { 20802: XEiJ.mpuCycleCount += 8; 20803: return XEiJ.regRn[14]; 20804: } 20805: //fallthrough 20806: case 0b010_111: //(A7) 20807: if (XEiJ.EFA_SEPARATE_AR) { 20808: XEiJ.mpuCycleCount += 8; 20809: return XEiJ.regRn[15]; 20810: } else { 20811: XEiJ.mpuCycleCount += 8; 20812: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20813: } 20814: case 0b101_000: //(d16,A0) 20815: case 0b101_001: //(d16,A1) 20816: case 0b101_010: //(d16,A2) 20817: case 0b101_011: //(d16,A3) 20818: case 0b101_100: //(d16,A4) 20819: case 0b101_101: //(d16,A5) 20820: case 0b101_110: //(d16,A6) 20821: case 0b101_111: //(d16,A7) 20822: XEiJ.mpuCycleCount += 12; 20823: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20824: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20825: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20826: } else { 20827: t = XEiJ.regPC; 20828: XEiJ.regPC = t + 2; 20829: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20830: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20831: } 20832: case 0b110_000: //(d8,A0,Rn.wl) 20833: case 0b110_001: //(d8,A1,Rn.wl) 20834: case 0b110_010: //(d8,A2,Rn.wl) 20835: case 0b110_011: //(d8,A3,Rn.wl) 20836: case 0b110_100: //(d8,A4,Rn.wl) 20837: case 0b110_101: //(d8,A5,Rn.wl) 20838: case 0b110_110: //(d8,A6,Rn.wl) 20839: case 0b110_111: //(d8,A7,Rn.wl) 20840: XEiJ.mpuCycleCount += 14; 20841: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20842: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20843: } else { 20844: w = XEiJ.regPC; 20845: XEiJ.regPC = w + 2; 20846: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20847: } 20848: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20849: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20850: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20851: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20852: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20853: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20854: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20855: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20856: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20857: XEiJ.regRn[w >> 12]) //ロングインデックス 20858: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20859: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20860: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20861: XEiJ.busRls (t) + x) //ポストインデックス 20862: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20863: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20864: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20865: case 0b111_000: //(xxx).W 20866: XEiJ.mpuCycleCount += 12; 20867: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20868: case 0b111_001: //(xxx).L 20869: XEiJ.mpuCycleCount += 16; 20870: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20871: case 0b111_010: //(d16,PC) 20872: XEiJ.mpuCycleCount += 12; 20873: t = XEiJ.regPC; 20874: XEiJ.regPC = t + 2; 20875: return (t //ベースレジスタ 20876: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20877: case 0b111_011: //(d8,PC,Rn.wl) 20878: XEiJ.mpuCycleCount += 14; 20879: t = XEiJ.regPC; 20880: XEiJ.regPC = t + 2; 20881: w = XEiJ.busRwze (t); //pcwz。拡張ワード 20882: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20883: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20884: t) //ベースレジスタ 20885: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20886: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20887: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20888: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20889: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20890: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20891: XEiJ.regRn[w >> 12]) //ロングインデックス 20892: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20893: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20894: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20895: XEiJ.busRls (t) + x) //ポストインデックス 20896: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20897: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20898: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20899: } //switch 20900: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20901: throw M68kException.m6eSignal; 20902: } //efaCntLong 20903: 20904: //a = efaCltLong (ea) //| M WXZ | 20905: // 制御可変モードのワードオペランドの実効アドレスを求める 20906: // efaCntLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 20907: // efaCltWordとの違いはサイクル数のみ 20908: @SuppressWarnings ("fallthrough") public static int efaCltLong (int ea) throws M68kException { 20909: int t, w, x; 20910: switch (ea) { 20911: case 0b010_000: //(A0) 20912: if (XEiJ.EFA_SEPARATE_AR) { 20913: XEiJ.mpuCycleCount += 8; 20914: return XEiJ.regRn[ 8]; 20915: } 20916: //fallthrough 20917: case 0b010_001: //(A1) 20918: if (XEiJ.EFA_SEPARATE_AR) { 20919: XEiJ.mpuCycleCount += 8; 20920: return XEiJ.regRn[ 9]; 20921: } 20922: //fallthrough 20923: case 0b010_010: //(A2) 20924: if (XEiJ.EFA_SEPARATE_AR) { 20925: XEiJ.mpuCycleCount += 8; 20926: return XEiJ.regRn[10]; 20927: } 20928: //fallthrough 20929: case 0b010_011: //(A3) 20930: if (XEiJ.EFA_SEPARATE_AR) { 20931: XEiJ.mpuCycleCount += 8; 20932: return XEiJ.regRn[11]; 20933: } 20934: //fallthrough 20935: case 0b010_100: //(A4) 20936: if (XEiJ.EFA_SEPARATE_AR) { 20937: XEiJ.mpuCycleCount += 8; 20938: return XEiJ.regRn[12]; 20939: } 20940: //fallthrough 20941: case 0b010_101: //(A5) 20942: if (XEiJ.EFA_SEPARATE_AR) { 20943: XEiJ.mpuCycleCount += 8; 20944: return XEiJ.regRn[13]; 20945: } 20946: //fallthrough 20947: case 0b010_110: //(A6) 20948: if (XEiJ.EFA_SEPARATE_AR) { 20949: XEiJ.mpuCycleCount += 8; 20950: return XEiJ.regRn[14]; 20951: } 20952: //fallthrough 20953: case 0b010_111: //(A7) 20954: if (XEiJ.EFA_SEPARATE_AR) { 20955: XEiJ.mpuCycleCount += 8; 20956: return XEiJ.regRn[15]; 20957: } else { 20958: XEiJ.mpuCycleCount += 8; 20959: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20960: } 20961: case 0b101_000: //(d16,A0) 20962: case 0b101_001: //(d16,A1) 20963: case 0b101_010: //(d16,A2) 20964: case 0b101_011: //(d16,A3) 20965: case 0b101_100: //(d16,A4) 20966: case 0b101_101: //(d16,A5) 20967: case 0b101_110: //(d16,A6) 20968: case 0b101_111: //(d16,A7) 20969: XEiJ.mpuCycleCount += 12; 20970: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20971: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20972: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20973: } else { 20974: t = XEiJ.regPC; 20975: XEiJ.regPC = t + 2; 20976: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20977: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20978: } 20979: case 0b110_000: //(d8,A0,Rn.wl) 20980: case 0b110_001: //(d8,A1,Rn.wl) 20981: case 0b110_010: //(d8,A2,Rn.wl) 20982: case 0b110_011: //(d8,A3,Rn.wl) 20983: case 0b110_100: //(d8,A4,Rn.wl) 20984: case 0b110_101: //(d8,A5,Rn.wl) 20985: case 0b110_110: //(d8,A6,Rn.wl) 20986: case 0b110_111: //(d8,A7,Rn.wl) 20987: XEiJ.mpuCycleCount += 14; 20988: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20989: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20990: } else { 20991: w = XEiJ.regPC; 20992: XEiJ.regPC = w + 2; 20993: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20994: } 20995: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20996: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20997: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20998: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20999: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21000: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21001: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21002: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21003: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21004: XEiJ.regRn[w >> 12]) //ロングインデックス 21005: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21006: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21007: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21008: XEiJ.busRls (t) + x) //ポストインデックス 21009: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21010: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21011: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21012: case 0b111_000: //(xxx).W 21013: XEiJ.mpuCycleCount += 12; 21014: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21015: case 0b111_001: //(xxx).L 21016: XEiJ.mpuCycleCount += 16; 21017: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21018: } //switch 21019: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21020: throw M68kException.m6eSignal; 21021: } //efaCltLong 21022: 21023: //a = efaAnyQuad (ea) //| M+-WXZPI| 21024: // 任意のモードのクワッドオペランドの実効アドレスを求める 21025: // efaAnyLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、 21026: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 21027: @SuppressWarnings ("fallthrough") public static int efaAnyQuad (int ea) throws M68kException { 21028: int t, w, x; 21029: switch (ea) { 21030: case 0b010_000: //(A0) 21031: if (XEiJ.EFA_SEPARATE_AR) { 21032: XEiJ.mpuCycleCount += 16; 21033: return XEiJ.regRn[ 8]; 21034: } 21035: //fallthrough 21036: case 0b010_001: //(A1) 21037: if (XEiJ.EFA_SEPARATE_AR) { 21038: XEiJ.mpuCycleCount += 16; 21039: return XEiJ.regRn[ 9]; 21040: } 21041: //fallthrough 21042: case 0b010_010: //(A2) 21043: if (XEiJ.EFA_SEPARATE_AR) { 21044: XEiJ.mpuCycleCount += 16; 21045: return XEiJ.regRn[10]; 21046: } 21047: //fallthrough 21048: case 0b010_011: //(A3) 21049: if (XEiJ.EFA_SEPARATE_AR) { 21050: XEiJ.mpuCycleCount += 16; 21051: return XEiJ.regRn[11]; 21052: } 21053: //fallthrough 21054: case 0b010_100: //(A4) 21055: if (XEiJ.EFA_SEPARATE_AR) { 21056: XEiJ.mpuCycleCount += 16; 21057: return XEiJ.regRn[12]; 21058: } 21059: //fallthrough 21060: case 0b010_101: //(A5) 21061: if (XEiJ.EFA_SEPARATE_AR) { 21062: XEiJ.mpuCycleCount += 16; 21063: return XEiJ.regRn[13]; 21064: } 21065: //fallthrough 21066: case 0b010_110: //(A6) 21067: if (XEiJ.EFA_SEPARATE_AR) { 21068: XEiJ.mpuCycleCount += 16; 21069: return XEiJ.regRn[14]; 21070: } 21071: //fallthrough 21072: case 0b010_111: //(A7) 21073: if (XEiJ.EFA_SEPARATE_AR) { 21074: XEiJ.mpuCycleCount += 16; 21075: return XEiJ.regRn[15]; 21076: } else { 21077: XEiJ.mpuCycleCount += 16; 21078: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21079: } 21080: case 0b011_000: //(A0)+ 21081: if (XEiJ.EFA_SEPARATE_AR) { 21082: XEiJ.mpuCycleCount += 16; 21083: return (XEiJ.regRn[ 8] += 8) - 8; 21084: } 21085: //fallthrough 21086: case 0b011_001: //(A1)+ 21087: if (XEiJ.EFA_SEPARATE_AR) { 21088: XEiJ.mpuCycleCount += 16; 21089: return (XEiJ.regRn[ 9] += 8) - 8; 21090: } 21091: //fallthrough 21092: case 0b011_010: //(A2)+ 21093: if (XEiJ.EFA_SEPARATE_AR) { 21094: XEiJ.mpuCycleCount += 16; 21095: return (XEiJ.regRn[10] += 8) - 8; 21096: } 21097: //fallthrough 21098: case 0b011_011: //(A3)+ 21099: if (XEiJ.EFA_SEPARATE_AR) { 21100: XEiJ.mpuCycleCount += 16; 21101: return (XEiJ.regRn[11] += 8) - 8; 21102: } 21103: //fallthrough 21104: case 0b011_100: //(A4)+ 21105: if (XEiJ.EFA_SEPARATE_AR) { 21106: XEiJ.mpuCycleCount += 16; 21107: return (XEiJ.regRn[12] += 8) - 8; 21108: } 21109: //fallthrough 21110: case 0b011_101: //(A5)+ 21111: if (XEiJ.EFA_SEPARATE_AR) { 21112: XEiJ.mpuCycleCount += 16; 21113: return (XEiJ.regRn[13] += 8) - 8; 21114: } 21115: //fallthrough 21116: case 0b011_110: //(A6)+ 21117: if (XEiJ.EFA_SEPARATE_AR) { 21118: XEiJ.mpuCycleCount += 16; 21119: return (XEiJ.regRn[14] += 8) - 8; 21120: } 21121: //fallthrough 21122: case 0b011_111: //(A7)+ 21123: if (XEiJ.EFA_SEPARATE_AR) { 21124: XEiJ.mpuCycleCount += 16; 21125: return (XEiJ.regRn[15] += 8) - 8; 21126: } else { 21127: XEiJ.mpuCycleCount += 16; 21128: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8; 21129: } 21130: case 0b100_000: //-(A0) 21131: if (XEiJ.EFA_SEPARATE_AR) { 21132: XEiJ.mpuCycleCount += 18; 21133: return XEiJ.regRn[ 8] -= 8; 21134: } 21135: //fallthrough 21136: case 0b100_001: //-(A1) 21137: if (XEiJ.EFA_SEPARATE_AR) { 21138: XEiJ.mpuCycleCount += 18; 21139: return XEiJ.regRn[ 9] -= 8; 21140: } 21141: //fallthrough 21142: case 0b100_010: //-(A2) 21143: if (XEiJ.EFA_SEPARATE_AR) { 21144: XEiJ.mpuCycleCount += 18; 21145: return XEiJ.regRn[10] -= 8; 21146: } 21147: //fallthrough 21148: case 0b100_011: //-(A3) 21149: if (XEiJ.EFA_SEPARATE_AR) { 21150: XEiJ.mpuCycleCount += 18; 21151: return XEiJ.regRn[11] -= 8; 21152: } 21153: //fallthrough 21154: case 0b100_100: //-(A4) 21155: if (XEiJ.EFA_SEPARATE_AR) { 21156: XEiJ.mpuCycleCount += 18; 21157: return XEiJ.regRn[12] -= 8; 21158: } 21159: //fallthrough 21160: case 0b100_101: //-(A5) 21161: if (XEiJ.EFA_SEPARATE_AR) { 21162: XEiJ.mpuCycleCount += 18; 21163: return XEiJ.regRn[13] -= 8; 21164: } 21165: //fallthrough 21166: case 0b100_110: //-(A6) 21167: if (XEiJ.EFA_SEPARATE_AR) { 21168: XEiJ.mpuCycleCount += 18; 21169: return XEiJ.regRn[14] -= 8; 21170: } 21171: //fallthrough 21172: case 0b100_111: //-(A7) 21173: if (XEiJ.EFA_SEPARATE_AR) { 21174: XEiJ.mpuCycleCount += 18; 21175: return XEiJ.regRn[15] -= 8; 21176: } else { 21177: XEiJ.mpuCycleCount += 18; 21178: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8; 21179: } 21180: case 0b101_000: //(d16,A0) 21181: case 0b101_001: //(d16,A1) 21182: case 0b101_010: //(d16,A2) 21183: case 0b101_011: //(d16,A3) 21184: case 0b101_100: //(d16,A4) 21185: case 0b101_101: //(d16,A5) 21186: case 0b101_110: //(d16,A6) 21187: case 0b101_111: //(d16,A7) 21188: XEiJ.mpuCycleCount += 20; 21189: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21190: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21191: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21192: } else { 21193: t = XEiJ.regPC; 21194: XEiJ.regPC = t + 2; 21195: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21196: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21197: } 21198: case 0b110_000: //(d8,A0,Rn.wl) 21199: case 0b110_001: //(d8,A1,Rn.wl) 21200: case 0b110_010: //(d8,A2,Rn.wl) 21201: case 0b110_011: //(d8,A3,Rn.wl) 21202: case 0b110_100: //(d8,A4,Rn.wl) 21203: case 0b110_101: //(d8,A5,Rn.wl) 21204: case 0b110_110: //(d8,A6,Rn.wl) 21205: case 0b110_111: //(d8,A7,Rn.wl) 21206: XEiJ.mpuCycleCount += 22; 21207: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21208: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21209: } else { 21210: w = XEiJ.regPC; 21211: XEiJ.regPC = w + 2; 21212: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21213: } 21214: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21215: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21216: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21217: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21218: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21219: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21220: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21221: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21222: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21223: XEiJ.regRn[w >> 12]) //ロングインデックス 21224: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21225: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21226: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21227: XEiJ.busRls (t) + x) //ポストインデックス 21228: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21229: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21230: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21231: case 0b111_000: //(xxx).W 21232: XEiJ.mpuCycleCount += 20; 21233: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21234: case 0b111_001: //(xxx).L 21235: XEiJ.mpuCycleCount += 24; 21236: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21237: case 0b111_010: //(d16,PC) 21238: XEiJ.mpuCycleCount += 20; 21239: t = XEiJ.regPC; 21240: XEiJ.regPC = t + 2; 21241: return (t //ベースレジスタ 21242: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21243: case 0b111_011: //(d8,PC,Rn.wl) 21244: XEiJ.mpuCycleCount += 22; 21245: t = XEiJ.regPC; 21246: XEiJ.regPC = t + 2; 21247: w = XEiJ.busRwze (t); //pcwz。拡張ワード 21248: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21249: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21250: t) //ベースレジスタ 21251: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21252: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21253: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21254: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21255: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21256: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21257: XEiJ.regRn[w >> 12]) //ロングインデックス 21258: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21259: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21260: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21261: XEiJ.busRls (t) + x) //ポストインデックス 21262: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21263: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21264: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21265: case 0b111_100: //#<data> 21266: XEiJ.mpuCycleCount += 16; 21267: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21268: return (XEiJ.regPC += 8) - 8; 21269: } else { 21270: t = XEiJ.regPC; 21271: XEiJ.regPC = t + 8; 21272: return t; 21273: } 21274: } //switch 21275: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21276: throw M68kException.m6eSignal; 21277: } //efaAnyQuad 21278: 21279: //a = efaMltQuad (ea) //| M+-WXZ | 21280: // メモリ可変モードのクワッドオペランドの実効アドレスを求める 21281: // efaMltLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、 21282: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 21283: @SuppressWarnings ("fallthrough") public static int efaMltQuad (int ea) throws M68kException { 21284: int t, w, x; 21285: switch (ea) { 21286: case 0b010_000: //(A0) 21287: if (XEiJ.EFA_SEPARATE_AR) { 21288: XEiJ.mpuCycleCount += 16; 21289: return XEiJ.regRn[ 8]; 21290: } 21291: //fallthrough 21292: case 0b010_001: //(A1) 21293: if (XEiJ.EFA_SEPARATE_AR) { 21294: XEiJ.mpuCycleCount += 16; 21295: return XEiJ.regRn[ 9]; 21296: } 21297: //fallthrough 21298: case 0b010_010: //(A2) 21299: if (XEiJ.EFA_SEPARATE_AR) { 21300: XEiJ.mpuCycleCount += 16; 21301: return XEiJ.regRn[10]; 21302: } 21303: //fallthrough 21304: case 0b010_011: //(A3) 21305: if (XEiJ.EFA_SEPARATE_AR) { 21306: XEiJ.mpuCycleCount += 16; 21307: return XEiJ.regRn[11]; 21308: } 21309: //fallthrough 21310: case 0b010_100: //(A4) 21311: if (XEiJ.EFA_SEPARATE_AR) { 21312: XEiJ.mpuCycleCount += 16; 21313: return XEiJ.regRn[12]; 21314: } 21315: //fallthrough 21316: case 0b010_101: //(A5) 21317: if (XEiJ.EFA_SEPARATE_AR) { 21318: XEiJ.mpuCycleCount += 16; 21319: return XEiJ.regRn[13]; 21320: } 21321: //fallthrough 21322: case 0b010_110: //(A6) 21323: if (XEiJ.EFA_SEPARATE_AR) { 21324: XEiJ.mpuCycleCount += 16; 21325: return XEiJ.regRn[14]; 21326: } 21327: //fallthrough 21328: case 0b010_111: //(A7) 21329: if (XEiJ.EFA_SEPARATE_AR) { 21330: XEiJ.mpuCycleCount += 16; 21331: return XEiJ.regRn[15]; 21332: } else { 21333: XEiJ.mpuCycleCount += 16; 21334: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21335: } 21336: case 0b011_000: //(A0)+ 21337: if (XEiJ.EFA_SEPARATE_AR) { 21338: XEiJ.mpuCycleCount += 16; 21339: return (XEiJ.regRn[ 8] += 8) - 8; 21340: } 21341: //fallthrough 21342: case 0b011_001: //(A1)+ 21343: if (XEiJ.EFA_SEPARATE_AR) { 21344: XEiJ.mpuCycleCount += 16; 21345: return (XEiJ.regRn[ 9] += 8) - 8; 21346: } 21347: //fallthrough 21348: case 0b011_010: //(A2)+ 21349: if (XEiJ.EFA_SEPARATE_AR) { 21350: XEiJ.mpuCycleCount += 16; 21351: return (XEiJ.regRn[10] += 8) - 8; 21352: } 21353: //fallthrough 21354: case 0b011_011: //(A3)+ 21355: if (XEiJ.EFA_SEPARATE_AR) { 21356: XEiJ.mpuCycleCount += 16; 21357: return (XEiJ.regRn[11] += 8) - 8; 21358: } 21359: //fallthrough 21360: case 0b011_100: //(A4)+ 21361: if (XEiJ.EFA_SEPARATE_AR) { 21362: XEiJ.mpuCycleCount += 16; 21363: return (XEiJ.regRn[12] += 8) - 8; 21364: } 21365: //fallthrough 21366: case 0b011_101: //(A5)+ 21367: if (XEiJ.EFA_SEPARATE_AR) { 21368: XEiJ.mpuCycleCount += 16; 21369: return (XEiJ.regRn[13] += 8) - 8; 21370: } 21371: //fallthrough 21372: case 0b011_110: //(A6)+ 21373: if (XEiJ.EFA_SEPARATE_AR) { 21374: XEiJ.mpuCycleCount += 16; 21375: return (XEiJ.regRn[14] += 8) - 8; 21376: } 21377: //fallthrough 21378: case 0b011_111: //(A7)+ 21379: if (XEiJ.EFA_SEPARATE_AR) { 21380: XEiJ.mpuCycleCount += 16; 21381: return (XEiJ.regRn[15] += 8) - 8; 21382: } else { 21383: XEiJ.mpuCycleCount += 16; 21384: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8; 21385: } 21386: case 0b100_000: //-(A0) 21387: if (XEiJ.EFA_SEPARATE_AR) { 21388: XEiJ.mpuCycleCount += 18; 21389: return XEiJ.regRn[ 8] -= 8; 21390: } 21391: //fallthrough 21392: case 0b100_001: //-(A1) 21393: if (XEiJ.EFA_SEPARATE_AR) { 21394: XEiJ.mpuCycleCount += 18; 21395: return XEiJ.regRn[ 9] -= 8; 21396: } 21397: //fallthrough 21398: case 0b100_010: //-(A2) 21399: if (XEiJ.EFA_SEPARATE_AR) { 21400: XEiJ.mpuCycleCount += 18; 21401: return XEiJ.regRn[10] -= 8; 21402: } 21403: //fallthrough 21404: case 0b100_011: //-(A3) 21405: if (XEiJ.EFA_SEPARATE_AR) { 21406: XEiJ.mpuCycleCount += 18; 21407: return XEiJ.regRn[11] -= 8; 21408: } 21409: //fallthrough 21410: case 0b100_100: //-(A4) 21411: if (XEiJ.EFA_SEPARATE_AR) { 21412: XEiJ.mpuCycleCount += 18; 21413: return XEiJ.regRn[12] -= 8; 21414: } 21415: //fallthrough 21416: case 0b100_101: //-(A5) 21417: if (XEiJ.EFA_SEPARATE_AR) { 21418: XEiJ.mpuCycleCount += 18; 21419: return XEiJ.regRn[13] -= 8; 21420: } 21421: //fallthrough 21422: case 0b100_110: //-(A6) 21423: if (XEiJ.EFA_SEPARATE_AR) { 21424: XEiJ.mpuCycleCount += 18; 21425: return XEiJ.regRn[14] -= 8; 21426: } 21427: //fallthrough 21428: case 0b100_111: //-(A7) 21429: if (XEiJ.EFA_SEPARATE_AR) { 21430: XEiJ.mpuCycleCount += 18; 21431: return XEiJ.regRn[15] -= 8; 21432: } else { 21433: XEiJ.mpuCycleCount += 18; 21434: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8; 21435: } 21436: case 0b101_000: //(d16,A0) 21437: case 0b101_001: //(d16,A1) 21438: case 0b101_010: //(d16,A2) 21439: case 0b101_011: //(d16,A3) 21440: case 0b101_100: //(d16,A4) 21441: case 0b101_101: //(d16,A5) 21442: case 0b101_110: //(d16,A6) 21443: case 0b101_111: //(d16,A7) 21444: XEiJ.mpuCycleCount += 20; 21445: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21446: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21447: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21448: } else { 21449: t = XEiJ.regPC; 21450: XEiJ.regPC = t + 2; 21451: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21452: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21453: } 21454: case 0b110_000: //(d8,A0,Rn.wl) 21455: case 0b110_001: //(d8,A1,Rn.wl) 21456: case 0b110_010: //(d8,A2,Rn.wl) 21457: case 0b110_011: //(d8,A3,Rn.wl) 21458: case 0b110_100: //(d8,A4,Rn.wl) 21459: case 0b110_101: //(d8,A5,Rn.wl) 21460: case 0b110_110: //(d8,A6,Rn.wl) 21461: case 0b110_111: //(d8,A7,Rn.wl) 21462: XEiJ.mpuCycleCount += 22; 21463: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21464: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21465: } else { 21466: w = XEiJ.regPC; 21467: XEiJ.regPC = w + 2; 21468: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21469: } 21470: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21471: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21472: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21473: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21474: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21475: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21476: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21477: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21478: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21479: XEiJ.regRn[w >> 12]) //ロングインデックス 21480: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21481: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21482: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21483: XEiJ.busRls (t) + x) //ポストインデックス 21484: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21485: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21486: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21487: case 0b111_000: //(xxx).W 21488: XEiJ.mpuCycleCount += 20; 21489: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21490: case 0b111_001: //(xxx).L 21491: XEiJ.mpuCycleCount += 24; 21492: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21493: } //switch 21494: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21495: throw M68kException.m6eSignal; 21496: } //efaMltQuad 21497: 21498: //a = efaAnyExtd (ea) //| M+-WXZPI| 21499: // 任意のモードのエクステンデッドオペランドの実効アドレスを求める 21500: // efaAnyQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、 21501: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 21502: @SuppressWarnings ("fallthrough") public static int efaAnyExtd (int ea) throws M68kException { 21503: int t, w, x; 21504: switch (ea) { 21505: case 0b010_000: //(A0) 21506: if (XEiJ.EFA_SEPARATE_AR) { 21507: XEiJ.mpuCycleCount += 24; 21508: return XEiJ.regRn[ 8]; 21509: } 21510: //fallthrough 21511: case 0b010_001: //(A1) 21512: if (XEiJ.EFA_SEPARATE_AR) { 21513: XEiJ.mpuCycleCount += 24; 21514: return XEiJ.regRn[ 9]; 21515: } 21516: //fallthrough 21517: case 0b010_010: //(A2) 21518: if (XEiJ.EFA_SEPARATE_AR) { 21519: XEiJ.mpuCycleCount += 24; 21520: return XEiJ.regRn[10]; 21521: } 21522: //fallthrough 21523: case 0b010_011: //(A3) 21524: if (XEiJ.EFA_SEPARATE_AR) { 21525: XEiJ.mpuCycleCount += 24; 21526: return XEiJ.regRn[11]; 21527: } 21528: //fallthrough 21529: case 0b010_100: //(A4) 21530: if (XEiJ.EFA_SEPARATE_AR) { 21531: XEiJ.mpuCycleCount += 24; 21532: return XEiJ.regRn[12]; 21533: } 21534: //fallthrough 21535: case 0b010_101: //(A5) 21536: if (XEiJ.EFA_SEPARATE_AR) { 21537: XEiJ.mpuCycleCount += 24; 21538: return XEiJ.regRn[13]; 21539: } 21540: //fallthrough 21541: case 0b010_110: //(A6) 21542: if (XEiJ.EFA_SEPARATE_AR) { 21543: XEiJ.mpuCycleCount += 24; 21544: return XEiJ.regRn[14]; 21545: } 21546: //fallthrough 21547: case 0b010_111: //(A7) 21548: if (XEiJ.EFA_SEPARATE_AR) { 21549: XEiJ.mpuCycleCount += 24; 21550: return XEiJ.regRn[15]; 21551: } else { 21552: XEiJ.mpuCycleCount += 24; 21553: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21554: } 21555: case 0b011_000: //(A0)+ 21556: if (XEiJ.EFA_SEPARATE_AR) { 21557: XEiJ.mpuCycleCount += 24; 21558: return (XEiJ.regRn[ 8] += 12) - 12; 21559: } 21560: //fallthrough 21561: case 0b011_001: //(A1)+ 21562: if (XEiJ.EFA_SEPARATE_AR) { 21563: XEiJ.mpuCycleCount += 24; 21564: return (XEiJ.regRn[ 9] += 12) - 12; 21565: } 21566: //fallthrough 21567: case 0b011_010: //(A2)+ 21568: if (XEiJ.EFA_SEPARATE_AR) { 21569: XEiJ.mpuCycleCount += 24; 21570: return (XEiJ.regRn[10] += 12) - 12; 21571: } 21572: //fallthrough 21573: case 0b011_011: //(A3)+ 21574: if (XEiJ.EFA_SEPARATE_AR) { 21575: XEiJ.mpuCycleCount += 24; 21576: return (XEiJ.regRn[11] += 12) - 12; 21577: } 21578: //fallthrough 21579: case 0b011_100: //(A4)+ 21580: if (XEiJ.EFA_SEPARATE_AR) { 21581: XEiJ.mpuCycleCount += 24; 21582: return (XEiJ.regRn[12] += 12) - 12; 21583: } 21584: //fallthrough 21585: case 0b011_101: //(A5)+ 21586: if (XEiJ.EFA_SEPARATE_AR) { 21587: XEiJ.mpuCycleCount += 24; 21588: return (XEiJ.regRn[13] += 12) - 12; 21589: } 21590: //fallthrough 21591: case 0b011_110: //(A6)+ 21592: if (XEiJ.EFA_SEPARATE_AR) { 21593: XEiJ.mpuCycleCount += 24; 21594: return (XEiJ.regRn[14] += 12) - 12; 21595: } 21596: //fallthrough 21597: case 0b011_111: //(A7)+ 21598: if (XEiJ.EFA_SEPARATE_AR) { 21599: XEiJ.mpuCycleCount += 24; 21600: return (XEiJ.regRn[15] += 12) - 12; 21601: } else { 21602: XEiJ.mpuCycleCount += 24; 21603: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12; 21604: } 21605: case 0b100_000: //-(A0) 21606: if (XEiJ.EFA_SEPARATE_AR) { 21607: XEiJ.mpuCycleCount += 26; 21608: return XEiJ.regRn[ 8] -= 12; 21609: } 21610: //fallthrough 21611: case 0b100_001: //-(A1) 21612: if (XEiJ.EFA_SEPARATE_AR) { 21613: XEiJ.mpuCycleCount += 26; 21614: return XEiJ.regRn[ 9] -= 12; 21615: } 21616: //fallthrough 21617: case 0b100_010: //-(A2) 21618: if (XEiJ.EFA_SEPARATE_AR) { 21619: XEiJ.mpuCycleCount += 26; 21620: return XEiJ.regRn[10] -= 12; 21621: } 21622: //fallthrough 21623: case 0b100_011: //-(A3) 21624: if (XEiJ.EFA_SEPARATE_AR) { 21625: XEiJ.mpuCycleCount += 26; 21626: return XEiJ.regRn[11] -= 12; 21627: } 21628: //fallthrough 21629: case 0b100_100: //-(A4) 21630: if (XEiJ.EFA_SEPARATE_AR) { 21631: XEiJ.mpuCycleCount += 26; 21632: return XEiJ.regRn[12] -= 12; 21633: } 21634: //fallthrough 21635: case 0b100_101: //-(A5) 21636: if (XEiJ.EFA_SEPARATE_AR) { 21637: XEiJ.mpuCycleCount += 26; 21638: return XEiJ.regRn[13] -= 12; 21639: } 21640: //fallthrough 21641: case 0b100_110: //-(A6) 21642: if (XEiJ.EFA_SEPARATE_AR) { 21643: XEiJ.mpuCycleCount += 26; 21644: return XEiJ.regRn[14] -= 12; 21645: } 21646: //fallthrough 21647: case 0b100_111: //-(A7) 21648: if (XEiJ.EFA_SEPARATE_AR) { 21649: XEiJ.mpuCycleCount += 26; 21650: return XEiJ.regRn[15] -= 12; 21651: } else { 21652: XEiJ.mpuCycleCount += 26; 21653: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12; 21654: } 21655: case 0b101_000: //(d16,A0) 21656: case 0b101_001: //(d16,A1) 21657: case 0b101_010: //(d16,A2) 21658: case 0b101_011: //(d16,A3) 21659: case 0b101_100: //(d16,A4) 21660: case 0b101_101: //(d16,A5) 21661: case 0b101_110: //(d16,A6) 21662: case 0b101_111: //(d16,A7) 21663: XEiJ.mpuCycleCount += 28; 21664: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21665: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21666: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21667: } else { 21668: t = XEiJ.regPC; 21669: XEiJ.regPC = t + 2; 21670: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21671: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21672: } 21673: case 0b110_000: //(d8,A0,Rn.wl) 21674: case 0b110_001: //(d8,A1,Rn.wl) 21675: case 0b110_010: //(d8,A2,Rn.wl) 21676: case 0b110_011: //(d8,A3,Rn.wl) 21677: case 0b110_100: //(d8,A4,Rn.wl) 21678: case 0b110_101: //(d8,A5,Rn.wl) 21679: case 0b110_110: //(d8,A6,Rn.wl) 21680: case 0b110_111: //(d8,A7,Rn.wl) 21681: XEiJ.mpuCycleCount += 30; 21682: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21683: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21684: } else { 21685: w = XEiJ.regPC; 21686: XEiJ.regPC = w + 2; 21687: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21688: } 21689: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21690: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21691: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21692: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21693: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21694: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21695: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21696: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21697: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21698: XEiJ.regRn[w >> 12]) //ロングインデックス 21699: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21700: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21701: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21702: XEiJ.busRls (t) + x) //ポストインデックス 21703: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21704: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21705: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21706: case 0b111_000: //(xxx).W 21707: XEiJ.mpuCycleCount += 28; 21708: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21709: case 0b111_001: //(xxx).L 21710: XEiJ.mpuCycleCount += 32; 21711: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21712: case 0b111_010: //(d16,PC) 21713: XEiJ.mpuCycleCount += 28; 21714: t = XEiJ.regPC; 21715: XEiJ.regPC = t + 2; 21716: return (t //ベースレジスタ 21717: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21718: case 0b111_011: //(d8,PC,Rn.wl) 21719: XEiJ.mpuCycleCount += 30; 21720: t = XEiJ.regPC; 21721: XEiJ.regPC = t + 2; 21722: w = XEiJ.busRwze (t); //pcwz。拡張ワード 21723: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21724: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21725: t) //ベースレジスタ 21726: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21727: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21728: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21729: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21730: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21731: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21732: XEiJ.regRn[w >> 12]) //ロングインデックス 21733: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21734: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21735: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21736: XEiJ.busRls (t) + x) //ポストインデックス 21737: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21738: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21739: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21740: case 0b111_100: //#<data> 21741: XEiJ.mpuCycleCount += 24; 21742: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21743: return (XEiJ.regPC += 12) - 12; 21744: } else { 21745: t = XEiJ.regPC; 21746: XEiJ.regPC = t + 12; 21747: return t; 21748: } 21749: } //switch 21750: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21751: throw M68kException.m6eSignal; 21752: } //efaAnyExtd 21753: 21754: //a = efaMltExtd (ea) //| M+-WXZ | 21755: // メモリ可変モードのエクステンデッドオペランドの実効アドレスを求める 21756: // efaMltQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、 21757: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 21758: @SuppressWarnings ("fallthrough") public static int efaMltExtd (int ea) throws M68kException { 21759: int t, w, x; 21760: switch (ea) { 21761: case 0b010_000: //(A0) 21762: if (XEiJ.EFA_SEPARATE_AR) { 21763: XEiJ.mpuCycleCount += 24; 21764: return XEiJ.regRn[ 8]; 21765: } 21766: //fallthrough 21767: case 0b010_001: //(A1) 21768: if (XEiJ.EFA_SEPARATE_AR) { 21769: XEiJ.mpuCycleCount += 24; 21770: return XEiJ.regRn[ 9]; 21771: } 21772: //fallthrough 21773: case 0b010_010: //(A2) 21774: if (XEiJ.EFA_SEPARATE_AR) { 21775: XEiJ.mpuCycleCount += 24; 21776: return XEiJ.regRn[10]; 21777: } 21778: //fallthrough 21779: case 0b010_011: //(A3) 21780: if (XEiJ.EFA_SEPARATE_AR) { 21781: XEiJ.mpuCycleCount += 24; 21782: return XEiJ.regRn[11]; 21783: } 21784: //fallthrough 21785: case 0b010_100: //(A4) 21786: if (XEiJ.EFA_SEPARATE_AR) { 21787: XEiJ.mpuCycleCount += 24; 21788: return XEiJ.regRn[12]; 21789: } 21790: //fallthrough 21791: case 0b010_101: //(A5) 21792: if (XEiJ.EFA_SEPARATE_AR) { 21793: XEiJ.mpuCycleCount += 24; 21794: return XEiJ.regRn[13]; 21795: } 21796: //fallthrough 21797: case 0b010_110: //(A6) 21798: if (XEiJ.EFA_SEPARATE_AR) { 21799: XEiJ.mpuCycleCount += 24; 21800: return XEiJ.regRn[14]; 21801: } 21802: //fallthrough 21803: case 0b010_111: //(A7) 21804: if (XEiJ.EFA_SEPARATE_AR) { 21805: XEiJ.mpuCycleCount += 24; 21806: return XEiJ.regRn[15]; 21807: } else { 21808: XEiJ.mpuCycleCount += 24; 21809: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21810: } 21811: case 0b011_000: //(A0)+ 21812: if (XEiJ.EFA_SEPARATE_AR) { 21813: XEiJ.mpuCycleCount += 24; 21814: return (XEiJ.regRn[ 8] += 12) - 12; 21815: } 21816: //fallthrough 21817: case 0b011_001: //(A1)+ 21818: if (XEiJ.EFA_SEPARATE_AR) { 21819: XEiJ.mpuCycleCount += 24; 21820: return (XEiJ.regRn[ 9] += 12) - 12; 21821: } 21822: //fallthrough 21823: case 0b011_010: //(A2)+ 21824: if (XEiJ.EFA_SEPARATE_AR) { 21825: XEiJ.mpuCycleCount += 24; 21826: return (XEiJ.regRn[10] += 12) - 12; 21827: } 21828: //fallthrough 21829: case 0b011_011: //(A3)+ 21830: if (XEiJ.EFA_SEPARATE_AR) { 21831: XEiJ.mpuCycleCount += 24; 21832: return (XEiJ.regRn[11] += 12) - 12; 21833: } 21834: //fallthrough 21835: case 0b011_100: //(A4)+ 21836: if (XEiJ.EFA_SEPARATE_AR) { 21837: XEiJ.mpuCycleCount += 24; 21838: return (XEiJ.regRn[12] += 12) - 12; 21839: } 21840: //fallthrough 21841: case 0b011_101: //(A5)+ 21842: if (XEiJ.EFA_SEPARATE_AR) { 21843: XEiJ.mpuCycleCount += 24; 21844: return (XEiJ.regRn[13] += 12) - 12; 21845: } 21846: //fallthrough 21847: case 0b011_110: //(A6)+ 21848: if (XEiJ.EFA_SEPARATE_AR) { 21849: XEiJ.mpuCycleCount += 24; 21850: return (XEiJ.regRn[14] += 12) - 12; 21851: } 21852: //fallthrough 21853: case 0b011_111: //(A7)+ 21854: if (XEiJ.EFA_SEPARATE_AR) { 21855: XEiJ.mpuCycleCount += 24; 21856: return (XEiJ.regRn[15] += 12) - 12; 21857: } else { 21858: XEiJ.mpuCycleCount += 24; 21859: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12; 21860: } 21861: case 0b100_000: //-(A0) 21862: case 0b100_001: //-(A1) 21863: case 0b100_010: //-(A2) 21864: case 0b100_011: //-(A3) 21865: case 0b100_100: //-(A4) 21866: case 0b100_101: //-(A5) 21867: case 0b100_110: //-(A6) 21868: case 0b100_111: //-(A7) 21869: XEiJ.mpuCycleCount += 26; 21870: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12; 21871: case 0b101_000: //(d16,A0) 21872: case 0b101_001: //(d16,A1) 21873: case 0b101_010: //(d16,A2) 21874: case 0b101_011: //(d16,A3) 21875: case 0b101_100: //(d16,A4) 21876: case 0b101_101: //(d16,A5) 21877: case 0b101_110: //(d16,A6) 21878: case 0b101_111: //(d16,A7) 21879: XEiJ.mpuCycleCount += 28; 21880: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21881: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21882: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21883: } else { 21884: t = XEiJ.regPC; 21885: XEiJ.regPC = t + 2; 21886: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21887: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21888: } 21889: case 0b110_000: //(d8,A0,Rn.wl) 21890: case 0b110_001: //(d8,A1,Rn.wl) 21891: case 0b110_010: //(d8,A2,Rn.wl) 21892: case 0b110_011: //(d8,A3,Rn.wl) 21893: case 0b110_100: //(d8,A4,Rn.wl) 21894: case 0b110_101: //(d8,A5,Rn.wl) 21895: case 0b110_110: //(d8,A6,Rn.wl) 21896: case 0b110_111: //(d8,A7,Rn.wl) 21897: XEiJ.mpuCycleCount += 30; 21898: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21899: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21900: } else { 21901: w = XEiJ.regPC; 21902: XEiJ.regPC = w + 2; 21903: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21904: } 21905: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21906: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21907: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21908: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21909: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21910: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21911: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21912: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21913: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21914: XEiJ.regRn[w >> 12]) //ロングインデックス 21915: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21916: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21917: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21918: XEiJ.busRls (t) + x) //ポストインデックス 21919: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21920: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21921: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21922: case 0b111_000: //(xxx).W 21923: XEiJ.mpuCycleCount += 28; 21924: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21925: case 0b111_001: //(xxx).L 21926: XEiJ.mpuCycleCount += 32; 21927: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21928: } //switch 21929: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21930: throw M68kException.m6eSignal; 21931: } //efaMltExtd 21932: 21933: //a = efaLeaPea (ea) //| M WXZP | 21934: // LEA命令とPEA命令のオペランドの実効アドレスを求める 21935: // efaCntWordとの違いはサイクル数のみ 21936: // LEA命令のベースサイクル数4を含んでいるのでLEA命令ではベースサイクル数を加えなくてよい 21937: // PEA命令のベースサイクル数は12-4=8 21938: @SuppressWarnings ("fallthrough") public static int efaLeaPea (int ea) throws M68kException { 21939: int t, w, x; 21940: switch (ea) { 21941: case 0b010_000: //(A0) 21942: if (XEiJ.EFA_SEPARATE_AR) { 21943: XEiJ.mpuCycleCount += 4; 21944: return XEiJ.regRn[ 8]; 21945: } 21946: //fallthrough 21947: case 0b010_001: //(A1) 21948: if (XEiJ.EFA_SEPARATE_AR) { 21949: XEiJ.mpuCycleCount += 4; 21950: return XEiJ.regRn[ 9]; 21951: } 21952: //fallthrough 21953: case 0b010_010: //(A2) 21954: if (XEiJ.EFA_SEPARATE_AR) { 21955: XEiJ.mpuCycleCount += 4; 21956: return XEiJ.regRn[10]; 21957: } 21958: //fallthrough 21959: case 0b010_011: //(A3) 21960: if (XEiJ.EFA_SEPARATE_AR) { 21961: XEiJ.mpuCycleCount += 4; 21962: return XEiJ.regRn[11]; 21963: } 21964: //fallthrough 21965: case 0b010_100: //(A4) 21966: if (XEiJ.EFA_SEPARATE_AR) { 21967: XEiJ.mpuCycleCount += 4; 21968: return XEiJ.regRn[12]; 21969: } 21970: //fallthrough 21971: case 0b010_101: //(A5) 21972: if (XEiJ.EFA_SEPARATE_AR) { 21973: XEiJ.mpuCycleCount += 4; 21974: return XEiJ.regRn[13]; 21975: } 21976: //fallthrough 21977: case 0b010_110: //(A6) 21978: if (XEiJ.EFA_SEPARATE_AR) { 21979: XEiJ.mpuCycleCount += 4; 21980: return XEiJ.regRn[14]; 21981: } 21982: //fallthrough 21983: case 0b010_111: //(A7) 21984: if (XEiJ.EFA_SEPARATE_AR) { 21985: XEiJ.mpuCycleCount += 4; 21986: return XEiJ.regRn[15]; 21987: } else { 21988: XEiJ.mpuCycleCount += 4; 21989: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21990: } 21991: case 0b101_000: //(d16,A0) 21992: case 0b101_001: //(d16,A1) 21993: case 0b101_010: //(d16,A2) 21994: case 0b101_011: //(d16,A3) 21995: case 0b101_100: //(d16,A4) 21996: case 0b101_101: //(d16,A5) 21997: case 0b101_110: //(d16,A6) 21998: case 0b101_111: //(d16,A7) 21999: XEiJ.mpuCycleCount += 8; 22000: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 22001: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 22002: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 22003: } else { 22004: t = XEiJ.regPC; 22005: XEiJ.regPC = t + 2; 22006: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 22007: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 22008: } 22009: case 0b110_000: //(d8,A0,Rn.wl) 22010: case 0b110_001: //(d8,A1,Rn.wl) 22011: case 0b110_010: //(d8,A2,Rn.wl) 22012: case 0b110_011: //(d8,A3,Rn.wl) 22013: case 0b110_100: //(d8,A4,Rn.wl) 22014: case 0b110_101: //(d8,A5,Rn.wl) 22015: case 0b110_110: //(d8,A6,Rn.wl) 22016: case 0b110_111: //(d8,A7,Rn.wl) 22017: XEiJ.mpuCycleCount += 12; 22018: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 22019: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 22020: } else { 22021: w = XEiJ.regPC; 22022: XEiJ.regPC = w + 2; 22023: w = XEiJ.busRwze (w); //pcwz。拡張ワード 22024: } 22025: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 22026: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 22027: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 22028: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 22029: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 22030: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 22031: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 22032: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 22033: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 22034: XEiJ.regRn[w >> 12]) //ロングインデックス 22035: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 22036: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 22037: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 22038: XEiJ.busRls (t) + x) //ポストインデックス 22039: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 22040: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 22041: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 22042: case 0b111_000: //(xxx).W 22043: XEiJ.mpuCycleCount += 8; 22044: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 22045: case 0b111_001: //(xxx).L 22046: XEiJ.mpuCycleCount += 12; 22047: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 22048: case 0b111_010: //(d16,PC) 22049: XEiJ.mpuCycleCount += 8; 22050: t = XEiJ.regPC; 22051: XEiJ.regPC = t + 2; 22052: return (t //ベースレジスタ 22053: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 22054: case 0b111_011: //(d8,PC,Rn.wl) 22055: XEiJ.mpuCycleCount += 12; 22056: t = XEiJ.regPC; 22057: XEiJ.regPC = t + 2; 22058: w = XEiJ.busRwze (t); //pcwz。拡張ワード 22059: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 22060: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 22061: t) //ベースレジスタ 22062: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 22063: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 22064: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 22065: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 22066: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 22067: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 22068: XEiJ.regRn[w >> 12]) //ロングインデックス 22069: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 22070: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 22071: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 22072: XEiJ.busRls (t) + x) //ポストインデックス 22073: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 22074: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 22075: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 22076: } //switch 22077: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 22078: throw M68kException.m6eSignal; 22079: } //efaLeaPea 22080: 22081: //a = efaJmpJsr (ea) //| M WXZP | 22082: // JMP命令とJSR命令のオペランドの実効アドレスを求める 22083: // efaCntWordとの違いはサイクル数のみ 22084: // JMP命令のベースサイクル数8を含んでいるのでJMP命令ではベースサイクル数を加えなくてよい 22085: // JSR命令のベースサイクル数は16-8=8 22086: @SuppressWarnings ("fallthrough") public static int efaJmpJsr (int ea) throws M68kException { 22087: int t, w, x; 22088: switch (ea) { 22089: case 0b010_000: //(A0) 22090: if (XEiJ.EFA_SEPARATE_AR) { 22091: XEiJ.mpuCycleCount += 8; 22092: return XEiJ.regRn[ 8]; 22093: } 22094: //fallthrough 22095: case 0b010_001: //(A1) 22096: if (XEiJ.EFA_SEPARATE_AR) { 22097: XEiJ.mpuCycleCount += 8; 22098: return XEiJ.regRn[ 9]; 22099: } 22100: //fallthrough 22101: case 0b010_010: //(A2) 22102: if (XEiJ.EFA_SEPARATE_AR) { 22103: XEiJ.mpuCycleCount += 8; 22104: return XEiJ.regRn[10]; 22105: } 22106: //fallthrough 22107: case 0b010_011: //(A3) 22108: if (XEiJ.EFA_SEPARATE_AR) { 22109: XEiJ.mpuCycleCount += 8; 22110: return XEiJ.regRn[11]; 22111: } 22112: //fallthrough 22113: case 0b010_100: //(A4) 22114: if (XEiJ.EFA_SEPARATE_AR) { 22115: XEiJ.mpuCycleCount += 8; 22116: return XEiJ.regRn[12]; 22117: } 22118: //fallthrough 22119: case 0b010_101: //(A5) 22120: if (XEiJ.EFA_SEPARATE_AR) { 22121: XEiJ.mpuCycleCount += 8; 22122: return XEiJ.regRn[13]; 22123: } 22124: //fallthrough 22125: case 0b010_110: //(A6) 22126: if (XEiJ.EFA_SEPARATE_AR) { 22127: XEiJ.mpuCycleCount += 8; 22128: return XEiJ.regRn[14]; 22129: } 22130: //fallthrough 22131: case 0b010_111: //(A7) 22132: if (XEiJ.EFA_SEPARATE_AR) { 22133: XEiJ.mpuCycleCount += 8; 22134: return XEiJ.regRn[15]; 22135: } else { 22136: XEiJ.mpuCycleCount += 8; 22137: return XEiJ.regRn[ea - (0b010_000 - 8)]; 22138: } 22139: case 0b101_000: //(d16,A0) 22140: case 0b101_001: //(d16,A1) 22141: case 0b101_010: //(d16,A2) 22142: case 0b101_011: //(d16,A3) 22143: case 0b101_100: //(d16,A4) 22144: case 0b101_101: //(d16,A5) 22145: case 0b101_110: //(d16,A6) 22146: case 0b101_111: //(d16,A7) 22147: XEiJ.mpuCycleCount += 10; 22148: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 22149: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 22150: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 22151: } else { 22152: t = XEiJ.regPC; 22153: XEiJ.regPC = t + 2; 22154: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 22155: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 22156: } 22157: case 0b110_000: //(d8,A0,Rn.wl) 22158: case 0b110_001: //(d8,A1,Rn.wl) 22159: case 0b110_010: //(d8,A2,Rn.wl) 22160: case 0b110_011: //(d8,A3,Rn.wl) 22161: case 0b110_100: //(d8,A4,Rn.wl) 22162: case 0b110_101: //(d8,A5,Rn.wl) 22163: case 0b110_110: //(d8,A6,Rn.wl) 22164: case 0b110_111: //(d8,A7,Rn.wl) 22165: XEiJ.mpuCycleCount += 14; 22166: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 22167: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 22168: } else { 22169: w = XEiJ.regPC; 22170: XEiJ.regPC = w + 2; 22171: w = XEiJ.busRwze (w); //pcwz。拡張ワード 22172: } 22173: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 22174: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 22175: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 22176: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 22177: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 22178: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 22179: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 22180: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 22181: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 22182: XEiJ.regRn[w >> 12]) //ロングインデックス 22183: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 22184: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 22185: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 22186: XEiJ.busRls (t) + x) //ポストインデックス 22187: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 22188: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 22189: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 22190: case 0b111_000: //(xxx).W 22191: XEiJ.mpuCycleCount += 10; 22192: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 22193: case 0b111_001: //(xxx).L 22194: XEiJ.mpuCycleCount += 12; 22195: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 22196: case 0b111_010: //(d16,PC) 22197: XEiJ.mpuCycleCount += 10; 22198: t = XEiJ.regPC; 22199: XEiJ.regPC = t + 2; 22200: return (t //ベースレジスタ 22201: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 22202: case 0b111_011: //(d8,PC,Rn.wl) 22203: XEiJ.mpuCycleCount += 14; 22204: t = XEiJ.regPC; 22205: XEiJ.regPC = t + 2; 22206: w = XEiJ.busRwze (t); //pcwz。拡張ワード 22207: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 22208: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 22209: t) //ベースレジスタ 22210: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 22211: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 22212: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 22213: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 22214: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 22215: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 22216: XEiJ.regRn[w >> 12]) //ロングインデックス 22217: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 22218: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 22219: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 22220: XEiJ.busRls (t) + x) //ポストインデックス 22221: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 22222: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 22223: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 22224: } //switch 22225: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 22226: throw M68kException.m6eSignal; 22227: } //efaJmpJsr 22228: 22229: 22230: 22231: } //class MC68EC030 22232: 22233: 22234: