1: //======================================================================================== 2: // MC68EC030.java 3: // en:MC68EC030 core 4: // ja:MC68EC030コア 5: // Copyright (C) 2003-2022 Makoto Kamada 6: // 7: // This file is part of the XEiJ (X68000 Emulator in Java). 8: // You can use, modify and redistribute the XEiJ if the conditions are met. 9: // Read the XEiJ License for more details. 10: // https://stdkmd.net/xeij/ 11: //======================================================================================== 12: 13: package xeij; 14: 15: import java.lang.*; //Boolean,Character,Class,Comparable,Double,Exception,Float,IllegalArgumentException,Integer,Long,Math,Number,Object,Runnable,SecurityException,String,StringBuilder,System 16: 17: public class MC68EC030 { 18: 19: //ゼロ除算のときの未定義フラグ 20: // MC68030はゼロ除算のときオペランド以外の要因でZとVが変化する 21: // VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 22: // 参考 23: // https://twitter.com/moveccr/status/814032098692513792 24: // https://twitter.com/isaki68k/status/814036909030682624 25: public static final boolean M30_DIV_ZERO_V_FLAG = true; //true=ゼロ除算のVフラグの再現を試みる 26: public static boolean m30DivZeroVFlag; 27: 28: public static void mpuCore () { 29: 30: //例外ループ 31: // 別のメソッドで検出された例外を命令ループの外側でcatchすることで命令ループを高速化する 32: errorLoop: 33: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 34: try { 35: //命令ループ 36: while (XEiJ.mpuClockTime < XEiJ.mpuClockLimit) { 37: int t; 38: //命令を実行する 39: XEiJ.mpuTraceFlag = XEiJ.regSRT1; //命令実行前のsrT1 40: XEiJ.mpuCycleCount = 0; //第1オペコードからROMのアクセスウエイトを有効にする。命令のサイクル数はすべてXEiJ.mpuCycleCount+=～で加えること 41: XEiJ.regPC0 = t = XEiJ.regPC; //命令の先頭アドレス 42: XEiJ.regPC = t + 2; 43: XEiJ.regOC = (InstructionBreakPoint.IBP_ON ? InstructionBreakPoint.ibpOp1MemoryMap : DataBreakPoint.DBP_ON ? XEiJ.regSRS != 0 ? XEiJ.busSuperMap : XEiJ.busUserMap : XEiJ.busMemoryMap)[t >>> XEiJ.BUS_PAGE_BITS].mmdRwz (t); //第1オペコード。必ずゼロ拡張すること。pcに奇数が入っていることはないのでアドレスエラーのチェックを省略する 44: 45: //命令の処理 46: // 第1オペコードの上位10ビットで分岐する 47: irpSwitch: 48: switch (XEiJ.regOC >>> 6) { //第1オペコードの上位10ビット。XEiJ.regOCはゼロ拡張されているので0b1111_111_111&を省略 49: 50: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 51: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 52: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 53: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 54: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 55: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 56: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 57: case 0b0000_000_000: 58: irpOriByte (); 59: break irpSwitch; 60: 61: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 62: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 63: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 64: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 65: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 66: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 67: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 68: case 0b0000_000_001: 69: irpOriWord (); 70: break irpSwitch; 71: 72: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 73: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 74: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 75: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 76: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 77: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 78: case 0b0000_000_010: 79: irpOriLong (); 80: break irpSwitch; 81: 82: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 83: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 84: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 85: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 86: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 87: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 88: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 89: case 0b0000_000_011: 90: irpCmp2Chk2Byte (); 91: break irpSwitch; 92: 93: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 94: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 95: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 96: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 97: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 98: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 99: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 100: case 0b0000_000_100: 101: case 0b0000_001_100: 102: case 0b0000_010_100: 103: case 0b0000_011_100: 104: case 0b0000_100_100: 105: case 0b0000_101_100: 106: case 0b0000_110_100: 107: case 0b0000_111_100: 108: irpBtstReg (); 109: break irpSwitch; 110: 111: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 112: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 113: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 114: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 115: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 116: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 117: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 118: case 0b0000_000_101: 119: case 0b0000_001_101: 120: case 0b0000_010_101: 121: case 0b0000_011_101: 122: case 0b0000_100_101: 123: case 0b0000_101_101: 124: case 0b0000_110_101: 125: case 0b0000_111_101: 126: irpBchgReg (); 127: break irpSwitch; 128: 129: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 130: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 131: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 132: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 133: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 134: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 135: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 136: case 0b0000_000_110: 137: case 0b0000_001_110: 138: case 0b0000_010_110: 139: case 0b0000_011_110: 140: case 0b0000_100_110: 141: case 0b0000_101_110: 142: case 0b0000_110_110: 143: case 0b0000_111_110: 144: irpBclrReg (); 145: break irpSwitch; 146: 147: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 148: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 149: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 150: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 151: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 152: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 153: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 154: case 0b0000_000_111: 155: case 0b0000_001_111: 156: case 0b0000_010_111: 157: case 0b0000_011_111: 158: case 0b0000_100_111: 159: case 0b0000_101_111: 160: case 0b0000_110_111: 161: case 0b0000_111_111: 162: irpBsetReg (); 163: break irpSwitch; 164: 165: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 166: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 167: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 168: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 169: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 170: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 171: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 172: case 0b0000_001_000: 173: irpAndiByte (); 174: break irpSwitch; 175: 176: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 177: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 178: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 179: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 180: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 181: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 182: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 183: case 0b0000_001_001: 184: irpAndiWord (); 185: break irpSwitch; 186: 187: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 188: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 189: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 190: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 191: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 192: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 193: case 0b0000_001_010: 194: irpAndiLong (); 195: break irpSwitch; 196: 197: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 198: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 199: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 200: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 201: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 202: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 203: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 204: case 0b0000_001_011: 205: irpCmp2Chk2Word (); 206: break irpSwitch; 207: 208: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 209: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 210: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 211: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 212: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 213: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 214: case 0b0000_010_000: 215: irpSubiByte (); 216: break irpSwitch; 217: 218: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 219: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 220: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 221: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 222: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 223: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 224: case 0b0000_010_001: 225: irpSubiWord (); 226: break irpSwitch; 227: 228: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 229: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 230: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 231: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 232: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 233: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 234: case 0b0000_010_010: 235: irpSubiLong (); 236: break irpSwitch; 237: 238: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 239: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 240: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 241: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 242: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 243: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 244: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 245: case 0b0000_010_011: 246: irpCmp2Chk2Long (); 247: break irpSwitch; 248: 249: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 250: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 251: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 252: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 253: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 254: case 0b0000_011_000: 255: irpAddiByte (); 256: break irpSwitch; 257: 258: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 259: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 260: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 261: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 262: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 263: case 0b0000_011_001: 264: irpAddiWord (); 265: break irpSwitch; 266: 267: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 268: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 269: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 270: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 271: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 272: case 0b0000_011_010: 273: irpAddiLong (); 274: break irpSwitch; 275: 276: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 277: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 278: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 279: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 280: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 281: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 282: case 0b0000_100_000: 283: irpBtstImm (); 284: break irpSwitch; 285: 286: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 287: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 288: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 289: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 290: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 291: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 292: case 0b0000_100_001: 293: irpBchgImm (); 294: break irpSwitch; 295: 296: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 297: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 298: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 299: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 300: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 301: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 302: case 0b0000_100_010: 303: irpBclrImm (); 304: break irpSwitch; 305: 306: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 307: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 308: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 310: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 311: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 312: case 0b0000_100_011: 313: irpBsetImm (); 314: break irpSwitch; 315: 316: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 317: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 318: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 319: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 320: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 321: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 322: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 323: case 0b0000_101_000: 324: irpEoriByte (); 325: break irpSwitch; 326: 327: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 328: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 329: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 330: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 331: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 332: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 333: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 334: case 0b0000_101_001: 335: irpEoriWord (); 336: break irpSwitch; 337: 338: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 339: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 340: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 342: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 343: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 344: case 0b0000_101_010: 345: irpEoriLong (); 346: break irpSwitch; 347: 348: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 349: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 350: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 351: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 352: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 353: case 0b0000_101_011: 354: irpCasByte (); 355: break irpSwitch; 356: 357: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 358: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 359: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 360: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 361: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 362: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 363: case 0b0000_110_000: 364: irpCmpiByte (); 365: break irpSwitch; 366: 367: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 368: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 369: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 370: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 371: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 372: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 373: case 0b0000_110_001: 374: irpCmpiWord (); 375: break irpSwitch; 376: 377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 378: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 379: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 380: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 381: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 382: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 383: case 0b0000_110_010: 384: irpCmpiLong (); 385: break irpSwitch; 386: 387: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 388: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 389: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 390: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 391: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 392: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 393: case 0b0000_110_011: 394: irpCasWord (); 395: break irpSwitch; 396: 397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 398: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 399: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 400: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 401: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 402: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 403: case 0b0000_111_000: 404: irpMovesByte (); 405: break irpSwitch; 406: 407: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 408: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 409: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 410: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 411: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 412: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 413: case 0b0000_111_001: 414: irpMovesWord (); 415: break irpSwitch; 416: 417: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 418: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 419: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 420: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 421: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 422: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 423: case 0b0000_111_010: 424: irpMovesLong (); 425: break irpSwitch; 426: 427: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 428: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 429: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 430: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 431: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 432: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 433: case 0b0000_111_011: 434: irpCasLong (); 435: break irpSwitch; 436: 437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 441: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 442: case 0b0001_000_000: 443: case 0b0001_001_000: 444: case 0b0001_010_000: 445: case 0b0001_011_000: 446: case 0b0001_100_000: 447: case 0b0001_101_000: 448: case 0b0001_110_000: 449: case 0b0001_111_000: 450: irpMoveToDRByte (); 451: break irpSwitch; 452: 453: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 454: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 455: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 456: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 457: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 458: case 0b0001_000_010: 459: case 0b0001_001_010: 460: case 0b0001_010_010: 461: case 0b0001_011_010: 462: case 0b0001_100_010: 463: case 0b0001_101_010: 464: case 0b0001_110_010: 465: case 0b0001_111_010: 466: irpMoveToMMByte (); 467: break irpSwitch; 468: 469: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 470: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 471: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 472: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 473: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 474: case 0b0001_000_011: 475: case 0b0001_001_011: 476: case 0b0001_010_011: 477: case 0b0001_011_011: 478: case 0b0001_100_011: 479: case 0b0001_101_011: 480: case 0b0001_110_011: 481: case 0b0001_111_011: 482: irpMoveToMPByte (); 483: break irpSwitch; 484: 485: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 486: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 487: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 488: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 489: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 490: case 0b0001_000_100: 491: case 0b0001_001_100: 492: case 0b0001_010_100: 493: case 0b0001_011_100: 494: case 0b0001_100_100: 495: case 0b0001_101_100: 496: case 0b0001_110_100: 497: case 0b0001_111_100: 498: irpMoveToMNByte (); 499: break irpSwitch; 500: 501: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 502: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 503: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 504: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 505: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 506: case 0b0001_000_101: 507: case 0b0001_001_101: 508: case 0b0001_010_101: 509: case 0b0001_011_101: 510: case 0b0001_100_101: 511: case 0b0001_101_101: 512: case 0b0001_110_101: 513: case 0b0001_111_101: 514: irpMoveToMWByte (); 515: break irpSwitch; 516: 517: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 518: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 519: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 520: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 521: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 522: case 0b0001_000_110: 523: case 0b0001_001_110: 524: case 0b0001_010_110: 525: case 0b0001_011_110: 526: case 0b0001_100_110: 527: case 0b0001_101_110: 528: case 0b0001_110_110: 529: case 0b0001_111_110: 530: irpMoveToMXByte (); 531: break irpSwitch; 532: 533: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 534: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 535: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 536: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 537: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 538: case 0b0001_000_111: 539: irpMoveToZWByte (); 540: break irpSwitch; 541: 542: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 543: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 544: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 545: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 546: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 547: case 0b0001_001_111: 548: irpMoveToZLByte (); 549: break irpSwitch; 550: 551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 552: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 553: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 554: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 555: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 556: case 0b0010_000_000: 557: case 0b0010_001_000: 558: case 0b0010_010_000: 559: case 0b0010_011_000: 560: case 0b0010_100_000: 561: case 0b0010_101_000: 562: case 0b0010_110_000: 563: case 0b0010_111_000: 564: irpMoveToDRLong (); 565: break irpSwitch; 566: 567: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 568: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 569: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 570: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 571: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 572: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 573: case 0b0010_000_001: 574: case 0b0010_001_001: 575: case 0b0010_010_001: 576: case 0b0010_011_001: 577: case 0b0010_100_001: 578: case 0b0010_101_001: 579: case 0b0010_110_001: 580: case 0b0010_111_001: 581: irpMoveaLong (); 582: break irpSwitch; 583: 584: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 585: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 586: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 587: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 588: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 589: case 0b0010_000_010: 590: case 0b0010_001_010: 591: case 0b0010_010_010: 592: case 0b0010_011_010: 593: case 0b0010_100_010: 594: case 0b0010_101_010: 595: case 0b0010_110_010: 596: case 0b0010_111_010: 597: irpMoveToMMLong (); 598: break irpSwitch; 599: 600: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 601: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 602: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 603: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 604: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 605: case 0b0010_000_011: 606: case 0b0010_001_011: 607: case 0b0010_010_011: 608: case 0b0010_011_011: 609: case 0b0010_100_011: 610: case 0b0010_101_011: 611: case 0b0010_110_011: 612: case 0b0010_111_011: 613: irpMoveToMPLong (); 614: break irpSwitch; 615: 616: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 617: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 618: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 619: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 620: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 621: case 0b0010_000_100: 622: case 0b0010_001_100: 623: case 0b0010_010_100: 624: case 0b0010_011_100: 625: case 0b0010_100_100: 626: case 0b0010_101_100: 627: case 0b0010_110_100: 628: case 0b0010_111_100: 629: irpMoveToMNLong (); 630: break irpSwitch; 631: 632: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 633: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 634: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 635: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 636: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 637: case 0b0010_000_101: 638: case 0b0010_001_101: 639: case 0b0010_010_101: 640: case 0b0010_011_101: 641: case 0b0010_100_101: 642: case 0b0010_101_101: 643: case 0b0010_110_101: 644: case 0b0010_111_101: 645: irpMoveToMWLong (); 646: break irpSwitch; 647: 648: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 649: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 650: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 651: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 652: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 653: case 0b0010_000_110: 654: case 0b0010_001_110: 655: case 0b0010_010_110: 656: case 0b0010_011_110: 657: case 0b0010_100_110: 658: case 0b0010_101_110: 659: case 0b0010_110_110: 660: case 0b0010_111_110: 661: irpMoveToMXLong (); 662: break irpSwitch; 663: 664: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 665: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 666: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 667: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 668: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 669: case 0b0010_000_111: 670: irpMoveToZWLong (); 671: break irpSwitch; 672: 673: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 674: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 675: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 676: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 677: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 678: case 0b0010_001_111: 679: irpMoveToZLLong (); 680: break irpSwitch; 681: 682: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 683: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 684: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 685: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 686: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 687: case 0b0011_000_000: 688: case 0b0011_001_000: 689: case 0b0011_010_000: 690: case 0b0011_011_000: 691: case 0b0011_100_000: 692: case 0b0011_101_000: 693: case 0b0011_110_000: 694: case 0b0011_111_000: 695: irpMoveToDRWord (); 696: break irpSwitch; 697: 698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 699: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 700: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 702: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 703: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 704: case 0b0011_000_001: 705: case 0b0011_001_001: 706: case 0b0011_010_001: 707: case 0b0011_011_001: 708: case 0b0011_100_001: 709: case 0b0011_101_001: 710: case 0b0011_110_001: 711: case 0b0011_111_001: 712: irpMoveaWord (); 713: break irpSwitch; 714: 715: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 716: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 717: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 718: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 719: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 720: case 0b0011_000_010: 721: case 0b0011_001_010: 722: case 0b0011_010_010: 723: case 0b0011_011_010: 724: case 0b0011_100_010: 725: case 0b0011_101_010: 726: case 0b0011_110_010: 727: case 0b0011_111_010: 728: irpMoveToMMWord (); 729: break irpSwitch; 730: 731: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 732: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 733: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 734: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 735: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 736: case 0b0011_000_011: 737: case 0b0011_001_011: 738: case 0b0011_010_011: 739: case 0b0011_011_011: 740: case 0b0011_100_011: 741: case 0b0011_101_011: 742: case 0b0011_110_011: 743: case 0b0011_111_011: 744: irpMoveToMPWord (); 745: break irpSwitch; 746: 747: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 748: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 749: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 750: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 751: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 752: case 0b0011_000_100: 753: case 0b0011_001_100: 754: case 0b0011_010_100: 755: case 0b0011_011_100: 756: case 0b0011_100_100: 757: case 0b0011_101_100: 758: case 0b0011_110_100: 759: case 0b0011_111_100: 760: irpMoveToMNWord (); 761: break irpSwitch; 762: 763: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 764: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 765: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 766: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 767: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 768: case 0b0011_000_101: 769: case 0b0011_001_101: 770: case 0b0011_010_101: 771: case 0b0011_011_101: 772: case 0b0011_100_101: 773: case 0b0011_101_101: 774: case 0b0011_110_101: 775: case 0b0011_111_101: 776: irpMoveToMWWord (); 777: break irpSwitch; 778: 779: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 780: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 781: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 782: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 783: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 784: case 0b0011_000_110: 785: case 0b0011_001_110: 786: case 0b0011_010_110: 787: case 0b0011_011_110: 788: case 0b0011_100_110: 789: case 0b0011_101_110: 790: case 0b0011_110_110: 791: case 0b0011_111_110: 792: irpMoveToMXWord (); 793: break irpSwitch; 794: 795: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 796: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 797: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 798: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 799: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 800: case 0b0011_000_111: 801: irpMoveToZWWord (); 802: break irpSwitch; 803: 804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 805: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 806: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 808: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 809: case 0b0011_001_111: 810: irpMoveToZLWord (); 811: break irpSwitch; 812: 813: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 814: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 815: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 816: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 817: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 818: case 0b0100_000_000: 819: irpNegxByte (); 820: break irpSwitch; 821: 822: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 823: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 824: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 825: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 826: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 827: case 0b0100_000_001: 828: irpNegxWord (); 829: break irpSwitch; 830: 831: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 832: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 833: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 834: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 835: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 836: case 0b0100_000_010: 837: irpNegxLong (); 838: break irpSwitch; 839: 840: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 841: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 842: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 843: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 844: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 845: case 0b0100_000_011: 846: irpMoveFromSR (); 847: break irpSwitch; 848: 849: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 850: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 851: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 852: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 853: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 854: case 0b0100_000_100: 855: case 0b0100_001_100: 856: case 0b0100_010_100: 857: case 0b0100_011_100: 858: case 0b0100_100_100: 859: case 0b0100_101_100: 860: case 0b0100_110_100: 861: case 0b0100_111_100: 862: irpChkLong (); 863: break irpSwitch; 864: 865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 869: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 870: case 0b0100_000_110: 871: case 0b0100_001_110: 872: case 0b0100_010_110: 873: case 0b0100_011_110: 874: case 0b0100_100_110: 875: case 0b0100_101_110: 876: case 0b0100_110_110: 877: case 0b0100_111_110: 878: irpChkWord (); 879: break irpSwitch; 880: 881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 882: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 883: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 884: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 885: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 886: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 887: case 0b0100_000_111: 888: case 0b0100_001_111: 889: case 0b0100_010_111: 890: case 0b0100_011_111: 891: case 0b0100_100_111: 892: case 0b0100_101_111: 893: case 0b0100_110_111: 894: case 0b0100_111_111: 895: irpLea (); 896: break irpSwitch; 897: 898: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 899: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 900: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 901: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 902: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 903: case 0b0100_001_000: 904: irpClrByte (); 905: break irpSwitch; 906: 907: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 908: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 909: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 911: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 912: case 0b0100_001_001: 913: irpClrWord (); 914: break irpSwitch; 915: 916: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 917: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 918: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 919: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 920: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 921: case 0b0100_001_010: 922: irpClrLong (); 923: break irpSwitch; 924: 925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 926: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 927: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 928: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 929: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 930: case 0b0100_001_011: 931: irpMoveFromCCR (); 932: break irpSwitch; 933: 934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 935: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 936: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 938: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 939: case 0b0100_010_000: 940: irpNegByte (); 941: break irpSwitch; 942: 943: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 944: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 945: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 946: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 947: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 948: case 0b0100_010_001: 949: irpNegWord (); 950: break irpSwitch; 951: 952: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 953: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 954: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 956: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 957: case 0b0100_010_010: 958: irpNegLong (); 959: break irpSwitch; 960: 961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 962: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 963: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 964: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 965: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 966: case 0b0100_010_011: 967: irpMoveToCCR (); 968: break irpSwitch; 969: 970: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 971: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 972: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 973: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 974: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 975: case 0b0100_011_000: 976: irpNotByte (); 977: break irpSwitch; 978: 979: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 980: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 981: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 982: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 983: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 984: case 0b0100_011_001: 985: irpNotWord (); 986: break irpSwitch; 987: 988: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 989: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 990: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 991: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 992: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 993: case 0b0100_011_010: 994: irpNotLong (); 995: break irpSwitch; 996: 997: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 998: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 999: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1000: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1001: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 1002: case 0b0100_011_011: 1003: irpMoveToSR (); 1004: break irpSwitch; 1005: 1006: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1007: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1008: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1010: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 1011: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 1012: case 0b0100_100_000: 1013: irpNbcd (); 1014: break irpSwitch; 1015: 1016: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1017: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1018: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1019: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1020: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 1021: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 1022: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 1023: case 0b0100_100_001: 1024: irpPea (); 1025: break irpSwitch; 1026: 1027: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1028: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1029: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1030: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1031: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 1032: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 1033: case 0b0100_100_010: 1034: irpMovemToMemWord (); 1035: break irpSwitch; 1036: 1037: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1038: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1039: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1040: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1041: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 1042: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 1043: case 0b0100_100_011: 1044: irpMovemToMemLong (); 1045: break irpSwitch; 1046: 1047: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1048: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1049: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1050: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1051: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 1052: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 1053: case 0b0100_101_000: 1054: irpTstByte (); 1055: break irpSwitch; 1056: 1057: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1058: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1059: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1061: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 1062: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 1063: case 0b0100_101_001: 1064: irpTstWord (); 1065: break irpSwitch; 1066: 1067: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1068: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1069: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1070: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1071: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 1072: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 1073: case 0b0100_101_010: 1074: irpTstLong (); 1075: break irpSwitch; 1076: 1077: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1078: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1079: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1080: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1081: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 1082: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 1083: case 0b0100_101_011: 1084: irpTas (); 1085: break irpSwitch; 1086: 1087: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1088: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1089: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1090: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1091: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 1092: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 1093: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 1094: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 1095: case 0b0100_110_000: 1096: irpMuluMulsLong (); 1097: break irpSwitch; 1098: 1099: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1100: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1101: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1102: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1103: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 1104: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 1105: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 1106: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 1107: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 1108: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 1109: case 0b0100_110_001: 1110: irpDivuDivsLong (); 1111: break irpSwitch; 1112: 1113: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1114: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1115: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1116: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1117: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 1118: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 1119: case 0b0100_110_010: 1120: irpMovemToRegWord (); 1121: break irpSwitch; 1122: 1123: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1124: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1125: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1126: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1127: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 1128: case 0b0100_110_011: 1129: irpMovemToRegLong (); 1130: break irpSwitch; 1131: 1132: case 0b0100_111_001: 1133: switch (XEiJ.regOC & 0b111_111) { 1134: 1135: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1136: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1137: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1138: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1139: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 1140: case 0b000_000: 1141: case 0b000_001: 1142: case 0b000_010: 1143: case 0b000_011: 1144: case 0b000_100: 1145: case 0b000_101: 1146: case 0b000_110: 1147: case 0b000_111: 1148: case 0b001_000: 1149: case 0b001_001: 1150: case 0b001_010: 1151: case 0b001_011: 1152: case 0b001_100: 1153: case 0b001_101: 1154: case 0b001_110: 1155: irpTrap (); 1156: break irpSwitch; 1157: case 0b001_111: 1158: irpTrap15 (); 1159: break irpSwitch; 1160: 1161: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1162: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1163: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1164: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1165: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 1166: case 0b010_000: 1167: case 0b010_001: 1168: case 0b010_010: 1169: case 0b010_011: 1170: case 0b010_100: 1171: case 0b010_101: 1172: case 0b010_110: 1173: case 0b010_111: 1174: irpLinkWord (); 1175: break irpSwitch; 1176: 1177: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1178: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1179: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1180: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1181: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 1182: case 0b011_000: 1183: case 0b011_001: 1184: case 0b011_010: 1185: case 0b011_011: 1186: case 0b011_100: 1187: case 0b011_101: 1188: case 0b011_110: 1189: case 0b011_111: 1190: irpUnlk (); 1191: break irpSwitch; 1192: 1193: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1194: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1195: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1196: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1197: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 1198: case 0b100_000: 1199: case 0b100_001: 1200: case 0b100_010: 1201: case 0b100_011: 1202: case 0b100_100: 1203: case 0b100_101: 1204: case 0b100_110: 1205: case 0b100_111: 1206: irpMoveToUsp (); 1207: break irpSwitch; 1208: 1209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1210: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1211: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1213: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 1214: case 0b101_000: 1215: case 0b101_001: 1216: case 0b101_010: 1217: case 0b101_011: 1218: case 0b101_100: 1219: case 0b101_101: 1220: case 0b101_110: 1221: case 0b101_111: 1222: irpMoveFromUsp (); 1223: break irpSwitch; 1224: 1225: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1226: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1227: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1228: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1229: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 1230: case 0b110_000: 1231: irpReset (); 1232: break irpSwitch; 1233: 1234: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1235: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1236: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1237: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1238: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 1239: case 0b110_001: 1240: irpNop (); 1241: break irpSwitch; 1242: 1243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1244: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1245: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1246: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1247: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 1248: case 0b110_010: 1249: irpStop (); 1250: break irpSwitch; 1251: 1252: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1253: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1254: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1255: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1256: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 1257: case 0b110_011: 1258: irpRte (); 1259: break irpSwitch; 1260: 1261: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1262: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1263: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1264: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1265: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 1266: case 0b110_100: 1267: irpRtd (); 1268: break irpSwitch; 1269: 1270: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1271: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1272: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1273: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1274: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 1275: case 0b110_101: 1276: irpRts (); 1277: break irpSwitch; 1278: 1279: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1280: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1281: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1282: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1283: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 1284: case 0b110_110: 1285: irpTrapv (); 1286: break irpSwitch; 1287: 1288: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1289: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1290: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1291: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1292: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 1293: case 0b110_111: 1294: irpRtr (); 1295: break irpSwitch; 1296: 1297: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1298: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1299: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1300: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1301: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 1302: case 0b111_010: 1303: irpMovecFromControl (); 1304: break irpSwitch; 1305: 1306: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1307: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1308: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1310: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 1311: case 0b111_011: 1312: irpMovecToControl (); 1313: break irpSwitch; 1314: 1315: default: 1316: irpIllegal (); 1317: 1318: } //switch XEiJ.regOC & 0b111_111 1319: break irpSwitch; 1320: 1321: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1322: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1323: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1324: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1325: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 1326: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 1327: case 0b0100_111_010: 1328: irpJsr (); 1329: break irpSwitch; 1330: 1331: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1332: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1333: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1334: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1335: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 1336: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 1337: case 0b0100_111_011: 1338: irpJmp (); 1339: break irpSwitch; 1340: 1341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1342: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1343: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1344: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1345: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 1346: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 1347: case 0b0101_000_000: 1348: case 0b0101_001_000: 1349: case 0b0101_010_000: 1350: case 0b0101_011_000: 1351: case 0b0101_100_000: 1352: case 0b0101_101_000: 1353: case 0b0101_110_000: 1354: case 0b0101_111_000: 1355: irpAddqByte (); 1356: break irpSwitch; 1357: 1358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1359: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1360: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1361: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1362: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 1363: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 1364: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 1365: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 1366: case 0b0101_000_001: 1367: case 0b0101_001_001: 1368: case 0b0101_010_001: 1369: case 0b0101_011_001: 1370: case 0b0101_100_001: 1371: case 0b0101_101_001: 1372: case 0b0101_110_001: 1373: case 0b0101_111_001: 1374: irpAddqWord (); 1375: break irpSwitch; 1376: 1377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1378: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1379: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1380: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1381: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 1382: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 1383: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 1384: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 1385: case 0b0101_000_010: 1386: case 0b0101_001_010: 1387: case 0b0101_010_010: 1388: case 0b0101_011_010: 1389: case 0b0101_100_010: 1390: case 0b0101_101_010: 1391: case 0b0101_110_010: 1392: case 0b0101_111_010: 1393: irpAddqLong (); 1394: break irpSwitch; 1395: 1396: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1397: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1398: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1399: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1400: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 1401: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 1402: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 1403: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 1404: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 1405: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1406: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1407: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 1408: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 1409: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1410: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1411: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 1412: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 1413: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1414: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1415: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 1416: case 0b0101_000_011: 1417: irpSt (); 1418: break irpSwitch; 1419: 1420: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1421: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1422: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1423: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1424: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 1425: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 1426: case 0b0101_000_100: 1427: case 0b0101_001_100: 1428: case 0b0101_010_100: 1429: case 0b0101_011_100: 1430: case 0b0101_100_100: 1431: case 0b0101_101_100: 1432: case 0b0101_110_100: 1433: case 0b0101_111_100: 1434: irpSubqByte (); 1435: break irpSwitch; 1436: 1437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1441: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 1442: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 1443: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 1444: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 1445: case 0b0101_000_101: 1446: case 0b0101_001_101: 1447: case 0b0101_010_101: 1448: case 0b0101_011_101: 1449: case 0b0101_100_101: 1450: case 0b0101_101_101: 1451: case 0b0101_110_101: 1452: case 0b0101_111_101: 1453: irpSubqWord (); 1454: break irpSwitch; 1455: 1456: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1457: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1458: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1459: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1460: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 1461: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 1462: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 1463: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 1464: case 0b0101_000_110: 1465: case 0b0101_001_110: 1466: case 0b0101_010_110: 1467: case 0b0101_011_110: 1468: case 0b0101_100_110: 1469: case 0b0101_101_110: 1470: case 0b0101_110_110: 1471: case 0b0101_111_110: 1472: irpSubqLong (); 1473: break irpSwitch; 1474: 1475: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1476: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1477: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1478: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1479: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 1480: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 1481: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 1482: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1483: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 1484: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 1485: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1486: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1487: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 1488: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 1489: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1490: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1491: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 1492: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 1493: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1494: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1495: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 1496: case 0b0101_000_111: 1497: irpSf (); 1498: break irpSwitch; 1499: 1500: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1501: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1502: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1504: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 1505: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 1506: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 1507: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 1508: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 1509: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1510: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1511: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 1512: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 1513: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1514: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1515: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 1516: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 1517: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1518: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1519: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 1520: case 0b0101_001_011: 1521: irpShi (); 1522: break irpSwitch; 1523: 1524: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1525: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1526: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1528: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 1529: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 1530: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 1531: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 1532: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1533: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 1534: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1535: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 1536: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1537: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 1538: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1539: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 1540: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 1541: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1542: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1543: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 1544: case 0b0101_001_111: 1545: irpSls (); 1546: break irpSwitch; 1547: 1548: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1549: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1550: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1552: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 1553: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1554: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1555: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 1556: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 1557: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1558: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1559: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 1560: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 1561: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1562: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1563: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1564: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1565: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1566: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1567: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 1568: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 1569: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1570: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1571: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1572: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1573: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1574: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1575: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 1576: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 1577: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1578: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1579: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1580: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1581: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1582: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1583: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 1584: case 0b0101_010_011: 1585: irpShs (); 1586: break irpSwitch; 1587: 1588: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1589: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1590: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1591: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1592: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 1593: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1594: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1595: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 1596: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 1597: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1598: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1599: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 1600: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 1601: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1602: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1603: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1604: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1605: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1606: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1607: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 1608: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 1609: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1610: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1611: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1612: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1613: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1614: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1615: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 1616: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 1617: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1618: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1619: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1620: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1621: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1622: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1623: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 1624: case 0b0101_010_111: 1625: irpSlo (); 1626: break irpSwitch; 1627: 1628: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1629: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1630: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1631: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1632: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 1633: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1634: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1635: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 1636: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 1637: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1638: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1639: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 1640: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 1641: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1642: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1643: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1644: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1645: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1646: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1647: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 1648: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 1649: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1650: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1651: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1652: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1653: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1654: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1655: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 1656: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 1657: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1658: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1659: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1660: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1661: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1662: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1663: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 1664: case 0b0101_011_011: 1665: irpSne (); 1666: break irpSwitch; 1667: 1668: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1669: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1670: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1671: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1672: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 1673: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1674: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1675: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 1676: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 1677: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1678: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1679: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 1680: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 1681: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1682: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1683: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1684: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1685: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1686: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1687: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 1688: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 1689: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1690: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1691: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1692: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1693: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1694: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1695: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 1696: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 1697: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1698: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1699: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1700: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1701: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1702: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1703: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 1704: case 0b0101_011_111: 1705: irpSeq (); 1706: break irpSwitch; 1707: 1708: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1709: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1710: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1711: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1712: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 1713: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 1714: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 1715: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 1716: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 1717: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1718: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1719: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 1720: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 1721: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1722: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1723: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 1724: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 1725: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1726: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1727: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 1728: case 0b0101_100_011: 1729: irpSvc (); 1730: break irpSwitch; 1731: 1732: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1733: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1734: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1735: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1736: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 1737: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 1738: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 1739: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 1740: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 1741: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1742: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1743: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 1744: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 1745: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1746: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1747: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 1748: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 1749: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1750: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1751: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 1752: case 0b0101_100_111: 1753: irpSvs (); 1754: break irpSwitch; 1755: 1756: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1757: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1758: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1759: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1760: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 1761: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 1762: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 1763: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 1764: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 1765: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1766: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1767: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 1768: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 1769: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1770: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1771: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 1772: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 1773: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1774: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1775: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 1776: case 0b0101_101_011: 1777: irpSpl (); 1778: break irpSwitch; 1779: 1780: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1781: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1782: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1783: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1784: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 1785: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 1786: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 1787: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 1788: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 1789: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1790: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1791: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 1792: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 1793: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1794: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1795: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 1796: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 1797: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1798: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1799: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 1800: case 0b0101_101_111: 1801: irpSmi (); 1802: break irpSwitch; 1803: 1804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1805: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1806: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1808: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 1809: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 1810: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 1811: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 1812: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 1813: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1814: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1815: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 1816: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 1817: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1818: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1819: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 1820: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 1821: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1822: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1823: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 1824: case 0b0101_110_011: 1825: irpSge (); 1826: break irpSwitch; 1827: 1828: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1829: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1830: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1831: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1832: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 1833: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 1834: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 1835: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 1836: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 1837: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1838: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1839: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 1840: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 1841: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1842: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1843: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 1844: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 1845: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1846: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1847: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 1848: case 0b0101_110_111: 1849: irpSlt (); 1850: break irpSwitch; 1851: 1852: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1853: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1854: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1855: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1856: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 1857: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 1858: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 1859: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 1860: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 1861: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1862: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1863: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 1864: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 1865: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1866: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1867: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 1868: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 1869: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1870: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1871: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 1872: case 0b0101_111_011: 1873: irpSgt (); 1874: break irpSwitch; 1875: 1876: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1877: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1878: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1879: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1880: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 1881: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 1882: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 1883: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 1884: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 1885: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1886: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1887: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 1888: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 1889: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1890: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1891: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 1892: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 1893: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1894: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1895: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 1896: case 0b0101_111_111: 1897: irpSle (); 1898: break irpSwitch; 1899: 1900: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1901: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1902: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1903: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1904: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 1905: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 1906: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 1907: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 1908: case 0b0110_000_000: 1909: irpBrasw (); 1910: break irpSwitch; 1911: 1912: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1913: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1914: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1915: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1916: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 1917: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 1918: case 0b0110_000_001: 1919: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1920: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1921: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1922: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1923: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 1924: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 1925: case 0b0110_000_010: 1926: irpBras (); 1927: break irpSwitch; 1928: 1929: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1930: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1931: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1932: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1933: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 1934: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 1935: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 1936: case 0b0110_000_011: 1937: irpBrasl (); 1938: break irpSwitch; 1939: 1940: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1941: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1942: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1943: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1944: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 1945: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 1946: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 1947: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 1948: case 0b0110_000_100: 1949: irpBsrsw (); 1950: break irpSwitch; 1951: 1952: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1953: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1954: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1956: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 1957: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 1958: case 0b0110_000_101: 1959: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1960: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1961: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1962: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1963: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 1964: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 1965: case 0b0110_000_110: 1966: irpBsrs (); 1967: break irpSwitch; 1968: 1969: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1970: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1971: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1972: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1973: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 1974: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 1975: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 1976: case 0b0110_000_111: 1977: irpBsrsl (); 1978: break irpSwitch; 1979: 1980: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1981: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 1982: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 1983: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1984: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 1985: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1986: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1987: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 1988: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 1989: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1990: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1991: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 1992: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1993: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 1994: case 0b0110_001_000: 1995: irpBhisw (); 1996: break irpSwitch; 1997: 1998: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 1999: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2000: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2001: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2002: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 2003: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2004: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2005: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 2006: case 0b0110_001_001: 2007: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2008: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2009: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2010: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2011: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 2012: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2013: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2014: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 2015: case 0b0110_001_010: 2016: irpBhis (); 2017: break irpSwitch; 2018: 2019: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2020: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2021: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2022: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2023: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 2024: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2025: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2026: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 2027: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 2028: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 2029: case 0b0110_001_011: 2030: irpBhisl (); 2031: break irpSwitch; 2032: 2033: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2034: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2035: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2036: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2037: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 2038: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2039: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2040: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 2041: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 2042: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2043: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2044: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 2045: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2046: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 2047: case 0b0110_001_100: 2048: irpBlssw (); 2049: break irpSwitch; 2050: 2051: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2052: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2053: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2054: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2055: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 2056: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2057: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2058: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 2059: case 0b0110_001_101: 2060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2061: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2062: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2063: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2064: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 2065: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2066: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2067: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 2068: case 0b0110_001_110: 2069: irpBlss (); 2070: break irpSwitch; 2071: 2072: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2073: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2074: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2075: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2076: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 2077: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2078: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2079: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 2080: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 2081: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 2082: case 0b0110_001_111: 2083: irpBlssl (); 2084: break irpSwitch; 2085: 2086: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2087: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2088: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2090: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 2091: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2092: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2093: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2094: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2095: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2096: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2097: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 2098: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 2099: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2100: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2101: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2102: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2103: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2104: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2105: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 2106: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2107: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2108: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2109: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 2110: case 0b0110_010_000: 2111: irpBhssw (); 2112: break irpSwitch; 2113: 2114: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2115: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2116: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2117: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2118: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 2119: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2120: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2121: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2122: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2123: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2124: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2125: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 2126: case 0b0110_010_001: 2127: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2128: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2129: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2130: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2131: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 2132: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2133: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2134: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2135: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2136: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2137: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2138: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 2139: case 0b0110_010_010: 2140: irpBhss (); 2141: break irpSwitch; 2142: 2143: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2144: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2145: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2146: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2147: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 2148: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2149: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2150: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2151: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2152: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2153: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2154: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 2155: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 2156: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2157: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2158: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 2159: case 0b0110_010_011: 2160: irpBhssl (); 2161: break irpSwitch; 2162: 2163: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2164: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2165: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2166: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2167: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 2168: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2169: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2170: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2171: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2172: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2173: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2174: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 2175: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 2176: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2177: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2178: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2179: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2180: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2181: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2182: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 2183: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2184: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2185: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2186: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 2187: case 0b0110_010_100: 2188: irpBlosw (); 2189: break irpSwitch; 2190: 2191: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2192: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2193: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2194: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2195: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 2196: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2197: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2198: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2199: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2200: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2201: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2202: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 2203: case 0b0110_010_101: 2204: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2205: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2206: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2207: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2208: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 2209: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2210: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2211: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2212: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2213: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2214: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2215: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 2216: case 0b0110_010_110: 2217: irpBlos (); 2218: break irpSwitch; 2219: 2220: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2221: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2222: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2223: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2224: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 2225: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2226: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2227: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2228: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2229: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2230: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2231: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 2232: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 2233: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2234: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2235: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 2236: case 0b0110_010_111: 2237: irpBlosl (); 2238: break irpSwitch; 2239: 2240: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2241: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2242: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2244: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 2245: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2246: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2247: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2248: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2249: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2250: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2251: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 2252: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 2253: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2254: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2255: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2256: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2257: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2258: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2259: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 2260: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2261: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2262: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2263: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2264: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2265: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2266: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 2267: case 0b0110_011_000: 2268: irpBnesw (); 2269: break irpSwitch; 2270: 2271: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2272: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2273: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2274: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2275: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 2276: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2277: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2278: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2279: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2280: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2281: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2282: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 2283: case 0b0110_011_001: 2284: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2285: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2286: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2287: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2288: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 2289: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2290: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2291: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2292: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2293: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2294: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2295: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 2296: case 0b0110_011_010: 2297: irpBnes (); 2298: break irpSwitch; 2299: 2300: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2301: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2302: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2303: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2304: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 2305: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2306: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2307: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2308: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2309: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2310: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2311: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 2312: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 2313: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2314: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2315: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 2316: case 0b0110_011_011: 2317: irpBnesl (); 2318: break irpSwitch; 2319: 2320: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2321: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2322: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2324: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 2325: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2326: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2327: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2328: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2329: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2330: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2331: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 2332: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 2333: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2334: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2335: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2336: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2337: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2338: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2339: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 2340: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 2341: case 0b0110_011_100: 2342: irpBeqsw (); 2343: break irpSwitch; 2344: 2345: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2346: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2347: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2348: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2349: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 2350: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2351: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2352: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2353: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2354: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2355: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2356: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 2357: case 0b0110_011_101: 2358: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2359: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2360: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2361: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2362: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 2363: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2364: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2365: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2366: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2367: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2368: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2369: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 2370: case 0b0110_011_110: 2371: irpBeqs (); 2372: break irpSwitch; 2373: 2374: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2375: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2376: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2377: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2378: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 2379: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2380: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2381: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2382: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2383: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2384: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2385: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 2386: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 2387: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2388: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2389: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 2390: case 0b0110_011_111: 2391: irpBeqsl (); 2392: break irpSwitch; 2393: 2394: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2395: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2396: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2398: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 2399: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2400: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2401: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 2402: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 2403: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2404: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2405: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 2406: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2407: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 2408: case 0b0110_100_000: 2409: irpBvcsw (); 2410: break irpSwitch; 2411: 2412: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2413: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2414: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2415: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2416: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 2417: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2418: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2419: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 2420: case 0b0110_100_001: 2421: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2422: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2423: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2424: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2425: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 2426: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2427: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2428: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 2429: case 0b0110_100_010: 2430: irpBvcs (); 2431: break irpSwitch; 2432: 2433: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2434: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2435: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2436: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2437: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 2438: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2439: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2440: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 2441: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 2442: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 2443: case 0b0110_100_011: 2444: irpBvcsl (); 2445: break irpSwitch; 2446: 2447: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2448: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2449: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2450: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2451: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 2452: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2453: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2454: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 2455: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 2456: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2457: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2458: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 2459: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2460: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 2461: case 0b0110_100_100: 2462: irpBvssw (); 2463: break irpSwitch; 2464: 2465: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2466: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2467: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2468: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2469: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 2470: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2471: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2472: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 2473: case 0b0110_100_101: 2474: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2475: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2476: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2477: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2478: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 2479: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2480: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2481: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 2482: case 0b0110_100_110: 2483: irpBvss (); 2484: break irpSwitch; 2485: 2486: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2487: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2488: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2489: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2490: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 2491: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2492: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2493: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 2494: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 2495: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 2496: case 0b0110_100_111: 2497: irpBvssl (); 2498: break irpSwitch; 2499: 2500: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2501: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2502: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2503: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2504: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 2505: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2506: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2507: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 2508: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 2509: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2510: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2511: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 2512: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2513: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 2514: case 0b0110_101_000: 2515: irpBplsw (); 2516: break irpSwitch; 2517: 2518: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2519: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2520: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2521: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2522: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 2523: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2524: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2525: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 2526: case 0b0110_101_001: 2527: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2528: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2529: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2530: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2531: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 2532: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2533: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2534: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 2535: case 0b0110_101_010: 2536: irpBpls (); 2537: break irpSwitch; 2538: 2539: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2540: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2541: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2542: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2543: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 2544: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2545: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2546: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 2547: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 2548: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 2549: case 0b0110_101_011: 2550: irpBplsl (); 2551: break irpSwitch; 2552: 2553: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2554: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2555: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2556: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2557: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 2558: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2559: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2560: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 2561: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 2562: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2563: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2564: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 2565: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2566: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 2567: case 0b0110_101_100: 2568: irpBmisw (); 2569: break irpSwitch; 2570: 2571: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2572: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2573: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2574: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2575: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 2576: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2577: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2578: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 2579: case 0b0110_101_101: 2580: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2581: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2582: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2583: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2584: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 2585: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2586: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2587: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 2588: case 0b0110_101_110: 2589: irpBmis (); 2590: break irpSwitch; 2591: 2592: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2593: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2594: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2595: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2596: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 2597: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2598: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2599: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 2600: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 2601: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 2602: case 0b0110_101_111: 2603: irpBmisl (); 2604: break irpSwitch; 2605: 2606: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2607: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2608: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2609: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2610: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 2611: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2612: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2613: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 2614: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 2615: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2616: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2617: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 2618: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2619: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 2620: case 0b0110_110_000: 2621: irpBgesw (); 2622: break irpSwitch; 2623: 2624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2625: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2626: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2627: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2628: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 2629: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2630: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2631: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 2632: case 0b0110_110_001: 2633: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2634: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2635: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2636: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2637: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 2638: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2639: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2640: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 2641: case 0b0110_110_010: 2642: irpBges (); 2643: break irpSwitch; 2644: 2645: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2646: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2647: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2648: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2649: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 2650: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2651: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2652: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 2653: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 2654: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 2655: case 0b0110_110_011: 2656: irpBgesl (); 2657: break irpSwitch; 2658: 2659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2660: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2661: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2663: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 2664: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2665: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2666: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 2667: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 2668: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2669: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2670: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 2671: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2672: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 2673: case 0b0110_110_100: 2674: irpBltsw (); 2675: break irpSwitch; 2676: 2677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2678: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2679: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2680: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2681: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 2682: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2683: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2684: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 2685: case 0b0110_110_101: 2686: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2687: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2688: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2689: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2690: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 2691: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2692: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2693: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 2694: case 0b0110_110_110: 2695: irpBlts (); 2696: break irpSwitch; 2697: 2698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2699: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2700: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2702: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 2703: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2704: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2705: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 2706: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 2707: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 2708: case 0b0110_110_111: 2709: irpBltsl (); 2710: break irpSwitch; 2711: 2712: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2713: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2714: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2715: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2716: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 2717: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2718: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2719: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 2720: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 2721: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2722: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2723: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 2724: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2725: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 2726: case 0b0110_111_000: 2727: irpBgtsw (); 2728: break irpSwitch; 2729: 2730: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2731: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2732: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2734: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 2735: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2736: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2737: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 2738: case 0b0110_111_001: 2739: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2740: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2741: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2742: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2743: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 2744: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2745: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2746: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 2747: case 0b0110_111_010: 2748: irpBgts (); 2749: break irpSwitch; 2750: 2751: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2752: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2753: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2754: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2755: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 2756: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2757: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2758: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 2759: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 2760: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 2761: case 0b0110_111_011: 2762: irpBgtsl (); 2763: break irpSwitch; 2764: 2765: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2766: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2767: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2768: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2769: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 2770: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2771: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2772: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 2773: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 2774: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2775: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2776: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 2777: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2778: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 2779: case 0b0110_111_100: 2780: irpBlesw (); 2781: break irpSwitch; 2782: 2783: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2784: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2785: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2786: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2787: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 2788: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2789: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2790: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 2791: case 0b0110_111_101: 2792: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2793: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2794: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2795: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2796: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 2797: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2798: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2799: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 2800: case 0b0110_111_110: 2801: irpBles (); 2802: break irpSwitch; 2803: 2804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2805: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2806: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2807: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2808: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 2809: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2810: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2811: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 2812: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 2813: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 2814: case 0b0110_111_111: 2815: irpBlesl (); 2816: break irpSwitch; 2817: 2818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2822: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 2823: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 2824: case 0b0111_000_000: 2825: case 0b0111_000_001: 2826: case 0b0111_000_010: 2827: case 0b0111_000_011: 2828: case 0b0111_001_000: 2829: case 0b0111_001_001: 2830: case 0b0111_001_010: 2831: case 0b0111_001_011: 2832: case 0b0111_010_000: 2833: case 0b0111_010_001: 2834: case 0b0111_010_010: 2835: case 0b0111_010_011: 2836: case 0b0111_011_000: 2837: case 0b0111_011_001: 2838: case 0b0111_011_010: 2839: case 0b0111_011_011: 2840: case 0b0111_100_000: 2841: case 0b0111_100_001: 2842: case 0b0111_100_010: 2843: case 0b0111_100_011: 2844: case 0b0111_101_000: 2845: case 0b0111_101_001: 2846: case 0b0111_101_010: 2847: case 0b0111_101_011: 2848: case 0b0111_110_000: 2849: case 0b0111_110_001: 2850: case 0b0111_110_010: 2851: case 0b0111_110_011: 2852: case 0b0111_111_000: 2853: case 0b0111_111_001: 2854: case 0b0111_111_010: 2855: case 0b0111_111_011: 2856: irpMoveq (); 2857: break irpSwitch; 2858: 2859: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2860: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2861: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2862: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2863: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 2864: case 0b0111_000_100: 2865: case 0b0111_001_100: 2866: case 0b0111_010_100: 2867: case 0b0111_011_100: 2868: case 0b0111_100_100: 2869: case 0b0111_101_100: 2870: case 0b0111_110_100: 2871: case 0b0111_111_100: 2872: irpMvsByte (); 2873: break irpSwitch; 2874: 2875: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2876: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2877: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2878: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2879: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 2880: case 0b0111_000_101: 2881: case 0b0111_001_101: 2882: case 0b0111_010_101: 2883: case 0b0111_011_101: 2884: case 0b0111_100_101: 2885: case 0b0111_101_101: 2886: case 0b0111_110_101: 2887: case 0b0111_111_101: 2888: irpMvsWord (); 2889: break irpSwitch; 2890: 2891: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2892: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2893: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2894: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2895: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 2896: case 0b0111_000_110: 2897: case 0b0111_001_110: 2898: case 0b0111_010_110: 2899: case 0b0111_011_110: 2900: case 0b0111_100_110: 2901: case 0b0111_101_110: 2902: case 0b0111_110_110: 2903: case 0b0111_111_110: 2904: irpMvzByte (); 2905: break irpSwitch; 2906: 2907: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2908: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2909: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2911: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 2912: case 0b0111_000_111: 2913: case 0b0111_001_111: 2914: case 0b0111_010_111: 2915: case 0b0111_011_111: 2916: case 0b0111_100_111: 2917: case 0b0111_101_111: 2918: case 0b0111_110_111: 2919: case 0b0111_111_111: 2920: irpMvzWord (); 2921: break irpSwitch; 2922: 2923: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2924: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2925: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2926: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2927: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 2928: case 0b1000_000_000: 2929: case 0b1000_001_000: 2930: case 0b1000_010_000: 2931: case 0b1000_011_000: 2932: case 0b1000_100_000: 2933: case 0b1000_101_000: 2934: case 0b1000_110_000: 2935: case 0b1000_111_000: 2936: irpOrToRegByte (); 2937: break irpSwitch; 2938: 2939: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2940: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2941: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2943: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 2944: case 0b1000_000_001: 2945: case 0b1000_001_001: 2946: case 0b1000_010_001: 2947: case 0b1000_011_001: 2948: case 0b1000_100_001: 2949: case 0b1000_101_001: 2950: case 0b1000_110_001: 2951: case 0b1000_111_001: 2952: irpOrToRegWord (); 2953: break irpSwitch; 2954: 2955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2956: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2957: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2958: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2959: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 2960: case 0b1000_000_010: 2961: case 0b1000_001_010: 2962: case 0b1000_010_010: 2963: case 0b1000_011_010: 2964: case 0b1000_100_010: 2965: case 0b1000_101_010: 2966: case 0b1000_110_010: 2967: case 0b1000_111_010: 2968: irpOrToRegLong (); 2969: break irpSwitch; 2970: 2971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2972: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2973: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2974: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2975: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 2976: case 0b1000_000_011: 2977: case 0b1000_001_011: 2978: case 0b1000_010_011: 2979: case 0b1000_011_011: 2980: case 0b1000_100_011: 2981: case 0b1000_101_011: 2982: case 0b1000_110_011: 2983: case 0b1000_111_011: 2984: irpDivuWord (); 2985: break irpSwitch; 2986: 2987: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2988: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 2989: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 2990: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 2991: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 2992: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 2993: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 2994: case 0b1000_000_100: 2995: case 0b1000_001_100: 2996: case 0b1000_010_100: 2997: case 0b1000_011_100: 2998: case 0b1000_100_100: 2999: case 0b1000_101_100: 3000: case 0b1000_110_100: 3001: case 0b1000_111_100: 3002: irpOrToMemByte (); 3003: break irpSwitch; 3004: 3005: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3006: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3007: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3009: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 3010: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 3011: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 3012: case 0b1000_000_101: 3013: case 0b1000_001_101: 3014: case 0b1000_010_101: 3015: case 0b1000_011_101: 3016: case 0b1000_100_101: 3017: case 0b1000_101_101: 3018: case 0b1000_110_101: 3019: case 0b1000_111_101: 3020: irpOrToMemWord (); 3021: break irpSwitch; 3022: 3023: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3024: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3025: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3026: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3027: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 3028: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 3029: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 3030: case 0b1000_000_110: 3031: case 0b1000_001_110: 3032: case 0b1000_010_110: 3033: case 0b1000_011_110: 3034: case 0b1000_100_110: 3035: case 0b1000_101_110: 3036: case 0b1000_110_110: 3037: case 0b1000_111_110: 3038: irpOrToMemLong (); 3039: break irpSwitch; 3040: 3041: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3042: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3043: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3044: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3045: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 3046: case 0b1000_000_111: 3047: case 0b1000_001_111: 3048: case 0b1000_010_111: 3049: case 0b1000_011_111: 3050: case 0b1000_100_111: 3051: case 0b1000_101_111: 3052: case 0b1000_110_111: 3053: case 0b1000_111_111: 3054: irpDivsWord (); 3055: break irpSwitch; 3056: 3057: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3058: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3059: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3060: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3061: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 3062: case 0b1001_000_000: 3063: case 0b1001_001_000: 3064: case 0b1001_010_000: 3065: case 0b1001_011_000: 3066: case 0b1001_100_000: 3067: case 0b1001_101_000: 3068: case 0b1001_110_000: 3069: case 0b1001_111_000: 3070: irpSubToRegByte (); 3071: break irpSwitch; 3072: 3073: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3074: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3075: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3076: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3077: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 3078: case 0b1001_000_001: 3079: case 0b1001_001_001: 3080: case 0b1001_010_001: 3081: case 0b1001_011_001: 3082: case 0b1001_100_001: 3083: case 0b1001_101_001: 3084: case 0b1001_110_001: 3085: case 0b1001_111_001: 3086: irpSubToRegWord (); 3087: break irpSwitch; 3088: 3089: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3090: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3091: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3092: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3093: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 3094: case 0b1001_000_010: 3095: case 0b1001_001_010: 3096: case 0b1001_010_010: 3097: case 0b1001_011_010: 3098: case 0b1001_100_010: 3099: case 0b1001_101_010: 3100: case 0b1001_110_010: 3101: case 0b1001_111_010: 3102: irpSubToRegLong (); 3103: break irpSwitch; 3104: 3105: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3106: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3107: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3108: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3109: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 3110: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 3111: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 3112: case 0b1001_000_011: 3113: case 0b1001_001_011: 3114: case 0b1001_010_011: 3115: case 0b1001_011_011: 3116: case 0b1001_100_011: 3117: case 0b1001_101_011: 3118: case 0b1001_110_011: 3119: case 0b1001_111_011: 3120: irpSubaWord (); 3121: break irpSwitch; 3122: 3123: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3124: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3125: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3126: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3127: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 3128: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 3129: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 3130: case 0b1001_000_100: 3131: case 0b1001_001_100: 3132: case 0b1001_010_100: 3133: case 0b1001_011_100: 3134: case 0b1001_100_100: 3135: case 0b1001_101_100: 3136: case 0b1001_110_100: 3137: case 0b1001_111_100: 3138: irpSubToMemByte (); 3139: break irpSwitch; 3140: 3141: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3142: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3143: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3144: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3145: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 3146: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 3147: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 3148: case 0b1001_000_101: 3149: case 0b1001_001_101: 3150: case 0b1001_010_101: 3151: case 0b1001_011_101: 3152: case 0b1001_100_101: 3153: case 0b1001_101_101: 3154: case 0b1001_110_101: 3155: case 0b1001_111_101: 3156: irpSubToMemWord (); 3157: break irpSwitch; 3158: 3159: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3160: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3161: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3162: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3163: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 3164: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 3165: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 3166: case 0b1001_000_110: 3167: case 0b1001_001_110: 3168: case 0b1001_010_110: 3169: case 0b1001_011_110: 3170: case 0b1001_100_110: 3171: case 0b1001_101_110: 3172: case 0b1001_110_110: 3173: case 0b1001_111_110: 3174: irpSubToMemLong (); 3175: break irpSwitch; 3176: 3177: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3178: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3179: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3180: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3181: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 3182: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 3183: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 3184: case 0b1001_000_111: 3185: case 0b1001_001_111: 3186: case 0b1001_010_111: 3187: case 0b1001_011_111: 3188: case 0b1001_100_111: 3189: case 0b1001_101_111: 3190: case 0b1001_110_111: 3191: case 0b1001_111_111: 3192: irpSubaLong (); 3193: break irpSwitch; 3194: 3195: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3196: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3197: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3198: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3199: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 3200: case 0b1010_000_000: 3201: case 0b1010_000_001: 3202: case 0b1010_000_010: 3203: case 0b1010_000_011: 3204: case 0b1010_000_100: 3205: case 0b1010_000_101: 3206: case 0b1010_000_110: 3207: case 0b1010_000_111: 3208: case 0b1010_001_000: 3209: case 0b1010_001_001: 3210: case 0b1010_001_010: 3211: case 0b1010_001_011: 3212: case 0b1010_001_100: 3213: case 0b1010_001_101: 3214: case 0b1010_001_110: 3215: case 0b1010_001_111: 3216: case 0b1010_010_000: 3217: case 0b1010_010_001: 3218: case 0b1010_010_010: 3219: case 0b1010_010_011: 3220: case 0b1010_010_100: 3221: case 0b1010_010_101: 3222: case 0b1010_010_110: 3223: case 0b1010_010_111: 3224: case 0b1010_011_000: 3225: case 0b1010_011_001: 3226: case 0b1010_011_010: 3227: case 0b1010_011_011: 3228: case 0b1010_011_100: 3229: case 0b1010_011_101: 3230: case 0b1010_011_110: 3231: case 0b1010_011_111: 3232: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3233: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3234: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3235: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3236: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 3237: case 0b1010_100_000: 3238: case 0b1010_100_001: 3239: case 0b1010_100_010: 3240: case 0b1010_100_011: 3241: case 0b1010_100_100: 3242: case 0b1010_100_101: 3243: case 0b1010_100_110: 3244: case 0b1010_100_111: 3245: case 0b1010_101_000: 3246: case 0b1010_101_001: 3247: case 0b1010_101_010: 3248: case 0b1010_101_011: 3249: case 0b1010_101_100: 3250: case 0b1010_101_101: 3251: case 0b1010_101_110: 3252: case 0b1010_101_111: 3253: case 0b1010_110_000: 3254: case 0b1010_110_001: 3255: case 0b1010_110_010: 3256: case 0b1010_110_011: 3257: case 0b1010_110_100: 3258: case 0b1010_110_101: 3259: case 0b1010_110_110: 3260: case 0b1010_110_111: 3261: case 0b1010_111_000: 3262: case 0b1010_111_001: 3263: case 0b1010_111_010: 3264: case 0b1010_111_011: 3265: case 0b1010_111_100: 3266: case 0b1010_111_101: 3267: case 0b1010_111_110: 3268: case 0b1010_111_111: 3269: irpAline (); 3270: break irpSwitch; 3271: 3272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3273: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3274: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3275: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3276: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 3277: case 0b1011_000_000: 3278: case 0b1011_001_000: 3279: case 0b1011_010_000: 3280: case 0b1011_011_000: 3281: case 0b1011_100_000: 3282: case 0b1011_101_000: 3283: case 0b1011_110_000: 3284: case 0b1011_111_000: 3285: irpCmpByte (); 3286: break irpSwitch; 3287: 3288: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3289: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3290: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3291: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3292: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 3293: case 0b1011_000_001: 3294: case 0b1011_001_001: 3295: case 0b1011_010_001: 3296: case 0b1011_011_001: 3297: case 0b1011_100_001: 3298: case 0b1011_101_001: 3299: case 0b1011_110_001: 3300: case 0b1011_111_001: 3301: irpCmpWord (); 3302: break irpSwitch; 3303: 3304: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3305: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3306: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3307: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3308: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 3309: case 0b1011_000_010: 3310: case 0b1011_001_010: 3311: case 0b1011_010_010: 3312: case 0b1011_011_010: 3313: case 0b1011_100_010: 3314: case 0b1011_101_010: 3315: case 0b1011_110_010: 3316: case 0b1011_111_010: 3317: irpCmpLong (); 3318: break irpSwitch; 3319: 3320: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3321: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3322: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3324: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 3325: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 3326: case 0b1011_000_011: 3327: case 0b1011_001_011: 3328: case 0b1011_010_011: 3329: case 0b1011_011_011: 3330: case 0b1011_100_011: 3331: case 0b1011_101_011: 3332: case 0b1011_110_011: 3333: case 0b1011_111_011: 3334: irpCmpaWord (); 3335: break irpSwitch; 3336: 3337: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3338: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3339: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3340: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3341: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 3342: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 3343: case 0b1011_000_100: 3344: case 0b1011_001_100: 3345: case 0b1011_010_100: 3346: case 0b1011_011_100: 3347: case 0b1011_100_100: 3348: case 0b1011_101_100: 3349: case 0b1011_110_100: 3350: case 0b1011_111_100: 3351: irpEorByte (); 3352: break irpSwitch; 3353: 3354: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3355: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3356: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3357: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3358: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 3359: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 3360: case 0b1011_000_101: 3361: case 0b1011_001_101: 3362: case 0b1011_010_101: 3363: case 0b1011_011_101: 3364: case 0b1011_100_101: 3365: case 0b1011_101_101: 3366: case 0b1011_110_101: 3367: case 0b1011_111_101: 3368: irpEorWord (); 3369: break irpSwitch; 3370: 3371: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3372: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3373: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3374: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3375: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 3376: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 3377: case 0b1011_000_110: 3378: case 0b1011_001_110: 3379: case 0b1011_010_110: 3380: case 0b1011_011_110: 3381: case 0b1011_100_110: 3382: case 0b1011_101_110: 3383: case 0b1011_110_110: 3384: case 0b1011_111_110: 3385: irpEorLong (); 3386: break irpSwitch; 3387: 3388: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3389: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3390: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3391: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3392: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 3393: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 3394: case 0b1011_000_111: 3395: case 0b1011_001_111: 3396: case 0b1011_010_111: 3397: case 0b1011_011_111: 3398: case 0b1011_100_111: 3399: case 0b1011_101_111: 3400: case 0b1011_110_111: 3401: case 0b1011_111_111: 3402: irpCmpaLong (); 3403: break irpSwitch; 3404: 3405: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3406: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3407: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3408: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3409: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 3410: case 0b1100_000_000: 3411: case 0b1100_001_000: 3412: case 0b1100_010_000: 3413: case 0b1100_011_000: 3414: case 0b1100_100_000: 3415: case 0b1100_101_000: 3416: case 0b1100_110_000: 3417: case 0b1100_111_000: 3418: irpAndToRegByte (); 3419: break irpSwitch; 3420: 3421: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3422: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3423: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3424: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3425: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 3426: case 0b1100_000_001: 3427: case 0b1100_001_001: 3428: case 0b1100_010_001: 3429: case 0b1100_011_001: 3430: case 0b1100_100_001: 3431: case 0b1100_101_001: 3432: case 0b1100_110_001: 3433: case 0b1100_111_001: 3434: irpAndToRegWord (); 3435: break irpSwitch; 3436: 3437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3441: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 3442: case 0b1100_000_010: 3443: case 0b1100_001_010: 3444: case 0b1100_010_010: 3445: case 0b1100_011_010: 3446: case 0b1100_100_010: 3447: case 0b1100_101_010: 3448: case 0b1100_110_010: 3449: case 0b1100_111_010: 3450: irpAndToRegLong (); 3451: break irpSwitch; 3452: 3453: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3454: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3455: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3456: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3457: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 3458: case 0b1100_000_011: 3459: case 0b1100_001_011: 3460: case 0b1100_010_011: 3461: case 0b1100_011_011: 3462: case 0b1100_100_011: 3463: case 0b1100_101_011: 3464: case 0b1100_110_011: 3465: case 0b1100_111_011: 3466: irpMuluWord (); 3467: break irpSwitch; 3468: 3469: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3470: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3471: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3472: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3473: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 3474: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 3475: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 3476: case 0b1100_000_100: 3477: case 0b1100_001_100: 3478: case 0b1100_010_100: 3479: case 0b1100_011_100: 3480: case 0b1100_100_100: 3481: case 0b1100_101_100: 3482: case 0b1100_110_100: 3483: case 0b1100_111_100: 3484: irpAndToMemByte (); 3485: break irpSwitch; 3486: 3487: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3488: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3489: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3490: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3491: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 3492: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 3493: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 3494: case 0b1100_000_101: 3495: case 0b1100_001_101: 3496: case 0b1100_010_101: 3497: case 0b1100_011_101: 3498: case 0b1100_100_101: 3499: case 0b1100_101_101: 3500: case 0b1100_110_101: 3501: case 0b1100_111_101: 3502: irpAndToMemWord (); 3503: break irpSwitch; 3504: 3505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3506: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3507: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3508: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3509: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 3510: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 3511: case 0b1100_000_110: 3512: case 0b1100_001_110: 3513: case 0b1100_010_110: 3514: case 0b1100_011_110: 3515: case 0b1100_100_110: 3516: case 0b1100_101_110: 3517: case 0b1100_110_110: 3518: case 0b1100_111_110: 3519: irpAndToMemLong (); 3520: break irpSwitch; 3521: 3522: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3523: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3524: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3525: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3526: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 3527: case 0b1100_000_111: 3528: case 0b1100_001_111: 3529: case 0b1100_010_111: 3530: case 0b1100_011_111: 3531: case 0b1100_100_111: 3532: case 0b1100_101_111: 3533: case 0b1100_110_111: 3534: case 0b1100_111_111: 3535: irpMulsWord (); 3536: break irpSwitch; 3537: 3538: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3539: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3540: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3541: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3542: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 3543: case 0b1101_000_000: 3544: case 0b1101_001_000: 3545: case 0b1101_010_000: 3546: case 0b1101_011_000: 3547: case 0b1101_100_000: 3548: case 0b1101_101_000: 3549: case 0b1101_110_000: 3550: case 0b1101_111_000: 3551: irpAddToRegByte (); 3552: break irpSwitch; 3553: 3554: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3555: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3556: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3557: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3558: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 3559: case 0b1101_000_001: 3560: case 0b1101_001_001: 3561: case 0b1101_010_001: 3562: case 0b1101_011_001: 3563: case 0b1101_100_001: 3564: case 0b1101_101_001: 3565: case 0b1101_110_001: 3566: case 0b1101_111_001: 3567: irpAddToRegWord (); 3568: break irpSwitch; 3569: 3570: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3571: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3572: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3573: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3574: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 3575: case 0b1101_000_010: 3576: case 0b1101_001_010: 3577: case 0b1101_010_010: 3578: case 0b1101_011_010: 3579: case 0b1101_100_010: 3580: case 0b1101_101_010: 3581: case 0b1101_110_010: 3582: case 0b1101_111_010: 3583: irpAddToRegLong (); 3584: break irpSwitch; 3585: 3586: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3587: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3588: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3589: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3590: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 3591: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 3592: case 0b1101_000_011: 3593: case 0b1101_001_011: 3594: case 0b1101_010_011: 3595: case 0b1101_011_011: 3596: case 0b1101_100_011: 3597: case 0b1101_101_011: 3598: case 0b1101_110_011: 3599: case 0b1101_111_011: 3600: irpAddaWord (); 3601: break irpSwitch; 3602: 3603: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3604: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3605: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3606: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3607: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 3608: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 3609: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 3610: case 0b1101_000_100: 3611: case 0b1101_001_100: 3612: case 0b1101_010_100: 3613: case 0b1101_011_100: 3614: case 0b1101_100_100: 3615: case 0b1101_101_100: 3616: case 0b1101_110_100: 3617: case 0b1101_111_100: 3618: irpAddToMemByte (); 3619: break irpSwitch; 3620: 3621: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3622: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3623: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3625: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 3626: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 3627: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 3628: case 0b1101_000_101: 3629: case 0b1101_001_101: 3630: case 0b1101_010_101: 3631: case 0b1101_011_101: 3632: case 0b1101_100_101: 3633: case 0b1101_101_101: 3634: case 0b1101_110_101: 3635: case 0b1101_111_101: 3636: irpAddToMemWord (); 3637: break irpSwitch; 3638: 3639: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3640: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3641: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3642: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3643: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 3644: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 3645: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 3646: case 0b1101_000_110: 3647: case 0b1101_001_110: 3648: case 0b1101_010_110: 3649: case 0b1101_011_110: 3650: case 0b1101_100_110: 3651: case 0b1101_101_110: 3652: case 0b1101_110_110: 3653: case 0b1101_111_110: 3654: irpAddToMemLong (); 3655: break irpSwitch; 3656: 3657: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3658: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3659: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3660: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3661: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 3662: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 3663: case 0b1101_000_111: 3664: case 0b1101_001_111: 3665: case 0b1101_010_111: 3666: case 0b1101_011_111: 3667: case 0b1101_100_111: 3668: case 0b1101_101_111: 3669: case 0b1101_110_111: 3670: case 0b1101_111_111: 3671: irpAddaLong (); 3672: break irpSwitch; 3673: 3674: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3675: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3676: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3678: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 3679: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 3680: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 3681: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 3682: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 3683: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 3684: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 3685: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 3686: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 3687: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 3688: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 3689: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 3690: case 0b1110_000_000: 3691: case 0b1110_001_000: 3692: case 0b1110_010_000: 3693: case 0b1110_011_000: 3694: case 0b1110_100_000: 3695: case 0b1110_101_000: 3696: case 0b1110_110_000: 3697: case 0b1110_111_000: 3698: irpXxrToRegByte (); 3699: break irpSwitch; 3700: 3701: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3702: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3703: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3704: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3705: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 3706: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 3707: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 3708: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 3709: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 3710: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 3711: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 3712: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 3713: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 3714: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 3715: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 3716: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 3717: case 0b1110_000_001: 3718: case 0b1110_001_001: 3719: case 0b1110_010_001: 3720: case 0b1110_011_001: 3721: case 0b1110_100_001: 3722: case 0b1110_101_001: 3723: case 0b1110_110_001: 3724: case 0b1110_111_001: 3725: irpXxrToRegWord (); 3726: break irpSwitch; 3727: 3728: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3729: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3730: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3731: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3732: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 3733: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 3734: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 3735: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 3736: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 3737: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 3738: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 3739: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 3740: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 3741: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 3742: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 3743: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 3744: case 0b1110_000_010: 3745: case 0b1110_001_010: 3746: case 0b1110_010_010: 3747: case 0b1110_011_010: 3748: case 0b1110_100_010: 3749: case 0b1110_101_010: 3750: case 0b1110_110_010: 3751: case 0b1110_111_010: 3752: irpXxrToRegLong (); 3753: break irpSwitch; 3754: 3755: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3756: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3757: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3758: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3759: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 3760: case 0b1110_000_011: 3761: irpAsrToMem (); 3762: break irpSwitch; 3763: 3764: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3765: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3766: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3767: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3768: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 3769: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 3770: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 3771: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 3772: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 3773: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 3774: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 3775: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 3776: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 3777: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 3778: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 3779: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 3780: case 0b1110_000_100: 3781: case 0b1110_001_100: 3782: case 0b1110_010_100: 3783: case 0b1110_011_100: 3784: case 0b1110_100_100: 3785: case 0b1110_101_100: 3786: case 0b1110_110_100: 3787: case 0b1110_111_100: 3788: irpXxlToRegByte (); 3789: break irpSwitch; 3790: 3791: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3792: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3793: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3794: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3795: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 3796: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 3797: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 3798: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 3799: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 3800: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 3801: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 3802: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 3803: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 3804: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 3805: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 3806: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 3807: case 0b1110_000_101: 3808: case 0b1110_001_101: 3809: case 0b1110_010_101: 3810: case 0b1110_011_101: 3811: case 0b1110_100_101: 3812: case 0b1110_101_101: 3813: case 0b1110_110_101: 3814: case 0b1110_111_101: 3815: irpXxlToRegWord (); 3816: break irpSwitch; 3817: 3818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3822: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 3823: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 3824: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 3825: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 3826: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 3827: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 3828: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 3829: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 3830: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 3831: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 3832: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 3833: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 3834: case 0b1110_000_110: 3835: case 0b1110_001_110: 3836: case 0b1110_010_110: 3837: case 0b1110_011_110: 3838: case 0b1110_100_110: 3839: case 0b1110_101_110: 3840: case 0b1110_110_110: 3841: case 0b1110_111_110: 3842: irpXxlToRegLong (); 3843: break irpSwitch; 3844: 3845: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3846: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3847: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3848: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3849: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 3850: case 0b1110_000_111: 3851: irpAslToMem (); 3852: break irpSwitch; 3853: 3854: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3855: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3856: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3857: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3858: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 3859: case 0b1110_001_011: 3860: irpLsrToMem (); 3861: break irpSwitch; 3862: 3863: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3864: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3865: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3866: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3867: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 3868: case 0b1110_001_111: 3869: irpLslToMem (); 3870: break irpSwitch; 3871: 3872: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3873: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3874: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3875: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3876: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 3877: case 0b1110_010_011: 3878: irpRoxrToMem (); 3879: break irpSwitch; 3880: 3881: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3882: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3883: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3884: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3885: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 3886: case 0b1110_010_111: 3887: irpRoxlToMem (); 3888: break irpSwitch; 3889: 3890: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3891: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3892: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3893: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3894: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 3895: case 0b1110_011_011: 3896: irpRorToMem (); 3897: break irpSwitch; 3898: 3899: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3900: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3901: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3902: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3903: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 3904: case 0b1110_011_111: 3905: irpRolToMem (); 3906: break irpSwitch; 3907: 3908: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3909: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3910: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3911: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3912: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 3913: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 3914: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 3915: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 3916: case 0b1110_100_011: 3917: irpBftst (); 3918: break irpSwitch; 3919: 3920: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3921: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3922: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3923: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3924: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 3925: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 3926: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 3927: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 3928: case 0b1110_100_111: 3929: irpBfextu (); 3930: break irpSwitch; 3931: 3932: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3933: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3934: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3935: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3936: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 3937: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 3938: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 3939: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 3940: case 0b1110_101_011: 3941: irpBfchg (); 3942: break irpSwitch; 3943: 3944: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3945: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3946: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3947: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3948: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 3949: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 3950: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 3951: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 3952: case 0b1110_101_111: 3953: irpBfexts (); 3954: break irpSwitch; 3955: 3956: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3957: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3958: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3959: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3960: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 3961: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 3962: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 3963: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 3964: case 0b1110_110_011: 3965: irpBfclr (); 3966: break irpSwitch; 3967: 3968: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3969: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3970: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3971: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3972: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 3973: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 3974: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 3975: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 3976: case 0b1110_110_111: 3977: irpBfffo (); 3978: break irpSwitch; 3979: 3980: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3981: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3982: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3983: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3984: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 3985: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 3986: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 3987: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 3988: case 0b1110_111_011: 3989: irpBfset (); 3990: break irpSwitch; 3991: 3992: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3993: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 3994: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 3995: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 3996: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 3997: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 3998: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 3999: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 4000: case 0b1110_111_111: 4001: irpBfins (); 4002: break irpSwitch; 4003: 4004: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4005: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4006: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4007: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4008: //PFLUSHA |-|---3--|P|-----|-----| |1111_000_000_000_000-0010010000000000 4009: //PFLUSH SFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00000 4010: //PFLUSH DFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00001 4011: //PFLUSH Dn,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm01nnn 4012: //PFLUSH #<data>,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm10ddd 4013: //PMOVE.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0000000000 4014: //PMOVEFD.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0100000000 4015: //PMOVE.L TTn,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n1000000000 4016: //PLOADW SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000000 4017: //PLOADW DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000001 4018: //PLOADW Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000001nnn 4019: //PLOADW #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000010ddd 4020: //PLOADR SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000000 4021: //PLOADR DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000001 4022: //PLOADR Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000001nnn 4023: //PLOADR #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000010ddd 4024: //PFLUSH SFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00000 4025: //PFLUSH DFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00001 4026: //PFLUSH Dn,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm01nnn 4027: //PFLUSH #<data>,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm10ddd 4028: //PMOVE.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000000000000 4029: //PMOVEFD.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000100000000 4030: //PMOVE.L TC,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100001000000000 4031: //PMOVE.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100000000000 4032: //PMOVEFD.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100100000000 4033: //PMOVE.Q SRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100101000000000 4034: //PMOVE.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110000000000 4035: //PMOVEFD.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110100000000 4036: //PMOVE.Q CRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100111000000000 4037: //PMOVE.W <ea>,MMUSR |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110000000000000 4038: //PMOVE.W MMUSR,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110001000000000 4039: //PTESTW SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000000 4040: //PTESTW DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000001 4041: //PTESTW Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000001nnn 4042: //PTESTW #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000010ddd 4043: //PTESTW SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00000 4044: //PTESTW DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00001 4045: //PTESTW Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn01nnn 4046: //PTESTW #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn10ddd 4047: //PTESTR SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000000 4048: //PTESTR DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000001 4049: //PTESTR Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000001nnn 4050: //PTESTR #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000010ddd 4051: //PTESTR SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00000 4052: //PTESTR DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00001 4053: //PTESTR Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn01nnn 4054: //PTESTR #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn10ddd 4055: case 0b1111_000_000: 4056: irpPgen (); 4057: break irpSwitch; 4058: 4059: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4060: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4061: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4062: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4063: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 4064: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 4065: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 4066: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 4067: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 4068: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 4069: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 4070: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 4071: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 4072: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 4073: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 4074: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 4075: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 4076: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 4077: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 4078: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 4079: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 4080: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 4081: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 4082: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 4083: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 4084: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 4085: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 4086: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 4087: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 4088: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 4089: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 4090: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 4091: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 4092: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 4093: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 4094: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 4095: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 4096: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 4097: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 4098: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 4099: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 4100: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 4101: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 4102: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 4103: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 4104: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 4105: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 4106: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4107: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 4108: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4109: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 4110: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4111: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 4112: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 4113: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 4114: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 4115: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 4116: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 4117: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 4118: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 4119: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 4120: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 4121: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 4122: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 4123: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 4124: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 4125: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 4126: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 4127: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 4128: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 4129: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 4130: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 4131: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 4132: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 4133: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 4134: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 4135: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 4136: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 4137: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 4138: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 4139: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 4140: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 4141: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 4142: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 4143: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 4144: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 4145: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 4146: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 4147: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 4148: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 4149: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 4150: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 4151: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 4152: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 4153: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 4154: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 4155: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 4156: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 4157: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 4158: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 4159: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 4160: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 4161: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 4162: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 4163: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 4164: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 4165: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 4166: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 4167: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 4168: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 4169: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 4170: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 4171: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 4172: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 4173: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 4174: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 4175: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 4176: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 4177: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 4178: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 4179: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 4180: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 4181: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 4182: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 4183: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 4184: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 4185: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 4186: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 4187: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 4188: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 4189: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 4190: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 4191: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 4192: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 4193: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 4194: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 4195: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 4196: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 4197: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 4198: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 4199: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 4200: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 4201: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 4202: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 4203: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 4204: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 4205: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 4206: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 4207: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 4208: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 4209: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 4210: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 4211: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 4212: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 4213: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 4214: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 4215: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 4216: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 4217: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 4218: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 4219: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 4220: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 4221: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 4222: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 4223: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 4224: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 4225: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 4226: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 4227: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 4228: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 4229: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 4230: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 4231: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 4232: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 4233: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 4234: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 4235: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 4236: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 4237: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 4238: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 4239: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 4240: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 4241: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 4242: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 4243: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 4244: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 4245: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 4246: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 4247: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 4248: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 4249: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 4250: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 4251: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 4252: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 4253: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 4254: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 4255: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 4256: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 4257: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 4258: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 4259: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 4260: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 4261: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 4262: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 4263: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 4264: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4265: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 4266: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4267: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 4268: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4269: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 4270: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 4271: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 4272: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 4273: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 4274: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 4275: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 4276: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 4277: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 4278: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 4279: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 4280: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 4281: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 4282: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 4283: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 4284: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 4285: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 4286: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 4287: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 4288: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 4289: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 4290: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 4291: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 4292: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 4293: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 4294: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 4295: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 4296: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 4297: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 4298: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 4299: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 4300: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 4301: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 4302: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 4303: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 4304: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 4305: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 4306: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 4307: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 4308: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 4309: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 4310: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 4311: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 4312: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 4313: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 4314: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 4315: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 4316: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 4317: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 4318: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 4319: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 4320: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 4321: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 4322: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 4323: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 4324: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 4325: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 4326: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 4327: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 4328: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 4329: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 4330: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 4331: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 4332: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 4333: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 4334: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 4335: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 4336: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 4337: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 4338: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 4339: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 4340: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 4341: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 4342: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 4343: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 4344: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 4345: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 4346: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 4347: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 4348: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 4349: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 4350: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 4351: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 4352: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 4353: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 4354: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 4355: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 4356: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 4357: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 4358: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 4359: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 4360: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 4361: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 4362: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 4363: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 4364: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 4365: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 4366: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 4367: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 4368: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 4369: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 4370: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 4371: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 4372: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 4373: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 4374: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 4375: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 4376: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 4377: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 4378: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 4379: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 4380: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 4381: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 4382: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 4383: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 4384: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 4385: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 4386: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 4387: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 4388: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 4389: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 4390: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 4391: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 4392: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 4393: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 4394: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 4395: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 4396: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 4397: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 4398: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 4399: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 4400: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 4401: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 4402: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 4403: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 4404: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 4405: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 4406: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 4407: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 4408: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 4409: case 0b1111_001_000: 4410: irpFgen (); 4411: break irpSwitch; 4412: 4413: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4414: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4415: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4416: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4417: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 4418: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 4419: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 4420: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 4421: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 4422: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 4423: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 4424: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 4425: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 4426: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 4427: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 4428: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 4429: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 4430: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 4431: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 4432: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 4433: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 4434: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 4435: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 4436: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 4437: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 4438: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 4439: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 4440: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 4441: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 4442: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 4443: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 4444: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 4445: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 4446: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 4447: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 4448: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 4449: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 4450: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 4451: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 4452: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 4453: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 4454: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 4455: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 4456: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 4457: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 4458: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 4459: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 4460: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 4461: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 4462: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 4463: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 4464: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 4465: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 4466: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 4467: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 4468: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 4469: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 4470: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 4471: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 4472: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 4473: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 4474: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 4475: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 4476: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 4477: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 4478: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 4479: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 4480: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 4481: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 4482: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 4483: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 4484: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 4485: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 4486: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 4487: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 4488: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 4489: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 4490: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 4491: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 4492: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 4493: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 4494: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 4495: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 4496: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 4497: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 4498: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 4499: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 4500: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 4501: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 4502: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 4503: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 4504: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 4505: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 4506: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 4507: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 4508: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 4509: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 4510: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 4511: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 4512: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 4513: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 4514: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 4515: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 4516: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 4517: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 4518: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 4519: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 4520: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 4521: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 4522: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 4523: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 4524: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 4525: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 4526: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 4527: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 4528: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 4529: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 4530: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 4531: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 4532: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 4533: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 4534: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 4535: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 4536: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 4537: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 4538: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 4539: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 4540: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 4541: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 4542: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 4543: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 4544: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 4545: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 4546: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 4547: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 4548: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 4549: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 4550: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 4551: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 4552: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 4553: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 4554: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 4555: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 4556: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 4557: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 4558: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 4559: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 4560: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 4561: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 4562: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 4563: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 4564: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 4565: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 4566: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 4567: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 4568: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 4569: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 4570: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 4571: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 4572: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 4573: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 4574: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 4575: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 4576: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 4577: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 4578: case 0b1111_001_001: 4579: irpFscc (); 4580: break irpSwitch; 4581: 4582: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4583: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4584: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4585: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4586: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 4587: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 4588: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 4589: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 4590: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 4591: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 4592: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 4593: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 4594: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 4595: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 4596: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 4597: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 4598: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 4599: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 4600: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 4601: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 4602: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 4603: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 4604: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 4605: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 4606: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 4607: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 4608: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 4609: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 4610: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 4611: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 4612: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 4613: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 4614: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 4615: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 4616: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 4617: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 4618: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 4619: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 4620: case 0b1111_001_010: 4621: irpFbccWord (); 4622: break irpSwitch; 4623: 4624: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4625: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4626: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4627: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4628: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 4629: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 4630: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 4631: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 4632: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 4633: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 4634: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 4635: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 4636: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 4637: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 4638: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 4639: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 4640: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 4641: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 4642: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 4643: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 4644: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 4645: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 4646: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 4647: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 4648: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 4649: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 4650: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 4651: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 4652: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 4653: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 4654: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 4655: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 4656: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 4657: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 4658: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 4659: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 4660: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 4661: case 0b1111_001_011: 4662: irpFbccLong (); 4663: break irpSwitch; 4664: 4665: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4666: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4667: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4668: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4669: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 4670: case 0b1111_001_100: 4671: irpFsave (); 4672: break irpSwitch; 4673: 4674: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4675: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4676: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4677: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4678: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 4679: case 0b1111_001_101: 4680: irpFrestore (); 4681: break irpSwitch; 4682: 4683: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4684: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4685: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4686: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4687: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 4688: case 0b1111_111_000: 4689: case 0b1111_111_001: 4690: case 0b1111_111_010: 4691: case 0b1111_111_011: 4692: irpFpack (); 4693: break irpSwitch; 4694: 4695: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4696: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4697: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4698: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4699: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 4700: case 0b1111_111_100: 4701: case 0b1111_111_101: 4702: case 0b1111_111_110: 4703: case 0b1111_111_111: 4704: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4705: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4706: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4707: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4708: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 4709: case 0b1111_000_001: 4710: case 0b1111_000_010: 4711: case 0b1111_000_011: 4712: case 0b1111_000_100: 4713: case 0b1111_000_101: 4714: case 0b1111_000_110: 4715: case 0b1111_000_111: 4716: case 0b1111_001_110: 4717: case 0b1111_001_111: 4718: case 0b1111_010_000: 4719: case 0b1111_010_001: 4720: case 0b1111_010_010: 4721: case 0b1111_010_011: 4722: case 0b1111_010_100: 4723: case 0b1111_010_101: 4724: case 0b1111_010_110: 4725: case 0b1111_010_111: 4726: case 0b1111_011_000: 4727: case 0b1111_011_001: 4728: case 0b1111_011_010: 4729: case 0b1111_011_011: 4730: case 0b1111_011_100: 4731: case 0b1111_011_101: 4732: case 0b1111_011_110: 4733: case 0b1111_011_111: 4734: case 0b1111_100_000: 4735: case 0b1111_100_001: 4736: case 0b1111_100_010: 4737: case 0b1111_100_011: 4738: case 0b1111_100_100: 4739: case 0b1111_100_101: 4740: case 0b1111_100_110: 4741: case 0b1111_100_111: 4742: case 0b1111_101_000: 4743: case 0b1111_101_001: 4744: case 0b1111_101_010: 4745: case 0b1111_101_011: 4746: case 0b1111_101_100: 4747: case 0b1111_101_101: 4748: case 0b1111_101_110: 4749: case 0b1111_101_111: 4750: case 0b1111_110_000: 4751: case 0b1111_110_001: 4752: case 0b1111_110_010: 4753: case 0b1111_110_011: 4754: case 0b1111_110_100: 4755: case 0b1111_110_101: 4756: case 0b1111_110_110: 4757: case 0b1111_110_111: 4758: irpFline (); 4759: break irpSwitch; 4760: 4761: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4762: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 4763: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 4764: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 4765: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 4766: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 4767: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 4768: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 4769: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 4770: case 0b0100_111_000: 4771: irpEmx (); 4772: break; 4773: 4774: default: 4775: irpIllegal (); 4776: 4777: } //switch XEiJ.regOC >>> 6 4778: 4779: //トレース例外 4780: // 命令実行前にsrのTビットがセットされていたとき命令実行後にトレース例外が発生する 4781: // トレース例外の発動は命令の機能拡張であり、他の例外処理で命令が中断されたときはトレース例外は発生しない 4782: // 命令例外はトレース例外の前に、割り込み例外はトレース例外の後に処理される 4783: // 未実装命令のエミュレーションルーチンはrteの直前にsrのTビットを復元することで未実装命令が1個の命令としてトレースされたように見せる 4784: // ;DOSコールの終了 4785: // ~008616: 4786: // btst.b #$07,(sp) 4787: // bne.s ~00861E 4788: // rte 4789: // ~00861E: 4790: // ori.w #$8000,sr 4791: // rte 4792: if (XEiJ.mpuTraceFlag != 0) { //命令実行前にsrのTビットがセットされていた 4793: XEiJ.mpuCycleCount += 34; 4794: irpException (M68kException.M6E_TRACE, XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x2000, XEiJ.regPC0); //pcは次の命令 4795: } 4796: //クロックをカウントアップする 4797: // オペランドをアクセスした時点ではまだXEiJ.mpuClockTimeが更新されていないのでXEiJ.mpuClockTime<xxxClock 4798: // xxxTickを呼び出すときはXEiJ.mpuClockTime>=xxxClock 4799: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * XEiJ.mpuCycleCount; 4800: //デバイスを呼び出す 4801: TickerQueue.tkqRun (XEiJ.mpuClockTime); 4802: //割り込みを受け付ける 4803: if ((t = XEiJ.mpuIMR & XEiJ.mpuIRR) != 0) { //マスクされているレベルよりも高くて受け付けていない割り込みがあるとき 4804: if (XEiJ.MPU_INTERRUPT_SWITCH) { 4805: switch (t) { 4806: case 0b00000001: 4807: case 0b00000011: 4808: case 0b00000101: 4809: case 0b00000111: 4810: case 0b00001001: 4811: case 0b00001011: 4812: case 0b00001101: 4813: case 0b00001111: 4814: case 0b00010001: 4815: case 0b00010011: 4816: case 0b00010101: 4817: case 0b00010111: 4818: case 0b00011001: 4819: case 0b00011011: 4820: case 0b00011101: 4821: case 0b00011111: 4822: case 0b00100001: 4823: case 0b00100011: 4824: case 0b00100101: 4825: case 0b00100111: 4826: case 0b00101001: 4827: case 0b00101011: 4828: case 0b00101101: 4829: case 0b00101111: 4830: case 0b00110001: 4831: case 0b00110011: 4832: case 0b00110101: 4833: case 0b00110111: 4834: case 0b00111001: 4835: case 0b00111011: 4836: case 0b00111101: 4837: case 0b00111111: 4838: case 0b01000001: 4839: case 0b01000011: 4840: case 0b01000101: 4841: case 0b01000111: 4842: case 0b01001001: 4843: case 0b01001011: 4844: case 0b01001101: 4845: case 0b01001111: 4846: case 0b01010001: 4847: case 0b01010011: 4848: case 0b01010101: 4849: case 0b01010111: 4850: case 0b01011001: 4851: case 0b01011011: 4852: case 0b01011101: 4853: case 0b01011111: 4854: case 0b01100001: 4855: case 0b01100011: 4856: case 0b01100101: 4857: case 0b01100111: 4858: case 0b01101001: 4859: case 0b01101011: 4860: case 0b01101101: 4861: case 0b01101111: 4862: case 0b01110001: 4863: case 0b01110011: 4864: case 0b01110101: 4865: case 0b01110111: 4866: case 0b01111001: 4867: case 0b01111011: 4868: case 0b01111101: 4869: case 0b01111111: 4870: case 0b10000001: 4871: case 0b10000011: 4872: case 0b10000101: 4873: case 0b10000111: 4874: case 0b10001001: 4875: case 0b10001011: 4876: case 0b10001101: 4877: case 0b10001111: 4878: case 0b10010001: 4879: case 0b10010011: 4880: case 0b10010101: 4881: case 0b10010111: 4882: case 0b10011001: 4883: case 0b10011011: 4884: case 0b10011101: 4885: case 0b10011111: 4886: case 0b10100001: 4887: case 0b10100011: 4888: case 0b10100101: 4889: case 0b10100111: 4890: case 0b10101001: 4891: case 0b10101011: 4892: case 0b10101101: 4893: case 0b10101111: 4894: case 0b10110001: 4895: case 0b10110011: 4896: case 0b10110101: 4897: case 0b10110111: 4898: case 0b10111001: 4899: case 0b10111011: 4900: case 0b10111101: 4901: case 0b10111111: 4902: case 0b11000001: 4903: case 0b11000011: 4904: case 0b11000101: 4905: case 0b11000111: 4906: case 0b11001001: 4907: case 0b11001011: 4908: case 0b11001101: 4909: case 0b11001111: 4910: case 0b11010001: 4911: case 0b11010011: 4912: case 0b11010101: 4913: case 0b11010111: 4914: case 0b11011001: 4915: case 0b11011011: 4916: case 0b11011101: 4917: case 0b11011111: 4918: case 0b11100001: 4919: case 0b11100011: 4920: case 0b11100101: 4921: case 0b11100111: 4922: case 0b11101001: 4923: case 0b11101011: 4924: case 0b11101101: 4925: case 0b11101111: 4926: case 0b11110001: 4927: case 0b11110011: 4928: case 0b11110101: 4929: case 0b11110111: 4930: case 0b11111001: 4931: case 0b11111011: 4932: case 0b11111101: 4933: case 0b11111111: 4934: //レベル7 4935: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 4936: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 4937: irpInterrupt (t, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 4938: } 4939: break; 4940: case 0b00000010: 4941: case 0b00000110: 4942: case 0b00001010: 4943: case 0b00001110: 4944: case 0b00010010: 4945: case 0b00010110: 4946: case 0b00011010: 4947: case 0b00011110: 4948: case 0b00100010: 4949: case 0b00100110: 4950: case 0b00101010: 4951: case 0b00101110: 4952: case 0b00110010: 4953: case 0b00110110: 4954: case 0b00111010: 4955: case 0b00111110: 4956: case 0b01000010: 4957: case 0b01000110: 4958: case 0b01001010: 4959: case 0b01001110: 4960: case 0b01010010: 4961: case 0b01010110: 4962: case 0b01011010: 4963: case 0b01011110: 4964: case 0b01100010: 4965: case 0b01100110: 4966: case 0b01101010: 4967: case 0b01101110: 4968: case 0b01110010: 4969: case 0b01110110: 4970: case 0b01111010: 4971: case 0b01111110: 4972: case 0b10000010: 4973: case 0b10000110: 4974: case 0b10001010: 4975: case 0b10001110: 4976: case 0b10010010: 4977: case 0b10010110: 4978: case 0b10011010: 4979: case 0b10011110: 4980: case 0b10100010: 4981: case 0b10100110: 4982: case 0b10101010: 4983: case 0b10101110: 4984: case 0b10110010: 4985: case 0b10110110: 4986: case 0b10111010: 4987: case 0b10111110: 4988: case 0b11000010: 4989: case 0b11000110: 4990: case 0b11001010: 4991: case 0b11001110: 4992: case 0b11010010: 4993: case 0b11010110: 4994: case 0b11011010: 4995: case 0b11011110: 4996: case 0b11100010: 4997: case 0b11100110: 4998: case 0b11101010: 4999: case 0b11101110: 5000: case 0b11110010: 5001: case 0b11110110: 5002: case 0b11111010: 5003: case 0b11111110: 5004: //レベル6 5005: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5006: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5007: irpInterrupt (t, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5008: } 5009: break; 5010: case 0b00000100: 5011: case 0b00001100: 5012: case 0b00010100: 5013: case 0b00011100: 5014: case 0b00100100: 5015: case 0b00101100: 5016: case 0b00110100: 5017: case 0b00111100: 5018: case 0b01000100: 5019: case 0b01001100: 5020: case 0b01010100: 5021: case 0b01011100: 5022: case 0b01100100: 5023: case 0b01101100: 5024: case 0b01110100: 5025: case 0b01111100: 5026: case 0b10000100: 5027: case 0b10001100: 5028: case 0b10010100: 5029: case 0b10011100: 5030: case 0b10100100: 5031: case 0b10101100: 5032: case 0b10110100: 5033: case 0b10111100: 5034: case 0b11000100: 5035: case 0b11001100: 5036: case 0b11010100: 5037: case 0b11011100: 5038: case 0b11100100: 5039: case 0b11101100: 5040: case 0b11110100: 5041: case 0b11111100: 5042: //レベル5 5043: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5044: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5045: irpInterrupt (t, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5046: } 5047: break; 5048: case 0b00010000: 5049: case 0b00110000: 5050: case 0b01010000: 5051: case 0b01110000: 5052: case 0b10010000: 5053: case 0b10110000: 5054: case 0b11010000: 5055: case 0b11110000: 5056: //レベル3 5057: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5058: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5059: irpInterrupt (t, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5060: } 5061: break; 5062: case 0b00100000: 5063: case 0b01100000: 5064: case 0b10100000: 5065: case 0b11100000: 5066: //レベル2 5067: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5068: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5069: irpInterrupt (t, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5070: } 5071: break; 5072: case 0b01000000: 5073: case 0b11000000: 5074: //レベル1 5075: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5076: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5077: irpInterrupt (t, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5078: } 5079: break; 5080: } 5081: } else { 5082: t &= -t; 5083: // x&=-xはxの最下位の1のビットだけを残す演算 5084: // すなわちマスクされているレベルよりも高くて受け付けていない割り込みの中で最高レベルの割り込みのビットだけが残る 5085: // 最高レベルの割り込みのビットしか残っていないので、割り込みの有無をレベルの高い順ではなく使用頻度の高い順に調べられる 5086: // MFPやDMAの割り込みがかかる度にそれより優先度の高いインタラプトスイッチが押されていないかどうかを確かめる必要がない 5087: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { 5088: XEiJ.mpuIRR &= ~XEiJ.MPU_MFP_INTERRUPT_MASK; //割り込みを受け付ける 5089: if ((t = MC68901.mfpAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5090: irpInterrupt (t, XEiJ.MPU_MFP_INTERRUPT_LEVEL); //割り込み処理を開始する 5091: } 5092: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { 5093: XEiJ.mpuIRR &= ~XEiJ.MPU_DMA_INTERRUPT_MASK; //割り込みを受け付ける 5094: if ((t = HD63450.dmaAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5095: irpInterrupt (t, XEiJ.MPU_DMA_INTERRUPT_LEVEL); //割り込み処理を開始する 5096: } 5097: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { 5098: XEiJ.mpuIRR &= ~XEiJ.MPU_SCC_INTERRUPT_MASK; //割り込みを受け付ける 5099: if ((t = Z8530.sccAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5100: irpInterrupt (t, XEiJ.MPU_SCC_INTERRUPT_LEVEL); //割り込み処理を開始する 5101: } 5102: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { 5103: XEiJ.mpuIRR &= ~XEiJ.MPU_IOI_INTERRUPT_MASK; //割り込みを受け付ける 5104: if ((t = IOInterrupt.ioiAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5105: irpInterrupt (t, XEiJ.MPU_IOI_INTERRUPT_LEVEL); //割り込み処理を開始する 5106: } 5107: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { 5108: XEiJ.mpuIRR &= ~XEiJ.MPU_EB2_INTERRUPT_MASK; //割り込みを受け付ける 5109: if ((t = XEiJ.eb2Acknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5110: irpInterrupt (t, XEiJ.MPU_EB2_INTERRUPT_LEVEL); //割り込み処理を開始する 5111: } 5112: } else if (t == XEiJ.MPU_SYS_INTERRUPT_MASK) { 5113: XEiJ.mpuIRR &= ~XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みを受け付ける 5114: if ((t = XEiJ.sysAcknowledge ()) != 0) { //デバイスにベクタ番号を要求して割り込み処理中の状態になったとき 5115: irpInterrupt (t, XEiJ.MPU_SYS_INTERRUPT_LEVEL); //割り込み処理を開始する 5116: } 5117: } 5118: } 5119: } //if t!=0 5120: if (MC68901.MFP_DELAYED_INTERRUPT) { 5121: XEiJ.mpuIRR |= XEiJ.mpuDIRR; //遅延割り込み要求 5122: XEiJ.mpuDIRR = 0; 5123: } 5124: } //命令ループ 5125: } catch (M68kException e) { 5126: if (M68kException.m6eNumber < 0) { //命令ブレークポイントによる停止 5127: XEiJ.regPC = XEiJ.regPC0; 5128: XEiJ.mpuStop1 (null); //"Instruction Break Point" 5129: break errorLoop; 5130: } 5131: //例外処理 5132: // ここで処理するのはベクタ番号が2～31の例外に限る。TRAP #n命令はインライン展開する 5133: // 例外処理のサイクル数はBUS_ERRORとADDRESS_ERROR以外は34になっているので必要ならば補正してからthrowする 5134: // 使用頻度が高いと思われる例外はインライン展開するのでここには来ない 5135: // 例外処理をインライン展開する場合はMC68000とMC68030のコードを分けなければならずコードが冗長になる 5136: // 使用頻度が低いと思われる例外はインライン展開しない 5137: // セーブされるpcは以下の例外は命令の先頭、これ以外は次の命令 5138: // 2 BUS_ERROR 5139: // 3 ADDRESS_ERROR 5140: // 4 ILLEGAL_INSTRUCTION 5141: // 8 PRIVILEGE_VIOLATION 5142: // 10 LINE_1010_EMULATOR 5143: // 11 LINE_1111_EMULATOR 5144: // fedcba9876543210fedcba9876543210 5145: //if ((1 << M68kException.m6eNumber & 0b00000000000000000000110100011100) != 0) { 5146: // 0123456789abcdef0123456789abcdef 5147: if (0b00111000101100000000000000000000 << M68kException.m6eNumber < 0) { 5148: XEiJ.regPC = XEiJ.regPC0; //セーブされるpcは命令の先頭 5149: } 5150: try { 5151: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 5152: int sp = XEiJ.regRn[15]; 5153: XEiJ.regSRT1 = XEiJ.regSRT0 = 0; //srのTビットを消す 5154: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5155: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 5156: XEiJ.mpuUSP = sp; //USPを保存 5157: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 5158: if (DataBreakPoint.DBP_ON) { 5159: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 5160: } else { 5161: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 5162: } 5163: if (InstructionBreakPoint.IBP_ON) { 5164: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 5165: } 5166: } 5167: if (M68kException.m6eNumber <= M68kException.M6E_ADDRESS_ERROR) { 5168: //ホストファイルシステムのデバイスコマンドを強制終了させる 5169: HFS.hfsState = HFS.HFS_STATE_IDLE; 5170: XEiJ.mpuClockTime += 50 * XEiJ.mpuModifiedUnit; 5171: if (false) { 5172: //FORMAT $Aの例外スタックフレームを作る 5173: // 命令境界のバスエラーまたはアドレスエラー 5174: XEiJ.regRn[15] = sp -= 32; 5175: XEiJ.busWl (sp + 28, 0); //31-30:内部レジスタ,29-28:内部レジスタ 5176: XEiJ.busWl (sp + 24, 0); //27-24:データ出力バッファ 5177: XEiJ.busWl (sp + 20, 0); //23-22:内部レジスタ,21-20:内部レジスタ 5178: XEiJ.busWl (sp + 16, M68kException.m6eAddress); //19-16:データサイクルフォルトアドレス 5179: XEiJ.busWl (sp + 12, 0); //15-14:命令パイプステージB,13-12:命令パイプステージC 5180: XEiJ.busWw (sp + 10, 5181: M68kException.m6eDirection << 6 | 5182: (M68kException.m6eSize == XEiJ.MPU_SS_BYTE ? 1 << 4 : 5183: M68kException.m6eSize == XEiJ.MPU_SS_WORD ? 2 << 4 : 0)); //11-10:特殊ステータスワード 5184: XEiJ.busWw (sp + 8, 0); //9-8:内部レジスタ 5185: XEiJ.busWw (sp + 6, 0xa000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5186: } else { 5187: //FORMAT $Bの例外スタックフレームを作る 5188: // 命令途中のバスエラーまたはアドレスエラー 5189: XEiJ.regRn[15] = sp -= 92; 5190: XEiJ.busWl (sp + 88, 0); //91-58:内部レジスタ 5191: XEiJ.busWl (sp + 84, 0); 5192: XEiJ.busWl (sp + 80, 0); 5193: XEiJ.busWl (sp + 76, 0); 5194: XEiJ.busWl (sp + 72, 0); 5195: XEiJ.busWl (sp + 68, 0); 5196: XEiJ.busWl (sp + 64, 0); 5197: XEiJ.busWl (sp + 60, 0); 5198: XEiJ.busWl (sp + 56, 0); //57-56:バージョンナンバーと内部情報 5199: XEiJ.busWl (sp + 52, 0); 5200: XEiJ.busWl (sp + 48, 0); //53-48:内部レジスタ 5201: XEiJ.busWl (sp + 44, 0); //47-44:データ入力バッファ 5202: XEiJ.busWl (sp + 40, 0); //43-40:内部レジスタ 5203: XEiJ.busWl (sp + 36, 0); //39-36:ステージBアドレス 5204: XEiJ.busWl (sp + 32, 0); //35-28:内部レジスタ 5205: XEiJ.busWl (sp + 28, 0); 5206: XEiJ.busWl (sp + 24, 0); //27-24:データ出力バッファ 5207: XEiJ.busWl (sp + 20, 0); //23-22:内部レジスタ,21-20:内部レジスタ 5208: XEiJ.busWl (sp + 16, M68kException.m6eAddress); //19-16:データサイクルフォルトアドレス 5209: XEiJ.busWl (sp + 12, 0); //15-14:命令パイプステージB,13-12:命令パイプステージC 5210: XEiJ.busWw (sp + 10, 5211: M68kException.m6eDirection << 6 | 5212: (M68kException.m6eSize == XEiJ.MPU_SS_BYTE ? 1 << 4 : 5213: M68kException.m6eSize == XEiJ.MPU_SS_WORD ? 2 << 4 : 0)); //11-10:特殊ステータスワード 5214: XEiJ.busWw (sp + 8, 0); //9-8:内部レジスタ 5215: XEiJ.busWw (sp + 6, 0xb000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5216: } 5217: // 111111111122222222223333333333444444444455555555556666 5218: // 0123456789012345678901234567890123456789012345678901234567890123 5219: } else if (0b0001011101000000000000000000000000000000000000000000000000000000L << M68kException.m6eNumber < 0L) { 5220: //FORMAT $2の例外スタックフレームを作る 5221: XEiJ.mpuClockTime += 34 * XEiJ.mpuModifiedUnit; 5222: XEiJ.regRn[15] = sp -= 12; 5223: XEiJ.busWl (sp + 8, M68kException.m6eAddress); //11-8:命令アドレス 5224: XEiJ.busWw (sp + 6, 0x2000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5225: } else { 5226: //FORMAT $0の例外スタックフレームを作る 5227: XEiJ.mpuClockTime += 34 * XEiJ.mpuModifiedUnit; 5228: XEiJ.regRn[15] = sp -= 8; 5229: XEiJ.busWw (sp + 6, 0x0000 | M68kException.m6eNumber << 2); //7-6:フォーマットとベクタオフセット 5230: } 5231: XEiJ.busWl (sp + 2, XEiJ.regPC); //5-2:プログラムカウンタ 5232: XEiJ.busWw (sp, save_sr); //1-0:ステータスレジスタ 5233: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.m6eNumber << 2))); //例外ベクタを取り出してジャンプする 5234: if (XEiJ.dbgStopOnError) { //エラーで停止する場合 5235: if (XEiJ.dbgDoStopOnError ()) { 5236: break errorLoop; 5237: } 5238: } 5239: } catch (M68kException ee) { //ダブルバスフォルト 5240: XEiJ.dbgDoubleBusFault (); 5241: break errorLoop; 5242: } 5243: } //catch M68kException 5244: } //例外ループ 5245: 5246: // 通常 5247: // pc0 最後に実行した命令 5248: // pc 次に実行する命令 5249: // バスエラー、アドレスエラー、不当命令、特権違反で停止したとき 5250: // pc0 エラーを発生させた命令 5251: // pc 例外処理ルーチンの先頭 5252: // ダブルバスフォルトで停止したとき 5253: // pc0 エラーを発生させた命令 5254: // pc エラーを発生させた命令 5255: // 命令ブレークポイントで停止したとき 5256: // pc0 命令ブレークポイントが設定された、次に実行する命令 5257: // pc 命令ブレークポイントが設定された、次に実行する命令 5258: // データブレークポイントで停止したとき 5259: // pc0 データを書き換えた、最後に実行した命令 5260: // pc 次に実行する命令 5261: 5262: //分岐ログに停止レコードを記録する 5263: if (BranchLog.BLG_ON) { 5264: //BranchLog.blgStop (); 5265: int i = (char) BranchLog.blgNewestRecord << BranchLog.BLG_RECORD_SHIFT; 5266: BranchLog.blgArray[i] = BranchLog.blgHead | BranchLog.blgSuper; 5267: BranchLog.blgArray[i + 1] = XEiJ.regPC; //次に実行する命令 5268: } 5269: 5270: } //mpuCore() 5271: 5272: 5273: 5274: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5275: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5276: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5277: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5278: //ORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_000_mmm_rrr-{data} 5279: //OR.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_000_mmm_rrr-{data} [ORI.B #<data>,<ea>] 5280: //ORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_000_000_111_100-{data} 5281: public static void irpOriByte () throws M68kException { 5282: int ea = XEiJ.regOC & 63; 5283: int z; 5284: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5285: z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 5286: } else { 5287: z = XEiJ.regPC; 5288: XEiJ.regPC = z + 2; 5289: z = XEiJ.busRbs (z + 1); //pcbs 5290: } 5291: if (ea < XEiJ.EA_AR) { //ORI.B #<data>,Dr 5292: if (XEiJ.DBG_ORI_BYTE_ZERO_D0) { 5293: if (z == 0 && ea == 0 && XEiJ.dbgOriByteZeroD0) { //ORI.B #$00,D0 5294: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 5295: throw M68kException.m6eSignal; 5296: } 5297: } 5298: XEiJ.mpuCycleCount += 8; 5299: z = XEiJ.regRn[ea] |= 255 & z; //0拡張してからOR 5300: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5301: } else if (ea == XEiJ.EA_IM) { //ORI.B #<data>,CCR 5302: XEiJ.mpuCycleCount += 20; 5303: XEiJ.regCCR |= XEiJ.REG_CCR_MASK & z; 5304: } else { //ORI.B #<data>,<mem> 5305: XEiJ.mpuCycleCount += 12; 5306: int a = efaMltByte (ea); 5307: XEiJ.busWb (a, z |= XEiJ.busRbs (a)); 5308: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5309: } 5310: } //irpOriByte 5311: 5312: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5313: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5314: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5315: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5316: //ORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_001_mmm_rrr-{data} 5317: //OR.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_001_mmm_rrr-{data} [ORI.W #<data>,<ea>] 5318: //ORI.W #<data>,SR |-|012346|P|*****|*****| |0000_000_001_111_100-{data} 5319: public static void irpOriWord () throws M68kException { 5320: int ea = XEiJ.regOC & 63; 5321: if (ea < XEiJ.EA_AR) { //ORI.W #<data>,Dr 5322: int z; 5323: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5324: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5325: } else { 5326: z = XEiJ.regPC; 5327: XEiJ.regPC = z + 2; 5328: z = XEiJ.busRwse (z); //pcws 5329: } 5330: XEiJ.mpuCycleCount += 8; 5331: z = XEiJ.regRn[ea] |= (char) z; //0拡張してからOR 5332: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5333: } else if (ea == XEiJ.EA_IM) { //ORI.W #<data>,SR 5334: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5335: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5336: throw M68kException.m6eSignal; 5337: } 5338: //以下はスーパーバイザモード 5339: XEiJ.mpuCycleCount += 20; 5340: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5341: irpSetSR (XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 5342: } else { 5343: int t = XEiJ.regPC; 5344: XEiJ.regPC = t + 2; 5345: irpSetSR (XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR | XEiJ.busRwse (t)); //pcws。特権違反チェックが先 5346: } 5347: } else { //ORI.W #<data>,<mem> 5348: int z; 5349: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5350: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5351: } else { 5352: z = XEiJ.regPC; 5353: XEiJ.regPC = z + 2; 5354: z = XEiJ.busRwse (z); //pcws 5355: } 5356: XEiJ.mpuCycleCount += 12; 5357: int a = efaMltWord (ea); 5358: XEiJ.busWw (a, z |= XEiJ.busRws (a)); 5359: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5360: } 5361: } //irpOriWord 5362: 5363: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5364: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5365: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5366: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5367: //ORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_000_010_mmm_rrr-{data} 5368: //OR.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_000_010_mmm_rrr-{data} [ORI.L #<data>,<ea>] 5369: public static void irpOriLong () throws M68kException { 5370: int ea = XEiJ.regOC & 63; 5371: int y; 5372: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5373: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 5374: } else { 5375: y = XEiJ.regPC; 5376: XEiJ.regPC = y + 4; 5377: y = XEiJ.busRlse (y); //pcls 5378: } 5379: int z; 5380: if (ea < XEiJ.EA_AR) { //ORI.L #<data>,Dr 5381: XEiJ.mpuCycleCount += 16; 5382: z = XEiJ.regRn[ea] |= y; 5383: } else { //ORI.L #<data>,<mem> 5384: XEiJ.mpuCycleCount += 20; 5385: int a = efaMltLong (ea); 5386: XEiJ.busWl (a, z = XEiJ.busRls (a) | y); 5387: } 5388: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5389: } //irpOriLong 5390: 5391: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5392: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5393: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5394: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5395: //BITREV.L Dr |-|------|-|-----|-----|D |0000_000_011_000_rrr (ISA_C) 5396: //CMP2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn000000000000 5397: //CHK2.B <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_000_011_mmm_rrr-rnnn100000000000 5398: // 5399: //BITREV.L Dr 5400: // Drのビットの並びを逆順にする。CCRは変化しない 5401: // 5402: //CHK2.B <ea>,Rn 5403: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5404: // CHK2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5405: // Rnが下限または上限と等しいときZをセットする 5406: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5407: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5408: // CCR 5409: // X 変化しない 5410: // N 変化しない(M68000PRMでは未定義) 5411: // Z Rn-LB==0||Rn-LB==UB-LB 5412: // V 変化しない(M68000PRMでは未定義) 5413: // C Rn-LB>UB-LB(符号なし比較) 5414: // 5415: //CMP2.B <ea>,Rn 5416: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5417: // CMP2.B <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5418: // Rnが下限または上限と等しいときZをセットする 5419: // Rnが範囲外のときCをセットする 5420: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5421: // CCR 5422: // X 変化しない 5423: // N 変化しない(M68000PRMでは未定義) 5424: // Z Rn-LB==0||Rn-LB==UB-LB 5425: // V 変化しない(M68000PRMでは未定義) 5426: // C Rn-LB>UB-LB(符号なし比較) 5427: public static void irpCmp2Chk2Byte () throws M68kException { 5428: int ea = XEiJ.regOC & 63; 5429: if (ea < XEiJ.EA_AR) { //BITREV.L Dr 5430: XEiJ.mpuCycleCount += 4; 5431: if (XEiJ.IRP_BITREV_REVERSE) { //2.83ns 0x0f801f3c 5432: XEiJ.regRn[ea] = Integer.reverse (XEiJ.regRn[ea]); 5433: } else if (XEiJ.IRP_BITREV_SHIFT) { //2.57ns 0x0f801f3c 5434: int x = XEiJ.regRn[ea]; 5435: x = x << 16 | x >>> 16; 5436: x = x << 8 & 0xff00ff00 | x >>> 8 & 0x00ff00ff; 5437: x = x << 4 & 0xf0f0f0f0 | x >>> 4 & 0x0f0f0f0f; 5438: x = x << 2 & 0xcccccccc | x >>> 2 & 0x33333333; 5439: XEiJ.regRn[ea] = x << 1 & 0xaaaaaaaa | x >>> 1 & 0x55555555; 5440: } else if (XEiJ.IRP_BITREV_TABLE) { //1.57ns 0x0f801f3c 5441: int x = XEiJ.regRn[ea]; 5442: XEiJ.regRn[ea] = XEiJ.MPU_BITREV_TABLE_0[x & 2047] | XEiJ.MPU_BITREV_TABLE_1[x << 10 >>> 21] | XEiJ.MPU_BITREV_TABLE_2[x >>> 22]; 5443: } 5444: } else { //CMP2/CHK2.B <ea>,Rn 5445: XEiJ.mpuCycleCount += 8; 5446: int w; 5447: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5448: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 5449: } else { 5450: w = XEiJ.regPC; 5451: XEiJ.regPC = w + 2; 5452: w = XEiJ.busRwze (w); //pcwz 5453: } 5454: int d = XEiJ.regRn[w >> 12]; //Rn 5455: if (0 <= (short) w) { //Dnのとき 5456: d = (byte) d; //符号拡張する 5457: } 5458: int a = efaCntByte (ea); 5459: int l = XEiJ.busRbs (a); //LB 5460: int u = XEiJ.busRbs (a + 1); //UB 5461: //U-D,L-D,D-Lのいずれかに帰着させる 5462: // 参考 5463: // https://twitter.com/moveccr/status/814309539012976640 5464: // https://twitter.com/moveccr/status/814309679845109760 5465: // https://twitter.com/moveccr/status/814310106598871040 5466: int x, y; 5467: if (Integer.compareUnsigned (l, d) < 0 && Integer.compareUnsigned (l, u) <= 0 || d == u) { 5468: x = u; 5469: y = d; 5470: } else if (Integer.compareUnsigned (d, u) < 0 && Integer.compareUnsigned (u, l) < 0) { 5471: x = l; 5472: y = d; 5473: } else { 5474: x = d; 5475: y = l; 5476: } 5477: int z = x - y; 5478: int c = (x & (y ^ z) ^ (y | z)) >>> 31; 5479: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //X 5480: z >>> 28 & XEiJ.REG_CCR_N | //N 5481: (z == 0 ? XEiJ.REG_CCR_Z : 0) | //Z 5482: ((x ^ y) & (x ^ z)) >>> 31 << 1 | //V 5483: c); //C 5484: if ((w >> 11 & c) != 0) { //CHK2でCがセットされたとき 5485: XEiJ.mpuCycleCount += 40 - 8 - 34; 5486: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 5487: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 5488: throw M68kException.m6eSignal; 5489: } 5490: } 5491: } //irpCmp2Chk2Byte 5492: 5493: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5494: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5495: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5496: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5497: //BTST.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_100_000_rrr 5498: //MOVEP.W (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_100_001_rrr-{data} 5499: //BTST.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZPI|0000_qqq_100_mmm_rrr 5500: public static void irpBtstReg () throws M68kException { 5501: int ea = XEiJ.regOC & 63; 5502: int qqq = XEiJ.regOC >> 9; //qqq 5503: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W (d16,Ar),Dq 5504: XEiJ.mpuCycleCount += 16; 5505: int a; 5506: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5507: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5508: } else { 5509: a = XEiJ.regPC; 5510: XEiJ.regPC = a + 2; 5511: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5512: } 5513: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | XEiJ.busRbz (a) << 8 | XEiJ.busRbz (a + 2); //Javaは評価順序が保証されている 5514: } else { //BTST.L Dq,Dr/<ea> 5515: int y = XEiJ.regRn[qqq]; 5516: if (ea < XEiJ.EA_AR) { //BTST.L Dq,Dr 5517: XEiJ.mpuCycleCount += 6; 5518: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 5519: } else { //BTST.B Dq,<ea> 5520: XEiJ.mpuCycleCount += 4; 5521: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.busRbs (efaAnyByte (ea)) >>> (y & 7) & 1) << 2; //ccr_btst 5522: } 5523: } 5524: } //irpBtstReg 5525: 5526: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5527: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5528: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5529: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5530: //BCHG.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_101_000_rrr 5531: //MOVEP.L (d16,Ar),Dq |-|01234S|-|-----|-----| |0000_qqq_101_001_rrr-{data} 5532: //BCHG.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_101_mmm_rrr 5533: public static void irpBchgReg () throws M68kException { 5534: int ea = XEiJ.regOC & 63; 5535: int qqq = XEiJ.regOC >> 9; //qqq 5536: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L (d16,Ar),Dq 5537: XEiJ.mpuCycleCount += 24; 5538: int a; 5539: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5540: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5541: } else { 5542: a = XEiJ.regPC; 5543: XEiJ.regPC = a + 2; 5544: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5545: } 5546: XEiJ.regRn[qqq] = XEiJ.busRbs (a) << 24 | XEiJ.busRbz (a + 2) << 16 | XEiJ.busRbz (a + 4) << 8 | XEiJ.busRbz (a + 6); //Javaは評価順序が保証されている 5547: } else { //BCHG.L Dq,Dr/<ea> 5548: int x; 5549: int y = XEiJ.regRn[qqq]; 5550: if (ea < XEiJ.EA_AR) { //BCHG.L Dq,Dr 5551: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5552: XEiJ.mpuCycleCount += (char) y != 0 ? 6 : 8; //(0xffff&y)!=0 5553: } else { //BCHG.B Dq,<ea> 5554: XEiJ.mpuCycleCount += 8; 5555: int a = efaMltByte (ea); 5556: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) ^ (y = 1 << (y & 7))); 5557: } 5558: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5559: } 5560: } //irpBchgReg 5561: 5562: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5563: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5564: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5565: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5566: //BCLR.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_110_000_rrr 5567: //MOVEP.W Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_110_001_rrr-{data} 5568: //BCLR.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_110_mmm_rrr 5569: public static void irpBclrReg () throws M68kException { 5570: int ea = XEiJ.regOC & 63; 5571: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5572: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.W Dq,(d16,Ar) 5573: XEiJ.mpuCycleCount += 16; 5574: int a; 5575: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5576: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5577: } else { 5578: a = XEiJ.regPC; 5579: XEiJ.regPC = a + 2; 5580: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5581: } 5582: XEiJ.busWb (a, y >> 8); 5583: XEiJ.busWb (a + 2, y); 5584: } else { //BCLR.L Dq,Dr/<ea> 5585: int x; 5586: if (ea < XEiJ.EA_AR) { //BCLR.L Dq,Dr 5587: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5588: XEiJ.mpuCycleCount += (char) y != 0 ? 8 : 10; //(0xffff&y)!=0 5589: } else { //BCLR.B Dq,<ea> 5590: XEiJ.mpuCycleCount += 8; 5591: int a = efaMltByte (ea); 5592: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) & ~(y = 1 << (y & 7))); 5593: } 5594: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5595: } 5596: } //irpBclrReg 5597: 5598: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5599: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5600: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5601: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5602: //BSET.L Dq,Dr |-|012346|-|--U--|--*--|D |0000_qqq_111_000_rrr 5603: //MOVEP.L Dq,(d16,Ar) |-|01234S|-|-----|-----| |0000_qqq_111_001_rrr-{data} 5604: //BSET.B Dq,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_qqq_111_mmm_rrr 5605: public static void irpBsetReg () throws M68kException { 5606: int ea = XEiJ.regOC & 63; 5607: int y = XEiJ.regRn[XEiJ.regOC >> 9]; //qqq 5608: if (ea >> 3 == XEiJ.MMM_AR) { //MOVEP.L Dq,(d16,Ar) 5609: XEiJ.mpuCycleCount += 24; 5610: int a; 5611: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5612: a = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。このr[ea]はアドレスレジスタ 5613: } else { 5614: a = XEiJ.regPC; 5615: XEiJ.regPC = a + 2; 5616: a = XEiJ.regRn[ea] + XEiJ.busRwse (a); //pcws。このr[ea]はアドレスレジスタ 5617: } 5618: XEiJ.busWb (a, y >> 24); 5619: XEiJ.busWb (a + 2, y >> 16); 5620: XEiJ.busWb (a + 4, y >> 8); 5621: XEiJ.busWb (a + 6, y); 5622: } else { //BSET.L Dq,Dr/<ea> 5623: int x; 5624: if (ea < XEiJ.EA_AR) { //BSET.L Dq,Dr 5625: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 5626: XEiJ.mpuCycleCount += (char) y != 0 ? 6 : 8; //(0xffff&y)!=0 5627: } else { //BSET.B Dq,<ea> 5628: XEiJ.mpuCycleCount += 8; 5629: int a = efaMltByte (ea); 5630: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) | (y = 1 << (y & 7))); 5631: } 5632: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 5633: } 5634: } //irpBsetReg 5635: 5636: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5637: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5638: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5639: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5640: //ANDI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_000_mmm_rrr-{data} 5641: //AND.B #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_000_mmm_rrr-{data} [ANDI.B #<data>,<ea>] 5642: //ANDI.B #<data>,CCR |-|012346|-|*****|*****| |0000_001_000_111_100-{data} 5643: public static void irpAndiByte () throws M68kException { 5644: int ea = XEiJ.regOC & 63; 5645: int z; 5646: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5647: z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 5648: } else { 5649: z = XEiJ.regPC; 5650: XEiJ.regPC = z + 2; 5651: z = XEiJ.busRbs (z + 1); //pcbs 5652: } 5653: if (ea < XEiJ.EA_AR) { //ANDI.B #<data>,Dr 5654: XEiJ.mpuCycleCount += 8; 5655: z = XEiJ.regRn[ea] &= ~255 | z; //1拡張してからAND 5656: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5657: } else if (ea == XEiJ.EA_IM) { //ANDI.B #<data>,CCR 5658: XEiJ.mpuCycleCount += 20; 5659: XEiJ.regCCR &= z; 5660: } else { //ANDI.B #<data>,<mem> 5661: XEiJ.mpuCycleCount += 12; 5662: int a = efaMltByte (ea); 5663: XEiJ.busWb (a, z &= XEiJ.busRbs (a)); 5664: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 5665: } 5666: } //irpAndiByte 5667: 5668: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5669: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5670: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5671: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5672: //ANDI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_001_mmm_rrr-{data} 5673: //AND.W #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_001_mmm_rrr-{data} [ANDI.W #<data>,<ea>] 5674: //ANDI.W #<data>,SR |-|012346|P|*****|*****| |0000_001_001_111_100-{data} 5675: public static void irpAndiWord () throws M68kException { 5676: int ea = XEiJ.regOC & 63; 5677: if (ea < XEiJ.EA_AR) { //ANDI.W #<data>,Dr 5678: int z; 5679: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5680: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5681: } else { 5682: z = XEiJ.regPC; 5683: XEiJ.regPC = z + 2; 5684: z = XEiJ.busRwse (z); //pcws 5685: } 5686: XEiJ.mpuCycleCount += 8; 5687: z = XEiJ.regRn[ea] &= ~65535 | z; //1拡張してからAND 5688: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5689: } else if (ea == XEiJ.EA_IM) { //ANDI.W #<data>,SR 5690: if (XEiJ.regSRS == 0) { //ユーザモードのとき 5691: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 5692: throw M68kException.m6eSignal; 5693: } 5694: //以下はスーパーバイザモード 5695: XEiJ.mpuCycleCount += 20; 5696: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5697: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 5698: } else { 5699: int t = XEiJ.regPC; 5700: XEiJ.regPC = t + 2; 5701: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) & XEiJ.busRwse (t)); //pcws。特権違反チェックが先 5702: } 5703: } else { //ANDI.W #<data>,<mem> 5704: int z; 5705: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5706: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5707: } else { 5708: z = XEiJ.regPC; 5709: XEiJ.regPC = z + 2; 5710: z = XEiJ.busRwse (z); //pcws 5711: } 5712: XEiJ.mpuCycleCount += 12; 5713: int a = efaMltWord (ea); 5714: XEiJ.busWw (a, z &= XEiJ.busRws (a)); 5715: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 5716: } 5717: } //irpAndiWord 5718: 5719: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5720: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5721: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5722: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5723: //ANDI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_001_010_mmm_rrr-{data} 5724: //AND.L #<data>,<ea> |A|012346|-|-UUUU|-**00| M+-WXZ |0000_001_010_mmm_rrr-{data} [ANDI.L #<data>,<ea>] 5725: public static void irpAndiLong () throws M68kException { 5726: int ea = XEiJ.regOC & 63; 5727: int y; 5728: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5729: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 5730: } else { 5731: y = XEiJ.regPC; 5732: XEiJ.regPC = y + 4; 5733: y = XEiJ.busRlse (y); //pcls 5734: } 5735: int z; 5736: if (ea < XEiJ.EA_AR) { //ANDI.L #<data>,Dr 5737: XEiJ.mpuCycleCount += 16; 5738: z = XEiJ.regRn[ea] &= y; 5739: } else { //ANDI.L #<data>,<mem> 5740: XEiJ.mpuCycleCount += 20; 5741: int a = efaMltLong (ea); 5742: XEiJ.busWl (a, z = XEiJ.busRls (a) & y); 5743: } 5744: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5745: } //irpAndiLong 5746: 5747: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5748: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5749: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5750: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5751: //BYTEREV.L Dr |-|------|-|-----|-----|D |0000_001_011_000_rrr (ISA_C) 5752: //CMP2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn000000000000 5753: //CHK2.W <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_001_011_mmm_rrr-rnnn100000000000 5754: // 5755: //BYTEREV.L Dr 5756: // Drのバイトの並びを逆順にする。CCRは変化しない 5757: // 5758: //CHK2.W <ea>,Rn 5759: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5760: // CHK2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5761: // Rnが下限または上限と等しいときZをセットする 5762: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5763: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5764: // CCR 5765: // X 変化しない 5766: // N 変化しない(M68000PRMでは未定義) 5767: // Z Rn-LB==0||Rn-LB==UB-LB 5768: // V 変化しない(M68000PRMでは未定義) 5769: // C Rn-LB>UB-LB(符号なし比較) 5770: // 5771: //CMP2.W <ea>,Rn 5772: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5773: // CMP2.W <ea>,Anは下限と上限をそれぞれロングに符号拡張してロングで比較する 5774: // Rnが下限または上限と等しいときZをセットする 5775: // Rnが範囲外のときCをセットする 5776: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5777: // CCR 5778: // X 変化しない 5779: // N 変化しない(M68000PRMでは未定義) 5780: // Z Rn-LB==0||Rn-LB==UB-LB 5781: // V 変化しない(M68000PRMでは未定義) 5782: // C Rn-LB>UB-LB(符号なし比較) 5783: public static void irpCmp2Chk2Word () throws M68kException { 5784: int ea = XEiJ.regOC & 63; 5785: if (ea < XEiJ.EA_AR) { //BYTEREV.L Dr 5786: XEiJ.mpuCycleCount += 4; 5787: if (true) { //0.10ns-0.18ns 0x782750ec 5788: XEiJ.regRn[ea] = Integer.reverseBytes (XEiJ.regRn[ea]); 5789: } else { //1.06ns 0x782750ec 5790: int x = XEiJ.regRn[ea]; 5791: XEiJ.regRn[ea] = x << 24 | x << 8 & 0x00ff0000 | x >>> 8 & 0x0000ff00 | x >>> 24; 5792: } 5793: } else { //CMP2/CHK2.W <ea>,Rn 5794: XEiJ.mpuCycleCount += 8; 5795: int w; 5796: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5797: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 5798: } else { 5799: w = XEiJ.regPC; 5800: XEiJ.regPC = w + 2; 5801: w = XEiJ.busRwze (w); //pcwz 5802: } 5803: int d = XEiJ.regRn[w >> 12]; //Rn 5804: if (0 <= (short) w) { //Dnのとき 5805: d = (short) d; //符号拡張する 5806: } 5807: int a = efaCntWord (ea); 5808: int l = XEiJ.busRws (a); //LB 5809: int u = XEiJ.busRws (a + 2); //UB 5810: //U-D,L-D,D-Lのいずれかに帰着させる 5811: // 参考 5812: // https://twitter.com/moveccr/status/814309539012976640 5813: // https://twitter.com/moveccr/status/814309679845109760 5814: // https://twitter.com/moveccr/status/814310106598871040 5815: int x, y; 5816: if (Integer.compareUnsigned (l, d) < 0 && Integer.compareUnsigned (l, u) <= 0 || d == u) { 5817: x = u; 5818: y = d; 5819: } else if (Integer.compareUnsigned (d, u) < 0 && Integer.compareUnsigned (u, l) < 0) { 5820: x = l; 5821: y = d; 5822: } else { 5823: x = d; 5824: y = l; 5825: } 5826: int z = x - y; 5827: int c = (x & (y ^ z) ^ (y | z)) >>> 31; 5828: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //X 5829: z >>> 28 & XEiJ.REG_CCR_N | //N 5830: (z == 0 ? XEiJ.REG_CCR_Z : 0) | //Z 5831: ((x ^ y) & (x ^ z)) >>> 31 << 1 | //V 5832: c); //C 5833: if ((w >> 11 & c) != 0) { //CHK2でCがセットされたとき 5834: XEiJ.mpuCycleCount += 40 - 8 - 34; 5835: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 5836: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 5837: throw M68kException.m6eSignal; 5838: } 5839: } 5840: } //irpCmp2Chk2Word 5841: 5842: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5843: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5844: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5845: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5846: //SUBI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_000_mmm_rrr-{data} 5847: //SUB.B #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_000_mmm_rrr-{data} [SUBI.B #<data>,<ea>] 5848: public static void irpSubiByte () throws M68kException { 5849: int ea = XEiJ.regOC & 63; 5850: int x; 5851: int y; 5852: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5853: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 5854: } else { 5855: y = XEiJ.regPC; 5856: XEiJ.regPC = y + 2; 5857: y = XEiJ.busRbs (y + 1); //pcbs 5858: } 5859: int z; 5860: if (ea < XEiJ.EA_AR) { //SUBI.B #<data>,Dr 5861: XEiJ.mpuCycleCount += 8; 5862: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 5863: } else { //SUBI.B #<data>,<mem> 5864: XEiJ.mpuCycleCount += 12; 5865: int a = efaMltByte (ea); 5866: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) - y)); 5867: } 5868: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5869: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5870: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5871: } //irpSubiByte 5872: 5873: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5874: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5875: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5876: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5877: //SUBI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_001_mmm_rrr-{data} 5878: //SUB.W #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_001_mmm_rrr-{data} [SUBI.W #<data>,<ea>] 5879: public static void irpSubiWord () throws M68kException { 5880: int ea = XEiJ.regOC & 63; 5881: int x; 5882: int y; 5883: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5884: y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 5885: } else { 5886: y = XEiJ.regPC; 5887: XEiJ.regPC = y + 2; 5888: y = XEiJ.busRwse (y); //pcws 5889: } 5890: int z; 5891: if (ea < XEiJ.EA_AR) { //SUBI.W #<data>,Dr 5892: XEiJ.mpuCycleCount += 8; 5893: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 5894: } else { //SUBI.W #<data>,<mem> 5895: XEiJ.mpuCycleCount += 12; 5896: int a = efaMltWord (ea); 5897: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) - y)); 5898: } 5899: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5900: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5901: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5902: } //irpSubiWord 5903: 5904: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5905: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5906: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5907: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5908: //SUBI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_010_010_mmm_rrr-{data} 5909: //SUB.L #<data>,<ea> |A|012346|-|UUUUU|*****| M+-WXZ |0000_010_010_mmm_rrr-{data} [SUBI.L #<data>,<ea>] 5910: public static void irpSubiLong () throws M68kException { 5911: int ea = XEiJ.regOC & 63; 5912: int x; 5913: int y; 5914: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5915: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 5916: } else { 5917: y = XEiJ.regPC; 5918: XEiJ.regPC = y + 4; 5919: y = XEiJ.busRlse (y); //pcls 5920: } 5921: int z; 5922: if (ea < XEiJ.EA_AR) { //SUBI.L #<data>,Dr 5923: XEiJ.mpuCycleCount += 16; 5924: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 5925: } else { //SUBI.L #<data>,<mem> 5926: XEiJ.mpuCycleCount += 20; 5927: int a = efaMltLong (ea); 5928: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y); 5929: } 5930: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 5931: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 5932: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 5933: } //irpSubiLong 5934: 5935: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5936: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 5937: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 5938: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 5939: //FF1.L Dr |-|------|-|-UUUU|-**00|D |0000_010_011_000_rrr (ISA_C) 5940: //CMP2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn000000000000 5941: //CHK2.L <ea>,Rn |-|--234S|-|-UUUU|-U*U*| M WXZP |0000_010_011_mmm_rrr-rnnn100000000000 5942: // 5943: //CHK2.L <ea>,Rn 5944: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5945: // Rnが下限または上限と等しいときZをセットする 5946: // Rnが範囲外のときCをセットする。このときCHK instruction例外が発生する 5947: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5948: // CCR 5949: // X 変化しない 5950: // N 変化しない(M68000PRMでは未定義) 5951: // Z Rn-LB==0||Rn-LB==UB-LB 5952: // V 変化しない(M68000PRMでは未定義) 5953: // C Rn-LB>UB-LB(符号なし比較) 5954: // 5955: //CMP2.L <ea>,Rn 5956: // <ea>から下限と上限をリードしてRnが範囲内か調べる 5957: // Rnが下限または上限と等しいときZをセットする 5958: // Rnが範囲外のときCをセットする 5959: // 060ISPのソースは注釈に誤りが多いので注釈ではなくコードを参考にする 5960: // CCR 5961: // X 変化しない 5962: // N 変化しない(M68000PRMでは未定義) 5963: // Z Rn-LB==0||Rn-LB==UB-LB 5964: // V 変化しない(M68000PRMでは未定義) 5965: // C Rn-LB>UB-LB(符号なし比較) 5966: // 5967: //FF1.L Dr 5968: // Drの最上位の1のbit31からのオフセットをDrに格納する 5969: // Drが0のときは32になる 5970: public static void irpCmp2Chk2Long () throws M68kException { 5971: int ea = XEiJ.regOC & 63; 5972: if (ea < XEiJ.EA_AR) { //FF1.L Dr 5973: XEiJ.mpuCycleCount += 4; 5974: int z = XEiJ.regRn[ea]; 5975: if (true) { 5976: XEiJ.regRn[ea] = Integer.numberOfLeadingZeros (z); 5977: } else { 5978: if (z == 0) { 5979: XEiJ.regRn[ea] = 32; 5980: } else { 5981: int k = -(z >>> 16) >> 16 & 16; 5982: k += -(z >>> k + 8) >> 8 & 8; 5983: k += -(z >>> k + 4) >> 4 & 4; 5984: // bit3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 5985: // bit2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 5986: // bit1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 5987: // bit0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 5988: XEiJ.regRn[ea] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (z >>> k << 1)) & 3) + k; //intのシフトカウントは下位5bitだけが使用される 5989: } 5990: } 5991: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 5992: } else { //CMP2/CHK2.L <ea>,Rn 5993: XEiJ.mpuCycleCount += 8; 5994: int w; 5995: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 5996: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 5997: } else { 5998: w = XEiJ.regPC; 5999: XEiJ.regPC = w + 2; 6000: w = XEiJ.busRwze (w); //pcwz 6001: } 6002: int d = XEiJ.regRn[w >> 12]; //Rn 6003: int a = efaCntLong (ea); 6004: int l = XEiJ.busRls (a); //LB 6005: int u = XEiJ.busRls (a + 4); //UB 6006: //U-D,L-D,D-Lのいずれかに帰着させる 6007: // 参考 6008: // https://twitter.com/moveccr/status/814309539012976640 6009: // https://twitter.com/moveccr/status/814309679845109760 6010: // https://twitter.com/moveccr/status/814310106598871040 6011: int x, y; 6012: if (Integer.compareUnsigned (l, d) < 0 && Integer.compareUnsigned (l, u) <= 0 || d == u) { 6013: x = u; 6014: y = d; 6015: } else if (Integer.compareUnsigned (d, u) < 0 && Integer.compareUnsigned (u, l) < 0) { 6016: x = l; 6017: y = d; 6018: } else { 6019: x = d; 6020: y = l; 6021: } 6022: int z = x - y; 6023: int c = (x & (y ^ z) ^ (y | z)) >>> 31; 6024: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //X 6025: z >>> 28 & XEiJ.REG_CCR_N | //N 6026: (z == 0 ? XEiJ.REG_CCR_Z : 0) | //Z 6027: ((x ^ y) & (x ^ z)) >>> 31 << 1 | //V 6028: c); //C 6029: if ((w >> 11 & c) != 0) { //CHK2でCがセットされたとき 6030: XEiJ.mpuCycleCount += 40 - 8 - 34; 6031: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 6032: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 6033: throw M68kException.m6eSignal; 6034: } 6035: } 6036: } //irpCmp2Chk2Long 6037: 6038: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6039: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6040: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6041: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6042: //ADDI.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_000_mmm_rrr-{data} 6043: public static void irpAddiByte () throws M68kException { 6044: int ea = XEiJ.regOC & 63; 6045: int x; 6046: int y; 6047: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6048: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6049: } else { 6050: y = XEiJ.regPC; 6051: XEiJ.regPC = y + 2; 6052: y = XEiJ.busRbs (y + 1); //pcbs 6053: } 6054: int z; 6055: if (ea < XEiJ.EA_AR) { //ADDI.B #<data>,Dr 6056: XEiJ.mpuCycleCount += 8; 6057: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 6058: } else { //ADDI.B #<data>,<mem> 6059: XEiJ.mpuCycleCount += 12; 6060: int a = efaMltByte (ea); 6061: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) + y)); 6062: } 6063: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6064: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6065: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6066: } //irpAddiByte 6067: 6068: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6069: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6070: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6071: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6072: //ADDI.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_001_mmm_rrr-{data} 6073: public static void irpAddiWord () throws M68kException { 6074: int ea = XEiJ.regOC & 63; 6075: int x; 6076: int y; 6077: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6078: y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6079: } else { 6080: y = XEiJ.regPC; 6081: XEiJ.regPC = y + 2; 6082: y = XEiJ.busRwse (y); //pcws 6083: } 6084: int z; 6085: if (ea < XEiJ.EA_AR) { //ADDI.W #<data>,Dr 6086: XEiJ.mpuCycleCount += 8; 6087: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 6088: } else { //ADDI.W #<data>,<mem> 6089: XEiJ.mpuCycleCount += 12; 6090: int a = efaMltWord (ea); 6091: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) + y)); 6092: } 6093: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6094: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6095: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6096: } //irpAddiWord 6097: 6098: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6099: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6100: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6101: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6102: //ADDI.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0000_011_010_mmm_rrr-{data} 6103: public static void irpAddiLong () throws M68kException { 6104: int ea = XEiJ.regOC & 63; 6105: int x; 6106: int y; 6107: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6108: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6109: } else { 6110: y = XEiJ.regPC; 6111: XEiJ.regPC = y + 4; 6112: y = XEiJ.busRlse (y); //pcls 6113: } 6114: int z; 6115: if (ea < XEiJ.EA_AR) { //ADDI.L #<data>,Dr 6116: XEiJ.mpuCycleCount += 16; 6117: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 6118: } else { //ADDI.L #<data>,<mem> 6119: XEiJ.mpuCycleCount += 20; 6120: int a = efaMltLong (ea); 6121: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y); 6122: } 6123: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6124: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 6125: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 6126: } //irpAddiLong 6127: 6128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6129: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6130: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6131: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6132: //BTST.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_000_000_rrr-{data} 6133: //BTST.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZP |0000_100_000_mmm_rrr-{data} 6134: public static void irpBtstImm () throws M68kException { 6135: int ea = XEiJ.regOC & 63; 6136: int y; 6137: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6138: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6139: } else { 6140: y = XEiJ.regPC; 6141: XEiJ.regPC = y + 2; 6142: y = XEiJ.busRbs (y + 1); //pcbs 6143: } 6144: if (ea < XEiJ.EA_AR) { //BTST.L #<data>,Dr 6145: XEiJ.mpuCycleCount += 10; 6146: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.regRn[ea] >>> y & 1) << 2; //ccr_btst。intのシフトは5bitでマスクされるので&31を省略 6147: } else { //BTST.B #<data>,<ea> 6148: XEiJ.mpuCycleCount += 8; 6149: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (~XEiJ.busRbs (efaMemByte (ea)) >>> (y & 7) & 1) << 2; //ccr_btst 6150: } 6151: } //irpBtstImm 6152: 6153: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6154: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6155: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6156: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6157: //BCHG.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_001_000_rrr-{data} 6158: //BCHG.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_001_mmm_rrr-{data} 6159: public static void irpBchgImm () throws M68kException { 6160: int ea = XEiJ.regOC & 63; 6161: int x; 6162: int y; 6163: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6164: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6165: } else { 6166: y = XEiJ.regPC; 6167: XEiJ.regPC = y + 2; 6168: y = XEiJ.busRbs (y + 1); //pcbs 6169: } 6170: if (ea < XEiJ.EA_AR) { //BCHG.L #<data>,Dr 6171: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) ^ (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6172: XEiJ.mpuCycleCount += (char) y != 0 ? 10 : 12; //(0xffff&y)!=0 6173: } else { //BCHG.B #<data>,<ea> 6174: XEiJ.mpuCycleCount += 12; 6175: int a = efaMltByte (ea); 6176: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) ^ (y = 1 << (y & 7))); 6177: } 6178: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6179: } //irpBchgImm 6180: 6181: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6182: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6183: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6184: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6185: //BCLR.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_010_000_rrr-{data} 6186: //BCLR.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_010_mmm_rrr-{data} 6187: public static void irpBclrImm () throws M68kException { 6188: int ea = XEiJ.regOC & 63; 6189: int x; 6190: int y; 6191: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6192: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6193: } else { 6194: y = XEiJ.regPC; 6195: XEiJ.regPC = y + 2; 6196: y = XEiJ.busRbs (y + 1); //pcbs 6197: } 6198: if (ea < XEiJ.EA_AR) { //BCLR.L #<data>,Dr 6199: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) & ~(y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6200: XEiJ.mpuCycleCount += (char) y != 0 ? 12 : 14; //(0xffff&y)!=0 6201: } else { //BCLR.B #<data>,<ea> 6202: XEiJ.mpuCycleCount += 12; 6203: int a = efaMltByte (ea); 6204: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) & ~(y = 1 << (y & 7))); 6205: } 6206: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6207: } //irpBclrImm 6208: 6209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6210: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6211: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6213: //BSET.L #<data>,Dr |-|012346|-|--U--|--*--|D |0000_100_011_000_rrr-{data} 6214: //BSET.B #<data>,<ea> |-|012346|-|--U--|--*--| M+-WXZ |0000_100_011_mmm_rrr-{data} 6215: public static void irpBsetImm () throws M68kException { 6216: int ea = XEiJ.regOC & 63; 6217: int x; 6218: int y; 6219: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6220: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6221: } else { 6222: y = XEiJ.regPC; 6223: XEiJ.regPC = y + 2; 6224: y = XEiJ.busRbs (y + 1); //pcbs 6225: } 6226: if (ea < XEiJ.EA_AR) { //BSET.L #<data>,Dr 6227: XEiJ.regRn[ea] = (x = XEiJ.regRn[ea]) | (y = 1 << y); //intのシフトは5bitでマスクされるので1<<(y&0x1f)の&0x1fを省略 6228: XEiJ.mpuCycleCount += (char) y != 0 ? 10 : 12; //(0xffff&y)!=0 6229: } else { //BSET.B #<data>,<ea> 6230: XEiJ.mpuCycleCount += 12; 6231: int a = efaMltByte (ea); 6232: XEiJ.busWb (a, (x = XEiJ.busRbs (a)) | (y = 1 << (y & 7))); 6233: } 6234: XEiJ.regCCR = XEiJ.regCCR & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_N | XEiJ.REG_CCR_V | XEiJ.REG_CCR_C) | (x & y) - 1 >>> 31 << 2; //ccr_btst 6235: } //irpBsetImm 6236: 6237: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6238: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6239: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6240: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6241: //EORI.B #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} 6242: //EOR.B #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_000_mmm_rrr-{data} [EORI.B #<data>,<ea>] 6243: //EORI.B #<data>,CCR |-|012346|-|*****|*****| |0000_101_000_111_100-{data} 6244: public static void irpEoriByte () throws M68kException { 6245: int ea = XEiJ.regOC & 63; 6246: int z; 6247: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6248: z = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6249: } else { 6250: z = XEiJ.regPC; 6251: XEiJ.regPC = z + 2; 6252: z = XEiJ.busRbs (z + 1); //pcbs 6253: } 6254: if (ea < XEiJ.EA_AR) { //EORI.B #<data>,Dr 6255: XEiJ.mpuCycleCount += 8; 6256: z = XEiJ.regRn[ea] ^= 255 & z; //0拡張してからEOR 6257: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6258: } else if (ea == XEiJ.EA_IM) { //EORI.B #<data>,CCR 6259: XEiJ.mpuCycleCount += 20; 6260: XEiJ.regCCR ^= XEiJ.REG_CCR_MASK & z; 6261: } else { //EORI.B #<data>,<mem> 6262: XEiJ.mpuCycleCount += 12; 6263: int a = efaMltByte (ea); 6264: XEiJ.busWb (a, z ^= XEiJ.busRbs (a)); 6265: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6266: } 6267: } //irpEoriByte 6268: 6269: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6270: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6271: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6272: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6273: //EORI.W #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} 6274: //EOR.W #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_001_mmm_rrr-{data} [EORI.W #<data>,<ea>] 6275: //EORI.W #<data>,SR |-|012346|P|*****|*****| |0000_101_001_111_100-{data} 6276: public static void irpEoriWord () throws M68kException { 6277: int ea = XEiJ.regOC & 63; 6278: if (ea < XEiJ.EA_AR) { //EORI.W #<data>,Dr 6279: int z; 6280: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6281: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6282: } else { 6283: z = XEiJ.regPC; 6284: XEiJ.regPC = z + 2; 6285: z = XEiJ.busRwse (z); //pcws 6286: } 6287: XEiJ.mpuCycleCount += 8; 6288: z = XEiJ.regRn[ea] ^= (char) z; //0拡張してからEOR 6289: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6290: } else if (ea == XEiJ.EA_IM) { //EORI.W #<data>,SR 6291: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6292: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6293: throw M68kException.m6eSignal; 6294: } 6295: //以下はスーパーバイザモード 6296: XEiJ.mpuCycleCount += 20; 6297: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6298: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 6299: } else { 6300: int t = XEiJ.regPC; 6301: XEiJ.regPC = t + 2; 6302: irpSetSR ((XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR) ^ XEiJ.busRwse (t)); //pcws。特権違反チェックが先 6303: } 6304: } else { //EORI.W #<data>,<mem> 6305: int z; 6306: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6307: z = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6308: } else { 6309: z = XEiJ.regPC; 6310: XEiJ.regPC = z + 2; 6311: z = XEiJ.busRwse (z); //pcws 6312: } 6313: XEiJ.mpuCycleCount += 12; 6314: int a = efaMltWord (ea); 6315: XEiJ.busWw (a, z ^= XEiJ.busRws (a)); 6316: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 6317: } 6318: } //irpEoriWord 6319: 6320: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6321: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6322: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6324: //EORI.L #<data>,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} 6325: //EOR.L #<data>,<ea> |A|012346|-|-UUUU|-**00|D M+-WXZ |0000_101_010_mmm_rrr-{data} [EORI.L #<data>,<ea>] 6326: public static void irpEoriLong () throws M68kException { 6327: int ea = XEiJ.regOC & 63; 6328: int y; 6329: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6330: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6331: } else { 6332: y = XEiJ.regPC; 6333: XEiJ.regPC = y + 4; 6334: y = XEiJ.busRlse (y); //pcls 6335: } 6336: int z; 6337: if (ea < XEiJ.EA_AR) { //EORI.L #<data>,Dr 6338: XEiJ.mpuCycleCount += 16; 6339: z = XEiJ.regRn[ea] ^= y; 6340: } else { //EORI.L #<data>,<mem> 6341: XEiJ.mpuCycleCount += 20; 6342: int a = efaMltLong (ea); 6343: XEiJ.busWl (a, z = XEiJ.busRls (a) ^ y); 6344: } 6345: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 6346: } //irpEoriLong 6347: 6348: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6349: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6350: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6351: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6352: //CAS.B Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_101_011_mmm_rrr-0000000uuu000ccc 6353: public static void irpCasByte () throws M68kException { 6354: int w; 6355: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6356: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 6357: } else { 6358: w = XEiJ.regPC; 6359: XEiJ.regPC = w + 2; 6360: w = XEiJ.busRwze (w); //pcwz。拡張ワード 6361: } 6362: if ((w & ~0b0000_000_111_000_111) != 0) { 6363: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6364: throw M68kException.m6eSignal; 6365: } 6366: int c = w & 7; 6367: int y = (byte) XEiJ.regRn[c]; //y=Dc 6368: int a = efaMltByte (XEiJ.regOC & 63); 6369: int x = XEiJ.busRbs (a); //x=<ea> 6370: int z = (byte) (x - y); //z=<ea>-Dc 6371: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6372: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6373: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6374: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6375: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6376: if (z == 0) { //<ea>==Dc 6377: XEiJ.mpuCycleCount += 16; 6378: XEiJ.busWb (a, XEiJ.regRn[w >> 6]); //Du→<ea> 6379: } else { //<ea>!=Dc 6380: XEiJ.mpuCycleCount += 12; 6381: XEiJ.regRn[c] = ~0xff & XEiJ.regRn[c] | 0xff & x; //<ea>→Dc 6382: } 6383: } //irpCasByte 6384: 6385: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6386: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6387: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6388: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6389: //CMPI.B #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_000_mmm_rrr-{data} 6390: //CMP.B #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_000_mmm_rrr-{data} [CMPI.B #<data>,<ea>] 6391: public static void irpCmpiByte () throws M68kException { 6392: XEiJ.mpuCycleCount += 8; 6393: int ea = XEiJ.regOC & 63; 6394: int x; 6395: int y; 6396: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6397: y = XEiJ.busRbs ((XEiJ.regPC += 2) - 1); //pcbs 6398: } else { 6399: y = XEiJ.regPC; 6400: XEiJ.regPC = y + 2; 6401: y = XEiJ.busRbs (y + 1); //pcbs 6402: } 6403: int z = (byte) ((x = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaMemByte (ea))) - y); //アドレッシングモードに注意 6404: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6405: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6406: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6407: } //irpCmpiByte 6408: 6409: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6410: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6411: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6412: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6413: //CMPI.W #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_001_mmm_rrr-{data} 6414: //CMP.W #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_001_mmm_rrr-{data} [CMPI.W #<data>,<ea>] 6415: public static void irpCmpiWord () throws M68kException { 6416: XEiJ.mpuCycleCount += 8; 6417: int ea = XEiJ.regOC & 63; 6418: int x; 6419: int y; 6420: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6421: y = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 6422: } else { 6423: y = XEiJ.regPC; 6424: XEiJ.regPC = y + 2; 6425: y = XEiJ.busRwse (y); //pcws 6426: } 6427: int z = (short) ((x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaMemWord (ea))) - y); //アドレッシングモードに注意 6428: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6429: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6430: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6431: } //irpCmpiWord 6432: 6433: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6434: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6435: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6436: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6437: //CMPI.L #<data>,<ea> |-|--2346|-|-UUUU|-****|D M+-WXZP |0000_110_010_mmm_rrr-{data} 6438: //CMP.L #<data>,<ea> |A|--2346|-|-UUUU|-****| M+-WXZP |0000_110_010_mmm_rrr-{data} [CMPI.L #<data>,<ea>] 6439: public static void irpCmpiLong () throws M68kException { 6440: int ea = XEiJ.regOC & 63; 6441: int x; 6442: int y; 6443: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6444: y = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6445: } else { 6446: y = XEiJ.regPC; 6447: XEiJ.regPC = y + 4; 6448: y = XEiJ.busRlse (y); //pcls 6449: } 6450: int z; 6451: if (ea < XEiJ.EA_AR) { //CMPI.L #<data>,Dr 6452: XEiJ.mpuCycleCount += 14; 6453: z = (x = XEiJ.regRn[ea]) - y; 6454: } else { //CMPI.L #<data>,<mem> 6455: XEiJ.mpuCycleCount += 12; 6456: z = (x = XEiJ.busRls (efaMemLong (ea))) - y; //アドレッシングモードに注意 6457: } 6458: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6459: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6460: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6461: } //irpCmpiLong 6462: 6463: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6464: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6465: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6466: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6467: //CAS.W Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_110_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6468: //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_110_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6469: public static void irpCasWord () throws M68kException { 6470: int ea = XEiJ.regOC & 63; 6471: if (ea == XEiJ.EA_IM) { //CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6472: int w; 6473: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6474: w = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6475: } else { 6476: w = XEiJ.regPC; 6477: XEiJ.regPC = w + 4; 6478: w = XEiJ.busRlse (w); //pcls 6479: } 6480: if ((w & ~0b1111_000_111_000_111_1111_000_111_000_111) != 0) { 6481: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6482: throw M68kException.m6eSignal; 6483: } 6484: int c1 = w >>> 16 & 7; 6485: int c2 = w & 7; 6486: int a1 = XEiJ.regRn[w >>> 16 + 12 ]; //a1=Rn1 6487: int a2 = XEiJ.regRn[w >>> 12 & 15]; //a2=Rn2 6488: int x1 = XEiJ.busRws (a1); //x1=(Rn1) 6489: int x2 = XEiJ.busRws (a2); //x2=(Rn2) 6490: int y = (short) XEiJ.regRn[c1]; //y=Dc1 6491: int z = (short) (x1 - y); //z=(Rn1)-Dc1 6492: if (z == 0) { //(Rn1)==Dc1 6493: y = (short) XEiJ.regRn[c2]; //y=Dc2 6494: z = (short) (x2 - y); //z=(Rn2)-Dc2 6495: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6496: ((x2 ^ y) & (x2 ^ z)) >>> 31 << 1 | 6497: (x2 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6498: if (z == 0) { //(Rn1)==Dc1&&(Rn2)==Dc2 6499: XEiJ.mpuCycleCount += 28; 6500: XEiJ.busWw (a1, XEiJ.regRn[w >>> 16 + 6 & 7]); //Du1→(Rn1) 6501: XEiJ.busWw (a2, XEiJ.regRn[w >>> 6 & 7]); //Du2→(Rn2) 6502: } else { //(Rn1)==Dc1&&(Rn2)!=Dc2 6503: XEiJ.mpuCycleCount += 20; 6504: XEiJ.regRn[c1] = ~0xffff & XEiJ.regRn[c1] | (char) x1; //(Rn1)→Dc1 6505: XEiJ.regRn[c2] = ~0xffff & XEiJ.regRn[c2] | (char) x2; //(Rn2)→Dc2 6506: } 6507: } else { //(Rn1)!=Dc1 6508: XEiJ.mpuCycleCount += 20; 6509: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6510: ((x1 ^ y) & (x1 ^ z)) >>> 31 << 1 | 6511: (x1 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6512: XEiJ.regRn[c1] = ~0xffff & XEiJ.regRn[c1] | (char) x1; //(Rn1)→Dc1 6513: XEiJ.regRn[c2] = ~0xffff & XEiJ.regRn[c2] | (char) x2; //(Rn2)→Dc2 6514: } 6515: } else { //CAS.W Dc,Du,<ea> 6516: int w; 6517: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6518: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6519: } else { 6520: w = XEiJ.regPC; 6521: XEiJ.regPC = w + 2; 6522: w = XEiJ.busRwze (w); //pcwz 6523: } 6524: if ((w & ~0b0000_000_111_000_111) != 0) { 6525: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6526: throw M68kException.m6eSignal; 6527: } 6528: int c = w & 7; 6529: int y = (short) XEiJ.regRn[c]; //y=Dc 6530: int a = efaMltWord (ea); //a=ea 6531: int x = XEiJ.busRws (a); //x=<ea> 6532: int z = (short) (x - y); //z=<ea>-Dc 6533: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6534: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6535: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6536: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6537: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6538: if (z == 0) { //<ea>==Dc 6539: XEiJ.mpuCycleCount += 16; 6540: XEiJ.busWw (a, XEiJ.regRn[w >> 6]); //Du→<ea> 6541: } else { //<ea>!=Dc 6542: XEiJ.mpuCycleCount += 12; 6543: XEiJ.regRn[c] = ~0xffff & XEiJ.regRn[c] | (char) x; //<ea>→Dc 6544: } 6545: } 6546: } //irpCasWord 6547: 6548: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6549: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6550: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6551: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6552: //MOVES.B <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn000000000000 6553: //MOVES.B Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_000_mmm_rrr-rnnn100000000000 6554: // 6555: //MOVES.B <ea>,Rn 6556: // MOVES.B <ea>,DnはDnの最下位バイトだけ更新する 6557: // MOVES.B <ea>,Anはバイトデータをロングに符号拡張してAnの全体を更新する 6558: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6559: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6560: // 6561: //MOVES.B Rn,<ea> 6562: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6563: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6564: public static void irpMovesByte () throws M68kException { 6565: int w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6566: if (w << -11 != 0) { 6567: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6568: throw M68kException.m6eSignal; 6569: } 6570: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6571: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6572: throw M68kException.m6eSignal; 6573: } 6574: //以下はスーパーバイザモード 6575: XEiJ.mpuCycleCount += 4; 6576: int a = efaMltByte (XEiJ.regOC & 63); 6577: int n = w >>> 12; //n 6578: if (w << 31 - 11 >= 0) { //MOVES.B <ea>,Rn。リード 6579: MemoryMappedDevice[] mm; 6580: if (XEiJ.mpuSFC == 1 || XEiJ.mpuSFC == 2) { //ユーザモード 6581: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6582: } else if (XEiJ.mpuSFC == 5 || XEiJ.mpuSFC == 6) { //スーパーバイザモード 6583: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6584: } else { //CPU空間などは不可 6585: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_READ; 6586: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6587: M68kException.m6eAddress = a; 6588: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6589: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6590: throw M68kException.m6eSignal; 6591: } 6592: if (n < 8) { //MOVES.B <ea>,Dn 6593: XEiJ.regRn[n] = XEiJ.regRn[n] & ~255 | mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6594: } else { //MOVES.B <ea>,An 6595: XEiJ.regRn[n] = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a); 6596: } 6597: } else { //MOVES.B Rn,<ea>。ライト 6598: MemoryMappedDevice[] mm; 6599: if (XEiJ.mpuDFC == 1 || XEiJ.mpuDFC == 2) { //ユーザモード 6600: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6601: } else if (XEiJ.mpuDFC == 5 || XEiJ.mpuDFC == 6) { //スーパーバイザモード 6602: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6603: } else { //CPU空間などは不可 6604: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE; 6605: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6606: M68kException.m6eAddress = a; 6607: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6608: M68kException.m6eSize = XEiJ.MPU_SS_BYTE; 6609: throw M68kException.m6eSignal; 6610: } 6611: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, XEiJ.regRn[n]); 6612: } 6613: } //irpMovesByte 6614: 6615: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6616: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6617: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6618: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6619: //MOVES.W <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn000000000000 6620: //MOVES.W Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_001_mmm_rrr-rnnn100000000000 6621: // 6622: //MOVES.W <ea>,Rn 6623: // MOVES.W <ea>,DnはDnの下位ワードだけ更新する 6624: // MOVES.W <ea>,Anはワードデータをロングに符号拡張してAnの全体を更新する 6625: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6626: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6627: // 6628: //MOVES.W Rn,<ea> 6629: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6630: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6631: public static void irpMovesWord () throws M68kException { 6632: int w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6633: if (w << -11 != 0) { 6634: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6635: throw M68kException.m6eSignal; 6636: } 6637: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6638: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6639: throw M68kException.m6eSignal; 6640: } 6641: //以下はスーパーバイザモード 6642: XEiJ.mpuCycleCount += 4; 6643: int a = efaMltWord (XEiJ.regOC & 63); 6644: int n = w >>> 12; //n 6645: if (w << 31 - 11 >= 0) { //MOVES.W <ea>,Rn。リード 6646: MemoryMappedDevice[] mm; 6647: if (XEiJ.mpuSFC == 1 || XEiJ.mpuSFC == 2) { //ユーザモード 6648: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6649: } else if (XEiJ.mpuSFC == 5 || XEiJ.mpuSFC == 6) { //スーパーバイザモード 6650: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6651: } else { //CPU空間などは不可 6652: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_READ; 6653: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6654: M68kException.m6eAddress = a; 6655: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6656: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6657: throw M68kException.m6eSignal; 6658: } 6659: int z; 6660: if ((a & 1) == 0) { //偶数 6661: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6662: } else { //奇数 6663: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a) << 8; 6664: a++; 6665: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6666: } 6667: if (n < 8) { //MOVES.W <ea>,Dn 6668: XEiJ.regRn[n] = XEiJ.regRn[n] & ~65535 | z; 6669: } else { //MOVES.W <ea>,An 6670: XEiJ.regRn[n] = (short) z; 6671: } 6672: } else { //MOVES.W Rn,<ea>。ライト 6673: MemoryMappedDevice[] mm; 6674: if (XEiJ.mpuDFC == 1 || XEiJ.mpuDFC == 2) { //ユーザモード 6675: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6676: } else if (XEiJ.mpuDFC == 5 || XEiJ.mpuDFC == 6) { //スーパーバイザモード 6677: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6678: } else { //CPU空間などは不可 6679: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE; 6680: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6681: M68kException.m6eAddress = a; 6682: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6683: M68kException.m6eSize = XEiJ.MPU_SS_WORD; 6684: throw M68kException.m6eSignal; 6685: } 6686: int z = XEiJ.regRn[n]; 6687: if ((a & 1) == 0) { //偶数 6688: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6689: } else { //奇数 6690: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 8); 6691: a++; 6692: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6693: } 6694: } 6695: } //irpMovesWord 6696: 6697: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6698: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6699: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6701: //MOVES.L <ea>,Rn |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn000000000000 6702: //MOVES.L Rn,<ea> |-|-12346|P|-----|-----| M+-WXZ |0000_111_010_mmm_rrr-rnnn100000000000 6703: // 6704: //MOVES.L <ea>,Rn 6705: // SFC=1,2,5,6はアドレス変換あり、SFC=0,3,4はアドレス変換なし、 6706: // SFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6707: // 6708: //MOVES.L Rn,<ea> 6709: // DFC=1,2,5,6はアドレス変換あり、DFC=0,3,4はアドレス変換なし、 6710: // DFC=7はCPU空間なのでコプロセッサが割り当てられている領域以外はバスエラーになる 6711: public static void irpMovesLong () throws M68kException { 6712: int w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6713: if (w << -11 != 0) { 6714: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6715: throw M68kException.m6eSignal; 6716: } 6717: if (XEiJ.regSRS == 0) { //ユーザモードのとき 6718: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 6719: throw M68kException.m6eSignal; 6720: } 6721: //以下はスーパーバイザモード 6722: XEiJ.mpuCycleCount += 4; 6723: int a = efaMltLong (XEiJ.regOC & 63); 6724: int n = w >>> 12; //n 6725: if (w << 31 - 11 >= 0) { //MOVES.L <ea>,Rn。リード 6726: MemoryMappedDevice[] mm; 6727: if (XEiJ.mpuSFC == 1 || XEiJ.mpuSFC == 2) { //ユーザモード 6728: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6729: } else if (XEiJ.mpuSFC == 5 || XEiJ.mpuSFC == 6) { //スーパーバイザモード 6730: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6731: } else { //CPU空間などは不可 6732: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_READ; 6733: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6734: M68kException.m6eAddress = a; 6735: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 6736: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6737: throw M68kException.m6eSignal; 6738: } 6739: int z; 6740: if ((a & 3) == 0) { //4の倍数 6741: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRls (a); 6742: } else if ((a & 1) == 0) { //4の倍数+2 6743: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRws (a) << 16; 6744: a += 2; 6745: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a); 6746: } else { //奇数 6747: z = mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbs (a) << 24; 6748: a++; 6749: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRwz (a) << 8; 6750: a += 2; 6751: z |= mm[a >>> XEiJ.BUS_PAGE_BITS].mmdRbz (a); 6752: } 6753: XEiJ.regRn[n] = z; 6754: } else { //MOVES.L Rn,<ea>。ライト 6755: MemoryMappedDevice[] mm; 6756: if (XEiJ.mpuDFC == 1 || XEiJ.mpuDFC == 2) { //ユーザモード 6757: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpUserMap : XEiJ.busUserMap; 6758: } else if (XEiJ.mpuDFC == 5 || XEiJ.mpuDFC == 6) { //スーパーバイザモード 6759: mm = DataBreakPoint.DBP_ON ? DataBreakPoint.dbpSuperMap : XEiJ.busSuperMap; 6760: } else { //CPU空間などは不可 6761: M68kException.m6eFSLW |= M68kException.M6E_FSLW_BUS_ERROR_ON_WRITE; 6762: M68kException.m6eNumber = M68kException.M6E_ACCESS_FAULT; 6763: M68kException.m6eAddress = a; 6764: M68kException.m6eDirection = XEiJ.MPU_WR_WRITE; 6765: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 6766: throw M68kException.m6eSignal; 6767: } 6768: int z = XEiJ.regRn[n]; 6769: if ((a & 3) == 0) { //4の倍数 6770: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWl (a, z); 6771: } else if ((a & 1) == 0) { //4の倍数+2 6772: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 16); 6773: a += 2; 6774: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z); 6775: } else { //奇数 6776: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z >> 24); 6777: a++; 6778: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWw (a, z >> 8); 6779: a += 2; 6780: mm[a >>> XEiJ.BUS_PAGE_BITS].mmdWb (a, z); 6781: } 6782: } 6783: } //irpMovesLong 6784: 6785: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6786: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6787: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6788: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6789: //CAS.L Dc,Du,<ea> |-|--2346|-|-UUUU|-****| M+-WXZ |0000_111_011_mmm_rrr-0000000uuu000ccc (68060 software emulate misaligned <ea>) 6790: //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) |-|--234S|-|-UUUU|-****| |0000_111_011_111_100-rnnn000uuu000ccc(1)-rnnn_000_uuu_000_ccc(2) 6791: public static void irpCasLong () throws M68kException { 6792: int ea = XEiJ.regOC & 63; 6793: if (ea == XEiJ.EA_IM) { //CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2) 6794: int w; 6795: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6796: w = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 6797: } else { 6798: w = XEiJ.regPC; 6799: XEiJ.regPC = w + 4; 6800: w = XEiJ.busRlse (w); //pcls 6801: } 6802: if ((w & ~0b1111_000_111_000_111_1111_000_111_000_111) != 0) { 6803: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6804: throw M68kException.m6eSignal; 6805: } 6806: int c1 = w >>> 16 & 7; 6807: int c2 = w & 7; 6808: int a1 = XEiJ.regRn[w >>> 16 + 12 ]; //a1=Rn1 6809: int a2 = XEiJ.regRn[w >>> 12 & 15]; //a2=Rn2 6810: int x1 = XEiJ.busRls (a1); //x1=(Rn1) 6811: int x2 = XEiJ.busRls (a2); //x2=(Rn2) 6812: int y = XEiJ.regRn[c1]; //y=Dc1 6813: int z = x1 - y; //z=(Rn1)-Dc1 6814: if (z == 0) { //(Rn1)==Dc1 6815: y = XEiJ.regRn[c2]; //y=Dc2 6816: z = x2 - y; //z=(Rn2)-Dc2 6817: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6818: ((x2 ^ y) & (x2 ^ z)) >>> 31 << 1 | 6819: (x2 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6820: if (z == 0) { //(Rn1)==Dc1&&(Rn2)==Dc2 6821: XEiJ.mpuCycleCount += 44; 6822: XEiJ.busWl (a1, XEiJ.regRn[w >>> 16 + 6 & 7]); //Du1→(Rn1) 6823: XEiJ.busWl (a2, XEiJ.regRn[w >>> 6 & 7]); //Du2→(Rn2) 6824: } else { //(Rn1)==Dc1&&(Rn2)!=Dc2 6825: XEiJ.mpuCycleCount += 28; 6826: XEiJ.regRn[c1] = x1; //(Rn1)→Dc1 6827: XEiJ.regRn[c2] = x2; //(Rn2)→Dc2 6828: } 6829: } else { //(Rn1)!=Dc1 6830: XEiJ.mpuCycleCount += 28; 6831: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 6832: ((x1 ^ y) & (x1 ^ z)) >>> 31 << 1 | 6833: (x1 & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6834: XEiJ.regRn[c1] = x1; //(Rn1)→Dc1 6835: XEiJ.regRn[c2] = x2; //(Rn2)→Dc2 6836: } 6837: } else { //CAS.L Dc,Du,<ea> 6838: int w; 6839: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6840: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz 6841: } else { 6842: w = XEiJ.regPC; 6843: XEiJ.regPC = w + 2; 6844: w = XEiJ.busRwze (w); //pcwz 6845: } 6846: if ((w & ~0b0000_000_111_000_111) != 0) { 6847: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 6848: throw M68kException.m6eSignal; 6849: } 6850: int c = w & 7; 6851: int y = XEiJ.regRn[c]; //y=Dc 6852: int a = efaMltLong (ea); //a=ea 6853: int x = XEiJ.busRls (a); //x=<ea> 6854: int z = x - y; //z=<ea>-Dc 6855: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 6856: (z < 0 ? XEiJ.REG_CCR_N : 0) | 6857: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 6858: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 6859: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 6860: if (z == 0) { //<ea>==Dc 6861: XEiJ.mpuCycleCount += 24; 6862: XEiJ.busWl (a, XEiJ.regRn[w >> 6]); //Du→<ea> 6863: } else { //<ea>!=Dc 6864: XEiJ.mpuCycleCount += 16; 6865: XEiJ.regRn[c] = x; //<ea>→Dc 6866: } 6867: } 6868: } //irpCasLong 6869: 6870: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6871: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6872: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6873: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6874: //MOVE.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_000_mmm_rrr 6875: public static void irpMoveToDRByte () throws M68kException { 6876: XEiJ.mpuCycleCount += 4; 6877: int ea = XEiJ.regOC & 63; 6878: int qqq = XEiJ.regOC >> 9 & 7; 6879: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 6880: XEiJ.regRn[qqq] = ~255 & XEiJ.regRn[qqq] | 255 & z; 6881: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6882: } //irpMoveToDRByte 6883: 6884: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6885: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6886: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6887: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6888: //MOVE.B <ea>,(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_010_mmm_rrr 6889: public static void irpMoveToMMByte () throws M68kException { 6890: XEiJ.mpuCycleCount += 8; 6891: int ea = XEiJ.regOC & 63; 6892: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 6893: XEiJ.busWb (XEiJ.regRn[XEiJ.regOC >> 9], z); //1qqq=aqq 6894: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6895: } //irpMoveToMMByte 6896: 6897: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6898: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6899: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6900: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6901: //MOVE.B <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_011_mmm_rrr 6902: public static void irpMoveToMPByte () throws M68kException { 6903: XEiJ.mpuCycleCount += 8; 6904: int ea = XEiJ.regOC & 63; 6905: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 6906: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 6907: XEiJ.busWb (aqq < 15 ? XEiJ.regRn[aqq]++ : (XEiJ.regRn[15] += 2) - 2, z); 6908: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6909: } //irpMoveToMPByte 6910: 6911: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6912: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6913: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6914: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6915: //MOVE.B <ea>,-(Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_100_mmm_rrr 6916: public static void irpMoveToMNByte () throws M68kException { 6917: XEiJ.mpuCycleCount += 8; 6918: int ea = XEiJ.regOC & 63; 6919: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 6920: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 6921: XEiJ.busWb (aqq < 15 ? --XEiJ.regRn[aqq] : (XEiJ.regRn[15] -= 2), z); 6922: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6923: } //irpMoveToMNByte 6924: 6925: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6926: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6927: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6928: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6929: //MOVE.B <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_101_mmm_rrr 6930: public static void irpMoveToMWByte () throws M68kException { 6931: XEiJ.mpuCycleCount += 12; 6932: int ea = XEiJ.regOC & 63; 6933: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 6934: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 6935: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6936: XEiJ.busWb (XEiJ.regRn[aqq] //ベースレジスタ 6937: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws。ワードディスプレースメント 6938: z); 6939: } else { 6940: int t = XEiJ.regPC; 6941: XEiJ.regPC = t + 2; 6942: XEiJ.busWb (XEiJ.regRn[aqq] //ベースレジスタ 6943: + XEiJ.busRwse (t), //pcws。ワードディスプレースメント 6944: z); 6945: } 6946: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6947: } //irpMoveToMWByte 6948: 6949: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6950: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6951: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6952: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6953: //MOVE.B <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_qqq_110_mmm_rrr 6954: public static void irpMoveToMXByte () throws M68kException { 6955: XEiJ.mpuCycleCount += 14; 6956: int ea = XEiJ.regOC & 63; 6957: int aqq = XEiJ.regOC >> 9; //1qqq=aqq 6958: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); //ここでAqが変化する可能性があることに注意 6959: int w; 6960: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6961: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 6962: } else { 6963: w = XEiJ.regPC; 6964: XEiJ.regPC = w + 2; 6965: w = XEiJ.busRwze (w); //pcwz。拡張ワード 6966: } 6967: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 6968: int t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 6969: XEiJ.regRn[aqq]) //ベースレジスタ 6970: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 6971: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 6972: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 6973: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 6974: int x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 6975: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 6976: XEiJ.regRn[w >> 12]) //ロングインデックス 6977: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 6978: XEiJ.busWb ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 6979: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 6980: XEiJ.busRls (t) + x) //ポストインデックス 6981: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 6982: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 6983: XEiJ.busRlse ((XEiJ.regPC += 4) - 4)), //pcls。ロングアウタディスプレースメント 6984: z); 6985: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 6986: } //irpMoveToMXByte 6987: 6988: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6989: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 6990: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 6991: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 6992: //MOVE.B <ea>,(xxx).W |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_000_111_mmm_rrr 6993: public static void irpMoveToZWByte () throws M68kException { 6994: XEiJ.mpuCycleCount += 12; 6995: int ea = XEiJ.regOC & 63; 6996: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 6997: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 6998: XEiJ.busWb (XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws 6999: z); 7000: } else { 7001: int t = XEiJ.regPC; 7002: XEiJ.regPC = t + 2; 7003: XEiJ.busWb (XEiJ.busRwse (t), //pcws 7004: z); 7005: } 7006: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7007: } //irpMoveToZWByte 7008: 7009: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7010: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7011: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7012: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7013: //MOVE.B <ea>,(xxx).L |-|012346|-|-UUUU|-**00|D M+-WXZPI|0001_001_111_mmm_rrr 7014: public static void irpMoveToZLByte () throws M68kException { 7015: XEiJ.mpuCycleCount += 16; 7016: int ea = XEiJ.regOC & 63; 7017: int z = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 7018: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7019: XEiJ.busWb (XEiJ.busRlse ((XEiJ.regPC += 4) - 4), //pcls 7020: z); 7021: } else { 7022: int t = XEiJ.regPC; 7023: XEiJ.regPC = t + 4; 7024: XEiJ.busWb (XEiJ.busRlse (t), //pcls 7025: z); 7026: } 7027: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7028: } //irpMoveToZLByte 7029: 7030: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7031: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7032: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7033: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7034: //MOVE.L <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_000_mmm_rrr 7035: public static void irpMoveToDRLong () throws M68kException { 7036: XEiJ.mpuCycleCount += 4; 7037: int ea = XEiJ.regOC & 63; 7038: int z; 7039: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7040: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7041: } //irpMoveToDRLong 7042: 7043: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7044: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7045: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7046: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7047: //MOVEA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr 7048: //MOVE.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0010_qqq_001_mmm_rrr [MOVEA.L <ea>,Aq] 7049: public static void irpMoveaLong () throws M68kException { 7050: XEiJ.mpuCycleCount += 4; 7051: int ea = XEiJ.regOC & 63; 7052: XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7053: } //irpMoveaLong 7054: 7055: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7056: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7057: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7058: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7059: //MOVE.L <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_010_mmm_rrr 7060: public static void irpMoveToMMLong () throws M68kException { 7061: XEiJ.mpuCycleCount += 12; 7062: int ea = XEiJ.regOC & 63; 7063: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7064: XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)], z); 7065: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7066: } //irpMoveToMMLong 7067: 7068: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7069: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7070: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7071: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7072: //MOVE.L <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_011_mmm_rrr 7073: public static void irpMoveToMPLong () throws M68kException { 7074: XEiJ.mpuCycleCount += 12; 7075: int ea = XEiJ.regOC & 63; 7076: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7077: XEiJ.busWl ((XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] += 4) - 4, z); 7078: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7079: } //irpMoveToMPLong 7080: 7081: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7082: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7083: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7084: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7085: //MOVE.L <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_100_mmm_rrr 7086: public static void irpMoveToMNLong () throws M68kException { 7087: XEiJ.mpuCycleCount += 12; 7088: int ea = XEiJ.regOC & 63; 7089: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7090: XEiJ.busWl ((XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] -= 4), z); 7091: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7092: } //irpMoveToMNLong 7093: 7094: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7095: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7096: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7097: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7098: //MOVE.L <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_101_mmm_rrr 7099: public static void irpMoveToMWLong () throws M68kException { 7100: XEiJ.mpuCycleCount += 16; 7101: int ea = XEiJ.regOC & 63; 7102: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7103: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7104: XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] //ベースレジスタ 7105: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws。ワードディスプレースメント 7106: z); 7107: } else { 7108: int t = XEiJ.regPC; 7109: XEiJ.regPC = t + 2; 7110: XEiJ.busWl (XEiJ.regRn[(XEiJ.regOC >> 9) - (16 - 8)] //ベースレジスタ 7111: + XEiJ.busRwse (t), //pcws。ワードディスプレースメント 7112: z); 7113: } 7114: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7115: } //irpMoveToMWLong 7116: 7117: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7118: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7119: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7120: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7121: //MOVE.L <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_qqq_110_mmm_rrr 7122: public static void irpMoveToMXLong () throws M68kException { 7123: XEiJ.mpuCycleCount += 18; 7124: int ea = XEiJ.regOC & 63; 7125: int aqq = (XEiJ.regOC >> 9) - (16 - 8); 7126: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7127: int w; 7128: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7129: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 7130: } else { 7131: w = XEiJ.regPC; 7132: XEiJ.regPC = w + 2; 7133: w = XEiJ.busRwze (w); //pcwz。拡張ワード 7134: } 7135: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 7136: int t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 7137: XEiJ.regRn[aqq]) //ベースレジスタ 7138: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 7139: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 7140: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 7141: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 7142: int x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 7143: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7144: XEiJ.regRn[w >> 12]) //ロングインデックス 7145: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 7146: XEiJ.busWl ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 7147: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 7148: XEiJ.busRls (t) + x) //ポストインデックス 7149: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 7150: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 7151: XEiJ.busRlse ((XEiJ.regPC += 4) - 4)), //pcls。ロングアウタディスプレースメント 7152: z); 7153: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7154: } //irpMoveToMXLong 7155: 7156: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7157: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7158: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7159: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7160: //MOVE.L <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_000_111_mmm_rrr 7161: public static void irpMoveToZWLong () throws M68kException { 7162: XEiJ.mpuCycleCount += 16; 7163: int ea = XEiJ.regOC & 63; 7164: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7165: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7166: XEiJ.busWl (XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws 7167: z); 7168: } else { 7169: int t = XEiJ.regPC; 7170: XEiJ.regPC = t + 2; 7171: XEiJ.busWl (XEiJ.busRwse (t), //pcws 7172: z); 7173: } 7174: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7175: } //irpMoveToZWLong 7176: 7177: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7178: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7179: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7180: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7181: //MOVE.L <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0010_001_111_mmm_rrr 7182: public static void irpMoveToZLLong () throws M68kException { 7183: XEiJ.mpuCycleCount += 20; 7184: int ea = XEiJ.regOC & 63; 7185: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7186: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7187: XEiJ.busWl (XEiJ.busRlse ((XEiJ.regPC += 4) - 4), //pcls 7188: z); 7189: } else { 7190: int t = XEiJ.regPC; 7191: XEiJ.regPC = t + 4; 7192: XEiJ.busWl (XEiJ.busRlse (t), //pcls 7193: z); 7194: } 7195: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7196: } //irpMoveToZLLong 7197: 7198: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7199: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7200: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7201: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7202: //MOVE.W <ea>,Dq |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_000_mmm_rrr 7203: public static void irpMoveToDRWord () throws M68kException { 7204: XEiJ.mpuCycleCount += 4; 7205: int ea = XEiJ.regOC & 63; 7206: int qqq = XEiJ.regOC >> 9 & 7; 7207: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7208: XEiJ.regRn[qqq] = ~65535 & XEiJ.regRn[qqq] | (char) z; 7209: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7210: } //irpMoveToDRWord 7211: 7212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7213: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7214: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7215: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7216: //MOVEA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr 7217: //MOVE.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|0011_qqq_001_mmm_rrr [MOVEA.W <ea>,Aq] 7218: // 7219: //MOVEA.W <ea>,Aq 7220: // ワードデータをロングに符号拡張してAqの全体を更新する 7221: public static void irpMoveaWord () throws M68kException { 7222: XEiJ.mpuCycleCount += 4; 7223: int ea = XEiJ.regOC & 63; 7224: XEiJ.regRn[XEiJ.regOC >> 9 & 15] = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //符号拡張して32bit全部書き換える。このr[ea]はデータレジスタまたはアドレスレジスタ。右辺でAqが変化する可能性があることに注意 7225: } //irpMoveaWord 7226: 7227: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7228: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7229: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7230: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7231: //MOVE.W <ea>,(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_010_mmm_rrr 7232: public static void irpMoveToMMWord () throws M68kException { 7233: XEiJ.mpuCycleCount += 8; 7234: int ea = XEiJ.regOC & 63; 7235: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7236: XEiJ.busWw (XEiJ.regRn[XEiJ.regOC >> 9 & 15], z); 7237: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7238: } //irpMoveToMMWord 7239: 7240: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7241: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7242: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7244: //MOVE.W <ea>,(Aq)+ |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_011_mmm_rrr 7245: public static void irpMoveToMPWord () throws M68kException { 7246: XEiJ.mpuCycleCount += 8; 7247: int ea = XEiJ.regOC & 63; 7248: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7249: XEiJ.busWw ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 2) - 2, z); 7250: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7251: } //irpMoveToMPWord 7252: 7253: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7254: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7255: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7256: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7257: //MOVE.W <ea>,-(Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_100_mmm_rrr 7258: public static void irpMoveToMNWord () throws M68kException { 7259: XEiJ.mpuCycleCount += 8; 7260: int ea = XEiJ.regOC & 63; 7261: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7262: XEiJ.busWw ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2), z); 7263: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7264: } //irpMoveToMNWord 7265: 7266: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7267: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7268: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7269: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7270: //MOVE.W <ea>,(d16,Aq) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_101_mmm_rrr 7271: public static void irpMoveToMWWord () throws M68kException { 7272: XEiJ.mpuCycleCount += 12; 7273: int ea = XEiJ.regOC & 63; 7274: int aqq = XEiJ.regOC >> 9 & 15; 7275: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7276: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7277: XEiJ.busWw (XEiJ.regRn[aqq] //ベースレジスタ 7278: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws。ワードディスプレースメント 7279: z); 7280: } else { 7281: int t = XEiJ.regPC; 7282: XEiJ.regPC = t + 2; 7283: XEiJ.busWw (XEiJ.regRn[aqq] //ベースレジスタ 7284: + XEiJ.busRwse (t), //pcws。ワードディスプレースメント 7285: z); 7286: } 7287: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7288: } //irpMoveToMWWord 7289: 7290: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7291: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7292: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7293: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7294: //MOVE.W <ea>,(d8,Aq,Rn.wl) |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_qqq_110_mmm_rrr 7295: public static void irpMoveToMXWord () throws M68kException { 7296: XEiJ.mpuCycleCount += 14; 7297: int ea = XEiJ.regOC & 63; 7298: int aqq = XEiJ.regOC >> 9 & 15; 7299: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 7300: int w; 7301: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7302: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 7303: } else { 7304: w = XEiJ.regPC; 7305: XEiJ.regPC = w + 2; 7306: w = XEiJ.busRwze (w); //pcwz。拡張ワード 7307: } 7308: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 7309: int t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 7310: XEiJ.regRn[aqq]) //ベースレジスタ 7311: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 7312: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 7313: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 7314: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 7315: int x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 7316: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 7317: XEiJ.regRn[w >> 12]) //ロングインデックス 7318: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 7319: XEiJ.busWw ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 7320: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 7321: XEiJ.busRls (t) + x) //ポストインデックス 7322: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 7323: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 7324: XEiJ.busRlse ((XEiJ.regPC += 4) - 4)), //pcls。ロングアウタディスプレースメント 7325: z); 7326: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7327: } //irpMoveToMXWord 7328: 7329: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7330: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7331: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7332: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7333: //MOVE.W <ea>,(xxx).W |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_000_111_mmm_rrr 7334: public static void irpMoveToZWWord () throws M68kException { 7335: XEiJ.mpuCycleCount += 12; 7336: int ea = XEiJ.regOC & 63; 7337: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7338: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7339: XEiJ.busWw (XEiJ.busRwse ((XEiJ.regPC += 2) - 2), //pcws 7340: z); 7341: } else { 7342: int t = XEiJ.regPC; 7343: XEiJ.regPC = t + 2; 7344: XEiJ.busWw (XEiJ.busRwse (t), //pcws 7345: z); 7346: } 7347: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7348: } //irpMoveToZWWord 7349: 7350: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7351: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7352: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7353: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7354: //MOVE.W <ea>,(xxx).L |-|012346|-|-UUUU|-**00|DAM+-WXZPI|0011_001_111_mmm_rrr 7355: public static void irpMoveToZLWord () throws M68kException { 7356: XEiJ.mpuCycleCount += 16; 7357: int ea = XEiJ.regOC & 63; 7358: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 7359: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7360: XEiJ.busWw (XEiJ.busRlse ((XEiJ.regPC += 4) - 4), //pcls 7361: z); 7362: } else { 7363: int t = XEiJ.regPC; 7364: XEiJ.regPC = t + 4; 7365: XEiJ.busWw (XEiJ.busRlse (t), //pcls 7366: z); 7367: } 7368: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7369: } //irpMoveToZLWord 7370: 7371: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7372: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7373: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7374: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7375: //NEGX.B <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_000_mmm_rrr 7376: public static void irpNegxByte () throws M68kException { 7377: int ea = XEiJ.regOC & 63; 7378: int y; 7379: int z; 7380: if (ea < XEiJ.EA_AR) { //NEGX.B Dr 7381: XEiJ.mpuCycleCount += 4; 7382: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y) - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 7383: } else { //NEGX.B <mem> 7384: XEiJ.mpuCycleCount += 8; 7385: int a = efaMltByte (ea); 7386: XEiJ.busWb (a, z = (byte) (-(y = XEiJ.busRbs (a)) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7387: } 7388: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7389: (y & z) >>> 31 << 1 | 7390: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7391: } //irpNegxByte 7392: 7393: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7394: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7395: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7396: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7397: //NEGX.W <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_001_mmm_rrr 7398: public static void irpNegxWord () throws M68kException { 7399: int ea = XEiJ.regOC & 63; 7400: int y; 7401: int z; 7402: if (ea < XEiJ.EA_AR) { //NEGX.W Dr 7403: XEiJ.mpuCycleCount += 4; 7404: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) (-(y = (short) y) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7405: } else { //NEGX.W <mem> 7406: XEiJ.mpuCycleCount += 8; 7407: int a = efaMltWord (ea); 7408: XEiJ.busWw (a, z = (short) (-(y = XEiJ.busRws (a)) - (XEiJ.regCCR >> 4))); //Xの左側はすべて0なのでCCR_X&を省略 7409: } 7410: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7411: (y & z) >>> 31 << 1 | 7412: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7413: } //irpNegxWord 7414: 7415: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7416: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7417: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7418: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7419: //NEGX.L <ea> |-|012346|-|*UUUU|*****|D M+-WXZ |0100_000_010_mmm_rrr 7420: public static void irpNegxLong () throws M68kException { 7421: int ea = XEiJ.regOC & 63; 7422: int y; 7423: int z; 7424: if (ea < XEiJ.EA_AR) { //NEGX.L Dr 7425: XEiJ.mpuCycleCount += 6; 7426: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 7427: } else { //NEGX.L <mem> 7428: XEiJ.mpuCycleCount += 12; 7429: int a = efaMltLong (ea); 7430: XEiJ.busWl (a, z = -(y = XEiJ.busRls (a)) - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 7431: } 7432: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 7433: (y & z) >>> 31 << 1 | 7434: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_negx 7435: } //irpNegxLong 7436: 7437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7438: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7439: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7440: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7441: //MOVE.W SR,<ea> |-|-12346|P|*****|-----|D M+-WXZ |0100_000_011_mmm_rrr 7442: public static void irpMoveFromSR () throws M68kException { 7443: //MC68010以上では特権命令 7444: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7445: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7446: throw M68kException.m6eSignal; 7447: } 7448: //以下はスーパーバイザモード 7449: int ea = XEiJ.regOC & 63; 7450: if (ea < XEiJ.EA_AR) { //MOVE.W SR,Dr 7451: XEiJ.mpuCycleCount += 6; 7452: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 7453: } else { //MOVE.W SR,<mem> 7454: XEiJ.mpuCycleCount += 8; 7455: XEiJ.busWw (efaMltWord (ea), XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR); 7456: } 7457: } //irpMoveFromSR 7458: 7459: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7460: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7461: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7462: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7463: //CHK.L <ea>,Dq |-|--2346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_100_mmm_rrr 7464: public static void irpChkLong () throws M68kException { 7465: XEiJ.mpuCycleCount += 14; 7466: int ea = XEiJ.regOC & 63; 7467: int x = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); 7468: int y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7469: int z = x - y; 7470: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 7471: (y < 0 ? XEiJ.REG_CCR_N : 0) | 7472: (y == 0 ? XEiJ.REG_CCR_Z : 0) | 7473: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 7474: (x & (y ^ z) ^ (y | z)) >>> 31); 7475: if (y < 0 || x < y) { 7476: XEiJ.mpuCycleCount += 40 - 14 - 34; 7477: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 7478: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7479: throw M68kException.m6eSignal; 7480: } 7481: } //irpChkLong 7482: 7483: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7484: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7485: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7486: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7487: //CHK.W <ea>,Dq |-|012346|-|-UUUU|-*UUU|D M+-WXZPI|0100_qqq_110_mmm_rrr 7488: public static void irpChkWord () throws M68kException { 7489: XEiJ.mpuCycleCount += 10; 7490: int ea = XEiJ.regOC & 63; 7491: int x = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); 7492: int y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 7493: int z = (short) (x - y); 7494: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | 7495: (y < 0 ? XEiJ.REG_CCR_N : 0) | 7496: (y == 0 ? XEiJ.REG_CCR_Z : 0) | 7497: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 7498: (x & (y ^ z) ^ (y | z)) >>> 31); 7499: if (y < 0 || x < y) { 7500: XEiJ.mpuCycleCount += 40 - 10 - 34; 7501: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 7502: M68kException.m6eNumber = M68kException.M6E_CHK_INSTRUCTION; 7503: throw M68kException.m6eSignal; 7504: } 7505: } //irpChkWord 7506: 7507: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7508: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7509: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7510: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7511: //LEA.L <ea>,Aq |-|012346|-|-----|-----| M WXZP |0100_qqq_111_mmm_rrr 7512: //EXTB.L Dr |-|--2346|-|-UUUU|-**00|D |0100_100_111_000_rrr 7513: public static void irpLea () throws M68kException { 7514: int ea = XEiJ.regOC & 63; 7515: if (ea < XEiJ.EA_AR) { //EXTB.L Dr 7516: XEiJ.mpuCycleCount += 4; 7517: int z; 7518: XEiJ.regRn[ea] = z = (byte) XEiJ.regRn[ea]; 7519: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7520: } else { //LEA.L <ea>,Aq 7521: //XEiJ.mpuCycleCount += 4 - 4; 7522: XEiJ.regRn[(XEiJ.regOC >> 9) - (32 - 8)] = efaLeaPea (ea); 7523: } 7524: } //irpLea 7525: 7526: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7527: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7528: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7529: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7530: //CLR.B <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_000_mmm_rrr (68000 and 68008 read before clear) 7531: public static void irpClrByte () throws M68kException { 7532: int ea = XEiJ.regOC & 63; 7533: if (ea < XEiJ.EA_AR) { //CLR.B Dr 7534: XEiJ.mpuCycleCount += 4; 7535: XEiJ.regRn[ea] &= ~0xff; 7536: } else { //CLR.B <mem> 7537: XEiJ.mpuCycleCount += 8; 7538: XEiJ.busWb (efaMltByte (ea), 0); 7539: } 7540: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7541: } //irpClrByte 7542: 7543: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7544: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7545: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7546: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7547: //CLR.W <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_001_mmm_rrr (68000 and 68008 read before clear) 7548: public static void irpClrWord () throws M68kException { 7549: int ea = XEiJ.regOC & 63; 7550: if (ea < XEiJ.EA_AR) { //CLR.W Dr 7551: XEiJ.mpuCycleCount += 4; 7552: XEiJ.regRn[ea] &= ~0xffff; 7553: } else { //CLR.W <mem> 7554: XEiJ.mpuCycleCount += 8; 7555: XEiJ.busWw (efaMltWord (ea), 0); 7556: } 7557: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7558: } //irpClrWord 7559: 7560: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7561: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7562: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7563: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7564: //CLR.L <ea> |-|012346|-|-UUUU|-0100|D M+-WXZ |0100_001_010_mmm_rrr (68000 and 68008 read before clear) 7565: public static void irpClrLong () throws M68kException { 7566: int ea = XEiJ.regOC & 63; 7567: if (ea < XEiJ.EA_AR) { //CLR.L Dr 7568: XEiJ.mpuCycleCount += 6; 7569: XEiJ.regRn[ea] = 0; 7570: } else { //CLR.L <mem> 7571: XEiJ.mpuCycleCount += 12; 7572: XEiJ.busWl (efaMltLong (ea), 0); 7573: } 7574: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z; //ccr_clr 7575: } //irpClrLong 7576: 7577: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7578: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7579: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7580: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7581: //MOVE.W CCR,<ea> |-|-12346|-|*****|-----|D M+-WXZ |0100_001_011_mmm_rrr 7582: public static void irpMoveFromCCR () throws M68kException { 7583: int ea = XEiJ.regOC & 63; 7584: if (ea < XEiJ.EA_AR) { //MOVE.W CCR,Dr 7585: XEiJ.mpuCycleCount += 4; 7586: XEiJ.regRn[ea] = ~0xffff & XEiJ.regRn[ea] | XEiJ.regCCR; 7587: } else { //MOVE.W CCR,<mem> 7588: XEiJ.mpuCycleCount += 8; 7589: XEiJ.busWw (efaMltWord (ea), XEiJ.regCCR); 7590: } 7591: } //irpMoveFromCCR 7592: 7593: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7594: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7595: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7596: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7597: //NEG.B <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_000_mmm_rrr 7598: public static void irpNegByte () throws M68kException { 7599: int ea = XEiJ.regOC & 63; 7600: int y; 7601: int z; 7602: if (ea < XEiJ.EA_AR) { //NEG.B Dr 7603: XEiJ.mpuCycleCount += 4; 7604: z = (byte) (XEiJ.regRn[ea] = ~0xff & (y = XEiJ.regRn[ea]) | 0xff & -(y = (byte) y)); 7605: } else { //NEG.B <mem> 7606: XEiJ.mpuCycleCount += 8; 7607: int a = efaMltByte (ea); 7608: XEiJ.busWb (a, z = (byte) -(y = XEiJ.busRbs (a))); 7609: } 7610: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7611: (y & z) >>> 31 << 1 | 7612: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7613: } //irpNegByte 7614: 7615: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7616: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7617: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7618: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7619: //NEG.W <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_001_mmm_rrr 7620: public static void irpNegWord () throws M68kException { 7621: int ea = XEiJ.regOC & 63; 7622: int y; 7623: int z; 7624: if (ea < XEiJ.EA_AR) { //NEG.W Dr 7625: XEiJ.mpuCycleCount += 4; 7626: z = (short) (XEiJ.regRn[ea] = ~0xffff & (y = XEiJ.regRn[ea]) | (char) -(y = (short) y)); 7627: } else { //NEG.W <mem> 7628: XEiJ.mpuCycleCount += 8; 7629: int a = efaMltWord (ea); 7630: XEiJ.busWw (a, z = (short) -(y = XEiJ.busRws (a))); 7631: } 7632: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7633: (y & z) >>> 31 << 1 | 7634: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7635: } //irpNegWord 7636: 7637: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7638: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7639: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7640: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7641: //NEG.L <ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0100_010_010_mmm_rrr 7642: public static void irpNegLong () throws M68kException { 7643: int ea = XEiJ.regOC & 63; 7644: int y; 7645: int z; 7646: if (ea < XEiJ.EA_AR) { //NEG.L Dr 7647: XEiJ.mpuCycleCount += 6; 7648: XEiJ.regRn[ea] = z = -(y = XEiJ.regRn[ea]); 7649: } else { //NEG.L <mem> 7650: XEiJ.mpuCycleCount += 12; 7651: int a = efaMltLong (ea); 7652: XEiJ.busWl (a, z = -(y = XEiJ.busRls (a))); 7653: } 7654: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 7655: (y & z) >>> 31 << 1 | 7656: (y | z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_neg 7657: } //irpNegLong 7658: 7659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7660: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7661: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7663: //MOVE.W <ea>,CCR |-|012346|-|UUUUU|*****|D M+-WXZPI|0100_010_011_mmm_rrr 7664: public static void irpMoveToCCR () throws M68kException { 7665: XEiJ.mpuCycleCount += 12; 7666: int ea = XEiJ.regOC & 63; 7667: XEiJ.regCCR = XEiJ.REG_CCR_MASK & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea))); 7668: } //irpMoveToCCR 7669: 7670: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7671: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7672: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7673: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7674: //NOT.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_000_mmm_rrr 7675: public static void irpNotByte () throws M68kException { 7676: int ea = XEiJ.regOC & 63; 7677: int z; 7678: if (ea < XEiJ.EA_AR) { //NOT.B Dr 7679: XEiJ.mpuCycleCount += 4; 7680: z = XEiJ.regRn[ea] ^= 255; //0拡張してからEOR 7681: } else { //NOT.B <mem> 7682: XEiJ.mpuCycleCount += 8; 7683: int a = efaMltByte (ea); 7684: XEiJ.busWb (a, z = ~XEiJ.busRbs (a)); 7685: } 7686: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 7687: } //irpNotByte 7688: 7689: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7690: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7691: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7692: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7693: //NOT.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_001_mmm_rrr 7694: public static void irpNotWord () throws M68kException { 7695: int ea = XEiJ.regOC & 63; 7696: int z; 7697: if (ea < XEiJ.EA_AR) { //NOT.W Dr 7698: XEiJ.mpuCycleCount += 4; 7699: z = XEiJ.regRn[ea] ^= 65535; //0拡張してからEOR 7700: } else { //NOT.W <mem> 7701: XEiJ.mpuCycleCount += 8; 7702: int a = efaMltWord (ea); 7703: XEiJ.busWw (a, z = ~XEiJ.busRws (a)); 7704: } 7705: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 7706: } //irpNotWord 7707: 7708: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7709: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7710: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7711: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7712: //NOT.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_011_010_mmm_rrr 7713: public static void irpNotLong () throws M68kException { 7714: int ea = XEiJ.regOC & 63; 7715: int z; 7716: if (ea < XEiJ.EA_AR) { //NOT.L Dr 7717: XEiJ.mpuCycleCount += 6; 7718: z = XEiJ.regRn[ea] ^= 0xffffffff; 7719: } else { //NOT.L <mem> 7720: XEiJ.mpuCycleCount += 12; 7721: int a = efaMltLong (ea); 7722: XEiJ.busWl (a, z = ~XEiJ.busRls (a)); 7723: } 7724: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7725: } //irpNotLong 7726: 7727: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7728: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7729: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7730: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7731: //MOVE.W <ea>,SR |-|012346|P|UUUUU|*****|D M+-WXZPI|0100_011_011_mmm_rrr 7732: public static void irpMoveToSR () throws M68kException { 7733: if (XEiJ.regSRS == 0) { //ユーザモードのとき 7734: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 7735: throw M68kException.m6eSignal; 7736: } 7737: //以下はスーパーバイザモード 7738: XEiJ.mpuCycleCount += 12; 7739: int ea = XEiJ.regOC & 63; 7740: irpSetSR (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea))); //特権違反チェックが先 7741: } //irpMoveToSR 7742: 7743: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7744: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7745: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7746: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7747: //NBCD.B <ea> |-|012346|-|UUUUU|*U*U*|D M+-WXZ |0100_100_000_mmm_rrr 7748: //LINK.L Ar,#<data> |-|--2346|-|-----|-----| |0100_100_000_001_rrr-{data} 7749: // 7750: //LINK.L Ar,#<data> 7751: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.L #<data>,A7と同じ 7752: // LINK.L A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 7753: public static void irpNbcd () throws M68kException { 7754: int ea = XEiJ.regOC & 63; 7755: if (ea < XEiJ.EA_AR) { //NBCD.B Dr 7756: XEiJ.mpuCycleCount += 6; 7757: XEiJ.regRn[ea] = ~0xff & XEiJ.regRn[ea] | irpSbcd (0, XEiJ.regRn[ea]); 7758: } else if (ea < XEiJ.EA_MM) { //LINK.L Ar,#<data> 7759: XEiJ.mpuCycleCount += 20; 7760: int arr = XEiJ.regOC - (0b0100_100_000_001_000 - 8); 7761: int sp = XEiJ.regRn[15] - 4; 7762: XEiJ.busWl (sp, XEiJ.regRn[arr]); //pushl 7763: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 7764: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 7765: } else { 7766: int t = XEiJ.regPC; 7767: XEiJ.regPC = t + 4; 7768: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRlse (t); //pcls 7769: } 7770: } else { //NBCD.B <mem> 7771: XEiJ.mpuCycleCount += 8; 7772: int a = efaMltByte (ea); 7773: XEiJ.busWb (a, irpSbcd (0, XEiJ.busRbs (a))); 7774: } 7775: } //irpNbcd 7776: 7777: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7778: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7779: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7780: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7781: //SWAP.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_001_000_rrr 7782: //BKPT #<data> |-|-12346|-|-----|-----| |0100_100_001_001_ddd 7783: //PEA.L <ea> |-|012346|-|-----|-----| M WXZP |0100_100_001_mmm_rrr 7784: public static void irpPea () throws M68kException { 7785: int ea = XEiJ.regOC & 63; 7786: if (ea < XEiJ.EA_AR) { //SWAP.W Dr 7787: XEiJ.mpuCycleCount += 4; 7788: int x; 7789: int z; 7790: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) << 16 | x >>> 16; 7791: //上位ワードと下位ワードを入れ替えた後のDrをロングでテストする 7792: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7793: } else { //PEA.L <ea> 7794: XEiJ.mpuCycleCount += 12 - 4; 7795: int a = efaLeaPea (ea); //BKPT #<data>はここでillegal instructionになる 7796: XEiJ.busWl (XEiJ.regRn[15] -= 4, a); //pushl。評価順序に注意。wl(r[15]-=4,eaz_leapea(ea))は不可 7797: } 7798: } //irpPea 7799: 7800: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7801: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 7802: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 7803: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 7804: //EXT.W Dr |-|012346|-|-UUUU|-**00|D |0100_100_010_000_rrr 7805: //MOVEM.W <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_010_mmm_rrr-llllllllllllllll 7806: public static void irpMovemToMemWord () throws M68kException { 7807: int ea = XEiJ.regOC & 63; 7808: if (ea < XEiJ.EA_AR) { //EXT.W Dr 7809: XEiJ.mpuCycleCount += 4; 7810: int z; 7811: XEiJ.regRn[ea] = ~0xffff & (z = XEiJ.regRn[ea]) | (char) (z = (byte) z); 7812: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 7813: } else { //MOVEM.W <list>,<ea> 7814: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 7815: XEiJ.regPC += 2; 7816: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 7817: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 7818: //転送するレジスタが0個のときArは変化しない 7819: int arr = ea - (XEiJ.EA_MN - 8); 7820: int a = XEiJ.regRn[arr]; 7821: XEiJ.regRn[arr] = a - 2; 7822: int t = a; 7823: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7824: if ((l & 0x0001) != 0) { 7825: XEiJ.busWw (a -= 2, XEiJ.regRn[15]); 7826: } 7827: if ((l & 0x0002) != 0) { 7828: XEiJ.busWw (a -= 2, XEiJ.regRn[14]); 7829: } 7830: if ((l & 0x0004) != 0) { 7831: XEiJ.busWw (a -= 2, XEiJ.regRn[13]); 7832: } 7833: if ((l & 0x0008) != 0) { 7834: XEiJ.busWw (a -= 2, XEiJ.regRn[12]); 7835: } 7836: if ((l & 0x0010) != 0) { 7837: XEiJ.busWw (a -= 2, XEiJ.regRn[11]); 7838: } 7839: if ((l & 0x0020) != 0) { 7840: XEiJ.busWw (a -= 2, XEiJ.regRn[10]); 7841: } 7842: if ((l & 0x0040) != 0) { 7843: XEiJ.busWw (a -= 2, XEiJ.regRn[ 9]); 7844: } 7845: if ((byte) l < 0) { //(l & 0x0080) != 0 7846: XEiJ.busWw (a -= 2, XEiJ.regRn[ 8]); 7847: } 7848: if ((l & 0x0100) != 0) { 7849: XEiJ.busWw (a -= 2, XEiJ.regRn[ 7]); 7850: } 7851: if ((l & 0x0200) != 0) { 7852: XEiJ.busWw (a -= 2, XEiJ.regRn[ 6]); 7853: } 7854: if ((l & 0x0400) != 0) { 7855: XEiJ.busWw (a -= 2, XEiJ.regRn[ 5]); 7856: } 7857: if ((l & 0x0800) != 0) { 7858: XEiJ.busWw (a -= 2, XEiJ.regRn[ 4]); 7859: } 7860: if ((l & 0x1000) != 0) { 7861: XEiJ.busWw (a -= 2, XEiJ.regRn[ 3]); 7862: } 7863: if ((l & 0x2000) != 0) { 7864: XEiJ.busWw (a -= 2, XEiJ.regRn[ 2]); 7865: } 7866: if ((l & 0x4000) != 0) { 7867: XEiJ.busWw (a -= 2, XEiJ.regRn[ 1]); 7868: } 7869: if ((short) l < 0) { //(l & 0x8000) != 0 7870: XEiJ.busWw (a -= 2, XEiJ.regRn[ 0]); 7871: } 7872: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 7873: for (int i = 15; i >= 0; i--) { 7874: if ((l & 0x8000 >>> i) != 0) { 7875: XEiJ.busWw (a -= 2, XEiJ.regRn[i]); 7876: } 7877: } 7878: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 7879: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 7880: for (int i = 15; l != 0; i--, l <<= 1) { 7881: if (l < 0) { 7882: XEiJ.busWw (a -= 2, XEiJ.regRn[i]); 7883: } 7884: } 7885: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 7886: for (int i = 15; l != 0; i--, l >>>= 1) { 7887: if ((l & 1) != 0) { 7888: XEiJ.busWw (a -= 2, XEiJ.regRn[i]); 7889: } 7890: } 7891: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 7892: for (int i = 15; l != 0; ) { 7893: int k = Integer.numberOfTrailingZeros (l); 7894: XEiJ.busWw (a -= 2, XEiJ.regRn[i -= k]); 7895: l = l >>> k & ~1; 7896: } 7897: } 7898: XEiJ.regRn[arr] = a; 7899: XEiJ.mpuCycleCount += 8 + (t - a << 1); //2バイト/個→4サイクル/個 7900: } else { //-(Ar)以外 7901: int a = efaCltWord (ea); 7902: int t = a; 7903: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 7904: if ((l & 0x0001) != 0) { 7905: XEiJ.busWw (a, XEiJ.regRn[ 0]); 7906: a += 2; 7907: } 7908: if ((l & 0x0002) != 0) { 7909: XEiJ.busWw (a, XEiJ.regRn[ 1]); 7910: a += 2; 7911: } 7912: if ((l & 0x0004) != 0) { 7913: XEiJ.busWw (a, XEiJ.regRn[ 2]); 7914: a += 2; 7915: } 7916: if ((l & 0x0008) != 0) { 7917: XEiJ.busWw (a, XEiJ.regRn[ 3]); 7918: a += 2; 7919: } 7920: if ((l & 0x0010) != 0) { 7921: XEiJ.busWw (a, XEiJ.regRn[ 4]); 7922: a += 2; 7923: } 7924: if ((l & 0x0020) != 0) { 7925: XEiJ.busWw (a, XEiJ.regRn[ 5]); 7926: a += 2; 7927: } 7928: if ((l & 0x0040) != 0) { 7929: XEiJ.busWw (a, XEiJ.regRn[ 6]); 7930: a += 2; 7931: } 7932: if ((byte) l < 0) { //(l & 0x0080) != 0 7933: XEiJ.busWw (a, XEiJ.regRn[ 7]); 7934: a += 2; 7935: } 7936: if ((l & 0x0100) != 0) { 7937: XEiJ.busWw (a, XEiJ.regRn[ 8]); 7938: a += 2; 7939: } 7940: if ((l & 0x0200) != 0) { 7941: XEiJ.busWw (a, XEiJ.regRn[ 9]); 7942: a += 2; 7943: } 7944: if ((l & 0x0400) != 0) { 7945: XEiJ.busWw (a, XEiJ.regRn[10]); 7946: a += 2; 7947: } 7948: if ((l & 0x0800) != 0) { 7949: XEiJ.busWw (a, XEiJ.regRn[11]); 7950: a += 2; 7951: } 7952: if ((l & 0x1000) != 0) { 7953: XEiJ.busWw (a, XEiJ.regRn[12]); 7954: a += 2; 7955: } 7956: if ((l & 0x2000) != 0) { 7957: XEiJ.busWw (a, XEiJ.regRn[13]); 7958: a += 2; 7959: } 7960: if ((l & 0x4000) != 0) { 7961: XEiJ.busWw (a, XEiJ.regRn[14]); 7962: a += 2; 7963: } 7964: if ((short) l < 0) { //(l & 0x8000) != 0 7965: XEiJ.busWw (a, XEiJ.regRn[15]); 7966: a += 2; 7967: } 7968: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 7969: for (int i = 0; i <= 15; i++) { 7970: if ((l & 0x0001 << i) != 0) { 7971: XEiJ.busWw (a, XEiJ.regRn[i]); 7972: a += 2; 7973: } 7974: } 7975: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 7976: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 7977: for (int i = 0; l != 0; i++, l <<= 1) { 7978: if (l < 0) { 7979: XEiJ.busWw (a, XEiJ.regRn[i]); 7980: a += 2; 7981: } 7982: } 7983: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 7984: for (int i = 0; l != 0; i++, l >>>= 1) { 7985: if ((l & 1) != 0) { 7986: XEiJ.busWw (a, XEiJ.regRn[i]); 7987: a += 2; 7988: } 7989: } 7990: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 7991: for (int i = 0; l != 0; ) { 7992: int k = Integer.numberOfTrailingZeros (l); 7993: XEiJ.busWw (a, XEiJ.regRn[i += k]); 7994: a += 2; 7995: l = l >>> k & ~1; 7996: } 7997: } 7998: XEiJ.mpuCycleCount += 4 + (a - t << 1); //2バイト/個→4サイクル/個 7999: } 8000: } 8001: } //irpMovemToMemWord 8002: 8003: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8004: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8005: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8006: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8007: //EXT.L Dr |-|012346|-|-UUUU|-**00|D |0100_100_011_000_rrr 8008: //MOVEM.L <list>,<ea> |-|012346|-|-----|-----| M -WXZ |0100_100_011_mmm_rrr-llllllllllllllll 8009: public static void irpMovemToMemLong () throws M68kException { 8010: int ea = XEiJ.regOC & 63; 8011: if (ea < XEiJ.EA_AR) { //EXT.L Dr 8012: XEiJ.mpuCycleCount += 4; 8013: int z; 8014: XEiJ.regRn[ea] = z = (short) XEiJ.regRn[ea]; 8015: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8016: } else { //MOVEM.L <list>,<ea> 8017: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 8018: XEiJ.regPC += 2; 8019: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 8020: //MOVEM.wl <list>,-(Ar)で<list>にArが含まれているとき、000/010は命令開始時のArを、020/030/040/060は命令開始時のAr-オペレーションサイズをメモリに書き込む 8021: //転送するレジスタが0個のときArは変化しない 8022: int arr = ea - (XEiJ.EA_MN - 8); 8023: int a = XEiJ.regRn[arr]; 8024: XEiJ.regRn[arr] = a - 4; 8025: int t = a; 8026: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8027: if ((l & 0x0001) != 0) { 8028: XEiJ.busWl (a -= 4, XEiJ.regRn[15]); 8029: } 8030: if ((l & 0x0002) != 0) { 8031: XEiJ.busWl (a -= 4, XEiJ.regRn[14]); 8032: } 8033: if ((l & 0x0004) != 0) { 8034: XEiJ.busWl (a -= 4, XEiJ.regRn[13]); 8035: } 8036: if ((l & 0x0008) != 0) { 8037: XEiJ.busWl (a -= 4, XEiJ.regRn[12]); 8038: } 8039: if ((l & 0x0010) != 0) { 8040: XEiJ.busWl (a -= 4, XEiJ.regRn[11]); 8041: } 8042: if ((l & 0x0020) != 0) { 8043: XEiJ.busWl (a -= 4, XEiJ.regRn[10]); 8044: } 8045: if ((l & 0x0040) != 0) { 8046: XEiJ.busWl (a -= 4, XEiJ.regRn[ 9]); 8047: } 8048: if ((byte) l < 0) { //(l & 0x0080) != 0 8049: XEiJ.busWl (a -= 4, XEiJ.regRn[ 8]); 8050: } 8051: if ((l & 0x0100) != 0) { 8052: XEiJ.busWl (a -= 4, XEiJ.regRn[ 7]); 8053: } 8054: if ((l & 0x0200) != 0) { 8055: XEiJ.busWl (a -= 4, XEiJ.regRn[ 6]); 8056: } 8057: if ((l & 0x0400) != 0) { 8058: XEiJ.busWl (a -= 4, XEiJ.regRn[ 5]); 8059: } 8060: if ((l & 0x0800) != 0) { 8061: XEiJ.busWl (a -= 4, XEiJ.regRn[ 4]); 8062: } 8063: if ((l & 0x1000) != 0) { 8064: XEiJ.busWl (a -= 4, XEiJ.regRn[ 3]); 8065: } 8066: if ((l & 0x2000) != 0) { 8067: XEiJ.busWl (a -= 4, XEiJ.regRn[ 2]); 8068: } 8069: if ((l & 0x4000) != 0) { 8070: XEiJ.busWl (a -= 4, XEiJ.regRn[ 1]); 8071: } 8072: if ((short) l < 0) { //(l & 0x8000) != 0 8073: XEiJ.busWl (a -= 4, XEiJ.regRn[ 0]); 8074: } 8075: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8076: for (int i = 15; i >= 0; i--) { 8077: if ((l & 0x8000 >>> i) != 0) { 8078: XEiJ.busWl (a -= 4, XEiJ.regRn[i]); 8079: } 8080: } 8081: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8082: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8083: for (int i = 15; l != 0; i--, l <<= 1) { 8084: if (l < 0) { 8085: XEiJ.busWl (a -= 4, XEiJ.regRn[i]); 8086: } 8087: } 8088: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8089: for (int i = 15; l != 0; i--, l >>>= 1) { 8090: if ((l & 1) != 0) { 8091: XEiJ.busWl (a -= 4, XEiJ.regRn[i]); 8092: } 8093: } 8094: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8095: for (int i = 15; l != 0; ) { 8096: int k = Integer.numberOfTrailingZeros (l); 8097: XEiJ.busWl (a -= 4, XEiJ.regRn[i -= k]); 8098: l = l >>> k & ~1; 8099: } 8100: } 8101: XEiJ.regRn[arr] = a; 8102: XEiJ.mpuCycleCount += 8 + (t - a << 1); //4バイト/個→8サイクル/個 8103: } else { //-(Ar)以外 8104: int a = efaCltLong (ea); 8105: int t = a; 8106: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8107: if ((l & 0x0001) != 0) { 8108: XEiJ.busWl (a, XEiJ.regRn[ 0]); 8109: a += 4; 8110: } 8111: if ((l & 0x0002) != 0) { 8112: XEiJ.busWl (a, XEiJ.regRn[ 1]); 8113: a += 4; 8114: } 8115: if ((l & 0x0004) != 0) { 8116: XEiJ.busWl (a, XEiJ.regRn[ 2]); 8117: a += 4; 8118: } 8119: if ((l & 0x0008) != 0) { 8120: XEiJ.busWl (a, XEiJ.regRn[ 3]); 8121: a += 4; 8122: } 8123: if ((l & 0x0010) != 0) { 8124: XEiJ.busWl (a, XEiJ.regRn[ 4]); 8125: a += 4; 8126: } 8127: if ((l & 0x0020) != 0) { 8128: XEiJ.busWl (a, XEiJ.regRn[ 5]); 8129: a += 4; 8130: } 8131: if ((l & 0x0040) != 0) { 8132: XEiJ.busWl (a, XEiJ.regRn[ 6]); 8133: a += 4; 8134: } 8135: if ((byte) l < 0) { //(l & 0x0080) != 0 8136: XEiJ.busWl (a, XEiJ.regRn[ 7]); 8137: a += 4; 8138: } 8139: if ((l & 0x0100) != 0) { 8140: XEiJ.busWl (a, XEiJ.regRn[ 8]); 8141: a += 4; 8142: } 8143: if ((l & 0x0200) != 0) { 8144: XEiJ.busWl (a, XEiJ.regRn[ 9]); 8145: a += 4; 8146: } 8147: if ((l & 0x0400) != 0) { 8148: XEiJ.busWl (a, XEiJ.regRn[10]); 8149: a += 4; 8150: } 8151: if ((l & 0x0800) != 0) { 8152: XEiJ.busWl (a, XEiJ.regRn[11]); 8153: a += 4; 8154: } 8155: if ((l & 0x1000) != 0) { 8156: XEiJ.busWl (a, XEiJ.regRn[12]); 8157: a += 4; 8158: } 8159: if ((l & 0x2000) != 0) { 8160: XEiJ.busWl (a, XEiJ.regRn[13]); 8161: a += 4; 8162: } 8163: if ((l & 0x4000) != 0) { 8164: XEiJ.busWl (a, XEiJ.regRn[14]); 8165: a += 4; 8166: } 8167: if ((short) l < 0) { //(l & 0x8000) != 0 8168: XEiJ.busWl (a, XEiJ.regRn[15]); 8169: a += 4; 8170: } 8171: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8172: for (int i = 0; i <= 15; i++) { 8173: if ((l & 0x0001 << i) != 0) { 8174: XEiJ.busWl (a, XEiJ.regRn[i]); 8175: a += 4; 8176: } 8177: } 8178: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8179: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8180: for (int i = 0; l != 0; i++, l <<= 1) { 8181: if (l < 0) { 8182: XEiJ.busWl (a, XEiJ.regRn[i]); 8183: a += 4; 8184: } 8185: } 8186: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8187: for (int i = 0; l != 0; i++, l >>>= 1) { 8188: if ((l & 1) != 0) { 8189: XEiJ.busWl (a, XEiJ.regRn[i]); 8190: a += 4; 8191: } 8192: } 8193: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8194: for (int i = 0; l != 0; ) { 8195: int k = Integer.numberOfTrailingZeros (l); 8196: XEiJ.busWl (a, XEiJ.regRn[i += k]); 8197: a += 4; 8198: l = l >>> k & ~1; 8199: } 8200: } 8201: XEiJ.mpuCycleCount += 4 + (a - t << 1); //4バイト/個→8サイクル/個 8202: } 8203: } 8204: } //irpMovemToMemLong 8205: 8206: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8207: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8208: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8209: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8210: //TST.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_000_mmm_rrr 8211: //TST.B <ea> |-|--2346|-|-UUUU|-**00| PI|0100_101_000_mmm_rrr 8212: public static void irpTstByte () throws M68kException { 8213: XEiJ.mpuCycleCount += 4; 8214: int ea = XEiJ.regOC & 63; 8215: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)))]; //ccr_tst_byte。アドレッシングモードに注意 8216: } //irpTstByte 8217: 8218: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8219: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8220: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8221: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8222: //TST.W <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_001_mmm_rrr 8223: //TST.W <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_001_mmm_rrr 8224: public static void irpTstWord () throws M68kException { 8225: XEiJ.mpuCycleCount += 4; 8226: int ea = XEiJ.regOC & 63; 8227: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8228: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 8229: } //irpTstWord 8230: 8231: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8232: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8233: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8234: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8235: //TST.L <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_010_mmm_rrr 8236: //TST.L <ea> |-|--2346|-|-UUUU|-**00| A PI|0100_101_010_mmm_rrr 8237: public static void irpTstLong () throws M68kException { 8238: XEiJ.mpuCycleCount += 4; 8239: int ea = XEiJ.regOC & 63; 8240: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //アドレッシングモードに注意。このr[ea]はデータレジスタまたはアドレスレジスタ 8241: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8242: } //irpTstLong 8243: 8244: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8245: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8246: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8247: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8248: //TAS.B <ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |0100_101_011_mmm_rrr 8249: //ILLEGAL |-|012346|-|-----|-----| |0100_101_011_111_100 8250: public static void irpTas () throws M68kException { 8251: int ea = XEiJ.regOC & 63; 8252: int z; 8253: if (ea < XEiJ.EA_AR) { //TAS.B Dr 8254: XEiJ.mpuCycleCount += 4; 8255: XEiJ.regRn[ea] = 0x80 | (z = XEiJ.regRn[ea]); 8256: } else { //TAS.B <mem> 8257: XEiJ.mpuCycleCount += 14; 8258: int a = efaMltByte (ea); 8259: XEiJ.busWb (a, 0x80 | (z = XEiJ.busRbs (a))); 8260: } 8261: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 8262: } //irpTas 8263: 8264: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8265: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8266: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8267: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8268: //MULU.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll000000000hhh (h is not used) 8269: //MULU.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll010000000hhh (if h=l then result is not defined) 8270: //MULS.L <ea>,Dl |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll100000000hhh (h is not used) 8271: //MULS.L <ea>,Dh:Dl |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_000_mmm_rrr-0lll110000000hhh (if h=l then result is not defined) 8272: public static void irpMuluMulsLong () throws M68kException { 8273: int w; 8274: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 8275: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 8276: } else { 8277: w = XEiJ.regPC; 8278: XEiJ.regPC = w + 2; 8279: w = XEiJ.busRwze (w); //pcwz。拡張ワード 8280: } 8281: if ((w & ~0b0111_110_000_000_111) != 0) { 8282: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8283: throw M68kException.m6eSignal; 8284: } 8285: int l = w >> 12; //被乗数,積の下位32bit 8286: int s = w & 0b0000_100_000_000_000; //0=MULU,1=MULS 8287: int q = w & 0b0000_010_000_000_000; //0=32bit,1=64bit 8288: int h = w & 7; //積の上位32bit 8289: XEiJ.mpuCycleCount += 72; //72*0.6=43.2≒44 8290: int ea = XEiJ.regOC & 63; 8291: long yy = (long) (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea))); 8292: long xx = (long) XEiJ.regRn[l]; 8293: if (s == 0) { //MULU 8294: long zz = (0xffffffffL & xx) * (0xffffffffL & yy); 8295: int z = XEiJ.regRn[l] = (int) zz; 8296: if (q == 0) { //32bit 8297: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (zz >>> 32 != 0L ? XEiJ.REG_CCR_V : 0); 8298: } else { //64bit 8299: XEiJ.regRn[h] = (int) (zz >>> 32); 8300: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (zz > 0L ? 0 : zz < 0L ? XEiJ.REG_CCR_N : XEiJ.REG_CCR_Z); 8301: } 8302: } else { //MULS 8303: long zz = xx * yy; 8304: int z = XEiJ.regRn[l] = (int) zz; 8305: if (q == 0) { //32bit 8306: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | (z != zz ? XEiJ.REG_CCR_V : 0); 8307: } else { //64bit 8308: XEiJ.regRn[h] = (int) (zz >> 32); 8309: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (zz > 0L ? 0 : zz < 0L ? XEiJ.REG_CCR_N : XEiJ.REG_CCR_Z); 8310: } 8311: } 8312: if (M30_DIV_ZERO_V_FLAG) { 8313: m30DivZeroVFlag = false; 8314: } 8315: } //irpMuluMulsLong 8316: 8317: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8318: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8319: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8320: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8321: //DIVU.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000qqq 8322: //DIVUL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq000000000rrr (q is not equal to r) 8323: //DIVU.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq010000000rrr (q is not equal to r) 8324: //DIVS.L <ea>,Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000qqq 8325: //DIVSL.L <ea>,Dr:Dq |-|--2346|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq100000000rrr (q is not equal to r) 8326: //DIVS.L <ea>,Dr:Dq |-|--234S|-|-UUUU|-***0|D M+-WXZPI|0100_110_001_mmm_rrr-0qqq110000000rrr (q is not equal to r) 8327: // 8328: //DIVS.L <ea>,Dq 8329: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8330: // 8331: //DIVS.L <ea>,Dr:Dq 8332: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8333: // M68000PRMでDIVS.Lのアドレッシングモードがデータ可変と書かれているのはデータの間違い 8334: // 8335: //DIVSL.L <ea>,Dr:Dq 8336: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8337: // 8338: //DIVU.L <ea>,Dq 8339: // 32bit被除数Dq/32bit除数<ea>→32bit商Dq 8340: // 8341: //DIVU.L <ea>,Dr:Dq 8342: // 64bit被除数Dr:Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8343: // 8344: //DIVUL.L <ea>,Dr:Dq 8345: // 32bit被除数Dq/32bit除数<ea>→32bit余りDr:32bit商Dq 8346: public static void irpDivuDivsLong () throws M68kException { 8347: int w; 8348: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 8349: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 8350: } else { 8351: w = XEiJ.regPC; 8352: XEiJ.regPC = w + 2; 8353: w = XEiJ.busRwze (w); //pcwz。拡張ワード 8354: } 8355: if ((w & ~0b0111_110_000_000_111) != 0) { 8356: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 8357: throw M68kException.m6eSignal; 8358: } 8359: int l = w >> 12; //被除数の下位32bit,商 8360: int s = w & 0b0000_100_000_000_000; //0=DIVU,1=DIVS 8361: int q = w & 0b0000_010_000_000_000; //0=32bit被除数,1=64bit被除数 8362: int h = w & 7; //被除数の上位32bit,余り 8363: int ea = XEiJ.regOC & 63; 8364: int y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //除数 8365: if (s == 0) { //符号なし。DIVU.L <ea>,* 8366: XEiJ.mpuCycleCount += 130; //最大。130*0.6=78 8367: long yy = (long) y & 0xffffffffL; //除数 8368: if (q == 0) { //符号なし、32bit被除数。DIVU.L <ea>,Dq/DIVUL.L <ea>,Dr:Dq 8369: if (y == 0) { //ゼロ除算 8370: if (h == l) { //DIVU.L <ea>,Dq 8371: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8372: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8373: (xx < 0L ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 8374: (xx == 0L ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が0のときセット、さもなくばクリア 8375: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8376: ); //Cは常にクリア 8377: } else { //DIVUL.L <ea>,Dr:Dq 8378: int x = XEiJ.regRn[l]; //32bit被除数 8379: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8380: (x < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 8381: (x == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が0のときセット、さもなくばクリア 8382: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8383: ); //Cは常にクリア 8384: } 8385: XEiJ.mpuCycleCount += 38 - 34; 8386: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8387: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8388: throw M68kException.m6eSignal; 8389: } //if ゼロ除算 8390: long xx = (long) XEiJ.regRn[l] & 0xffffffffL; //32bit被除数 8391: long zz = (long) ((double) xx / (double) yy); //double→intのキャストは飽和変換で0xffffffff/0x00000001が0x7fffffffになってしまうのでdouble→longとする 8392: int z = XEiJ.regRn[l] = (int) zz; //商 8393: if (h != l) { 8394: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8395: } 8396: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8397: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8398: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8399: ); //VとCは常にクリア 8400: } else { //符号なし、64bit被除数。DIVU.L <ea>,Dr:Dq 8401: if (y == 0) { //ゼロ除算 8402: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8403: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8404: (((int) xx < 0 && (int) xx != 0x7fffffff) || (int) xx == 0x80000000 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が$xxxxxxxx7fffffffを除く負または$xxxxxxxx80000000のときセット、さもなくばクリア 8405: ((int) xx == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が$xxxxxxxx00000000のときセット、さもなくばクリア 8406: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8407: ); //Cは常にクリア 8408: XEiJ.mpuCycleCount += 38 - 34; 8409: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8410: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8411: throw M68kException.m6eSignal; 8412: } //if ゼロ除算 8413: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8414: long zz = Long.divideUnsigned (xx, yy); //商。Long.divideUnsigned(long,long)は1.8から 8415: int z = (int) zz; //商の下位32bit 8416: if (zz >>> 32 != 0L) { //オーバーフローあり 8417: //Dr:Dqは変化しない 8418: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8419: ((int) xx < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数の下位32bitが負のときセット、さもなくばクリア 8420: ((int) xx == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数の下位32bitが0のときセット、さもなくばクリア 8421: XEiJ.REG_CCR_V //Vは常にセット 8422: ); //Cは常にクリア 8423: } else { //オーバーフローなし 8424: XEiJ.regRn[l] = (int) zz; //Dr=商 8425: if (h != l) { 8426: XEiJ.regRn[h] = (int) (xx - yy * zz); //Dq=余り 8427: } 8428: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8429: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8430: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8431: ); //VとCは常にクリア 8432: } //if オーバーフローあり/オーバーフローなし 8433: } //if 32bit被除数/64bit被除数 8434: } else { //符号あり。DIVS.L <ea>,* 8435: XEiJ.mpuCycleCount += 150; //最大。150*0.6=90 8436: if (q == 0) { //符号あり、32bit被除数。DIVS.L <ea>,Dq/DIVSL.L <ea>,Dr:Dq 8437: long yy = (long) y; //除数 8438: if (y == 0) { //ゼロ除算 8439: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8440: if (h == l) { //DIVS.L <ea>,Dq 8441: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8442: //Nは常にクリア 8443: XEiJ.REG_CCR_Z | //Zは常にセット 8444: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8445: ); //Cは常にクリア 8446: } else { //DIVSL.L <ea>,Dr:Dq 8447: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8448: //Nは常にクリア 8449: XEiJ.REG_CCR_Z | //Zは常にセット 8450: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8451: ); //Cは常にクリア 8452: } //if DIVS.L <ea>,Dq/DIVSL.L <ea>,Dr:Dq 8453: XEiJ.mpuCycleCount += 38 - 34; 8454: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8455: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8456: throw M68kException.m6eSignal; 8457: } //if ゼロ除算 8458: long xx = (long) XEiJ.regRn[l]; //32bit被除数 8459: long zz = xx / yy; //商 8460: if ((int) zz != zz) { //オーバーフローあり 8461: //Dqは変化しない 8462: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8463: (xx == 0xffffffff80000000L && y == -1 ? XEiJ.REG_CCR_Z : 0) | //Zは0x80000000/-1のときセット、さもなくばクリア 8464: XEiJ.REG_CCR_V //Vは常にセット 8465: ); //NとCは常にクリア 8466: } else { //オーバーフローなし 8467: int z = XEiJ.regRn[l] = (int) zz; //商 8468: if (h != l) { //DIVSL.L <ea>,Dr:Dq 8469: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8470: } 8471: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8472: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8473: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8474: ); //VとCは常にクリア 8475: } //if オーバーフローあり/オーバーフローなし 8476: } else { //符号あり、64bit被除数。DIVS.L <ea>,Dr:Dq 8477: long yy = (long) y; //除数 8478: if (y == 0) { //ゼロ除算 8479: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8480: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8481: //Nは常にクリア 8482: XEiJ.REG_CCR_Z | //Zは常にセット 8483: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 8484: ); //Cは常にクリア 8485: XEiJ.mpuCycleCount += 38 - 34; 8486: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 8487: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 8488: throw M68kException.m6eSignal; 8489: } //if ゼロ除算 8490: long xx = (long) XEiJ.regRn[h] << 32 | (long) XEiJ.regRn[l] & 0xffffffffL; //64bit被除数 8491: long zz = xx / yy; //商 8492: if ((int) zz != zz) { //オーバーフローあり 8493: int zh = (int) (zz >> 32); 8494: int zl = (int) zz; 8495: int xh = (int) (xx >> 32); 8496: int xl = (int) xx; 8497: //Dr:Dqは変化しない 8498: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8499: ((zh == 0x00000000 || zh == 0xffffffff) && zl != 0x00000000 8500: ? //商が$0000000000000000を除く$00000000xxxxxxqqまたは$ffffffff00000000を除く$ffffffffxxxxxxqqのとき 8501: (zl << 24 < 0 ? XEiJ.REG_CCR_N : 0) | //qqが負ならばN=1,さもなくばN=0 8502: (zl << 24 == 0 ? XEiJ.REG_CCR_Z : 0) //qqが0ならばZ=1,さもなくばZ=0 8503: : //商が$0000000000000000を除く$00000000xxxxxxqqまたは$ffffffff00000000を除く$ffffffffxxxxxxqqでないとき 8504: (xl == 0x80000000 || //被除数が$xxxxxxxx80000000または 8505: (xh == 0x80000000 && xl != 0x00000000) || //被除数が$8000000000000000を除く$80000000xxxxxxxxまたは 8506: (xl == 0x7fffffff && xh != 0x7fffffff) || //被除数が$7fffffff7fffffffを除く$xxxxxxxx7fffffffまたは 8507: (xh == 0x7fffffff && xl != 0x7fffffff) || //被除数が$7fffffff7fffffffを除く$7fffffffxxxxxxxxまたは 8508: (xl == 0xffffffff && 0x00000000 <= xh) ? XEiJ.REG_CCR_N : 0) | //被除数が正で$xxxxxxxxffffffffならばN=1,さもなくばN=0 8509: (xl == 0x00000000 ? XEiJ.REG_CCR_Z : 0)) | //被除数が$xxxxxxxx00000000ならばZ=1,さもなくばZ=0 8510: XEiJ.REG_CCR_V //Vは常にセット 8511: ); //Cは常にクリア 8512: } else { //オーバーフローなし 8513: int z = XEiJ.regRn[l] = (int) zz; //商 8514: if (h != l) { 8515: XEiJ.regRn[h] = (int) (xx - yy * zz); //余り 8516: } 8517: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 8518: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 8519: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 8520: ); //VとCは常にクリア 8521: } //if オーバーフローあり/オーバーフローなし 8522: } //if 32bit被除数/64bit被除数 8523: } //if 符号なし/符号あり 8524: if (M30_DIV_ZERO_V_FLAG) { 8525: m30DivZeroVFlag = false; 8526: } 8527: } //irpDivuDivsLong 8528: 8529: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8530: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8531: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8532: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8533: //SATS.L Dr |-|------|-|-UUUU|-**00|D |0100_110_010_000_rrr (ISA_B) 8534: //MOVEM.W <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_010_mmm_rrr-llllllllllllllll 8535: // 8536: //SATS.L Dr 8537: // VがセットされていたらDrを符号が逆で絶対値が最大の値にする(直前のDrに対する演算を飽和演算にする) 8538: public static void irpMovemToRegWord () throws M68kException { 8539: int ea = XEiJ.regOC & 63; 8540: if (ea < XEiJ.EA_AR) { //SATS.L Dr 8541: XEiJ.mpuCycleCount += 4; 8542: int z = XEiJ.regRn[ea]; 8543: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 < 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) != 0) { //Vがセットされているとき 8544: XEiJ.regRn[ea] = z = z >> 31 ^ 0x80000000; //符号が逆で絶対値が最大の値にする 8545: } 8546: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 8547: } else { //MOVEM.W <ea>,<list> 8548: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 8549: XEiJ.regPC += 2; 8550: int arr, a; 8551: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8552: XEiJ.mpuCycleCount += 12; 8553: arr = ea - (XEiJ.EA_MP - 8); 8554: a = XEiJ.regRn[arr]; 8555: } else { //(Ar)+以外 8556: XEiJ.mpuCycleCount += 8; 8557: arr = 16; 8558: a = efaCntWord (ea); 8559: } 8560: int t = a; 8561: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8562: if ((l & 0x0001) != 0) { 8563: XEiJ.regRn[ 0] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8564: a += 2; 8565: } 8566: if ((l & 0x0002) != 0) { 8567: XEiJ.regRn[ 1] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8568: a += 2; 8569: } 8570: if ((l & 0x0004) != 0) { 8571: XEiJ.regRn[ 2] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8572: a += 2; 8573: } 8574: if ((l & 0x0008) != 0) { 8575: XEiJ.regRn[ 3] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8576: a += 2; 8577: } 8578: if ((l & 0x0010) != 0) { 8579: XEiJ.regRn[ 4] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8580: a += 2; 8581: } 8582: if ((l & 0x0020) != 0) { 8583: XEiJ.regRn[ 5] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8584: a += 2; 8585: } 8586: if ((l & 0x0040) != 0) { 8587: XEiJ.regRn[ 6] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8588: a += 2; 8589: } 8590: if ((byte) l < 0) { //(l & 0x0080) != 0 8591: XEiJ.regRn[ 7] = XEiJ.busRws (a); //データレジスタも符号拡張して32bit全部書き換える 8592: a += 2; 8593: } 8594: if ((l & 0x0100) != 0) { 8595: XEiJ.regRn[ 8] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8596: a += 2; 8597: } 8598: if ((l & 0x0200) != 0) { 8599: XEiJ.regRn[ 9] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8600: a += 2; 8601: } 8602: if ((l & 0x0400) != 0) { 8603: XEiJ.regRn[10] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8604: a += 2; 8605: } 8606: if ((l & 0x0800) != 0) { 8607: XEiJ.regRn[11] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8608: a += 2; 8609: } 8610: if ((l & 0x1000) != 0) { 8611: XEiJ.regRn[12] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8612: a += 2; 8613: } 8614: if ((l & 0x2000) != 0) { 8615: XEiJ.regRn[13] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8616: a += 2; 8617: } 8618: if ((l & 0x4000) != 0) { 8619: XEiJ.regRn[14] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8620: a += 2; 8621: } 8622: if ((short) l < 0) { //(l & 0x8000) != 0 8623: XEiJ.regRn[15] = XEiJ.busRws (a); //符号拡張して32bit全部書き換える 8624: a += 2; 8625: } 8626: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8627: for (int i = 0; i <= 15; i++) { 8628: if ((l & 0x0001 << i) != 0) { 8629: XEiJ.regRn[i] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8630: a += 2; 8631: } 8632: } 8633: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8634: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8635: for (int i = 0; l != 0; i++, l <<= 1) { 8636: if (l < 0) { 8637: XEiJ.regRn[i] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8638: a += 2; 8639: } 8640: } 8641: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8642: for (int i = 0; l != 0; i++, l >>>= 1) { 8643: if ((l & 1) != 0) { 8644: XEiJ.regRn[i] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8645: a += 2; 8646: } 8647: } 8648: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8649: for (int i = 0; l != 0; ) { 8650: int k = Integer.numberOfTrailingZeros (l); 8651: XEiJ.regRn[i += k] = XEiJ.busRws (a); //(データレジスタも)符号拡張して32bit全部書き換える 8652: a += 2; 8653: l = l >>> k & ~1; 8654: } 8655: } 8656: //MOVEM.W (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8657: XEiJ.regRn[arr] = a; 8658: XEiJ.mpuCycleCount += a - t << 1; //2バイト/個→4サイクル/個 8659: } 8660: } //irpMovemToRegWord 8661: 8662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8663: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8664: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8665: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8666: //MOVEM.L <ea>,<list> |-|012346|-|-----|-----| M+ WXZP |0100_110_011_mmm_rrr-llllllllllllllll 8667: public static void irpMovemToRegLong () throws M68kException { 8668: int ea = XEiJ.regOC & 63; 8669: { 8670: int l = XEiJ.busRwze (XEiJ.regPC); //pcwze。レジスタリスト。ゼロ拡張 8671: XEiJ.regPC += 2; 8672: int arr, a; 8673: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 8674: XEiJ.mpuCycleCount += 12; 8675: arr = ea - (XEiJ.EA_MP - 8); 8676: a = XEiJ.regRn[arr]; 8677: } else { //(Ar)+以外 8678: XEiJ.mpuCycleCount += 8; 8679: arr = 16; 8680: a = efaCntLong (ea); 8681: } 8682: int t = a; 8683: if (XEiJ.IRP_MOVEM_EXPAND) { //16回展開する 8684: if ((l & 0x0001) != 0) { 8685: XEiJ.regRn[ 0] = XEiJ.busRls (a); 8686: a += 4; 8687: } 8688: if ((l & 0x0002) != 0) { 8689: XEiJ.regRn[ 1] = XEiJ.busRls (a); 8690: a += 4; 8691: } 8692: if ((l & 0x0004) != 0) { 8693: XEiJ.regRn[ 2] = XEiJ.busRls (a); 8694: a += 4; 8695: } 8696: if ((l & 0x0008) != 0) { 8697: XEiJ.regRn[ 3] = XEiJ.busRls (a); 8698: a += 4; 8699: } 8700: if ((l & 0x0010) != 0) { 8701: XEiJ.regRn[ 4] = XEiJ.busRls (a); 8702: a += 4; 8703: } 8704: if ((l & 0x0020) != 0) { 8705: XEiJ.regRn[ 5] = XEiJ.busRls (a); 8706: a += 4; 8707: } 8708: if ((l & 0x0040) != 0) { 8709: XEiJ.regRn[ 6] = XEiJ.busRls (a); 8710: a += 4; 8711: } 8712: if ((byte) l < 0) { //(l & 0x0080) != 0 8713: XEiJ.regRn[ 7] = XEiJ.busRls (a); 8714: a += 4; 8715: } 8716: if ((l & 0x0100) != 0) { 8717: XEiJ.regRn[ 8] = XEiJ.busRls (a); 8718: a += 4; 8719: } 8720: if ((l & 0x0200) != 0) { 8721: XEiJ.regRn[ 9] = XEiJ.busRls (a); 8722: a += 4; 8723: } 8724: if ((l & 0x0400) != 0) { 8725: XEiJ.regRn[10] = XEiJ.busRls (a); 8726: a += 4; 8727: } 8728: if ((l & 0x0800) != 0) { 8729: XEiJ.regRn[11] = XEiJ.busRls (a); 8730: a += 4; 8731: } 8732: if ((l & 0x1000) != 0) { 8733: XEiJ.regRn[12] = XEiJ.busRls (a); 8734: a += 4; 8735: } 8736: if ((l & 0x2000) != 0) { 8737: XEiJ.regRn[13] = XEiJ.busRls (a); 8738: a += 4; 8739: } 8740: if ((l & 0x4000) != 0) { 8741: XEiJ.regRn[14] = XEiJ.busRls (a); 8742: a += 4; 8743: } 8744: if ((short) l < 0) { //(l & 0x8000) != 0 8745: XEiJ.regRn[15] = XEiJ.busRls (a); 8746: a += 4; 8747: } 8748: } else if (XEiJ.IRP_MOVEM_LOOP) { //16回ループする。コンパイラが展開する 8749: for (int i = 0; i <= 15; i++) { 8750: if ((l & 0x0001 << i) != 0) { 8751: XEiJ.regRn[i] = XEiJ.busRls (a); 8752: a += 4; 8753: } 8754: } 8755: } else if (XEiJ.IRP_MOVEM_SHIFT_LEFT) { //0になるまで左にシフトする 8756: l = XEiJ.MPU_BITREV_TABLE_0[l & 2047] | XEiJ.MPU_BITREV_TABLE_1[l << 10 >>> 21]; //Integer.reverse(l) 8757: for (int i = 0; l != 0; i++, l <<= 1) { 8758: if (l < 0) { 8759: XEiJ.regRn[i] = XEiJ.busRls (a); 8760: a += 4; 8761: } 8762: } 8763: } else if (XEiJ.IRP_MOVEM_SHIFT_RIGHT) { //0になるまで右にシフトする 8764: for (int i = 0; l != 0; i++, l >>>= 1) { 8765: if ((l & 1) != 0) { 8766: XEiJ.regRn[i] = XEiJ.busRls (a); 8767: a += 4; 8768: } 8769: } 8770: } else if (XEiJ.IRP_MOVEM_ZEROS) { //Integer.numberOfTrailingZerosを使う 8771: for (int i = 0; l != 0; ) { 8772: int k = Integer.numberOfTrailingZeros (l); 8773: XEiJ.regRn[i += k] = XEiJ.busRls (a); 8774: a += 4; 8775: l = l >>> k & ~1; 8776: } 8777: } 8778: //MOVEM.L (Ar)+,<list>で<list>にArが含まれているとき、メモリから読み出したデータを捨ててArをインクリメントする 8779: XEiJ.regRn[arr] = a; 8780: XEiJ.mpuCycleCount += a - t << 1; //4バイト/個→8サイクル/個 8781: } 8782: } //irpMovemToRegLong 8783: 8784: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8785: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8786: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8787: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8788: //TRAP #<vector> |-|012346|-|-----|-----| |0100_111_001_00v_vvv 8789: public static void irpTrap () throws M68kException { 8790: XEiJ.mpuCycleCount += 34; 8791: if (XEiJ.MPU_INLINE_EXCEPTION) { 8792: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 8793: int sp = XEiJ.regRn[15]; 8794: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 8795: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8796: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 8797: XEiJ.mpuUSP = sp; //USPを保存 8798: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 8799: if (DataBreakPoint.DBP_ON) { 8800: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 8801: } else { 8802: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 8803: } 8804: if (InstructionBreakPoint.IBP_ON) { 8805: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 8806: } 8807: } 8808: XEiJ.regRn[15] = sp -= 8; 8809: XEiJ.busWw (sp + 6, 0x0000 | XEiJ.regOC - (0x4e40 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2); //pushw。フォーマットとベクタオフセットをプッシュする 8810: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 8811: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 8812: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (XEiJ.regOC - (0x4e40 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR) << 2))); //例外ベクタを取り出してジャンプする 8813: } else { 8814: irpException (XEiJ.regOC - (0x4e40 - M68kException.M6E_TRAP_0_INSTRUCTION_VECTOR), XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは次の命令 8815: } 8816: } //irpTrap 8817: public static void irpTrap15 () throws M68kException { 8818: if ((XEiJ.regRn[0] & 255) == 0x8e) { //IOCS _BOOTINF 8819: MainMemory.mmrCheckHuman (); 8820: } 8821: XEiJ.mpuCycleCount += 34; 8822: if (XEiJ.MPU_INLINE_EXCEPTION) { 8823: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 8824: int sp = XEiJ.regRn[15]; 8825: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 8826: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8827: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 8828: XEiJ.mpuUSP = sp; //USPを保存 8829: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 8830: if (DataBreakPoint.DBP_ON) { 8831: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 8832: } else { 8833: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 8834: } 8835: if (InstructionBreakPoint.IBP_ON) { 8836: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 8837: } 8838: } 8839: XEiJ.regRn[15] = sp -= 8; 8840: XEiJ.busWw (sp + 6, 0x0000 | M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR); //pushw。フォーマットとベクタオフセットをプッシュする 8841: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 8842: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 8843: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR << 2))); //例外ベクタを取り出してジャンプする 8844: } else { 8845: irpException (M68kException.M6E_TRAP_15_INSTRUCTION_VECTOR, XEiJ.regPC, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは次の命令 8846: } 8847: } //irpTrap15 8848: 8849: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8850: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8851: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8852: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8853: //LINK.W Ar,#<data> |-|012346|-|-----|-----| |0100_111_001_010_rrr-{data} 8854: // 8855: //LINK.W Ar,#<data> 8856: // PEA.L (Ar);MOVEA.L A7,Ar;ADDA.W #<data>,A7と同じ 8857: // LINK.W A7,#<data>はA7をデクリメントする前の値がプッシュされ、A7に#<data>が加算される 8858: public static void irpLinkWord () throws M68kException { 8859: XEiJ.mpuCycleCount += 16; 8860: int arr = XEiJ.regOC - (0b0100_111_001_010_000 - 8); 8861: //評価順序に注意 8862: // wl(r[15]-=4,r[8+rrr])は不可 8863: int sp = XEiJ.regRn[15] - 4; 8864: XEiJ.busWl (sp, XEiJ.regRn[arr]); //pushl 8865: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 8866: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 8867: } else { 8868: int t = XEiJ.regPC; 8869: XEiJ.regPC = t + 2; 8870: XEiJ.regRn[15] = (XEiJ.regRn[arr] = sp) + XEiJ.busRwse (t); //pcws 8871: } 8872: } //irpLinkWord 8873: 8874: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8875: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8876: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8877: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8878: //UNLK Ar |-|012346|-|-----|-----| |0100_111_001_011_rrr 8879: // 8880: //UNLK Ar 8881: // MOVEA.L Ar,A7;MOVEA.L (A7)+,Arと同じ 8882: // UNLK A7はMOVEA.L A7,A7;MOVEA.L (A7)+,A7すなわちMOVEA.L (A7),A7と同じ 8883: // ソースオペランドのポストインクリメントはデスティネーションオペランドが評価される前に完了しているとみなされる 8884: // 例えばMOVE.L (A0)+,(A0)+はMOVE.L (A0),(4,A0);ADDQ.L #8,A0と同じ 8885: // MOVEA.L (A0)+,A0はポストインクリメントされたA0が(A0)から読み出された値で上書きされるのでMOVEA.L (A0),A0と同じ 8886: // M68000PRMにUNLK Anの動作はAn→SP;(SP)→An;SP+4→SPだと書かれているがこれはn=7の場合に当てはまらない 8887: // 余談だが68040の初期のマスクセットはUNLK A7を実行すると固まるらしい 8888: public static void irpUnlk () throws M68kException { 8889: XEiJ.mpuCycleCount += 12; 8890: int arr = XEiJ.regOC - (0b0100_111_001_011_000 - 8); 8891: //評価順序に注意 8892: int sp = XEiJ.regRn[arr]; 8893: XEiJ.regRn[15] = sp + 4; 8894: XEiJ.regRn[arr] = XEiJ.busRls (sp); //popls 8895: } //irpUnlk 8896: 8897: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8898: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8899: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8900: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8901: //MOVE.L Ar,USP |-|012346|P|-----|-----| |0100_111_001_100_rrr 8902: public static void irpMoveToUsp () throws M68kException { 8903: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8904: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8905: throw M68kException.m6eSignal; 8906: } 8907: //以下はスーパーバイザモード 8908: XEiJ.mpuCycleCount += 4; 8909: XEiJ.mpuUSP = XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_100_000 - 8)]; 8910: } //irpMoveToUsp 8911: 8912: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8913: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8914: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8915: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8916: //MOVE.L USP,Ar |-|012346|P|-----|-----| |0100_111_001_101_rrr 8917: public static void irpMoveFromUsp () throws M68kException { 8918: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8919: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8920: throw M68kException.m6eSignal; 8921: } 8922: //以下はスーパーバイザモード 8923: XEiJ.mpuCycleCount += 4; 8924: XEiJ.regRn[XEiJ.regOC - (0b0100_111_001_101_000 - 8)] = XEiJ.mpuUSP; 8925: } //irpMoveFromUsp 8926: 8927: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8928: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8929: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8930: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8931: //RESET |-|012346|P|-----|-----| |0100_111_001_110_000 8932: public static void irpReset () throws M68kException { 8933: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8934: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8935: throw M68kException.m6eSignal; 8936: } 8937: //以下はスーパーバイザモード 8938: XEiJ.mpuCycleCount += 132; 8939: XEiJ.irpReset (); 8940: } //irpReset 8941: 8942: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8943: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8944: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8945: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8946: //NOP |-|012346|-|-----|-----| |0100_111_001_110_001 8947: public static void irpNop () throws M68kException { 8948: XEiJ.mpuCycleCount += 4; 8949: //何もしない 8950: } //irpNop 8951: 8952: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8953: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8954: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8955: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8956: //STOP #<data> |-|012346|P|UUUUU|*****| |0100_111_001_110_010-{data} 8957: // 8958: //STOP #<data> 8959: // 1. #<data>をsrに設定する 8960: // 2. pcを進める 8961: // 3. 以下のいずれかの条件が成立するまで停止する 8962: // 3a. トレース 8963: // 3b. マスクされているレベルよりも高い割り込み要求 8964: // 3c. リセット 8965: // コアと一緒にデバイスを止めるわけにいかないので、ここでは条件が成立するまで同じ命令を繰り返すループ命令として実装する 8966: public static void irpStop () throws M68kException { 8967: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8968: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8969: throw M68kException.m6eSignal; 8970: } 8971: //以下はスーパーバイザモード 8972: XEiJ.mpuCycleCount += 4; 8973: irpSetSR (XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。特権違反チェックが先 8974: if (XEiJ.mpuTraceFlag == 0) { //トレースまたはマスクされているレベルよりも高い割り込み要求がない 8975: XEiJ.regPC = XEiJ.regPC0; //ループ 8976: //任意の負荷率を100%に設定しているときSTOP命令が軽すぎると動作周波数が大きくなりすぎて割り込みがかかったとき次に進めなくなる 8977: //負荷率の計算にSTOP命令で止まっていた時間を含めないことにする 8978: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。25MHzのとき100clk 8979: XEiJ.mpuLastNano += 4000L; 8980: } 8981: } //irpStop 8982: 8983: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8984: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 8985: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 8986: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 8987: //RTE |-|012346|P|UUUUU|*****| |0100_111_001_110_011 8988: public static void irpRte () throws M68kException { 8989: if (XEiJ.regSRS == 0) { //ユーザモードのとき 8990: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 8991: throw M68kException.m6eSignal; 8992: } 8993: //以下はスーパーバイザモード 8994: XEiJ.mpuCycleCount += 20; 8995: int sp = XEiJ.regRn[15]; 8996: int format = XEiJ.busRws (sp + 6) & 0xf000; 8997: XEiJ.regRn[15] = sp + (format == 0x0000 ? 8 : //010,020,030,040,060 8998: format == 0x1000 ? 8 : //020,030,040 8999: format == 0x2000 ? 12 : //020,030,040,060 9000: //format == 0x3000 ? 12 : //040,060 9001: //format == 0x4000 ? 16 : //060 9002: //format == 0x7000 ? 60 : //040 9003: //format == 0x8000 ? 58 : //010 9004: format == 0x9000 ? 20 : //020,030 9005: format == 0xa000 ? 32 : //020,030 9006: format == 0xb000 ? 92 : //020,030 9007: 8); //??? 9008: int newSR = XEiJ.busRwz (sp); //popwz。ここでバスエラーが生じる可能性がある 9009: int newPC = XEiJ.busRls (sp + 2); //popls 9010: //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと 9011: irpSetSR (newSR); //ここでユーザモードに戻る場合がある。特権違反チェックが先 9012: irpSetPC (newPC); //分岐ログが新しいsrを使う。順序に注意 9013: if (format == 0x1000) { //スローアウェイフレームだったとき 9014: sp = XEiJ.regRn[15]; 9015: format = XEiJ.busRws (sp + 6) & 0xf000; 9016: XEiJ.regRn[15] = sp + (format == 0x0000 ? 8 : //010,020,030,040,060 9017: format == 0x1000 ? 8 : //020,030,040 9018: format == 0x2000 ? 12 : //020,030,040,060 9019: //format == 0x3000 ? 12 : //040,060 9020: //format == 0x4000 ? 16 : //060 9021: //format == 0x7000 ? 60 : //040 9022: //format == 0x8000 ? 58 : //010 9023: format == 0x9000 ? 20 : //020,030 9024: format == 0xa000 ? 32 : //020,030 9025: format == 0xb000 ? 92 : //020,030 9026: 8); //??? 9027: newSR = XEiJ.busRwz (sp); //popwz。ここでバスエラーが生じる可能性がある 9028: newPC = XEiJ.busRlse (sp + 2); //popls 9029: //irpSetSRでモードが切り替わる場合があるのでその前にr[15]を更新しておくこと 9030: irpSetSR (newSR); //ここでユーザモードに戻る場合がある。特権違反チェックが先 9031: irpSetPC (newPC); //分岐ログが新しいsrを使う。順序に注意 9032: } 9033: } //irpRte 9034: 9035: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9036: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9037: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9038: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9039: //RTD #<data> |-|-12346|-|-----|-----| |0100_111_001_110_100-{data} 9040: public static void irpRtd () throws M68kException { 9041: XEiJ.mpuCycleCount += 20; 9042: int sp = XEiJ.regRn[15]; 9043: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 9044: XEiJ.regRn[15] = sp + 4 + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 9045: } else { 9046: int t = XEiJ.regPC; 9047: XEiJ.regPC = t + 2; 9048: XEiJ.regRn[15] = sp + 4 + XEiJ.busRwse (t); //pcws 9049: } 9050: irpSetPC (XEiJ.busRls (sp)); //popls 9051: } //irpRtd 9052: 9053: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9054: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9055: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9056: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9057: //RTS |-|012346|-|-----|-----| |0100_111_001_110_101 9058: public static void irpRts () throws M68kException { 9059: XEiJ.mpuCycleCount += 16; 9060: int sp = XEiJ.regRn[15]; 9061: XEiJ.regRn[15] = sp + 4; 9062: irpSetPC (XEiJ.busRls (sp)); //popls 9063: } //irpRts 9064: 9065: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9066: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9067: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9068: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9069: //TRAPV |-|012346|-|---*-|-----| |0100_111_001_110_110 9070: public static void irpTrapv () throws M68kException { 9071: if (XEiJ.TEST_BIT_1_SHIFT ? XEiJ.regCCR << 31 - 1 >= 0 : (XEiJ.regCCR & XEiJ.REG_CCR_V) == 0) { //通過 9072: XEiJ.mpuCycleCount += 4; 9073: } else { 9074: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9075: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9076: throw M68kException.m6eSignal; 9077: } 9078: } //irpTrapv 9079: 9080: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9081: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9082: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9083: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9084: //RTR |-|012346|-|UUUUU|*****| |0100_111_001_110_111 9085: public static void irpRtr () throws M68kException { 9086: XEiJ.mpuCycleCount += 20; 9087: int sp = XEiJ.regRn[15]; 9088: XEiJ.regRn[15] = sp + 6; 9089: XEiJ.regCCR = XEiJ.REG_CCR_MASK & XEiJ.busRwz (sp); //popwz 9090: irpSetPC (XEiJ.busRls (sp + 2)); //popls 9091: } //irpRtr 9092: 9093: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9094: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9095: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9096: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9097: //MOVEC.L Rc,Rn |-|-12346|P|-----|-----| |0100_111_001_111_010-rnnncccccccccccc 9098: public static void irpMovecFromControl () throws M68kException { 9099: if (XEiJ.regSRS == 0) { //ユーザモードのとき 9100: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9101: throw M68kException.m6eSignal; 9102: } 9103: //以下はスーパーバイザモード 9104: XEiJ.mpuCycleCount += 10; 9105: int w; 9106: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 9107: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 9108: } else { 9109: w = XEiJ.regPC; 9110: XEiJ.regPC = w + 2; 9111: w = XEiJ.busRwze (w); //pcwz。拡張ワード 9112: } 9113: switch (w & 0x0fff) { 9114: case 0x000: //SFC 9115: XEiJ.regRn[w >> 12] = XEiJ.mpuSFC; 9116: break; 9117: case 0x001: //DFC 9118: XEiJ.regRn[w >> 12] = XEiJ.mpuDFC; 9119: break; 9120: case 0x002: //CACR 9121: XEiJ.regRn[w >> 12] = XEiJ.mpuCACR; 9122: break; 9123: case 0x800: //USP 9124: XEiJ.regRn[w >> 12] = XEiJ.mpuUSP; 9125: break; 9126: case 0x801: //VBR 9127: XEiJ.regRn[w >> 12] = XEiJ.mpuVBR; 9128: break; 9129: case 0x802: //CAAR 9130: XEiJ.regRn[w >> 12] = XEiJ.mpuCAAR; 9131: break; 9132: case 0x803: //MSP 9133: XEiJ.regRn[w >> 12] = XEiJ.regSRM != 0 ? XEiJ.regRn[15] : XEiJ.mpuMSP; 9134: break; 9135: case 0x804: //ISP 9136: XEiJ.regRn[w >> 12] = XEiJ.regSRM != 0 ? XEiJ.mpuISP : XEiJ.regRn[15]; 9137: break; 9138: default: 9139: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 9140: throw M68kException.m6eSignal; 9141: } 9142: } //irpMovecFromControl 9143: 9144: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9145: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9146: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9147: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9148: //MOVEC.L Rn,Rc |-|-12346|P|-----|-----| |0100_111_001_111_011-rnnncccccccccccc 9149: public static void irpMovecToControl () throws M68kException { 9150: if (XEiJ.regSRS == 0) { //ユーザモードのとき 9151: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 9152: throw M68kException.m6eSignal; 9153: } 9154: //以下はスーパーバイザモード 9155: XEiJ.mpuCycleCount += 12; 9156: int w; 9157: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 9158: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 9159: } else { 9160: w = XEiJ.regPC; 9161: XEiJ.regPC = w + 2; 9162: w = XEiJ.busRwze (w); //pcwz。拡張ワード 9163: } 9164: int d = XEiJ.regRn[w >> 12]; 9165: switch (w & 0x0fff) { 9166: case 0x000: //SFC 9167: XEiJ.mpuSFC = d & 0x00000007; 9168: break; 9169: case 0x001: //DFC 9170: XEiJ.mpuDFC = d & 0x00000007; 9171: break; 9172: case 0x002: //CACR 9173: XEiJ.mpuCACR = d & 0x00003f1f; 9174: { 9175: boolean cacheOn = (XEiJ.mpuCACR & 0x00000101) != 0; 9176: if (XEiJ.mpuCacheOn != cacheOn) { 9177: XEiJ.mpuCacheOn = cacheOn; 9178: XEiJ.mpuSetWait (); 9179: } 9180: } 9181: break; 9182: case 0x800: //USP 9183: XEiJ.mpuUSP = d; 9184: break; 9185: case 0x801: //VBR 9186: XEiJ.mpuVBR = d & -4; //4の倍数でないと困る 9187: break; 9188: case 0x802: //CAAR 9189: XEiJ.mpuCAAR = d; 9190: break; 9191: case 0x803: //MSP 9192: if (XEiJ.regSRM != 0) { 9193: XEiJ.regRn[15] = d; 9194: } else { 9195: XEiJ.mpuMSP = d; 9196: } 9197: break; 9198: case 0x804: //ISP 9199: if (XEiJ.regSRM != 0) { 9200: XEiJ.mpuISP = d; 9201: } else { 9202: XEiJ.regRn[15] = d; 9203: } 9204: break; 9205: default: 9206: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 9207: throw M68kException.m6eSignal; 9208: } 9209: } //irpMovecToControl 9210: 9211: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9212: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9213: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9214: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9215: //JSR <ea> |-|012346|-|-----|-----| M WXZP |0100_111_010_mmm_rrr 9216: //JBSR.L <label> |A|012346|-|-----|-----| |0100_111_010_111_001-{address} [JSR <label>] 9217: public static void irpJsr () throws M68kException { 9218: XEiJ.mpuCycleCount += 16 - 8; 9219: int a = efaJmpJsr (XEiJ.regOC & 63); //プッシュする前に実効アドレスを計算する 9220: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 9221: irpSetPC (a); 9222: } //irpJsr 9223: 9224: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9225: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9226: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9227: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9228: //JMP <ea> |-|012346|-|-----|-----| M WXZP |0100_111_011_mmm_rrr 9229: //JBRA.L <label> |A|012346|-|-----|-----| |0100_111_011_111_001-{address} [JMP <label>] 9230: public static void irpJmp () throws M68kException { 9231: //XEiJ.mpuCycleCount += 8 - 8; 9232: irpSetPC (efaJmpJsr (XEiJ.regOC & 63)); 9233: } //irpJmp 9234: 9235: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9236: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9237: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9238: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9239: //ADDQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_000_mmm_rrr 9240: //INC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_000_mmm_rrr [ADDQ.B #1,<ea>] 9241: public static void irpAddqByte () throws M68kException { 9242: int ea = XEiJ.regOC & 63; 9243: int x; 9244: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9245: int z; 9246: if (ea < XEiJ.EA_AR) { //ADDQ.B #<data>,Dr 9247: XEiJ.mpuCycleCount += 4; 9248: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) + y); 9249: } else { //ADDQ.B #<data>,<mem> 9250: XEiJ.mpuCycleCount += 8; 9251: int a = efaMltByte (ea); 9252: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) + y)); 9253: } 9254: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9255: (~x & z) >>> 31 << 1 | 9256: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9257: } //irpAddqByte 9258: 9259: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9260: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9261: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9262: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9263: //ADDQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_001_mmm_rrr 9264: //ADDQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_001_001_rrr 9265: //INC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_001_mmm_rrr [ADDQ.W #1,<ea>] 9266: //INC.W Ar |A|012346|-|-----|-----| A |0101_001_001_001_rrr [ADDQ.W #1,Ar] 9267: // 9268: //ADDQ.W #<data>,Ar 9269: // ソースを符号拡張してロングで加算する 9270: public static void irpAddqWord () throws M68kException { 9271: int ea = XEiJ.regOC & 63; 9272: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9273: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.W #<data>,Ar 9274: XEiJ.mpuCycleCount += 8; //MC68000 User's Manualに4と書いてあるのは8の間違い 9275: XEiJ.regRn[ea] += y; //ロングで計算する。このr[ea]はアドレスレジスタ 9276: //ccrは操作しない 9277: } else { 9278: int x; 9279: int z; 9280: if (ea < XEiJ.EA_AR) { //ADDQ.W #<data>,Dr 9281: XEiJ.mpuCycleCount += 4; 9282: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) + y)); 9283: } else { //ADDQ.W #<data>,<mem> 9284: XEiJ.mpuCycleCount += 8; 9285: int a = efaMltWord (ea); 9286: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) + y)); 9287: } 9288: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9289: (~x & z) >>> 31 << 1 | 9290: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9291: } 9292: } //irpAddqWord 9293: 9294: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9295: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9296: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9297: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9298: //ADDQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_010_mmm_rrr 9299: //ADDQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_010_001_rrr 9300: //INC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_010_mmm_rrr [ADDQ.L #1,<ea>] 9301: //INC.L Ar |A|012346|-|-----|-----| A |0101_001_010_001_rrr [ADDQ.L #1,Ar] 9302: public static void irpAddqLong () throws M68kException { 9303: int ea = XEiJ.regOC & 63; 9304: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9305: if (ea >> 3 == XEiJ.MMM_AR) { //ADDQ.L #<data>,Ar 9306: XEiJ.mpuCycleCount += 8; 9307: XEiJ.regRn[ea] += y; //このr[ea]はアドレスレジスタ 9308: //ccrは操作しない 9309: } else { 9310: int x; 9311: int z; 9312: if (ea < XEiJ.EA_AR) { //ADDQ.L #<data>,Dr 9313: XEiJ.mpuCycleCount += 8; 9314: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) + y; 9315: } else { //ADDQ.L #<data>,<mem> 9316: XEiJ.mpuCycleCount += 12; 9317: int a = efaMltLong (ea); 9318: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y); 9319: } 9320: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9321: (~x & z) >>> 31 << 1 | 9322: (x & ~z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addq 9323: } 9324: } //irpAddqLong 9325: 9326: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9327: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9328: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9329: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9330: //ST.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr 9331: //SNF.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_011_mmm_rrr [ST.B <ea>] 9332: //DBT.W Dr,<label> |-|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} 9333: //DBNF.W Dr,<label> |A|012346|-|-----|-----| |0101_000_011_001_rrr-{offset} [DBT.W Dr,<label>] 9334: //TRAPT.W #<data> |-|--2346|-|-----|-----| |0101_000_011_111_010-{data} 9335: //TPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9336: //TPT.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9337: //TRAPNF.W #<data> |A|--2346|-|-----|-----| |0101_000_011_111_010-{data} [TRAPT.W #<data>] 9338: //TRAPT.L #<data> |-|--2346|-|-----|-----| |0101_000_011_111_011-{data} 9339: //TPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9340: //TPT.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9341: //TRAPNF.L #<data> |A|--2346|-|-----|-----| |0101_000_011_111_011-{data} [TRAPT.L #<data>] 9342: //TRAPT |-|--2346|-|-----|-----| |0101_000_011_111_100 9343: //TPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9344: //TPT |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9345: //TRAPNF |A|--2346|-|-----|-----| |0101_000_011_111_100 [TRAPT] 9346: public static void irpSt () throws M68kException { 9347: int ea = XEiJ.regOC & 63; 9348: //DBT.W Dr,<label>よりもST.B Drを優先する 9349: if (ea < XEiJ.EA_AR) { //ST.B Dr 9350: XEiJ.mpuCycleCount += 6; 9351: XEiJ.regRn[ea] |= 0xff; 9352: } else if (ea < XEiJ.EA_MM) { //DBT.W Dr,<label> 9353: //条件が成立しているので通過 9354: XEiJ.mpuCycleCount += 12; 9355: XEiJ.regPC += 2; //オフセットを読み飛ばす 9356: if (M30_DIV_ZERO_V_FLAG) { 9357: m30DivZeroVFlag = !m30DivZeroVFlag; 9358: } 9359: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPT.W/TRAPT.L/TRAPT 9360: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9361: XEiJ.regPC += t; 9362: //条件が成立しているのでTRAPする 9363: XEiJ.mpuCycleCount += t << 1; 9364: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9365: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9366: throw M68kException.m6eSignal; 9367: } else { //ST.B <mem> 9368: XEiJ.mpuCycleCount += 8; 9369: XEiJ.busWb (efaMltByte (ea), 0xff); 9370: } 9371: } //irpSt 9372: 9373: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9374: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9375: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9376: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9377: //SUBQ.B #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_100_mmm_rrr 9378: //DEC.B <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_100_mmm_rrr [SUBQ.B #1,<ea>] 9379: public static void irpSubqByte () throws M68kException { 9380: int ea = XEiJ.regOC & 63; 9381: int x; 9382: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9383: int z; 9384: if (ea < XEiJ.EA_AR) { //SUBQ.B #<data>,Dr 9385: XEiJ.mpuCycleCount += 4; 9386: z = (byte) (XEiJ.regRn[ea] = ~0xff & (x = XEiJ.regRn[ea]) | 0xff & (x = (byte) x) - y); 9387: } else { //SUBQ.B #<data>,<mem> 9388: XEiJ.mpuCycleCount += 8; 9389: int a = efaMltByte (ea); 9390: XEiJ.busWb (a, z = (byte) ((x = XEiJ.busRbs (a)) - y)); 9391: } 9392: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9393: (x & ~z) >>> 31 << 1 | 9394: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9395: } //irpSubqByte 9396: 9397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9398: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9399: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9400: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9401: //SUBQ.W #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_101_mmm_rrr 9402: //SUBQ.W #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_101_001_rrr 9403: //DEC.W <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_101_mmm_rrr [SUBQ.W #1,<ea>] 9404: //DEC.W Ar |A|012346|-|-----|-----| A |0101_001_101_001_rrr [SUBQ.W #1,Ar] 9405: // 9406: //SUBQ.W #<data>,Ar 9407: // ソースを符号拡張してロングで減算する 9408: public static void irpSubqWord () throws M68kException { 9409: int ea = XEiJ.regOC & 63; 9410: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9411: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.W #<data>,Ar 9412: XEiJ.mpuCycleCount += 8; 9413: XEiJ.regRn[ea] -= y; //ロングで計算する。このr[ea]はアドレスレジスタ 9414: //ccrは操作しない 9415: } else { 9416: int x; 9417: int z; 9418: if (ea < XEiJ.EA_AR) { //SUBQ.W #<data>,Dr 9419: XEiJ.mpuCycleCount += 4; 9420: z = (short) (XEiJ.regRn[ea] = ~0xffff & (x = XEiJ.regRn[ea]) | (char) ((x = (short) x) - y)); 9421: } else { //SUBQ.W #<data>,<mem> 9422: XEiJ.mpuCycleCount += 8; 9423: int a = efaMltWord (ea); 9424: XEiJ.busWw (a, z = (short) ((x = XEiJ.busRws (a)) - y)); 9425: } 9426: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9427: (x & ~z) >>> 31 << 1 | 9428: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9429: } 9430: } //irpSubqWord 9431: 9432: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9433: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9434: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9435: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9436: //SUBQ.L #<data>,<ea> |-|012346|-|UUUUU|*****|D M+-WXZ |0101_qqq_110_mmm_rrr 9437: //SUBQ.L #<data>,Ar |-|012346|-|-----|-----| A |0101_qqq_110_001_rrr 9438: //DEC.L <ea> |A|012346|-|UUUUU|*****|D M+-WXZ |0101_001_110_mmm_rrr [SUBQ.L #1,<ea>] 9439: //DEC.L Ar |A|012346|-|-----|-----| A |0101_001_110_001_rrr [SUBQ.L #1,Ar] 9440: public static void irpSubqLong () throws M68kException { 9441: int ea = XEiJ.regOC & 63; 9442: int y = ((XEiJ.regOC >> 9) - 1 & 7) + 1; //qqq==0?8:qqq 9443: if (ea >> 3 == XEiJ.MMM_AR) { //SUBQ.L #<data>,Ar 9444: XEiJ.mpuCycleCount += 8; 9445: XEiJ.regRn[ea] -= y; //このr[ea]はアドレスレジスタ 9446: //ccrは操作しない 9447: } else { 9448: int x; 9449: int z; 9450: if (ea < XEiJ.EA_AR) { //SUBQ.L #<data>,Dr 9451: XEiJ.mpuCycleCount += 8; 9452: XEiJ.regRn[ea] = z = (x = XEiJ.regRn[ea]) - y; 9453: } else { //SUBQ.L #<data>,<mem> 9454: XEiJ.mpuCycleCount += 12; 9455: int a = efaMltLong (ea); 9456: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y); 9457: } 9458: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 9459: (x & ~z) >>> 31 << 1 | 9460: (~x & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subq 9461: } 9462: } //irpSubqLong 9463: 9464: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9465: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9466: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9467: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9468: //SF.B <ea> |-|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr 9469: //SNT.B <ea> |A|012346|-|-----|-----|D M+-WXZ |0101_000_111_mmm_rrr [SF.B <ea>] 9470: //DBF.W Dr,<label> |-|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} 9471: //DBNT.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9472: //DBRA.W Dr,<label> |A|012346|-|-----|-----| |0101_000_111_001_rrr-{offset} [DBF.W Dr,<label>] 9473: //TRAPF.W #<data> |-|--2346|-|-----|-----| |0101_000_111_111_010-{data} 9474: //TPF.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9475: //TPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9476: //TRAPNT.W #<data> |A|--2346|-|-----|-----| |0101_000_111_111_010-{data} [TRAPF.W #<data>] 9477: //TRAPF.L #<data> |-|--2346|-|-----|-----| |0101_000_111_111_011-{data} 9478: //TPF.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9479: //TPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9480: //TRAPNT.L #<data> |A|--2346|-|-----|-----| |0101_000_111_111_011-{data} [TRAPF.L #<data>] 9481: //TRAPF |-|--2346|-|-----|-----| |0101_000_111_111_100 9482: //TPF |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9483: //TPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9484: //TRAPNT |A|--2346|-|-----|-----| |0101_000_111_111_100 [TRAPF] 9485: public static void irpSf () throws M68kException { 9486: int ea = XEiJ.regOC & 63; 9487: //DBRA.W Dr,<label>よりもSF.B Drを優先する 9488: if (ea < XEiJ.EA_AR) { //SF.B Dr 9489: XEiJ.mpuCycleCount += 4; 9490: XEiJ.regRn[ea] &= ~0xff; 9491: } else if (ea < XEiJ.EA_MM) { //DBRA.W Dr,<label> 9492: //条件が成立していないのでデクリメント 9493: int rrr = XEiJ.regOC & 7; 9494: int t = XEiJ.regRn[rrr]; 9495: if ((short) t == 0) { //Drの下位16bitが0なので通過 9496: XEiJ.mpuCycleCount += 14; 9497: XEiJ.regRn[rrr] = t + 65535; 9498: XEiJ.regPC += 2; //オフセットを読み飛ばす 9499: } else { //Drの下位16bitが0でないのでジャンプ 9500: XEiJ.mpuCycleCount += 10; 9501: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9502: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9503: } 9504: if (M30_DIV_ZERO_V_FLAG) { 9505: m30DivZeroVFlag = !m30DivZeroVFlag; 9506: } 9507: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPF.W/TRAPF.L/TRAPF 9508: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9509: XEiJ.regPC += t; 9510: //条件が成立していないのでTRAPしない 9511: XEiJ.mpuCycleCount += 4 + (t << 1); 9512: } else { //SF.B <mem> 9513: XEiJ.mpuCycleCount += 8; 9514: XEiJ.busWb (efaMltByte (ea), 0x00); 9515: } 9516: } //irpSf 9517: 9518: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9519: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9520: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9521: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9522: //SHI.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr 9523: //SNLS.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_011_mmm_rrr [SHI.B <ea>] 9524: //DBHI.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} 9525: //DBNLS.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_011_001_rrr-{offset} [DBHI.W Dr,<label>] 9526: //TRAPHI.W #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} 9527: //TPHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9528: //TPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9529: //TRAPNLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_010-{data} [TRAPHI.W #<data>] 9530: //TRAPHI.L #<data> |-|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} 9531: //TPHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9532: //TPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9533: //TRAPNLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_011_111_011-{data} [TRAPHI.L #<data>] 9534: //TRAPHI |-|--2346|-|--*-*|-----| |0101_001_011_111_100 9535: //TPHI |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9536: //TPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9537: //TRAPNLS |A|--2346|-|--*-*|-----| |0101_001_011_111_100 [TRAPHI] 9538: public static void irpShi () throws M68kException { 9539: int ea = XEiJ.regOC & 63; 9540: if (ea >> 3 == XEiJ.MMM_AR) { //DBHI.W Dr,<label> 9541: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { 9542: //条件が成立しているので通過 9543: XEiJ.mpuCycleCount += 12; 9544: XEiJ.regPC += 2; //オフセットを読み飛ばす 9545: } else { 9546: //条件が成立していないのでデクリメント 9547: int rrr = XEiJ.regOC & 7; 9548: int t = XEiJ.regRn[rrr]; 9549: if ((short) t == 0) { //Drの下位16bitが0なので通過 9550: XEiJ.mpuCycleCount += 14; 9551: XEiJ.regRn[rrr] = t + 65535; 9552: XEiJ.regPC += 2; //オフセットを読み飛ばす 9553: } else { //Drの下位16bitが0でないのでジャンプ 9554: XEiJ.mpuCycleCount += 10; 9555: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9556: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9557: } 9558: } 9559: if (M30_DIV_ZERO_V_FLAG) { 9560: m30DivZeroVFlag = !m30DivZeroVFlag; 9561: } 9562: } else if (ea < XEiJ.EA_AR) { //SHI.B Dr 9563: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //セット 9564: XEiJ.mpuCycleCount += 6; 9565: XEiJ.regRn[ea] |= 0xff; 9566: } else { //クリア 9567: XEiJ.mpuCycleCount += 4; 9568: XEiJ.regRn[ea] &= ~0xff; 9569: } 9570: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHI.W/TRAPHI.L/TRAPHI 9571: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9572: XEiJ.regPC += t; 9573: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { 9574: //条件が成立しているのでTRAPする 9575: XEiJ.mpuCycleCount += t << 1; 9576: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9577: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9578: throw M68kException.m6eSignal; 9579: } else { 9580: //条件が成立していないのでTRAPしない 9581: XEiJ.mpuCycleCount += 4 + (t << 1); 9582: } 9583: } else { //SHI.B <mem> 9584: XEiJ.mpuCycleCount += 8; 9585: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_HI << XEiJ.regCCR >> 31); 9586: } 9587: } //irpShi 9588: 9589: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9590: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9591: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9592: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9593: //SLS.B <ea> |-|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr 9594: //SNHI.B <ea> |A|012346|-|--*-*|-----|D M+-WXZ |0101_001_111_mmm_rrr [SLS.B <ea>] 9595: //DBLS.W Dr,<label> |-|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} 9596: //DBNHI.W Dr,<label> |A|012346|-|--*-*|-----| |0101_001_111_001_rrr-{offset} [DBLS.W Dr,<label>] 9597: //TRAPLS.W #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} 9598: //TPLS.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9599: //TPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9600: //TRAPNHI.W #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_010-{data} [TRAPLS.W #<data>] 9601: //TRAPLS.L #<data> |-|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} 9602: //TPLS.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9603: //TPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9604: //TRAPNHI.L #<data> |A|--2346|-|--*-*|-----| |0101_001_111_111_011-{data} [TRAPLS.L #<data>] 9605: //TRAPLS |-|--2346|-|--*-*|-----| |0101_001_111_111_100 9606: //TPLS |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9607: //TPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9608: //TRAPNHI |A|--2346|-|--*-*|-----| |0101_001_111_111_100 [TRAPLS] 9609: public static void irpSls () throws M68kException { 9610: int ea = XEiJ.regOC & 63; 9611: if (ea >> 3 == XEiJ.MMM_AR) { //DBLS.W Dr,<label> 9612: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { 9613: //条件が成立しているので通過 9614: XEiJ.mpuCycleCount += 12; 9615: XEiJ.regPC += 2; //オフセットを読み飛ばす 9616: } else { 9617: //条件が成立していないのでデクリメント 9618: int rrr = XEiJ.regOC & 7; 9619: int t = XEiJ.regRn[rrr]; 9620: if ((short) t == 0) { //Drの下位16bitが0なので通過 9621: XEiJ.mpuCycleCount += 14; 9622: XEiJ.regRn[rrr] = t + 65535; 9623: XEiJ.regPC += 2; //オフセットを読み飛ばす 9624: } else { //Drの下位16bitが0でないのでジャンプ 9625: XEiJ.mpuCycleCount += 10; 9626: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9627: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9628: } 9629: } 9630: if (M30_DIV_ZERO_V_FLAG) { 9631: m30DivZeroVFlag = !m30DivZeroVFlag; 9632: } 9633: } else if (ea < XEiJ.EA_AR) { //SLS.B Dr 9634: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //セット 9635: XEiJ.mpuCycleCount += 6; 9636: XEiJ.regRn[ea] |= 0xff; 9637: } else { //クリア 9638: XEiJ.mpuCycleCount += 4; 9639: XEiJ.regRn[ea] &= ~0xff; 9640: } 9641: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLS.W/TRAPLS.L/TRAPLS 9642: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9643: XEiJ.regPC += t; 9644: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { 9645: //条件が成立しているのでTRAPする 9646: XEiJ.mpuCycleCount += t << 1; 9647: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9648: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9649: throw M68kException.m6eSignal; 9650: } else { 9651: //条件が成立していないのでTRAPしない 9652: XEiJ.mpuCycleCount += 4 + (t << 1); 9653: } 9654: } else { //SLS.B <mem> 9655: XEiJ.mpuCycleCount += 8; 9656: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LS << XEiJ.regCCR >> 31); 9657: } 9658: } //irpSls 9659: 9660: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9661: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9662: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9663: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9664: //SCC.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr 9665: //SHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9666: //SNCS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9667: //SNLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_011_mmm_rrr [SCC.B <ea>] 9668: //DBCC.W Dr,<label> |-|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} 9669: //DBHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9670: //DBNCS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9671: //DBNLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_011_001_rrr-{offset} [DBCC.W Dr,<label>] 9672: //TRAPCC.W #<data> |-|--2346|-|----*|-----| |0101_010_011_111_010-{data} 9673: //TPCC.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9674: //TPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9675: //TPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9676: //TPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9677: //TRAPHS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9678: //TRAPNCS.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9679: //TRAPNLO.W #<data> |A|--2346|-|----*|-----| |0101_010_011_111_010-{data} [TRAPCC.W #<data>] 9680: //TRAPCC.L #<data> |-|--2346|-|----*|-----| |0101_010_011_111_011-{data} 9681: //TPCC.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9682: //TPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9683: //TPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9684: //TPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9685: //TRAPHS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9686: //TRAPNCS.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9687: //TRAPNLO.L #<data> |A|--2346|-|----*|-----| |0101_010_011_111_011-{data} [TRAPCC.L #<data>] 9688: //TRAPCC |-|--2346|-|----*|-----| |0101_010_011_111_100 9689: //TPCC |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9690: //TPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9691: //TPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9692: //TPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9693: //TRAPHS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9694: //TRAPNCS |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9695: //TRAPNLO |A|--2346|-|----*|-----| |0101_010_011_111_100 [TRAPCC] 9696: public static void irpShs () throws M68kException { 9697: int ea = XEiJ.regOC & 63; 9698: if (ea >> 3 == XEiJ.MMM_AR) { //DBHS.W Dr,<label> 9699: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { 9700: //条件が成立しているので通過 9701: XEiJ.mpuCycleCount += 12; 9702: XEiJ.regPC += 2; //オフセットを読み飛ばす 9703: } else { 9704: //条件が成立していないのでデクリメント 9705: int rrr = XEiJ.regOC & 7; 9706: int t = XEiJ.regRn[rrr]; 9707: if ((short) t == 0) { //Drの下位16bitが0なので通過 9708: XEiJ.mpuCycleCount += 14; 9709: XEiJ.regRn[rrr] = t + 65535; 9710: XEiJ.regPC += 2; //オフセットを読み飛ばす 9711: } else { //Drの下位16bitが0でないのでジャンプ 9712: XEiJ.mpuCycleCount += 10; 9713: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9714: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9715: } 9716: } 9717: if (M30_DIV_ZERO_V_FLAG) { 9718: m30DivZeroVFlag = !m30DivZeroVFlag; 9719: } 9720: } else if (ea < XEiJ.EA_AR) { //SHS.B Dr 9721: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //セット 9722: XEiJ.mpuCycleCount += 6; 9723: XEiJ.regRn[ea] |= 0xff; 9724: } else { //クリア 9725: XEiJ.mpuCycleCount += 4; 9726: XEiJ.regRn[ea] &= ~0xff; 9727: } 9728: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPHS.W/TRAPHS.L/TRAPHS 9729: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9730: XEiJ.regPC += t; 9731: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { 9732: //条件が成立しているのでTRAPする 9733: XEiJ.mpuCycleCount += t << 1; 9734: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9735: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9736: throw M68kException.m6eSignal; 9737: } else { 9738: //条件が成立していないのでTRAPしない 9739: XEiJ.mpuCycleCount += 4 + (t << 1); 9740: } 9741: } else { //SHS.B <mem> 9742: XEiJ.mpuCycleCount += 8; 9743: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_HS << XEiJ.regCCR >> 31); 9744: } 9745: } //irpShs 9746: 9747: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9748: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9749: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9750: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9751: //SCS.B <ea> |-|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr 9752: //SLO.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9753: //SNCC.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9754: //SNHS.B <ea> |A|012346|-|----*|-----|D M+-WXZ |0101_010_111_mmm_rrr [SCS.B <ea>] 9755: //DBCS.W Dr,<label> |-|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} 9756: //DBLO.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9757: //DBNCC.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9758: //DBNHS.W Dr,<label> |A|012346|-|----*|-----| |0101_010_111_001_rrr-{offset} [DBCS.W Dr,<label>] 9759: //TRAPCS.W #<data> |-|--2346|-|----*|-----| |0101_010_111_111_010-{data} 9760: //TPCS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9761: //TPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9762: //TPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9763: //TPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9764: //TRAPLO.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9765: //TRAPNCC.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9766: //TRAPNHS.W #<data> |A|--2346|-|----*|-----| |0101_010_111_111_010-{data} [TRAPCS.W #<data>] 9767: //TRAPCS.L #<data> |-|--2346|-|----*|-----| |0101_010_111_111_011-{data} 9768: //TPCS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9769: //TPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9770: //TPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9771: //TPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9772: //TRAPLO.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9773: //TRAPNCC.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9774: //TRAPNHS.L #<data> |A|--2346|-|----*|-----| |0101_010_111_111_011-{data} [TRAPCS.L #<data>] 9775: //TRAPCS |-|--2346|-|----*|-----| |0101_010_111_111_100 9776: //TPCS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9777: //TPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9778: //TPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9779: //TPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9780: //TRAPLO |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9781: //TRAPNCC |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9782: //TRAPNHS |A|--2346|-|----*|-----| |0101_010_111_111_100 [TRAPCS] 9783: public static void irpSlo () throws M68kException { 9784: int ea = XEiJ.regOC & 63; 9785: if (ea >> 3 == XEiJ.MMM_AR) { //DBLO.W Dr,<label> 9786: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { 9787: //条件が成立しているので通過 9788: XEiJ.mpuCycleCount += 12; 9789: XEiJ.regPC += 2; //オフセットを読み飛ばす 9790: } else { 9791: //条件が成立していないのでデクリメント 9792: int rrr = XEiJ.regOC & 7; 9793: int t = XEiJ.regRn[rrr]; 9794: if ((short) t == 0) { //Drの下位16bitが0なので通過 9795: XEiJ.mpuCycleCount += 14; 9796: XEiJ.regRn[rrr] = t + 65535; 9797: XEiJ.regPC += 2; //オフセットを読み飛ばす 9798: } else { //Drの下位16bitが0でないのでジャンプ 9799: XEiJ.mpuCycleCount += 10; 9800: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9801: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9802: } 9803: } 9804: if (M30_DIV_ZERO_V_FLAG) { 9805: m30DivZeroVFlag = !m30DivZeroVFlag; 9806: } 9807: } else if (ea < XEiJ.EA_AR) { //SLO.B Dr 9808: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //セット 9809: XEiJ.mpuCycleCount += 6; 9810: XEiJ.regRn[ea] |= 0xff; 9811: } else { //クリア 9812: XEiJ.mpuCycleCount += 4; 9813: XEiJ.regRn[ea] &= ~0xff; 9814: } 9815: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLO.W/TRAPLO.L/TRAPLO 9816: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9817: XEiJ.regPC += t; 9818: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { 9819: //条件が成立しているのでTRAPする 9820: XEiJ.mpuCycleCount += t << 1; 9821: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9822: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9823: throw M68kException.m6eSignal; 9824: } else { 9825: //条件が成立していないのでTRAPしない 9826: XEiJ.mpuCycleCount += 4 + (t << 1); 9827: } 9828: } else { //SLO.B <mem> 9829: XEiJ.mpuCycleCount += 8; 9830: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LO << XEiJ.regCCR >> 31); 9831: } 9832: } //irpSlo 9833: 9834: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9835: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9836: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9837: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9838: //SNE.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr 9839: //SNEQ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9840: //SNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9841: //SNZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_011_mmm_rrr [SNE.B <ea>] 9842: //DBNE.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} 9843: //DBNEQ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9844: //DBNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9845: //DBNZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_011_001_rrr-{offset} [DBNE.W Dr,<label>] 9846: //TRAPNE.W #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_010-{data} 9847: //TPNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9848: //TPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9849: //TPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9850: //TPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9851: //TRAPNEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9852: //TRAPNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9853: //TRAPNZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_010-{data} [TRAPNE.W #<data>] 9854: //TRAPNE.L #<data> |-|--2346|-|--*--|-----| |0101_011_011_111_011-{data} 9855: //TPNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9856: //TPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9857: //TPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9858: //TPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9859: //TRAPNEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9860: //TRAPNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9861: //TRAPNZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_011_111_011-{data} [TRAPNE.L #<data>] 9862: //TRAPNE |-|--2346|-|--*--|-----| |0101_011_011_111_100 9863: //TPNE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9864: //TPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9865: //TPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9866: //TPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9867: //TRAPNEQ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9868: //TRAPNZ |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9869: //TRAPNZE |A|--2346|-|--*--|-----| |0101_011_011_111_100 [TRAPNE] 9870: public static void irpSne () throws M68kException { 9871: int ea = XEiJ.regOC & 63; 9872: if (ea >> 3 == XEiJ.MMM_AR) { //DBNE.W Dr,<label> 9873: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { 9874: //条件が成立しているので通過 9875: XEiJ.mpuCycleCount += 12; 9876: XEiJ.regPC += 2; //オフセットを読み飛ばす 9877: } else { 9878: //条件が成立していないのでデクリメント 9879: int rrr = XEiJ.regOC & 7; 9880: int t = XEiJ.regRn[rrr]; 9881: if ((short) t == 0) { //Drの下位16bitが0なので通過 9882: XEiJ.mpuCycleCount += 14; 9883: XEiJ.regRn[rrr] = t + 65535; 9884: XEiJ.regPC += 2; //オフセットを読み飛ばす 9885: } else { //Drの下位16bitが0でないのでジャンプ 9886: XEiJ.mpuCycleCount += 10; 9887: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9888: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9889: } 9890: } 9891: if (M30_DIV_ZERO_V_FLAG) { 9892: m30DivZeroVFlag = !m30DivZeroVFlag; 9893: } 9894: } else if (ea < XEiJ.EA_AR) { //SNE.B Dr 9895: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //セット 9896: XEiJ.mpuCycleCount += 6; 9897: XEiJ.regRn[ea] |= 0xff; 9898: } else { //クリア 9899: XEiJ.mpuCycleCount += 4; 9900: XEiJ.regRn[ea] &= ~0xff; 9901: } 9902: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPNE.W/TRAPNE.L/TRAPNE 9903: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9904: XEiJ.regPC += t; 9905: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { 9906: //条件が成立しているのでTRAPする 9907: XEiJ.mpuCycleCount += t << 1; 9908: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9909: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9910: throw M68kException.m6eSignal; 9911: } else { 9912: //条件が成立していないのでTRAPしない 9913: XEiJ.mpuCycleCount += 4 + (t << 1); 9914: } 9915: } else { //SNE.B <mem> 9916: XEiJ.mpuCycleCount += 8; 9917: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_NE << XEiJ.regCCR >> 31); 9918: } 9919: } //irpSne 9920: 9921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9922: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 9923: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 9924: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 9925: //SEQ.B <ea> |-|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr 9926: //SNNE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9927: //SNNZ.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9928: //SZE.B <ea> |A|012346|-|--*--|-----|D M+-WXZ |0101_011_111_mmm_rrr [SEQ.B <ea>] 9929: //DBEQ.W Dr,<label> |-|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} 9930: //DBNNE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9931: //DBNNZ.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9932: //DBZE.W Dr,<label> |A|012346|-|--*--|-----| |0101_011_111_001_rrr-{offset} [DBEQ.W Dr,<label>] 9933: //TRAPEQ.W #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_010-{data} 9934: //TPEQ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9935: //TPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9936: //TPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9937: //TPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9938: //TRAPNNE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9939: //TRAPNNZ.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9940: //TRAPZE.W #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_010-{data} [TRAPEQ.W #<data>] 9941: //TRAPEQ.L #<data> |-|--2346|-|--*--|-----| |0101_011_111_111_011-{data} 9942: //TPEQ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9943: //TPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9944: //TPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9945: //TPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9946: //TRAPNNE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9947: //TRAPNNZ.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9948: //TRAPZE.L #<data> |A|--2346|-|--*--|-----| |0101_011_111_111_011-{data} [TRAPEQ.L #<data>] 9949: //TRAPEQ |-|--2346|-|--*--|-----| |0101_011_111_111_100 9950: //TPEQ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9951: //TPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9952: //TPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9953: //TPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9954: //TRAPNNE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9955: //TRAPNNZ |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9956: //TRAPZE |A|--2346|-|--*--|-----| |0101_011_111_111_100 [TRAPEQ] 9957: public static void irpSeq () throws M68kException { 9958: int ea = XEiJ.regOC & 63; 9959: if (ea >> 3 == XEiJ.MMM_AR) { //DBEQ.W Dr,<label> 9960: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { 9961: //条件が成立しているので通過 9962: XEiJ.mpuCycleCount += 12; 9963: XEiJ.regPC += 2; //オフセットを読み飛ばす 9964: } else { 9965: //条件が成立していないのでデクリメント 9966: int rrr = XEiJ.regOC & 7; 9967: int t = XEiJ.regRn[rrr]; 9968: if ((short) t == 0) { //Drの下位16bitが0なので通過 9969: XEiJ.mpuCycleCount += 14; 9970: XEiJ.regRn[rrr] = t + 65535; 9971: XEiJ.regPC += 2; //オフセットを読み飛ばす 9972: } else { //Drの下位16bitが0でないのでジャンプ 9973: XEiJ.mpuCycleCount += 10; 9974: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 9975: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 9976: } 9977: } 9978: if (M30_DIV_ZERO_V_FLAG) { 9979: m30DivZeroVFlag = !m30DivZeroVFlag; 9980: } 9981: } else if (ea < XEiJ.EA_AR) { //SEQ.B Dr 9982: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //セット 9983: XEiJ.mpuCycleCount += 6; 9984: XEiJ.regRn[ea] |= 0xff; 9985: } else { //クリア 9986: XEiJ.mpuCycleCount += 4; 9987: XEiJ.regRn[ea] &= ~0xff; 9988: } 9989: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPEQ.W/TRAPEQ.L/TRAPEQ 9990: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 9991: XEiJ.regPC += t; 9992: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { 9993: //条件が成立しているのでTRAPする 9994: XEiJ.mpuCycleCount += t << 1; 9995: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 9996: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 9997: throw M68kException.m6eSignal; 9998: } else { 9999: //条件が成立していないのでTRAPしない 10000: XEiJ.mpuCycleCount += 4 + (t << 1); 10001: } 10002: } else { //SEQ.B <mem> 10003: XEiJ.mpuCycleCount += 8; 10004: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_EQ << XEiJ.regCCR >> 31); 10005: } 10006: } //irpSeq 10007: 10008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10009: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10010: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10011: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10012: //SVC.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr 10013: //SNVS.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_011_mmm_rrr [SVC.B <ea>] 10014: //DBVC.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} 10015: //DBNVS.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_011_001_rrr-{offset} [DBVC.W Dr,<label>] 10016: //TRAPVC.W #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_010-{data} 10017: //TPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 10018: //TPVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 10019: //TRAPNVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_010-{data} [TRAPVC.W #<data>] 10020: //TRAPVC.L #<data> |-|--2346|-|---*-|-----| |0101_100_011_111_011-{data} 10021: //TPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 10022: //TPVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 10023: //TRAPNVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_011_111_011-{data} [TRAPVC.L #<data>] 10024: //TRAPVC |-|--2346|-|---*-|-----| |0101_100_011_111_100 10025: //TPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 10026: //TPVC |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 10027: //TRAPNVS |A|--2346|-|---*-|-----| |0101_100_011_111_100 [TRAPVC] 10028: public static void irpSvc () throws M68kException { 10029: int ea = XEiJ.regOC & 63; 10030: if (ea >> 3 == XEiJ.MMM_AR) { //DBVC.W Dr,<label> 10031: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { 10032: //条件が成立しているので通過 10033: XEiJ.mpuCycleCount += 12; 10034: XEiJ.regPC += 2; //オフセットを読み飛ばす 10035: } else { 10036: //条件が成立していないのでデクリメント 10037: int rrr = XEiJ.regOC & 7; 10038: int t = XEiJ.regRn[rrr]; 10039: if ((short) t == 0) { //Drの下位16bitが0なので通過 10040: XEiJ.mpuCycleCount += 14; 10041: XEiJ.regRn[rrr] = t + 65535; 10042: XEiJ.regPC += 2; //オフセットを読み飛ばす 10043: } else { //Drの下位16bitが0でないのでジャンプ 10044: XEiJ.mpuCycleCount += 10; 10045: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10046: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10047: } 10048: } 10049: if (M30_DIV_ZERO_V_FLAG) { 10050: m30DivZeroVFlag = !m30DivZeroVFlag; 10051: } 10052: } else if (ea < XEiJ.EA_AR) { //SVC.B Dr 10053: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //セット 10054: XEiJ.mpuCycleCount += 6; 10055: XEiJ.regRn[ea] |= 0xff; 10056: } else { //クリア 10057: XEiJ.mpuCycleCount += 4; 10058: XEiJ.regRn[ea] &= ~0xff; 10059: } 10060: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVC.W/TRAPVC.L/TRAPVC 10061: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10062: XEiJ.regPC += t; 10063: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { 10064: //条件が成立しているのでTRAPする 10065: XEiJ.mpuCycleCount += t << 1; 10066: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10067: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10068: throw M68kException.m6eSignal; 10069: } else { 10070: //条件が成立していないのでTRAPしない 10071: XEiJ.mpuCycleCount += 4 + (t << 1); 10072: } 10073: } else { //SVC.B <mem> 10074: XEiJ.mpuCycleCount += 8; 10075: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_VC << XEiJ.regCCR >> 31); 10076: } 10077: } //irpSvc 10078: 10079: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10080: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10081: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10082: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10083: //SVS.B <ea> |-|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr 10084: //SNVC.B <ea> |A|012346|-|---*-|-----|D M+-WXZ |0101_100_111_mmm_rrr [SVS.B <ea>] 10085: //DBVS.W Dr,<label> |-|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} 10086: //DBNVC.W Dr,<label> |A|012346|-|---*-|-----| |0101_100_111_001_rrr-{offset} [DBVS.W Dr,<label>] 10087: //TRAPVS.W #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_010-{data} 10088: //TPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10089: //TPVS.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10090: //TRAPNVC.W #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_010-{data} [TRAPVS.W #<data>] 10091: //TRAPVS.L #<data> |-|--2346|-|---*-|-----| |0101_100_111_111_011-{data} 10092: //TPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10093: //TPVS.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10094: //TRAPNVC.L #<data> |A|--2346|-|---*-|-----| |0101_100_111_111_011-{data} [TRAPVS.L #<data>] 10095: //TRAPVS |-|--2346|-|---*-|-----| |0101_100_111_111_100 10096: //TPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10097: //TPVS |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10098: //TRAPNVC |A|--2346|-|---*-|-----| |0101_100_111_111_100 [TRAPVS] 10099: public static void irpSvs () throws M68kException { 10100: int ea = XEiJ.regOC & 63; 10101: if (ea >> 3 == XEiJ.MMM_AR) { //DBVS.W Dr,<label> 10102: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { 10103: //条件が成立しているので通過 10104: XEiJ.mpuCycleCount += 12; 10105: XEiJ.regPC += 2; //オフセットを読み飛ばす 10106: } else { 10107: //条件が成立していないのでデクリメント 10108: int rrr = XEiJ.regOC & 7; 10109: int t = XEiJ.regRn[rrr]; 10110: if ((short) t == 0) { //Drの下位16bitが0なので通過 10111: XEiJ.mpuCycleCount += 14; 10112: XEiJ.regRn[rrr] = t + 65535; 10113: XEiJ.regPC += 2; //オフセットを読み飛ばす 10114: } else { //Drの下位16bitが0でないのでジャンプ 10115: XEiJ.mpuCycleCount += 10; 10116: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10117: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10118: } 10119: } 10120: if (M30_DIV_ZERO_V_FLAG) { 10121: m30DivZeroVFlag = !m30DivZeroVFlag; 10122: } 10123: } else if (ea < XEiJ.EA_AR) { //SVS.B Dr 10124: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //セット 10125: XEiJ.mpuCycleCount += 6; 10126: XEiJ.regRn[ea] |= 0xff; 10127: } else { //クリア 10128: XEiJ.mpuCycleCount += 4; 10129: XEiJ.regRn[ea] &= ~0xff; 10130: } 10131: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPVS.W/TRAPVS.L/TRAPVS 10132: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10133: XEiJ.regPC += t; 10134: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { 10135: //条件が成立しているのでTRAPする 10136: XEiJ.mpuCycleCount += t << 1; 10137: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10138: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10139: throw M68kException.m6eSignal; 10140: } else { 10141: //条件が成立していないのでTRAPしない 10142: XEiJ.mpuCycleCount += 4 + (t << 1); 10143: } 10144: } else { //SVS.B <mem> 10145: XEiJ.mpuCycleCount += 8; 10146: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_VS << XEiJ.regCCR >> 31); 10147: } 10148: } //irpSvs 10149: 10150: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10151: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10152: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10153: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10154: //SPL.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr 10155: //SNMI.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_011_mmm_rrr [SPL.B <ea>] 10156: //DBPL.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} 10157: //DBNMI.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_011_001_rrr-{offset} [DBPL.W Dr,<label>] 10158: //TRAPPL.W #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_010-{data} 10159: //TPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10160: //TPPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10161: //TRAPNMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_010-{data} [TRAPPL.W #<data>] 10162: //TRAPPL.L #<data> |-|--2346|-|-*---|-----| |0101_101_011_111_011-{data} 10163: //TPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10164: //TPPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10165: //TRAPNMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_011_111_011-{data} [TRAPPL.L #<data>] 10166: //TRAPPL |-|--2346|-|-*---|-----| |0101_101_011_111_100 10167: //TPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10168: //TPPL |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10169: //TRAPNMI |A|--2346|-|-*---|-----| |0101_101_011_111_100 [TRAPPL] 10170: public static void irpSpl () throws M68kException { 10171: int ea = XEiJ.regOC & 63; 10172: if (ea >> 3 == XEiJ.MMM_AR) { //DBPL.W Dr,<label> 10173: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { 10174: //条件が成立しているので通過 10175: XEiJ.mpuCycleCount += 12; 10176: XEiJ.regPC += 2; //オフセットを読み飛ばす 10177: } else { 10178: //条件が成立していないのでデクリメント 10179: int rrr = XEiJ.regOC & 7; 10180: int t = XEiJ.regRn[rrr]; 10181: if ((short) t == 0) { //Drの下位16bitが0なので通過 10182: XEiJ.mpuCycleCount += 14; 10183: XEiJ.regRn[rrr] = t + 65535; 10184: XEiJ.regPC += 2; //オフセットを読み飛ばす 10185: } else { //Drの下位16bitが0でないのでジャンプ 10186: XEiJ.mpuCycleCount += 10; 10187: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10188: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10189: } 10190: } 10191: if (M30_DIV_ZERO_V_FLAG) { 10192: m30DivZeroVFlag = !m30DivZeroVFlag; 10193: } 10194: } else if (ea < XEiJ.EA_AR) { //SPL.B Dr 10195: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //セット 10196: XEiJ.mpuCycleCount += 6; 10197: XEiJ.regRn[ea] |= 0xff; 10198: } else { //クリア 10199: XEiJ.mpuCycleCount += 4; 10200: XEiJ.regRn[ea] &= ~0xff; 10201: } 10202: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPPL.W/TRAPPL.L/TRAPPL 10203: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10204: XEiJ.regPC += t; 10205: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { 10206: //条件が成立しているのでTRAPする 10207: XEiJ.mpuCycleCount += t << 1; 10208: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10209: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10210: throw M68kException.m6eSignal; 10211: } else { 10212: //条件が成立していないのでTRAPしない 10213: XEiJ.mpuCycleCount += 4 + (t << 1); 10214: } 10215: } else { //SPL.B <mem> 10216: XEiJ.mpuCycleCount += 8; 10217: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_PL << XEiJ.regCCR >> 31); 10218: } 10219: } //irpSpl 10220: 10221: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10222: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10223: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10224: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10225: //SMI.B <ea> |-|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr 10226: //SNPL.B <ea> |A|012346|-|-*---|-----|D M+-WXZ |0101_101_111_mmm_rrr [SMI.B <ea>] 10227: //DBMI.W Dr,<label> |-|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} 10228: //DBNPL.W Dr,<label> |A|012346|-|-*---|-----| |0101_101_111_001_rrr-{offset} [DBMI.W Dr,<label>] 10229: //TRAPMI.W #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_010-{data} 10230: //TPMI.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10231: //TPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10232: //TRAPNPL.W #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_010-{data} [TRAPMI.W #<data>] 10233: //TRAPMI.L #<data> |-|--2346|-|-*---|-----| |0101_101_111_111_011-{data} 10234: //TPMI.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10235: //TPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10236: //TRAPNPL.L #<data> |A|--2346|-|-*---|-----| |0101_101_111_111_011-{data} [TRAPMI.L #<data>] 10237: //TRAPMI |-|--2346|-|-*---|-----| |0101_101_111_111_100 10238: //TPMI |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10239: //TPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10240: //TRAPNPL |A|--2346|-|-*---|-----| |0101_101_111_111_100 [TRAPMI] 10241: public static void irpSmi () throws M68kException { 10242: int ea = XEiJ.regOC & 63; 10243: if (ea >> 3 == XEiJ.MMM_AR) { //DBMI.W Dr,<label> 10244: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { 10245: //条件が成立しているので通過 10246: XEiJ.mpuCycleCount += 12; 10247: XEiJ.regPC += 2; //オフセットを読み飛ばす 10248: } else { 10249: //条件が成立していないのでデクリメント 10250: int rrr = XEiJ.regOC & 7; 10251: int t = XEiJ.regRn[rrr]; 10252: if ((short) t == 0) { //Drの下位16bitが0なので通過 10253: XEiJ.mpuCycleCount += 14; 10254: XEiJ.regRn[rrr] = t + 65535; 10255: XEiJ.regPC += 2; //オフセットを読み飛ばす 10256: } else { //Drの下位16bitが0でないのでジャンプ 10257: XEiJ.mpuCycleCount += 10; 10258: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10259: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10260: } 10261: } 10262: if (M30_DIV_ZERO_V_FLAG) { 10263: m30DivZeroVFlag = !m30DivZeroVFlag; 10264: } 10265: } else if (ea < XEiJ.EA_AR) { //SMI.B Dr 10266: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //セット 10267: XEiJ.mpuCycleCount += 6; 10268: XEiJ.regRn[ea] |= 0xff; 10269: } else { //クリア 10270: XEiJ.mpuCycleCount += 4; 10271: XEiJ.regRn[ea] &= ~0xff; 10272: } 10273: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPMI.W/TRAPMI.L/TRAPMI 10274: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10275: XEiJ.regPC += t; 10276: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { 10277: //条件が成立しているのでTRAPする 10278: XEiJ.mpuCycleCount += t << 1; 10279: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10280: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10281: throw M68kException.m6eSignal; 10282: } else { 10283: //条件が成立していないのでTRAPしない 10284: XEiJ.mpuCycleCount += 4 + (t << 1); 10285: } 10286: } else { //SMI.B <mem> 10287: XEiJ.mpuCycleCount += 8; 10288: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_MI << XEiJ.regCCR >> 31); 10289: } 10290: } //irpSmi 10291: 10292: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10293: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10294: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10295: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10296: //SGE.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr 10297: //SNLT.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_011_mmm_rrr [SGE.B <ea>] 10298: //DBGE.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} 10299: //DBNLT.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_011_001_rrr-{offset} [DBGE.W Dr,<label>] 10300: //TRAPGE.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} 10301: //TPGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10302: //TPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10303: //TRAPNLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_010-{data} [TRAPGE.W #<data>] 10304: //TRAPGE.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} 10305: //TPGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10306: //TPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10307: //TRAPNLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_011_111_011-{data} [TRAPGE.L #<data>] 10308: //TRAPGE |-|--2346|-|-*-*-|-----| |0101_110_011_111_100 10309: //TPGE |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10310: //TPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10311: //TRAPNLT |A|--2346|-|-*-*-|-----| |0101_110_011_111_100 [TRAPGE] 10312: public static void irpSge () throws M68kException { 10313: int ea = XEiJ.regOC & 63; 10314: if (ea >> 3 == XEiJ.MMM_AR) { //DBGE.W Dr,<label> 10315: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { 10316: //条件が成立しているので通過 10317: XEiJ.mpuCycleCount += 12; 10318: XEiJ.regPC += 2; //オフセットを読み飛ばす 10319: } else { 10320: //条件が成立していないのでデクリメント 10321: int rrr = XEiJ.regOC & 7; 10322: int t = XEiJ.regRn[rrr]; 10323: if ((short) t == 0) { //Drの下位16bitが0なので通過 10324: XEiJ.mpuCycleCount += 14; 10325: XEiJ.regRn[rrr] = t + 65535; 10326: XEiJ.regPC += 2; //オフセットを読み飛ばす 10327: } else { //Drの下位16bitが0でないのでジャンプ 10328: XEiJ.mpuCycleCount += 10; 10329: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10330: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10331: } 10332: } 10333: if (M30_DIV_ZERO_V_FLAG) { 10334: m30DivZeroVFlag = !m30DivZeroVFlag; 10335: } 10336: } else if (ea < XEiJ.EA_AR) { //SGE.B Dr 10337: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //セット 10338: XEiJ.mpuCycleCount += 6; 10339: XEiJ.regRn[ea] |= 0xff; 10340: } else { //クリア 10341: XEiJ.mpuCycleCount += 4; 10342: XEiJ.regRn[ea] &= ~0xff; 10343: } 10344: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGE.W/TRAPGE.L/TRAPGE 10345: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10346: XEiJ.regPC += t; 10347: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { 10348: //条件が成立しているのでTRAPする 10349: XEiJ.mpuCycleCount += t << 1; 10350: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10351: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10352: throw M68kException.m6eSignal; 10353: } else { 10354: //条件が成立していないのでTRAPしない 10355: XEiJ.mpuCycleCount += 4 + (t << 1); 10356: } 10357: } else { //SGE.B <mem> 10358: XEiJ.mpuCycleCount += 8; 10359: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_GE << XEiJ.regCCR >> 31); 10360: } 10361: } //irpSge 10362: 10363: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10364: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10365: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10366: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10367: //SLT.B <ea> |-|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr 10368: //SNGE.B <ea> |A|012346|-|-*-*-|-----|D M+-WXZ |0101_110_111_mmm_rrr [SLT.B <ea>] 10369: //DBLT.W Dr,<label> |-|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} 10370: //DBNGE.W Dr,<label> |A|012346|-|-*-*-|-----| |0101_110_111_001_rrr-{offset} [DBLT.W Dr,<label>] 10371: //TRAPLT.W #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} 10372: //TPLT.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10373: //TPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10374: //TRAPNGE.W #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_010-{data} [TRAPLT.W #<data>] 10375: //TRAPLT.L #<data> |-|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} 10376: //TPLT.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10377: //TPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10378: //TRAPNGE.L #<data> |A|--2346|-|-*-*-|-----| |0101_110_111_111_011-{data} [TRAPLT.L #<data>] 10379: //TRAPLT |-|--2346|-|-*-*-|-----| |0101_110_111_111_100 10380: //TPLT |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10381: //TPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10382: //TRAPNGE |A|--2346|-|-*-*-|-----| |0101_110_111_111_100 [TRAPLT] 10383: public static void irpSlt () throws M68kException { 10384: int ea = XEiJ.regOC & 63; 10385: if (ea >> 3 == XEiJ.MMM_AR) { //DBLT.W Dr,<label> 10386: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { 10387: //条件が成立しているので通過 10388: XEiJ.mpuCycleCount += 12; 10389: XEiJ.regPC += 2; //オフセットを読み飛ばす 10390: } else { 10391: //条件が成立していないのでデクリメント 10392: int rrr = XEiJ.regOC & 7; 10393: int t = XEiJ.regRn[rrr]; 10394: if ((short) t == 0) { //Drの下位16bitが0なので通過 10395: XEiJ.mpuCycleCount += 14; 10396: XEiJ.regRn[rrr] = t + 65535; 10397: XEiJ.regPC += 2; //オフセットを読み飛ばす 10398: } else { //Drの下位16bitが0でないのでジャンプ 10399: XEiJ.mpuCycleCount += 10; 10400: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10401: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10402: } 10403: } 10404: if (M30_DIV_ZERO_V_FLAG) { 10405: m30DivZeroVFlag = !m30DivZeroVFlag; 10406: } 10407: } else if (ea < XEiJ.EA_AR) { //SLT.B Dr 10408: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //セット 10409: XEiJ.mpuCycleCount += 6; 10410: XEiJ.regRn[ea] |= 0xff; 10411: } else { //クリア 10412: XEiJ.mpuCycleCount += 4; 10413: XEiJ.regRn[ea] &= ~0xff; 10414: } 10415: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLT.W/TRAPLT.L/TRAPLT 10416: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10417: XEiJ.regPC += t; 10418: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { 10419: //条件が成立しているのでTRAPする 10420: XEiJ.mpuCycleCount += t << 1; 10421: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10422: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10423: throw M68kException.m6eSignal; 10424: } else { 10425: //条件が成立していないのでTRAPしない 10426: XEiJ.mpuCycleCount += 4 + (t << 1); 10427: } 10428: } else { //SLT.B <mem> 10429: XEiJ.mpuCycleCount += 8; 10430: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LT << XEiJ.regCCR >> 31); 10431: } 10432: } //irpSlt 10433: 10434: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10435: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10436: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10438: //SGT.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr 10439: //SNLE.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_011_mmm_rrr [SGT.B <ea>] 10440: //DBGT.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} 10441: //DBNLE.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_011_001_rrr-{offset} [DBGT.W Dr,<label>] 10442: //TRAPGT.W #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_010-{data} 10443: //TPGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10444: //TPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10445: //TRAPNLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_010-{data} [TRAPGT.W #<data>] 10446: //TRAPGT.L #<data> |-|--2346|-|-***-|-----| |0101_111_011_111_011-{data} 10447: //TPGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10448: //TPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10449: //TRAPNLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_011_111_011-{data} [TRAPGT.L #<data>] 10450: //TRAPGT |-|--2346|-|-***-|-----| |0101_111_011_111_100 10451: //TPGT |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10452: //TPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10453: //TRAPNLE |A|--2346|-|-***-|-----| |0101_111_011_111_100 [TRAPGT] 10454: public static void irpSgt () throws M68kException { 10455: int ea = XEiJ.regOC & 63; 10456: if (ea >> 3 == XEiJ.MMM_AR) { //DBGT.W Dr,<label> 10457: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { 10458: //条件が成立しているので通過 10459: XEiJ.mpuCycleCount += 12; 10460: XEiJ.regPC += 2; //オフセットを読み飛ばす 10461: } else { 10462: //条件が成立していないのでデクリメント 10463: int rrr = XEiJ.regOC & 7; 10464: int t = XEiJ.regRn[rrr]; 10465: if ((short) t == 0) { //Drの下位16bitが0なので通過 10466: XEiJ.mpuCycleCount += 14; 10467: XEiJ.regRn[rrr] = t + 65535; 10468: XEiJ.regPC += 2; //オフセットを読み飛ばす 10469: } else { //Drの下位16bitが0でないのでジャンプ 10470: XEiJ.mpuCycleCount += 10; 10471: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10472: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10473: } 10474: } 10475: if (M30_DIV_ZERO_V_FLAG) { 10476: m30DivZeroVFlag = !m30DivZeroVFlag; 10477: } 10478: } else if (ea < XEiJ.EA_AR) { //SGT.B Dr 10479: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //セット 10480: XEiJ.mpuCycleCount += 6; 10481: XEiJ.regRn[ea] |= 0xff; 10482: } else { //クリア 10483: XEiJ.mpuCycleCount += 4; 10484: XEiJ.regRn[ea] &= ~0xff; 10485: } 10486: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPGT.W/TRAPGT.L/TRAPGT 10487: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10488: XEiJ.regPC += t; 10489: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { 10490: //条件が成立しているのでTRAPする 10491: XEiJ.mpuCycleCount += t << 1; 10492: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10493: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10494: throw M68kException.m6eSignal; 10495: } else { 10496: //条件が成立していないのでTRAPしない 10497: XEiJ.mpuCycleCount += 4 + (t << 1); 10498: } 10499: } else { //SGT.B <mem> 10500: XEiJ.mpuCycleCount += 8; 10501: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_GT << XEiJ.regCCR >> 31); 10502: } 10503: } //irpSgt 10504: 10505: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10506: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10507: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10508: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10509: //SLE.B <ea> |-|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr 10510: //SNGT.B <ea> |A|012346|-|-***-|-----|D M+-WXZ |0101_111_111_mmm_rrr [SLE.B <ea>] 10511: //DBLE.W Dr,<label> |-|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} 10512: //DBNGT.W Dr,<label> |A|012346|-|-***-|-----| |0101_111_111_001_rrr-{offset} [DBLE.W Dr,<label>] 10513: //TRAPLE.W #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_010-{data} 10514: //TPLE.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10515: //TPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10516: //TRAPNGT.W #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_010-{data} [TRAPLE.W #<data>] 10517: //TRAPLE.L #<data> |-|--2346|-|-***-|-----| |0101_111_111_111_011-{data} 10518: //TPLE.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10519: //TPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10520: //TRAPNGT.L #<data> |A|--2346|-|-***-|-----| |0101_111_111_111_011-{data} [TRAPLE.L #<data>] 10521: //TRAPLE |-|--2346|-|-***-|-----| |0101_111_111_111_100 10522: //TPLE |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10523: //TPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10524: //TRAPNGT |A|--2346|-|-***-|-----| |0101_111_111_111_100 [TRAPLE] 10525: public static void irpSle () throws M68kException { 10526: int ea = XEiJ.regOC & 63; 10527: if (ea >> 3 == XEiJ.MMM_AR) { //DBLE.W Dr,<label> 10528: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { 10529: //条件が成立しているので通過 10530: XEiJ.mpuCycleCount += 12; 10531: XEiJ.regPC += 2; //オフセットを読み飛ばす 10532: } else { 10533: //条件が成立していないのでデクリメント 10534: int rrr = XEiJ.regOC & 7; 10535: int t = XEiJ.regRn[rrr]; 10536: if ((short) t == 0) { //Drの下位16bitが0なので通過 10537: XEiJ.mpuCycleCount += 14; 10538: XEiJ.regRn[rrr] = t + 65535; 10539: XEiJ.regPC += 2; //オフセットを読み飛ばす 10540: } else { //Drの下位16bitが0でないのでジャンプ 10541: XEiJ.mpuCycleCount += 10; 10542: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 10543: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 10544: } 10545: } 10546: if (M30_DIV_ZERO_V_FLAG) { 10547: m30DivZeroVFlag = !m30DivZeroVFlag; 10548: } 10549: } else if (ea < XEiJ.EA_AR) { //SLE.B Dr 10550: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //セット 10551: XEiJ.mpuCycleCount += 6; 10552: XEiJ.regRn[ea] |= 0xff; 10553: } else { //クリア 10554: XEiJ.mpuCycleCount += 4; 10555: XEiJ.regRn[ea] &= ~0xff; 10556: } 10557: } else if ((XEiJ.EAM_PW | XEiJ.EAM_PX | XEiJ.EAM_IM) << ea < 0L) { //TRAPLE.W/TRAPLE.L/TRAPLE 10558: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 10559: XEiJ.regPC += t; 10560: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { 10561: //条件が成立しているのでTRAPする 10562: XEiJ.mpuCycleCount += t << 1; 10563: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 10564: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 10565: throw M68kException.m6eSignal; 10566: } else { 10567: //条件が成立していないのでTRAPしない 10568: XEiJ.mpuCycleCount += 4 + (t << 1); 10569: } 10570: } else { //SLE.B <mem> 10571: XEiJ.mpuCycleCount += 8; 10572: XEiJ.busWb (efaMltByte (ea), XEiJ.MPU_CC_LE << XEiJ.regCCR >> 31); 10573: } 10574: } //irpSle 10575: 10576: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10577: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10578: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10579: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10580: //BRA.W <label> |-|012346|-|-----|-----| |0110_000_000_000_000-{offset} 10581: //JBRA.W <label> |A|012346|-|-----|-----| |0110_000_000_000_000-{offset} [BRA.W <label>] 10582: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) 10583: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_000_sss_sss (s is not equal to 0) [BRA.S <label>] 10584: public static void irpBrasw () throws M68kException { 10585: XEiJ.mpuCycleCount += 10; 10586: int t = XEiJ.regPC; //pc0+2 10587: int s = (byte) XEiJ.regOC; //オフセット 10588: if (s == 0) { //BRA.W 10589: XEiJ.regPC = t + 2; 10590: s = XEiJ.busRwse (t); //pcws 10591: } 10592: irpSetPC (t + s); //pc0+2+オフセット 10593: } //irpBrasw 10594: 10595: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10596: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10597: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10598: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10599: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_001_sss_sss 10600: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_001_sss_sss [BRA.S <label>] 10601: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10602: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10603: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10604: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10605: //BRA.S <label> |-|012346|-|-----|-----| |0110_000_010_sss_sss 10606: //JBRA.S <label> |A|012346|-|-----|-----| |0110_000_010_sss_sss [BRA.S <label>] 10607: public static void irpBras () throws M68kException { 10608: XEiJ.mpuCycleCount += 10; 10609: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10610: } //irpBras 10611: 10612: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10613: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10614: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10615: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10616: //BRA.S <label> |-|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) 10617: //JBRA.S <label> |A|--2346|-|-----|-----| |0110_000_011_sss_sss (s is not equal to 63) [BRA.S <label>] 10618: //BRA.L <label> |-|--2346|-|-----|-----| |0110_000_011_111_111-{offset} 10619: public static void irpBrasl () throws M68kException { 10620: int t = XEiJ.regPC; //pc0+2 10621: int s = (byte) XEiJ.regOC; //オフセット 10622: if (s == -1) { //BRA.L 10623: XEiJ.mpuCycleCount += 14; 10624: XEiJ.regPC = t + 4; 10625: s = XEiJ.busRlse (t); //pcls 10626: } else { //BRA.S 10627: XEiJ.mpuCycleCount += 10; 10628: } 10629: irpSetPC (t + s); //pc0+2+オフセット 10630: } //irpBrasl 10631: 10632: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10633: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10634: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10635: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10636: //BSR.W <label> |-|012346|-|-----|-----| |0110_000_100_000_000-{offset} 10637: //JBSR.W <label> |A|012346|-|-----|-----| |0110_000_100_000_000-{offset} [BSR.W <label>] 10638: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) 10639: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_100_sss_sss (s is not equal to 0) [BSR.S <label>] 10640: public static void irpBsrsw () throws M68kException { 10641: XEiJ.mpuCycleCount += 18; 10642: int t = XEiJ.regPC; //pc0+2 10643: int s = (byte) XEiJ.regOC; //オフセット 10644: if (s == 0) { //BSR.W 10645: XEiJ.regPC = t + 2; 10646: s = XEiJ.busRwse (t); //pcws 10647: } 10648: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 10649: irpSetPC (t + s); //pc0+2+オフセット 10650: } //irpBsrsw 10651: 10652: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10653: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10654: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10655: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10656: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_101_sss_sss 10657: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_101_sss_sss [BSR.S <label>] 10658: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10659: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10660: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10661: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10662: //BSR.S <label> |-|012346|-|-----|-----| |0110_000_110_sss_sss 10663: //JBSR.S <label> |A|012346|-|-----|-----| |0110_000_110_sss_sss [BSR.S <label>] 10664: public static void irpBsrs () throws M68kException { 10665: XEiJ.mpuCycleCount += 18; 10666: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 10667: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10668: } //irpBsrs 10669: 10670: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10671: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10672: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10673: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10674: //BSR.S <label> |-|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) 10675: //JBSR.S <label> |A|--2346|-|-----|-----| |0110_000_111_sss_sss (s is not equal to 63) [BSR.S <label>] 10676: //BSR.L <label> |-|--2346|-|-----|-----| |0110_000_111_111_111-{offset} 10677: public static void irpBsrsl () throws M68kException { 10678: int t = XEiJ.regPC; //pc0+2 10679: int s = (byte) XEiJ.regOC; //オフセット 10680: if (s == -1) { //BSR.L 10681: XEiJ.mpuCycleCount += 22; 10682: XEiJ.regPC = t + 4; 10683: s = XEiJ.busRlse (t); //pcls 10684: } else { //BSR.S 10685: XEiJ.mpuCycleCount += 18; 10686: } 10687: XEiJ.busWl (XEiJ.regRn[15] -= 4, XEiJ.regPC); //pushl 10688: irpSetPC (t + s); //pc0+2+オフセット 10689: } //irpBsrsl 10690: 10691: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10692: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10693: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10694: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10695: //BHI.W <label> |-|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} 10696: //BNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10697: //JBHI.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10698: //JBNLS.W <label> |A|012346|-|--*-*|-----| |0110_001_000_000_000-{offset} [BHI.W <label>] 10699: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) 10700: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10701: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10702: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_000_sss_sss (s is not equal to 0) [BHI.S <label>] 10703: //JBLS.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10704: //JBNHI.L <label> |A|012346|-|--*-*|-----| |0110_001_000_000_110-0100111011111001-{address} [BHI.S (*)+8;JMP <label>] 10705: public static void irpBhisw () throws M68kException { 10706: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //Bccでジャンプ 10707: XEiJ.mpuCycleCount += 10; 10708: int t = XEiJ.regPC; //pc0+2 10709: int s = (byte) XEiJ.regOC; //オフセット 10710: if (s == 0) { //Bcc.Wでジャンプ 10711: XEiJ.regPC = t + 2; 10712: s = XEiJ.busRwse (t); //pcws 10713: } 10714: irpSetPC (t + s); //pc0+2+オフセット 10715: } else if (XEiJ.regOC == 0x6200) { //Bcc.Wで通過 10716: XEiJ.mpuCycleCount += 12; 10717: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 10718: } else { //Bcc.Sで通過 10719: XEiJ.mpuCycleCount += 8; 10720: } 10721: } //irpBhisw 10722: 10723: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10724: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10725: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10726: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10727: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_001_sss_sss 10728: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10729: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10730: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_001_sss_sss [BHI.S <label>] 10731: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10732: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10733: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10734: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10735: //BHI.S <label> |-|012346|-|--*-*|-----| |0110_001_010_sss_sss 10736: //BNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10737: //JBHI.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10738: //JBNLS.S <label> |A|012346|-|--*-*|-----| |0110_001_010_sss_sss [BHI.S <label>] 10739: public static void irpBhis () throws M68kException { 10740: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //Bccでジャンプ 10741: XEiJ.mpuCycleCount += 10; 10742: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10743: } else { //Bcc.Sで通過 10744: XEiJ.mpuCycleCount += 8; 10745: } 10746: } //irpBhis 10747: 10748: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10749: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10750: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10751: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10752: //BHI.S <label> |-|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) 10753: //BNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10754: //JBHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10755: //JBNLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_011_sss_sss (s is not equal to 63) [BHI.S <label>] 10756: //BHI.L <label> |-|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} 10757: //BNLS.L <label> |A|--2346|-|--*-*|-----| |0110_001_011_111_111-{offset} [BHI.L <label>] 10758: public static void irpBhisl () throws M68kException { 10759: if (XEiJ.MPU_CC_HI << XEiJ.regCCR < 0) { //Bccでジャンプ 10760: int t = XEiJ.regPC; //pc0+2 10761: int s = (byte) XEiJ.regOC; //オフセット 10762: if (s == -1) { //Bcc.Lでジャンプ 10763: XEiJ.mpuCycleCount += 14; 10764: XEiJ.regPC = t + 4; 10765: s = XEiJ.busRlse (t); //pcls 10766: } else { //Bcc.Sでジャンプ 10767: XEiJ.mpuCycleCount += 10; 10768: } 10769: irpSetPC (t + s); //pc0+2+オフセット 10770: } else if (XEiJ.regOC == 0x62ff) { //Bcc.Lで通過 10771: XEiJ.mpuCycleCount += 12; 10772: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 10773: } else { //Bcc.Sで通過 10774: XEiJ.mpuCycleCount += 8; 10775: } 10776: } //irpBhisl 10777: 10778: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10779: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10780: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10781: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10782: //BLS.W <label> |-|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} 10783: //BNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10784: //JBLS.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10785: //JBNHI.W <label> |A|012346|-|--*-*|-----| |0110_001_100_000_000-{offset} [BLS.W <label>] 10786: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) 10787: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10788: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10789: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_100_sss_sss (s is not equal to 0) [BLS.S <label>] 10790: //JBHI.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10791: //JBNLS.L <label> |A|012346|-|--*-*|-----| |0110_001_100_000_110-0100111011111001-{address} [BLS.S (*)+8;JMP <label>] 10792: public static void irpBlssw () throws M68kException { 10793: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //Bccでジャンプ 10794: XEiJ.mpuCycleCount += 10; 10795: int t = XEiJ.regPC; //pc0+2 10796: int s = (byte) XEiJ.regOC; //オフセット 10797: if (s == 0) { //Bcc.Wでジャンプ 10798: XEiJ.regPC = t + 2; 10799: s = XEiJ.busRwse (t); //pcws 10800: } 10801: irpSetPC (t + s); //pc0+2+オフセット 10802: } else if (XEiJ.regOC == 0x6300) { //Bcc.Wで通過 10803: XEiJ.mpuCycleCount += 12; 10804: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 10805: } else { //Bcc.Sで通過 10806: XEiJ.mpuCycleCount += 8; 10807: } 10808: } //irpBlssw 10809: 10810: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10811: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10812: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10813: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10814: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_101_sss_sss 10815: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10816: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10817: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_101_sss_sss [BLS.S <label>] 10818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10819: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10820: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10821: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10822: //BLS.S <label> |-|012346|-|--*-*|-----| |0110_001_110_sss_sss 10823: //BNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10824: //JBLS.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10825: //JBNHI.S <label> |A|012346|-|--*-*|-----| |0110_001_110_sss_sss [BLS.S <label>] 10826: public static void irpBlss () throws M68kException { 10827: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //Bccでジャンプ 10828: XEiJ.mpuCycleCount += 10; 10829: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10830: } else { //Bcc.Sで通過 10831: XEiJ.mpuCycleCount += 8; 10832: } 10833: } //irpBlss 10834: 10835: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10836: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10837: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10838: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10839: //BLS.S <label> |-|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) 10840: //BNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10841: //JBLS.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10842: //JBNHI.S <label> |A|--2346|-|--*-*|-----| |0110_001_111_sss_sss (s is not equal to 63) [BLS.S <label>] 10843: //BLS.L <label> |-|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} 10844: //BNHI.L <label> |A|--2346|-|--*-*|-----| |0110_001_111_111_111-{offset} [BLS.L <label>] 10845: public static void irpBlssl () throws M68kException { 10846: if (XEiJ.MPU_CC_LS << XEiJ.regCCR < 0) { //Bccでジャンプ 10847: int t = XEiJ.regPC; //pc0+2 10848: int s = (byte) XEiJ.regOC; //オフセット 10849: if (s == -1) { //Bcc.Lでジャンプ 10850: XEiJ.mpuCycleCount += 14; 10851: XEiJ.regPC = t + 4; 10852: s = XEiJ.busRlse (t); //pcls 10853: } else { //Bcc.Sでジャンプ 10854: XEiJ.mpuCycleCount += 10; 10855: } 10856: irpSetPC (t + s); //pc0+2+オフセット 10857: } else if (XEiJ.regOC == 0x63ff) { //Bcc.Lで通過 10858: XEiJ.mpuCycleCount += 12; 10859: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 10860: } else { //Bcc.Sで通過 10861: XEiJ.mpuCycleCount += 8; 10862: } 10863: } //irpBlssl 10864: 10865: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10866: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10867: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10869: //BCC.W <label> |-|012346|-|----*|-----| |0110_010_000_000_000-{offset} 10870: //BHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10871: //BNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10872: //BNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10873: //JBCC.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10874: //JBHS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10875: //JBNCS.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10876: //JBNLO.W <label> |A|012346|-|----*|-----| |0110_010_000_000_000-{offset} [BCC.W <label>] 10877: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) 10878: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10879: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10880: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10881: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10882: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10883: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10884: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_000_sss_sss (s is not equal to 0) [BCC.S <label>] 10885: //JBCS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10886: //JBLO.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10887: //JBNCC.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10888: //JBNHS.L <label> |A|012346|-|----*|-----| |0110_010_000_000_110-0100111011111001-{address} [BCC.S (*)+8;JMP <label>] 10889: public static void irpBhssw () throws M68kException { 10890: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //Bccでジャンプ 10891: XEiJ.mpuCycleCount += 10; 10892: int t = XEiJ.regPC; //pc0+2 10893: int s = (byte) XEiJ.regOC; //オフセット 10894: if (s == 0) { //Bcc.Wでジャンプ 10895: XEiJ.regPC = t + 2; 10896: s = XEiJ.busRwse (t); //pcws 10897: } 10898: irpSetPC (t + s); //pc0+2+オフセット 10899: } else if (XEiJ.regOC == 0x6400) { //Bcc.Wで通過 10900: XEiJ.mpuCycleCount += 12; 10901: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 10902: } else { //Bcc.Sで通過 10903: XEiJ.mpuCycleCount += 8; 10904: } 10905: } //irpBhssw 10906: 10907: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10908: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10909: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10910: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10911: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_001_sss_sss 10912: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10913: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10914: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10915: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10916: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10917: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10918: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_001_sss_sss [BCC.S <label>] 10919: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10920: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10921: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10922: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10923: //BCC.S <label> |-|012346|-|----*|-----| |0110_010_010_sss_sss 10924: //BHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10925: //BNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10926: //BNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10927: //JBCC.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10928: //JBHS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10929: //JBNCS.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10930: //JBNLO.S <label> |A|012346|-|----*|-----| |0110_010_010_sss_sss [BCC.S <label>] 10931: public static void irpBhss () throws M68kException { 10932: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //Bccでジャンプ 10933: XEiJ.mpuCycleCount += 10; 10934: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 10935: } else { //Bcc.Sで通過 10936: XEiJ.mpuCycleCount += 8; 10937: } 10938: } //irpBhss 10939: 10940: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10941: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10942: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10943: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10944: //BCC.S <label> |-|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) 10945: //BHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10946: //BNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10947: //BNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10948: //JBCC.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10949: //JBHS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10950: //JBNCS.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10951: //JBNLO.S <label> |A|--2346|-|----*|-----| |0110_010_011_sss_sss (s is not equal to 63) [BCC.S <label>] 10952: //BCC.L <label> |-|--2346|-|----*|-----| |0110_010_011_111_111-{offset} 10953: //BHS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10954: //BNCS.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10955: //BNLO.L <label> |A|--2346|-|----*|-----| |0110_010_011_111_111-{offset} [BCC.L <label>] 10956: public static void irpBhssl () throws M68kException { 10957: if (XEiJ.MPU_CC_HS << XEiJ.regCCR < 0) { //Bccでジャンプ 10958: int t = XEiJ.regPC; //pc0+2 10959: int s = (byte) XEiJ.regOC; //オフセット 10960: if (s == -1) { //Bcc.Lでジャンプ 10961: XEiJ.mpuCycleCount += 14; 10962: XEiJ.regPC = t + 4; 10963: s = XEiJ.busRlse (t); //pcls 10964: } else { //Bcc.Sでジャンプ 10965: XEiJ.mpuCycleCount += 10; 10966: } 10967: irpSetPC (t + s); //pc0+2+オフセット 10968: } else if (XEiJ.regOC == 0x64ff) { //Bcc.Lで通過 10969: XEiJ.mpuCycleCount += 12; 10970: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 10971: } else { //Bcc.Sで通過 10972: XEiJ.mpuCycleCount += 8; 10973: } 10974: } //irpBhssl 10975: 10976: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10977: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 10978: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 10979: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 10980: //BCS.W <label> |-|012346|-|----*|-----| |0110_010_100_000_000-{offset} 10981: //BLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10982: //BNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10983: //BNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10984: //JBCS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10985: //JBLO.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10986: //JBNCC.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10987: //JBNHS.W <label> |A|012346|-|----*|-----| |0110_010_100_000_000-{offset} [BCS.W <label>] 10988: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) 10989: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10990: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10991: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10992: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10993: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10994: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10995: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_100_sss_sss (s is not equal to 0) [BCS.S <label>] 10996: //JBCC.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10997: //JBHS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10998: //JBNCS.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 10999: //JBNLO.L <label> |A|012346|-|----*|-----| |0110_010_100_000_110-0100111011111001-{address} [BCS.S (*)+8;JMP <label>] 11000: public static void irpBlosw () throws M68kException { 11001: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //Bccでジャンプ 11002: XEiJ.mpuCycleCount += 10; 11003: int t = XEiJ.regPC; //pc0+2 11004: int s = (byte) XEiJ.regOC; //オフセット 11005: if (s == 0) { //Bcc.Wでジャンプ 11006: XEiJ.regPC = t + 2; 11007: s = XEiJ.busRwse (t); //pcws 11008: } 11009: irpSetPC (t + s); //pc0+2+オフセット 11010: } else if (XEiJ.regOC == 0x6500) { //Bcc.Wで通過 11011: XEiJ.mpuCycleCount += 12; 11012: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11013: } else { //Bcc.Sで通過 11014: XEiJ.mpuCycleCount += 8; 11015: } 11016: } //irpBlosw 11017: 11018: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11019: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11020: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11021: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11022: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_101_sss_sss 11023: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11024: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11025: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11026: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11027: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11028: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11029: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_101_sss_sss [BCS.S <label>] 11030: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11031: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11032: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11033: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11034: //BCS.S <label> |-|012346|-|----*|-----| |0110_010_110_sss_sss 11035: //BLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11036: //BNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11037: //BNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11038: //JBCS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11039: //JBLO.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11040: //JBNCC.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11041: //JBNHS.S <label> |A|012346|-|----*|-----| |0110_010_110_sss_sss [BCS.S <label>] 11042: public static void irpBlos () throws M68kException { 11043: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //Bccでジャンプ 11044: XEiJ.mpuCycleCount += 10; 11045: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11046: } else { //Bcc.Sで通過 11047: XEiJ.mpuCycleCount += 8; 11048: } 11049: } //irpBlos 11050: 11051: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11052: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11053: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11054: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11055: //BCS.S <label> |-|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) 11056: //BLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11057: //BNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11058: //BNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11059: //JBCS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11060: //JBLO.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11061: //JBNCC.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11062: //JBNHS.S <label> |A|--2346|-|----*|-----| |0110_010_111_sss_sss (s is not equal to 63) [BCS.S <label>] 11063: //BCS.L <label> |-|--2346|-|----*|-----| |0110_010_111_111_111-{offset} 11064: //BLO.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11065: //BNCC.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11066: //BNHS.L <label> |A|--2346|-|----*|-----| |0110_010_111_111_111-{offset} [BCS.L <label>] 11067: public static void irpBlosl () throws M68kException { 11068: if (XEiJ.MPU_CC_LO << XEiJ.regCCR < 0) { //Bccでジャンプ 11069: int t = XEiJ.regPC; //pc0+2 11070: int s = (byte) XEiJ.regOC; //オフセット 11071: if (s == -1) { //Bcc.Lでジャンプ 11072: XEiJ.mpuCycleCount += 14; 11073: XEiJ.regPC = t + 4; 11074: s = XEiJ.busRlse (t); //pcls 11075: } else { //Bcc.Sでジャンプ 11076: XEiJ.mpuCycleCount += 10; 11077: } 11078: irpSetPC (t + s); //pc0+2+オフセット 11079: } else if (XEiJ.regOC == 0x65ff) { //Bcc.Lで通過 11080: XEiJ.mpuCycleCount += 12; 11081: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11082: } else { //Bcc.Sで通過 11083: XEiJ.mpuCycleCount += 8; 11084: } 11085: } //irpBlosl 11086: 11087: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11088: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11089: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11090: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11091: //BNE.W <label> |-|012346|-|--*--|-----| |0110_011_000_000_000-{offset} 11092: //BNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11093: //BNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11094: //BNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11095: //JBNE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11096: //JBNEQ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11097: //JBNZ.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11098: //JBNZE.W <label> |A|012346|-|--*--|-----| |0110_011_000_000_000-{offset} [BNE.W <label>] 11099: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) 11100: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11101: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11102: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11103: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11104: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11105: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11106: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_000_sss_sss (s is not equal to 0) [BNE.S <label>] 11107: //JBEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11108: //JBNEQ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11109: //JBNNE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11110: //JBNNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11111: //JBNZ.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11112: //JBNZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11113: //JBZE.L <label> |A|012346|-|--*--|-----| |0110_011_000_000_110-0100111011111001-{address} [BNE.S (*)+8;JMP <label>] 11114: public static void irpBnesw () throws M68kException { 11115: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //Bccでジャンプ 11116: XEiJ.mpuCycleCount += 10; 11117: int t = XEiJ.regPC; //pc0+2 11118: int s = (byte) XEiJ.regOC; //オフセット 11119: if (s == 0) { //Bcc.Wでジャンプ 11120: XEiJ.regPC = t + 2; 11121: s = XEiJ.busRwse (t); //pcws 11122: } 11123: irpSetPC (t + s); //pc0+2+オフセット 11124: } else if (XEiJ.regOC == 0x6600) { //Bcc.Wで通過 11125: XEiJ.mpuCycleCount += 12; 11126: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11127: } else { //Bcc.Sで通過 11128: XEiJ.mpuCycleCount += 8; 11129: } 11130: } //irpBnesw 11131: 11132: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11133: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11134: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11135: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11136: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_001_sss_sss 11137: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11138: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11139: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11140: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11141: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11142: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11143: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_001_sss_sss [BNE.S <label>] 11144: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11145: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11146: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11147: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11148: //BNE.S <label> |-|012346|-|--*--|-----| |0110_011_010_sss_sss 11149: //BNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11150: //BNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11151: //BNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11152: //JBNE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11153: //JBNEQ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11154: //JBNZ.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11155: //JBNZE.S <label> |A|012346|-|--*--|-----| |0110_011_010_sss_sss [BNE.S <label>] 11156: public static void irpBnes () throws M68kException { 11157: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //Bccでジャンプ 11158: XEiJ.mpuCycleCount += 10; 11159: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11160: } else { //Bcc.Sで通過 11161: XEiJ.mpuCycleCount += 8; 11162: } 11163: } //irpBnes 11164: 11165: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11166: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11167: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11168: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11169: //BNE.S <label> |-|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) 11170: //BNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11171: //BNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11172: //BNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11173: //JBNE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11174: //JBNEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11175: //JBNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11176: //JBNZE.S <label> |A|--2346|-|--*--|-----| |0110_011_011_sss_sss (s is not equal to 63) [BNE.S <label>] 11177: //BNE.L <label> |-|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} 11178: //BNEQ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11179: //BNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11180: //BNZE.L <label> |A|--2346|-|--*--|-----| |0110_011_011_111_111-{offset} [BNE.L <label>] 11181: public static void irpBnesl () throws M68kException { 11182: if (XEiJ.MPU_CC_NE << XEiJ.regCCR < 0) { //Bccでジャンプ 11183: int t = XEiJ.regPC; //pc0+2 11184: int s = (byte) XEiJ.regOC; //オフセット 11185: if (s == -1) { //Bcc.Lでジャンプ 11186: XEiJ.mpuCycleCount += 14; 11187: XEiJ.regPC = t + 4; 11188: s = XEiJ.busRlse (t); //pcls 11189: } else { //Bcc.Sでジャンプ 11190: XEiJ.mpuCycleCount += 10; 11191: } 11192: irpSetPC (t + s); //pc0+2+オフセット 11193: } else if (XEiJ.regOC == 0x66ff) { //Bcc.Lで通過 11194: XEiJ.mpuCycleCount += 12; 11195: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11196: } else { //Bcc.Sで通過 11197: XEiJ.mpuCycleCount += 8; 11198: } 11199: } //irpBnesl 11200: 11201: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11202: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11203: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11204: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11205: //BEQ.W <label> |-|012346|-|--*--|-----| |0110_011_100_000_000-{offset} 11206: //BNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11207: //BNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11208: //BZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11209: //JBEQ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11210: //JBNNE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11211: //JBNNZ.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11212: //JBZE.W <label> |A|012346|-|--*--|-----| |0110_011_100_000_000-{offset} [BEQ.W <label>] 11213: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) 11214: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11215: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11216: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11217: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11218: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11219: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11220: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_100_sss_sss (s is not equal to 0) [BEQ.S <label>] 11221: //JBNE.L <label> |A|012346|-|--*--|-----| |0110_011_100_000_110-0100111011111001-{address} [BEQ.S (*)+8;JMP <label>] 11222: public static void irpBeqsw () throws M68kException { 11223: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //Bccでジャンプ 11224: XEiJ.mpuCycleCount += 10; 11225: int t = XEiJ.regPC; //pc0+2 11226: int s = (byte) XEiJ.regOC; //オフセット 11227: if (s == 0) { //Bcc.Wでジャンプ 11228: XEiJ.regPC = t + 2; 11229: s = XEiJ.busRwse (t); //pcws 11230: } 11231: irpSetPC (t + s); //pc0+2+オフセット 11232: } else if (XEiJ.regOC == 0x6700) { //Bcc.Wで通過 11233: XEiJ.mpuCycleCount += 12; 11234: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11235: } else { //Bcc.Sで通過 11236: XEiJ.mpuCycleCount += 8; 11237: } 11238: } //irpBeqsw 11239: 11240: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11241: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11242: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11243: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11244: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_101_sss_sss 11245: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11246: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11247: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11248: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11249: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11250: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11251: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_101_sss_sss [BEQ.S <label>] 11252: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11253: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11254: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11255: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11256: //BEQ.S <label> |-|012346|-|--*--|-----| |0110_011_110_sss_sss 11257: //BNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11258: //BNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11259: //BZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11260: //JBEQ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11261: //JBNNE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11262: //JBNNZ.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11263: //JBZE.S <label> |A|012346|-|--*--|-----| |0110_011_110_sss_sss [BEQ.S <label>] 11264: public static void irpBeqs () throws M68kException { 11265: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //Bccでジャンプ 11266: XEiJ.mpuCycleCount += 10; 11267: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11268: } else { //Bcc.Sで通過 11269: XEiJ.mpuCycleCount += 8; 11270: } 11271: } //irpBeqs 11272: 11273: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11274: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11275: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11276: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11277: //BEQ.S <label> |-|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) 11278: //BNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11279: //BNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11280: //BZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11281: //JBEQ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11282: //JBNNE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11283: //JBNNZ.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11284: //JBZE.S <label> |A|--2346|-|--*--|-----| |0110_011_111_sss_sss (s is not equal to 63) [BEQ.S <label>] 11285: //BEQ.L <label> |-|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} 11286: //BNNE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11287: //BNNZ.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11288: //BZE.L <label> |A|--2346|-|--*--|-----| |0110_011_111_111_111-{offset} [BEQ.L <label>] 11289: public static void irpBeqsl () throws M68kException { 11290: if (XEiJ.MPU_CC_EQ << XEiJ.regCCR < 0) { //Bccでジャンプ 11291: int t = XEiJ.regPC; //pc0+2 11292: int s = (byte) XEiJ.regOC; //オフセット 11293: if (s == -1) { //Bcc.Lでジャンプ 11294: XEiJ.mpuCycleCount += 14; 11295: XEiJ.regPC = t + 4; 11296: s = XEiJ.busRlse (t); //pcls 11297: } else { //Bcc.Sでジャンプ 11298: XEiJ.mpuCycleCount += 10; 11299: } 11300: irpSetPC (t + s); //pc0+2+オフセット 11301: } else if (XEiJ.regOC == 0x67ff) { //Bcc.Lで通過 11302: XEiJ.mpuCycleCount += 12; 11303: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11304: } else { //Bcc.Sで通過 11305: XEiJ.mpuCycleCount += 8; 11306: } 11307: } //irpBeqsl 11308: 11309: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11310: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11311: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11312: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11313: //BVC.W <label> |-|012346|-|---*-|-----| |0110_100_000_000_000-{offset} 11314: //BNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11315: //JBNVS.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11316: //JBVC.W <label> |A|012346|-|---*-|-----| |0110_100_000_000_000-{offset} [BVC.W <label>] 11317: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) 11318: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11319: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11320: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_000_sss_sss (s is not equal to 0) [BVC.S <label>] 11321: //JBNVC.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11322: //JBVS.L <label> |A|012346|-|---*-|-----| |0110_100_000_000_110-0100111011111001-{address} [BVC.S (*)+8;JMP <label>] 11323: public static void irpBvcsw () throws M68kException { 11324: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //Bccでジャンプ 11325: XEiJ.mpuCycleCount += 10; 11326: int t = XEiJ.regPC; //pc0+2 11327: int s = (byte) XEiJ.regOC; //オフセット 11328: if (s == 0) { //Bcc.Wでジャンプ 11329: XEiJ.regPC = t + 2; 11330: s = XEiJ.busRwse (t); //pcws 11331: } 11332: irpSetPC (t + s); //pc0+2+オフセット 11333: } else if (XEiJ.regOC == 0x6800) { //Bcc.Wで通過 11334: XEiJ.mpuCycleCount += 12; 11335: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11336: } else { //Bcc.Sで通過 11337: XEiJ.mpuCycleCount += 8; 11338: } 11339: } //irpBvcsw 11340: 11341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11342: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11343: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11344: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11345: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_001_sss_sss 11346: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11347: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11348: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_001_sss_sss [BVC.S <label>] 11349: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11350: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11351: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11352: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11353: //BVC.S <label> |-|012346|-|---*-|-----| |0110_100_010_sss_sss 11354: //BNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11355: //JBNVS.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11356: //JBVC.S <label> |A|012346|-|---*-|-----| |0110_100_010_sss_sss [BVC.S <label>] 11357: public static void irpBvcs () throws M68kException { 11358: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //Bccでジャンプ 11359: XEiJ.mpuCycleCount += 10; 11360: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11361: } else { //Bcc.Sで通過 11362: XEiJ.mpuCycleCount += 8; 11363: } 11364: } //irpBvcs 11365: 11366: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11367: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11368: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11369: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11370: //BVC.S <label> |-|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) 11371: //BNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11372: //JBNVS.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11373: //JBVC.S <label> |A|--2346|-|---*-|-----| |0110_100_011_sss_sss (s is not equal to 63) [BVC.S <label>] 11374: //BVC.L <label> |-|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} 11375: //BNVS.L <label> |A|--2346|-|---*-|-----| |0110_100_011_111_111-{offset} [BVC.L <label>] 11376: public static void irpBvcsl () throws M68kException { 11377: if (XEiJ.MPU_CC_VC << XEiJ.regCCR < 0) { //Bccでジャンプ 11378: int t = XEiJ.regPC; //pc0+2 11379: int s = (byte) XEiJ.regOC; //オフセット 11380: if (s == -1) { //Bcc.Lでジャンプ 11381: XEiJ.mpuCycleCount += 14; 11382: XEiJ.regPC = t + 4; 11383: s = XEiJ.busRlse (t); //pcls 11384: } else { //Bcc.Sでジャンプ 11385: XEiJ.mpuCycleCount += 10; 11386: } 11387: irpSetPC (t + s); //pc0+2+オフセット 11388: } else if (XEiJ.regOC == 0x68ff) { //Bcc.Lで通過 11389: XEiJ.mpuCycleCount += 12; 11390: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11391: } else { //Bcc.Sで通過 11392: XEiJ.mpuCycleCount += 8; 11393: } 11394: } //irpBvcsl 11395: 11396: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11397: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11398: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11399: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11400: //BVS.W <label> |-|012346|-|---*-|-----| |0110_100_100_000_000-{offset} 11401: //BNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11402: //JBNVC.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11403: //JBVS.W <label> |A|012346|-|---*-|-----| |0110_100_100_000_000-{offset} [BVS.W <label>] 11404: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) 11405: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11406: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11407: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_100_sss_sss (s is not equal to 0) [BVS.S <label>] 11408: //JBNVS.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11409: //JBVC.L <label> |A|012346|-|---*-|-----| |0110_100_100_000_110-0100111011111001-{address} [BVS.S (*)+8;JMP <label>] 11410: public static void irpBvssw () throws M68kException { 11411: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //Bccでジャンプ 11412: XEiJ.mpuCycleCount += 10; 11413: int t = XEiJ.regPC; //pc0+2 11414: int s = (byte) XEiJ.regOC; //オフセット 11415: if (s == 0) { //Bcc.Wでジャンプ 11416: XEiJ.regPC = t + 2; 11417: s = XEiJ.busRwse (t); //pcws 11418: } 11419: irpSetPC (t + s); //pc0+2+オフセット 11420: } else if (XEiJ.regOC == 0x6900) { //Bcc.Wで通過 11421: XEiJ.mpuCycleCount += 12; 11422: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11423: } else { //Bcc.Sで通過 11424: XEiJ.mpuCycleCount += 8; 11425: } 11426: } //irpBvssw 11427: 11428: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11429: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11430: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11431: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11432: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_101_sss_sss 11433: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11434: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11435: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_101_sss_sss [BVS.S <label>] 11436: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11437: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11438: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11439: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11440: //BVS.S <label> |-|012346|-|---*-|-----| |0110_100_110_sss_sss 11441: //BNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11442: //JBNVC.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11443: //JBVS.S <label> |A|012346|-|---*-|-----| |0110_100_110_sss_sss [BVS.S <label>] 11444: public static void irpBvss () throws M68kException { 11445: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //Bccでジャンプ 11446: XEiJ.mpuCycleCount += 10; 11447: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11448: } else { //Bcc.Sで通過 11449: XEiJ.mpuCycleCount += 8; 11450: } 11451: } //irpBvss 11452: 11453: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11454: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11455: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11456: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11457: //BVS.S <label> |-|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) 11458: //BNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11459: //JBNVC.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11460: //JBVS.S <label> |A|--2346|-|---*-|-----| |0110_100_111_sss_sss (s is not equal to 63) [BVS.S <label>] 11461: //BVS.L <label> |-|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} 11462: //BNVC.L <label> |A|--2346|-|---*-|-----| |0110_100_111_111_111-{offset} [BVS.L <label>] 11463: public static void irpBvssl () throws M68kException { 11464: if (XEiJ.MPU_CC_VS << XEiJ.regCCR < 0) { //Bccでジャンプ 11465: int t = XEiJ.regPC; //pc0+2 11466: int s = (byte) XEiJ.regOC; //オフセット 11467: if (s == -1) { //Bcc.Lでジャンプ 11468: XEiJ.mpuCycleCount += 14; 11469: XEiJ.regPC = t + 4; 11470: s = XEiJ.busRlse (t); //pcls 11471: } else { //Bcc.Sでジャンプ 11472: XEiJ.mpuCycleCount += 10; 11473: } 11474: irpSetPC (t + s); //pc0+2+オフセット 11475: } else if (XEiJ.regOC == 0x69ff) { //Bcc.Lで通過 11476: XEiJ.mpuCycleCount += 12; 11477: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11478: } else { //Bcc.Sで通過 11479: XEiJ.mpuCycleCount += 8; 11480: } 11481: } //irpBvssl 11482: 11483: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11484: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11485: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11486: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11487: //BPL.W <label> |-|012346|-|-*---|-----| |0110_101_000_000_000-{offset} 11488: //BNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11489: //JBNMI.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11490: //JBPL.W <label> |A|012346|-|-*---|-----| |0110_101_000_000_000-{offset} [BPL.W <label>] 11491: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) 11492: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11493: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11494: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_000_sss_sss (s is not equal to 0) [BPL.S <label>] 11495: //JBMI.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11496: //JBNPL.L <label> |A|012346|-|-*---|-----| |0110_101_000_000_110-0100111011111001-{address} [BPL.S (*)+8;JMP <label>] 11497: public static void irpBplsw () throws M68kException { 11498: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //Bccでジャンプ 11499: XEiJ.mpuCycleCount += 10; 11500: int t = XEiJ.regPC; //pc0+2 11501: int s = (byte) XEiJ.regOC; //オフセット 11502: if (s == 0) { //Bcc.Wでジャンプ 11503: XEiJ.regPC = t + 2; 11504: s = XEiJ.busRwse (t); //pcws 11505: } 11506: irpSetPC (t + s); //pc0+2+オフセット 11507: } else if (XEiJ.regOC == 0x6a00) { //Bcc.Wで通過 11508: XEiJ.mpuCycleCount += 12; 11509: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11510: } else { //Bcc.Sで通過 11511: XEiJ.mpuCycleCount += 8; 11512: } 11513: } //irpBplsw 11514: 11515: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11516: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11517: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11518: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11519: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_001_sss_sss 11520: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11521: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11522: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_001_sss_sss [BPL.S <label>] 11523: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11524: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11525: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11526: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11527: //BPL.S <label> |-|012346|-|-*---|-----| |0110_101_010_sss_sss 11528: //BNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11529: //JBNMI.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11530: //JBPL.S <label> |A|012346|-|-*---|-----| |0110_101_010_sss_sss [BPL.S <label>] 11531: public static void irpBpls () throws M68kException { 11532: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //Bccでジャンプ 11533: XEiJ.mpuCycleCount += 10; 11534: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11535: } else { //Bcc.Sで通過 11536: XEiJ.mpuCycleCount += 8; 11537: } 11538: } //irpBpls 11539: 11540: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11541: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11542: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11543: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11544: //BPL.S <label> |-|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) 11545: //BNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11546: //JBNMI.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11547: //JBPL.S <label> |A|--2346|-|-*---|-----| |0110_101_011_sss_sss (s is not equal to 63) [BPL.S <label>] 11548: //BPL.L <label> |-|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} 11549: //BNMI.L <label> |A|--2346|-|-*---|-----| |0110_101_011_111_111-{offset} [BPL.L <label>] 11550: public static void irpBplsl () throws M68kException { 11551: if (XEiJ.MPU_CC_PL << XEiJ.regCCR < 0) { //Bccでジャンプ 11552: int t = XEiJ.regPC; //pc0+2 11553: int s = (byte) XEiJ.regOC; //オフセット 11554: if (s == -1) { //Bcc.Lでジャンプ 11555: XEiJ.mpuCycleCount += 14; 11556: XEiJ.regPC = t + 4; 11557: s = XEiJ.busRlse (t); //pcls 11558: } else { //Bcc.Sでジャンプ 11559: XEiJ.mpuCycleCount += 10; 11560: } 11561: irpSetPC (t + s); //pc0+2+オフセット 11562: } else if (XEiJ.regOC == 0x6aff) { //Bcc.Lで通過 11563: XEiJ.mpuCycleCount += 12; 11564: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11565: } else { //Bcc.Sで通過 11566: XEiJ.mpuCycleCount += 8; 11567: } 11568: } //irpBplsl 11569: 11570: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11571: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11572: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11573: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11574: //BMI.W <label> |-|012346|-|-*---|-----| |0110_101_100_000_000-{offset} 11575: //BNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11576: //JBMI.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11577: //JBNPL.W <label> |A|012346|-|-*---|-----| |0110_101_100_000_000-{offset} [BMI.W <label>] 11578: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) 11579: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11580: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11581: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_100_sss_sss (s is not equal to 0) [BMI.S <label>] 11582: //JBNMI.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11583: //JBPL.L <label> |A|012346|-|-*---|-----| |0110_101_100_000_110-0100111011111001-{address} [BMI.S (*)+8;JMP <label>] 11584: public static void irpBmisw () throws M68kException { 11585: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //Bccでジャンプ 11586: XEiJ.mpuCycleCount += 10; 11587: int t = XEiJ.regPC; //pc0+2 11588: int s = (byte) XEiJ.regOC; //オフセット 11589: if (s == 0) { //Bcc.Wでジャンプ 11590: XEiJ.regPC = t + 2; 11591: s = XEiJ.busRwse (t); //pcws 11592: } 11593: irpSetPC (t + s); //pc0+2+オフセット 11594: } else if (XEiJ.regOC == 0x6b00) { //Bcc.Wで通過 11595: XEiJ.mpuCycleCount += 12; 11596: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11597: } else { //Bcc.Sで通過 11598: XEiJ.mpuCycleCount += 8; 11599: } 11600: } //irpBmisw 11601: 11602: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11603: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11604: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11605: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11606: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_101_sss_sss 11607: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11608: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11609: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_101_sss_sss [BMI.S <label>] 11610: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11611: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11612: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11613: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11614: //BMI.S <label> |-|012346|-|-*---|-----| |0110_101_110_sss_sss 11615: //BNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11616: //JBMI.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11617: //JBNPL.S <label> |A|012346|-|-*---|-----| |0110_101_110_sss_sss [BMI.S <label>] 11618: public static void irpBmis () throws M68kException { 11619: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //Bccでジャンプ 11620: XEiJ.mpuCycleCount += 10; 11621: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11622: } else { //Bcc.Sで通過 11623: XEiJ.mpuCycleCount += 8; 11624: } 11625: } //irpBmis 11626: 11627: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11628: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11629: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11630: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11631: //BMI.S <label> |-|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) 11632: //BNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11633: //JBMI.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11634: //JBNPL.S <label> |A|--2346|-|-*---|-----| |0110_101_111_sss_sss (s is not equal to 63) [BMI.S <label>] 11635: //BMI.L <label> |-|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} 11636: //BNPL.L <label> |A|--2346|-|-*---|-----| |0110_101_111_111_111-{offset} [BMI.L <label>] 11637: public static void irpBmisl () throws M68kException { 11638: if (XEiJ.MPU_CC_MI << XEiJ.regCCR < 0) { //Bccでジャンプ 11639: int t = XEiJ.regPC; //pc0+2 11640: int s = (byte) XEiJ.regOC; //オフセット 11641: if (s == -1) { //Bcc.Lでジャンプ 11642: XEiJ.mpuCycleCount += 14; 11643: XEiJ.regPC = t + 4; 11644: s = XEiJ.busRlse (t); //pcls 11645: } else { //Bcc.Sでジャンプ 11646: XEiJ.mpuCycleCount += 10; 11647: } 11648: irpSetPC (t + s); //pc0+2+オフセット 11649: } else if (XEiJ.regOC == 0x6bff) { //Bcc.Lで通過 11650: XEiJ.mpuCycleCount += 12; 11651: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11652: } else { //Bcc.Sで通過 11653: XEiJ.mpuCycleCount += 8; 11654: } 11655: } //irpBmisl 11656: 11657: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11658: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11659: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11660: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11661: //BGE.W <label> |-|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} 11662: //BNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11663: //JBGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11664: //JBNLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_000-{offset} [BGE.W <label>] 11665: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) 11666: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11667: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11668: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_000_sss_sss (s is not equal to 0) [BGE.S <label>] 11669: //JBLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11670: //JBNGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_000_000_110-0100111011111001-{address} [BGE.S (*)+8;JMP <label>] 11671: public static void irpBgesw () throws M68kException { 11672: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //Bccでジャンプ 11673: XEiJ.mpuCycleCount += 10; 11674: int t = XEiJ.regPC; //pc0+2 11675: int s = (byte) XEiJ.regOC; //オフセット 11676: if (s == 0) { //Bcc.Wでジャンプ 11677: XEiJ.regPC = t + 2; 11678: s = XEiJ.busRwse (t); //pcws 11679: } 11680: irpSetPC (t + s); //pc0+2+オフセット 11681: } else if (XEiJ.regOC == 0x6c00) { //Bcc.Wで通過 11682: XEiJ.mpuCycleCount += 12; 11683: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11684: } else { //Bcc.Sで通過 11685: XEiJ.mpuCycleCount += 8; 11686: } 11687: } //irpBgesw 11688: 11689: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11690: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11691: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11692: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11693: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_001_sss_sss 11694: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11695: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11696: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_001_sss_sss [BGE.S <label>] 11697: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11698: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11699: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11700: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11701: //BGE.S <label> |-|012346|-|-*-*-|-----| |0110_110_010_sss_sss 11702: //BNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11703: //JBGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11704: //JBNLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_010_sss_sss [BGE.S <label>] 11705: public static void irpBges () throws M68kException { 11706: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //Bccでジャンプ 11707: XEiJ.mpuCycleCount += 10; 11708: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11709: } else { //Bcc.Sで通過 11710: XEiJ.mpuCycleCount += 8; 11711: } 11712: } //irpBges 11713: 11714: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11715: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11716: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11717: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11718: //BGE.S <label> |-|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) 11719: //BNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11720: //JBGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11721: //JBNLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_011_sss_sss (s is not equal to 63) [BGE.S <label>] 11722: //BGE.L <label> |-|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} 11723: //BNLT.L <label> |A|--2346|-|-*-*-|-----| |0110_110_011_111_111-{offset} [BGE.L <label>] 11724: public static void irpBgesl () throws M68kException { 11725: if (XEiJ.MPU_CC_GE << XEiJ.regCCR < 0) { //Bccでジャンプ 11726: int t = XEiJ.regPC; //pc0+2 11727: int s = (byte) XEiJ.regOC; //オフセット 11728: if (s == -1) { //Bcc.Lでジャンプ 11729: XEiJ.mpuCycleCount += 14; 11730: XEiJ.regPC = t + 4; 11731: s = XEiJ.busRlse (t); //pcls 11732: } else { //Bcc.Sでジャンプ 11733: XEiJ.mpuCycleCount += 10; 11734: } 11735: irpSetPC (t + s); //pc0+2+オフセット 11736: } else if (XEiJ.regOC == 0x6cff) { //Bcc.Lで通過 11737: XEiJ.mpuCycleCount += 12; 11738: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11739: } else { //Bcc.Sで通過 11740: XEiJ.mpuCycleCount += 8; 11741: } 11742: } //irpBgesl 11743: 11744: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11745: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11746: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11747: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11748: //BLT.W <label> |-|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} 11749: //BNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11750: //JBLT.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11751: //JBNGE.W <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_000-{offset} [BLT.W <label>] 11752: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) 11753: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11754: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11755: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_100_sss_sss (s is not equal to 0) [BLT.S <label>] 11756: //JBGE.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11757: //JBNLT.L <label> |A|012346|-|-*-*-|-----| |0110_110_100_000_110-0100111011111001-{address} [BLT.S (*)+8;JMP <label>] 11758: public static void irpBltsw () throws M68kException { 11759: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //Bccでジャンプ 11760: XEiJ.mpuCycleCount += 10; 11761: int t = XEiJ.regPC; //pc0+2 11762: int s = (byte) XEiJ.regOC; //オフセット 11763: if (s == 0) { //Bcc.Wでジャンプ 11764: XEiJ.regPC = t + 2; 11765: s = XEiJ.busRwse (t); //pcws 11766: } 11767: irpSetPC (t + s); //pc0+2+オフセット 11768: } else if (XEiJ.regOC == 0x6d00) { //Bcc.Wで通過 11769: XEiJ.mpuCycleCount += 12; 11770: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11771: } else { //Bcc.Sで通過 11772: XEiJ.mpuCycleCount += 8; 11773: } 11774: } //irpBltsw 11775: 11776: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11777: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11778: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11779: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11780: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_101_sss_sss 11781: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11782: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11783: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_101_sss_sss [BLT.S <label>] 11784: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11785: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11786: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11787: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11788: //BLT.S <label> |-|012346|-|-*-*-|-----| |0110_110_110_sss_sss 11789: //BNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11790: //JBLT.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11791: //JBNGE.S <label> |A|012346|-|-*-*-|-----| |0110_110_110_sss_sss [BLT.S <label>] 11792: public static void irpBlts () throws M68kException { 11793: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //Bccでジャンプ 11794: XEiJ.mpuCycleCount += 10; 11795: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11796: } else { //Bcc.Sで通過 11797: XEiJ.mpuCycleCount += 8; 11798: } 11799: } //irpBlts 11800: 11801: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11802: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11803: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11804: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11805: //BLT.S <label> |-|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) 11806: //BNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11807: //JBLT.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11808: //JBNGE.S <label> |A|--2346|-|-*-*-|-----| |0110_110_111_sss_sss (s is not equal to 63) [BLT.S <label>] 11809: //BLT.L <label> |-|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} 11810: //BNGE.L <label> |A|--2346|-|-*-*-|-----| |0110_110_111_111_111-{offset} [BLT.L <label>] 11811: public static void irpBltsl () throws M68kException { 11812: if (XEiJ.MPU_CC_LT << XEiJ.regCCR < 0) { //Bccでジャンプ 11813: int t = XEiJ.regPC; //pc0+2 11814: int s = (byte) XEiJ.regOC; //オフセット 11815: if (s == -1) { //Bcc.Lでジャンプ 11816: XEiJ.mpuCycleCount += 14; 11817: XEiJ.regPC = t + 4; 11818: s = XEiJ.busRlse (t); //pcls 11819: } else { //Bcc.Sでジャンプ 11820: XEiJ.mpuCycleCount += 10; 11821: } 11822: irpSetPC (t + s); //pc0+2+オフセット 11823: } else if (XEiJ.regOC == 0x6dff) { //Bcc.Lで通過 11824: XEiJ.mpuCycleCount += 12; 11825: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11826: } else { //Bcc.Sで通過 11827: XEiJ.mpuCycleCount += 8; 11828: } 11829: } //irpBltsl 11830: 11831: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11832: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11833: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11834: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11835: //BGT.W <label> |-|012346|-|-***-|-----| |0110_111_000_000_000-{offset} 11836: //BNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11837: //JBGT.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11838: //JBNLE.W <label> |A|012346|-|-***-|-----| |0110_111_000_000_000-{offset} [BGT.W <label>] 11839: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) 11840: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11841: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11842: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_000_sss_sss (s is not equal to 0) [BGT.S <label>] 11843: //JBLE.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11844: //JBNGT.L <label> |A|012346|-|-***-|-----| |0110_111_000_000_110-0100111011111001-{address} [BGT.S (*)+8;JMP <label>] 11845: public static void irpBgtsw () throws M68kException { 11846: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //Bccでジャンプ 11847: XEiJ.mpuCycleCount += 10; 11848: int t = XEiJ.regPC; //pc0+2 11849: int s = (byte) XEiJ.regOC; //オフセット 11850: if (s == 0) { //Bcc.Wでジャンプ 11851: XEiJ.regPC = t + 2; 11852: s = XEiJ.busRwse (t); //pcws 11853: } 11854: irpSetPC (t + s); //pc0+2+オフセット 11855: } else if (XEiJ.regOC == 0x6e00) { //Bcc.Wで通過 11856: XEiJ.mpuCycleCount += 12; 11857: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11858: } else { //Bcc.Sで通過 11859: XEiJ.mpuCycleCount += 8; 11860: } 11861: } //irpBgtsw 11862: 11863: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11864: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11865: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11866: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11867: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_001_sss_sss 11868: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11869: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11870: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_001_sss_sss [BGT.S <label>] 11871: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11872: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11873: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11874: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11875: //BGT.S <label> |-|012346|-|-***-|-----| |0110_111_010_sss_sss 11876: //BNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11877: //JBGT.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11878: //JBNLE.S <label> |A|012346|-|-***-|-----| |0110_111_010_sss_sss [BGT.S <label>] 11879: public static void irpBgts () throws M68kException { 11880: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //Bccでジャンプ 11881: XEiJ.mpuCycleCount += 10; 11882: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11883: } else { //Bcc.Sで通過 11884: XEiJ.mpuCycleCount += 8; 11885: } 11886: } //irpBgts 11887: 11888: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11889: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11890: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11891: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11892: //BGT.S <label> |-|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) 11893: //BNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11894: //JBGT.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11895: //JBNLE.S <label> |A|--2346|-|-***-|-----| |0110_111_011_sss_sss (s is not equal to 63) [BGT.S <label>] 11896: //BGT.L <label> |-|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} 11897: //BNLE.L <label> |A|--2346|-|-***-|-----| |0110_111_011_111_111-{offset} [BGT.L <label>] 11898: public static void irpBgtsl () throws M68kException { 11899: if (XEiJ.MPU_CC_GT << XEiJ.regCCR < 0) { //Bccでジャンプ 11900: int t = XEiJ.regPC; //pc0+2 11901: int s = (byte) XEiJ.regOC; //オフセット 11902: if (s == -1) { //Bcc.Lでジャンプ 11903: XEiJ.mpuCycleCount += 14; 11904: XEiJ.regPC = t + 4; 11905: s = XEiJ.busRlse (t); //pcls 11906: } else { //Bcc.Sでジャンプ 11907: XEiJ.mpuCycleCount += 10; 11908: } 11909: irpSetPC (t + s); //pc0+2+オフセット 11910: } else if (XEiJ.regOC == 0x6eff) { //Bcc.Lで通過 11911: XEiJ.mpuCycleCount += 12; 11912: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 11913: } else { //Bcc.Sで通過 11914: XEiJ.mpuCycleCount += 8; 11915: } 11916: } //irpBgtsl 11917: 11918: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11919: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11920: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11922: //BLE.W <label> |-|012346|-|-***-|-----| |0110_111_100_000_000-{offset} 11923: //BNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11924: //JBLE.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11925: //JBNGT.W <label> |A|012346|-|-***-|-----| |0110_111_100_000_000-{offset} [BLE.W <label>] 11926: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) 11927: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11928: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11929: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_100_sss_sss (s is not equal to 0) [BLE.S <label>] 11930: //JBGT.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 11931: //JBNLE.L <label> |A|012346|-|-***-|-----| |0110_111_100_000_110-0100111011111001-{address} [BLE.S (*)+8;JMP <label>] 11932: public static void irpBlesw () throws M68kException { 11933: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //Bccでジャンプ 11934: XEiJ.mpuCycleCount += 10; 11935: int t = XEiJ.regPC; //pc0+2 11936: int s = (byte) XEiJ.regOC; //オフセット 11937: if (s == 0) { //Bcc.Wでジャンプ 11938: XEiJ.regPC = t + 2; 11939: s = XEiJ.busRwse (t); //pcws 11940: } 11941: irpSetPC (t + s); //pc0+2+オフセット 11942: } else if (XEiJ.regOC == 0x6f00) { //Bcc.Wで通過 11943: XEiJ.mpuCycleCount += 12; 11944: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 11945: } else { //Bcc.Sで通過 11946: XEiJ.mpuCycleCount += 8; 11947: } 11948: } //irpBlesw 11949: 11950: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11951: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11952: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11953: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11954: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_101_sss_sss 11955: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11956: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11957: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_101_sss_sss [BLE.S <label>] 11958: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11959: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11960: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11961: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11962: //BLE.S <label> |-|012346|-|-***-|-----| |0110_111_110_sss_sss 11963: //BNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11964: //JBLE.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11965: //JBNGT.S <label> |A|012346|-|-***-|-----| |0110_111_110_sss_sss [BLE.S <label>] 11966: public static void irpBles () throws M68kException { 11967: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //Bccでジャンプ 11968: XEiJ.mpuCycleCount += 10; 11969: irpSetPC (XEiJ.regPC + (byte) XEiJ.regOC); //pc0+2+オフセット 11970: } else { //Bcc.Sで通過 11971: XEiJ.mpuCycleCount += 8; 11972: } 11973: } //irpBles 11974: 11975: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11976: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 11977: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 11978: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 11979: //BLE.S <label> |-|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) 11980: //BNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11981: //JBLE.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11982: //JBNGT.S <label> |A|--2346|-|-***-|-----| |0110_111_111_sss_sss (s is not equal to 63) [BLE.S <label>] 11983: //BLE.L <label> |-|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} 11984: //BNGT.L <label> |A|--2346|-|-***-|-----| |0110_111_111_111_111-{offset} [BLE.L <label>] 11985: public static void irpBlesl () throws M68kException { 11986: if (XEiJ.MPU_CC_LE << XEiJ.regCCR < 0) { //Bccでジャンプ 11987: int t = XEiJ.regPC; //pc0+2 11988: int s = (byte) XEiJ.regOC; //オフセット 11989: if (s == -1) { //Bcc.Lでジャンプ 11990: XEiJ.mpuCycleCount += 14; 11991: XEiJ.regPC = t + 4; 11992: s = XEiJ.busRlse (t); //pcls 11993: } else { //Bcc.Sでジャンプ 11994: XEiJ.mpuCycleCount += 10; 11995: } 11996: irpSetPC (t + s); //pc0+2+オフセット 11997: } else if (XEiJ.regOC == 0x6fff) { //Bcc.Lで通過 11998: XEiJ.mpuCycleCount += 12; 11999: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 12000: } else { //Bcc.Sで通過 12001: XEiJ.mpuCycleCount += 8; 12002: } 12003: } //irpBlesl 12004: 12005: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12006: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12007: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12009: //IOCS <name> |A|012346|-|UUUUU|UUUUU| |0111_000_0dd_ddd_ddd-0100111001001111 [MOVEQ.L #<data>,D0;TRAP #15] 12010: //MOVEQ.L #<data>,Dq |-|012346|-|-UUUU|-**00| |0111_qqq_0dd_ddd_ddd 12011: public static void irpMoveq () throws M68kException { 12012: XEiJ.mpuCycleCount += 4; 12013: int z; 12014: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = (byte) XEiJ.regOC; 12015: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12016: } //irpMoveq 12017: 12018: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12019: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12020: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12021: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12022: //MVS.B <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_100_mmm_rrr (ISA_B) 12023: // 12024: //MVS.B <ea>,Dq 12025: // バイトデータをロングに符号拡張してDqの全体を更新する 12026: public static void irpMvsByte () throws M68kException { 12027: XEiJ.mpuCycleCount += 4; 12028: int ea = XEiJ.regOC & 63; 12029: int z; 12030: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 12031: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12032: } //irpMvsByte 12033: 12034: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12035: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12036: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12037: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12038: //MVS.W <ea>,Dq |-|------|-|-UUUU|-**00|D M+-WXZPI|0111_qqq_101_mmm_rrr (ISA_B) 12039: // 12040: //MVS.W <ea>,Dq 12041: // ワードデータをロングに符号拡張してDqの全体を更新する 12042: public static void irpMvsWord () throws M68kException { 12043: XEiJ.mpuCycleCount += 4; 12044: int ea = XEiJ.regOC & 63; 12045: int z; 12046: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); 12047: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12048: } //irpMvsWord 12049: 12050: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12051: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12052: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12053: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12054: //MVZ.B <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_110_mmm_rrr (ISA_B) 12055: // 12056: //MVZ.B <ea>,Dq 12057: // バイトデータをロングにゼロ拡張してDqの全体を更新する 12058: public static void irpMvzByte () throws M68kException { 12059: XEiJ.mpuCycleCount += 4; 12060: int ea = XEiJ.regOC & 63; 12061: int z; 12062: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? 0xff & XEiJ.regRn[ea] : XEiJ.busRbz (efaAnyByte (ea)); 12063: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12064: } //irpMvzByte 12065: 12066: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12067: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12068: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12069: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12070: //MVZ.W <ea>,Dq |-|------|-|-UUUU|-0*00|D M+-WXZPI|0111_qqq_111_mmm_rrr (ISA_B) 12071: // 12072: //MVZ.W <ea>,Dq 12073: // ワードデータをロングにゼロ拡張してDqの全体を更新する 12074: public static void irpMvzWord () throws M68kException { 12075: XEiJ.mpuCycleCount += 4; 12076: int ea = XEiJ.regOC & 63; 12077: int z; 12078: XEiJ.regRn[XEiJ.regOC >> 9 & 7] = z = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea)); 12079: XEiJ.regCCR = XEiJ.REG_CCR_X & XEiJ.regCCR | (z == 0 ? XEiJ.REG_CCR_Z : 0); 12080: } //irpMvzWord 12081: 12082: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12083: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12084: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12085: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12086: //OR.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_000_mmm_rrr 12087: public static void irpOrToRegByte () throws M68kException { 12088: XEiJ.mpuCycleCount += 4; 12089: int ea = XEiJ.regOC & 63; 12090: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= 255 & (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea))))]; //ccr_tst_byte。0拡張してからOR 12091: } //irpOrToRegByte 12092: 12093: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12094: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12095: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12096: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12097: //OR.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_001_mmm_rrr 12098: public static void irpOrToRegWord () throws M68kException { 12099: XEiJ.mpuCycleCount += 4; 12100: int ea = XEiJ.regOC & 63; 12101: int z = (short) (XEiJ.regRn[XEiJ.regOC >> 9 & 7] |= ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea))); //0拡張してからOR 12102: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12103: } //irpOrToRegWord 12104: 12105: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12106: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12107: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12108: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12109: //OR.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1000_qqq_010_mmm_rrr 12110: public static void irpOrToRegLong () throws M68kException { 12111: int ea = XEiJ.regOC & 63; 12112: int qqq = XEiJ.regOC >> 9 & 7; 12113: int z; 12114: if (ea < XEiJ.EA_AR) { //OR.L Dr,Dq 12115: XEiJ.mpuCycleCount += 8; 12116: XEiJ.regRn[qqq] = z = XEiJ.regRn[qqq] | XEiJ.regRn[ea]; 12117: } else { //OR.L <mem>,Dq 12118: XEiJ.mpuCycleCount += ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 12119: XEiJ.regRn[qqq] = z = XEiJ.regRn[qqq] | XEiJ.busRls (efaAnyLong (ea)); 12120: } 12121: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12122: } //irpOrToRegLong 12123: 12124: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12125: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12126: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12127: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12128: //DIVU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_011_mmm_rrr 12129: // 12130: //DIVU.W <ea>,Dq 12131: // M68000PRMでDIVU.Wのオーバーフローの条件が16bit符号あり整数と書かれているのは16bit符号なし整数の間違い 12132: public static void irpDivuWord () throws M68kException { 12133: // X 変化しない 12134: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12135: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12136: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12137: // C 常にクリア 12138: XEiJ.mpuCycleCount += 140; //最大 12139: int ea = XEiJ.regOC & 63; 12140: int qqq = XEiJ.regOC >> 9 & 7; 12141: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea)); //除数 12142: int x = XEiJ.regRn[qqq]; //被除数 12143: if (y == 0) { //ゼロ除算 12144: //Dqは変化しない 12145: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12146: (x < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 12147: (x >> 16 == 0 ? XEiJ.REG_CCR_Z : 0) | //Zは被除数が$0000xxxxのときセット、さもなくばクリア 12148: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 12149: ); //Cは常にクリア 12150: XEiJ.mpuCycleCount += 38 - 140 - 34; 12151: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 12152: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12153: throw M68kException.m6eSignal; 12154: } 12155: //無理にintで符号なし除算をやろうとするよりもdoubleにキャストしてから割ったほうが速い 12156: // intの除算をdoubleの除算器で行うプロセッサならばなおさら 12157: //被除数を符号なし32ビットとみなすためlongを経由してdoubleに変換する 12158: //doubleからlongやintへのキャストは小数点以下が切り捨てられ、オーバーフローは表現できる絶対値最大の値になる 12159: //doubleから直接intに戻しているので0xffffffff/0x0001=0xffffffffが絶対値最大の0x7fffffffになってしまうが、 12160: //DIVU.Wではオーバーフローになることに変わりはないのでよいことにする 12161: // 符号なし32ビットの0xffffffffにしたいときは戻すときもlongを経由すればよい 12162: int z = (int) ((double) ((long) x & 0xffffffffL) / (double) y); //商 12163: if (z >>> 16 != 0) { //オーバーフローあり 12164: //Dqは変化しない 12165: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12166: (x < 0 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が負のときセット、さもなくばクリア 12167: //Zは常にクリア 12168: XEiJ.REG_CCR_V //Vは常にセット 12169: ); //Cは常にクリア 12170: } else { //オーバーフローなし 12171: XEiJ.regRn[qqq] = x - y * z << 16 | z; //余り<<16|商 12172: z = (short) z; 12173: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12174: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12175: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12176: //Vは常にクリア 12177: ); //Cは常にクリア 12178: } //if オーバーフローあり/オーバーフローなし 12179: if (M30_DIV_ZERO_V_FLAG) { 12180: m30DivZeroVFlag = false; 12181: } 12182: } //irpDivuWord 12183: 12184: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12185: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12186: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12187: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12188: //SBCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_000_rrr 12189: //SBCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1000_qqq_100_001_rrr 12190: //OR.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_100_mmm_rrr 12191: public static void irpOrToMemByte () throws M68kException { 12192: int ea = XEiJ.regOC & 63; 12193: if (ea >= XEiJ.EA_MM) { //OR.B Dq,<ea> 12194: XEiJ.mpuCycleCount += 8; 12195: int a = efaMltByte (ea); 12196: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRbs (a); 12197: XEiJ.busWb (a, z); 12198: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12199: } else if (ea < XEiJ.EA_AR) { //SBCD.B Dr,Dq 12200: int qqq = XEiJ.regOC >> 9 & 7; 12201: XEiJ.mpuCycleCount += 6; 12202: int x; 12203: XEiJ.regRn[qqq] = ~0xff & (x = XEiJ.regRn[qqq]) | irpSbcd (x, XEiJ.regRn[ea]); 12204: } else { //SBCD.B -(Ar),-(Aq) 12205: XEiJ.mpuCycleCount += 18; 12206: int y = XEiJ.busRbz (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 12207: int a = --XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)]; 12208: XEiJ.busWb (a, irpSbcd (XEiJ.busRbz (a), y)); 12209: } 12210: } //irpOrToMemByte 12211: 12212: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12213: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12214: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12215: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12216: //PACK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_101_000_rrr-{data} 12217: //PACK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_101_001_rrr-{data} 12218: //OR.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_101_mmm_rrr 12219: // 12220: //PACK Dr,Dq,#<data> 12221: //PACK -(Ar),-(Aq),#<data> 12222: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12223: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12224: public static void irpOrToMemWord () throws M68kException { 12225: int ea = XEiJ.regOC & 63; 12226: if (ea >= XEiJ.EA_MM) { //OR.W Dq,<ea> 12227: XEiJ.mpuCycleCount += 8; 12228: int a = efaMltWord (ea); 12229: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRws (a); 12230: XEiJ.busWw (a, z); 12231: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12232: } else if (ea < XEiJ.EA_AR) { //PACK Dr,Dq,#<data> 12233: XEiJ.mpuCycleCount += 8; 12234: int qqq = XEiJ.regOC >> 9 & 7; 12235: int t; 12236: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12237: t = XEiJ.regRn[ea] + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 12238: } else { 12239: t = XEiJ.regPC; 12240: XEiJ.regPC = t + 2; 12241: t = XEiJ.regRn[ea] + XEiJ.busRwse (t); //pcws 12242: } 12243: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | t >> 4 & 0xf0 | t & 15; 12244: } else { //PACK -(Ar),-(Aq),#<data> 12245: XEiJ.mpuCycleCount += 16; 12246: int t; 12247: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12248: t = XEiJ.busRws (XEiJ.regRn[ea] -= 2) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws。020以上なのでアドレスエラーは出ない 12249: } else { 12250: t = XEiJ.regPC; 12251: XEiJ.regPC = t + 2; 12252: t = XEiJ.busRws (XEiJ.regRn[ea] -= 2) + XEiJ.busRwse (t); //pcws。020以上なのでアドレスエラーは出ない 12253: } 12254: XEiJ.busWb (--XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)], t >> 4 & 0xf0 | t & 15); 12255: } 12256: } //irpOrToMemWord 12257: 12258: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12259: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12260: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12261: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12262: //UNPK Dr,Dq,#<data> |-|--2346|-|-----|-----| |1000_qqq_110_000_rrr-{data} 12263: //UNPK -(Ar),-(Aq),#<data> |-|--2346|-|-----|-----| |1000_qqq_110_001_rrr-{data} 12264: //OR.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1000_qqq_110_mmm_rrr 12265: // 12266: //UNPK Dr,Dq,#<data> 12267: //UNPK -(Ar),-(Aq),#<data> 12268: // PACK/UNPKは第1オペランドのソースと第2オペランドのデスティネーションのサイズが違う。パックされていない方がワードでされている方がバイト 12269: // 10の位を4ビット右または左にシフトする。第3オペランドの補正値はワードでパックされていない方に加算する。CCRは変化しない 12270: public static void irpOrToMemLong () throws M68kException { 12271: int ea = XEiJ.regOC & 63; 12272: if (ea >= XEiJ.EA_MM) { //OR.L Dq,<ea> 12273: XEiJ.mpuCycleCount += 12; 12274: int a = efaMltLong (ea); 12275: int z; 12276: XEiJ.busWl (a, z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] | XEiJ.busRls (a)); 12277: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12278: } else if (ea < XEiJ.EA_AR) { //UNPK Dr,Dq,#<data> 12279: int qqq = XEiJ.regOC >> 9 & 7; 12280: int t = XEiJ.regRn[ea]; 12281: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12282: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws 12283: } else { 12284: int s = XEiJ.regPC; 12285: XEiJ.regPC = s + 2; 12286: XEiJ.regRn[qqq] = ~0xffff & XEiJ.regRn[qqq] | (char) ((t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse (s)); //pcws 12287: } 12288: } else { //UNPK -(Ar),-(Aq),#<data> 12289: int t = XEiJ.busRbs (--XEiJ.regRn[ea]); 12290: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 12291: XEiJ.busWw (XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)] -= 2, (t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。020以上なのでアドレスエラーは出ない 12292: } else { 12293: int s = XEiJ.regPC; 12294: XEiJ.regPC = s + 2; 12295: XEiJ.busWw (XEiJ.regRn[(XEiJ.regOC >> 9) - (64 - 8)] -= 2, (t << 4 & 0x0f00 | t & 15) + XEiJ.busRwse (s)); //pcws。020以上なのでアドレスエラーは出ない 12296: } 12297: } 12298: } //irpOrToMemLong 12299: 12300: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12301: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12302: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12303: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12304: //DIVS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1000_qqq_111_mmm_rrr 12305: // 12306: //DIVS.W <ea>,Dq 12307: // DIVSの余りの符号は被除数と一致 12308: // M68000PRMでDIVS.Wのアドレッシングモードがデータ可変と書かれているのはデータの間違い 12309: public static void irpDivsWord () throws M68kException { 12310: // X 変化しない 12311: // N ゼロ除算またはオーバーフローのとき不定。商が負のときセット。それ以外はクリア 12312: // Z ゼロ除算またはオーバーフローのとき不定。商が0のときセット。それ以外はクリア 12313: // V ゼロ除算のとき不定。オーバーフローのときセット。それ以外はクリア 12314: // C 常にクリア 12315: //divsの余りの符号は被除数と一致 12316: //Javaの除算演算子の挙動 12317: // 10 / 3 == 3 10 % 3 == 1 10 = 3 * 3 + 1 12318: // 10 / -3 == -3 10 % -3 == 1 10 = -3 * -3 + 1 12319: // -10 / 3 == -3 -10 % 3 == -1 -10 = 3 * -3 + -1 12320: // -10 / -3 == 3 -10 % -3 == -1 -10 = -3 * 3 + -1 12321: XEiJ.mpuCycleCount += 158; //最大 12322: int ea = XEiJ.regOC & 63; 12323: int qqq = XEiJ.regOC >> 9 & 7; 12324: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //除数 12325: int x = XEiJ.regRn[qqq]; //被除数 12326: if (y == 0) { //ゼロ除算 12327: //Dqは変化しない 12328: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12329: //Nは常にクリア 12330: XEiJ.REG_CCR_Z | //Zは常にセット 12331: (M30_DIV_ZERO_V_FLAG && m30DivZeroVFlag ? XEiJ.REG_CCR_V : 0) //VはDIV/MULの正常終了後ゼロ除算までにDBccが奇数回実行されたときセット 12332: ); //Cは常にクリア 12333: XEiJ.mpuCycleCount += 38 - 158 - 34; 12334: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 12335: M68kException.m6eNumber = M68kException.M6E_DIVIDE_BY_ZERO; 12336: throw M68kException.m6eSignal; 12337: } 12338: int z = x / y; //商 12339: if ((short) z != z) { //オーバーフローあり 12340: //Dqは変化しない 12341: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12342: (x == 0x80000000 || (z & 0xffff0080) == 0x00000080 || (z & 0xffff0080) == 0xffff0080 ? XEiJ.REG_CCR_N : 0) | //Nは被除数が$80000000または商が$0000xxyyまたは$ffffxxyyでyyが負のときセット、さもなくばクリア 12343: (z == 0x00008000 || (((z & 0xffff00ff) == 0x00000000 || (z & 0xffff00ff) == 0xffff0000) && (z & 0x0000ff00) != 0) ? XEiJ.REG_CCR_Z : 0) | //Zは商が$00008000または商が$0000xxyyまたは$ffffxxyyでxxが0でなくてyyが0のときセット、さもなくばクリア 12344: XEiJ.REG_CCR_V //Vは常にセット 12345: ); //Cは常にクリア 12346: } else { //オーバーフローなし 12347: XEiJ.regRn[qqq] = x - y * z << 16 | (char) z; //Dqは余り<<16|商&$ffff 12348: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 12349: (z < 0 ? XEiJ.REG_CCR_N : 0) | //Nは商が負のときセット、さもなくばクリア 12350: (z == 0 ? XEiJ.REG_CCR_Z : 0) //Zは商が0のときセット、さもなくばクリア 12351: //Vは常にクリア 12352: ); //Cは常にクリア 12353: } //if オーバーフローあり/オーバーフローなし 12354: if (M30_DIV_ZERO_V_FLAG) { 12355: m30DivZeroVFlag = false; 12356: } 12357: } //irpDivsWord 12358: 12359: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12360: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12361: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12362: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12363: //SUB.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1001_qqq_000_mmm_rrr 12364: public static void irpSubToRegByte () throws M68kException { 12365: XEiJ.mpuCycleCount += 4; 12366: int ea = XEiJ.regOC & 63; 12367: int qqq = XEiJ.regOC >> 9 & 7; 12368: int x, y, z; 12369: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 12370: x = XEiJ.regRn[qqq]; 12371: z = x - y; 12372: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12373: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12374: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12375: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12376: } //irpSubToRegByte 12377: 12378: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12379: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12380: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12381: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12382: //SUB.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_001_mmm_rrr 12383: public static void irpSubToRegWord () throws M68kException { 12384: XEiJ.mpuCycleCount += 4; 12385: int ea = XEiJ.regOC & 63; 12386: int qqq = XEiJ.regOC >> 9 & 7; 12387: int x, y, z; 12388: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 12389: x = XEiJ.regRn[qqq]; 12390: z = x - y; 12391: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12392: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12393: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12394: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12395: } //irpSubToRegWord 12396: 12397: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12398: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12399: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12400: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12401: //SUB.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1001_qqq_010_mmm_rrr 12402: public static void irpSubToRegLong () throws M68kException { 12403: int ea = XEiJ.regOC & 63; 12404: int qqq = XEiJ.regOC >> 9 & 7; 12405: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 12406: int x, y, z; 12407: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 12408: x = XEiJ.regRn[qqq]; 12409: z = x - y; 12410: XEiJ.regRn[qqq] = z; 12411: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12412: ((x ^ y) & (x ^ z)) >> 30 & XEiJ.REG_CCR_V | 12413: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12414: } //irpSubToRegLong 12415: 12416: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12417: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12418: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12419: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12420: //SUBA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr 12421: //SUB.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_011_mmm_rrr [SUBA.W <ea>,Aq] 12422: //CLR.W Ar |A|012346|-|-----|-----| A |1001_rrr_011_001_rrr [SUBA.W Ar,Ar] 12423: // 12424: //SUBA.W <ea>,Aq 12425: // ソースを符号拡張してロングで減算する 12426: public static void irpSubaWord () throws M68kException { 12427: XEiJ.mpuCycleCount += 8; 12428: int ea = XEiJ.regOC & 63; 12429: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12430: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 12431: //ccrは変化しない 12432: } //irpSubaWord 12433: 12434: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12435: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12436: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12437: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12438: //SUBX.B Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_100_000_rrr 12439: //SUBX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_100_001_rrr 12440: //SUB.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_100_mmm_rrr 12441: public static void irpSubToMemByte () throws M68kException { 12442: int ea = XEiJ.regOC & 63; 12443: int a, x, y, z; 12444: if (ea < XEiJ.EA_MM) { 12445: if (ea < XEiJ.EA_AR) { //SUBX.B Dr,Dq 12446: int qqq = XEiJ.regOC >> 9 & 7; 12447: XEiJ.mpuCycleCount += 4; 12448: y = XEiJ.regRn[ea]; 12449: x = XEiJ.regRn[qqq]; 12450: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12451: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12452: } else { //SUBX.B -(Ar),-(Aq) 12453: XEiJ.mpuCycleCount += 18; 12454: y = XEiJ.busRbs (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 12455: a = --XEiJ.regRn[XEiJ.regOC >> 9 & 15]; //1qqq=aqq 12456: x = XEiJ.busRbs (a); 12457: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12458: XEiJ.busWb (a, z); 12459: } 12460: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //SUBXはZをクリアすることはあるがセットすることはない 12461: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12462: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_byte 12463: } else { //SUB.B Dq,<ea> 12464: XEiJ.mpuCycleCount += 8; 12465: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12466: a = efaMltByte (ea); 12467: x = XEiJ.busRbs (a); 12468: z = x - y; 12469: XEiJ.busWb (a, z); 12470: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12471: ((x ^ y) & (x ^ z)) >> 6 & XEiJ.REG_CCR_V | 12472: (byte) (x & (y ^ z) ^ (y | z)) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_byte 12473: } 12474: } //irpSubToMemByte 12475: 12476: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12477: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12478: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12479: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12480: //SUBX.W Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_101_000_rrr 12481: //SUBX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_101_001_rrr 12482: //SUB.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_101_mmm_rrr 12483: public static void irpSubToMemWord () throws M68kException { 12484: int ea = XEiJ.regOC & 63; 12485: int a, x, y, z; 12486: if (ea < XEiJ.EA_MM) { 12487: if (ea < XEiJ.EA_AR) { //SUBX.W Dr,Dq 12488: int qqq = XEiJ.regOC >> 9 & 7; 12489: XEiJ.mpuCycleCount += 4; 12490: y = XEiJ.regRn[ea]; 12491: x = XEiJ.regRn[qqq]; 12492: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12493: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 12494: } else { //SUBX.W -(Ar),-(Aq) 12495: XEiJ.mpuCycleCount += 18; 12496: y = XEiJ.busRws (XEiJ.regRn[ea] -= 2); //このr[ea]はアドレスレジスタ 12497: a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2; 12498: x = XEiJ.busRws (a); 12499: z = x - y - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12500: XEiJ.busWw (a, z); 12501: } 12502: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 12503: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12504: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx_word 12505: } else { //SUB.W Dq,<ea> 12506: XEiJ.mpuCycleCount += 8; 12507: y = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 12508: a = efaMltWord (ea); 12509: x = XEiJ.busRws (a); 12510: z = x - y; 12511: XEiJ.busWw (a, z); 12512: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 12513: ((x ^ y) & (x ^ z)) >> 14 & XEiJ.REG_CCR_V | 12514: (short) (x & (y ^ z) ^ (y | z)) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub_word 12515: } 12516: } //irpSubToMemWord 12517: 12518: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12519: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12520: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12521: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12522: //SUBX.L Dr,Dq |-|012346|-|*UUUU|*****| |1001_qqq_110_000_rrr 12523: //SUBX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1001_qqq_110_001_rrr 12524: //SUB.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1001_qqq_110_mmm_rrr 12525: public static void irpSubToMemLong () throws M68kException { 12526: int ea = XEiJ.regOC & 63; 12527: if (ea < XEiJ.EA_MM) { 12528: int x; 12529: int y; 12530: int z; 12531: if (ea < XEiJ.EA_AR) { //SUBX.L Dr,Dq 12532: int qqq = XEiJ.regOC >> 9 & 7; 12533: XEiJ.mpuCycleCount += 8; 12534: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) - (y = XEiJ.regRn[ea]) - (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 12535: } else { //SUBX.L -(Ar),-(Aq) 12536: XEiJ.mpuCycleCount += 30; 12537: y = XEiJ.busRls (XEiJ.regRn[ea] -= 4); //このr[ea]はアドレスレジスタ 12538: int a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 4; 12539: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - y - (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 12540: } 12541: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 12542: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12543: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_subx 12544: } else { //SUB.L Dq,<ea> 12545: XEiJ.mpuCycleCount += 12; 12546: int a = efaMltLong (ea); 12547: int x; 12548: int y; 12549: int z; 12550: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) - (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7])); 12551: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 12552: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12553: (x & (y ^ z) ^ (y | z)) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_sub 12554: } 12555: } //irpSubToMemLong 12556: 12557: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12558: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12559: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12560: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12561: //SUBA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr 12562: //SUB.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1001_qqq_111_mmm_rrr [SUBA.L <ea>,Aq] 12563: //CLR.L Ar |A|012346|-|-----|-----| A |1001_rrr_111_001_rrr [SUBA.L Ar,Ar] 12564: public static void irpSubaLong () throws M68kException { 12565: int ea = XEiJ.regOC & 63; 12566: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //Dr/Ar/#<data>のとき8+、それ以外は6+ 12567: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12568: XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= z; //r[op >> 9 & 15] -= ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 12569: //ccrは変化しない 12570: } //irpSubaLong 12571: 12572: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12573: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12574: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12575: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12576: //SXCALL <name> |A|012346|-|UUUUU|*****| |1010_0dd_ddd_ddd_ddd [ALINE #<data>] 12577: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12578: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12579: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12580: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12581: //ALINE #<data> |-|012346|-|UUUUU|*****| |1010_ddd_ddd_ddd_ddd (line 1010 emulator) 12582: public static void irpAline () throws M68kException { 12583: XEiJ.mpuCycleCount += 34; 12584: if (XEiJ.MPU_INLINE_EXCEPTION) { 12585: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 12586: int sp = XEiJ.regRn[15]; 12587: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 12588: if (XEiJ.regSRS == 0) { //ユーザモードのとき 12589: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 12590: XEiJ.mpuUSP = sp; //USPを保存 12591: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 12592: if (DataBreakPoint.DBP_ON) { 12593: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 12594: } else { 12595: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 12596: } 12597: if (InstructionBreakPoint.IBP_ON) { 12598: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 12599: } 12600: } 12601: XEiJ.regRn[15] = sp -= 8; 12602: XEiJ.busWw (sp + 6, 0x0000 | M68kException.M6E_LINE_1010_EMULATOR << 2); //pushw。フォーマットとベクタオフセットをプッシュする 12603: XEiJ.busWl (sp + 2, XEiJ.regPC0); //pushl。pcをプッシュする 12604: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 12605: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.M6E_LINE_1010_EMULATOR << 2))); //例外ベクタを取り出してジャンプする 12606: } else { 12607: irpException (M68kException.M6E_LINE_1010_EMULATOR, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 12608: } 12609: } //irpAline 12610: 12611: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12612: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12613: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12614: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12615: //CMP.B <ea>,Dq |-|012346|-|-UUUU|-****|D M+-WXZPI|1011_qqq_000_mmm_rrr 12616: public static void irpCmpByte () throws M68kException { 12617: XEiJ.mpuCycleCount += 4; 12618: int ea = XEiJ.regOC & 63; 12619: int x; 12620: int y; 12621: int z = (byte) ((x = (byte) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)))); 12622: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12623: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12624: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12625: } //irpCmpByte 12626: 12627: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12628: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12629: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12630: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12631: //CMP.W <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_001_mmm_rrr 12632: public static void irpCmpWord () throws M68kException { 12633: XEiJ.mpuCycleCount += 4; 12634: int ea = XEiJ.regOC & 63; 12635: int x; 12636: int y; 12637: int z = (short) ((x = (short) XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)))); //このr[ea]はデータレジスタまたはアドレスレジスタ 12638: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12639: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12640: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12641: } //irpCmpWord 12642: 12643: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12644: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12645: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12646: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12647: //CMP.L <ea>,Dq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_010_mmm_rrr 12648: public static void irpCmpLong () throws M68kException { 12649: XEiJ.mpuCycleCount += 6; 12650: int ea = XEiJ.regOC & 63; 12651: int x; 12652: int y; 12653: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 7]) - (y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea))); //このr[ea]はデータレジスタまたはアドレスレジスタ 12654: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12655: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12656: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12657: } //irpCmpLong 12658: 12659: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12660: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12661: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12662: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12663: //CMPA.W <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr 12664: //CMP.W <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_011_mmm_rrr [CMPA.W <ea>,Aq] 12665: // 12666: //CMPA.W <ea>,Aq 12667: // ソースを符号拡張してロングで比較する 12668: public static void irpCmpaWord () throws M68kException { 12669: XEiJ.mpuCycleCount += 6; 12670: int ea = XEiJ.regOC & 63; 12671: //ソースを符号拡張してからロングで比較する 12672: int y = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12673: int x; 12674: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12675: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12676: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12677: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12678: } //irpCmpaWord 12679: 12680: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12681: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12682: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12683: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12684: //EOR.B Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_100_mmm_rrr 12685: //CMPM.B (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_100_001_rrr 12686: public static void irpEorByte () throws M68kException { 12687: int ea = XEiJ.regOC & 63; 12688: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.B (Ar)+,(Aq)+ 12689: XEiJ.mpuCycleCount += 12; 12690: int y = XEiJ.busRbs (XEiJ.regRn[ea]++); //このr[ea]はアドレスレジスタ 12691: int x; 12692: int z = (byte) ((x = XEiJ.busRbs (XEiJ.regRn[XEiJ.regOC >> 9 & 15]++)) - y); 12693: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12694: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12695: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12696: } else { 12697: int qqq = XEiJ.regOC >> 9 & 7; 12698: int z; 12699: if (ea < XEiJ.EA_AR) { //EOR.B Dq,Dr 12700: XEiJ.mpuCycleCount += 4; 12701: z = XEiJ.regRn[ea] ^= 255 & XEiJ.regRn[qqq]; //0拡張してからEOR 12702: } else { //EOR.B Dq,<mem> 12703: XEiJ.mpuCycleCount += 8; 12704: int a = efaMltByte (ea); 12705: XEiJ.busWb (a, z = XEiJ.regRn[qqq] ^ XEiJ.busRbs (a)); 12706: } 12707: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12708: } 12709: } //irpEorByte 12710: 12711: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12712: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12713: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12714: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12715: //EOR.W Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_101_mmm_rrr 12716: //CMPM.W (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_101_001_rrr 12717: public static void irpEorWord () throws M68kException { 12718: int ea = XEiJ.regOC & 63; 12719: int rrr = XEiJ.regOC & 7; 12720: int mmm = ea >> 3; 12721: if (mmm == XEiJ.MMM_AR) { //CMPM.W (Ar)+,(Aq)+ 12722: XEiJ.mpuCycleCount += 12; 12723: int y = XEiJ.busRws ((XEiJ.regRn[ea] += 2) - 2); //このr[ea]はアドレスレジスタ 12724: int x; 12725: int z = (short) ((x = XEiJ.busRws ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 2) - 2)) - y); 12726: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12727: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12728: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12729: } else { 12730: int qqq = XEiJ.regOC >> 9 & 7; 12731: int z; 12732: if (ea < XEiJ.EA_AR) { //EOR.W Dq,Dr 12733: XEiJ.mpuCycleCount += 4; 12734: z = XEiJ.regRn[rrr] ^= (char) XEiJ.regRn[qqq]; //0拡張してからEOR 12735: } else { //EOR.W Dq,<mem> 12736: XEiJ.mpuCycleCount += 8; 12737: int a = efaMltWord (ea); 12738: XEiJ.busWw (a, z = XEiJ.regRn[qqq] ^ XEiJ.busRws (a)); 12739: } 12740: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12741: } 12742: } //irpEorWord 12743: 12744: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12745: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12746: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12747: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12748: //EOR.L Dq,<ea> |-|012346|-|-UUUU|-**00|D M+-WXZ |1011_qqq_110_mmm_rrr 12749: //CMPM.L (Ar)+,(Aq)+ |-|012346|-|-UUUU|-****| |1011_qqq_110_001_rrr 12750: public static void irpEorLong () throws M68kException { 12751: int ea = XEiJ.regOC & 63; 12752: if (ea >> 3 == XEiJ.MMM_AR) { //CMPM.L (Ar)+,(Aq)+ 12753: XEiJ.mpuCycleCount += 20; 12754: int y = XEiJ.busRls ((XEiJ.regRn[ea] += 4) - 4); //このr[ea]はアドレスレジスタ 12755: int x; 12756: int z = (x = XEiJ.busRls ((XEiJ.regRn[XEiJ.regOC >> 9 & 15] += 4) - 4)) - y; 12757: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12758: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12759: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12760: } else { 12761: int qqq = XEiJ.regOC >> 9 & 7; 12762: int z; 12763: if (ea < XEiJ.EA_AR) { //EOR.L Dq,Dr 12764: XEiJ.mpuCycleCount += 8; 12765: XEiJ.regRn[ea] = z = XEiJ.regRn[ea] ^ XEiJ.regRn[qqq]; 12766: } else { //EOR.L Dq,<mem> 12767: XEiJ.mpuCycleCount += 12; 12768: int a = efaMltLong (ea); 12769: XEiJ.busWl (a, z = XEiJ.busRls (a) ^ XEiJ.regRn[qqq]); 12770: } 12771: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12772: } 12773: } //irpEorLong 12774: 12775: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12776: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12777: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12778: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12779: //CMPA.L <ea>,Aq |-|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr 12780: //CMP.L <ea>,Aq |A|012346|-|-UUUU|-****|DAM+-WXZPI|1011_qqq_111_mmm_rrr [CMPA.L <ea>,Aq] 12781: public static void irpCmpaLong () throws M68kException { 12782: XEiJ.mpuCycleCount += 6; 12783: int ea = XEiJ.regOC & 63; 12784: int y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 12785: int x; 12786: int z = (x = XEiJ.regRn[XEiJ.regOC >> 9 & 15]) - y; 12787: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | 12788: ((x ^ y) & (x ^ z)) >>> 31 << 1 | 12789: (x & (y ^ z) ^ (y | z)) >>> 31); //ccr_cmp 12790: } //irpCmpaLong 12791: 12792: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12793: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12794: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12795: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12796: //AND.B <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_000_mmm_rrr 12797: public static void irpAndToRegByte () throws M68kException { 12798: XEiJ.mpuCycleCount += 4; 12799: int ea = XEiJ.regOC & 63; 12800: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & (XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~255 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea))))]; //ccr_tst_byte。1拡張してからAND 12801: } //irpAndToRegByte 12802: 12803: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12804: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12805: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12806: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12807: //AND.W <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_001_mmm_rrr 12808: public static void irpAndToRegWord () throws M68kException { 12809: XEiJ.mpuCycleCount += 4; 12810: int ea = XEiJ.regOC & 63; 12811: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] &= ~65535 | (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea))); //1拡張してからAND 12812: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12813: } //irpAndToRegWord 12814: 12815: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12816: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12817: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12818: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12819: //AND.L <ea>,Dq |-|012346|-|-UUUU|-**00|D M+-WXZPI|1100_qqq_010_mmm_rrr 12820: public static void irpAndToRegLong () throws M68kException { 12821: int ea = XEiJ.regOC & 63; 12822: int qqq = XEiJ.regOC >> 9 & 7; 12823: int z; 12824: if (ea < XEiJ.EA_AR) { //AND.L Dr,Dq 12825: XEiJ.mpuCycleCount += 8; 12826: z = XEiJ.regRn[qqq] &= XEiJ.regRn[ea]; 12827: } else { //AND.L <mem>,Dq 12828: XEiJ.mpuCycleCount += ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 12829: z = XEiJ.regRn[qqq] &= XEiJ.busRls (efaAnyLong (ea)); 12830: } 12831: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12832: } //irpAndToRegLong 12833: 12834: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12835: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12836: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12837: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12838: //MULU.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_011_mmm_rrr 12839: public static void irpMuluWord () throws M68kException { 12840: int ea = XEiJ.regOC & 63; 12841: int qqq = XEiJ.regOC >> 9 & 7; 12842: int y = ea < XEiJ.EA_AR ? (char) XEiJ.regRn[ea] : XEiJ.busRwz (efaAnyWord (ea)); 12843: //muluの所要サイクル数は38+2n 12844: //nはソースに含まれる1の数 12845: int s = y & 0x5555; 12846: s += y - s >> 1; 12847: int t = s & 0x3333; 12848: t += s - t >> 2; 12849: t += t >> 4; 12850: XEiJ.mpuCycleCount += 38 + ((t & 15) + (t >> 8 & 15)) << 1; //38+2n 12851: //XEiJ.mpuCycleCount += 38 + (Integer.bitCount (y) << 1); //少し遅くなる 12852: int z; 12853: XEiJ.regRn[qqq] = z = (char) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 12854: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12855: if (M30_DIV_ZERO_V_FLAG) { 12856: m30DivZeroVFlag = false; 12857: } 12858: } //irpMuluWord 12859: 12860: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12861: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12862: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12863: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12864: //ABCD.B Dr,Dq |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_000_rrr 12865: //ABCD.B -(Ar),-(Aq) |-|012346|-|UUUUU|*U*U*| |1100_qqq_100_001_rrr 12866: //AND.B Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_100_mmm_rrr 12867: public static void irpAndToMemByte () throws M68kException { 12868: int ea = XEiJ.regOC & 63; 12869: if (ea >= XEiJ.EA_MM) { //AND.B Dq,<ea> 12870: XEiJ.mpuCycleCount += 8; 12871: int a = efaMltByte (ea); 12872: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & XEiJ.busRbs (a); 12873: XEiJ.busWb (a, z); 12874: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.MPU_TSTB_TABLE[255 & z]; //ccr_tst_byte 12875: } else if (ea < XEiJ.EA_AR) { //ABCD.B Dr,Dq 12876: int qqq = XEiJ.regOC >> 9 & 7; 12877: XEiJ.mpuCycleCount += 6; 12878: XEiJ.regRn[qqq] = ~0xff & XEiJ.regRn[qqq] | irpAbcd (XEiJ.regRn[qqq], XEiJ.regRn[ea]); 12879: } else { //ABCD.B -(Ar),-(Aq) 12880: XEiJ.mpuCycleCount += 18; 12881: int y = XEiJ.busRbz (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 12882: int a = --XEiJ.regRn[(XEiJ.regOC >> 9) - (96 - 8)]; 12883: XEiJ.busWb (a, irpAbcd (XEiJ.busRbz (a), y)); 12884: } 12885: } //irpAndToMemByte 12886: 12887: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12888: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12889: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12890: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12891: //EXG.L Dq,Dr |-|012346|-|-----|-----| |1100_qqq_101_000_rrr 12892: //EXG.L Aq,Ar |-|012346|-|-----|-----| |1100_qqq_101_001_rrr 12893: //AND.W Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_101_mmm_rrr 12894: public static void irpAndToMemWord () throws M68kException { 12895: int ea = XEiJ.regOC & 63; 12896: if (ea < XEiJ.EA_MM) { //EXG 12897: XEiJ.mpuCycleCount += 6; 12898: if (ea < XEiJ.EA_AR) { //EXG.L Dq,Dr 12899: int qqq = XEiJ.regOC >> 9 & 7; 12900: int t = XEiJ.regRn[qqq]; 12901: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; 12902: XEiJ.regRn[ea] = t; 12903: } else { //EXG.L Aq,Ar 12904: int aqq = (XEiJ.regOC >> 9) - (96 - 8); 12905: int t = XEiJ.regRn[aqq]; 12906: XEiJ.regRn[aqq] = XEiJ.regRn[ea]; //このr[ea]アドレスレジスタ 12907: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 12908: } 12909: } else { //AND.W Dq,<ea> 12910: XEiJ.mpuCycleCount += 8; 12911: int a = efaMltWord (ea); 12912: int z = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & XEiJ.busRws (a); 12913: XEiJ.busWw (a, z); 12914: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (char) z - 1 >> 31 & XEiJ.REG_CCR_Z | ((short) z < 0 ? XEiJ.REG_CCR_N : 0); //ccr_tst_word 12915: } 12916: } //irpAndToMemWord 12917: 12918: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12919: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12920: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12921: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12922: //EXG.L Dq,Ar |-|012346|-|-----|-----| |1100_qqq_110_001_rrr 12923: //AND.L Dq,<ea> |-|012346|-|-UUUU|-**00| M+-WXZ |1100_qqq_110_mmm_rrr 12924: public static void irpAndToMemLong () throws M68kException { 12925: int ea = XEiJ.regOC & 63; 12926: int qqq = XEiJ.regOC >> 9 & 7; 12927: if (ea >> 3 == XEiJ.MMM_AR) { //EXG.L Dq,Ar 12928: XEiJ.mpuCycleCount += 6; 12929: int t = XEiJ.regRn[qqq]; 12930: XEiJ.regRn[qqq] = XEiJ.regRn[ea]; //このr[ea]はアドレスレジスタ 12931: XEiJ.regRn[ea] = t; //このr[ea]はアドレスレジスタ 12932: } else { //AND.L Dq,<ea> 12933: XEiJ.mpuCycleCount += 12; 12934: int a = efaMltLong (ea); 12935: int z; 12936: XEiJ.busWl (a, z = XEiJ.busRls (a) & XEiJ.regRn[qqq]); 12937: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12938: } 12939: } //irpAndToMemLong 12940: 12941: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12942: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12943: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12944: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12945: //MULS.W <ea>,Dq |-|012346|-|-UUUU|-***0|D M+-WXZPI|1100_qqq_111_mmm_rrr 12946: public static void irpMulsWord () throws M68kException { 12947: int ea = XEiJ.regOC & 63; 12948: int qqq = XEiJ.regOC >> 9 & 7; 12949: int y = ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); 12950: int t = y << 1 ^ y; //右側が1である0と右側が0または末尾である1は1、それ以外は0。ソースは符号拡張されているので上位16ビットはすべて0 12951: //mulsの所要サイクル数は38+2n 12952: //nはソースの末尾に0を付け加えた17ビットに含まれる10または01の数 12953: int s = t & 0x5555; 12954: s += t - s >> 1; 12955: t = s & 0x3333; 12956: t += s - t >> 2; 12957: t += t >> 4; 12958: XEiJ.mpuCycleCount += 38 + ((t & 15) + (t >> 8 & 15)) << 1; //38+2n 12959: int z; 12960: XEiJ.regRn[qqq] = z = (short) XEiJ.regRn[qqq] * y; //積の下位32ビット。オーバーフローは無視 12961: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 12962: if (M30_DIV_ZERO_V_FLAG) { 12963: m30DivZeroVFlag = false; 12964: } 12965: } //irpMulsWord 12966: 12967: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12968: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12969: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12970: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12971: //ADD.B <ea>,Dq |-|012346|-|UUUUU|*****|D M+-WXZPI|1101_qqq_000_mmm_rrr 12972: public static void irpAddToRegByte () throws M68kException { 12973: XEiJ.mpuCycleCount += 4; 12974: int ea = XEiJ.regOC & 63; 12975: int qqq = XEiJ.regOC >> 9 & 7; 12976: int x, y, z; 12977: y = ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRbs (efaAnyByte (ea)); 12978: x = XEiJ.regRn[qqq]; 12979: z = x + y; 12980: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 12981: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 12982: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 12983: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 12984: } //irpAddToRegByte 12985: 12986: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12987: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 12988: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 12989: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 12990: //ADD.W <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_001_mmm_rrr 12991: public static void irpAddToRegWord () throws M68kException { 12992: XEiJ.mpuCycleCount += 4; 12993: int ea = XEiJ.regOC & 63; 12994: int qqq = XEiJ.regOC >> 9 & 7; 12995: int x, y, z; 12996: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 12997: x = XEiJ.regRn[qqq]; 12998: z = x + y; 12999: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 13000: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 13001: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13002: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 13003: } //irpAddToRegWord 13004: 13005: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13006: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13007: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13008: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13009: //ADD.L <ea>,Dq |-|012346|-|UUUUU|*****|DAM+-WXZPI|1101_qqq_010_mmm_rrr 13010: public static void irpAddToRegLong () throws M68kException { 13011: int ea = XEiJ.regOC & 63; 13012: int qqq = XEiJ.regOC >> 9 & 7; 13013: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //ソースが#<data>のとき2増やす 13014: int x, y, z; 13015: y = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ 13016: x = XEiJ.regRn[qqq]; 13017: z = x + y; 13018: XEiJ.regRn[qqq] = z; 13019: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13020: ((x ^ z) & (y ^ z)) >> 30 & XEiJ.REG_CCR_V | 13021: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 13022: } //irpAddToRegLong 13023: 13024: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13025: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13026: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13027: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13028: //ADDA.W <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr 13029: //ADD.W <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_011_mmm_rrr [ADDA.W <ea>,Aq] 13030: // 13031: //ADDA.W <ea>,Aq 13032: // ソースを符号拡張してロングで加算する 13033: public static void irpAddaWord () throws M68kException { 13034: XEiJ.mpuCycleCount += 8; 13035: int ea = XEiJ.regOC & 63; 13036: int z = ea < XEiJ.EA_MM ? (short) XEiJ.regRn[ea] : XEiJ.busRws (efaAnyWord (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 13037: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? (short) r[ea] : rws (efaAnyWord (ea));は不可 13038: //ccrは変化しない 13039: } //irpAddaWord 13040: 13041: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13042: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13043: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13044: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13045: //ADDX.B Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_100_000_rrr 13046: //ADDX.B -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_100_001_rrr 13047: //ADD.B Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_100_mmm_rrr 13048: public static void irpAddToMemByte () throws M68kException { 13049: int ea = XEiJ.regOC & 63; 13050: int a, x, y, z; 13051: if (ea < XEiJ.EA_MM) { 13052: if (ea < XEiJ.EA_AR) { //ADDX.B Dr,Dq 13053: int qqq = XEiJ.regOC >> 9 & 7; 13054: XEiJ.mpuCycleCount += 4; 13055: y = XEiJ.regRn[ea]; 13056: x = XEiJ.regRn[qqq]; 13057: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13058: XEiJ.regRn[qqq] = ~255 & x | 255 & z; 13059: } else { //ADDX.B -(Ar),-(Aq) 13060: XEiJ.mpuCycleCount += 18; 13061: y = XEiJ.busRbs (--XEiJ.regRn[ea]); //このr[ea]はアドレスレジスタ 13062: a = --XEiJ.regRn[XEiJ.regOC >> 9 & 15]; //1qqq=aqq 13063: x = XEiJ.busRbs (a); 13064: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13065: XEiJ.busWb (a, z); 13066: } 13067: XEiJ.regCCR = (z >> 4 & XEiJ.REG_CCR_N | (255 & z) - 1 >> 6 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 13068: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 13069: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_byte 13070: } else { //ADD.B Dq,<ea> 13071: XEiJ.mpuCycleCount += 8; 13072: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 13073: a = efaMltByte (ea); 13074: x = XEiJ.busRbs (a); 13075: z = x + y; 13076: XEiJ.busWb (a, z); 13077: XEiJ.regCCR = (XEiJ.MPU_TSTB_TABLE[255 & z] | 13078: ((x ^ z) & (y ^ z)) >> 6 & XEiJ.REG_CCR_V | 13079: (byte) ((x | y) ^ (x ^ y) & z) >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_byte 13080: } 13081: } //irpAddToMemByte 13082: 13083: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13084: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13085: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13086: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13087: //ADDX.W Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_101_000_rrr 13088: //ADDX.W -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_101_001_rrr 13089: //ADD.W Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_101_mmm_rrr 13090: public static void irpAddToMemWord () throws M68kException { 13091: int ea = XEiJ.regOC & 63; 13092: int a, x, y, z; 13093: if (ea < XEiJ.EA_MM) { 13094: if (ea < XEiJ.EA_AR) { //ADDX.W Dr,Dq 13095: int qqq = XEiJ.regOC >> 9 & 7; 13096: XEiJ.mpuCycleCount += 4; 13097: y = XEiJ.regRn[ea]; 13098: x = XEiJ.regRn[qqq]; 13099: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13100: XEiJ.regRn[qqq] = ~65535 & x | (char) z; 13101: } else { //ADDX.W -(Ar),-(Aq) 13102: XEiJ.mpuCycleCount += 18; 13103: y = XEiJ.busRws (XEiJ.regRn[ea] -= 2); //このr[ea]はアドレスレジスタ 13104: a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 2; 13105: x = XEiJ.busRws (a); 13106: z = x + y + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13107: XEiJ.busWw (a, z); 13108: } 13109: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.regCCR & XEiJ.REG_CCR_Z | //ADDXはZをクリアすることはあるがセットすることはない 13110: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13111: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx_word 13112: } else { //ADD.W Dq,<ea> 13113: XEiJ.mpuCycleCount += 8; 13114: a = efaMltWord (ea); 13115: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7]; 13116: x = XEiJ.busRws (a); 13117: z = x + y; 13118: XEiJ.busWw (a, z); 13119: XEiJ.regCCR = (z >> 12 & XEiJ.REG_CCR_N | (char) z - 1 >> 14 & XEiJ.REG_CCR_Z | 13120: ((x ^ z) & (y ^ z)) >> 14 & XEiJ.REG_CCR_V | 13121: (short) ((x | y) ^ (x ^ y) & z) >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add_word 13122: } 13123: } //irpAddToMemWord 13124: 13125: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13126: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13127: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13128: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13129: //ADDX.L Dr,Dq |-|012346|-|*UUUU|*****| |1101_qqq_110_000_rrr 13130: //ADDX.L -(Ar),-(Aq) |-|012346|-|*UUUU|*****| |1101_qqq_110_001_rrr 13131: //ADD.L Dq,<ea> |-|012346|-|UUUUU|*****| M+-WXZ |1101_qqq_110_mmm_rrr 13132: public static void irpAddToMemLong () throws M68kException { 13133: int ea = XEiJ.regOC & 63; 13134: if (ea < XEiJ.EA_MM) { 13135: int x; 13136: int y; 13137: int z; 13138: if (ea < XEiJ.EA_AR) { //ADDX.L Dr,Dq 13139: int qqq = XEiJ.regOC >> 9 & 7; 13140: XEiJ.mpuCycleCount += 8; 13141: XEiJ.regRn[qqq] = z = (x = XEiJ.regRn[qqq]) + (y = XEiJ.regRn[ea]) + (XEiJ.regCCR >> 4); //Xの左側はすべて0なのでCCR_X&を省略 13142: } else { //ADDX.L -(Ar),-(Aq) 13143: XEiJ.mpuCycleCount += 30; 13144: y = XEiJ.busRls (XEiJ.regRn[ea] -= 4); //このr[ea]はアドレスレジスタ 13145: int a = XEiJ.regRn[XEiJ.regOC >> 9 & 15] -= 4; 13146: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + y + (XEiJ.regCCR >> 4)); //Xの左側はすべて0なのでCCR_X&を省略 13147: } 13148: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_Z : 0) | 13149: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13150: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_addx 13151: } else { //ADD.L Dq,<ea> 13152: XEiJ.mpuCycleCount += 12; 13153: int a = efaMltLong (ea); 13154: int x; 13155: int y; 13156: int z; 13157: XEiJ.busWl (a, z = (x = XEiJ.busRls (a)) + (y = XEiJ.regRn[XEiJ.regOC >> 9 & 7])); 13158: XEiJ.regCCR = (z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13159: ((x ^ z) & (y ^ z)) >>> 31 << 1 | 13160: ((x | y) ^ (x ^ y) & z) >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //ccr_add 13161: } 13162: } //irpAddToMemLong 13163: 13164: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13165: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13166: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13167: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13168: //ADDA.L <ea>,Aq |-|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr 13169: //ADD.L <ea>,Aq |A|012346|-|-----|-----|DAM+-WXZPI|1101_qqq_111_mmm_rrr [ADDA.L <ea>,Aq] 13170: public static void irpAddaLong () throws M68kException { 13171: int ea = XEiJ.regOC & 63; 13172: XEiJ.mpuCycleCount += ea < XEiJ.EA_MM || ea == XEiJ.EA_IM ? 8 : 6; //Dr/Ar/#<data>のとき8+、それ以外は6+ 13173: int z = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (efaAnyLong (ea)); //このr[ea]はデータレジスタまたはアドレスレジスタ。ここでAqが変化する可能性があることに注意 13174: XEiJ.regRn[XEiJ.regOC >> 9 & 15] += z; //r[op >> 9 & 15] += ea < XEiJ.EA_MM ? r[ea] : rls (efaAnyLong (ea));は不可 13175: //ccrは変化しない 13176: } //irpAddaLong 13177: 13178: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13179: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13180: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13181: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13182: //ASR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_000_rrr 13183: //LSR.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_001_rrr 13184: //ROXR.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_010_rrr 13185: //ROR.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_011_rrr 13186: //ASR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_100_rrr 13187: //LSR.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_000_101_rrr 13188: //ROXR.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_000_110_rrr 13189: //ROR.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_000_111_rrr 13190: //ASR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_000_rrr [ASR.B #1,Dr] 13191: //LSR.B Dr |A|012346|-|UUUUU|***0*| |1110_001_000_001_rrr [LSR.B #1,Dr] 13192: //ROXR.B Dr |A|012346|-|*UUUU|***0*| |1110_001_000_010_rrr [ROXR.B #1,Dr] 13193: //ROR.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_000_011_rrr [ROR.B #1,Dr] 13194: // 13195: //ASR.B #<data>,Dr 13196: //ASR.B Dq,Dr 13197: // 算術右シフトバイト 13198: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13199: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13200: // 1 ........................ｱｱｲｳｴｵｶｷ ｸｱ*0ｸ Z=ｱｲｳｴｵｶｷ==0 13201: // 2 ........................ｱｱｱｲｳｴｵｶ ｷｱ*0ｷ Z=ｱｲｳｴｵｶ==0 13202: // 3 ........................ｱｱｱｱｲｳｴｵ ｶｱ*0ｶ Z=ｱｲｳｴｵ==0 13203: // 4 ........................ｱｱｱｱｱｲｳｴ ｵｱ*0ｵ Z=ｱｲｳｴ==0 13204: // 5 ........................ｱｱｱｱｱｱｲｳ ｴｱ*0ｴ Z=ｱｲｳ==0 13205: // 6 ........................ｱｱｱｱｱｱｱｲ ｳｱ*0ｳ Z=ｱｲ==0 13206: // 7 ........................ｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13207: // 8 ........................ｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13208: // CCR 13209: // X countが0のとき変化しない。他は最後に押し出されたビット 13210: // N 結果の最上位ビット 13211: // Z 結果が0のときセット。他はクリア 13212: // V 常にクリア 13213: // C countが0のときクリア。他は最後に押し出されたビット 13214: // 13215: //LSR.B #<data>,Dr 13216: //LSR.B Dq,Dr 13217: // 論理右シフトバイト 13218: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13219: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13220: // 1 ........................0ｱｲｳｴｵｶｷ ｸ0*0ｸ Z=ｱｲｳｴｵｶｷ==0 13221: // 2 ........................00ｱｲｳｴｵｶ ｷ0*0ｷ Z=ｱｲｳｴｵｶ==0 13222: // 3 ........................000ｱｲｳｴｵ ｶ0*0ｶ Z=ｱｲｳｴｵ==0 13223: // 4 ........................0000ｱｲｳｴ ｵ0*0ｵ Z=ｱｲｳｴ==0 13224: // 5 ........................00000ｱｲｳ ｴ0*0ｴ Z=ｱｲｳ==0 13225: // 6 ........................000000ｱｲ ｳ0*0ｳ Z=ｱｲ==0 13226: // 7 ........................0000000ｱ ｲ0*0ｲ Z=ｱ==0 13227: // 8 ........................00000000 ｱ010ｱ 13228: // 9 ........................00000000 00100 13229: // CCR 13230: // X countが0のとき変化しない。他は最後に押し出されたビット 13231: // N 結果の最上位ビット 13232: // Z 結果が0のときセット。他はクリア 13233: // V 常にクリア 13234: // C countが0のときクリア。他は最後に押し出されたビット 13235: // 13236: //ROR.B #<data>,Dr 13237: //ROR.B Dq,Dr 13238: // 右ローテートバイト 13239: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13240: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13241: // 1 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13242: // : 13243: // 7 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸ==0 13244: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13245: // CCR 13246: // X 常に変化しない 13247: // N 結果の最上位ビット 13248: // Z 結果が0のときセット。他はクリア 13249: // V 常にクリア 13250: // C countが0のときクリア。他は結果の最上位ビット 13251: // 13252: //ROXR.B #<data>,Dr 13253: //ROXR.B Dq,Dr 13254: // 拡張右ローテートバイト 13255: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13256: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13257: // 1 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13258: // 2 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13259: // 3 ........................ｷｸXｱｲｳｴｵ ｶｷ*0ｶ Z=ｱｲｳｴｵｷｸX==0 13260: // 4 ........................ｶｷｸXｱｲｳｴ ｵｶ*0ｵ Z=ｱｲｳｴｶｷｸX==0 13261: // 5 ........................ｵｶｷｸXｱｲｳ ｴｵ*0ｴ Z=ｱｲｳｵｶｷｸX==0 13262: // 6 ........................ｴｵｶｷｸXｱｲ ｳｴ*0ｳ Z=ｱｲｴｵｶｷｸX==0 13263: // 7 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13264: // 8 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13265: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13266: // CCR 13267: // X countが0のとき変化しない。他は最後に押し出されたビット 13268: // N 結果の最上位ビット 13269: // Z 結果が0のときセット。他はクリア 13270: // V 常にクリア 13271: // C countが0のときXのコピー。他は最後に押し出されたビット 13272: public static void irpXxrToRegByte () throws M68kException { 13273: int rrr; 13274: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13275: int y; 13276: int z; 13277: int t; 13278: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13279: case 0b000_000 >> 3: //ASR.B #<data>,Dr 13280: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13281: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> y) >> 1); 13282: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13283: break; 13284: case 0b001_000 >> 3: //LSR.B #<data>,Dr 13285: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13286: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = (0xff & x) >>> y) >>> 1); 13287: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13288: break; 13289: case 0b010_000 >> 3: //ROXR.B #<data>,Dr 13290: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13291: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13292: if (y == 1 - 1) { //y=data-1=1-1 13293: t = x; 13294: } else { //y=data-1=2-1～8-1 13295: z = x << 9 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13296: } 13297: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13298: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13299: break; 13300: case 0b011_000 >> 3: //ROR.B #<data>,Dr 13301: XEiJ.mpuCycleCount += 6 + ((y = XEiJ.regOC >> 9 & 7) << 1); //y=data&7 13302: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13303: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 7 & 1; //Xは変化しない。Cは結果の最上位ビット 13304: break; 13305: case 0b100_000 >> 3: //ASR.B Dq,Dr 13306: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13307: XEiJ.mpuCycleCount += 6 + (y << 1); 13308: if (y == 0) { //y=data=0 13309: z = (byte) x; 13310: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13311: } else { //y=data=1～63 13312: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (t = (byte) x >> (y <= 8 ? y - 1 : 7)) >> 1); 13313: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13314: } 13315: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13316: break; 13317: case 0b101_000 >> 3: //LSR.B Dq,Dr 13318: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13319: XEiJ.mpuCycleCount += 6 + (y << 1); 13320: if (y == 0) { //y=data=0 13321: z = (byte) x; 13322: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13323: } else { //y=data=1～63 13324: XEiJ.regRn[rrr] = ~0xff & x | (z = (t = y <= 8 ? (0xff & x) >>> y - 1 : 0) >>> 1); 13325: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13326: } 13327: break; 13328: case 0b110_000 >> 3: //ROXR.B Dq,Dr 13329: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13330: XEiJ.mpuCycleCount += 6 + (y << 1); 13331: //y %= 9; 13332: y = (y & 7) - (y >> 3); //y=data=-7～7 13333: y += y >> 3 & 9; //y=data=0～8 13334: if (y == 0) { //y=data=0 13335: z = (byte) x; 13336: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13337: } else { //y=data=1～8 13338: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 7 - 4 | (0xff & x) >>> 1; 13339: if (y == 1) { //y=data=1 13340: t = x; //Cは最後に押し出されたビット 13341: } else { //y=data=2～8 13342: z = x << 9 - y | (t = z >>> y - 2) >>> 1; 13343: } 13344: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13345: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13346: } 13347: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13348: break; 13349: case 0b111_000 >> 3: //ROR.B Dq,Dr 13350: default: 13351: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13352: XEiJ.mpuCycleCount += 6 + (y << 1); 13353: if (y == 0) { 13354: z = (byte) x; 13355: t = 0; //Cはクリア 13356: } else { 13357: y &= 7; //y=data=0～7 13358: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << 8 - y | (0xff & x) >>> y)); 13359: t = z >>> 7 & 1; //Cは結果の最上位ビット 13360: } 13361: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13362: } 13363: } //irpXxrToRegByte 13364: 13365: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13366: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13367: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13368: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13369: //ASR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_000_rrr 13370: //LSR.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_001_rrr 13371: //ROXR.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_010_rrr 13372: //ROR.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_011_rrr 13373: //ASR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_100_rrr 13374: //LSR.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_001_101_rrr 13375: //ROXR.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_001_110_rrr 13376: //ROR.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_001_111_rrr 13377: //ASR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_000_rrr [ASR.W #1,Dr] 13378: //LSR.W Dr |A|012346|-|UUUUU|***0*| |1110_001_001_001_rrr [LSR.W #1,Dr] 13379: //ROXR.W Dr |A|012346|-|*UUUU|***0*| |1110_001_001_010_rrr [ROXR.W #1,Dr] 13380: //ROR.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_001_011_rrr [ROR.W #1,Dr] 13381: // 13382: //ASR.W #<data>,Dr 13383: //ASR.W Dq,Dr 13384: //ASR.W <ea> 13385: // 算術右シフトワード 13386: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13387: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13388: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13389: // : 13390: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13391: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13392: // CCR 13393: // X countが0のとき変化しない。他は最後に押し出されたビット 13394: // N 結果の最上位ビット 13395: // Z 結果が0のときセット。他はクリア 13396: // V 常にクリア 13397: // C countが0のときクリア。他は最後に押し出されたビット 13398: // 13399: //LSR.W #<data>,Dr 13400: //LSR.W Dq,Dr 13401: //LSR.W <ea> 13402: // 論理右シフトワード 13403: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13404: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13405: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13406: // : 13407: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13408: // 16 ................0000000000000000 ｱ010ｱ 13409: // 17 ................0000000000000000 00100 13410: // CCR 13411: // X countが0のとき変化しない。他は最後に押し出されたビット 13412: // N 結果の最上位ビット 13413: // Z 結果が0のときセット。他はクリア 13414: // V 常にクリア 13415: // C countが0のときクリア。他は最後に押し出されたビット 13416: // 13417: //ROR.W #<data>,Dr 13418: //ROR.W Dq,Dr 13419: //ROR.W <ea> 13420: // 右ローテートワード 13421: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13422: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13423: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13424: // : 13425: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13426: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13427: // CCR 13428: // X 常に変化しない 13429: // N 結果の最上位ビット 13430: // Z 結果が0のときセット。他はクリア 13431: // V 常にクリア 13432: // C countが0のときクリア。他は結果の最上位ビット 13433: // 13434: //ROXR.W #<data>,Dr 13435: //ROXR.W Dq,Dr 13436: //ROXR.W <ea> 13437: // 拡張右ローテートワード 13438: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13439: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13440: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 13441: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 13442: // : 13443: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13444: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 13445: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13446: // CCR 13447: // X countが0のとき変化しない。他は最後に押し出されたビット 13448: // N 結果の最上位ビット 13449: // Z 結果が0のときセット。他はクリア 13450: // V 常にクリア 13451: // C countが0のときXのコピー。他は最後に押し出されたビット 13452: public static void irpXxrToRegWord () throws M68kException { 13453: int rrr; 13454: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13455: int y; 13456: int z; 13457: int t; 13458: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13459: case 0b000_000 >> 3: //ASR.W #<data>,Dr 13460: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13461: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> y) >> 1); 13462: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13463: break; 13464: case 0b001_000 >> 3: //LSR.W #<data>,Dr 13465: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13466: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = (char) x >>> y) >>> 1); 13467: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13468: break; 13469: case 0b010_000 >> 3: //ROXR.W #<data>,Dr 13470: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13471: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13472: if (y == 1 - 1) { //y=data-1=1-1 13473: t = x; 13474: } else { //y=data-1=2-1～8-1 13475: z = x << 17 - 1 - y | (t = z >>> y - (2 - 1)) >>> 1; 13476: } 13477: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13478: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13479: break; 13480: case 0b011_000 >> 3: //ROR.W #<data>,Dr 13481: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13482: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - 1 - y | (char) x >>> y + 1)); 13483: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 15 & 1; //Xは変化しない。Cは結果の最上位ビット 13484: break; 13485: case 0b100_000 >> 3: //ASR.W Dq,Dr 13486: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13487: XEiJ.mpuCycleCount += 6 + (y << 1); 13488: if (y == 0) { //y=data=0 13489: z = (short) x; 13490: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13491: } else { //y=data=1～63 13492: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (t = (short) x >> (y <= 16 ? y - 1 : 15)) >> 1); 13493: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13494: } 13495: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13496: break; 13497: case 0b101_000 >> 3: //LSR.W Dq,Dr 13498: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13499: XEiJ.mpuCycleCount += 6 + (y << 1); 13500: if (y == 0) { //y=data=0 13501: z = (short) x; 13502: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13503: } else { //y=data=1～63 13504: XEiJ.regRn[rrr] = ~0xffff & x | (z = (t = y <= 16 ? (char) x >>> y - 1 : 0) >>> 1); 13505: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13506: } 13507: break; 13508: case 0b110_000 >> 3: //ROXR.W Dq,Dr 13509: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13510: XEiJ.mpuCycleCount += 6 + (y << 1); 13511: //y %= 17; 13512: y = (y & 15) - (y >> 4); //y=data=-3～15 13513: y += y >> 4 & 17; //y=data=0～16 13514: if (y == 0) { //y=data=0 13515: z = (short) x; 13516: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13517: } else { //y=data=1～16 13518: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | (char) x >>> 1; 13519: if (y == 1) { //y=data=1 13520: t = x; //Cは最後に押し出されたビット 13521: } else { //y=data=2～16 13522: z = x << 17 - y | (t = z >>> y - 2) >>> 1; 13523: } 13524: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 13525: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13526: } 13527: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13528: break; 13529: case 0b111_000 >> 3: //ROR.W Dq,Dr 13530: default: 13531: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13532: XEiJ.mpuCycleCount += 6 + (y << 1); 13533: if (y == 0) { 13534: z = (short) x; 13535: t = 0; //Cはクリア 13536: } else { 13537: y &= 15; //y=data=0～15 13538: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << 16 - y | (char) x >>> y)); 13539: t = z >>> 15 & 1; //Cは結果の最上位ビット 13540: } 13541: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13542: } 13543: } //irpXxrToRegWord 13544: 13545: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13546: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13547: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13548: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13549: //ASR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_000_rrr 13550: //LSR.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_001_rrr 13551: //ROXR.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_010_rrr 13552: //ROR.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_011_rrr 13553: //ASR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_100_rrr 13554: //LSR.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_010_101_rrr 13555: //ROXR.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_010_110_rrr 13556: //ROR.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_010_111_rrr 13557: //ASR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_000_rrr [ASR.L #1,Dr] 13558: //LSR.L Dr |A|012346|-|UUUUU|***0*| |1110_001_010_001_rrr [LSR.L #1,Dr] 13559: //ROXR.L Dr |A|012346|-|*UUUU|***0*| |1110_001_010_010_rrr [ROXR.L #1,Dr] 13560: //ROR.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_010_011_rrr [ROR.L #1,Dr] 13561: // 13562: //ASR.L #<data>,Dr 13563: //ASR.L Dq,Dr 13564: // 算術右シフトロング 13565: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13566: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13567: // 1 ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13568: // : 13569: // 31 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13570: // 32 ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13571: // CCR 13572: // X countが0のとき変化しない。他は最後に押し出されたビット 13573: // N 結果の最上位ビット 13574: // Z 結果が0のときセット。他はクリア 13575: // V 常にクリア 13576: // C countが0のときクリア。他は最後に押し出されたビット 13577: // 13578: //LSR.L #<data>,Dr 13579: //LSR.L Dq,Dr 13580: // 論理右シフトロング 13581: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13582: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13583: // 1 0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐ0*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ==0 13584: // : 13585: // 31 0000000000000000000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 13586: // 32 00000000000000000000000000000000 ｱ010ｱ 13587: // 33 00000000000000000000000000000000 00100 13588: // CCR 13589: // X countが0のとき変化しない。他は最後に押し出されたビット 13590: // N 結果の最上位ビット 13591: // Z 結果が0のときセット。他はクリア 13592: // V 常にクリア 13593: // C countが0のときクリア。他は最後に押し出されたビット 13594: // 13595: //ROR.L #<data>,Dr 13596: //ROR.L Dq,Dr 13597: // 右ローテートロング 13598: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13599: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13600: // 1 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13601: // : 13602: // 31 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13603: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13604: // CCR 13605: // X 常に変化しない 13606: // N 結果の最上位ビット 13607: // Z 結果が0のときセット。他はクリア 13608: // V 常にクリア 13609: // C countが0のときクリア。他は結果の最上位ビット 13610: // 13611: //ROXR.L #<data>,Dr 13612: //ROXR.L Dq,Dr 13613: // 拡張右ローテートロング 13614: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 13615: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13616: // 1 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 13617: // 2 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 13618: // : 13619: // 31 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13620: // 32 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 13621: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 13622: // CCR 13623: // X countが0のとき変化しない。他は最後に押し出されたビット 13624: // N 結果の最上位ビット 13625: // Z 結果が0のときセット。他はクリア 13626: // V 常にクリア 13627: // C countが0のときXのコピー。他は最後に押し出されたビット 13628: public static void irpXxrToRegLong () throws M68kException { 13629: int rrr; 13630: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13631: int y; 13632: int z; 13633: int t; 13634: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13635: case 0b000_000 >> 3: //ASR.L #<data>,Dr 13636: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13637: XEiJ.regRn[rrr] = z = (t = x >> y) >> 1; 13638: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13639: break; 13640: case 0b001_000 >> 3: //LSR.L #<data>,Dr 13641: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13642: XEiJ.regRn[rrr] = z = (t = x >>> y) >>> 1; 13643: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13644: break; 13645: case 0b010_000 >> 3: //ROXR.L #<data>,Dr 13646: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13647: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13648: if (y == 1 - 1) { //y=data-1=1-1 13649: t = x; 13650: } else { //y=data-1=2-1～8-1 13651: z = x << -y | (t = z >>> y - (2 - 1)) >>> 1; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 13652: } 13653: XEiJ.regRn[rrr] = z; 13654: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13655: break; 13656: case 0b011_000 >> 3: //ROR.L #<data>,Dr 13657: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13658: XEiJ.regRn[rrr] = z = x << ~y | x >>> y + 1; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 13659: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z >>> 31; //Xは変化しない。Cは結果の最上位ビット 13660: break; 13661: case 0b100_000 >> 3: //ASR.L Dq,Dr 13662: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13663: XEiJ.mpuCycleCount += 6 + (y << 1); 13664: if (y == 0) { //y=data=0 13665: z = x; 13666: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13667: } else { //y=data=1～63 13668: XEiJ.regRn[rrr] = z = (t = x >> (y <= 32 ? y - 1 : 31)) >> 1; 13669: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13670: } 13671: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13672: break; 13673: case 0b101_000 >> 3: //LSR.L Dq,Dr 13674: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13675: XEiJ.mpuCycleCount += 6 + (y << 1); 13676: if (y == 0) { //y=data=0 13677: z = x; 13678: XEiJ.regCCR = XEiJ.regCCR & XEiJ.REG_CCR_X | (z < 0 ? XEiJ.REG_CCR_N : z == 0 ? XEiJ.REG_CCR_Z : 0); //Xは変化しない。Cはクリア 13679: } else { //y=data=1～63 13680: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x >>> y - 1 : 0) >>> 1; 13681: XEiJ.regCCR = (z == 0 ? XEiJ.REG_CCR_Z : 0) | -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13682: } 13683: break; 13684: case 0b110_000 >> 3: //ROXR.L Dq,Dr 13685: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13686: XEiJ.mpuCycleCount += 6 + (y << 1); 13687: //y %= 33; 13688: y -= 32 - y >> 6 & 33; //y=data=0～32 13689: if (y == 0) { //y=data=0 13690: z = x; 13691: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13692: } else { //y=data=1～32 13693: z = (XEiJ.regCCR & XEiJ.REG_CCR_X) << 31 - 4 | x >>> 1; 13694: if (y == 1) { //y=data=1 13695: t = x; //Cは最後に押し出されたビット 13696: } else { //y=data=2～32 13697: z = x << 33 - y | (t = z >>> y - 2) >>> 1; 13698: } 13699: XEiJ.regRn[rrr] = z; 13700: t = -(t & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13701: } 13702: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13703: break; 13704: case 0b111_000 >> 3: //ROR.L Dq,Dr 13705: default: 13706: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13707: XEiJ.mpuCycleCount += 6 + (y << 1); 13708: if (y == 0) { 13709: z = x; 13710: t = 0; //Cはクリア 13711: } else { 13712: y &= 31; //y=data=0～31 13713: XEiJ.regRn[rrr] = z = x << -y | x >>> y; //Javaのシフト演算子は5ビットでマスクされるので32-yを-yに省略。y=32のときx|xになるが問題ない 13714: t = z >>> 31; //Cは結果の最上位ビット 13715: } 13716: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13717: } 13718: } //irpXxrToRegLong 13719: 13720: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13721: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13722: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13723: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13724: //ASR.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_000_011_mmm_rrr 13725: // 13726: //ASR.W #<data>,Dr 13727: //ASR.W Dq,Dr 13728: //ASR.W <ea> 13729: // 算術右シフトワード 13730: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13731: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13732: // 1 ................ｱｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 13733: // : 13734: // 15 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｲｱ*0ｲ Z=ｱ==0 13735: // 16 ................ｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱｱ ｱｱ*0ｱ Z=ｱ==0 13736: // CCR 13737: // X countが0のとき変化しない。他は最後に押し出されたビット 13738: // N 結果の最上位ビット 13739: // Z 結果が0のときセット。他はクリア 13740: // V 常にクリア 13741: // C countが0のときクリア。他は最後に押し出されたビット 13742: public static void irpAsrToMem () throws M68kException { 13743: XEiJ.mpuCycleCount += 8; 13744: int ea = XEiJ.regOC & 63; 13745: int a = efaMltWord (ea); 13746: int x = XEiJ.busRws (a); 13747: int z = x >> 1; 13748: XEiJ.busWw (a, z); 13749: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 13750: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 13751: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 13752: } //irpAsrToMem 13753: 13754: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13755: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13756: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13757: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13758: //ASL.B #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_000_rrr 13759: //LSL.B #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_001_rrr 13760: //ROXL.B #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_010_rrr 13761: //ROL.B #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_011_rrr 13762: //ASL.B Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_100_100_rrr 13763: //LSL.B Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_100_101_rrr 13764: //ROXL.B Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_100_110_rrr 13765: //ROL.B Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_100_111_rrr 13766: //ASL.B Dr |A|012346|-|UUUUU|*****| |1110_001_100_000_rrr [ASL.B #1,Dr] 13767: //LSL.B Dr |A|012346|-|UUUUU|***0*| |1110_001_100_001_rrr [LSL.B #1,Dr] 13768: //ROXL.B Dr |A|012346|-|*UUUU|***0*| |1110_001_100_010_rrr [ROXL.B #1,Dr] 13769: //ROL.B Dr |A|012346|-|-UUUU|-**0*| |1110_001_100_011_rrr [ROL.B #1,Dr] 13770: // 13771: //ASL.B #<data>,Dr 13772: //ASL.B Dq,Dr 13773: // 算術左シフトバイト 13774: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13775: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13776: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸ==0,V=ｱｲ!=0/-1 13777: // : 13778: // 7 ........................ｸ0000000 ｷｸ**ｷ Z=ｸ==0,V=ｱｲｳｴｵｶｷｸ!=0/-1 13779: // 8 ........................00000000 ｸ01*ｸ V=ｱｲｳｴｵｶｷｸ!=0 13780: // 9 ........................00000000 001*0 V=ｱｲｳｴｵｶｷｸ!=0 13781: // CCR 13782: // X countが0のとき変化しない。他は最後に押し出されたビット 13783: // N 結果の最上位ビット 13784: // Z 結果が0のときセット。他はクリア 13785: // V ASRで元に戻せないときセット。他はクリア 13786: // C countが0のときクリア。他は最後に押し出されたビット 13787: // 13788: //LSL.B #<data>,Dr 13789: //LSL.B Dq,Dr 13790: // 論理左シフトバイト 13791: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13792: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13793: // 1 ........................ｲｳｴｵｶｷｸ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸ==0 13794: // : 13795: // 7 ........................ｸ0000000 ｷｸ*0ｷ Z=ｸ==0 13796: // 8 ........................00000000 ｸ010ｸ 13797: // 9 ........................00000000 00100 13798: // CCR 13799: // X countが0のとき変化しない。他は最後に押し出されたビット 13800: // N 結果の最上位ビット 13801: // Z 結果が0のときセット。他はクリア 13802: // V 常にクリア 13803: // C countが0のときクリア。他は最後に押し出されたビット 13804: // 13805: //ROL.B #<data>,Dr 13806: //ROL.B Dq,Dr 13807: // 左ローテートバイト 13808: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13809: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*00 Z=ｱｲｳｴｵｶｷｸ==0 13810: // 1 ........................ｲｳｴｵｶｷｸｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸ==0 13811: // : 13812: // 7 ........................ｸｱｲｳｴｵｶｷ Xｸ*0ｷ Z=ｱｲｳｴｵｶｷｸ==0 13813: // 8 ........................ｱｲｳｴｵｶｷｸ Xｱ*0ｸ Z=ｱｲｳｴｵｶｷｸ==0 13814: // CCR 13815: // X 常に変化しない 13816: // N 結果の最上位ビット 13817: // Z 結果が0のときセット。他はクリア 13818: // V 常にクリア 13819: // C countが0のときクリア。他は結果の最下位ビット 13820: // 13821: //ROXL.B #<data>,Dr 13822: //ROXL.B Dq,Dr 13823: // 拡張左ローテートバイト 13824: // ........................ｱｲｳｴｵｶｷｸ XNZVC 13825: // 0 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13826: // 1 ........................ｲｳｴｵｶｷｸX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸX==0 13827: // 2 ........................ｳｴｵｶｷｸXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸX==0 13828: // : 13829: // 7 ........................ｸXｱｲｳｴｵｶ ｷｸ*0ｷ Z=ｱｲｳｴｵｶｸX==0 13830: // 8 ........................Xｱｲｳｴｵｶｷ ｸX*0ｸ Z=ｱｲｳｴｵｶｷX==0 13831: // 9 ........................ｱｲｳｴｵｶｷｸ Xｱ*0X Z=ｱｲｳｴｵｶｷｸ==0 13832: // CCR 13833: // X countが0のとき変化しない。他は最後に押し出されたビット 13834: // N 結果の最上位ビット 13835: // Z 結果が0のときセット。他はクリア 13836: // V 常にクリア 13837: // C countが0のときXのコピー。他は最後に押し出されたビット 13838: public static void irpXxlToRegByte () throws M68kException { 13839: int rrr; 13840: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 13841: int y; 13842: int z; 13843: int t; 13844: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 13845: case 0b000_000 >> 3: //ASL.B #<data>,Dr 13846: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13847: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13848: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13849: break; 13850: case 0b001_000 >> 3: //LSL.B #<data>,Dr 13851: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13852: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y) << 1)); 13853: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13854: break; 13855: case 0b010_000 >> 3: //ROXL.B #<data>,Dr 13856: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 13857: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13858: if (y == 1 - 1) { //y=data-1=1-1 13859: t = x; 13860: } else { //y=data-1=2-1～8-1 13861: z = (t = z << y - (2 - 1)) << 1 | (0xff & x) >>> 9 - 1 - y; 13862: } 13863: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13864: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13865: break; 13866: case 0b011_000 >> 3: //ROL.B #<data>,Dr 13867: XEiJ.mpuCycleCount += 6 + ((y = XEiJ.regOC >> 9 & 7) << 1); //y=data&7 13868: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 13869: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 13870: break; 13871: case 0b100_000 >> 3: //ASL.B Dq,Dr 13872: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13873: XEiJ.mpuCycleCount += 6 + (y << 1); 13874: if (y <= 7) { //y=data=0～7 13875: if (y == 0) { //y=data=0 13876: z = (byte) x; 13877: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 13878: } else { //y=data=1～7 13879: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = x << y - 1) << 1)); 13880: t = (z >> y != (byte) x ? XEiJ.REG_CCR_V : 0) | (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 13881: } 13882: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13883: } else { //y=data=8～63 13884: XEiJ.regRn[rrr] = ~0xff & x; 13885: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((byte) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 8 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 13886: } 13887: break; 13888: case 0b101_000 >> 3: //LSL.B Dq,Dr 13889: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13890: XEiJ.mpuCycleCount += 6 + (y << 1); 13891: if (y == 0) { //y=data=0 13892: z = (byte) x; 13893: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 13894: } else { //y=data=1～63 13895: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) ((t = y <= 8 ? x << y - 1 : 0) << 1)); 13896: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13897: } 13898: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13899: break; 13900: case 0b110_000 >> 3: //ROXL.B Dq,Dr 13901: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13902: XEiJ.mpuCycleCount += 6 + (y << 1); 13903: //y %= 9; 13904: y = (y & 7) - (y >> 3); //y=data=-7～7 13905: y += y >> 3 & 9; //y=data=0～8 13906: if (y == 0) { //y=data=0 13907: z = (byte) x; 13908: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 13909: } else { //y=data=1～8 13910: z = x << 1 | XEiJ.regCCR >> 4 & 1; 13911: if (y == 1) { //y=data=1 13912: t = x; //Cは最後に押し出されたビット 13913: } else { //y=data=2～8 13914: z = (t = z << y - 2) << 1 | (0xff & x) >>> 9 - y; 13915: } 13916: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) z); 13917: t = (byte) t >> 7 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 13918: } 13919: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 13920: break; 13921: case 0b111_000 >> 3: //ROL.B Dq,Dr 13922: default: 13923: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 13924: XEiJ.mpuCycleCount += 6 + (y << 1); 13925: if (y == 0) { 13926: z = (byte) x; 13927: t = 0; //Cはクリア 13928: } else { 13929: y &= 7; //y=data=0～7 13930: XEiJ.regRn[rrr] = ~0xff & x | 0xff & (z = (byte) (x << y | (0xff & x) >>> 8 - y)); 13931: t = z & 1; //Cは結果の最下位ビット 13932: } 13933: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 13934: } 13935: } //irpXxlToRegByte 13936: 13937: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13938: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 13939: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 13940: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 13941: //ASL.W #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_000_rrr 13942: //LSL.W #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_001_rrr 13943: //ROXL.W #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_010_rrr 13944: //ROL.W #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_011_rrr 13945: //ASL.W Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_101_100_rrr 13946: //LSL.W Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_101_101_rrr 13947: //ROXL.W Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_101_110_rrr 13948: //ROL.W Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_101_111_rrr 13949: //ASL.W Dr |A|012346|-|UUUUU|*****| |1110_001_101_000_rrr [ASL.W #1,Dr] 13950: //LSL.W Dr |A|012346|-|UUUUU|***0*| |1110_001_101_001_rrr [LSL.W #1,Dr] 13951: //ROXL.W Dr |A|012346|-|*UUUU|***0*| |1110_001_101_010_rrr [ROXL.W #1,Dr] 13952: //ROL.W Dr |A|012346|-|-UUUU|-**0*| |1110_001_101_011_rrr [ROL.W #1,Dr] 13953: // 13954: //ASL.W #<data>,Dr 13955: //ASL.W Dq,Dr 13956: //ASL.W <ea> 13957: // 算術左シフトワード 13958: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13959: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13960: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 13961: // : 13962: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 13963: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 13964: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 13965: // CCR 13966: // X countが0のとき変化しない。他は最後に押し出されたビット 13967: // N 結果の最上位ビット 13968: // Z 結果が0のときセット。他はクリア 13969: // V ASRで元に戻せないときセット。他はクリア 13970: // C countが0のときクリア。他は最後に押し出されたビット 13971: // 13972: //LSL.W #<data>,Dr 13973: //LSL.W Dq,Dr 13974: //LSL.W <ea> 13975: // 論理左シフトワード 13976: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13977: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13978: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13979: // : 13980: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 13981: // 16 ................0000000000000000 ﾀ010ﾀ 13982: // 17 ................0000000000000000 00100 13983: // CCR 13984: // X countが0のとき変化しない。他は最後に押し出されたビット 13985: // N 結果の最上位ビット 13986: // Z 結果が0のときセット。他はクリア 13987: // V 常にクリア 13988: // C countが0のときクリア。他は最後に押し出されたビット 13989: // 13990: //ROL.W #<data>,Dr 13991: //ROL.W Dq,Dr 13992: //ROL.W <ea> 13993: // 左ローテートワード 13994: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 13995: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13996: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13997: // : 13998: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 13999: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14000: // CCR 14001: // X 常に変化しない 14002: // N 結果の最上位ビット 14003: // Z 結果が0のときセット。他はクリア 14004: // V 常にクリア 14005: // C countが0のときクリア。他は結果の最下位ビット 14006: // 14007: //ROXL.W #<data>,Dr 14008: //ROXL.W Dq,Dr 14009: //ROXL.W <ea> 14010: // 拡張左ローテートワード 14011: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14012: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14013: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14014: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14015: // : 14016: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14017: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14018: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14019: // CCR 14020: // X countが0のとき変化しない。他は最後に押し出されたビット 14021: // N 結果の最上位ビット 14022: // Z 結果が0のときセット。他はクリア 14023: // V 常にクリア 14024: // C countが0のときXのコピー。他は最後に押し出されたビット 14025: public static void irpXxlToRegWord () throws M68kException { 14026: int rrr; 14027: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 14028: int y; 14029: int z; 14030: int t; 14031: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 14032: case 0b000_000 >> 3: //ASL.W #<data>,Dr 14033: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14034: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 14035: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14036: break; 14037: case 0b001_000 >> 3: //LSL.W #<data>,Dr 14038: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14039: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y) << 1)); 14040: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14041: break; 14042: case 0b010_000 >> 3: //ROXL.W #<data>,Dr 14043: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14044: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14045: if (y == 1 - 1) { //y=data-1=1-1 14046: t = x; 14047: } else { //y=data-1=2-1～8-1 14048: z = (t = z << y - (2 - 1)) << 1 | (char) x >>> 17 - 1 - y; 14049: } 14050: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 14051: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14052: break; 14053: case 0b011_000 >> 3: //ROL.W #<data>,Dr 14054: XEiJ.mpuCycleCount += 6 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14055: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y + 1 | (char) x >>> 16 - 1 - y)); 14056: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 14057: break; 14058: case 0b100_000 >> 3: //ASL.W Dq,Dr 14059: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14060: XEiJ.mpuCycleCount += 6 + (y << 1); 14061: if (y <= 15) { //y=data=0～15 14062: if (y == 0) { //y=data=0 14063: z = (short) x; 14064: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 14065: } else { //y=data=1～15 14066: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = x << y - 1) << 1)); 14067: t = (z >> y != (short) x ? XEiJ.REG_CCR_V : 0) | (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14068: } 14069: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14070: } else { //y=data=16～63 14071: XEiJ.regRn[rrr] = ~0xffff & x; 14072: XEiJ.regCCR = XEiJ.REG_CCR_Z | ((short) x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 16 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 14073: } 14074: break; 14075: case 0b101_000 >> 3: //LSL.W Dq,Dr 14076: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14077: XEiJ.mpuCycleCount += 6 + (y << 1); 14078: if (y == 0) { //y=data=0 14079: z = (short) x; 14080: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 14081: } else { //y=data=1～63 14082: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) ((t = y <= 16 ? x << y - 1 : 0) << 1)); 14083: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14084: } 14085: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14086: break; 14087: case 0b110_000 >> 3: //ROXL.W Dq,Dr 14088: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14089: XEiJ.mpuCycleCount += 6 + (y << 1); 14090: //y %= 17; 14091: y = (y & 15) - (y >> 4); //y=data=-3～15 14092: y += y >> 4 & 17; //y=data=0～16 14093: if (y == 0) { //y=data=0 14094: z = (short) x; 14095: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 14096: } else { //y=data=1～16 14097: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14098: if (y == 1) { //y=data=1 14099: t = x; //Cは最後に押し出されたビット 14100: } else { //y=data=2～16 14101: z = (t = z << y - 2) << 1 | (char) x >>> 17 - y; 14102: } 14103: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) z); 14104: t = (short) t >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14105: } 14106: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14107: break; 14108: case 0b111_000 >> 3: //ROL.W Dq,Dr 14109: default: 14110: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14111: XEiJ.mpuCycleCount += 6 + (y << 1); 14112: if (y == 0) { 14113: z = (short) x; 14114: t = 0; //Cはクリア 14115: } else { 14116: y &= 15; //y=data=0～15 14117: XEiJ.regRn[rrr] = ~0xffff & x | (char) (z = (short) (x << y | (char) x >>> 16 - y)); 14118: t = z & 1; //Cは結果の最下位ビット 14119: } 14120: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14121: } 14122: } //irpXxlToRegWord 14123: 14124: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14125: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14126: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14127: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14128: //ASL.L #<data>,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_000_rrr 14129: //LSL.L #<data>,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_001_rrr 14130: //ROXL.L #<data>,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_010_rrr 14131: //ROL.L #<data>,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_011_rrr 14132: //ASL.L Dq,Dr |-|012346|-|UUUUU|*****| |1110_qqq_110_100_rrr 14133: //LSL.L Dq,Dr |-|012346|-|UUUUU|***0*| |1110_qqq_110_101_rrr 14134: //ROXL.L Dq,Dr |-|012346|-|*UUUU|***0*| |1110_qqq_110_110_rrr 14135: //ROL.L Dq,Dr |-|012346|-|-UUUU|-**0*| |1110_qqq_110_111_rrr 14136: //ASL.L Dr |A|012346|-|UUUUU|*****| |1110_001_110_000_rrr [ASL.L #1,Dr] 14137: //LSL.L Dr |A|012346|-|UUUUU|***0*| |1110_001_110_001_rrr [LSL.L #1,Dr] 14138: //ROXL.L Dr |A|012346|-|*UUUU|***0*| |1110_001_110_010_rrr [ROXL.L #1,Dr] 14139: //ROL.L Dr |A|012346|-|-UUUU|-**0*| |1110_001_110_011_rrr [ROL.L #1,Dr] 14140: // 14141: //ASL.L #<data>,Dr 14142: //ASL.L Dq,Dr 14143: // 算術左シフトロング 14144: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14145: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ**0 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14146: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0,V=ｱｲ!=0/-1 14147: // : 14148: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ**ﾏ Z=ﾐ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0/-1 14149: // 32 00000000000000000000000000000000 ﾐ01*ﾐ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14150: // 33 00000000000000000000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ!=0 14151: // CCR 14152: // X countが0のとき変化しない。他は最後に押し出されたビット 14153: // N 結果の最上位ビット 14154: // Z 結果が0のときセット。他はクリア 14155: // V ASRで元に戻せないときセット。他はクリア 14156: // C countが0のときクリア。他は最後に押し出されたビット 14157: // 14158: //LSL.L #<data>,Dr 14159: //LSL.L Dq,Dr 14160: // 論理左シフトロング 14161: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14162: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14163: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14164: // : 14165: // 31 ﾐ0000000000000000000000000000000 ﾏﾐ*0ﾏ Z=ﾐ==0 14166: // 32 00000000000000000000000000000000 ﾐ010ﾐ 14167: // 33 00000000000000000000000000000000 00100 14168: // CCR 14169: // X countが0のとき変化しない。他は最後に押し出されたビット 14170: // N 結果の最上位ビット 14171: // Z 結果が0のときセット。他はクリア 14172: // V 常にクリア 14173: // C countが0のときクリア。他は最後に押し出されたビット 14174: // 14175: //ROL.L #<data>,Dr 14176: //ROL.L Dq,Dr 14177: // 左ローテートロング 14178: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14179: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14180: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14181: // : 14182: // 31 ﾐｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ Xﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14183: // 32 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14184: // CCR 14185: // X 常に変化しない 14186: // N 結果の最上位ビット 14187: // Z 結果が0のときセット。他はクリア 14188: // V 常にクリア 14189: // C countが0のときクリア。他は結果の最下位ビット 14190: // 14191: //ROXL.L #<data>,Dr 14192: //ROXL.L Dq,Dr 14193: // 拡張左ローテートロング 14194: // ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ XNZVC 14195: // 0 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14196: // 1 ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14197: // 2 ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐX==0 14198: // : 14199: // 31 ﾐXｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎ ﾏﾐ*0ﾏ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾐX==0 14200: // 32 Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏ ﾐX*0ﾐ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏX==0 14201: // 33 ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀﾁﾂﾃﾄﾅﾆﾇﾈﾉﾊﾋﾌﾍﾎﾏﾐ==0 14202: // CCR 14203: // X countが0のとき変化しない。他は最後に押し出されたビット 14204: // N 結果の最上位ビット 14205: // Z 結果が0のときセット。他はクリア 14206: // V 常にクリア 14207: // C countが0のときXのコピー。他は最後に押し出されたビット 14208: public static void irpXxlToRegLong () throws M68kException { 14209: int rrr; 14210: int x = XEiJ.regRn[rrr = XEiJ.regOC & 7]; 14211: int y; 14212: int z; 14213: int t; 14214: switch (XEiJ.regOC >> 3 & 0b111_000 >> 3) { 14215: case 0b000_000 >> 3: //ASL.L #<data>,Dr 14216: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14217: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14218: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | (z >> y + 1 != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14219: break; 14220: case 0b001_000 >> 3: //LSL.L #<data>,Dr 14221: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14222: XEiJ.regRn[rrr] = z = (t = x << y) << 1; 14223: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14224: break; 14225: case 0b010_000 >> 3: //ROXL.L #<data>,Dr 14226: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14227: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14228: if (y == 1 - 1) { //y=data-1=1-1 14229: t = x; 14230: } else { //y=data-1=2-1～8-1 14231: z = (t = z << y - (2 - 1)) << 1 | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるので33-1-yを-yに省略 14232: } 14233: XEiJ.regRn[rrr] = z; 14234: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14235: break; 14236: case 0b011_000 >> 3: //ROL.L #<data>,Dr 14237: XEiJ.mpuCycleCount += 8 + 2 + ((y = (XEiJ.regOC >> 9) - 1 & 7) << 1); //y=data-1=1-1～8-1 14238: XEiJ.regRn[rrr] = z = x << y + 1 | x >>> ~y; //Javaのシフト演算子は5ビットでマスクされるので32-1-yを~yに省略 14239: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | z & 1; //Xは変化しない。Cは結果の最下位ビット 14240: break; 14241: case 0b100_000 >> 3: //ASL.L Dq,Dr 14242: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14243: XEiJ.mpuCycleCount += 8 + (y << 1); 14244: if (y <= 31) { //y=data=0～31 14245: if (y == 0) { //y=data=0 14246: z = x; 14247: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。VとCはクリア 14248: } else { //y=data=1～31 14249: XEiJ.regRn[rrr] = z = (t = x << y - 1) << 1; 14250: t = (z >> y != x ? XEiJ.REG_CCR_V : 0) | t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //VはASRで元に戻せないときセット。XとCは最後に押し出されたビット 14251: } 14252: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14253: } else { //y=data=32～63 14254: XEiJ.regRn[rrr] = 0; 14255: XEiJ.regCCR = XEiJ.REG_CCR_Z | (x != 0 ? XEiJ.REG_CCR_V : 0) | (y == 32 ? -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C) : 0); 14256: } 14257: break; 14258: case 0b101_000 >> 3: //LSL.L Dq,Dr 14259: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14260: XEiJ.mpuCycleCount += 8 + (y << 1); 14261: if (y == 0) { //y=data=0 14262: z = x; 14263: t = XEiJ.regCCR & XEiJ.REG_CCR_X; //Xは変化しない。Cはクリア 14264: } else { //y=data=1～63 14265: XEiJ.regRn[rrr] = z = (t = y <= 32 ? x << y - 1 : 0) << 1; 14266: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14267: } 14268: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14269: break; 14270: case 0b110_000 >> 3: //ROXL.L Dq,Dr 14271: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14272: XEiJ.mpuCycleCount += 8 + (y << 1); 14273: //y %= 33; 14274: y -= 32 - y >> 6 & 33; //y=data=0～32 14275: if (y == 0) { //y=data=0 14276: z = x; 14277: t = -(XEiJ.regCCR >> 4 & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //Xは変化しない。CはXのコピー 14278: } else { //y=data=1～32 14279: z = x << 1 | XEiJ.regCCR >> 4 & 1; 14280: if (y == 1) { //y=data=1 14281: t = x; //Cは最後に押し出されたビット 14282: } else { //y=data=2～32 14283: z = (t = z << y - 2) << 1 | x >>> 33 - y; 14284: } 14285: XEiJ.regRn[rrr] = z; 14286: t = t >> 31 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); //XとCは最後に押し出されたビット 14287: } 14288: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.REG_CCR_Z : 0) | t; 14289: break; 14290: case 0b111_000 >> 3: //ROL.L Dq,Dr 14291: default: 14292: y = XEiJ.regRn[XEiJ.regOC >> 9 & 7] & 63; //y=0～63。Javaのシフト演算子は5ビットでマスクされることに注意 14293: XEiJ.mpuCycleCount += 8 + (y << 1); 14294: if (y == 0) { 14295: z = x; 14296: t = 0; //Cはクリア 14297: } else { 14298: XEiJ.regRn[rrr] = z = x << y | x >>> -y; //Javaのシフト演算子は5ビットでマスクされるのでy&31をyに、32-(y&31)を-yに省略。y=32のときx|xになるが問題ない 14299: t = z & 1; 14300: } 14301: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X) | t; //Xは変化しない 14302: } 14303: } //irpXxlToRegLong 14304: 14305: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14306: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14307: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14308: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14309: //ASL.W <ea> |-|012346|-|UUUUU|*****| M+-WXZ |1110_000_111_mmm_rrr 14310: // 14311: //ASL.W #<data>,Dr 14312: //ASL.W Dq,Dr 14313: //ASL.W <ea> 14314: // 算術左シフトワード 14315: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14316: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14317: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ**ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0,V=ｱｲ!=0/-1 14318: // : 14319: // 15 ................ﾀ000000000000000 ｿﾀ**ｿ Z=ﾀ==0,V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0/-1 14320: // 16 ................0000000000000000 ﾀ01*ﾀ V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14321: // 17 ................0000000000000000 001*0 V=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ!=0 14322: // CCR 14323: // X countが0のとき変化しない。他は最後に押し出されたビット 14324: // N 結果の最上位ビット 14325: // Z 結果が0のときセット。他はクリア 14326: // V ASRで元に戻せないときセット。他はクリア 14327: // C countが0のときクリア。他は最後に押し出されたビット 14328: public static void irpAslToMem () throws M68kException { 14329: XEiJ.mpuCycleCount += 8; 14330: int ea = XEiJ.regOC & 63; 14331: int a = efaMltWord (ea); 14332: int x = XEiJ.busRws (a); 14333: int z = (short) (x << 1); 14334: XEiJ.busWw (a, z); 14335: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14336: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14337: (x ^ z) >>> 31 << 1 | //Vは最上位ビットが変化したときセット 14338: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14339: } //irpAslToMem 14340: 14341: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14342: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14343: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14344: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14345: //LSR.W <ea> |-|012346|-|UUUUU|*0*0*| M+-WXZ |1110_001_011_mmm_rrr 14346: // 14347: //LSR.W #<data>,Dr 14348: //LSR.W Dq,Dr 14349: //LSR.W <ea> 14350: // 論理右シフトワード 14351: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14352: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14353: // 1 ................0ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀ0*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ==0 14354: // : 14355: // 15 ................000000000000000ｱ ｲ0*0ｲ Z=ｱ==0 14356: // 16 ................0000000000000000 ｱ010ｱ 14357: // 17 ................0000000000000000 00100 14358: // CCR 14359: // X countが0のとき変化しない。他は最後に押し出されたビット 14360: // N 結果の最上位ビット 14361: // Z 結果が0のときセット。他はクリア 14362: // V 常にクリア 14363: // C countが0のときクリア。他は最後に押し出されたビット 14364: public static void irpLsrToMem () throws M68kException { 14365: XEiJ.mpuCycleCount += 8; 14366: int ea = XEiJ.regOC & 63; 14367: int a = efaMltWord (ea); 14368: int x = XEiJ.busRwz (a); 14369: int z = x >>> 1; 14370: XEiJ.busWw (a, z); 14371: XEiJ.regCCR = ((z == 0 ? XEiJ.REG_CCR_Z : 0) | 14372: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14373: } //irpLsrToMem 14374: 14375: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14376: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14377: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14378: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14379: //LSL.W <ea> |-|012346|-|UUUUU|***0*| M+-WXZ |1110_001_111_mmm_rrr 14380: // 14381: //LSL.W #<data>,Dr 14382: //LSL.W Dq,Dr 14383: //LSL.W <ea> 14384: // 論理左シフトワード 14385: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14386: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14387: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ0 ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14388: // : 14389: // 15 ................ﾀ000000000000000 ｿﾀ*0ｿ Z=ﾀ==0 14390: // 16 ................0000000000000000 ﾀ010ﾀ 14391: // 17 ................0000000000000000 00100 14392: // CCR 14393: // X countが0のとき変化しない。他は最後に押し出されたビット 14394: // N 結果の最上位ビット 14395: // Z 結果が0のときセット。他はクリア 14396: // V 常にクリア 14397: // C countが0のときクリア。他は最後に押し出されたビット 14398: public static void irpLslToMem () throws M68kException { 14399: XEiJ.mpuCycleCount += 8; 14400: int ea = XEiJ.regOC & 63; 14401: int a = efaMltWord (ea); 14402: int x = XEiJ.busRws (a); 14403: int z = (short) (x << 1); 14404: XEiJ.busWw (a, z); 14405: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14406: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14407: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14408: } //irpLslToMem 14409: 14410: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14411: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14412: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14413: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14414: //ROXR.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_011_mmm_rrr 14415: // 14416: //ROXR.W #<data>,Dr 14417: //ROXR.W Dq,Dr 14418: //ROXR.W <ea> 14419: // 拡張右ローテートワード 14420: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14421: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14422: // 1 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14423: // 2 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14424: // : 14425: // 15 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14426: // 16 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14427: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14428: // CCR 14429: // X countが0のとき変化しない。他は最後に押し出されたビット 14430: // N 結果の最上位ビット 14431: // Z 結果が0のときセット。他はクリア 14432: // V 常にクリア 14433: // C countが0のときXのコピー。他は最後に押し出されたビット 14434: public static void irpRoxrToMem () throws M68kException { 14435: XEiJ.mpuCycleCount += 8; 14436: int ea = XEiJ.regOC & 63; 14437: int a = efaMltWord (ea); 14438: int x = XEiJ.busRwz (a); 14439: int z = -(XEiJ.regCCR & XEiJ.REG_CCR_X) << 15 - 4 | x >>> 1; 14440: XEiJ.busWw (a, z); 14441: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14442: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14443: -(x & 1) & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14444: } //irpRoxrToMem 14445: 14446: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14447: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14448: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14449: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14450: //ROXL.W <ea> |-|012346|-|*UUUU|***0*| M+-WXZ |1110_010_111_mmm_rrr 14451: // 14452: //ROXL.W #<data>,Dr 14453: //ROXL.W Dq,Dr 14454: //ROXL.W <ea> 14455: // 拡張左ローテートワード 14456: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14457: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14458: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX ｱｲ*0ｱ Z=ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14459: // 2 ................ｳｴｵｶｷｸｹｺｻｼｽｾｿﾀXｱ ｲｳ*0ｲ Z=ｱｳｴｵｶｷｸｹｺｻｼｽｾｿﾀX==0 14460: // : 14461: // 15 ................ﾀXｱｲｳｴｵｶｷｸｹｺｻｼｽｾ ｿﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾﾀX==0 14462: // 16 ................Xｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ ﾀX*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿX==0 14463: // 17 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0X Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14464: // CCR 14465: // X countが0のとき変化しない。他は最後に押し出されたビット 14466: // N 結果の最上位ビット 14467: // Z 結果が0のときセット。他はクリア 14468: // V 常にクリア 14469: // C countが0のときXのコピー。他は最後に押し出されたビット 14470: public static void irpRoxlToMem () throws M68kException { 14471: XEiJ.mpuCycleCount += 8; 14472: int ea = XEiJ.regOC & 63; 14473: int a = efaMltWord (ea); 14474: int x = XEiJ.busRws (a); 14475: int z = (short) (x << 1 | XEiJ.regCCR >> 4 & 1); 14476: XEiJ.busWw (a, z); 14477: XEiJ.regCCR = ((z < 0 ? XEiJ.REG_CCR_N : 0) | 14478: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14479: x >> 15 & (XEiJ.REG_CCR_X | XEiJ.REG_CCR_C)); //XとCは最後に押し出されたビット 14480: } //irpRoxlToMem 14481: 14482: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14483: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14484: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14485: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14486: //ROR.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_011_mmm_rrr 14487: // 14488: //ROR.W #<data>,Dr 14489: //ROR.W Dq,Dr 14490: //ROR.W <ea> 14491: // 右ローテートワード 14492: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14493: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14494: // 1 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14495: // : 14496: // 15 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｲ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14497: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14498: // CCR 14499: // X 常に変化しない 14500: // N 結果の最上位ビット 14501: // Z 結果が0のときセット。他はクリア 14502: // V 常にクリア 14503: // C countが0のときクリア。他は結果の最上位ビット 14504: public static void irpRorToMem () throws M68kException { 14505: XEiJ.mpuCycleCount += 8; 14506: int ea = XEiJ.regOC & 63; 14507: int a = efaMltWord (ea); 14508: int x = XEiJ.busRwz (a); 14509: int z = (short) (x << 15 | x >>> 1); 14510: XEiJ.busWw (a, z); 14511: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14512: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14513: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14514: z >>> 31); //Cは結果の最上位ビット 14515: } //irpRorToMem 14516: 14517: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14518: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14519: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14520: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14521: //ROL.W <ea> |-|012346|-|-UUUU|-**0*| M+-WXZ |1110_011_111_mmm_rrr 14522: // 14523: //ROL.W #<data>,Dr 14524: //ROL.W Dq,Dr 14525: //ROL.W <ea> 14526: // 左ローテートワード 14527: // ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ XNZVC 14528: // 0 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*00 Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14529: // 1 ................ｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀｱ Xｲ*0ｱ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14530: // : 14531: // 15 ................ﾀｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿ Xﾀ*0ｿ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14532: // 16 ................ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ Xｱ*0ﾀ Z=ｱｲｳｴｵｶｷｸｹｺｻｼｽｾｿﾀ==0 14533: // CCR 14534: // X 常に変化しない 14535: // N 結果の最上位ビット 14536: // Z 結果が0のときセット。他はクリア 14537: // V 常にクリア 14538: // C countが0のときクリア。他は結果の最下位ビット 14539: public static void irpRolToMem () throws M68kException { 14540: XEiJ.mpuCycleCount += 8; 14541: int ea = XEiJ.regOC & 63; 14542: int a = efaMltWord (ea); 14543: int x = XEiJ.busRwz (a); 14544: int z = (short) (x << 1 | x >>> 15); 14545: XEiJ.busWw (a, z); 14546: XEiJ.regCCR = (XEiJ.regCCR & XEiJ.REG_CCR_X | //Xは変化しない 14547: (z < 0 ? XEiJ.REG_CCR_N : 0) | 14548: (z == 0 ? XEiJ.REG_CCR_Z : 0) | 14549: z & 1); //Cは結果の最下位ビット 14550: } //irpRolToMem 14551: 14552: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14553: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14554: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14555: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14556: //BFTST <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo0wwwww 14557: //BFTST <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-00000ooooo100www 14558: //BFTST <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo0wwwww 14559: //BFTST <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_011_mmm_rrr-0000100ooo100www 14560: public static void irpBftst () throws M68kException { 14561: int w; 14562: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14563: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14564: } else { 14565: w = XEiJ.regPC; 14566: XEiJ.regPC = w + 2; 14567: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14568: } 14569: if ((w & ~0b0000_111_111_111_111) != 0 || 14570: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14571: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14572: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14573: throw M68kException.m6eSignal; 14574: } 14575: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14576: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14577: XEiJ.mpuCycleCount += 4; 14578: int ea = XEiJ.regOC & 63; 14579: int z; 14580: if (ea < XEiJ.EA_AR) { //BFTST Dr{～} 14581: z = XEiJ.regRn[ea]; 14582: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14583: } else { //BFTST <mem>{～} 14584: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14585: o &= 7; 14586: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14587: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o : //不要なバイトにアクセスしない 14588: z == 1 ? XEiJ.busRws (a) << 16 + o : //020以上なのでアドレスエラーは出ない 14589: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o : 14590: z == 3 ? XEiJ.busRls (a) << o : 14591: XEiJ.busRls (a) << o | XEiJ.busRbz (a + 4) >>> 8 - o); 14592: } 14593: z >>= w; //符号拡張。下位のゴミを消す 14594: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14595: } //irpBftst 14596: 14597: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14598: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14599: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14600: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14601: //BFEXTU <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo0wwwww 14602: //BFEXTU <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn0ooooo100www 14603: //BFEXTU <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo0wwwww 14604: //BFEXTU <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_100_111_mmm_rrr-0nnn100ooo100www 14605: public static void irpBfextu () throws M68kException { 14606: int w; 14607: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14608: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14609: } else { 14610: w = XEiJ.regPC; 14611: XEiJ.regPC = w + 2; 14612: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14613: } 14614: if ((w & ~0b0111_111_111_111_111) != 0 || 14615: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14616: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14617: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14618: throw M68kException.m6eSignal; 14619: } 14620: int n = w >> 12; 14621: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14622: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14623: XEiJ.mpuCycleCount += 4; 14624: int ea = XEiJ.regOC & 63; 14625: int z; 14626: if (ea < XEiJ.EA_AR) { //BFEXTU Dr{～} 14627: z = XEiJ.regRn[ea]; 14628: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14629: } else { //BFEXTU <mem>{～} 14630: int a = efaCntLong (ea) + (o >> 3); 14631: o &= 7; 14632: z = 31 - w + o >> 3; 14633: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o : //不要なバイトにアクセスしない 14634: z == 1 ? XEiJ.busRws (a) << 16 + o : //020以上なのでアドレスエラーは出ない 14635: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o : 14636: z == 3 ? XEiJ.busRls (a) << o : 14637: XEiJ.busRls (a) << o | XEiJ.busRbz (a + 4) >>> 8 - o); 14638: } 14639: XEiJ.regRn[n] = z >>> w; //ゼロ拡張 14640: z >>= w; //符号拡張。下位のゴミを消す 14641: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14642: } //irpBfextu 14643: 14644: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14645: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14646: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14647: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14648: //BFCHG <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo0wwwww 14649: //BFCHG <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-00000ooooo100www 14650: //BFCHG <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo0wwwww 14651: //BFCHG <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_101_011_mmm_rrr-0000100ooo100www 14652: public static void irpBfchg () throws M68kException { 14653: int w; 14654: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14655: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14656: } else { 14657: w = XEiJ.regPC; 14658: XEiJ.regPC = w + 2; 14659: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14660: } 14661: if ((w & ~0b0000_111_111_111_111) != 0 || 14662: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14663: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14664: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14665: throw M68kException.m6eSignal; 14666: } 14667: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14668: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14669: XEiJ.mpuCycleCount += 4; 14670: int ea = XEiJ.regOC & 63; 14671: int z; 14672: if (ea < XEiJ.EA_AR) { //BFCHG Dr{～} 14673: z = XEiJ.regRn[ea]; 14674: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14675: int t = z ^ -1 << w; //フィールドの幅だけ反転する 14676: XEiJ.regRn[ea] = t << -o | t >>> o; 14677: } else { //BFCHG <mem>{～} 14678: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14679: o &= 7; 14680: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14681: if (z == 0) { 14682: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14683: int t = XEiJ.busRbs (a) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14684: z = t << o; // z abcde-00 00000000 00000000 00000000 14685: // // -1<<w 11111000 00000000 00000000 00000000 14686: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14687: // //t^-1<<w>>>o --ABCDE- 00000000 00000000 00000000 14688: XEiJ.busWb (a, (t ^ -1 << w >>> o) >>> 24); // <ea> --ABCDE- 14689: } else if (z == 1) { 14690: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14691: int t = XEiJ.busRws (a) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14692: z = t << o; // z abcde--- -0000000 00000000 00000000 14693: // // -1<<w 11111000 00000000 00000000 00000000 14694: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14695: // //t^-1<<w>>>o -------A BCDE---- 00000000 00000000 14696: XEiJ.busWw (a, (t ^ -1 << w >>> o) >>> 16); // <ea> -------A BCDE---- 14697: } else if (z == 2) { 14698: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14699: int t = XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8; // t -------a bcdefghi jkl----- 00000000 14700: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14701: // // -1<<w 11111111 11110000 00000000 00000000 14702: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14703: t ^= -1 << w >>> o; // t -------A BCDEFGHI JKL----- 00000000 14704: XEiJ.busWw (a, t >>> 16); // <ea> -------A BCDEFGHI jkl----- 14705: XEiJ.busWb (a + 2, t >>> 8); // <ea> -------A BCDEFGHI JKL----- 14706: } else if (z == 3) { 14707: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14708: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rs------ 14709: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14710: // // -1<<w 11111111 11111111 11100000 00000000 14711: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14712: XEiJ.busWl (a, t ^ -1 << w >>> o); // <ea> -------A BCDEFGHI JKLMNOPQ RS------ 14713: } else { 14714: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14715: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rstuvwxy 14716: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14717: // -1>>>o 00000001 11111111 11111111 11111111 14718: XEiJ.busWl (a, t ^ -1 >>> o); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY 14719: t = XEiJ.busRbz (a + 4); // t 00000000 00000000 00000000 z------- 14720: // // t>>>8-o 00000000 00000000 00000000 0z------ 14721: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14722: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14723: XEiJ.busWb (a + 4, t ^ -1 << 8 - o + w); // <ea> -------A BCDEFGHI JKLMNOPQ RSTUVWXY Z------- 14724: } 14725: } 14726: z >>= w; //符号拡張。下位のゴミを消す 14727: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14728: } //irpBfchg 14729: 14730: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14731: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14732: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14733: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14734: //BFEXTS <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo0wwwww 14735: //BFEXTS <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn0ooooo100www 14736: //BFEXTS <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo0wwwww 14737: //BFEXTS <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_101_111_mmm_rrr-0nnn100ooo100www 14738: public static void irpBfexts () throws M68kException { 14739: int w; 14740: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14741: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14742: } else { 14743: w = XEiJ.regPC; 14744: XEiJ.regPC = w + 2; 14745: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14746: } 14747: if ((w & ~0b0111_111_111_111_111) != 0 || 14748: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14749: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14750: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14751: throw M68kException.m6eSignal; 14752: } 14753: int n = w >> 12; 14754: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14755: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14756: XEiJ.mpuCycleCount += 4; 14757: int ea = XEiJ.regOC & 63; 14758: int z; 14759: if (ea < XEiJ.EA_AR) { //BFEXTS Dr{～} 14760: z = XEiJ.regRn[ea]; 14761: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14762: } else { //BFEXTS <mem>{～} 14763: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14764: o &= 7; 14765: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14766: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o : //不要なバイトにアクセスしない 14767: z == 1 ? XEiJ.busRws (a) << 16 + o : //020以上なのでアドレスエラーは出ない 14768: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o : 14769: z == 3 ? XEiJ.busRls (a) << o : 14770: XEiJ.busRls (a) << o | XEiJ.busRbz (a + 4) >>> 8 - o); 14771: } 14772: XEiJ.regRn[n] = z >>= w; //符号拡張。下位のゴミを消す 14773: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14774: } //irpBfexts 14775: 14776: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14777: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14778: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14779: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14780: //BFCLR <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo0wwwww 14781: //BFCLR <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-00000ooooo100www 14782: //BFCLR <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo0wwwww 14783: //BFCLR <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_110_011_mmm_rrr-0000100ooo100www 14784: public static void irpBfclr () throws M68kException { 14785: int w; 14786: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14787: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14788: } else { 14789: w = XEiJ.regPC; 14790: XEiJ.regPC = w + 2; 14791: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14792: } 14793: if ((w & ~0b0000_111_111_111_111) != 0 || 14794: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14795: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14796: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14797: throw M68kException.m6eSignal; 14798: } 14799: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14800: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14801: XEiJ.mpuCycleCount += 4; 14802: int ea = XEiJ.regOC & 63; 14803: int z; 14804: if (ea < XEiJ.EA_AR) { //BFCLR Dr{～} 14805: z = XEiJ.regRn[ea]; 14806: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14807: int t = z & ~(-1 << w); //フィールドの幅だけ0を並べる 14808: XEiJ.regRn[ea] = t << -o | t >>> o; 14809: } else { //BFCLR <mem>{～} 14810: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14811: o &= 7; 14812: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14813: if (z == 0) { 14814: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14815: int t = XEiJ.busRbs (a) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14816: z = t << o; // z abcde-00 00000000 00000000 00000000 14817: // // -1<<w 11111000 00000000 00000000 00000000 14818: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14819: // //~(-1<<w>>>o) 11000001 11111111 11111111 11111111 14820: // //t&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 14821: XEiJ.busWb (a, (t & ~(-1 << w >>> o)) >>> 24); // <ea> --00000- 14822: } else if (z == 1) { 14823: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14824: int t = XEiJ.busRws (a) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14825: z = t << o; // z abcde--- -0000000 00000000 00000000 14826: // // -1<<w 11111000 00000000 00000000 00000000 14827: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14828: // //~(-1<<w>>>o) 11111110 00001111 11111111 11111111 14829: // //t&~(-1<<w>>>o) -------0 0000---- 00000000 00000000 14830: XEiJ.busWw (a, (t & ~(-1 << w >>> o)) >>> 16); // <ea> -------0 0000---- 14831: } else if (z == 2) { 14832: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14833: int t = XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8; // t -------a bcdefghi jkl----- 00000000 14834: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14835: // // -1<<w 11111111 11110000 00000000 00000000 14836: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14837: // //~(-1<<w>>>o) 11111110 00000000 00011111 11111111 14838: t &= ~(-1 << w >>> o); // t -------0 00000000 000----- 00000000 14839: XEiJ.busWw (a, t >>> 16); // <ea> -------0 00000000 jkl----- 14840: XEiJ.busWb (a + 2, t >>> 8); // <ea> -------0 00000000 000----- 14841: } else if (z == 3) { 14842: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14843: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rs------ 14844: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14845: // // -1<<w 11111111 11111111 11100000 00000000 14846: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14847: // //~(-1<<w>>>o) 11111110 00000000 00000000 00111111 14848: XEiJ.busWl (a, t & ~(-1 << w >>> o)); // <ea> -------0 00000000 00000000 00------ 14849: } else { 14850: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 14851: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rstuvwxy 14852: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 14853: // -1>>>o 00000001 11111111 11111111 11111111 14854: // ~(-1>>>o) 11111110 00000000 00000000 00000000 14855: XEiJ.busWl (a, t & ~(-1 >>> o)); // <ea> -------0 00000000 00000000 00000000 14856: t = XEiJ.busRbz (a + 4); // t 00000000 00000000 00000000 z------- 14857: // // t>>>8-o 00000000 00000000 00000000 0z------ 14858: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 14859: // // -1<<8-o+w 11111111 11111111 11111111 10000000 14860: // //~(-1<<8-o+w) 00000000 00000000 00000000 01111111 14861: XEiJ.busWb (a + 4, t & ~(-1 << 8 - o + w)); // <ea> -------0 00000000 00000000 00000000 0------- 14862: } 14863: } 14864: z >>= w; //符号拡張。下位のゴミを消す 14865: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14866: } //irpBfclr 14867: 14868: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14869: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14870: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14871: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14872: //BFFFO <ea>{#o:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo0wwwww 14873: //BFFFO <ea>{#o:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn0ooooo100www 14874: //BFFFO <ea>{Do:#w},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo0wwwww 14875: //BFFFO <ea>{Do:Dw},Dn |-|--2346|-|-UUUU|-**00|D M WXZP |1110_110_111_mmm_rrr-0nnn100ooo100www 14876: public static void irpBfffo () throws M68kException { 14877: int w; 14878: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14879: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14880: } else { 14881: w = XEiJ.regPC; 14882: XEiJ.regPC = w + 2; 14883: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14884: } 14885: if ((w & ~0b0111_111_111_111_111) != 0 || 14886: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14887: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14888: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14889: throw M68kException.m6eSignal; 14890: } 14891: int n = w >> 12; 14892: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14893: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14894: XEiJ.mpuCycleCount += 4; 14895: int ea = XEiJ.regOC & 63; 14896: int z; 14897: if (ea < XEiJ.EA_AR) { //BFFFO Dr{～} 14898: z = XEiJ.regRn[ea]; 14899: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14900: } else { //BFFFO <mem>{～} 14901: int a = efaCntLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14902: int o7 = o & 7; 14903: z = 31 - w + o7 >> 3; //フィールドが跨ぐバイト境界の数。0～4 14904: z = (z == 0 ? XEiJ.busRbs (a) << 24 + o7 : //不要なバイトにアクセスしない 14905: z == 1 ? XEiJ.busRws (a) << 16 + o7 : //020以上なのでアドレスエラーは出ない 14906: z == 2 ? (XEiJ.busRws (a) << 8 | XEiJ.busRbz (a + 2)) << 8 + o7 : 14907: z == 3 ? XEiJ.busRls (a) << o7 : 14908: XEiJ.busRls (a) << o7 | XEiJ.busRbz (a + 4) >>> 8 - o7); 14909: } 14910: if (true) { 14911: XEiJ.regRn[n] = Integer.numberOfLeadingZeros (z >>> w) - w + o; //ゼロ拡張してから1のビットを探す。見つからないときはoffset+widthになる 14912: } else { 14913: int t = z >>> w; 14914: if (t == 0) { 14915: XEiJ.regRn[n] = 32 - w + o; 14916: } else { 14917: int k = -(t >>> 16) >> 16 & 16; 14918: k += -(t >>> k + 8) >> 8 & 8; 14919: k += -(t >>> k + 4) >> 4 & 4; 14920: // bit3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 14921: // bit2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 14922: // bit1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 14923: // bit0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 14924: XEiJ.regRn[n] = ((0b11_11_11_11_11_11_11_11_10_10_10_10_01_01_00_00 >>> (t >>> k << 1)) & 3) + k - w + o; //intのシフトカウントは下位5bitだけが使用される 14925: } 14926: } 14927: z >>= w; //符号拡張。下位のゴミを消す 14928: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 14929: } //irpBfffo 14930: 14931: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14932: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 14933: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 14934: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 14935: //BFSET <ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo0wwwww 14936: //BFSET <ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-00000ooooo100www 14937: //BFSET <ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo0wwwww 14938: //BFSET <ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_011_mmm_rrr-0000100ooo100www 14939: public static void irpBfset () throws M68kException { 14940: int w; 14941: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 14942: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 14943: } else { 14944: w = XEiJ.regPC; 14945: XEiJ.regPC = w + 2; 14946: w = XEiJ.busRwze (w); //pcwz。拡張ワード 14947: } 14948: if ((w & ~0b0000_111_111_111_111) != 0 || 14949: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 14950: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 14951: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 14952: throw M68kException.m6eSignal; 14953: } 14954: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 14955: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 14956: XEiJ.mpuCycleCount += 4; 14957: int ea = XEiJ.regOC & 63; 14958: int z; 14959: if (ea < XEiJ.EA_AR) { //BFSET Dr{～} 14960: z = XEiJ.regRn[ea]; 14961: z = z << o | z >>> -o; //下位からはみ出したフィールドは上位に戻る 14962: int t = z | -1 << w; //フィールドの幅だけ1を並べる 14963: XEiJ.regRn[ea] = t << -o | t >>> o; 14964: } else { //BFSET <mem>{～} 14965: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 14966: o &= 7; 14967: z = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 14968: if (z == 0) { 14969: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 14970: int t = XEiJ.busRbs (a) << 24; // t --abcde- 00000000 00000000 00000000 不要なバイトにアクセスしない 14971: z = t << o; // z abcde-00 00000000 00000000 00000000 14972: // // -1<<w 11111000 00000000 00000000 00000000 14973: // // -1<<w>>>o 00111110 00000000 00000000 00000000 14974: // //t|-1<<w>>>o --11111- 00000000 00000000 00000000 14975: XEiJ.busWb (a, (t | -1 << w >>> o) >>> 24); // <ea> --11111- 14976: } else if (z == 1) { 14977: // <ea>{7,5} o=7,w=32-5=27 <ea> -------a bcde---- 14978: int t = XEiJ.busRws (a) << 16; // t -------a bcde---- 00000000 00000000 020以上なのでアドレスエラーは出ない 14979: z = t << o; // z abcde--- -0000000 00000000 00000000 14980: // // -1<<w 11111000 00000000 00000000 00000000 14981: // // -1<<w>>>o 00000001 11110000 00000000 00000000 14982: // //t|-1<<w>>>o -------1 1111---- 00000000 00000000 14983: XEiJ.busWw (a, (t | -1 << w >>> o) >>> 16); // <ea> -------1 1111---- 14984: } else if (z == 2) { 14985: // <ea>{7,12} o=7,w=32-12=20 <ea> -------a bcdefghi jkl----- 14986: int t = XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8; // t -------a bcdefghi jkl----- 00000000 14987: z = t << o; // z abcdefgh ijkl---- -0000000 00000000 14988: // // -1<<w 11111111 11110000 00000000 00000000 14989: // // -1<<w>>>o 00000001 11111111 11100000 00000000 14990: t |= -1 << w >>> o; // t -------1 11111111 111----- 00000000 14991: XEiJ.busWw (a, t >>> 16); // <ea> -------1 11111111 jkl----- 14992: XEiJ.busWb (a + 2, t >>> 8); // <ea> -------1 11111111 111----- 14993: } else if (z == 3) { 14994: // <ea>{7,19} o=7,w=32-19=13 <ea> -------a bcdefghi jklmnopq rs------ 14995: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rs------ 14996: z = t << o; // z abcdefgh ijklmnop qrs----- -0000000 14997: // // -1<<w 11111111 11111111 11100000 00000000 14998: // // -1<<w>>>o 00000001 11111111 11111111 11000000 14999: XEiJ.busWl (a, t | -1 << w >>> o); // <ea> -------1 11111111 11111111 11------ 15000: } else { 15001: // <ea>{7,26} o=7,w=32-26=6 <ea> -------a bcdefghi jklmnopq rstuvwxy z------- 15002: int t = XEiJ.busRls (a); // t -------a bcdefghi jklmnopq rstuvwxy 15003: z = t << o; // z abcdefgh ijklmnop qrstuvwx y0000000 15004: // -1>>>o 00000001 11111111 11111111 11111111 15005: XEiJ.busWl (a, t | -1 >>> o); // <ea> -------1 11111111 11111111 11111111 15006: t = XEiJ.busRbz (a + 4); // t 00000000 00000000 00000000 z------- 15007: // // t>>>8-o 00000000 00000000 00000000 0z------ 15008: z |= t >>> 8 - o; // z abcdefgh ijklmnop qrstuvwx yz------ 15009: // // -1<<8-o+w 11111111 11111111 11111111 10000000 15010: XEiJ.busWb (a + 4, t | -1 << 8 - o + w); // <ea> -------1 11111111 11111111 11111111 1------- 15011: } 15012: } 15013: z >>= w; //符号拡張。下位のゴミを消す 15014: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 15015: } //irpBfset 15016: 15017: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15018: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15019: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15020: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15021: //BFINS Dn,<ea>{#o:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo0wwwww 15022: //BFINS Dn,<ea>{#o:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn0ooooo100www 15023: //BFINS Dn,<ea>{Do:#w} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo0wwwww 15024: //BFINS Dn,<ea>{Do:Dw} |-|--2346|-|-UUUU|-**00|D M WXZ |1110_111_111_mmm_rrr-0nnn100ooo100www 15025: public static void irpBfins () throws M68kException { 15026: int w; 15027: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 15028: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 15029: } else { 15030: w = XEiJ.regPC; 15031: XEiJ.regPC = w + 2; 15032: w = XEiJ.busRwze (w); //pcwz。拡張ワード 15033: } 15034: if ((w & ~0b0111_111_111_111_111) != 0 || 15035: (w & 0b0000_111_111_000_000) > 0b0000_100_111_000_000 || 15036: (w & 0b0000_000_000_111_111) > 0b0000_000_000_100_111) { 15037: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 15038: throw M68kException.m6eSignal; 15039: } 15040: int n = w >> 12; 15041: int o = w << 31 - 11 >= 0 ? w >> 6 & 31 : XEiJ.regRn[w >> 6 & 7]; //o=offset 15042: w = -(w << 31 - 5 >= 0 ? w : XEiJ.regRn[w & 7]) & 31; //w=32-width。1<=width<=32なので0<=32-width<=31 15043: XEiJ.mpuCycleCount += 4; 15044: int ea = XEiJ.regOC & 63; 15045: int z = XEiJ.regRn[n] << w; //z=Dn<<-width 15046: if (ea < XEiJ.EA_AR) { //BFINS Dn,Dr{～} 15047: // Dr{30,5} o=30,w=32-5=27 t=Dr cde----- -------- -------- ------ab 15048: // t<<o ab000000 00000000 00000000 00000000 15049: // t>>>-o 00cde--- -------- -------- -------- 15050: // t<<o|t>>>-o abcde--- -------- -------- -------- 15051: // -1<<w 11111000 00000000 00000000 00000000 15052: // ~(-1<<w) 00000111 11111111 11111111 11111111 15053: // (t<<o|t>>>-o)&~(-1<<w) 00000--- -------- -------- -------- 15054: // r[n] -------- -------- -------- ---ABCDE 15055: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 15056: // t=(t<<o|t>>>-o)&~(-1<<w)|z ABCDE--- -------- -------- -------- 15057: // t<<-o CDE----- -------- -------- ------00 15058: // t>>>o 00000000 00000000 00000000 000000AB 15059: // t<<-o|t>>>o CDE----- -------- -------- ------AB 15060: int t = XEiJ.regRn[ea]; 15061: t = (t << o | t >>> -o) & ~(-1 << w) | z; 15062: XEiJ.regRn[ea] = t << -o | t >>> o; 15063: } else { //BFINS Dn,<mem>{～} 15064: int a = efaCltLong (ea) + (o >> 3); //フィールドの最上位ビットを含むバイトのアドレス 15065: o &= 7; 15066: n = 31 - w + o >> 3; //フィールドが跨ぐバイト境界の数。0～4 15067: if (n == 0) { 15068: // <ea>{2,5} o=2,w=32-5=27 <ea> --abcde- 15069: // XEiJ.busRbs(a)<<24 --abcde- 00000000 00000000 00000000 15070: // -1<<w 11111000 00000000 00000000 00000000 15071: // -1<<w>>>o 00111110 00000000 00000000 00000000 15072: // ~(-1<<w>>>o) 11000001 11111111 11111111 11111111 15073: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o) --00000- 00000000 00000000 00000000 15074: // r[n] -------- -------- -------- ---ABCDE 15075: // z=r[n]<<w ABCDE000 00000000 00000000 00000000 15076: // z>>>o 00ABCDE0 00000000 00000000 00000000 15077: // XEiJ.busRbs(a)<<24&~(-1<<w>>>o)|z>>>o --ABCDE- 00000000 00000000 00000000 15078: XEiJ.busWb (a, (XEiJ.busRbs (a) << 24 & ~(-1 << w >>> o) | z >>> o) >>> 24); 15079: } else if (n == 1) { 15080: // <ea>{3,11} o=3,w=32-11=21 <ea> ---abcde fghijk-- 15081: // rws(a)<<16 ---abcde fghijk-- 00000000 00000000 15082: // -1<<w 11111111 11100000 00000000 00000000 15083: // -1<<w>>>o 00011111 11111100 00000000 00000000 15084: // ~(-1<<w>>>o) 11100000 00000011 11111111 11111111 15085: // rws(a)<<16&~(-1<<w>>>o) ---00000 000000-- 00000000 00000000 15086: // r[n] -------- -------- -----ABC DEFGHIJK 15087: // z=r[n]<<w ABCDEFGH IJK00000 00000000 00000000 15088: // z>>>o 000ABCDE FGHIJK00 00000000 00000000 15089: // rws(a)<<16&~(-1<<w>>>o)|z>>>o ---ABCDE FGHIJK-- 00000000 00000000 15090: XEiJ.busWw (a, (XEiJ.busRws (a) << 16 & ~(-1 << w >>> o) | z >>> o) >>> 16); 15091: } else if (n == 2) { 15092: // <ea>{4,17} o=4,w=32-17=15 <ea> ----abcd efghijkl mnopq--- 15093: // rws(a)<<16|rbz(a+2)<<8 ----abcd efghijkl mnopq--- 00000000 15094: // -1<<w 11111111 11111111 10000000 00000000 15095: // -1<<w>>>o 00001111 11111111 11111000 00000000 15096: // ~(-1<<w>>>o) 11110000 00000000 00000111 11111111 15097: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o) ----0000 00000000 00000--- 00000000 15098: // r[n] -------- -------A BCDEFGHI JKLMNOPQ 15099: // z=r[n]<<w ABCDEFGH IJKLMNOP Q0000000 00000000 15100: // z>>>o 0000ABCD EFGHIJKL MNOPQ000 00000000 15101: // (rws(a)<<16|rbz(a+2)<<8)&~(-1<<w>>>o)|z>>>o ----ABCD EFGHIJKL MNOPQ--- 00000000 15102: int t = (XEiJ.busRws (a) << 16 | XEiJ.busRbz (a + 2) << 8) & ~(-1 << w >>> o) | z >>> o; 15103: XEiJ.busWw (a, t >>> 16); 15104: XEiJ.busWb (a + 2, t >>> 8); 15105: } else if (n == 3) { 15106: // <ea>{5,23} o=5,w=32-23=9 <ea> -----abc defghijk lmnopqrs tuvw---- 15107: // rls(a) -----abc defghijk lmnopqrs tuvw---- 15108: // -1<<w 11111111 11111111 11111110 00000000 15109: // -1<<w>>>o 00000111 11111111 11111111 11110000 15110: // ~(-1<<w>>>o) 11111000 00000000 00000000 00001111 15111: // rls(a)&~(-1<<w>>>o) -----000 00000000 00000000 0000---- 15112: // r[n] -------- -ABCDEFG HIJKLMNO PQRSTUVW 15113: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVW0 00000000 15114: // z>>>o 00000ABC DEFGHIJK LMNOPQRS TUVW0000 15115: // rls(a)&~(-1<<w>>>o)|z>>>o -----ABC DEFGHIJK LMNOPQRS TUVW---- 15116: XEiJ.busWl (a, XEiJ.busRls (a) & ~(-1 << w >>> o) | z >>> o); 15117: } else { 15118: // <ea>{6,29} o=6,w=32-29=3 <ea> ------ab cdefghij klmnopqr stuvwxyz abc----- 15119: // rls(a) ------ab cdefghij klmnopqr stuvwxyz 15120: // -1>>>o 00000011 11111111 11111111 11111111 15121: // ~(-1>>>o) 11111100 00000000 00000000 00000000 15122: // rls(a)&~(-1>>>o) ------00 00000000 00000000 00000000 15123: // r[n] ---ABCDE FGHIJKLM NOPQRSTU VWXYZABC 15124: // z=r[n]<<w ABCDEFGH IJKLMNOP QRSTUVWX YZABC000 15125: // z>>>o 000000AB CDEFGHIJ KLMNOPQR STUVWXYZ 15126: // rls(a)&~(-1>>>o)|z>>>o ------AB CDEFGHIJ KLMNOPQR STUVWXYZ 15127: XEiJ.busWl (a, XEiJ.busRls (a) & ~(-1 >>> o) | z >>> o); 15128: // rbz(a+4) 00000000 00000000 00000000 abc----- 15129: // -1<<8-o+w 11111111 11111111 11111111 11100000 15130: // ~(-1<<8-o+w) 00000000 00000000 00000000 00011111 15131: // rbz(a+4)&~(-1<<8-o+w) 00000000 00000000 00000000 000----- 15132: // z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC00000 15133: // rbz(a+4)&~(-1<<8-o+w)|z<<8-o CDEFGHIJ KLMNOPQR STUVWXYZ ABC----- 15134: XEiJ.busWb (a + 4, XEiJ.busRbz (a + 4) & ~(-1 << 8 - o + w) | z << 8 - o); 15135: } 15136: } 15137: //zは上位に寄ったままだが下位の空きは0なのでそのままテストする 15138: XEiJ.regCCR = z >> 28 & XEiJ.REG_CCR_N | (z == 0 ? XEiJ.regCCR & XEiJ.REG_CCR_X | XEiJ.REG_CCR_Z : XEiJ.regCCR & XEiJ.REG_CCR_X); //ccr_tst 15139: } //irpBfins 15140: 15141: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15142: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15143: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15144: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15145: //PFLUSHA |-|---3--|P|-----|-----| |1111_000_000_000_000-0010010000000000 15146: //PFLUSH SFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00000 15147: //PFLUSH DFC,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm00001 15148: //PFLUSH Dn,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm01nnn 15149: //PFLUSH #<data>,#<mask> |-|---3--|P|-----|-----| |1111_000_000_000_000-00110000mmm10ddd 15150: //PMOVE.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0000000000 15151: //PMOVEFD.L <ea>,TTn |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n0100000000 15152: //PMOVE.L TTn,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00001n1000000000 15153: //PLOADW SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000000 15154: //PLOADW DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000000001 15155: //PLOADW Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000001nnn 15156: //PLOADW #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010000000010ddd 15157: //PLOADR SFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000000 15158: //PLOADR DFC,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000000001 15159: //PLOADR Dn,<ea> |-|--M3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000001nnn 15160: //PLOADR #<data>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0010001000010ddd 15161: //PFLUSH SFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00000 15162: //PFLUSH DFC,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm00001 15163: //PFLUSH Dn,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm01nnn 15164: //PFLUSH #<data>,#<mask>,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-00111000mmm10ddd 15165: //PMOVE.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000000000000 15166: //PMOVEFD.L <ea>,TC |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100000100000000 15167: //PMOVE.L TC,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100001000000000 15168: //PMOVE.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100000000000 15169: //PMOVEFD.Q <ea>,SRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100100100000000 15170: //PMOVE.Q SRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100101000000000 15171: //PMOVE.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110000000000 15172: //PMOVEFD.Q <ea>,CRP |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100110100000000 15173: //PMOVE.Q CRP,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0100111000000000 15174: //PMOVE.W <ea>,MMUSR |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110000000000000 15175: //PMOVE.W MMUSR,<ea> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-0110001000000000 15176: //PTESTW SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000000 15177: //PTESTW DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000000001 15178: //PTESTW Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000001nnn 15179: //PTESTW #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll0000010ddd 15180: //PTESTW SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00000 15181: //PTESTW DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn00001 15182: //PTESTW Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn01nnn 15183: //PTESTW #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll01nnn10ddd 15184: //PTESTR SFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000000 15185: //PTESTR DFC,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000000001 15186: //PTESTR Dn,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000001nnn 15187: //PTESTR #<data>,<ea>,#<level> |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll1000010ddd 15188: //PTESTR SFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00000 15189: //PTESTR DFC,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn00001 15190: //PTESTR Dn,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn01nnn 15191: //PTESTR #<data>,<ea>,#<level>,An |-|---3--|P|-----|-----| M WXZ |1111_000_000_mmm_rrr-100lll11nnn10ddd 15192: public static void irpPgen () throws M68kException { 15193: int ea = XEiJ.regOC & 63; 15194: int mmm = ea >> 3; 15195: if (mmm == XEiJ.MMM_DR || 15196: mmm == XEiJ.MMM_MM || 15197: mmm == XEiJ.MMM_MW || 15198: mmm == XEiJ.MMM_MX || 15199: ea == XEiJ.EA_ZW || 15200: ea == XEiJ.EA_ZL) { 15201: //! 未対応。030チェックを通すためのダミー。拡張ワードを読み飛ばして何もしない 15202: XEiJ.regPC += 2; //第2オペコード 15203: if (ea >= XEiJ.EA_MM) { 15204: efaAnyByte (ea); 15205: } 15206: } else { 15207: irpFline (); 15208: } 15209: } //irpPgen 15210: 15211: //浮動小数点例外 15212: // 48 BSUN FP分岐または比較不能状態でのセット 15213: // 49 INEX FP不正確な結果 15214: // 50 DZ FPゼロによる除算 15215: // 51 UNFL FPアンダーフロー 15216: // 52 OPERR FPオペランドエラー 15217: // 53 OVFL FPオーバーフロー 15218: // 54 SNAN FPシグナリングNAN 15219: // 55 FP未実装データ型 15220: //FPSRのビットオフセット→例外ベクタ番号 15221: /* 15222: public static final int[] FP_OFFSET_TO_NUMBER = { 15223: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15224: 48, //16 15 BSUN 48 BSUN FP分岐または比較不能状態でのセット 15225: 54, //17 14 SNAN 54 SNAN FPシグナリングNAN 15226: 52, //18 13 OPERR 52 OPERR FPオペランドエラー 15227: 53, //19 12 OVFL 53 OVFL FPオーバーフロー 15228: 51, //20 11 UNFL 51 UNFL FPアンダーフロー 15229: 50, //21 10 DZ 50 DZ FPゼロによる除算 15230: 49, //22 9 INEX2 49 INEX FP不正確な結果 15231: 49, //23 8 INEX1 49 INEX FP不正確な結果 15232: 0, 0, 0, 0, 0, 0, 0, 0, 15233: }; 15234: */ 15235: public static final byte[] FP_OFFSET_TO_NUMBER = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\00006453211\0\0\0\0\0\0\0\0".getBytes (XEiJ.ISO_8859_1); 15236: 15237: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15238: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 15239: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 15240: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 15241: //FTST.X FPm |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmm0000111010 15242: //FMOVE.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000000 15243: //FINT.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000001 15244: //FSINH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000010 15245: //FINTRZ.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000011 15246: //FSQRT.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000100 15247: //FLOGNP1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0000110 15248: //FETOXM1.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001000 15249: //FTANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001001 15250: //FATAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001010 15251: //FASIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001100 15252: //FATANH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001101 15253: //FSIN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001110 15254: //FTAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0001111 15255: //FETOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010000 15256: //FTWOTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010001 15257: //FTENTOX.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010010 15258: //FLOGN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010100 15259: //FLOG10.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010101 15260: //FLOG2.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0010110 15261: //FABS.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011000 15262: //FCOSH.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011001 15263: //FNEG.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011010 15264: //FACOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011100 15265: //FCOS.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011101 15266: //FGETEXP.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011110 15267: //FGETMAN.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0011111 15268: //FDIV.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100000 15269: //FMOD.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100001 15270: //FADD.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100010 15271: //FMUL.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100011 15272: //FSGLDIV.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100100 15273: //FREM.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100101 15274: //FSCALE.X FPm,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100110 15275: //FSGLMUL.X FPm,FPn |-|--CCS6|-|-----|-----| |1111_001_000_000_000-000mmmnnn0100111 15276: //FSUB.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0101000 15277: //FCMP.X FPm,FPn |-|--CC46|-|-----|-----| |1111_001_000_000_000-000mmmnnn0111000 15278: //FSINCOS.X FPm,FPc:FPs |-|--CCSS|-|-----|-----| |1111_001_000_000_000-000mmmsss0110ccc 15279: //FMOVECR.X #ccc,FPn |-|--CCSS|-|-----|-----| |1111_001_000_000_000-010111nnn0cccccc 15280: //FMOVE.L FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011000nnn0000000 15281: //FMOVE.S FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011001nnn0000000 15282: //FMOVE.W FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011100nnn0000000 15283: //FMOVE.B FPn,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-011110nnn0000000 15284: //FMOVE.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15285: //FMOVEM.L FPIAR,<ea> |-|--CC46|-|-----|-----|DAM+-WXZ |1111_001_000_mmm_rrr-1010010000000000 15286: //FMOVE.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15287: //FMOVEM.L FPSR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1010100000000000 15288: //FMOVE.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15289: //FMOVEM.L FPCR,<ea> |-|--CC46|-|-----|-----|D M+-WXZ |1111_001_000_mmm_rrr-1011000000000000 15290: //FTST.L <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100000000111010 15291: //FMOVE.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000000 15292: //FINT.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000001 15293: //FSINH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000010 15294: //FINTRZ.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000011 15295: //FSQRT.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000100 15296: //FLOGNP1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0000110 15297: //FETOXM1.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001000 15298: //FTANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001001 15299: //FATAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001010 15300: //FASIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001100 15301: //FATANH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001101 15302: //FSIN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001110 15303: //FTAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0001111 15304: //FETOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010000 15305: //FTWOTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010001 15306: //FTENTOX.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010010 15307: //FLOGN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010100 15308: //FLOG10.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010101 15309: //FLOG2.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0010110 15310: //FABS.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011000 15311: //FCOSH.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011001 15312: //FNEG.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011010 15313: //FACOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011100 15314: //FCOS.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011101 15315: //FGETEXP.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011110 15316: //FGETMAN.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0011111 15317: //FDIV.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100000 15318: //FMOD.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100001 15319: //FADD.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100010 15320: //FMUL.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100011 15321: //FSGLDIV.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100100 15322: //FREM.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100101 15323: //FSCALE.L <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100110 15324: //FSGLMUL.L <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0100111 15325: //FSUB.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0101000 15326: //FCMP.L <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000nnn0111000 15327: //FSINCOS.L <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010000sss0110ccc 15328: //FTST.S <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0100010000111010 15329: //FMOVE.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000000 15330: //FINT.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000001 15331: //FSINH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000010 15332: //FINTRZ.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000011 15333: //FSQRT.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000100 15334: //FLOGNP1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0000110 15335: //FETOXM1.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001000 15336: //FTANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001001 15337: //FATAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001010 15338: //FASIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001100 15339: //FATANH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001101 15340: //FSIN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001110 15341: //FTAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0001111 15342: //FETOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010000 15343: //FTWOTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010001 15344: //FTENTOX.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010010 15345: //FLOGN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010100 15346: //FLOG10.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010101 15347: //FLOG2.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0010110 15348: //FABS.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011000 15349: //FCOSH.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011001 15350: //FNEG.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011010 15351: //FACOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011100 15352: //FCOS.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011101 15353: //FGETEXP.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011110 15354: //FGETMAN.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0011111 15355: //FDIV.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100000 15356: //FMOD.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100001 15357: //FADD.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100010 15358: //FMUL.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100011 15359: //FSGLDIV.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100100 15360: //FREM.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100101 15361: //FSCALE.S <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100110 15362: //FSGLMUL.S <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0100111 15363: //FSUB.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0101000 15364: //FCMP.S <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001nnn0111000 15365: //FSINCOS.S <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010001sss0110ccc 15366: //FTST.W <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101000000111010 15367: //FMOVE.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000000 15368: //FINT.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000001 15369: //FSINH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000010 15370: //FINTRZ.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000011 15371: //FSQRT.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000100 15372: //FLOGNP1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0000110 15373: //FETOXM1.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001000 15374: //FTANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001001 15375: //FATAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001010 15376: //FASIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001100 15377: //FATANH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001101 15378: //FSIN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001110 15379: //FTAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0001111 15380: //FETOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010000 15381: //FTWOTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010001 15382: //FTENTOX.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010010 15383: //FLOGN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010100 15384: //FLOG10.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010101 15385: //FLOG2.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0010110 15386: //FABS.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011000 15387: //FCOSH.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011001 15388: //FNEG.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011010 15389: //FACOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011100 15390: //FCOS.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011101 15391: //FGETEXP.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011110 15392: //FGETMAN.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0011111 15393: //FDIV.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100000 15394: //FMOD.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100001 15395: //FADD.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100010 15396: //FMUL.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100011 15397: //FSGLDIV.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100100 15398: //FREM.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100101 15399: //FSCALE.W <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100110 15400: //FSGLMUL.W <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0100111 15401: //FSUB.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0101000 15402: //FCMP.W <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100nnn0111000 15403: //FSINCOS.W <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010100sss0110ccc 15404: //FTST.B <ea> |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-0101100000111010 15405: //FMOVE.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000000 15406: //FINT.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000001 15407: //FSINH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000010 15408: //FINTRZ.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000011 15409: //FSQRT.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000100 15410: //FLOGNP1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0000110 15411: //FETOXM1.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001000 15412: //FTANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001001 15413: //FATAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001010 15414: //FASIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001100 15415: //FATANH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001101 15416: //FSIN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001110 15417: //FTAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0001111 15418: //FETOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010000 15419: //FTWOTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010001 15420: //FTENTOX.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010010 15421: //FLOGN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010100 15422: //FLOG10.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010101 15423: //FLOG2.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0010110 15424: //FABS.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011000 15425: //FCOSH.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011001 15426: //FNEG.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011010 15427: //FACOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011100 15428: //FCOS.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011101 15429: //FGETEXP.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011110 15430: //FGETMAN.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0011111 15431: //FDIV.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100000 15432: //FMOD.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100001 15433: //FADD.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100010 15434: //FMUL.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100011 15435: //FSGLDIV.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100100 15436: //FREM.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100101 15437: //FSCALE.B <ea>,FPn |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100110 15438: //FSGLMUL.B <ea>,FPn |-|--CCS6|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0100111 15439: //FSUB.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0101000 15440: //FCMP.B <ea>,FPn |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110nnn0111000 15441: //FSINCOS.B <ea>,FPc:FPs |-|--CCSS|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-010110sss0110ccc 15442: //FMOVE.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15443: //FMOVEM.L <ea>,FPIAR |-|--CC46|-|-----|-----|DAM+-WXZPI|1111_001_000_mmm_rrr-1000010000000000 15444: //FMOVE.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15445: //FMOVEM.L <ea>,FPSR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1000100000000000 15446: //FMOVE.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15447: //FMOVEM.L <ea>,FPCR |-|--CC46|-|-----|-----|D M+-WXZPI|1111_001_000_mmm_rrr-1001000000000000 15448: //FMOVE.X FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011010nnn0000000 15449: //FMOVE.P FPn,<ea>{#k} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011011nnnkkkkkkk 15450: //FMOVE.D FPn,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011101nnn0000000 15451: //FMOVE.P FPn,<ea>{Dk} |-|--CCSS|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-011111nnnkkk0000 15452: //FMOVEM.L FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1010110000000000 15453: //FMOVEM.L FPCR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011010000000000 15454: //FMOVEM.L FPCR/FPSR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011100000000000 15455: //FMOVEM.L FPCR/FPSR/FPIAR,<ea> |-|--CC46|-|-----|-----| M+-WXZ |1111_001_000_mmm_rrr-1011110000000000 15456: //FMOVEM.X #<data>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000dddddddd 15457: //FMOVEM.X <list>,<ea> |-|--CC46|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-11110000llllllll 15458: //FMOVEM.X Dl,<ea> |-|--CC4S|-|-----|-----| M WXZ |1111_001_000_mmm_rrr-111110000lll0000 15459: //FMOVEM.L <ea>,FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1000110000000000 15460: //FMOVEM.L <ea>,FPCR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001010000000000 15461: //FMOVEM.L <ea>,FPCR/FPSR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001100000000000 15462: //FMOVEM.L <ea>,FPCR/FPSR/FPIAR |-|--CC46|-|-----|-----| M+-WXZP |1111_001_000_mmm_rrr-1001110000000000 15463: //FMOVEM.X <ea>,#<data> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000dddddddd 15464: //FMOVEM.X <ea>,<list> |-|--CC46|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-11010000llllllll 15465: //FMOVEM.X <ea>,Dl |-|--CC4S|-|-----|-----| M+ WXZP |1111_001_000_mmm_rrr-110110000lll0000 15466: //FTST.X <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100100000111010 15467: //FMOVE.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000000 15468: //FINT.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000001 15469: //FSINH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000010 15470: //FINTRZ.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000011 15471: //FSQRT.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000100 15472: //FLOGNP1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0000110 15473: //FETOXM1.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001000 15474: //FTANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001001 15475: //FATAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001010 15476: //FASIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001100 15477: //FATANH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001101 15478: //FSIN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001110 15479: //FTAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0001111 15480: //FETOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010000 15481: //FTWOTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010001 15482: //FTENTOX.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010010 15483: //FLOGN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010100 15484: //FLOG10.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010101 15485: //FLOG2.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0010110 15486: //FABS.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011000 15487: //FCOSH.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011001 15488: //FNEG.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011010 15489: //FACOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011100 15490: //FCOS.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011101 15491: //FGETEXP.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011110 15492: //FGETMAN.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0011111 15493: //FDIV.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100000 15494: //FMOD.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100001 15495: //FADD.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100010 15496: //FMUL.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100011 15497: //FSGLDIV.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100100 15498: //FREM.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100101 15499: //FSCALE.X <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100110 15500: //FSGLMUL.X <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0100111 15501: //FSUB.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0101000 15502: //FCMP.X <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010nnn0111000 15503: //FSINCOS.X <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010010sss0110ccc 15504: //FTST.P <ea> |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0100110000111010 15505: //FMOVE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000000 15506: //FINT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000001 15507: //FSINH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000010 15508: //FINTRZ.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000011 15509: //FSQRT.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000100 15510: //FLOGNP1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0000110 15511: //FETOXM1.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001000 15512: //FTANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001001 15513: //FATAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001010 15514: //FASIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001100 15515: //FATANH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001101 15516: //FSIN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001110 15517: //FTAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0001111 15518: //FETOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010000 15519: //FTWOTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010001 15520: //FTENTOX.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010010 15521: //FLOGN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010100 15522: //FLOG10.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010101 15523: //FLOG2.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0010110 15524: //FABS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011000 15525: //FCOSH.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011001 15526: //FNEG.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011010 15527: //FACOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011100 15528: //FCOS.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011101 15529: //FGETEXP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011110 15530: //FGETMAN.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0011111 15531: //FDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100000 15532: //FMOD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100001 15533: //FADD.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100010 15534: //FMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100011 15535: //FSGLDIV.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100100 15536: //FREM.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100101 15537: //FSCALE.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100110 15538: //FSGLMUL.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0100111 15539: //FSUB.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0101000 15540: //FCMP.P <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011nnn0111000 15541: //FSINCOS.P <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010011sss0110ccc 15542: //FTST.D <ea> |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-0101010000111010 15543: //FMOVE.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000000 15544: //FINT.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000001 15545: //FSINH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000010 15546: //FINTRZ.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000011 15547: //FSQRT.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000100 15548: //FLOGNP1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0000110 15549: //FETOXM1.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001000 15550: //FTANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001001 15551: //FATAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001010 15552: //FASIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001100 15553: //FATANH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001101 15554: //FSIN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001110 15555: //FTAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0001111 15556: //FETOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010000 15557: //FTWOTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010001 15558: //FTENTOX.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010010 15559: //FLOGN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010100 15560: //FLOG10.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010101 15561: //FLOG2.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0010110 15562: //FABS.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011000 15563: //FCOSH.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011001 15564: //FNEG.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011010 15565: //FACOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011100 15566: //FCOS.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011101 15567: //FGETEXP.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011110 15568: //FGETMAN.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0011111 15569: //FDIV.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100000 15570: //FMOD.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100001 15571: //FADD.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100010 15572: //FMUL.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100011 15573: //FSGLDIV.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100100 15574: //FREM.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100101 15575: //FSCALE.D <ea>,FPn |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100110 15576: //FSGLMUL.D <ea>,FPn |-|--CCS6|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0100111 15577: //FSUB.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0101000 15578: //FCMP.D <ea>,FPn |-|--CC46|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101nnn0111000 15579: //FSINCOS.D <ea>,FPc:FPs |-|--CCSS|-|-----|-----| M+-WXZPI|1111_001_000_mmm_rrr-010101sss0110ccc 15580: //FMOVEM.X #<data>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000dddddddd 15581: //FMOVEM.X <list>,-(Ar) |-|--CC46|-|-----|-----| - |1111_001_000_100_rrr-11100000llllllll 15582: //FMOVEM.X Dl,-(Ar) |-|--CC4S|-|-----|-----| - |1111_001_000_100_rrr-111010000lll0000 15583: //FMOVEM.L #<data>,#<data>,FPSR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1000110000000000-{data} 15584: //FMOVEM.L #<data>,#<data>,FPCR/FPIAR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001010000000000-{data} 15585: //FMOVEM.L #<data>,#<data>,FPCR/FPSR |-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001100000000000-{data} 15586: //FMOVEM.L #<data>,#<data>,#<data>,FPCR/FPSR/FPIAR|-|--CC4S|-|-----|-----| I|1111_001_000_111_100-1001110000000000-{data} 15587: @SuppressWarnings ("fallthrough") public static void irpFgen () throws M68kException { 15588: fgen: { 15589: if (XEiJ.currentFPU == 0) { 15590: irpFline (); 15591: break fgen; 15592: } 15593: XEiJ.mpuCycleCount += 16; 15594: int ea = XEiJ.regOC & 63; 15595: int w; 15596: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 15597: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 15598: } else { 15599: w = XEiJ.regPC; 15600: XEiJ.regPC = w + 2; 15601: w = XEiJ.busRwze (w); //pcwz。拡張ワード 15602: } 15603: int m = w >> 10 & 7; 15604: int n = w >> 7 & 7; 15605: int c = w & 0x7f; 15606: XEiJ.fpuBox.epbSetRoundingPrec (XEiJ.fpuBox.epbFpcr >> 6 & 3); //丸め桁数 15607: XEiJ.fpuBox.epbSetRoundingMode (XEiJ.fpuBox.epbFpcr >> 4 & 3); //丸めモード 15608: int a = 0; //実効アドレス 15609: 15610: 15611: switch (w >> 13) { 15612: 15613: 15614: case 0b010: //$4xxx-$5xxx: Fop.* <ea>,FPn 15615: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15616: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15617: 15618: switch (m) { 15619: 15620: case 0b000: //$40xx-$43xx: Fop.L <ea>,FPn 15621: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))); 15622: break; 15623: 15624: case 0b001: //$44xx-$47xx: Fop.S <ea>,FPn 15625: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setf0 (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))); 15626: break; 15627: 15628: case 0b010: //$48xx-$4Bxx: Fop.X <ea>,FPn 15629: { 15630: a = efaAnyExtd (ea); 15631: int i = XEiJ.busRls (a); 15632: long l = (long) XEiJ.busRls (a + 4) << 32 | 0xffffffffL & XEiJ.busRls (a + 8); 15633: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 15634: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].sety012 (i, l); 15635: } else { //拡張精度 15636: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setx012 (i, l); 15637: } 15638: } 15639: break; 15640: 15641: case 0b011: //$4Cxx-$4Fxx: Fop.P <ea>,FPn 15642: { 15643: a = efaAnyExtd (ea); 15644: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setp012 (XEiJ.busRls (a), (long) XEiJ.busRls (a + 4) << 32 | 0xffffffffL & XEiJ.busRls (a + 8)); 15645: } 15646: break; 15647: 15648: case 0b100: //$50xx-$53xx: Fop.W <ea>,FPn 15649: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (ea < XEiJ.EA_AR ? (short) XEiJ.regRn[ea] : XEiJ.busRws (a = efaAnyWord (ea))); 15650: break; 15651: 15652: case 0b101: //$54xx-$57xx: Fop.D <ea>,FPn 15653: { 15654: a = efaAnyQuad (ea); 15655: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].setd01 ((long) XEiJ.busRls (a) << 32 | 0xffffffffL & XEiJ.busRls (a + 4)); 15656: } 15657: break; 15658: 15659: case 0b110: //$58xx-$5Bxx: Fop.B <ea>,FPn 15660: XEiJ.fpuFPn[m = EFPBox.EPB_SRC_TMP].seti (ea < XEiJ.EA_AR ? (byte) XEiJ.regRn[ea] : XEiJ.busRbs (a = efaAnyByte (ea))); 15661: break; 15662: 15663: case 0b111: //$5Cxx-$5Fxx: FMOVECR.X #ccc,FPn 15664: default: 15665: if (0x40 <= c) { 15666: //マニュアルにはFMOVECRの命令フォーマットのROMオフセットが7bitあるように書かれているが実際は6bit 15667: //MC68882で0x40以上を指定すると命令実行前例外のF-Line Emulator(レスポンス$1C0B)が返る 15668: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 15669: irpFline (); 15670: break fgen; 15671: } 15672: if (false) { 15673: m = EFPBox.EPB_CONST_START + c; //定数 15674: c = 0; //FMOVE 15675: } else { 15676: //FMOVECR 15677: XEiJ.fpuBox.epbFmovecr (XEiJ.fpuFPn[n], c); 15678: //FPSRのAEXCを設定する 15679: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 15680: //浮動小数点命令実行後例外 floating-point post-instruction exception 15681: if (irpFPPostInstruction (a)) { 15682: break fgen; 15683: } 15684: break fgen; 15685: } 15686: } 15687: //浮動小数点命令実行前例外 floating-point pre-instruction exception 15688: if (irpFPPreInstruction ()) { 15689: break fgen; 15690: } 15691: //Fop.X <ea>,FPn → Fop.X FP[EFPBox.EPB_SRC_TMP],FPn 15692: //FMOVECR.X #ccc,FPn → FMOVE.X FPc,FPn 15693: 15694: 15695: //fallthrough 15696: case 0b000: //$0xxx-$1xxx: Fop.X FPm,FPn 15697: if (w >> 13 == 0) { 15698: XEiJ.fpuBox.epbFpsr &= 0x00ff00ff; 15699: } 15700: //Fop.* <ea>,FPnのときFPIARは設定済み 15701: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 15702: 15703: switch (c) { 15704: 15705: case 0b000_0000: //$xx00: FMOVE.* *m,FPn 15706: // BSUN 常にクリア 15707: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15708: // OPERR 常にクリア 15709: // OVFL 常にクリア 15710: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15711: // DZ 常にクリア 15712: // INEX2 結果に誤差があるときセット、それ以外はクリア 15713: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15714: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 15715: break; 15716: 15717: case 0b000_0001: //$xx01: FINT.* *m,FPn 15718: // BSUN 常にクリア 15719: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15720: // OPERR 常にクリア 15721: // OVFL 常にクリア 15722: // 正規化数の最大値は整数なので丸めても大きくなることはない 15723: // UNFL 常にクリア 15724: // 結果は整数なので非正規化数にはならない 15725: // DZ 常にクリア 15726: // INEX2 結果に誤差があるときセット、それ以外はクリア 15727: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15728: // FINTはsingleとdoubleの丸め処理を行わない 15729: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15730: XEiJ.fpuFPn[n].round (XEiJ.fpuFPn[m], XEiJ.fpuBox.epbRoundingMode); 15731: break; 15732: 15733: case 0b000_0010: //$xx02: FSINH.* *m,FPn 15734: // BSUN 常にクリア 15735: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15736: // OPERR 常にクリア 15737: // OVFL オーバーフローしたときセット、それ以外はクリア 15738: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15739: // DZ 常にクリア 15740: // INEX2 結果に誤差があるときセット、それ以外はクリア 15741: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15742: XEiJ.fpuFPn[n].sinh (XEiJ.fpuFPn[m]); 15743: break; 15744: 15745: case 0b000_0011: //$xx03: FINTRZ.* *m,FPn 15746: // BSUN 常にクリア 15747: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15748: // OPERR 常にクリア 15749: // OVFL 常にクリア 15750: // UNFL 常にクリア 15751: // 結果は整数なので非正規化数にはならない 15752: // DZ 常にクリア 15753: // INEX2 結果に誤差があるときセット、それ以外はクリア 15754: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15755: // FINTRZはsingleとdoubleの丸め処理を行わない 15756: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_EXD); 15757: XEiJ.fpuFPn[n].trunc (XEiJ.fpuFPn[m]); 15758: break; 15759: 15760: case 0b000_0100: //$xx04: FSQRT.* *m,FPn 15761: case 0b000_0101: //$xx05: FSQRT.* *m,FPn (MC68882) 15762: // BSUN 常にクリア 15763: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15764: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 15765: // OVFL 常にクリア 15766: // 1よりも大きい数は小さくなるので溢れることはない 15767: // UNFL 常にクリア 15768: // 非正規化数の平方根は正規化数なので結果が非正規化数になることはない 15769: // DZ 常にクリア 15770: // INEX2 結果に誤差があるときセット、それ以外はクリア 15771: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15772: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 15773: break; 15774: 15775: case 0b000_0110: //$xx06: FLOGNP1.* *m,FPn 15776: case 0b000_0111: //$xx07: FLOGNP1.* *m,FPn (MC68882) 15777: // BSUN 常にクリア 15778: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15779: // OPERR 引数が-1よりも小さいときセット、それ以外はクリア 15780: // OVFL 常にクリア 15781: // log(1+0)=0,log(1+x)<=xなので結果が引数よりも大きくなることはない 15782: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15783: // DZ 引数が-1のときセット、それ以外はクリア 15784: // INEX2 結果に誤差があるときセット、それ以外はクリア 15785: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15786: XEiJ.fpuFPn[n].log1p (XEiJ.fpuFPn[m]); 15787: break; 15788: 15789: case 0b000_1000: //$xx08: FETOXM1.* *m,FPn 15790: // BSUN 常にクリア 15791: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15792: // OPERR 常にクリア 15793: // OVFL オーバーフローしたときセット、それ以外はクリア 15794: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15795: // DZ 常にクリア 15796: // INEX2 結果に誤差があるときセット、それ以外はクリア 15797: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15798: XEiJ.fpuFPn[n].expm1 (XEiJ.fpuFPn[m]); 15799: break; 15800: 15801: case 0b000_1001: //$xx09: FTANH.* *m,FPn 15802: // BSUN 常にクリア 15803: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15804: // OPERR 常にクリア 15805: // OVFL 常にクリア 15806: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15807: // DZ 常にクリア 15808: // INEX2 結果に誤差があるときセット、それ以外はクリア 15809: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15810: XEiJ.fpuFPn[n].tanh (XEiJ.fpuFPn[m]); 15811: break; 15812: 15813: case 0b000_1010: //$xx0A: FATAN.* *m,FPn 15814: case 0b000_1011: //$xx0B: FATAN.* *m,FPn (MC68882) 15815: // BSUN 常にクリア 15816: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15817: // OPERR 常にクリア 15818: // OVFL 常にクリア 15819: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15820: // DZ 常にクリア 15821: // INEX2 結果に誤差があるときセット、それ以外はクリア 15822: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15823: XEiJ.fpuFPn[n].atan (XEiJ.fpuFPn[m]); 15824: break; 15825: 15826: case 0b000_1100: //$xx0C: FASIN.* *m,FPn 15827: // BSUN 常にクリア 15828: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15829: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15830: // OVFL 常にクリア 15831: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15832: // DZ 常にクリア 15833: // INEX2 結果に誤差があるときセット、それ以外はクリア 15834: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15835: XEiJ.fpuFPn[n].asin (XEiJ.fpuFPn[m]); 15836: break; 15837: 15838: case 0b000_1101: //$xx0D: FATANH.* *m,FPn 15839: // BSUN 常にクリア 15840: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15841: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15842: // OVFL 常にクリア 15843: // 1のとき無限大なのだから1の近くでオーバーフローしそうに思えるがatanh(1-2^-80)≒28.07くらい 15844: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15845: // DZ 引数の絶対値が1のときセット、それ以外はクリア 15846: // INEX2 結果に誤差があるときセット、それ以外はクリア 15847: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15848: XEiJ.fpuFPn[n].atanh (XEiJ.fpuFPn[m]); 15849: break; 15850: 15851: case 0b000_1110: //$xx0E: FSIN.* *m,FPn 15852: // BSUN 常にクリア 15853: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15854: // OPERR 引数が無限大のときセット、それ以外はクリア 15855: // OVFL 常にクリア 15856: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15857: // DZ 常にクリア 15858: // INEX2 結果に誤差があるときセット、それ以外はクリア 15859: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15860: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[m]); 15861: break; 15862: 15863: case 0b000_1111: //$xx0F: FTAN.* *m,FPn 15864: // BSUN 常にクリア 15865: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15866: // OPERR 引数が無限大のときセット、それ以外はクリア 15867: // OVFL オーバーフローしたときセット、それ以外はクリア 15868: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15869: // DZ 常にクリア 15870: // cos(x)=0を満たすxは正確に表現できないのだからsin(x)/cos(x)がゼロ除算になるのはおかしい 15871: // INEX2 結果に誤差があるときセット、それ以外はクリア 15872: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15873: XEiJ.fpuFPn[n].tan (XEiJ.fpuFPn[m]); 15874: break; 15875: 15876: case 0b001_0000: //$xx10: FETOX.* *m,FPn 15877: // BSUN 常にクリア 15878: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15879: // OPERR 常にクリア 15880: // OVFL オーバーフローしたときセット、それ以外はクリア 15881: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15882: // DZ 常にクリア 15883: // INEX2 結果に誤差があるときセット、それ以外はクリア 15884: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15885: XEiJ.fpuFPn[n].exp (XEiJ.fpuFPn[m]); 15886: break; 15887: 15888: case 0b001_0001: //$xx11: FTWOTOX.* *m,FPn 15889: // BSUN 常にクリア 15890: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15891: // OPERR 常にクリア 15892: // OVFL オーバーフローしたときセット、それ以外はクリア 15893: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15894: // DZ 常にクリア 15895: // INEX2 結果に誤差があるときセット、それ以外はクリア 15896: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15897: XEiJ.fpuFPn[n].exp2 (XEiJ.fpuFPn[m]); 15898: break; 15899: 15900: case 0b001_0010: //$xx12: FTENTOX.* *m,FPn 15901: case 0b001_0011: //$xx13: FTENTOX.* *m,FPn (MC68882) 15902: // BSUN 常にクリア 15903: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15904: // OPERR 常にクリア 15905: // OVFL オーバーフローしたときセット、それ以外はクリア 15906: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15907: // DZ 常にクリア 15908: // INEX2 結果に誤差があるときセット、それ以外はクリア 15909: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15910: XEiJ.fpuFPn[n].exp10 (XEiJ.fpuFPn[m]); 15911: break; 15912: 15913: case 0b001_0100: //$xx14: FLOGN.* *m,FPn 15914: // BSUN 常にクリア 15915: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15916: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 15917: // OVFL 常にクリア 15918: // log(1)=0,log(x)<=x-1なので結果が引数よりも大きくなることはない 15919: // UNFL 常にクリア 15920: // log(1+2^-80)≒2^-80 15921: // DZ 引数がゼロのときセット、それ以外はクリア 15922: // INEX2 結果に誤差があるときセット、それ以外はクリア 15923: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15924: XEiJ.fpuFPn[n].log (XEiJ.fpuFPn[m]); 15925: break; 15926: 15927: case 0b001_0101: //$xx15: FLOG10.* *m,FPn 15928: // BSUN 常にクリア 15929: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15930: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 15931: // OVFL 常にクリア 15932: // UNFL 常にクリア 15933: // DZ 引数がゼロのときセット、それ以外はクリア 15934: // INEX2 結果に誤差があるときセット、それ以外はクリア 15935: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15936: XEiJ.fpuFPn[n].log10 (XEiJ.fpuFPn[m]); 15937: break; 15938: 15939: case 0b001_0110: //$xx16: FLOG2.* *m,FPn 15940: case 0b001_0111: //$xx17: FLOG2.* *m,FPn (MC68882) 15941: // BSUN 常にクリア 15942: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15943: // OPERR 引数が0よりも小さいときセット、それ以外はクリア 15944: // OVFL 常にクリア 15945: // UNFL 常にクリア 15946: // DZ 引数がゼロのときセット、それ以外はクリア 15947: // INEX2 結果に誤差があるときセット、それ以外はクリア 15948: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15949: XEiJ.fpuFPn[n].log2 (XEiJ.fpuFPn[m]); 15950: break; 15951: 15952: case 0b001_1000: //$xx18: FABS.* *m,FPn 15953: // BSUN 常にクリア 15954: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15955: // OPERR 常にクリア 15956: // OVFL 常にクリア 15957: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15958: // DZ 常にクリア 15959: // INEX2 常にクリア 15960: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15961: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 15962: break; 15963: 15964: case 0b001_1001: //$xx19: FCOSH.* *m,FPn 15965: // BSUN 常にクリア 15966: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15967: // OPERR 常にクリア 15968: // OVFL オーバーフローしたときセット、それ以外はクリア 15969: // UNFL 常にクリア 15970: // DZ 常にクリア 15971: // INEX2 結果に誤差があるときセット、それ以外はクリア 15972: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15973: XEiJ.fpuFPn[n].cosh (XEiJ.fpuFPn[m]); 15974: break; 15975: 15976: case 0b001_1010: //$xx1A: FNEG.* *m,FPn 15977: case 0b001_1011: //$xx1B: FNEG.* *m,FPn (MC68882) 15978: // BSUN 常にクリア 15979: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15980: // OPERR 常にクリア 15981: // OVFL 常にクリア 15982: // UNFL 結果が非正規化数のときセット、それ以外はクリア 15983: // DZ 常にクリア 15984: // INEX2 常にクリア 15985: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 15986: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 15987: break; 15988: 15989: case 0b001_1100: //$xx1C: FACOS.* *m,FPn 15990: // BSUN 常にクリア 15991: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 15992: // OPERR 引数の絶対値が1よりも大きいときセット、それ以外はクリア 15993: // OVFL 常にクリア 15994: // UNFL 常にクリア 15995: // acos(1-ulp(1))はulp(1)よりも大きい 15996: // DZ 常にクリア 15997: // INEX2 結果に誤差があるときセット、それ以外はクリア 15998: // おそらくセットされないのはacos(1)=0だけ 15999: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16000: XEiJ.fpuFPn[n].acos (XEiJ.fpuFPn[m]); 16001: break; 16002: 16003: case 0b001_1101: //$xx1D: FCOS.* *m,FPn 16004: // BSUN 常にクリア 16005: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16006: // OPERR 引数が無限大のときセット、それ以外はクリア 16007: // OVFL 常にクリア 16008: // UNFL 常にクリア 16009: // cos(x)=0を満たすxは正確に表現できず、cos(pi/2)とcos(3*pi/2)が正規化数になってしまう 16010: // DZ 常にクリア 16011: // INEX2 結果に誤差があるときセット、それ以外はクリア 16012: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16013: XEiJ.fpuFPn[n].cos (XEiJ.fpuFPn[m]); 16014: break; 16015: 16016: case 0b001_1110: //$xx1E: FGETEXP.* *m,FPn 16017: // BSUN 常にクリア 16018: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16019: // OPERR 引数が無限大のときセット、それ以外はクリア 16020: // OVFL 常にクリア 16021: // UNFL 常にクリア 16022: // DZ 常にクリア 16023: // INEX2 常にクリア 16024: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16025: XEiJ.fpuFPn[n].getexp (XEiJ.fpuFPn[m]); 16026: break; 16027: 16028: case 0b001_1111: //$xx1F: FGETMAN.* *m,FPn 16029: // BSUN 常にクリア 16030: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16031: // OPERR 引数が無限大のときセット、それ以外はクリア 16032: // OVFL 常にクリア 16033: // UNFL 常にクリア 16034: // DZ 常にクリア 16035: // INEX2 常にクリア 16036: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16037: XEiJ.fpuFPn[n].getman (XEiJ.fpuFPn[m]); 16038: break; 16039: 16040: case 0b010_0000: //$xx20: FDIV.* *m,FPn 16041: // BSUN 常にクリア 16042: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16043: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16044: // OVFL オーバーフローしたときセット、それ以外はクリア 16045: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16046: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16047: // INEX2 結果に誤差があるときセット、それ以外はクリア 16048: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16049: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16050: break; 16051: 16052: case 0b010_0001: //$xx21: FMOD.* *m,FPn 16053: // BSUN 常にクリア 16054: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16055: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16056: // OVFL 常にクリア 16057: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16058: // DZ 常にクリア 16059: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16060: // INEX2 結果に誤差があるときセット、それ以外はクリア 16061: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16062: // FPSRのquotient byteに符号付き商の下位7bitが入る 16063: XEiJ.fpuFPn[n].rem (XEiJ.fpuFPn[m]); 16064: break; 16065: 16066: case 0b010_0010: //$xx22: FADD.* *m,FPn 16067: // BSUN 常にクリア 16068: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16069: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16070: // OVFL オーバーフローしたときセット、それ以外はクリア 16071: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16072: // DZ 常にクリア 16073: // INEX2 結果に誤差があるときセット、それ以外はクリア 16074: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16075: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16076: break; 16077: 16078: case 0b010_0011: //$xx23: FMUL.* *m,FPn 16079: // BSUN 常にクリア 16080: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16081: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16082: // OVFL オーバーフローしたときセット、それ以外はクリア 16083: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16084: // DZ 常にクリア 16085: // INEX2 結果に誤差があるときセット、それ以外はクリア 16086: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16087: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16088: break; 16089: 16090: case 0b010_0100: //$xx24: FSGLDIV.* *m,FPn 16091: // BSUN 常にクリア 16092: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16093: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16094: // OVFL オーバーフローしたときセット、それ以外はクリア 16095: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16096: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16097: // INEX2 結果に誤差があるときセット、それ以外はクリア 16098: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16099: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16100: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16101: break; 16102: 16103: case 0b010_0101: //$xx25: FREM.* *m,FPn 16104: // BSUN 常にクリア 16105: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16106: // OPERR 除数がゼロまたは被除数が無限大のときセット、それ以外はクリア 16107: // OVFL 常にクリア 16108: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16109: // DZ 常にクリア 16110: // 除数がゼロのとき結果は無限大ではなくNaNでありゼロ除算にはならない 16111: // INEX2 結果に誤差があるときセット、それ以外はクリア 16112: // マニュアルにClearedと書いてあるのは間違い 16113: // 除数が無限大で被除数をそのまま返す場合でもサイズが減ればアンダーフローや不正確な結果になることはマニュアルにも書かれている 16114: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16115: // FPSRのquotient byteに符号付き商の下位7bitが入る 16116: XEiJ.fpuFPn[n].ieeerem (XEiJ.fpuFPn[m]); 16117: break; 16118: 16119: case 0b010_0110: //$xx26: FSCALE.* *m,FPn 16120: // BSUN 常にクリア 16121: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16122: // OPERR 引数が無限大のときセット、それ以外はクリア 16123: // OVFL オーバーフローしたときセット、それ以外はクリア 16124: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16125: // DZ 常にクリア 16126: // INEX2 常にクリア 16127: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16128: //! 本来はソースが整数のとき浮動小数点数を経由しないが、これは経由してしまっている。結果は同じだが効率が悪い 16129: XEiJ.fpuFPn[n].scale (XEiJ.fpuFPn[m]); 16130: break; 16131: 16132: case 0b010_0111: //$xx27: FSGLMUL.* *m,FPn 16133: // BSUN 常にクリア 16134: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16135: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16136: // OVFL オーバーフローしたときセット、それ以外はクリア 16137: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16138: // DZ 常にクリア 16139: // INEX2 結果に誤差があるときセット、それ以外はクリア 16140: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16141: { 16142: //引数を24bitに切り捨てるときX2をセットしない 16143: int sr = XEiJ.fpuBox.epbFpsr; 16144: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].roundmanf (XEiJ.fpuFPn[m], EFPBox.EPB_MODE_RZ); 16145: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].roundmanf (XEiJ.fpuFPn[n], EFPBox.EPB_MODE_RZ); 16146: XEiJ.fpuBox.epbFpsr = sr; 16147: } 16148: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_XSG); 16149: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[EFPBox.EPB_DST_TMP], XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16150: break; 16151: 16152: case 0b010_1000: //$xx28: FSUB.* *m,FPn 16153: case 0b010_1001: //$xx29: FSUB.* *m,FPn (MC68882) 16154: case 0b010_1010: //$xx2A: FSUB.* *m,FPn (MC68882) 16155: case 0b010_1011: //$xx2B: FSUB.* *m,FPn (MC68882) 16156: case 0b010_1100: //$xx2C: FSUB.* *m,FPn (MC68882) 16157: case 0b010_1101: //$xx2D: FSUB.* *m,FPn (MC68882) 16158: case 0b010_1110: //$xx2E: FSUB.* *m,FPn (MC68882) 16159: case 0b010_1111: //$xx2F: FSUB.* *m,FPn (MC68882) 16160: // BSUN 常にクリア 16161: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16162: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16163: // OVFL オーバーフローしたときセット、それ以外はクリア 16164: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16165: // DZ 常にクリア 16166: // INEX2 結果に誤差があるときセット、それ以外はクリア 16167: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16168: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16169: break; 16170: 16171: case 0b011_0000: //$xx30: FSINCOS.* *m,FP0:FPn (c=0,s=n) 16172: case 0b011_0001: //$xx31: FSINCOS.* *m,FP1:FPn (c=1,s=n) 16173: case 0b011_0010: //$xx32: FSINCOS.* *m,FP2:FPn (c=2,s=n) 16174: case 0b011_0011: //$xx33: FSINCOS.* *m,FP3:FPn (c=3,s=n) 16175: case 0b011_0100: //$xx34: FSINCOS.* *m,FP4:FPn (c=4,s=n) 16176: case 0b011_0101: //$xx35: FSINCOS.* *m,FP5:FPn (c=5,s=n) 16177: case 0b011_0110: //$xx36: FSINCOS.* *m,FP6:FPn (c=6,s=n) 16178: case 0b011_0111: //$xx37: FSINCOS.* *m,FP7:FPn (c=7,s=n) 16179: // BSUN 常にクリア 16180: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16181: // OPERR 引数が無限大のときセット、それ以外はクリア 16182: // OVFL 常にクリア 16183: // UNFL sin(x)の結果が非正規化数のときセット、それ以外はクリア 16184: // cos(x)の結果は非正規化数にならない 16185: // DZ 常にクリア 16186: // INEX2 結果に誤差があるときセット、それ以外はクリア 16187: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16188: c &= 7; 16189: //m==EFPBox.EPB_SRC_TMP||m==n||m==cの場合があることに注意する 16190: XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP].sete (XEiJ.fpuFPn[m]); 16191: XEiJ.fpuFPn[c].cos (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16192: XEiJ.fpuFPn[n].sin (XEiJ.fpuFPn[EFPBox.EPB_SRC_TMP]); 16193: break; 16194: 16195: case 0b011_1000: //$xx38: FCMP.* *m,FPn 16196: case 0b011_1001: //$xx39: FCMP.* *m,FPn (MC68882) 16197: case 0b011_1100: //$xx3C: FCMP.* *m,FPn (MC68882) コマンドワードの不連続箇所に注意 16198: case 0b011_1101: //$xx3D: FCMP.* *m,FPn (MC68882) 16199: // BSUN 常にクリア 16200: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16201: // OPERR 常にクリア 16202: // OVFL 常にクリア 16203: // UNFL 常にクリア 16204: // DZ 常にクリア 16205: // INEX2 常にクリア 16206: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16207: // FCMPはinfinityを常にクリアする 16208: // efp.compareTo(x,y)を使う 16209: // efp.compareTo(x,y)はefp.sub(x,y)よりも速い 16210: // efp.sub(x,y)はINEX2をセットしてしまう 16211: // efp.compareTo(x,y)は-0<+0だがFCMPは-0==+0なのでこれだけ調節する 16212: { 16213: int xf = XEiJ.fpuFPn[n].flg; 16214: int yf = XEiJ.fpuFPn[m].flg; 16215: if ((xf | yf) << 3 < 0) { //どちらかがNaN 16216: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].setnan (); 16217: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.N; 16218: } else { 16219: int i = ((xf & yf) << 1 < 0 ? 0 : //両方±0 16220: XEiJ.fpuFPn[n].compareTo (XEiJ.fpuFPn[m])); //-Inf==-Inf<-x<-0<+0<+x<+Inf==+Inf<NaN==NaN 16221: if (i == 0) { 16222: if (xf < 0) { 16223: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset0 (); 16224: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.M | EFPBox.Z; 16225: } else { 16226: //XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set0 (); 16227: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].flg = EFPBox.P | EFPBox.Z; 16228: } 16229: } else if (i < 0) { 16230: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].negset1 (); 16231: } else { 16232: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].set1 (); 16233: } 16234: } 16235: n = EFPBox.EPB_DST_TMP; 16236: } 16237: break; 16238: 16239: case 0b011_1010: //$xx3A: FTST.* *m 16240: case 0b011_1011: //$xx3B: FTST.* *m (MC68882) 16241: case 0b011_1110: //$xx3E: FTST.* *m (MC68882) コマンドワードの不連続箇所に注意 16242: case 0b011_1111: //$xx3F: FTST.* *m (MC68882) 16243: // BSUN 常にクリア 16244: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16245: // OPERR 常にクリア 16246: // OVFL 常にクリア 16247: // UNFL 常にクリア 16248: // DZ 常にクリア 16249: // INEX2 常にクリア 16250: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16251: // ソースオペランドをダミーのデスティネーションオペランドにコピーしてテストする 16252: // デスティネーションオペランドは変化しない 16253: // デスティネーションオペランドにはFP0が指定される場合が多いがFP0である必要はない 16254: XEiJ.fpuFPn[EFPBox.EPB_DST_TMP].sete (XEiJ.fpuFPn[m]); 16255: n = EFPBox.EPB_DST_TMP; 16256: break; 16257: 16258: case 0b100_0000: //$xx40: FSMOVE.* *m,FPn 16259: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16260: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16261: irpFline (); 16262: break fgen; 16263: } 16264: // BSUN 常にクリア 16265: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16266: // OPERR 常にクリア 16267: // OVFL 常にクリア 16268: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16269: // DZ 常にクリア 16270: // INEX2 結果に誤差があるときセット、それ以外はクリア 16271: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16272: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16273: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16274: break; 16275: 16276: case 0b100_0001: //$xx41: FSSQRT.* *m,FPn 16277: // BSUN 常にクリア 16278: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16279: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16280: // OVFL 常にクリア 16281: // UNFL 常にクリア 16282: // DZ 常にクリア 16283: // INEX2 結果に誤差があるときセット、それ以外はクリア 16284: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16285: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16286: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16287: irpFline (); 16288: break fgen; 16289: } 16290: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16291: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16292: break; 16293: 16294: //case 0b100_0010: //$xx42: 16295: //case 0b100_0011: //$xx43: 16296: 16297: case 0b100_0100: //$xx44: FDMOVE.* *m,FPn 16298: // BSUN 常にクリア 16299: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16300: // OPERR 常にクリア 16301: // OVFL 常にクリア 16302: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16303: // DZ 常にクリア 16304: // INEX2 結果に誤差があるときセット、それ以外はクリア 16305: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16306: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16307: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16308: irpFline (); 16309: break fgen; 16310: } 16311: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16312: XEiJ.fpuFPn[n].sete (XEiJ.fpuFPn[m]).finish (); 16313: break; 16314: 16315: case 0b100_0101: //$xx45: FDSQRT.* *m,FPn 16316: // BSUN 常にクリア 16317: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16318: // OPERR 引数が-0を除く負数のときセット、それ以外はクリア 16319: // OVFL 常にクリア 16320: // UNFL 常にクリア 16321: // DZ 常にクリア 16322: // INEX2 結果に誤差があるときセット、それ以外はクリア 16323: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16324: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16325: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16326: irpFline (); 16327: break fgen; 16328: } 16329: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16330: XEiJ.fpuFPn[n].sqrt (XEiJ.fpuFPn[m]); 16331: break; 16332: 16333: //case 0b100_0110: //$xx46: 16334: //case 0b100_0111: //$xx47: 16335: //case 0b100_1000: //$xx48: 16336: //case 0b100_1001: //$xx49: 16337: //case 0b100_1010: //$xx4A: 16338: //case 0b100_1011: //$xx4B: 16339: //case 0b100_1100: //$xx4C: 16340: //case 0b100_1101: //$xx4D: 16341: //case 0b100_1110: //$xx4E: 16342: //case 0b100_1111: //$xx4F: 16343: //case 0b101_0000: //$xx50: 16344: //case 0b101_0001: //$xx51: 16345: //case 0b101_0010: //$xx52: 16346: //case 0b101_0011: //$xx53: 16347: //case 0b101_0100: //$xx54: 16348: //case 0b101_0101: //$xx55: 16349: //case 0b101_0110: //$xx56: 16350: //case 0b101_0111: //$xx57: 16351: 16352: case 0b101_1000: //$xx58: FSABS.* *m,FPn 16353: // BSUN 常にクリア 16354: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16355: // OPERR 常にクリア 16356: // OVFL 常にクリア 16357: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16358: // DZ 常にクリア 16359: // INEX2 常にクリア 16360: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16361: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16362: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16363: irpFline (); 16364: break fgen; 16365: } 16366: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16367: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16368: break; 16369: 16370: //case 0b101_1001: //$xx59: 16371: 16372: case 0b101_1010: //$xx5A: FSNEG.* *m,FPn 16373: // BSUN 常にクリア 16374: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16375: // OPERR 常にクリア 16376: // OVFL 常にクリア 16377: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16378: // DZ 常にクリア 16379: // INEX2 常にクリア 16380: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16381: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16382: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16383: irpFline (); 16384: break fgen; 16385: } 16386: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16387: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16388: break; 16389: 16390: //case 0b101_1011: //$xx5B: 16391: 16392: case 0b101_1100: //$xx5C: FDABS.* *m,FPn 16393: // BSUN 常にクリア 16394: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16395: // OPERR 常にクリア 16396: // OVFL 常にクリア 16397: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16398: // DZ 常にクリア 16399: // INEX2 常にクリア 16400: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16401: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16402: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16403: irpFline (); 16404: break fgen; 16405: } 16406: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16407: XEiJ.fpuFPn[n].abs (XEiJ.fpuFPn[m]); 16408: break; 16409: 16410: //case 0b101_1101: //$xx5D: 16411: 16412: case 0b101_1110: //$xx5E: FDNEG.* *m,FPn 16413: // BSUN 常にクリア 16414: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16415: // OPERR 常にクリア 16416: // OVFL 常にクリア 16417: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16418: // DZ 常にクリア 16419: // INEX2 常にクリア 16420: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16421: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16422: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16423: irpFline (); 16424: break fgen; 16425: } 16426: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16427: XEiJ.fpuFPn[n].neg (XEiJ.fpuFPn[m]); 16428: break; 16429: 16430: //case 0b101_1111: //$xx5F: 16431: 16432: case 0b110_0000: //$xx60: FSDIV.* *m,FPn 16433: // BSUN 常にクリア 16434: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16435: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16436: // OVFL オーバーフローしたときセット、それ以外はクリア 16437: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16438: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16439: // INEX2 結果に誤差があるときセット、それ以外はクリア 16440: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16441: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16442: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16443: irpFline (); 16444: break fgen; 16445: } 16446: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16447: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16448: break; 16449: 16450: //case 0b110_0001: //$xx61: 16451: 16452: case 0b110_0010: //$xx62: FSADD.* *m,FPn 16453: // BSUN 常にクリア 16454: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16455: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16456: // OVFL オーバーフローしたときセット、それ以外はクリア 16457: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16458: // DZ 常にクリア 16459: // INEX2 結果に誤差があるときセット、それ以外はクリア 16460: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16461: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16462: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16463: irpFline (); 16464: break fgen; 16465: } 16466: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16467: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16468: break; 16469: 16470: case 0b110_0011: //$xx63: FSMUL.* *m,FPn 16471: // BSUN 常にクリア 16472: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16473: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16474: // OVFL オーバーフローしたときセット、それ以外はクリア 16475: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16476: // DZ 常にクリア 16477: // INEX2 結果に誤差があるときセット、それ以外はクリア 16478: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16479: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16480: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16481: irpFline (); 16482: break fgen; 16483: } 16484: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16485: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16486: break; 16487: 16488: case 0b110_0100: //$xx64: FDDIV.* *m,FPn 16489: // BSUN 常にクリア 16490: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16491: // OPERR 引数が両方ゼロまたは両方無限大のときセット、それ以外はクリア 16492: // OVFL オーバーフローしたときセット、それ以外はクリア 16493: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16494: // DZ 被除数がゼロ、無限大、NaN以外で除数がゼロのときセット、それ以外はクリア 16495: // INEX2 結果に誤差があるときセット、それ以外はクリア 16496: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16497: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16498: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16499: irpFline (); 16500: break fgen; 16501: } 16502: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16503: XEiJ.fpuFPn[n].div (XEiJ.fpuFPn[m]); 16504: break; 16505: 16506: //case 0b110_0101: //$xx65: 16507: 16508: case 0b110_0110: //$xx66: FDADD.* *m,FPn 16509: // BSUN 常にクリア 16510: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16511: // OPERR 引数が両方無限大で符号が異なるときセット、それ以外はクリア 16512: // OVFL オーバーフローしたときセット、それ以外はクリア 16513: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16514: // DZ 常にクリア 16515: // INEX2 結果に誤差があるときセット、それ以外はクリア 16516: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16517: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16518: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16519: irpFline (); 16520: break fgen; 16521: } 16522: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16523: XEiJ.fpuFPn[n].add (XEiJ.fpuFPn[m]); 16524: break; 16525: 16526: case 0b110_0111: //$xx67: FDMUL.* *m,FPn 16527: // BSUN 常にクリア 16528: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16529: // OPERR 引数の一方がゼロで他方が無限大のときセット、それ以外はクリア 16530: // OVFL オーバーフローしたときセット、それ以外はクリア 16531: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16532: // DZ 常にクリア 16533: // INEX2 結果に誤差があるときセット、それ以外はクリア 16534: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16535: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16536: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16537: irpFline (); 16538: break fgen; 16539: } 16540: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16541: XEiJ.fpuFPn[n].mul (XEiJ.fpuFPn[m]); 16542: break; 16543: 16544: case 0b110_1000: //$xx68: FSSUB.* *m,FPn 16545: // BSUN 常にクリア 16546: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16547: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16548: // OVFL オーバーフローしたときセット、それ以外はクリア 16549: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16550: // DZ 常にクリア 16551: // INEX2 結果に誤差があるときセット、それ以外はクリア 16552: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16553: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16554: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16555: irpFline (); 16556: break fgen; 16557: } 16558: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_SGL); 16559: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16560: break; 16561: 16562: //case 0b110_1001: //$xx69: 16563: //case 0b110_1010: //$xx6A: 16564: //case 0b110_1011: //$xx6B: 16565: 16566: case 0b110_1100: //$xx6C: FDSUB.* *m,FPn 16567: // BSUN 常にクリア 16568: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16569: // OPERR 引数が両方無限大で符号が同じときセット、それ以外はクリア 16570: // OVFL オーバーフローしたときセット、それ以外はクリア 16571: // UNFL 結果が非正規化数のときセット、それ以外はクリア 16572: // DZ 常にクリア 16573: // INEX2 結果に誤差があるときセット、それ以外はクリア 16574: // INEX1 引数がpackedで正確に変換できないときセット、それ以外はクリア 16575: if (!XEiJ.fpuBox.epbIsFullSpec ()) { 16576: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16577: irpFline (); 16578: break fgen; 16579: } 16580: XEiJ.fpuBox.epbSetRoundingPrec (EFPBox.EPB_PREC_DBL); 16581: XEiJ.fpuFPn[n].sub (XEiJ.fpuFPn[m]); 16582: break; 16583: 16584: //case 0b110_1101: //$xx6D: 16585: //case 0b110_1110: //$xx6E: 16586: //case 0b110_1111: //$xx6F: 16587: 16588: case 0b111_0000: //$xx70: FLGAMMA *m,FPn 16589: if (EFPBox.EPB_EXTRA_OPERATION) { 16590: XEiJ.fpuFPn[n].lgamma (XEiJ.fpuFPn[m]); 16591: break; 16592: } else { 16593: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16594: irpFline (); 16595: break fgen; 16596: } 16597: 16598: case 0b111_0001: //$xx71: FTGAMMA *m,FPn 16599: if (EFPBox.EPB_EXTRA_OPERATION) { 16600: XEiJ.fpuFPn[n].tgamma (XEiJ.fpuFPn[m]); 16601: break; 16602: } else { 16603: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16604: irpFline (); 16605: break fgen; 16606: } 16607: 16608: //case 0b111_0010: //$xx72: 16609: //case 0b111_0011: //$xx73: 16610: //case 0b111_0100: //$xx74: 16611: //case 0b111_0101: //$xx75: 16612: //case 0b111_0110: //$xx76: 16613: //case 0b111_0111: //$xx77: 16614: //case 0b111_1000: //$xx78: 16615: //case 0b111_1001: //$xx79: 16616: //case 0b111_1010: //$xx7A: 16617: //case 0b111_1011: //$xx7B: 16618: //case 0b111_1100: //$xx7C: 16619: //case 0b111_1101: //$xx7D: 16620: //case 0b111_1110: //$xx7E: 16621: //case 0b111_1111: //$xx7F: 16622: 16623: default: //未定義 16624: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16625: irpFline (); 16626: break fgen; 16627: } 16628: //FPSRのFPCCを設定する 16629: XEiJ.fpuBox.epbFpsr |= XEiJ.fpuFPn[n].flg >>> 4; 16630: //FPSRのAEXCを設定する 16631: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16632: //浮動小数点命令実行後例外 floating-point post-instruction exception 16633: if (irpFPPostInstruction (a)) { 16634: break fgen; 16635: } 16636: break fgen; 16637: 16638: 16639: case 0b011: //$6xxx-$7xxx: FMOVE.* FPn,<ea> 16640: // BSUN 常にクリア 16641: // SNAN 引数がシグナリングNaNのときセット、それ以外はクリア 16642: // OPERR byte,word,longで無限大または指定されたサイズに収まらないとき、packedでk-factorが17よりも大きいか指数部が3桁に収まらないときセット、それ以外はクリア 16643: // OVFL packedではなくてオーバーフローしたときセット、それ以外はクリア 16644: // UNFL packedではなくて結果が非正規化数のときセット、それ以外はクリア 16645: // DZ 常にクリア 16646: // INEX2 結果に誤差があるときセット、それ以外はクリア 16647: // INEX1 常にクリア 16648: XEiJ.fpuBox.epbFpsr &= 0xffff00ff; //FMOVE.* FPn,<ea>でFPSRのコンディションコードバイトは変化しない 16649: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 16650: 16651: switch (m) { 16652: 16653: case 0b000: //$60xx-$63xx: FMOVE.L FPn,<ea> 16654: if (ea < XEiJ.EA_AR) { //FMOVE.L FPn,Dr 16655: XEiJ.regRn[ea] = XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode); 16656: } else { //FMOVE.L FPn,<mem> 16657: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuFPn[n].geti (XEiJ.fpuBox.epbRoundingMode)); 16658: } 16659: break; 16660: 16661: case 0b001: //$64xx-$67xx: FMOVE.S FPn,<ea> 16662: if (ea < XEiJ.EA_AR) { //FMOVE.S FPn,Dr 16663: XEiJ.regRn[ea] = XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode); 16664: } else { //FMOVE.S FPn,<mem> 16665: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuFPn[n].getf0 (XEiJ.fpuBox.epbRoundingMode)); 16666: } 16667: break; 16668: 16669: case 0b010: //$68xx-$6Bxx: FMOVE.X FPn,<ea> 16670: { 16671: byte[] b = new byte[12]; 16672: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16673: XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16674: } else { //拡張精度 16675: XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16676: } 16677: XEiJ.busWbb (a = efaMltExtd (ea), b, 0, 12); 16678: } 16679: break; 16680: 16681: case 0b011: //$6Cxx-$6Fxx: FMOVE.P FPn,<ea>{#k} 16682: { 16683: byte[] b = new byte[12]; 16684: XEiJ.fpuFPn[n].getp012 (b, 0, w); //k-factor付き 16685: XEiJ.busWbb (a = efaMltExtd (ea), b, 0, 12); 16686: } 16687: break; 16688: 16689: case 0b100: //$70xx-$73xx: FMOVE.W FPn,<ea> 16690: if (ea < XEiJ.EA_AR) { //FMOVE.W FPn,Dr 16691: XEiJ.regRn[ea] = XEiJ.regRn[ea] & 0xffff0000 | (char) XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode); 16692: } else { //FMOVE.W FPn,<mem> 16693: XEiJ.busWw (a = efaMltWord (ea), XEiJ.fpuFPn[n].gets (XEiJ.fpuBox.epbRoundingMode)); 16694: } 16695: break; 16696: 16697: case 0b101: //$74xx-$77xx: FMOVE.D FPn,<ea> 16698: { 16699: a = efaMltQuad (ea); 16700: long d = XEiJ.fpuFPn[n].getd01 (XEiJ.fpuBox.epbRoundingMode); 16701: XEiJ.busWl (a, (int) (d >>> 32)); 16702: XEiJ.busWl (a + 4, (int) d); 16703: } 16704: break; 16705: 16706: case 0b110: //$78xx-$7Bxx: FMOVE.B FPn,<ea> 16707: if (ea < XEiJ.EA_AR) { //FMOVE.B FPn,Dr 16708: XEiJ.regRn[ea] = XEiJ.regRn[ea] & 0xffffff00 | XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode) & 0xff; 16709: } else { //FMOVE.B FPn,<mem> 16710: XEiJ.busWb (a = efaMltByte (ea), XEiJ.fpuFPn[n].getb (XEiJ.fpuBox.epbRoundingMode)); 16711: } 16712: break; 16713: 16714: case 0b111: //$7Cxx-$7Fxx: FMOVE.P FPn,<ea>{Dl} 16715: default: 16716: { 16717: byte[] b = new byte[12]; 16718: XEiJ.fpuFPn[n].getp012 (b, 0, XEiJ.regRn[w >> 4 & 7]); //k-factor付き 16719: XEiJ.busWbb (a = efaMltExtd (ea), b, 0, 12); 16720: } 16721: } 16722: //FPSRのAEXCを設定する 16723: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 16724: //浮動小数点命令実行後例外 floating-point post-instruction exception 16725: if (irpFPPostInstruction (a)) { 16726: break fgen; 16727: } 16728: break fgen; 16729: 16730: 16731: case 0b100: //$8xxx-$9xxx: FMOVEM.L <ea>,FPCR/FPSR/FPIAR 16732: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16733: // 格納順序はFPCRが下位アドレス(連結したとき上位),FPIARが上位アドレス(連結したとき下位) 16734: 16735: switch (m) { 16736: 16737: case 0b000: //$8000: FMOVE.L <ea>,<> 16738: // レジスタを1個も指定しないとFPIARが指定されたものとみなされる 16739: 16740: case 0b001: //$8400: FMOVE.L <ea>,FPIAR 16741: XEiJ.fpuBox.epbFpiar = ea < XEiJ.EA_MM ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea)); //Ar可 16742: break; 16743: 16744: case 0b010: //$8800: FMOVE.L <ea>,FPSR 16745: XEiJ.fpuBox.epbFpsr = (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))) & EFPBox.EPB_FPSR_ALL; //Ar不可 16746: //fmove.lでfpsrのEXCに書き込んだだけではAEXCは更新されない 16747: //fmove.lでfpsrに0x0000ff00を書き込んですぐに読み出しても0x0000ff00のまま 16748: break; 16749: 16750: case 0b011: //$8C00: FMOVEM.L <ea>,FPSR/FPIAR 16751: { 16752: a = efaAnyQuad (ea); 16753: XEiJ.fpuBox.epbFpsr = (XEiJ.busRls (a)) & EFPBox.EPB_FPSR_ALL; 16754: XEiJ.fpuBox.epbFpiar = XEiJ.busRls (a + 4); 16755: } 16756: break; 16757: 16758: case 0b100: //$9000: FMOVE.L <ea>,FPCR 16759: XEiJ.fpuBox.epbFpcr = (ea < XEiJ.EA_AR ? XEiJ.regRn[ea] : XEiJ.busRls (a = efaAnyLong (ea))) & EFPBox.EPB_FPCR_ALL; //Ar不可 16760: break; 16761: 16762: case 0b101: //$9400: FMOVEM.L <ea>,FPCR/FPIAR 16763: { 16764: a = efaAnyQuad (ea); 16765: XEiJ.fpuBox.epbFpcr = (XEiJ.busRls (a)) & EFPBox.EPB_FPCR_ALL; 16766: XEiJ.fpuBox.epbFpiar = XEiJ.busRls (a + 4); 16767: } 16768: break; 16769: 16770: case 0b110: //$9800: FMOVEM.L <ea>,FPCR/FPSR 16771: { 16772: a = efaAnyQuad (ea); 16773: XEiJ.fpuBox.epbFpcr = (XEiJ.busRls (a)) & EFPBox.EPB_FPCR_ALL; 16774: XEiJ.fpuBox.epbFpsr = (XEiJ.busRls (a + 4)) & EFPBox.EPB_FPSR_ALL; 16775: } 16776: break; 16777: 16778: case 0b111: //$9C00: FMOVEM.L <ea>,FPCR/FPSR/FPIAR 16779: default: 16780: { 16781: a = efaAnyExtd (ea); 16782: XEiJ.fpuBox.epbFpcr = (XEiJ.busRls (a)) & EFPBox.EPB_FPCR_ALL; 16783: XEiJ.fpuBox.epbFpsr = (XEiJ.busRls (a + 4)) & EFPBox.EPB_FPSR_ALL; 16784: XEiJ.fpuBox.epbFpiar = XEiJ.busRls (a + 8); 16785: } 16786: break; 16787: } 16788: break fgen; 16789: 16790: 16791: case 0b101: //$Axxx-$Bxxx: FMOVEM.L FPCR/FPSR/FPIAR,<ea> 16792: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16793: 16794: switch (m) { 16795: 16796: case 0b000: //$A000: FMOVE.L <>,<ea> 16797: // レジスタを1個も指定しないとFPIARが指定されたものとみなされる 16798: 16799: case 0b001: //$A400: FMOVE.L FPIAR,<ea> 16800: if (ea < XEiJ.EA_MM) { //Ar可 16801: XEiJ.regRn[ea] = XEiJ.fpuBox.epbFpiar; 16802: } else { 16803: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuBox.epbFpiar); 16804: } 16805: break; 16806: 16807: case 0b010: //$A800: FMOVE.L FPSR,<ea> 16808: if (ea < XEiJ.EA_AR) { //Ar不可 16809: XEiJ.regRn[ea] = XEiJ.fpuBox.epbFpsr; 16810: } else { 16811: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuBox.epbFpsr); 16812: } 16813: break; 16814: 16815: case 0b011: //$AC00: FMOVEM.L FPSR/FPIAR,<ea> 16816: { 16817: a = efaMltQuad (ea); 16818: XEiJ.busWl (a, XEiJ.fpuBox.epbFpsr); 16819: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpiar); 16820: } 16821: break; 16822: 16823: case 0b100: //$B000: FMOVE.L FPCR,<ea> 16824: if (ea < XEiJ.EA_AR) { //Ar不可 16825: XEiJ.regRn[ea] = XEiJ.fpuBox.epbFpcr; 16826: } else { 16827: XEiJ.busWl (a = efaMltLong (ea), XEiJ.fpuBox.epbFpcr); 16828: } 16829: break; 16830: 16831: case 0b101: //$B400: FMOVEM.L FPCR/FPIAR,<ea> 16832: { 16833: a = efaMltQuad (ea); 16834: XEiJ.busWl (a, XEiJ.fpuBox.epbFpcr); 16835: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpiar); 16836: } 16837: break; 16838: 16839: case 0b110: //$B800: FMOVEM.L FPCR/FPSR,<ea> 16840: { 16841: a = efaMltQuad (ea); 16842: XEiJ.busWl (a, XEiJ.fpuBox.epbFpcr); 16843: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpsr); 16844: } 16845: break; 16846: 16847: case 0b111: //$BC00: FMOVEM.L FPCR/FPSR/FPIAR,<ea> 16848: default: 16849: { 16850: a = efaMltExtd (ea); 16851: XEiJ.busWl (a, XEiJ.fpuBox.epbFpcr); 16852: XEiJ.busWl (a + 4, XEiJ.fpuBox.epbFpsr); 16853: XEiJ.busWl (a + 8, XEiJ.fpuBox.epbFpiar); 16854: } 16855: break; 16856: } 16857: break fgen; 16858: 16859: 16860: case 0b110: //$Cxxx-$Dxxx: FMOVEM.X <ea>,<list> 16861: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16862: { 16863: byte[] b = new byte[12]; 16864: int list = ((m & 2) == 0 ? w : XEiJ.regRn[w >> 4 & 7]) << 24; 16865: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 16866: int arr = XEiJ.regOC & 7 | 8; 16867: a = XEiJ.regRn[arr]; 16868: for (n = 0; list != 0; n++, list <<= 1) { 16869: if (list < 0) { 16870: XEiJ.busRbb (a, b, 0, 12); 16871: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16872: XEiJ.fpuFPn[n].sety012 (b, 0); 16873: } else { //拡張精度 16874: XEiJ.fpuFPn[n].setx012 (b, 0); 16875: } 16876: a += 12; 16877: } 16878: } 16879: XEiJ.regRn[arr] = a; 16880: } else { //(Ar)+以外 16881: a = efaCntLong (ea); 16882: for (n = 0; list != 0; n++, list <<= 1) { 16883: if (list < 0) { 16884: XEiJ.busRbb (a, b, 0, 12); 16885: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16886: XEiJ.fpuFPn[n].sety012 (b, 0); 16887: } else { //拡張精度 16888: XEiJ.fpuFPn[n].setx012 (b, 0); 16889: } 16890: a += 12; 16891: } 16892: } 16893: } 16894: } 16895: break fgen; 16896: 16897: 16898: case 0b111: //$Exxx-$Fxxx: FMOVEM.X <list>,<ea> 16899: // FMOVEM命令は例外を発生させずFPCR/FPSR/FPIARも(デスティネーションに書かれたもの以外)変化しない 16900: { 16901: byte[] b = new byte[12]; 16902: int list = ((m & 2) == 0 ? w : XEiJ.regRn[w >> 4 & 7]) << 24; 16903: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 16904: int arr = XEiJ.regOC & 7 | 8; 16905: a = XEiJ.regRn[arr]; 16906: for (n = 7; list != 0; n--, list <<= 1) { 16907: if (list < 0) { 16908: a -= 12; 16909: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16910: XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16911: } else { //拡張精度 16912: XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16913: } 16914: XEiJ.busWbb (a, b, 0, 12); 16915: } 16916: } 16917: XEiJ.regRn[arr] = a; 16918: } else { //-(Ar)以外 16919: a = efaCltLong (ea); 16920: for (n = 0; list != 0; n++, list <<= 1) { 16921: if (list < 0) { 16922: if (XEiJ.fpuBox.epbIsTriple ()) { //三倍精度 16923: XEiJ.fpuFPn[n].gety012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16924: } else { //拡張精度 16925: XEiJ.fpuFPn[n].getx012 (b, 0, XEiJ.fpuBox.epbRoundingMode); 16926: } 16927: XEiJ.busWbb (a, b, 0, 12); 16928: a += 12; 16929: } 16930: } 16931: } 16932: } 16933: break fgen; 16934: 16935: 16936: case 0b001: //$2xxx-$3xxx: 未定義 16937: default: //未定義 16938: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 16939: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 16940: irpFline (); 16941: break fgen; 16942: } 16943: } //fgen 16944: } //irpFgen 16945: 16946: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 16947: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 16948: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 16949: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 16950: //FSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000000 16951: //FSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000001 16952: //FSOGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000010 16953: //FSOGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000011 16954: //FSOLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000100 16955: //FSOLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000101 16956: //FSOGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000110 16957: //FSOR.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000000111 16958: //FSUN.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001000 16959: //FSUEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001001 16960: //FSUGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001010 16961: //FSUGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001011 16962: //FSULT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001100 16963: //FSULE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001101 16964: //FSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001110 16965: //FST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000001111 16966: //FSSF.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010000 16967: //FSSEQ.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010001 16968: //FSGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010010 16969: //FSGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010011 16970: //FSLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010100 16971: //FSLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010101 16972: //FSGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010110 16973: //FSGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000010111 16974: //FSNGLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011000 16975: //FSNGL.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011001 16976: //FSNLE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011010 16977: //FSNLT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011011 16978: //FSNGE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011100 16979: //FSNGT.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011101 16980: //FSSNE.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011110 16981: //FSST.B <ea> |-|--CC4S|-|-----|-----|D M+-WXZ |1111_001_001_mmm_rrr-0000000000011111 16982: //FDBF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} 16983: //FDBRA Dr,<label> |A|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000000-{offset} [FDBF Dr,<label>] 16984: //FDBEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000001-{offset} 16985: //FDBOGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000010-{offset} 16986: //FDBOGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000011-{offset} 16987: //FDBOLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000100-{offset} 16988: //FDBOLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000101-{offset} 16989: //FDBOGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000110-{offset} 16990: //FDBOR Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000000111-{offset} 16991: //FDBUN Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001000-{offset} 16992: //FDBUEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001001-{offset} 16993: //FDBUGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001010-{offset} 16994: //FDBUGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001011-{offset} 16995: //FDBULT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001100-{offset} 16996: //FDBULE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001101-{offset} 16997: //FDBNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001110-{offset} 16998: //FDBT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000001111-{offset} 16999: //FDBSF Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010000-{offset} 17000: //FDBSEQ Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010001-{offset} 17001: //FDBGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010010-{offset} 17002: //FDBGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010011-{offset} 17003: //FDBLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010100-{offset} 17004: //FDBLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010101-{offset} 17005: //FDBGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010110-{offset} 17006: //FDBGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000010111-{offset} 17007: //FDBNGLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011000-{offset} 17008: //FDBNGL Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011001-{offset} 17009: //FDBNLE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011010-{offset} 17010: //FDBNLT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011011-{offset} 17011: //FDBNGE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011100-{offset} 17012: //FDBNGT Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011101-{offset} 17013: //FDBSNE Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011110-{offset} 17014: //FDBST Dr,<label> |-|--CC4S|-|-----|-----| |1111_001_001_001_rrr-0000000000011111-{offset} 17015: //FTRAPF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000000-{data} 17016: //FTRAPEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000001-{data} 17017: //FTRAPOGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000010-{data} 17018: //FTRAPOGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000011-{data} 17019: //FTRAPOLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000100-{data} 17020: //FTRAPOLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000101-{data} 17021: //FTRAPOGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000110-{data} 17022: //FTRAPOR.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000000111-{data} 17023: //FTRAPUN.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001000-{data} 17024: //FTRAPUEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001001-{data} 17025: //FTRAPUGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001010-{data} 17026: //FTRAPUGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001011-{data} 17027: //FTRAPULT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001100-{data} 17028: //FTRAPULE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001101-{data} 17029: //FTRAPNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001110-{data} 17030: //FTRAPT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000001111-{data} 17031: //FTRAPSF.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010000-{data} 17032: //FTRAPSEQ.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010001-{data} 17033: //FTRAPGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010010-{data} 17034: //FTRAPGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010011-{data} 17035: //FTRAPLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010100-{data} 17036: //FTRAPLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010101-{data} 17037: //FTRAPGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010110-{data} 17038: //FTRAPGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000010111-{data} 17039: //FTRAPNGLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011000-{data} 17040: //FTRAPNGL.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011001-{data} 17041: //FTRAPNLE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011010-{data} 17042: //FTRAPNLT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011011-{data} 17043: //FTRAPNGE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011100-{data} 17044: //FTRAPNGT.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011101-{data} 17045: //FTRAPSNE.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011110-{data} 17046: //FTRAPST.W #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_010-0000000000011111-{data} 17047: //FTRAPF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000000-{data} 17048: //FTRAPEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000001-{data} 17049: //FTRAPOGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000010-{data} 17050: //FTRAPOGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000011-{data} 17051: //FTRAPOLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000100-{data} 17052: //FTRAPOLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000101-{data} 17053: //FTRAPOGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000110-{data} 17054: //FTRAPOR.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000000111-{data} 17055: //FTRAPUN.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001000-{data} 17056: //FTRAPUEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001001-{data} 17057: //FTRAPUGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001010-{data} 17058: //FTRAPUGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001011-{data} 17059: //FTRAPULT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001100-{data} 17060: //FTRAPULE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001101-{data} 17061: //FTRAPNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001110-{data} 17062: //FTRAPT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000001111-{data} 17063: //FTRAPSF.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010000-{data} 17064: //FTRAPSEQ.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010001-{data} 17065: //FTRAPGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010010-{data} 17066: //FTRAPGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010011-{data} 17067: //FTRAPLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010100-{data} 17068: //FTRAPLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010101-{data} 17069: //FTRAPGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010110-{data} 17070: //FTRAPGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000010111-{data} 17071: //FTRAPNGLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011000-{data} 17072: //FTRAPNGL.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011001-{data} 17073: //FTRAPNLE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011010-{data} 17074: //FTRAPNLT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011011-{data} 17075: //FTRAPNGE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011100-{data} 17076: //FTRAPNGT.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011101-{data} 17077: //FTRAPSNE.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011110-{data} 17078: //FTRAPST.L #<data> |-|--CC4S|-|-----|-----| |1111_001_001_111_011-0000000000011111-{data} 17079: //FTRAPF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000000 17080: //FTRAPEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000001 17081: //FTRAPOGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000010 17082: //FTRAPOGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000011 17083: //FTRAPOLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000100 17084: //FTRAPOLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000101 17085: //FTRAPOGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000110 17086: //FTRAPOR |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000000111 17087: //FTRAPUN |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001000 17088: //FTRAPUEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001001 17089: //FTRAPUGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001010 17090: //FTRAPUGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001011 17091: //FTRAPULT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001100 17092: //FTRAPULE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001101 17093: //FTRAPNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001110 17094: //FTRAPT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000001111 17095: //FTRAPSF |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010000 17096: //FTRAPSEQ |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010001 17097: //FTRAPGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010010 17098: //FTRAPGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010011 17099: //FTRAPLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010100 17100: //FTRAPLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010101 17101: //FTRAPGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010110 17102: //FTRAPGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000010111 17103: //FTRAPNGLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011000 17104: //FTRAPNGL |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011001 17105: //FTRAPNLE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011010 17106: //FTRAPNLT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011011 17107: //FTRAPNGE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011100 17108: //FTRAPNGT |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011101 17109: //FTRAPSNE |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011110 17110: //FTRAPST |-|--CC4S|-|-----|-----| |1111_001_001_111_100-0000000000011111 17111: public static void irpFscc () throws M68kException { 17112: fscc: { 17113: if (XEiJ.currentFPU == 0) { 17114: irpFline (); 17115: break fscc; 17116: } 17117: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17118: int w; 17119: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 17120: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 17121: } else { 17122: w = XEiJ.regPC; 17123: XEiJ.regPC = w + 2; 17124: w = XEiJ.busRwze (w); //pcwz。拡張ワード 17125: } 17126: if ((w & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17127: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17128: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17129: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17130: irpException (M68kException.M6E_FP_BRANCH_SET_UNORDERED, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17131: break fscc; 17132: } 17133: } 17134: int ea = XEiJ.regOC & 63; 17135: if (ea < XEiJ.EA_AR) { //FScc.B Dr 17136: if (XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //セット 17137: XEiJ.mpuCycleCount += 10; 17138: XEiJ.regRn[ea] |= 0xff; 17139: } else { //クリア 17140: XEiJ.mpuCycleCount += 8; 17141: XEiJ.regRn[ea] &= ~0xff; 17142: } 17143: } else if (ea < XEiJ.EA_MM) { //FDBcc Dr,<label> 17144: if (XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //条件が成立しているので通過 17145: XEiJ.mpuCycleCount += 16; 17146: XEiJ.regPC += 2; //オフセットを読み飛ばす 17147: } else { 17148: int rrr = XEiJ.regOC & 7; 17149: int t = XEiJ.regRn[rrr]; 17150: if ((short) t == 0) { //Drの下位16bitが0なので通過 17151: XEiJ.mpuCycleCount += 18; 17152: XEiJ.regRn[rrr] = t + 65535; 17153: XEiJ.regPC += 2; //オフセットを読み飛ばす 17154: } else { //Drの下位16bitが0でないのでジャンプ 17155: XEiJ.mpuCycleCount += 14; 17156: XEiJ.regRn[rrr] = t - 1; //下位16bitが0でないので上位16bitは変化しない 17157: irpSetPC (XEiJ.regPC + XEiJ.busRws (XEiJ.regPC)); //pc==pc0+2 17158: } 17159: } 17160: } else if (ea < XEiJ.EA_PW) { //FScc.B <mem> 17161: XEiJ.mpuCycleCount += 12; 17162: XEiJ.busWb (efaMltByte (ea), XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15] ? 0xff : 0x00); 17163: } else if (ea <= XEiJ.EA_IM) { //FTRAPcc.W/FTRAPcc.L/FTRAPcc 17164: int t = (ea & 3) + (ea & 1); //111_010→2,111_011→4,111_100→0 17165: XEiJ.regPC += t; 17166: if (!XEiJ.FPU_CCMAP_882[(w & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //通過 17167: XEiJ.mpuCycleCount += 8 + (t << 1); 17168: } else { 17169: XEiJ.mpuCycleCount += 4 + (t << 1); 17170: M68kException.m6eAddress = XEiJ.regPC0; //アドレスは命令の先頭 17171: M68kException.m6eNumber = M68kException.M6E_TRAPV_INSTRUCTION; 17172: throw M68kException.m6eSignal; 17173: } 17174: } else { 17175: XEiJ.regPC = XEiJ.regPC0 + 2; //拡張ワードを読まなかったことにする 17176: irpFline (); 17177: break fscc; 17178: } 17179: } //fscc 17180: } //irpFscc 17181: 17182: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17183: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17184: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17185: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17186: //FNOP |A|--CC46|-|-----|-----| |1111_001_010_000_000-0000000000000000 [FBF.W (*)+2] 17187: //FBF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_000-{offset} 17188: //FBEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_001-{offset} 17189: //FBOGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_010-{offset} 17190: //FBOGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_011-{offset} 17191: //FBOLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_100-{offset} 17192: //FBOLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_101-{offset} 17193: //FBOGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_110-{offset} 17194: //FBOR.W <label> |-|--CC46|-|-----|-----| |1111_001_010_000_111-{offset} 17195: //FBUN.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_000-{offset} 17196: //FBUEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_001-{offset} 17197: //FBUGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_010-{offset} 17198: //FBUGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_011-{offset} 17199: //FBULT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_100-{offset} 17200: //FBULE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_101-{offset} 17201: //FBNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_110-{offset} 17202: //FBT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} 17203: //FBRA.W <label> |A|--CC46|-|-----|-----| |1111_001_010_001_111-{offset} [FBT.W <label>] 17204: //FBSF.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_000-{offset} 17205: //FBSEQ.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_001-{offset} 17206: //FBGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_010-{offset} 17207: //FBGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_011-{offset} 17208: //FBLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_100-{offset} 17209: //FBLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_101-{offset} 17210: //FBGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_110-{offset} 17211: //FBGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_010_111-{offset} 17212: //FBNGLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_000-{offset} 17213: //FBNGL.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_001-{offset} 17214: //FBNLE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_010-{offset} 17215: //FBNLT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_011-{offset} 17216: //FBNGE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_100-{offset} 17217: //FBNGT.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_101-{offset} 17218: //FBSNE.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_110-{offset} 17219: //FBST.W <label> |-|--CC46|-|-----|-----| |1111_001_010_011_111-{offset} 17220: public static void irpFbccWord () throws M68kException { 17221: fbcc: { 17222: if (XEiJ.currentFPU == 0) { 17223: irpFline (); 17224: break fbcc; 17225: } 17226: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17227: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17228: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17229: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17230: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17231: irpException (M68kException.M6E_FP_BRANCH_SET_UNORDERED, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17232: break fbcc; 17233: } 17234: } 17235: if (XEiJ.FPU_CCMAP_882[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //ジャンプ 17236: XEiJ.mpuCycleCount += 10; 17237: int s; 17238: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 17239: s = XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 17240: } else { 17241: s = XEiJ.regPC; 17242: XEiJ.regPC = s + 2; 17243: s = XEiJ.busRwse (s); //pcws 17244: } 17245: irpSetPC (XEiJ.regPC0 + 2 + s); 17246: } else { //通過 17247: XEiJ.mpuCycleCount += 12; 17248: XEiJ.regPC += 2; //オフセットを読み飛ばす。リードを省略 17249: } 17250: } //fbcc 17251: } //irpFbccWord 17252: 17253: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17254: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17255: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17256: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17257: //FBF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_000-{offset} 17258: //FBEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_001-{offset} 17259: //FBOGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_010-{offset} 17260: //FBOGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_011-{offset} 17261: //FBOLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_100-{offset} 17262: //FBOLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_101-{offset} 17263: //FBOGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_110-{offset} 17264: //FBOR.L <label> |-|--CC46|-|-----|-----| |1111_001_011_000_111-{offset} 17265: //FBUN.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_000-{offset} 17266: //FBUEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_001-{offset} 17267: //FBUGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_010-{offset} 17268: //FBUGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_011-{offset} 17269: //FBULT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_100-{offset} 17270: //FBULE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_101-{offset} 17271: //FBNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_110-{offset} 17272: //FBT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} 17273: //FBRA.L <label> |A|--CC46|-|-----|-----| |1111_001_011_001_111-{offset} [FBT.L <label>] 17274: //FBSF.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_000-{offset} 17275: //FBSEQ.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_001-{offset} 17276: //FBGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_010-{offset} 17277: //FBGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_011-{offset} 17278: //FBLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_100-{offset} 17279: //FBLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_101-{offset} 17280: //FBGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_110-{offset} 17281: //FBGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_010_111-{offset} 17282: //FBNGLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_000-{offset} 17283: //FBNGL.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_001-{offset} 17284: //FBNLE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_010-{offset} 17285: //FBNLT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_011-{offset} 17286: //FBNGE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_100-{offset} 17287: //FBNGT.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_101-{offset} 17288: //FBSNE.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_110-{offset} 17289: //FBST.L <label> |-|--CC46|-|-----|-----| |1111_001_011_011_111-{offset} 17290: public static void irpFbccLong () throws M68kException { 17291: fbcc: { 17292: if (XEiJ.currentFPU == 0) { 17293: irpFline (); 17294: break fbcc; 17295: } 17296: XEiJ.fpuBox.epbFpiar = XEiJ.regPC0; //FPIARはFMOVEM/FMOVE FPcr/FSAVE/FRESTORE以外の命令で例外が発生しなくても更新される 17297: if ((XEiJ.regOC & 0b010000) != 0 && (XEiJ.fpuBox.epbFpsr & XEiJ.FPU_FPSR_NAN) != 0) { //IEEEノンアウェアテストでNANがセットされているとき 17298: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_BSUN; //BSUNをセット 17299: XEiJ.fpuBox.epbFpsr |= XEiJ.FPU_FPSR_EXC_TO_AEXC[XEiJ.fpuBox.epbFpsr >> 8 & 255]; 17300: if ((XEiJ.fpuBox.epbFpcr & XEiJ.FPU_FPCR_BSUN) != 0) { //BSUN例外許可 17301: irpException (M68kException.M6E_FP_BRANCH_SET_UNORDERED, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17302: break fbcc; 17303: } 17304: } 17305: if (XEiJ.FPU_CCMAP_882[(XEiJ.regOC & 63) << 4 | XEiJ.fpuBox.epbFpsr >> 24 & 15]) { //ジャンプ 17306: XEiJ.mpuCycleCount += 14; 17307: int s; 17308: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 17309: s = XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 17310: } else { 17311: s = XEiJ.regPC; 17312: XEiJ.regPC = s + 4; 17313: s = XEiJ.busRlse (s); //pcls 17314: } 17315: irpSetPC (XEiJ.regPC0 + 2 + s); 17316: } else { //通過 17317: XEiJ.mpuCycleCount += 12; 17318: XEiJ.regPC += 4; //オフセットを読み飛ばす。リードを省略 17319: } 17320: } //fbcc 17321: } //irpFbccLong 17322: 17323: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17324: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17325: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17326: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17327: //FSAVE <ea> |-|--CC46|P|-----|-----| M -WXZ |1111_001_100_mmm_rrr 17328: public static void irpFsave () throws M68kException { 17329: if (XEiJ.currentFPU == 0) { 17330: irpFline (); 17331: return; 17332: } 17333: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17334: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17335: throw M68kException.m6eSignal; 17336: } 17337: //以下はスーパーバイザモード 17338: int ea = XEiJ.regOC & 63; 17339: int a; 17340: if (ea >> 3 == XEiJ.MMM_MN) { //-(Ar) 17341: int arr = XEiJ.regOC & 7 | 8; 17342: a = XEiJ.regRn[arr] -= 4; 17343: } else { //-(Ar)以外 17344: a = efaCltWord (ea); 17345: } 17346: XEiJ.busWl (a, 0); //NULL 17347: } //irpFsave 17348: 17349: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17350: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17351: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17352: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17353: //FRESTORE <ea> |-|--CC46|P|-----|-----| M+ WXZP |1111_001_101_mmm_rrr 17354: public static void irpFrestore () throws M68kException { 17355: if (XEiJ.currentFPU == 0) { 17356: irpFline (); 17357: return; 17358: } 17359: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17360: M68kException.m6eNumber = M68kException.M6E_PRIVILEGE_VIOLATION; 17361: throw M68kException.m6eSignal; 17362: } 17363: //以下はスーパーバイザモード 17364: int ea = XEiJ.regOC & 63; 17365: int a; 17366: if (ea >> 3 == XEiJ.MMM_MP) { //(Ar)+ 17367: int arr = XEiJ.regOC & 7 | 8; 17368: a = XEiJ.regRn[arr]; 17369: XEiJ.regRn[arr] = a + 4; 17370: } else { //(Ar)+以外 17371: a = efaCntWord (ea); 17372: } 17373: XEiJ.busRls (a); //NULL 17374: //FPSRのAEXCをクリアする 17375: XEiJ.fpuBox.epbFpsr = 0; 17376: //FPIARをクリアする 17377: XEiJ.fpuBox.epbFpiar = 0; 17378: } //irpFrestore 17379: 17380: //irpFPPreInstruction () 17381: // 浮動小数点命令実行前例外 floating-point pre-instruction exception 17382: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17383: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17384: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17385: public static boolean irpFPPreInstruction () throws M68kException { 17386: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17387: if (mask == 0) { 17388: return false; 17389: } 17390: irpException (FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)], 17391: XEiJ.regPC0, //pcは命令の先頭 17392: XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 17393: 0x0000, 17394: 0); 17395: return true; 17396: } //irpFPPreInstruction() 17397: 17398: //irpFPPostInstruction (a) 17399: // 浮動小数点命令実行後例外 floating-point post-instruction exception 17400: // 優先順位はBSUN>SNAN>OPERR>OVFL>UNFL>DZ>INEX2/INEX1 17401: // 複数の例外が同時に発生したときは最上位の例外ハンドラだけが呼び出される 17402: // 浮動小数点例外ハンドラは自分よりも下位の浮動小数点例外が発生していないか確認しなければならない 17403: public static boolean irpFPPostInstruction (int a) throws M68kException { 17404: int mask = XEiJ.fpuBox.epbFpcr & XEiJ.fpuBox.epbFpsr & 0x0000ff00; 17405: if (mask == 0) { 17406: return false; 17407: } 17408: irpException (FP_OFFSET_TO_NUMBER[Integer.numberOfLeadingZeros (mask)], 17409: XEiJ.regPC, //pcは次の命令 17410: XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 17411: 0x3000, 17412: a); 17413: return true; 17414: } //irpFPPostInstruction(int) 17415: 17416: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17417: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17418: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17419: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17420: //FPACK <data> |A|012346|-|UUUUU|*****| |1111_111_0dd_ddd_ddd [FLINE #<data>] 17421: public static void irpFpack () throws M68kException { 17422: if (!MainMemory.mmrFEfuncActivated) { 17423: irpFline (); 17424: return; 17425: } 17426: StringBuilder sb; 17427: int a0; 17428: if (FEFunction.FPK_DEBUG_TRACE) { 17429: sb = new StringBuilder (); 17430: String name = Disassembler.DIS_FPACK_NAME[XEiJ.regOC & 255]; 17431: if (name.length () == 0) { 17432: XEiJ.fmtHex4 (sb.append ('$'), XEiJ.regOC); 17433: } else { 17434: sb.append (name); 17435: } 17436: sb.append ('\n'); 17437: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 17438: a0 = XEiJ.regRn[8]; 17439: MainMemory.mmrRstr (sb.append (" (A0)=\""), a0, MainMemory.mmrStrlen (a0, 20)).append ("\"\n"); 17440: } 17441: XEiJ.mpuCycleCount += FEFunction.FPK_CLOCK; //一律にFEFunction.FPK_CLOCKサイクルかかることにする 17442: switch (XEiJ.regOC & 255) { 17443: case 0x00: FEFunction.fpkLMUL (); break; 17444: case 0x01: FEFunction.fpkLDIV (); break; 17445: case 0x02: FEFunction.fpkLMOD (); break; 17446: //case 0x03: break; 17447: case 0x04: FEFunction.fpkUMUL (); break; 17448: case 0x05: FEFunction.fpkUDIV (); break; 17449: case 0x06: FEFunction.fpkUMOD (); break; 17450: //case 0x07: break; 17451: case 0x08: FEFunction.fpkIMUL (); break; 17452: case 0x09: FEFunction.fpkIDIV (); break; 17453: //case 0x0a: break; 17454: //case 0x0b: break; 17455: case 0x0c: FEFunction.fpkRANDOMIZE (); break; 17456: case 0x0d: FEFunction.fpkSRAND (); break; 17457: case 0x0e: FEFunction.fpkRAND (); break; 17458: //case 0x0f: break; 17459: case 0x10: FEFunction.fpkSTOL (); break; 17460: case 0x11: FEFunction.fpkLTOS (); break; 17461: case 0x12: FEFunction.fpkSTOH (); break; 17462: case 0x13: FEFunction.fpkHTOS (); break; 17463: case 0x14: FEFunction.fpkSTOO (); break; 17464: case 0x15: FEFunction.fpkOTOS (); break; 17465: case 0x16: FEFunction.fpkSTOB (); break; 17466: case 0x17: FEFunction.fpkBTOS (); break; 17467: case 0x18: FEFunction.fpkIUSING (); break; 17468: //case 0x19: break; 17469: case 0x1a: FEFunction.fpkLTOD (); break; 17470: case 0x1b: FEFunction.fpkDTOL (); break; 17471: case 0x1c: FEFunction.fpkLTOF (); break; 17472: case 0x1d: FEFunction.fpkFTOL (); break; 17473: case 0x1e: FEFunction.fpkFTOD (); break; 17474: case 0x1f: FEFunction.fpkDTOF (); break; 17475: case 0x20: FEFunction.fpkVAL (); break; 17476: case 0x21: FEFunction.fpkUSING (); break; 17477: case 0x22: FEFunction.fpkSTOD (); break; 17478: case 0x23: FEFunction.fpkDTOS (); break; 17479: case 0x24: FEFunction.fpkECVT (); break; 17480: case 0x25: FEFunction.fpkFCVT (); break; 17481: case 0x26: FEFunction.fpkGCVT (); break; 17482: //case 0x27: break; 17483: case 0x28: FEFunction.fpkDTST (); break; 17484: case 0x29: FEFunction.fpkDCMP (); break; 17485: case 0x2a: FEFunction.fpkDNEG (); break; 17486: case 0x2b: FEFunction.fpkDADD (); break; 17487: case 0x2c: FEFunction.fpkDSUB (); break; 17488: case 0x2d: FEFunction.fpkDMUL (); break; 17489: case 0x2e: FEFunction.fpkDDIV (); break; 17490: case 0x2f: FEFunction.fpkDMOD (); break; 17491: case 0x30: FEFunction.fpkDABS (); break; 17492: case 0x31: FEFunction.fpkDCEIL (); break; 17493: case 0x32: FEFunction.fpkDFIX (); break; 17494: case 0x33: FEFunction.fpkDFLOOR (); break; 17495: case 0x34: FEFunction.fpkDFRAC (); break; 17496: case 0x35: FEFunction.fpkDSGN (); break; 17497: case 0x36: FEFunction.fpkSIN (); break; 17498: case 0x37: FEFunction.fpkCOS (); break; 17499: case 0x38: FEFunction.fpkTAN (); break; 17500: case 0x39: FEFunction.fpkATAN (); break; 17501: case 0x3a: FEFunction.fpkLOG (); break; 17502: case 0x3b: FEFunction.fpkEXP (); break; 17503: case 0x3c: FEFunction.fpkSQR (); break; 17504: case 0x3d: FEFunction.fpkPI (); break; 17505: case 0x3e: FEFunction.fpkNPI (); break; 17506: case 0x3f: FEFunction.fpkPOWER (); break; 17507: case 0x40: FEFunction.fpkRND (); break; 17508: case 0x41: FEFunction.fpkSINH (); break; 17509: case 0x42: FEFunction.fpkCOSH (); break; 17510: case 0x43: FEFunction.fpkTANH (); break; 17511: case 0x44: FEFunction.fpkATANH (); break; 17512: case 0x45: FEFunction.fpkASIN (); break; 17513: case 0x46: FEFunction.fpkACOS (); break; 17514: case 0x47: FEFunction.fpkLOG10 (); break; 17515: case 0x48: FEFunction.fpkLOG2 (); break; 17516: case 0x49: FEFunction.fpkDFREXP (); break; 17517: case 0x4a: FEFunction.fpkDLDEXP (); break; 17518: case 0x4b: FEFunction.fpkDADDONE (); break; 17519: case 0x4c: FEFunction.fpkDSUBONE (); break; 17520: case 0x4d: FEFunction.fpkDDIVTWO (); break; 17521: case 0x4e: FEFunction.fpkDIEECNV (); break; 17522: case 0x4f: FEFunction.fpkIEEDCNV (); break; 17523: case 0x50: FEFunction.fpkFVAL (); break; 17524: case 0x51: FEFunction.fpkFUSING (); break; 17525: case 0x52: FEFunction.fpkSTOF (); break; 17526: case 0x53: FEFunction.fpkFTOS (); break; 17527: case 0x54: FEFunction.fpkFECVT (); break; 17528: case 0x55: FEFunction.fpkFFCVT (); break; 17529: case 0x56: FEFunction.fpkFGCVT (); break; 17530: //case 0x57: break; 17531: case 0x58: FEFunction.fpkFTST (); break; 17532: case 0x59: FEFunction.fpkFCMP (); break; 17533: case 0x5a: FEFunction.fpkFNEG (); break; 17534: case 0x5b: FEFunction.fpkFADD (); break; 17535: case 0x5c: FEFunction.fpkFSUB (); break; 17536: case 0x5d: FEFunction.fpkFMUL (); break; 17537: case 0x5e: FEFunction.fpkFDIV (); break; 17538: case 0x5f: FEFunction.fpkFMOD (); break; 17539: case 0x60: FEFunction.fpkFABS (); break; 17540: case 0x61: FEFunction.fpkFCEIL (); break; 17541: case 0x62: FEFunction.fpkFFIX (); break; 17542: case 0x63: FEFunction.fpkFFLOOR (); break; 17543: case 0x64: FEFunction.fpkFFRAC (); break; 17544: case 0x65: FEFunction.fpkFSGN (); break; 17545: case 0x66: FEFunction.fpkFSIN (); break; 17546: case 0x67: FEFunction.fpkFCOS (); break; 17547: case 0x68: FEFunction.fpkFTAN (); break; 17548: case 0x69: FEFunction.fpkFATAN (); break; 17549: case 0x6a: FEFunction.fpkFLOG (); break; 17550: case 0x6b: FEFunction.fpkFEXP (); break; 17551: case 0x6c: FEFunction.fpkFSQR (); break; 17552: case 0x6d: FEFunction.fpkFPI (); break; 17553: case 0x6e: FEFunction.fpkFNPI (); break; 17554: case 0x6f: FEFunction.fpkFPOWER (); break; 17555: case 0x70: FEFunction.fpkFRND (); break; 17556: case 0x71: FEFunction.fpkFSINH (); break; 17557: case 0x72: FEFunction.fpkFCOSH (); break; 17558: case 0x73: FEFunction.fpkFTANH (); break; 17559: case 0x74: FEFunction.fpkFATANH (); break; 17560: case 0x75: FEFunction.fpkFASIN (); break; 17561: case 0x76: FEFunction.fpkFACOS (); break; 17562: case 0x77: FEFunction.fpkFLOG10 (); break; 17563: case 0x78: FEFunction.fpkFLOG2 (); break; 17564: case 0x79: FEFunction.fpkFFREXP (); break; 17565: case 0x7a: FEFunction.fpkFLDEXP (); break; 17566: case 0x7b: FEFunction.fpkFADDONE (); break; 17567: case 0x7c: FEFunction.fpkFSUBONE (); break; 17568: case 0x7d: FEFunction.fpkFDIVTWO (); break; 17569: case 0x7e: FEFunction.fpkFIEECNV (); break; 17570: case 0x7f: FEFunction.fpkIEEFCNV (); break; 17571: //case 0x80: break; 17572: //case 0x81: break; 17573: //case 0x82: break; 17574: //case 0x83: break; 17575: //case 0x84: break; 17576: //case 0x85: break; 17577: //case 0x86: break; 17578: //case 0x87: break; 17579: //case 0x88: break; 17580: //case 0x89: break; 17581: //case 0x8a: break; 17582: //case 0x8b: break; 17583: //case 0x8c: break; 17584: //case 0x8d: break; 17585: //case 0x8e: break; 17586: //case 0x8f: break; 17587: //case 0x90: break; 17588: //case 0x91: break; 17589: //case 0x92: break; 17590: //case 0x93: break; 17591: //case 0x94: break; 17592: //case 0x95: break; 17593: //case 0x96: break; 17594: //case 0x97: break; 17595: //case 0x98: break; 17596: //case 0x99: break; 17597: //case 0x9a: break; 17598: //case 0x9b: break; 17599: //case 0x9c: break; 17600: //case 0x9d: break; 17601: //case 0x9e: break; 17602: //case 0x9f: break; 17603: //case 0xa0: break; 17604: //case 0xa1: break; 17605: //case 0xa2: break; 17606: //case 0xa3: break; 17607: //case 0xa4: break; 17608: //case 0xa5: break; 17609: //case 0xa6: break; 17610: //case 0xa7: break; 17611: //case 0xa8: break; 17612: //case 0xa9: break; 17613: //case 0xaa: break; 17614: //case 0xab: break; 17615: //case 0xac: break; 17616: //case 0xad: break; 17617: //case 0xae: break; 17618: //case 0xaf: break; 17619: //case 0xb0: break; 17620: //case 0xb1: break; 17621: //case 0xb2: break; 17622: //case 0xb3: break; 17623: //case 0xb4: break; 17624: //case 0xb5: break; 17625: //case 0xb6: break; 17626: //case 0xb7: break; 17627: //case 0xb8: break; 17628: //case 0xb9: break; 17629: //case 0xba: break; 17630: //case 0xbb: break; 17631: //case 0xbc: break; 17632: //case 0xbd: break; 17633: //case 0xbe: break; 17634: //case 0xbf: break; 17635: //case 0xc0: break; 17636: //case 0xc1: break; 17637: //case 0xc2: break; 17638: //case 0xc3: break; 17639: //case 0xc4: break; 17640: //case 0xc5: break; 17641: //case 0xc6: break; 17642: //case 0xc7: break; 17643: //case 0xc8: break; 17644: //case 0xc9: break; 17645: //case 0xca: break; 17646: //case 0xcb: break; 17647: //case 0xcc: break; 17648: //case 0xcd: break; 17649: //case 0xce: break; 17650: //case 0xcf: break; 17651: //case 0xd0: break; 17652: //case 0xd1: break; 17653: //case 0xd2: break; 17654: //case 0xd3: break; 17655: //case 0xd4: break; 17656: //case 0xd5: break; 17657: //case 0xd6: break; 17658: //case 0xd7: break; 17659: //case 0xd8: break; 17660: //case 0xd9: break; 17661: //case 0xda: break; 17662: //case 0xdb: break; 17663: //case 0xdc: break; 17664: //case 0xdd: break; 17665: //case 0xde: break; 17666: //case 0xdf: break; 17667: case 0xe0: FEFunction.fpkCLMUL (); break; 17668: case 0xe1: FEFunction.fpkCLDIV (); break; 17669: case 0xe2: FEFunction.fpkCLMOD (); break; 17670: case 0xe3: FEFunction.fpkCUMUL (); break; 17671: case 0xe4: FEFunction.fpkCUDIV (); break; 17672: case 0xe5: FEFunction.fpkCUMOD (); break; 17673: case 0xe6: FEFunction.fpkCLTOD (); break; 17674: case 0xe7: FEFunction.fpkCDTOL (); break; 17675: case 0xe8: FEFunction.fpkCLTOF (); break; 17676: case 0xe9: FEFunction.fpkCFTOL (); break; 17677: case 0xea: FEFunction.fpkCFTOD (); break; 17678: case 0xeb: FEFunction.fpkCDTOF (); break; 17679: case 0xec: FEFunction.fpkCDCMP (); break; 17680: case 0xed: FEFunction.fpkCDADD (); break; 17681: case 0xee: FEFunction.fpkCDSUB (); break; 17682: case 0xef: FEFunction.fpkCDMUL (); break; 17683: case 0xf0: FEFunction.fpkCDDIV (); break; 17684: case 0xf1: FEFunction.fpkCDMOD (); break; 17685: case 0xf2: FEFunction.fpkCFCMP (); break; 17686: case 0xf3: FEFunction.fpkCFADD (); break; 17687: case 0xf4: FEFunction.fpkCFSUB (); break; 17688: case 0xf5: FEFunction.fpkCFMUL (); break; 17689: case 0xf6: FEFunction.fpkCFDIV (); break; 17690: case 0xf7: FEFunction.fpkCFMOD (); break; 17691: case 0xf8: FEFunction.fpkCDTST (); break; 17692: case 0xf9: FEFunction.fpkCFTST (); break; 17693: case 0xfa: FEFunction.fpkCDINC (); break; 17694: case 0xfb: FEFunction.fpkCFINC (); break; 17695: case 0xfc: FEFunction.fpkCDDEC (); break; 17696: case 0xfd: FEFunction.fpkCFDEC (); break; 17697: case 0xfe: FEFunction.fpkFEVARG (); break; 17698: //case 0xff: FEFunction.fpkFEVECS (); break; //FLOATn.Xに処理させる 17699: default: 17700: XEiJ.mpuCycleCount -= FEFunction.FPK_CLOCK; //戻す 17701: irpFline (); 17702: } 17703: if (FEFunction.FPK_DEBUG_TRACE) { 17704: int i = sb.length (); 17705: XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (XEiJ.fmtHex8 (sb.append (" D0="), XEiJ.regRn[0]).append (" D1="), XEiJ.regRn[1]).append (" D2="), XEiJ.regRn[2]).append (" D3="), XEiJ.regRn[3]); 17706: int l = MainMemory.mmrStrlen (a0, 20); 17707: sb.append (" (A0)=\""); 17708: i = sb.length () - i; 17709: MainMemory.mmrRstr (sb, a0, l).append ("\"\n"); 17710: if (a0 <= XEiJ.regRn[8] && XEiJ.regRn[8] <= a0 + l) { 17711: for (i += sb.length () + XEiJ.regRn[8] - a0; sb.length () < i; ) { 17712: sb.append (' '); 17713: } 17714: sb.append ('^'); 17715: } 17716: System.out.println (sb.toString ()); 17717: } 17718: } //irpFpack 17719: 17720: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17721: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17722: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17723: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17724: //DOS <data> |A|012346|-|UUUUU|UUUUU| |1111_111_1dd_ddd_ddd [FLINE #<data>] 17725: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17726: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17727: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17728: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17729: //FLINE #<data> |-|012346|-|UUUUU|UUUUU| |1111_ddd_ddd_ddd_ddd (line 1111 emulator) 17730: public static void irpFline () throws M68kException { 17731: XEiJ.mpuCycleCount += 34; 17732: if (XEiJ.MPU_INLINE_EXCEPTION) { 17733: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 17734: int sp = XEiJ.regRn[15]; 17735: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 17736: if (XEiJ.regSRS == 0) { //ユーザモードのとき 17737: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 17738: XEiJ.mpuUSP = sp; //USPを保存 17739: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 17740: if (DataBreakPoint.DBP_ON) { 17741: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 17742: } else { 17743: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 17744: } 17745: if (InstructionBreakPoint.IBP_ON) { 17746: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 17747: } 17748: } 17749: XEiJ.regRn[15] = sp -= 8; 17750: XEiJ.busWw (sp + 6, 0x0000 | M68kException.M6E_LINE_1111_EMULATOR << 2); //pushw。フォーマットとベクタオフセットをプッシュする 17751: XEiJ.busWl (sp + 2, XEiJ.regPC0); //pushl。pcをプッシュする 17752: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 17753: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (M68kException.M6E_LINE_1111_EMULATOR << 2))); //例外ベクタを取り出してジャンプする 17754: } else { 17755: irpException (M68kException.M6E_LINE_1111_EMULATOR, XEiJ.regPC0, XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR, 0x0000, 0); //pcは命令の先頭 17756: } 17757: } //irpFline 17758: 17759: //irpIllegal () 17760: // オペコードの上位10bitで分類されなかった未実装命令 17761: // 命令実行回数をカウントするために分けてある 17762: // 0x4afcのILLEGAL命令はTASに分類されて未実装実効アドレスで処理されるのでここには来ない 17763: public static void irpIllegal () throws M68kException { 17764: if (true) { 17765: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17766: throw M68kException.m6eSignal; 17767: } 17768: } //irpIllegal 17769: 17770: //z = irpAbcd (x, y) 17771: // ABCD 17772: public static int irpAbcd (int x, int y) { 17773: int c = XEiJ.regCCR >> 4; 17774: int t = (x & 0xff) + (y & 0xff) + c; //仮の結果 17775: int z = t; //結果 17776: if (0x0a <= (x & 0x0f) + (y & 0x0f) + c) { //ハーフキャリー 17777: z += 0x10 - 0x0a; 17778: } 17779: //XとCはキャリーがあるときセット、さもなくばクリア 17780: if (0xa0 <= z) { //キャリー 17781: z += 0x100 - 0xa0; 17782: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 17783: } else { 17784: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 17785: } 17786: //Zは結果が0でないときクリア、さもなくば変化しない 17787: z &= 0xff; 17788: if (z != 0x00) { 17789: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 17790: } 17791: if (false) { 17792: //000/030のときNは結果の最上位ビット 17793: if ((z & 0x80) != 0) { 17794: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17795: } else { 17796: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17797: } 17798: //000のときVは補正値の加算でオーバーフローしたときセット、さもなくばクリア 17799: int a = z - t; //補正値 17800: if ((((t ^ z) & (a ^ z)) & 0x80) != 0) { 17801: XEiJ.regCCR |= XEiJ.REG_CCR_V; 17802: } else { 17803: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17804: } 17805: } else if (true) { 17806: //000/030のときNは結果の最上位ビット 17807: if ((z & 0x80) != 0) { 17808: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17809: } else { 17810: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17811: } 17812: //030のときVはクリア 17813: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17814: } else { 17815: //060のときNとVは変化しない 17816: } 17817: return z; 17818: } //irpAbcd 17819: 17820: //z = irpSbcd (x, y) 17821: // SBCD 17822: public static int irpSbcd (int x, int y) { 17823: int b = XEiJ.regCCR >> 4; 17824: int t = (x & 0xff) - (y & 0xff) - b; //仮の結果 17825: int z = t; //結果 17826: if ((x & 0x0f) - (y & 0x0f) - b < 0) { //ハーフボロー 17827: z -= 0x10 - 0x0a; 17828: } 17829: //XとCはボローがあるときセット、さもなくばクリア 17830: if (z < 0) { //ボロー 17831: if (t < 0) { 17832: z -= 0x100 - 0xa0; 17833: } 17834: XEiJ.regCCR |= XEiJ.REG_CCR_X | XEiJ.REG_CCR_C; 17835: } else { 17836: XEiJ.regCCR &= ~(XEiJ.REG_CCR_X | XEiJ.REG_CCR_C); 17837: } 17838: //Zは結果が0でないときクリア、さもなくば変化しない 17839: z &= 0xff; 17840: if (z != 0x00) { 17841: XEiJ.regCCR &= ~XEiJ.REG_CCR_Z; 17842: } 17843: if (false) { 17844: //000/030のときNは結果の最上位ビット 17845: if ((z & 0x80) != 0) { 17846: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17847: } else { 17848: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17849: } 17850: //000のときVは補正値の減算でオーバーフローしたときセット、さもなくばクリア 17851: int a = t - z; //補正値 17852: if ((((t & (a ^ z)) ^ (a | z)) & 0x80) != 0) { 17853: XEiJ.regCCR |= XEiJ.REG_CCR_V; 17854: } else { 17855: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17856: } 17857: } else if (true) { 17858: //000/030のときNは結果の最上位ビット 17859: if ((z & 0x80) != 0) { 17860: XEiJ.regCCR |= XEiJ.REG_CCR_N; 17861: } else { 17862: XEiJ.regCCR &= ~XEiJ.REG_CCR_N; 17863: } 17864: //030のときVはクリア 17865: XEiJ.regCCR &= ~XEiJ.REG_CCR_V; 17866: } else { 17867: //060のときNとVは変化しない 17868: } 17869: return z; 17870: } //irpSbcd 17871: 17872: 17873: 17874: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17875: // | | MPU | |CCin |CCout|addressing| 1st opcode 2nd opcode 17876: // A:alias P:privileged |A|012346|P|XNZVC|XNZVC|DAM+-WXZPI|bbbb_bbb_bbb_bbb_bbb-bbbbbbbbbbbbbbbb 17877: //------------------------------------------------+-+------+-+-----+-----+----------+------------------------------------- 17878: //HFSBOOT |-|012346|-|-----|-----| |0100_111_000_000_000 17879: //HFSINST |-|012346|-|-----|-----| |0100_111_000_000_001 17880: //HFSSTR |-|012346|-|-----|-----| |0100_111_000_000_010 17881: //HFSINT |-|012346|-|-----|-----| |0100_111_000_000_011 17882: //EMXNOP |-|012346|-|-----|-----| |0100_111_000_000_100 17883: // エミュレータ拡張命令 17884: public static void irpEmx () throws M68kException { 17885: switch (XEiJ.regOC & 63) { 17886: case XEiJ.EMX_OPCODE_HFSBOOT & 63: 17887: XEiJ.mpuCycleCount += 40; 17888: if (HFS.hfsIPLBoot ()) { 17889: //JMP $6800.W 17890: irpSetPC (0x00006800); 17891: } 17892: break; 17893: case XEiJ.EMX_OPCODE_HFSINST & 63: 17894: XEiJ.mpuCycleCount += 40; 17895: HFS.hfsInstall (); 17896: break; 17897: case XEiJ.EMX_OPCODE_HFSSTR & 63: 17898: XEiJ.mpuCycleCount += 40; 17899: HFS.hfsStrategy (); 17900: break; 17901: case XEiJ.EMX_OPCODE_HFSINT & 63: 17902: XEiJ.mpuCycleCount += 40; 17903: //XEiJ.mpuClockTime += (int) (TMR_FREQ / 100000L); //0.01ms 17904: if (HFS.hfsInterrupt ()) { 17905: //WAIT 17906: XEiJ.mpuTraceFlag = 0; //トレース例外を発生させない 17907: XEiJ.regPC = XEiJ.regPC0; //ループ 17908: XEiJ.mpuClockTime += XEiJ.TMR_FREQ * 4 / 1000000; //4μs。10MHzのとき40clk 17909: XEiJ.mpuLastNano += 4000L; 17910: } 17911: break; 17912: case XEiJ.EMX_OPCODE_EMXNOP & 63: 17913: XEiJ.emxNop (); 17914: break; 17915: default: 17916: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 17917: throw M68kException.m6eSignal; 17918: } 17919: } //irpEmx 17920: 17921: 17922: 17923: //irpSetPC (a) 17924: // pcへデータを書き込む 17925: // 奇数のときはアドレスエラーが発生する 17926: public static void irpSetPC (int a) throws M68kException { 17927: if (XEiJ.TEST_BIT_0_SHIFT ? a << 31 - 0 < 0 : (a & 1) != 0) { 17928: M68kException.m6eNumber = M68kException.M6E_ADDRESS_ERROR; 17929: M68kException.m6eAddress = a & -2; //アドレスを偶数にする 17930: M68kException.m6eDirection = XEiJ.MPU_WR_READ; 17931: M68kException.m6eSize = XEiJ.MPU_SS_LONG; 17932: throw M68kException.m6eSignal; 17933: } 17934: XEiJ.mpuTraceFlag |= XEiJ.regSRT0; //フロートレース 17935: if (BranchLog.BLG_ON) { 17936: //BranchLog.blgJump (a); //分岐ログに分岐レコードを追加する 17937: if (BranchLog.blgPrevHeadSuper != (BranchLog.blgHead | BranchLog.blgSuper) || BranchLog.blgPrevTail != XEiJ.regPC0) { //前回のレコードと異なるとき 17938: int i = (char) BranchLog.blgNewestRecord++ << BranchLog.BLG_RECORD_SHIFT; 17939: BranchLog.blgArray[i] = BranchLog.blgPrevHeadSuper = BranchLog.blgHead | BranchLog.blgSuper; 17940: BranchLog.blgArray[i + 1] = BranchLog.blgPrevTail = XEiJ.regPC0; 17941: } 17942: BranchLog.blgHead = XEiJ.regPC = a; 17943: BranchLog.blgSuper = XEiJ.regSRS >>> 13; 17944: } else { 17945: XEiJ.regPC = a; 17946: } 17947: } //irpSetPC 17948: 17949: //irpSetSR (newSr) 17950: // srへデータを書き込む 17951: // ori to sr/andi to sr/eori to sr/move to sr/stop/rteで使用される 17952: // スーパーバイザモードになっていることを確認してから呼び出すこと 17953: // rteではr[15]が指すアドレスからsrとpcを取り出してr[15]を更新してから呼び出すこと 17954: // スーパーバイザモード→ユーザモードのときは移行のための処理を行う 17955: // 新しい割り込みマスクレベルよりも高い割り込み処理の終了をデバイスに通知する 17956: public static void irpSetSR (int newSr) { 17957: XEiJ.regSRT1 = XEiJ.REG_SR_T1 & newSr; 17958: XEiJ.regSRT0 = XEiJ.REG_SR_T0 & newSr; 17959: int old_srM = XEiJ.regSRM; 17960: XEiJ.regSRM = XEiJ.REG_SR_M & newSr; 17961: if ((XEiJ.regSRS = XEiJ.REG_SR_S & newSr) == 0) { //スーパーバイザモード→ユーザモード 17962: if (old_srM != 0) { //スーパーバイザマスタモード→ユーザモード 17963: XEiJ.mpuMSP = XEiJ.regRn[15]; //XEiJ.mpuMSPを保存 17964: } else { //スーパーバイザ割り込みモード→ユーザモード 17965: XEiJ.mpuISP = XEiJ.regRn[15]; //XEiJ.mpuISPを保存 17966: } 17967: XEiJ.regRn[15] = XEiJ.mpuUSP; //XEiJ.mpuUSPを復元 17968: if (DataBreakPoint.DBP_ON) { 17969: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpUserMap; //ユーザメモリマップに切り替える 17970: } else { 17971: XEiJ.busMemoryMap = XEiJ.busUserMap; //ユーザメモリマップに切り替える 17972: } 17973: if (InstructionBreakPoint.IBP_ON) { 17974: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1UserMap; 17975: } 17976: } else if (old_srM != XEiJ.regSRM) { 17977: if (old_srM != 0) { //マスタモード→割り込みモード 17978: XEiJ.mpuMSP = XEiJ.regRn[15]; //XEiJ.mpuMSPを保存 17979: XEiJ.regRn[15] = XEiJ.mpuISP; //XEiJ.mpuISPを復元 17980: } else { //割り込みモード→マスタモード 17981: XEiJ.mpuISP = XEiJ.regRn[15]; //XEiJ.mpuISPを保存 17982: XEiJ.regRn[15] = XEiJ.mpuMSP; //XEiJ.mpuMSPを復元 17983: } 17984: } 17985: int t = (XEiJ.mpuIMR = 0x7f >> ((XEiJ.regSRI = XEiJ.REG_SR_I & newSr) >> 8)) & XEiJ.mpuISR; //XEiJ.mpuISRで1→0とするビット 17986: if (t != 0) { //終了する割り込みがあるとき 17987: XEiJ.mpuISR ^= t; 17988: //デバイスに割り込み処理の終了を通知する 17989: if (t == XEiJ.MPU_MFP_INTERRUPT_MASK) { //MFPのみ 17990: MC68901.mfpDone (); 17991: } else if (t == XEiJ.MPU_DMA_INTERRUPT_MASK) { //DMAのみ 17992: HD63450.dmaDone (); 17993: } else if (t == XEiJ.MPU_SCC_INTERRUPT_MASK) { //SCCのみ 17994: Z8530.sccDone (); 17995: } else if (t == XEiJ.MPU_IOI_INTERRUPT_MASK) { //IOIのみ 17996: IOInterrupt.ioiDone (); 17997: } else if (t == XEiJ.MPU_EB2_INTERRUPT_MASK) { //EB2のみ 17998: XEiJ.eb2Done (); 17999: } else { //SYSのみまたは複数 18000: if (XEiJ.TEST_BIT_1_SHIFT ? t << 24 + XEiJ.MPU_MFP_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_MFP_INTERRUPT_MASK) != 0) { 18001: MC68901.mfpDone (); 18002: } 18003: if (t << 24 + XEiJ.MPU_DMA_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_DMA_INTERRUPT_MASK) != 0 18004: HD63450.dmaDone (); 18005: } 18006: if (XEiJ.TEST_BIT_2_SHIFT ? t << 24 + XEiJ.MPU_SCC_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SCC_INTERRUPT_MASK) != 0) { 18007: Z8530.sccDone (); 18008: } 18009: if (t << 24 + XEiJ.MPU_IOI_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_IOI_INTERRUPT_MASK) != 0 18010: IOInterrupt.ioiDone (); 18011: } 18012: if (t << 24 + XEiJ.MPU_EB2_INTERRUPT_LEVEL < 0) { //(t & XEiJ.MPU_EB2_INTERRUPT_MASK) != 0 18013: XEiJ.eb2Done (); 18014: } 18015: if (XEiJ.TEST_BIT_0_SHIFT ? t << 24 + XEiJ.MPU_SYS_INTERRUPT_LEVEL < 0 : (t & XEiJ.MPU_SYS_INTERRUPT_MASK) != 0) { 18016: XEiJ.sysDone (); 18017: } 18018: } 18019: } 18020: XEiJ.mpuIMR |= ~XEiJ.mpuISR & XEiJ.MPU_SYS_INTERRUPT_MASK; //割り込みマスクレベルが7のときレベル7割り込みの処理中でなければレベル7割り込みを許可する 18021: XEiJ.regCCR = XEiJ.REG_CCR_MASK & newSr; 18022: } //irpSetSR 18023: 18024: //irpInterrupt (vectorNumber, level) 18025: // 割り込み処理を開始する 18026: public static void irpInterrupt (int vectorNumber, int level) throws M68kException { 18027: if (XEiJ.regOC == 0b0100_111_001_110_010) { //最後に実行した命令はSTOP命令 18028: XEiJ.regPC = XEiJ.regPC0 + 4; //次の命令に進む 18029: } 18030: XEiJ.mpuClockTime += XEiJ.mpuModifiedUnit * 44; 18031: int save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18032: XEiJ.regSRI = level << 8; //割り込みマスクを要求されたレベルに変更する 18033: XEiJ.mpuIMR = 0x7f >> level; 18034: XEiJ.mpuISR |= 0x80 >> level; 18035: int sp = XEiJ.regRn[15]; 18036: XEiJ.regSRT1 = XEiJ.regSRT0 = 0; //srのTビットを消す 18037: if (XEiJ.regSRS == 0) { //ユーザモードのとき 18038: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18039: XEiJ.mpuUSP = sp; //USPを保存 18040: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 18041: if (DataBreakPoint.DBP_ON) { 18042: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18043: } else { 18044: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18045: } 18046: if (InstructionBreakPoint.IBP_ON) { 18047: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18048: } 18049: } 18050: XEiJ.regRn[15] = sp -= 8; 18051: XEiJ.busWw (sp + 6, 0x0000 | vectorNumber << 2); //pushw。フォーマットとベクタオフセットをプッシュする 18052: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 18053: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 18054: if (XEiJ.regSRM != 0) { //マスタモードのとき 18055: save_sr = XEiJ.regSRT1 | XEiJ.regSRT0 | XEiJ.regSRS | XEiJ.regSRM | XEiJ.regSRI | XEiJ.regCCR; 18056: XEiJ.regSRM = 0; //割り込みモードへ移行する 18057: XEiJ.mpuMSP = sp; //XEiJ.mpuMSPを保存 18058: sp = XEiJ.mpuISP; //SSPを復元 18059: //割り込みスタックにスローアウェイフレームを作成する 18060: XEiJ.regRn[15] = sp -= 8; 18061: XEiJ.busWw (sp + 6, 0x1000 | vectorNumber << 2); //pushw。フォーマットとベクタオフセットをプッシュする 18062: XEiJ.busWl (sp + 2, XEiJ.regPC); //pushl。pcをプッシュする 18063: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 18064: } 18065: if (BranchLog.BLG_ON) { 18066: XEiJ.regPC0 = XEiJ.regPC; //rteによる割り込み終了と同時に次の割り込みを受け付けたとき間でpc0を更新しないと2番目の分岐レコードの終了アドレスが1番目と同じになっておかしな分岐レコードができてしまう 18067: } 18068: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (vectorNumber << 2))); //例外ベクタを取り出してジャンプする 18069: } //irpInterrupt 18070: 18071: //irpException (vectorNumber, save_pc, save_sr, format, address) 18072: // 例外処理を開始する 18073: // スタックへのプッシュ、ベクタの取り出し、ジャンプのいずれかでバスエラーまたはアドレスエラーが発生する場合がある 18074: public static void irpException (int vectorNumber, int save_pc, int save_sr, int format, int address) throws M68kException { 18075: int sp = XEiJ.regRn[15]; 18076: XEiJ.regSRT1 = XEiJ.regSRT0 = XEiJ.mpuTraceFlag = 0; //srのTビットを消す 18077: if (XEiJ.regSRS == 0) { //ユーザモードのとき 18078: XEiJ.regSRS = XEiJ.REG_SR_S; //スーパーバイザモードへ移行する 18079: XEiJ.mpuUSP = sp; //USPを保存 18080: sp = XEiJ.regSRM != 0 ? XEiJ.mpuMSP : XEiJ.mpuISP; //SSPを復元 18081: if (DataBreakPoint.DBP_ON) { 18082: DataBreakPoint.dbpMemoryMap = DataBreakPoint.dbpSuperMap; //スーパーバイザメモリマップに切り替える 18083: } else { 18084: XEiJ.busMemoryMap = XEiJ.busSuperMap; //スーパーバイザメモリマップに切り替える 18085: } 18086: if (InstructionBreakPoint.IBP_ON) { 18087: InstructionBreakPoint.ibpOp1MemoryMap = InstructionBreakPoint.ibpOp1SuperMap; 18088: } 18089: } 18090: if (format <= 0x1000) { 18091: XEiJ.regRn[15] = sp -= 8; 18092: } else { 18093: XEiJ.regRn[15] = sp -= 12; 18094: XEiJ.busWl (sp + 8, address); //pushl。アドレスをプッシュする 18095: } 18096: XEiJ.busWw (sp + 6, format | vectorNumber << 2); //pushw。フォーマットとベクタオフセットをプッシュする 18097: XEiJ.busWl (sp + 2, save_pc); //pushl。pcをプッシュする 18098: XEiJ.busWw (sp, save_sr); //pushw。srをプッシュする 18099: irpSetPC (XEiJ.busRlsf (XEiJ.mpuVBR + (vectorNumber << 2))); //例外ベクタを取り出してジャンプする 18100: } //irpException 18101: 18102: 18103: 18104: //a = efaAnyByte (ea) //| M+-WXZPI| 18105: // 任意のモードのバイトオペランドの実効アドレスを求める 18106: // (A7)+と-(A7)はA7を奇偶に関わらず2変化させ、跨いだワードの上位バイト(アドレスの小さい方)を参照する 18107: // #<data>はオペコードに続くワードの下位バイトを参照する。上位バイトは不定なので参照してはならない 18108: @SuppressWarnings ("fallthrough") public static int efaAnyByte (int ea) throws M68kException { 18109: int t, w, x; 18110: switch (ea) { 18111: case 0b010_000: //(A0) 18112: if (XEiJ.EFA_SEPARATE_AR) { 18113: XEiJ.mpuCycleCount += 4; 18114: return XEiJ.regRn[ 8]; 18115: } 18116: //fallthrough 18117: case 0b010_001: //(A1) 18118: if (XEiJ.EFA_SEPARATE_AR) { 18119: XEiJ.mpuCycleCount += 4; 18120: return XEiJ.regRn[ 9]; 18121: } 18122: //fallthrough 18123: case 0b010_010: //(A2) 18124: if (XEiJ.EFA_SEPARATE_AR) { 18125: XEiJ.mpuCycleCount += 4; 18126: return XEiJ.regRn[10]; 18127: } 18128: //fallthrough 18129: case 0b010_011: //(A3) 18130: if (XEiJ.EFA_SEPARATE_AR) { 18131: XEiJ.mpuCycleCount += 4; 18132: return XEiJ.regRn[11]; 18133: } 18134: //fallthrough 18135: case 0b010_100: //(A4) 18136: if (XEiJ.EFA_SEPARATE_AR) { 18137: XEiJ.mpuCycleCount += 4; 18138: return XEiJ.regRn[12]; 18139: } 18140: //fallthrough 18141: case 0b010_101: //(A5) 18142: if (XEiJ.EFA_SEPARATE_AR) { 18143: XEiJ.mpuCycleCount += 4; 18144: return XEiJ.regRn[13]; 18145: } 18146: //fallthrough 18147: case 0b010_110: //(A6) 18148: if (XEiJ.EFA_SEPARATE_AR) { 18149: XEiJ.mpuCycleCount += 4; 18150: return XEiJ.regRn[14]; 18151: } 18152: //fallthrough 18153: case 0b010_111: //(A7) 18154: if (XEiJ.EFA_SEPARATE_AR) { 18155: XEiJ.mpuCycleCount += 4; 18156: return XEiJ.regRn[15]; 18157: } else { 18158: XEiJ.mpuCycleCount += 4; 18159: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18160: } 18161: case 0b011_000: //(A0)+ 18162: if (XEiJ.EFA_SEPARATE_AR) { 18163: XEiJ.mpuCycleCount += 4; 18164: return XEiJ.regRn[ 8]++; 18165: } 18166: //fallthrough 18167: case 0b011_001: //(A1)+ 18168: if (XEiJ.EFA_SEPARATE_AR) { 18169: XEiJ.mpuCycleCount += 4; 18170: return XEiJ.regRn[ 9]++; 18171: } 18172: //fallthrough 18173: case 0b011_010: //(A2)+ 18174: if (XEiJ.EFA_SEPARATE_AR) { 18175: XEiJ.mpuCycleCount += 4; 18176: return XEiJ.regRn[10]++; 18177: } 18178: //fallthrough 18179: case 0b011_011: //(A3)+ 18180: if (XEiJ.EFA_SEPARATE_AR) { 18181: XEiJ.mpuCycleCount += 4; 18182: return XEiJ.regRn[11]++; 18183: } 18184: //fallthrough 18185: case 0b011_100: //(A4)+ 18186: if (XEiJ.EFA_SEPARATE_AR) { 18187: XEiJ.mpuCycleCount += 4; 18188: return XEiJ.regRn[12]++; 18189: } 18190: //fallthrough 18191: case 0b011_101: //(A5)+ 18192: if (XEiJ.EFA_SEPARATE_AR) { 18193: XEiJ.mpuCycleCount += 4; 18194: return XEiJ.regRn[13]++; 18195: } 18196: //fallthrough 18197: case 0b011_110: //(A6)+ 18198: if (XEiJ.EFA_SEPARATE_AR) { 18199: XEiJ.mpuCycleCount += 4; 18200: return XEiJ.regRn[14]++; 18201: } else { 18202: XEiJ.mpuCycleCount += 4; 18203: return XEiJ.regRn[ea - (0b011_000 - 8)]++; 18204: } 18205: case 0b011_111: //(A7)+ 18206: XEiJ.mpuCycleCount += 4; 18207: return (XEiJ.regRn[15] += 2) - 2; 18208: case 0b100_000: //-(A0) 18209: if (XEiJ.EFA_SEPARATE_AR) { 18210: XEiJ.mpuCycleCount += 6; 18211: return --XEiJ.regRn[ 8]; 18212: } 18213: //fallthrough 18214: case 0b100_001: //-(A1) 18215: if (XEiJ.EFA_SEPARATE_AR) { 18216: XEiJ.mpuCycleCount += 6; 18217: return --XEiJ.regRn[ 9]; 18218: } 18219: //fallthrough 18220: case 0b100_010: //-(A2) 18221: if (XEiJ.EFA_SEPARATE_AR) { 18222: XEiJ.mpuCycleCount += 6; 18223: return --XEiJ.regRn[10]; 18224: } 18225: //fallthrough 18226: case 0b100_011: //-(A3) 18227: if (XEiJ.EFA_SEPARATE_AR) { 18228: XEiJ.mpuCycleCount += 6; 18229: return --XEiJ.regRn[11]; 18230: } 18231: //fallthrough 18232: case 0b100_100: //-(A4) 18233: if (XEiJ.EFA_SEPARATE_AR) { 18234: XEiJ.mpuCycleCount += 6; 18235: return --XEiJ.regRn[12]; 18236: } 18237: //fallthrough 18238: case 0b100_101: //-(A5) 18239: if (XEiJ.EFA_SEPARATE_AR) { 18240: XEiJ.mpuCycleCount += 6; 18241: return --XEiJ.regRn[13]; 18242: } 18243: //fallthrough 18244: case 0b100_110: //-(A6) 18245: if (XEiJ.EFA_SEPARATE_AR) { 18246: XEiJ.mpuCycleCount += 6; 18247: return --XEiJ.regRn[14]; 18248: } else { 18249: XEiJ.mpuCycleCount += 6; 18250: return --XEiJ.regRn[ea - (0b100_000 - 8)]; 18251: } 18252: case 0b100_111: //-(A7) 18253: XEiJ.mpuCycleCount += 6; 18254: return XEiJ.regRn[15] -= 2; 18255: case 0b101_000: //(d16,A0) 18256: case 0b101_001: //(d16,A1) 18257: case 0b101_010: //(d16,A2) 18258: case 0b101_011: //(d16,A3) 18259: case 0b101_100: //(d16,A4) 18260: case 0b101_101: //(d16,A5) 18261: case 0b101_110: //(d16,A6) 18262: case 0b101_111: //(d16,A7) 18263: XEiJ.mpuCycleCount += 8; 18264: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18265: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18266: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18267: } else { 18268: t = XEiJ.regPC; 18269: XEiJ.regPC = t + 2; 18270: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18271: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18272: } 18273: case 0b110_000: //(d8,A0,Rn.wl) 18274: case 0b110_001: //(d8,A1,Rn.wl) 18275: case 0b110_010: //(d8,A2,Rn.wl) 18276: case 0b110_011: //(d8,A3,Rn.wl) 18277: case 0b110_100: //(d8,A4,Rn.wl) 18278: case 0b110_101: //(d8,A5,Rn.wl) 18279: case 0b110_110: //(d8,A6,Rn.wl) 18280: case 0b110_111: //(d8,A7,Rn.wl) 18281: XEiJ.mpuCycleCount += 10; 18282: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18283: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18284: } else { 18285: w = XEiJ.regPC; 18286: XEiJ.regPC = w + 2; 18287: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18288: } 18289: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18290: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18291: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18292: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18293: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18294: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18295: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18296: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18297: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18298: XEiJ.regRn[w >> 12]) //ロングインデックス 18299: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18300: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18301: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18302: XEiJ.busRls (t) + x) //ポストインデックス 18303: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18304: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18305: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18306: case 0b111_000: //(xxx).W 18307: XEiJ.mpuCycleCount += 8; 18308: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 18309: case 0b111_001: //(xxx).L 18310: XEiJ.mpuCycleCount += 12; 18311: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 18312: case 0b111_010: //(d16,PC) 18313: XEiJ.mpuCycleCount += 8; 18314: t = XEiJ.regPC; 18315: XEiJ.regPC = t + 2; 18316: return (t //ベースレジスタ 18317: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18318: case 0b111_011: //(d8,PC,Rn.wl) 18319: XEiJ.mpuCycleCount += 10; 18320: t = XEiJ.regPC; 18321: XEiJ.regPC = t + 2; 18322: w = XEiJ.busRwze (t); //pcwz。拡張ワード 18323: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18324: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18325: t) //ベースレジスタ 18326: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18327: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18328: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18329: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18330: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18331: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18332: XEiJ.regRn[w >> 12]) //ロングインデックス 18333: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18334: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18335: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18336: XEiJ.busRls (t) + x) //ポストインデックス 18337: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18338: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18339: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18340: case 0b111_100: //#<data> 18341: XEiJ.mpuCycleCount += 4; 18342: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18343: return (XEiJ.regPC += 2) - 1; //下位バイト 18344: } else { 18345: t = XEiJ.regPC; 18346: XEiJ.regPC = t + 2; 18347: return t + 1; //下位バイト 18348: } 18349: } //switch 18350: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18351: throw M68kException.m6eSignal; 18352: } //efaAnyByte 18353: 18354: //a = efaMemByte (ea) //| M+-WXZP | 18355: // メモリモードのバイトオペランドの実効アドレスを求める 18356: // efaAnyByteとの違いは#<data>がないこと 18357: @SuppressWarnings ("fallthrough") public static int efaMemByte (int ea) throws M68kException { 18358: int t, w, x; 18359: switch (ea) { 18360: case 0b010_000: //(A0) 18361: if (XEiJ.EFA_SEPARATE_AR) { 18362: XEiJ.mpuCycleCount += 4; 18363: return XEiJ.regRn[ 8]; 18364: } 18365: //fallthrough 18366: case 0b010_001: //(A1) 18367: if (XEiJ.EFA_SEPARATE_AR) { 18368: XEiJ.mpuCycleCount += 4; 18369: return XEiJ.regRn[ 9]; 18370: } 18371: //fallthrough 18372: case 0b010_010: //(A2) 18373: if (XEiJ.EFA_SEPARATE_AR) { 18374: XEiJ.mpuCycleCount += 4; 18375: return XEiJ.regRn[10]; 18376: } 18377: //fallthrough 18378: case 0b010_011: //(A3) 18379: if (XEiJ.EFA_SEPARATE_AR) { 18380: XEiJ.mpuCycleCount += 4; 18381: return XEiJ.regRn[11]; 18382: } 18383: //fallthrough 18384: case 0b010_100: //(A4) 18385: if (XEiJ.EFA_SEPARATE_AR) { 18386: XEiJ.mpuCycleCount += 4; 18387: return XEiJ.regRn[12]; 18388: } 18389: //fallthrough 18390: case 0b010_101: //(A5) 18391: if (XEiJ.EFA_SEPARATE_AR) { 18392: XEiJ.mpuCycleCount += 4; 18393: return XEiJ.regRn[13]; 18394: } 18395: //fallthrough 18396: case 0b010_110: //(A6) 18397: if (XEiJ.EFA_SEPARATE_AR) { 18398: XEiJ.mpuCycleCount += 4; 18399: return XEiJ.regRn[14]; 18400: } 18401: //fallthrough 18402: case 0b010_111: //(A7) 18403: if (XEiJ.EFA_SEPARATE_AR) { 18404: XEiJ.mpuCycleCount += 4; 18405: return XEiJ.regRn[15]; 18406: } else { 18407: XEiJ.mpuCycleCount += 4; 18408: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18409: } 18410: case 0b011_000: //(A0)+ 18411: if (XEiJ.EFA_SEPARATE_AR) { 18412: XEiJ.mpuCycleCount += 4; 18413: return XEiJ.regRn[ 8]++; 18414: } 18415: //fallthrough 18416: case 0b011_001: //(A1)+ 18417: if (XEiJ.EFA_SEPARATE_AR) { 18418: XEiJ.mpuCycleCount += 4; 18419: return XEiJ.regRn[ 9]++; 18420: } 18421: //fallthrough 18422: case 0b011_010: //(A2)+ 18423: if (XEiJ.EFA_SEPARATE_AR) { 18424: XEiJ.mpuCycleCount += 4; 18425: return XEiJ.regRn[10]++; 18426: } 18427: //fallthrough 18428: case 0b011_011: //(A3)+ 18429: if (XEiJ.EFA_SEPARATE_AR) { 18430: XEiJ.mpuCycleCount += 4; 18431: return XEiJ.regRn[11]++; 18432: } 18433: //fallthrough 18434: case 0b011_100: //(A4)+ 18435: if (XEiJ.EFA_SEPARATE_AR) { 18436: XEiJ.mpuCycleCount += 4; 18437: return XEiJ.regRn[12]++; 18438: } 18439: //fallthrough 18440: case 0b011_101: //(A5)+ 18441: if (XEiJ.EFA_SEPARATE_AR) { 18442: XEiJ.mpuCycleCount += 4; 18443: return XEiJ.regRn[13]++; 18444: } 18445: //fallthrough 18446: case 0b011_110: //(A6)+ 18447: if (XEiJ.EFA_SEPARATE_AR) { 18448: XEiJ.mpuCycleCount += 4; 18449: return XEiJ.regRn[14]++; 18450: } else { 18451: XEiJ.mpuCycleCount += 4; 18452: return XEiJ.regRn[ea - (0b011_000 - 8)]++; 18453: } 18454: case 0b011_111: //(A7)+ 18455: XEiJ.mpuCycleCount += 4; 18456: return (XEiJ.regRn[15] += 2) - 2; 18457: case 0b100_000: //-(A0) 18458: if (XEiJ.EFA_SEPARATE_AR) { 18459: XEiJ.mpuCycleCount += 6; 18460: return --XEiJ.regRn[ 8]; 18461: } 18462: //fallthrough 18463: case 0b100_001: //-(A1) 18464: if (XEiJ.EFA_SEPARATE_AR) { 18465: XEiJ.mpuCycleCount += 6; 18466: return --XEiJ.regRn[ 9]; 18467: } 18468: //fallthrough 18469: case 0b100_010: //-(A2) 18470: if (XEiJ.EFA_SEPARATE_AR) { 18471: XEiJ.mpuCycleCount += 6; 18472: return --XEiJ.regRn[10]; 18473: } 18474: //fallthrough 18475: case 0b100_011: //-(A3) 18476: if (XEiJ.EFA_SEPARATE_AR) { 18477: XEiJ.mpuCycleCount += 6; 18478: return --XEiJ.regRn[11]; 18479: } 18480: //fallthrough 18481: case 0b100_100: //-(A4) 18482: if (XEiJ.EFA_SEPARATE_AR) { 18483: XEiJ.mpuCycleCount += 6; 18484: return --XEiJ.regRn[12]; 18485: } 18486: //fallthrough 18487: case 0b100_101: //-(A5) 18488: if (XEiJ.EFA_SEPARATE_AR) { 18489: XEiJ.mpuCycleCount += 6; 18490: return --XEiJ.regRn[13]; 18491: } 18492: //fallthrough 18493: case 0b100_110: //-(A6) 18494: if (XEiJ.EFA_SEPARATE_AR) { 18495: XEiJ.mpuCycleCount += 6; 18496: return --XEiJ.regRn[14]; 18497: } else { 18498: XEiJ.mpuCycleCount += 6; 18499: return --XEiJ.regRn[ea - (0b100_000 - 8)]; 18500: } 18501: case 0b100_111: //-(A7) 18502: XEiJ.mpuCycleCount += 6; 18503: return XEiJ.regRn[15] -= 2; 18504: case 0b101_000: //(d16,A0) 18505: case 0b101_001: //(d16,A1) 18506: case 0b101_010: //(d16,A2) 18507: case 0b101_011: //(d16,A3) 18508: case 0b101_100: //(d16,A4) 18509: case 0b101_101: //(d16,A5) 18510: case 0b101_110: //(d16,A6) 18511: case 0b101_111: //(d16,A7) 18512: XEiJ.mpuCycleCount += 8; 18513: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18514: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18515: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18516: } else { 18517: t = XEiJ.regPC; 18518: XEiJ.regPC = t + 2; 18519: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18520: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18521: } 18522: case 0b110_000: //(d8,A0,Rn.wl) 18523: case 0b110_001: //(d8,A1,Rn.wl) 18524: case 0b110_010: //(d8,A2,Rn.wl) 18525: case 0b110_011: //(d8,A3,Rn.wl) 18526: case 0b110_100: //(d8,A4,Rn.wl) 18527: case 0b110_101: //(d8,A5,Rn.wl) 18528: case 0b110_110: //(d8,A6,Rn.wl) 18529: case 0b110_111: //(d8,A7,Rn.wl) 18530: XEiJ.mpuCycleCount += 10; 18531: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18532: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18533: } else { 18534: w = XEiJ.regPC; 18535: XEiJ.regPC = w + 2; 18536: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18537: } 18538: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18539: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18540: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18541: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18542: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18543: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18544: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18545: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18546: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18547: XEiJ.regRn[w >> 12]) //ロングインデックス 18548: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18549: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18550: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18551: XEiJ.busRls (t) + x) //ポストインデックス 18552: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18553: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18554: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18555: case 0b111_000: //(xxx).W 18556: XEiJ.mpuCycleCount += 8; 18557: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 18558: case 0b111_001: //(xxx).L 18559: XEiJ.mpuCycleCount += 12; 18560: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 18561: case 0b111_010: //(d16,PC) 18562: XEiJ.mpuCycleCount += 8; 18563: t = XEiJ.regPC; 18564: XEiJ.regPC = t + 2; 18565: return (t //ベースレジスタ 18566: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18567: case 0b111_011: //(d8,PC,Rn.wl) 18568: XEiJ.mpuCycleCount += 10; 18569: t = XEiJ.regPC; 18570: XEiJ.regPC = t + 2; 18571: w = XEiJ.busRwze (t); //pcwz。拡張ワード 18572: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18573: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18574: t) //ベースレジスタ 18575: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18576: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18577: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18578: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18579: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18580: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18581: XEiJ.regRn[w >> 12]) //ロングインデックス 18582: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18583: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18584: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18585: XEiJ.busRls (t) + x) //ポストインデックス 18586: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18587: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18588: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18589: } //switch 18590: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18591: throw M68kException.m6eSignal; 18592: } //efaMemByte 18593: 18594: //a = efaMltByte (ea) //| M+-WXZ | 18595: // メモリ可変モードのバイトオペランドの実効アドレスを求める 18596: // efaMemByteとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 18597: @SuppressWarnings ("fallthrough") public static int efaMltByte (int ea) throws M68kException { 18598: int t, w, x; 18599: switch (ea) { 18600: case 0b010_000: //(A0) 18601: if (XEiJ.EFA_SEPARATE_AR) { 18602: XEiJ.mpuCycleCount += 4; 18603: return XEiJ.regRn[ 8]; 18604: } 18605: //fallthrough 18606: case 0b010_001: //(A1) 18607: if (XEiJ.EFA_SEPARATE_AR) { 18608: XEiJ.mpuCycleCount += 4; 18609: return XEiJ.regRn[ 9]; 18610: } 18611: //fallthrough 18612: case 0b010_010: //(A2) 18613: if (XEiJ.EFA_SEPARATE_AR) { 18614: XEiJ.mpuCycleCount += 4; 18615: return XEiJ.regRn[10]; 18616: } 18617: //fallthrough 18618: case 0b010_011: //(A3) 18619: if (XEiJ.EFA_SEPARATE_AR) { 18620: XEiJ.mpuCycleCount += 4; 18621: return XEiJ.regRn[11]; 18622: } 18623: //fallthrough 18624: case 0b010_100: //(A4) 18625: if (XEiJ.EFA_SEPARATE_AR) { 18626: XEiJ.mpuCycleCount += 4; 18627: return XEiJ.regRn[12]; 18628: } 18629: //fallthrough 18630: case 0b010_101: //(A5) 18631: if (XEiJ.EFA_SEPARATE_AR) { 18632: XEiJ.mpuCycleCount += 4; 18633: return XEiJ.regRn[13]; 18634: } 18635: //fallthrough 18636: case 0b010_110: //(A6) 18637: if (XEiJ.EFA_SEPARATE_AR) { 18638: XEiJ.mpuCycleCount += 4; 18639: return XEiJ.regRn[14]; 18640: } 18641: //fallthrough 18642: case 0b010_111: //(A7) 18643: if (XEiJ.EFA_SEPARATE_AR) { 18644: XEiJ.mpuCycleCount += 4; 18645: return XEiJ.regRn[15]; 18646: } else { 18647: XEiJ.mpuCycleCount += 4; 18648: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18649: } 18650: case 0b011_000: //(A0)+ 18651: if (XEiJ.EFA_SEPARATE_AR) { 18652: XEiJ.mpuCycleCount += 4; 18653: return XEiJ.regRn[ 8]++; 18654: } 18655: //fallthrough 18656: case 0b011_001: //(A1)+ 18657: if (XEiJ.EFA_SEPARATE_AR) { 18658: XEiJ.mpuCycleCount += 4; 18659: return XEiJ.regRn[ 9]++; 18660: } 18661: //fallthrough 18662: case 0b011_010: //(A2)+ 18663: if (XEiJ.EFA_SEPARATE_AR) { 18664: XEiJ.mpuCycleCount += 4; 18665: return XEiJ.regRn[10]++; 18666: } 18667: //fallthrough 18668: case 0b011_011: //(A3)+ 18669: if (XEiJ.EFA_SEPARATE_AR) { 18670: XEiJ.mpuCycleCount += 4; 18671: return XEiJ.regRn[11]++; 18672: } 18673: //fallthrough 18674: case 0b011_100: //(A4)+ 18675: if (XEiJ.EFA_SEPARATE_AR) { 18676: XEiJ.mpuCycleCount += 4; 18677: return XEiJ.regRn[12]++; 18678: } 18679: //fallthrough 18680: case 0b011_101: //(A5)+ 18681: if (XEiJ.EFA_SEPARATE_AR) { 18682: XEiJ.mpuCycleCount += 4; 18683: return XEiJ.regRn[13]++; 18684: } 18685: //fallthrough 18686: case 0b011_110: //(A6)+ 18687: if (XEiJ.EFA_SEPARATE_AR) { 18688: XEiJ.mpuCycleCount += 4; 18689: return XEiJ.regRn[14]++; 18690: } else { 18691: XEiJ.mpuCycleCount += 4; 18692: return XEiJ.regRn[ea - (0b011_000 - 8)]++; 18693: } 18694: case 0b011_111: //(A7)+ 18695: XEiJ.mpuCycleCount += 4; 18696: return (XEiJ.regRn[15] += 2) - 2; 18697: case 0b100_000: //-(A0) 18698: if (XEiJ.EFA_SEPARATE_AR) { 18699: XEiJ.mpuCycleCount += 6; 18700: return --XEiJ.regRn[ 8]; 18701: } 18702: //fallthrough 18703: case 0b100_001: //-(A1) 18704: if (XEiJ.EFA_SEPARATE_AR) { 18705: XEiJ.mpuCycleCount += 6; 18706: return --XEiJ.regRn[ 9]; 18707: } 18708: //fallthrough 18709: case 0b100_010: //-(A2) 18710: if (XEiJ.EFA_SEPARATE_AR) { 18711: XEiJ.mpuCycleCount += 6; 18712: return --XEiJ.regRn[10]; 18713: } 18714: //fallthrough 18715: case 0b100_011: //-(A3) 18716: if (XEiJ.EFA_SEPARATE_AR) { 18717: XEiJ.mpuCycleCount += 6; 18718: return --XEiJ.regRn[11]; 18719: } 18720: //fallthrough 18721: case 0b100_100: //-(A4) 18722: if (XEiJ.EFA_SEPARATE_AR) { 18723: XEiJ.mpuCycleCount += 6; 18724: return --XEiJ.regRn[12]; 18725: } 18726: //fallthrough 18727: case 0b100_101: //-(A5) 18728: if (XEiJ.EFA_SEPARATE_AR) { 18729: XEiJ.mpuCycleCount += 6; 18730: return --XEiJ.regRn[13]; 18731: } 18732: //fallthrough 18733: case 0b100_110: //-(A6) 18734: if (XEiJ.EFA_SEPARATE_AR) { 18735: XEiJ.mpuCycleCount += 6; 18736: return --XEiJ.regRn[14]; 18737: } else { 18738: XEiJ.mpuCycleCount += 6; 18739: return --XEiJ.regRn[ea - (0b100_000 - 8)]; 18740: } 18741: case 0b100_111: //-(A7) 18742: XEiJ.mpuCycleCount += 6; 18743: return XEiJ.regRn[15] -= 2; 18744: case 0b101_000: //(d16,A0) 18745: case 0b101_001: //(d16,A1) 18746: case 0b101_010: //(d16,A2) 18747: case 0b101_011: //(d16,A3) 18748: case 0b101_100: //(d16,A4) 18749: case 0b101_101: //(d16,A5) 18750: case 0b101_110: //(d16,A6) 18751: case 0b101_111: //(d16,A7) 18752: XEiJ.mpuCycleCount += 8; 18753: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18754: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18755: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18756: } else { 18757: t = XEiJ.regPC; 18758: XEiJ.regPC = t + 2; 18759: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18760: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18761: } 18762: case 0b110_000: //(d8,A0,Rn.wl) 18763: case 0b110_001: //(d8,A1,Rn.wl) 18764: case 0b110_010: //(d8,A2,Rn.wl) 18765: case 0b110_011: //(d8,A3,Rn.wl) 18766: case 0b110_100: //(d8,A4,Rn.wl) 18767: case 0b110_101: //(d8,A5,Rn.wl) 18768: case 0b110_110: //(d8,A6,Rn.wl) 18769: case 0b110_111: //(d8,A7,Rn.wl) 18770: XEiJ.mpuCycleCount += 10; 18771: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18772: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18773: } else { 18774: w = XEiJ.regPC; 18775: XEiJ.regPC = w + 2; 18776: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18777: } 18778: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18779: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18780: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18781: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18782: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18783: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18784: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18785: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18786: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18787: XEiJ.regRn[w >> 12]) //ロングインデックス 18788: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18789: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18790: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18791: XEiJ.busRls (t) + x) //ポストインデックス 18792: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18793: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18794: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18795: case 0b111_000: //(xxx).W 18796: XEiJ.mpuCycleCount += 8; 18797: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 18798: case 0b111_001: //(xxx).L 18799: XEiJ.mpuCycleCount += 12; 18800: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 18801: } //switch 18802: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18803: throw M68kException.m6eSignal; 18804: } //efaMltByte 18805: 18806: //a = efaCntByte (ea) //| M WXZP | 18807: // 制御モードのロングオペランドの実効アドレスを求める 18808: // efaMemByteとの違いは(Ar)+と-(Ar)がないこと 18809: @SuppressWarnings ("fallthrough") public static int efaCntByte (int ea) throws M68kException { 18810: int t, w, x; 18811: switch (ea) { 18812: case 0b010_000: //(A0) 18813: if (XEiJ.EFA_SEPARATE_AR) { 18814: XEiJ.mpuCycleCount += 4; 18815: return XEiJ.regRn[ 8]; 18816: } 18817: //fallthrough 18818: case 0b010_001: //(A1) 18819: if (XEiJ.EFA_SEPARATE_AR) { 18820: XEiJ.mpuCycleCount += 4; 18821: return XEiJ.regRn[ 9]; 18822: } 18823: //fallthrough 18824: case 0b010_010: //(A2) 18825: if (XEiJ.EFA_SEPARATE_AR) { 18826: XEiJ.mpuCycleCount += 4; 18827: return XEiJ.regRn[10]; 18828: } 18829: //fallthrough 18830: case 0b010_011: //(A3) 18831: if (XEiJ.EFA_SEPARATE_AR) { 18832: XEiJ.mpuCycleCount += 4; 18833: return XEiJ.regRn[11]; 18834: } 18835: //fallthrough 18836: case 0b010_100: //(A4) 18837: if (XEiJ.EFA_SEPARATE_AR) { 18838: XEiJ.mpuCycleCount += 4; 18839: return XEiJ.regRn[12]; 18840: } 18841: //fallthrough 18842: case 0b010_101: //(A5) 18843: if (XEiJ.EFA_SEPARATE_AR) { 18844: XEiJ.mpuCycleCount += 4; 18845: return XEiJ.regRn[13]; 18846: } 18847: //fallthrough 18848: case 0b010_110: //(A6) 18849: if (XEiJ.EFA_SEPARATE_AR) { 18850: XEiJ.mpuCycleCount += 4; 18851: return XEiJ.regRn[14]; 18852: } 18853: //fallthrough 18854: case 0b010_111: //(A7) 18855: if (XEiJ.EFA_SEPARATE_AR) { 18856: XEiJ.mpuCycleCount += 4; 18857: return XEiJ.regRn[15]; 18858: } else { 18859: XEiJ.mpuCycleCount += 4; 18860: return XEiJ.regRn[ea - (0b010_000 - 8)]; 18861: } 18862: case 0b101_000: //(d16,A0) 18863: case 0b101_001: //(d16,A1) 18864: case 0b101_010: //(d16,A2) 18865: case 0b101_011: //(d16,A3) 18866: case 0b101_100: //(d16,A4) 18867: case 0b101_101: //(d16,A5) 18868: case 0b101_110: //(d16,A6) 18869: case 0b101_111: //(d16,A7) 18870: XEiJ.mpuCycleCount += 8; 18871: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18872: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18873: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 18874: } else { 18875: t = XEiJ.regPC; 18876: XEiJ.regPC = t + 2; 18877: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 18878: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18879: } 18880: case 0b110_000: //(d8,A0,Rn.wl) 18881: case 0b110_001: //(d8,A1,Rn.wl) 18882: case 0b110_010: //(d8,A2,Rn.wl) 18883: case 0b110_011: //(d8,A3,Rn.wl) 18884: case 0b110_100: //(d8,A4,Rn.wl) 18885: case 0b110_101: //(d8,A5,Rn.wl) 18886: case 0b110_110: //(d8,A6,Rn.wl) 18887: case 0b110_111: //(d8,A7,Rn.wl) 18888: XEiJ.mpuCycleCount += 10; 18889: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 18890: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 18891: } else { 18892: w = XEiJ.regPC; 18893: XEiJ.regPC = w + 2; 18894: w = XEiJ.busRwze (w); //pcwz。拡張ワード 18895: } 18896: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18897: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18898: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 18899: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18900: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18901: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18902: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18903: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18904: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18905: XEiJ.regRn[w >> 12]) //ロングインデックス 18906: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18907: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18908: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18909: XEiJ.busRls (t) + x) //ポストインデックス 18910: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18911: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18912: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18913: case 0b111_000: //(xxx).W 18914: XEiJ.mpuCycleCount += 8; 18915: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 18916: case 0b111_001: //(xxx).L 18917: XEiJ.mpuCycleCount += 12; 18918: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 18919: case 0b111_010: //(d16,PC) 18920: XEiJ.mpuCycleCount += 8; 18921: t = XEiJ.regPC; 18922: XEiJ.regPC = t + 2; 18923: return (t //ベースレジスタ 18924: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 18925: case 0b111_011: //(d8,PC,Rn.wl) 18926: XEiJ.mpuCycleCount += 10; 18927: t = XEiJ.regPC; 18928: XEiJ.regPC = t + 2; 18929: w = XEiJ.busRwze (t); //pcwz。拡張ワード 18930: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 18931: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 18932: t) //ベースレジスタ 18933: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 18934: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 18935: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 18936: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 18937: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 18938: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 18939: XEiJ.regRn[w >> 12]) //ロングインデックス 18940: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 18941: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 18942: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 18943: XEiJ.busRls (t) + x) //ポストインデックス 18944: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 18945: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 18946: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 18947: } //switch 18948: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 18949: throw M68kException.m6eSignal; 18950: } //efaCntByte 18951: 18952: //a = efaAnyWord (ea) //| M+-WXZPI| 18953: // 任意のモードのワードオペランドの実効アドレスを求める 18954: // efaAnyByteとの違いは(Ar)+と-(Ar)がArを2変化させることと、(A7)+と-(A7)と#<data>の特別な動作がないこと 18955: @SuppressWarnings ("fallthrough") public static int efaAnyWord (int ea) throws M68kException { 18956: int t, w, x; 18957: switch (ea) { 18958: case 0b010_000: //(A0) 18959: if (XEiJ.EFA_SEPARATE_AR) { 18960: XEiJ.mpuCycleCount += 4; 18961: return XEiJ.regRn[ 8]; 18962: } 18963: //fallthrough 18964: case 0b010_001: //(A1) 18965: if (XEiJ.EFA_SEPARATE_AR) { 18966: XEiJ.mpuCycleCount += 4; 18967: return XEiJ.regRn[ 9]; 18968: } 18969: //fallthrough 18970: case 0b010_010: //(A2) 18971: if (XEiJ.EFA_SEPARATE_AR) { 18972: XEiJ.mpuCycleCount += 4; 18973: return XEiJ.regRn[10]; 18974: } 18975: //fallthrough 18976: case 0b010_011: //(A3) 18977: if (XEiJ.EFA_SEPARATE_AR) { 18978: XEiJ.mpuCycleCount += 4; 18979: return XEiJ.regRn[11]; 18980: } 18981: //fallthrough 18982: case 0b010_100: //(A4) 18983: if (XEiJ.EFA_SEPARATE_AR) { 18984: XEiJ.mpuCycleCount += 4; 18985: return XEiJ.regRn[12]; 18986: } 18987: //fallthrough 18988: case 0b010_101: //(A5) 18989: if (XEiJ.EFA_SEPARATE_AR) { 18990: XEiJ.mpuCycleCount += 4; 18991: return XEiJ.regRn[13]; 18992: } 18993: //fallthrough 18994: case 0b010_110: //(A6) 18995: if (XEiJ.EFA_SEPARATE_AR) { 18996: XEiJ.mpuCycleCount += 4; 18997: return XEiJ.regRn[14]; 18998: } 18999: //fallthrough 19000: case 0b010_111: //(A7) 19001: if (XEiJ.EFA_SEPARATE_AR) { 19002: XEiJ.mpuCycleCount += 4; 19003: return XEiJ.regRn[15]; 19004: } else { 19005: XEiJ.mpuCycleCount += 4; 19006: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19007: } 19008: case 0b011_000: //(A0)+ 19009: if (XEiJ.EFA_SEPARATE_AR) { 19010: XEiJ.mpuCycleCount += 4; 19011: return (XEiJ.regRn[ 8] += 2) - 2; 19012: } 19013: //fallthrough 19014: case 0b011_001: //(A1)+ 19015: if (XEiJ.EFA_SEPARATE_AR) { 19016: XEiJ.mpuCycleCount += 4; 19017: return (XEiJ.regRn[ 9] += 2) - 2; 19018: } 19019: //fallthrough 19020: case 0b011_010: //(A2)+ 19021: if (XEiJ.EFA_SEPARATE_AR) { 19022: XEiJ.mpuCycleCount += 4; 19023: return (XEiJ.regRn[10] += 2) - 2; 19024: } 19025: //fallthrough 19026: case 0b011_011: //(A3)+ 19027: if (XEiJ.EFA_SEPARATE_AR) { 19028: XEiJ.mpuCycleCount += 4; 19029: return (XEiJ.regRn[11] += 2) - 2; 19030: } 19031: //fallthrough 19032: case 0b011_100: //(A4)+ 19033: if (XEiJ.EFA_SEPARATE_AR) { 19034: XEiJ.mpuCycleCount += 4; 19035: return (XEiJ.regRn[12] += 2) - 2; 19036: } 19037: //fallthrough 19038: case 0b011_101: //(A5)+ 19039: if (XEiJ.EFA_SEPARATE_AR) { 19040: XEiJ.mpuCycleCount += 4; 19041: return (XEiJ.regRn[13] += 2) - 2; 19042: } 19043: //fallthrough 19044: case 0b011_110: //(A6)+ 19045: if (XEiJ.EFA_SEPARATE_AR) { 19046: XEiJ.mpuCycleCount += 4; 19047: return (XEiJ.regRn[14] += 2) - 2; 19048: } 19049: //fallthrough 19050: case 0b011_111: //(A7)+ 19051: if (XEiJ.EFA_SEPARATE_AR) { 19052: XEiJ.mpuCycleCount += 4; 19053: return (XEiJ.regRn[15] += 2) - 2; 19054: } else { 19055: XEiJ.mpuCycleCount += 4; 19056: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2; 19057: } 19058: case 0b100_000: //-(A0) 19059: if (XEiJ.EFA_SEPARATE_AR) { 19060: XEiJ.mpuCycleCount += 6; 19061: return XEiJ.regRn[ 8] -= 2; 19062: } 19063: //fallthrough 19064: case 0b100_001: //-(A1) 19065: if (XEiJ.EFA_SEPARATE_AR) { 19066: XEiJ.mpuCycleCount += 6; 19067: return XEiJ.regRn[ 9] -= 2; 19068: } 19069: //fallthrough 19070: case 0b100_010: //-(A2) 19071: if (XEiJ.EFA_SEPARATE_AR) { 19072: XEiJ.mpuCycleCount += 6; 19073: return XEiJ.regRn[10] -= 2; 19074: } 19075: //fallthrough 19076: case 0b100_011: //-(A3) 19077: if (XEiJ.EFA_SEPARATE_AR) { 19078: XEiJ.mpuCycleCount += 6; 19079: return XEiJ.regRn[11] -= 2; 19080: } 19081: //fallthrough 19082: case 0b100_100: //-(A4) 19083: if (XEiJ.EFA_SEPARATE_AR) { 19084: XEiJ.mpuCycleCount += 6; 19085: return XEiJ.regRn[12] -= 2; 19086: } 19087: //fallthrough 19088: case 0b100_101: //-(A5) 19089: if (XEiJ.EFA_SEPARATE_AR) { 19090: XEiJ.mpuCycleCount += 6; 19091: return XEiJ.regRn[13] -= 2; 19092: } 19093: //fallthrough 19094: case 0b100_110: //-(A6) 19095: if (XEiJ.EFA_SEPARATE_AR) { 19096: XEiJ.mpuCycleCount += 6; 19097: return XEiJ.regRn[14] -= 2; 19098: } 19099: //fallthrough 19100: case 0b100_111: //-(A7) 19101: if (XEiJ.EFA_SEPARATE_AR) { 19102: XEiJ.mpuCycleCount += 6; 19103: return XEiJ.regRn[15] -= 2; 19104: } else { 19105: XEiJ.mpuCycleCount += 6; 19106: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2; 19107: } 19108: case 0b101_000: //(d16,A0) 19109: case 0b101_001: //(d16,A1) 19110: case 0b101_010: //(d16,A2) 19111: case 0b101_011: //(d16,A3) 19112: case 0b101_100: //(d16,A4) 19113: case 0b101_101: //(d16,A5) 19114: case 0b101_110: //(d16,A6) 19115: case 0b101_111: //(d16,A7) 19116: XEiJ.mpuCycleCount += 8; 19117: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19118: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19119: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19120: } else { 19121: t = XEiJ.regPC; 19122: XEiJ.regPC = t + 2; 19123: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19124: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19125: } 19126: case 0b110_000: //(d8,A0,Rn.wl) 19127: case 0b110_001: //(d8,A1,Rn.wl) 19128: case 0b110_010: //(d8,A2,Rn.wl) 19129: case 0b110_011: //(d8,A3,Rn.wl) 19130: case 0b110_100: //(d8,A4,Rn.wl) 19131: case 0b110_101: //(d8,A5,Rn.wl) 19132: case 0b110_110: //(d8,A6,Rn.wl) 19133: case 0b110_111: //(d8,A7,Rn.wl) 19134: XEiJ.mpuCycleCount += 10; 19135: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19136: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19137: } else { 19138: w = XEiJ.regPC; 19139: XEiJ.regPC = w + 2; 19140: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19141: } 19142: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19143: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19144: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19145: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19146: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19147: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19148: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19149: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19150: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19151: XEiJ.regRn[w >> 12]) //ロングインデックス 19152: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19153: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19154: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19155: XEiJ.busRls (t) + x) //ポストインデックス 19156: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19157: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19158: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19159: case 0b111_000: //(xxx).W 19160: XEiJ.mpuCycleCount += 8; 19161: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19162: case 0b111_001: //(xxx).L 19163: XEiJ.mpuCycleCount += 12; 19164: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19165: case 0b111_010: //(d16,PC) 19166: XEiJ.mpuCycleCount += 8; 19167: t = XEiJ.regPC; 19168: XEiJ.regPC = t + 2; 19169: return (t //ベースレジスタ 19170: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19171: case 0b111_011: //(d8,PC,Rn.wl) 19172: XEiJ.mpuCycleCount += 10; 19173: t = XEiJ.regPC; 19174: XEiJ.regPC = t + 2; 19175: w = XEiJ.busRwze (t); //pcwz。拡張ワード 19176: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19177: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19178: t) //ベースレジスタ 19179: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19180: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19181: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19182: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19183: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19184: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19185: XEiJ.regRn[w >> 12]) //ロングインデックス 19186: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19187: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19188: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19189: XEiJ.busRls (t) + x) //ポストインデックス 19190: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19191: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19192: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19193: case 0b111_100: //#<data> 19194: XEiJ.mpuCycleCount += 4; 19195: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19196: return (XEiJ.regPC += 2) - 2; 19197: } else { 19198: t = XEiJ.regPC; 19199: XEiJ.regPC = t + 2; 19200: return t; 19201: } 19202: } //switch 19203: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19204: throw M68kException.m6eSignal; 19205: } //efaAnyWord 19206: 19207: //a = efaMemWord (ea) //| M+-WXZP | 19208: // メモリモードのワードオペランドの実効アドレスを求める 19209: // efaAnyWordとの違いは#<data>がないこと 19210: @SuppressWarnings ("fallthrough") public static int efaMemWord (int ea) throws M68kException { 19211: int t, w, x; 19212: switch (ea) { 19213: case 0b010_000: //(A0) 19214: if (XEiJ.EFA_SEPARATE_AR) { 19215: XEiJ.mpuCycleCount += 4; 19216: return XEiJ.regRn[ 8]; 19217: } 19218: //fallthrough 19219: case 0b010_001: //(A1) 19220: if (XEiJ.EFA_SEPARATE_AR) { 19221: XEiJ.mpuCycleCount += 4; 19222: return XEiJ.regRn[ 9]; 19223: } 19224: //fallthrough 19225: case 0b010_010: //(A2) 19226: if (XEiJ.EFA_SEPARATE_AR) { 19227: XEiJ.mpuCycleCount += 4; 19228: return XEiJ.regRn[10]; 19229: } 19230: //fallthrough 19231: case 0b010_011: //(A3) 19232: if (XEiJ.EFA_SEPARATE_AR) { 19233: XEiJ.mpuCycleCount += 4; 19234: return XEiJ.regRn[11]; 19235: } 19236: //fallthrough 19237: case 0b010_100: //(A4) 19238: if (XEiJ.EFA_SEPARATE_AR) { 19239: XEiJ.mpuCycleCount += 4; 19240: return XEiJ.regRn[12]; 19241: } 19242: //fallthrough 19243: case 0b010_101: //(A5) 19244: if (XEiJ.EFA_SEPARATE_AR) { 19245: XEiJ.mpuCycleCount += 4; 19246: return XEiJ.regRn[13]; 19247: } 19248: //fallthrough 19249: case 0b010_110: //(A6) 19250: if (XEiJ.EFA_SEPARATE_AR) { 19251: XEiJ.mpuCycleCount += 4; 19252: return XEiJ.regRn[14]; 19253: } 19254: //fallthrough 19255: case 0b010_111: //(A7) 19256: if (XEiJ.EFA_SEPARATE_AR) { 19257: XEiJ.mpuCycleCount += 4; 19258: return XEiJ.regRn[15]; 19259: } else { 19260: XEiJ.mpuCycleCount += 4; 19261: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19262: } 19263: case 0b011_000: //(A0)+ 19264: if (XEiJ.EFA_SEPARATE_AR) { 19265: XEiJ.mpuCycleCount += 4; 19266: return (XEiJ.regRn[ 8] += 2) - 2; 19267: } 19268: //fallthrough 19269: case 0b011_001: //(A1)+ 19270: if (XEiJ.EFA_SEPARATE_AR) { 19271: XEiJ.mpuCycleCount += 4; 19272: return (XEiJ.regRn[ 9] += 2) - 2; 19273: } 19274: //fallthrough 19275: case 0b011_010: //(A2)+ 19276: if (XEiJ.EFA_SEPARATE_AR) { 19277: XEiJ.mpuCycleCount += 4; 19278: return (XEiJ.regRn[10] += 2) - 2; 19279: } 19280: //fallthrough 19281: case 0b011_011: //(A3)+ 19282: if (XEiJ.EFA_SEPARATE_AR) { 19283: XEiJ.mpuCycleCount += 4; 19284: return (XEiJ.regRn[11] += 2) - 2; 19285: } 19286: //fallthrough 19287: case 0b011_100: //(A4)+ 19288: if (XEiJ.EFA_SEPARATE_AR) { 19289: XEiJ.mpuCycleCount += 4; 19290: return (XEiJ.regRn[12] += 2) - 2; 19291: } 19292: //fallthrough 19293: case 0b011_101: //(A5)+ 19294: if (XEiJ.EFA_SEPARATE_AR) { 19295: XEiJ.mpuCycleCount += 4; 19296: return (XEiJ.regRn[13] += 2) - 2; 19297: } 19298: //fallthrough 19299: case 0b011_110: //(A6)+ 19300: if (XEiJ.EFA_SEPARATE_AR) { 19301: XEiJ.mpuCycleCount += 4; 19302: return (XEiJ.regRn[14] += 2) - 2; 19303: } 19304: //fallthrough 19305: case 0b011_111: //(A7)+ 19306: if (XEiJ.EFA_SEPARATE_AR) { 19307: XEiJ.mpuCycleCount += 4; 19308: return (XEiJ.regRn[15] += 2) - 2; 19309: } else { 19310: XEiJ.mpuCycleCount += 4; 19311: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2; 19312: } 19313: case 0b100_000: //-(A0) 19314: if (XEiJ.EFA_SEPARATE_AR) { 19315: XEiJ.mpuCycleCount += 6; 19316: return XEiJ.regRn[ 8] -= 2; 19317: } 19318: //fallthrough 19319: case 0b100_001: //-(A1) 19320: if (XEiJ.EFA_SEPARATE_AR) { 19321: XEiJ.mpuCycleCount += 6; 19322: return XEiJ.regRn[ 9] -= 2; 19323: } 19324: //fallthrough 19325: case 0b100_010: //-(A2) 19326: if (XEiJ.EFA_SEPARATE_AR) { 19327: XEiJ.mpuCycleCount += 6; 19328: return XEiJ.regRn[10] -= 2; 19329: } 19330: //fallthrough 19331: case 0b100_011: //-(A3) 19332: if (XEiJ.EFA_SEPARATE_AR) { 19333: XEiJ.mpuCycleCount += 6; 19334: return XEiJ.regRn[11] -= 2; 19335: } 19336: //fallthrough 19337: case 0b100_100: //-(A4) 19338: if (XEiJ.EFA_SEPARATE_AR) { 19339: XEiJ.mpuCycleCount += 6; 19340: return XEiJ.regRn[12] -= 2; 19341: } 19342: //fallthrough 19343: case 0b100_101: //-(A5) 19344: if (XEiJ.EFA_SEPARATE_AR) { 19345: XEiJ.mpuCycleCount += 6; 19346: return XEiJ.regRn[13] -= 2; 19347: } 19348: //fallthrough 19349: case 0b100_110: //-(A6) 19350: if (XEiJ.EFA_SEPARATE_AR) { 19351: XEiJ.mpuCycleCount += 6; 19352: return XEiJ.regRn[14] -= 2; 19353: } 19354: //fallthrough 19355: case 0b100_111: //-(A7) 19356: if (XEiJ.EFA_SEPARATE_AR) { 19357: XEiJ.mpuCycleCount += 6; 19358: return XEiJ.regRn[15] -= 2; 19359: } else { 19360: XEiJ.mpuCycleCount += 6; 19361: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2; 19362: } 19363: case 0b101_000: //(d16,A0) 19364: case 0b101_001: //(d16,A1) 19365: case 0b101_010: //(d16,A2) 19366: case 0b101_011: //(d16,A3) 19367: case 0b101_100: //(d16,A4) 19368: case 0b101_101: //(d16,A5) 19369: case 0b101_110: //(d16,A6) 19370: case 0b101_111: //(d16,A7) 19371: XEiJ.mpuCycleCount += 8; 19372: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19373: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19374: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19375: } else { 19376: t = XEiJ.regPC; 19377: XEiJ.regPC = t + 2; 19378: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19379: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19380: } 19381: case 0b110_000: //(d8,A0,Rn.wl) 19382: case 0b110_001: //(d8,A1,Rn.wl) 19383: case 0b110_010: //(d8,A2,Rn.wl) 19384: case 0b110_011: //(d8,A3,Rn.wl) 19385: case 0b110_100: //(d8,A4,Rn.wl) 19386: case 0b110_101: //(d8,A5,Rn.wl) 19387: case 0b110_110: //(d8,A6,Rn.wl) 19388: case 0b110_111: //(d8,A7,Rn.wl) 19389: XEiJ.mpuCycleCount += 10; 19390: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19391: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19392: } else { 19393: w = XEiJ.regPC; 19394: XEiJ.regPC = w + 2; 19395: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19396: } 19397: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19398: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19399: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19400: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19401: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19402: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19403: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19404: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19405: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19406: XEiJ.regRn[w >> 12]) //ロングインデックス 19407: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19408: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19409: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19410: XEiJ.busRls (t) + x) //ポストインデックス 19411: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19412: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19413: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19414: case 0b111_000: //(xxx).W 19415: XEiJ.mpuCycleCount += 8; 19416: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19417: case 0b111_001: //(xxx).L 19418: XEiJ.mpuCycleCount += 12; 19419: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19420: case 0b111_010: //(d16,PC) 19421: XEiJ.mpuCycleCount += 8; 19422: t = XEiJ.regPC; 19423: XEiJ.regPC = t + 2; 19424: return (t //ベースレジスタ 19425: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19426: case 0b111_011: //(d8,PC,Rn.wl) 19427: XEiJ.mpuCycleCount += 10; 19428: t = XEiJ.regPC; 19429: XEiJ.regPC = t + 2; 19430: w = XEiJ.busRwze (t); //pcwz。拡張ワード 19431: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19432: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19433: t) //ベースレジスタ 19434: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19435: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19436: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19437: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19438: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19439: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19440: XEiJ.regRn[w >> 12]) //ロングインデックス 19441: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19442: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19443: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19444: XEiJ.busRls (t) + x) //ポストインデックス 19445: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19446: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19447: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19448: } //switch 19449: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19450: throw M68kException.m6eSignal; 19451: } //efaMemWord 19452: 19453: //a = efaMltWord (ea) //| M+-WXZ | 19454: // メモリ可変モードのワードオペランドの実効アドレスを求める 19455: // efaMemWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 19456: @SuppressWarnings ("fallthrough") public static int efaMltWord (int ea) throws M68kException { 19457: int t, w, x; 19458: switch (ea) { 19459: case 0b010_000: //(A0) 19460: if (XEiJ.EFA_SEPARATE_AR) { 19461: XEiJ.mpuCycleCount += 4; 19462: return XEiJ.regRn[ 8]; 19463: } 19464: //fallthrough 19465: case 0b010_001: //(A1) 19466: if (XEiJ.EFA_SEPARATE_AR) { 19467: XEiJ.mpuCycleCount += 4; 19468: return XEiJ.regRn[ 9]; 19469: } 19470: //fallthrough 19471: case 0b010_010: //(A2) 19472: if (XEiJ.EFA_SEPARATE_AR) { 19473: XEiJ.mpuCycleCount += 4; 19474: return XEiJ.regRn[10]; 19475: } 19476: //fallthrough 19477: case 0b010_011: //(A3) 19478: if (XEiJ.EFA_SEPARATE_AR) { 19479: XEiJ.mpuCycleCount += 4; 19480: return XEiJ.regRn[11]; 19481: } 19482: //fallthrough 19483: case 0b010_100: //(A4) 19484: if (XEiJ.EFA_SEPARATE_AR) { 19485: XEiJ.mpuCycleCount += 4; 19486: return XEiJ.regRn[12]; 19487: } 19488: //fallthrough 19489: case 0b010_101: //(A5) 19490: if (XEiJ.EFA_SEPARATE_AR) { 19491: XEiJ.mpuCycleCount += 4; 19492: return XEiJ.regRn[13]; 19493: } 19494: //fallthrough 19495: case 0b010_110: //(A6) 19496: if (XEiJ.EFA_SEPARATE_AR) { 19497: XEiJ.mpuCycleCount += 4; 19498: return XEiJ.regRn[14]; 19499: } 19500: //fallthrough 19501: case 0b010_111: //(A7) 19502: if (XEiJ.EFA_SEPARATE_AR) { 19503: XEiJ.mpuCycleCount += 4; 19504: return XEiJ.regRn[15]; 19505: } else { 19506: XEiJ.mpuCycleCount += 4; 19507: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19508: } 19509: case 0b011_000: //(A0)+ 19510: if (XEiJ.EFA_SEPARATE_AR) { 19511: XEiJ.mpuCycleCount += 4; 19512: return (XEiJ.regRn[ 8] += 2) - 2; 19513: } 19514: //fallthrough 19515: case 0b011_001: //(A1)+ 19516: if (XEiJ.EFA_SEPARATE_AR) { 19517: XEiJ.mpuCycleCount += 4; 19518: return (XEiJ.regRn[ 9] += 2) - 2; 19519: } 19520: //fallthrough 19521: case 0b011_010: //(A2)+ 19522: if (XEiJ.EFA_SEPARATE_AR) { 19523: XEiJ.mpuCycleCount += 4; 19524: return (XEiJ.regRn[10] += 2) - 2; 19525: } 19526: //fallthrough 19527: case 0b011_011: //(A3)+ 19528: if (XEiJ.EFA_SEPARATE_AR) { 19529: XEiJ.mpuCycleCount += 4; 19530: return (XEiJ.regRn[11] += 2) - 2; 19531: } 19532: //fallthrough 19533: case 0b011_100: //(A4)+ 19534: if (XEiJ.EFA_SEPARATE_AR) { 19535: XEiJ.mpuCycleCount += 4; 19536: return (XEiJ.regRn[12] += 2) - 2; 19537: } 19538: //fallthrough 19539: case 0b011_101: //(A5)+ 19540: if (XEiJ.EFA_SEPARATE_AR) { 19541: XEiJ.mpuCycleCount += 4; 19542: return (XEiJ.regRn[13] += 2) - 2; 19543: } 19544: //fallthrough 19545: case 0b011_110: //(A6)+ 19546: if (XEiJ.EFA_SEPARATE_AR) { 19547: XEiJ.mpuCycleCount += 4; 19548: return (XEiJ.regRn[14] += 2) - 2; 19549: } 19550: //fallthrough 19551: case 0b011_111: //(A7)+ 19552: if (XEiJ.EFA_SEPARATE_AR) { 19553: XEiJ.mpuCycleCount += 4; 19554: return (XEiJ.regRn[15] += 2) - 2; 19555: } else { 19556: XEiJ.mpuCycleCount += 4; 19557: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 2) - 2; 19558: } 19559: case 0b100_000: //-(A0) 19560: if (XEiJ.EFA_SEPARATE_AR) { 19561: XEiJ.mpuCycleCount += 6; 19562: return XEiJ.regRn[ 8] -= 2; 19563: } 19564: //fallthrough 19565: case 0b100_001: //-(A1) 19566: if (XEiJ.EFA_SEPARATE_AR) { 19567: XEiJ.mpuCycleCount += 6; 19568: return XEiJ.regRn[ 9] -= 2; 19569: } 19570: //fallthrough 19571: case 0b100_010: //-(A2) 19572: if (XEiJ.EFA_SEPARATE_AR) { 19573: XEiJ.mpuCycleCount += 6; 19574: return XEiJ.regRn[10] -= 2; 19575: } 19576: //fallthrough 19577: case 0b100_011: //-(A3) 19578: if (XEiJ.EFA_SEPARATE_AR) { 19579: XEiJ.mpuCycleCount += 6; 19580: return XEiJ.regRn[11] -= 2; 19581: } 19582: //fallthrough 19583: case 0b100_100: //-(A4) 19584: if (XEiJ.EFA_SEPARATE_AR) { 19585: XEiJ.mpuCycleCount += 6; 19586: return XEiJ.regRn[12] -= 2; 19587: } 19588: //fallthrough 19589: case 0b100_101: //-(A5) 19590: if (XEiJ.EFA_SEPARATE_AR) { 19591: XEiJ.mpuCycleCount += 6; 19592: return XEiJ.regRn[13] -= 2; 19593: } 19594: //fallthrough 19595: case 0b100_110: //-(A6) 19596: if (XEiJ.EFA_SEPARATE_AR) { 19597: XEiJ.mpuCycleCount += 6; 19598: return XEiJ.regRn[14] -= 2; 19599: } 19600: //fallthrough 19601: case 0b100_111: //-(A7) 19602: if (XEiJ.EFA_SEPARATE_AR) { 19603: XEiJ.mpuCycleCount += 6; 19604: return XEiJ.regRn[15] -= 2; 19605: } else { 19606: XEiJ.mpuCycleCount += 6; 19607: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 2; 19608: } 19609: case 0b101_000: //(d16,A0) 19610: case 0b101_001: //(d16,A1) 19611: case 0b101_010: //(d16,A2) 19612: case 0b101_011: //(d16,A3) 19613: case 0b101_100: //(d16,A4) 19614: case 0b101_101: //(d16,A5) 19615: case 0b101_110: //(d16,A6) 19616: case 0b101_111: //(d16,A7) 19617: XEiJ.mpuCycleCount += 8; 19618: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19619: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19620: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19621: } else { 19622: t = XEiJ.regPC; 19623: XEiJ.regPC = t + 2; 19624: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19625: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19626: } 19627: case 0b110_000: //(d8,A0,Rn.wl) 19628: case 0b110_001: //(d8,A1,Rn.wl) 19629: case 0b110_010: //(d8,A2,Rn.wl) 19630: case 0b110_011: //(d8,A3,Rn.wl) 19631: case 0b110_100: //(d8,A4,Rn.wl) 19632: case 0b110_101: //(d8,A5,Rn.wl) 19633: case 0b110_110: //(d8,A6,Rn.wl) 19634: case 0b110_111: //(d8,A7,Rn.wl) 19635: XEiJ.mpuCycleCount += 10; 19636: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19637: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19638: } else { 19639: w = XEiJ.regPC; 19640: XEiJ.regPC = w + 2; 19641: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19642: } 19643: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19644: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19645: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19646: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19647: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19648: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19649: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19650: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19651: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19652: XEiJ.regRn[w >> 12]) //ロングインデックス 19653: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19654: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19655: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19656: XEiJ.busRls (t) + x) //ポストインデックス 19657: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19658: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19659: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19660: case 0b111_000: //(xxx).W 19661: XEiJ.mpuCycleCount += 8; 19662: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19663: case 0b111_001: //(xxx).L 19664: XEiJ.mpuCycleCount += 12; 19665: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19666: } //switch 19667: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19668: throw M68kException.m6eSignal; 19669: } //efaMltWord 19670: 19671: //a = efaCntWord (ea) //| M WXZP | 19672: // 制御モードのワードオペランドの実効アドレスを求める 19673: // efaMemWordとの違いは(Ar)+と-(Ar)がないこと 19674: @SuppressWarnings ("fallthrough") public static int efaCntWord (int ea) throws M68kException { 19675: int t, w, x; 19676: switch (ea) { 19677: case 0b010_000: //(A0) 19678: if (XEiJ.EFA_SEPARATE_AR) { 19679: XEiJ.mpuCycleCount += 4; 19680: return XEiJ.regRn[ 8]; 19681: } 19682: //fallthrough 19683: case 0b010_001: //(A1) 19684: if (XEiJ.EFA_SEPARATE_AR) { 19685: XEiJ.mpuCycleCount += 4; 19686: return XEiJ.regRn[ 9]; 19687: } 19688: //fallthrough 19689: case 0b010_010: //(A2) 19690: if (XEiJ.EFA_SEPARATE_AR) { 19691: XEiJ.mpuCycleCount += 4; 19692: return XEiJ.regRn[10]; 19693: } 19694: //fallthrough 19695: case 0b010_011: //(A3) 19696: if (XEiJ.EFA_SEPARATE_AR) { 19697: XEiJ.mpuCycleCount += 4; 19698: return XEiJ.regRn[11]; 19699: } 19700: //fallthrough 19701: case 0b010_100: //(A4) 19702: if (XEiJ.EFA_SEPARATE_AR) { 19703: XEiJ.mpuCycleCount += 4; 19704: return XEiJ.regRn[12]; 19705: } 19706: //fallthrough 19707: case 0b010_101: //(A5) 19708: if (XEiJ.EFA_SEPARATE_AR) { 19709: XEiJ.mpuCycleCount += 4; 19710: return XEiJ.regRn[13]; 19711: } 19712: //fallthrough 19713: case 0b010_110: //(A6) 19714: if (XEiJ.EFA_SEPARATE_AR) { 19715: XEiJ.mpuCycleCount += 4; 19716: return XEiJ.regRn[14]; 19717: } 19718: //fallthrough 19719: case 0b010_111: //(A7) 19720: if (XEiJ.EFA_SEPARATE_AR) { 19721: XEiJ.mpuCycleCount += 4; 19722: return XEiJ.regRn[15]; 19723: } else { 19724: XEiJ.mpuCycleCount += 4; 19725: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19726: } 19727: case 0b101_000: //(d16,A0) 19728: case 0b101_001: //(d16,A1) 19729: case 0b101_010: //(d16,A2) 19730: case 0b101_011: //(d16,A3) 19731: case 0b101_100: //(d16,A4) 19732: case 0b101_101: //(d16,A5) 19733: case 0b101_110: //(d16,A6) 19734: case 0b101_111: //(d16,A7) 19735: XEiJ.mpuCycleCount += 8; 19736: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19737: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19738: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19739: } else { 19740: t = XEiJ.regPC; 19741: XEiJ.regPC = t + 2; 19742: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19743: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19744: } 19745: case 0b110_000: //(d8,A0,Rn.wl) 19746: case 0b110_001: //(d8,A1,Rn.wl) 19747: case 0b110_010: //(d8,A2,Rn.wl) 19748: case 0b110_011: //(d8,A3,Rn.wl) 19749: case 0b110_100: //(d8,A4,Rn.wl) 19750: case 0b110_101: //(d8,A5,Rn.wl) 19751: case 0b110_110: //(d8,A6,Rn.wl) 19752: case 0b110_111: //(d8,A7,Rn.wl) 19753: XEiJ.mpuCycleCount += 10; 19754: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19755: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19756: } else { 19757: w = XEiJ.regPC; 19758: XEiJ.regPC = w + 2; 19759: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19760: } 19761: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19762: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19763: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19764: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19765: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19766: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19767: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19768: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19769: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19770: XEiJ.regRn[w >> 12]) //ロングインデックス 19771: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19772: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19773: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19774: XEiJ.busRls (t) + x) //ポストインデックス 19775: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19776: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19777: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19778: case 0b111_000: //(xxx).W 19779: XEiJ.mpuCycleCount += 8; 19780: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19781: case 0b111_001: //(xxx).L 19782: XEiJ.mpuCycleCount += 12; 19783: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19784: case 0b111_010: //(d16,PC) 19785: XEiJ.mpuCycleCount += 8; 19786: t = XEiJ.regPC; 19787: XEiJ.regPC = t + 2; 19788: return (t //ベースレジスタ 19789: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19790: case 0b111_011: //(d8,PC,Rn.wl) 19791: XEiJ.mpuCycleCount += 10; 19792: t = XEiJ.regPC; 19793: XEiJ.regPC = t + 2; 19794: w = XEiJ.busRwze (t); //pcwz。拡張ワード 19795: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19796: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19797: t) //ベースレジスタ 19798: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19799: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19800: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19801: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19802: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19803: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19804: XEiJ.regRn[w >> 12]) //ロングインデックス 19805: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19806: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19807: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19808: XEiJ.busRls (t) + x) //ポストインデックス 19809: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19810: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19811: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19812: } //switch 19813: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19814: throw M68kException.m6eSignal; 19815: } //efaCntWord 19816: 19817: //a = efaCltWord (ea) //| M WXZ | 19818: // 制御可変モードのワードオペランドの実効アドレスを求める 19819: // efaCntWordとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 19820: @SuppressWarnings ("fallthrough") public static int efaCltWord (int ea) throws M68kException { 19821: int t, w, x; 19822: switch (ea) { 19823: case 0b010_000: //(A0) 19824: if (XEiJ.EFA_SEPARATE_AR) { 19825: XEiJ.mpuCycleCount += 4; 19826: return XEiJ.regRn[ 8]; 19827: } 19828: //fallthrough 19829: case 0b010_001: //(A1) 19830: if (XEiJ.EFA_SEPARATE_AR) { 19831: XEiJ.mpuCycleCount += 4; 19832: return XEiJ.regRn[ 9]; 19833: } 19834: //fallthrough 19835: case 0b010_010: //(A2) 19836: if (XEiJ.EFA_SEPARATE_AR) { 19837: XEiJ.mpuCycleCount += 4; 19838: return XEiJ.regRn[10]; 19839: } 19840: //fallthrough 19841: case 0b010_011: //(A3) 19842: if (XEiJ.EFA_SEPARATE_AR) { 19843: XEiJ.mpuCycleCount += 4; 19844: return XEiJ.regRn[11]; 19845: } 19846: //fallthrough 19847: case 0b010_100: //(A4) 19848: if (XEiJ.EFA_SEPARATE_AR) { 19849: XEiJ.mpuCycleCount += 4; 19850: return XEiJ.regRn[12]; 19851: } 19852: //fallthrough 19853: case 0b010_101: //(A5) 19854: if (XEiJ.EFA_SEPARATE_AR) { 19855: XEiJ.mpuCycleCount += 4; 19856: return XEiJ.regRn[13]; 19857: } 19858: //fallthrough 19859: case 0b010_110: //(A6) 19860: if (XEiJ.EFA_SEPARATE_AR) { 19861: XEiJ.mpuCycleCount += 4; 19862: return XEiJ.regRn[14]; 19863: } 19864: //fallthrough 19865: case 0b010_111: //(A7) 19866: if (XEiJ.EFA_SEPARATE_AR) { 19867: XEiJ.mpuCycleCount += 4; 19868: return XEiJ.regRn[15]; 19869: } else { 19870: XEiJ.mpuCycleCount += 4; 19871: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19872: } 19873: case 0b101_000: //(d16,A0) 19874: case 0b101_001: //(d16,A1) 19875: case 0b101_010: //(d16,A2) 19876: case 0b101_011: //(d16,A3) 19877: case 0b101_100: //(d16,A4) 19878: case 0b101_101: //(d16,A5) 19879: case 0b101_110: //(d16,A6) 19880: case 0b101_111: //(d16,A7) 19881: XEiJ.mpuCycleCount += 8; 19882: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19883: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19884: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 19885: } else { 19886: t = XEiJ.regPC; 19887: XEiJ.regPC = t + 2; 19888: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 19889: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 19890: } 19891: case 0b110_000: //(d8,A0,Rn.wl) 19892: case 0b110_001: //(d8,A1,Rn.wl) 19893: case 0b110_010: //(d8,A2,Rn.wl) 19894: case 0b110_011: //(d8,A3,Rn.wl) 19895: case 0b110_100: //(d8,A4,Rn.wl) 19896: case 0b110_101: //(d8,A5,Rn.wl) 19897: case 0b110_110: //(d8,A6,Rn.wl) 19898: case 0b110_111: //(d8,A7,Rn.wl) 19899: XEiJ.mpuCycleCount += 10; 19900: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 19901: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 19902: } else { 19903: w = XEiJ.regPC; 19904: XEiJ.regPC = w + 2; 19905: w = XEiJ.busRwze (w); //pcwz。拡張ワード 19906: } 19907: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 19908: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 19909: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 19910: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 19911: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 19912: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 19913: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 19914: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 19915: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 19916: XEiJ.regRn[w >> 12]) //ロングインデックス 19917: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 19918: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 19919: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 19920: XEiJ.busRls (t) + x) //ポストインデックス 19921: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 19922: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 19923: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 19924: case 0b111_000: //(xxx).W 19925: XEiJ.mpuCycleCount += 8; 19926: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 19927: case 0b111_001: //(xxx).L 19928: XEiJ.mpuCycleCount += 12; 19929: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 19930: } //switch 19931: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 19932: throw M68kException.m6eSignal; 19933: } //efaCltWord 19934: 19935: //a = efaAnyLong (ea) //| M+-WXZPI| 19936: // 任意のモードのロングオペランドの実効アドレスを求める 19937: // efaAnyWordとの違いは(Ar)+と-(Ar)がArを4変化させることと、#<data>がPCを4変化させることと、 19938: // オペランドのアクセスが1ワード増える分の4サイクルが追加されていること 19939: @SuppressWarnings ("fallthrough") public static int efaAnyLong (int ea) throws M68kException { 19940: int t, w, x; 19941: switch (ea) { 19942: case 0b010_000: //(A0) 19943: if (XEiJ.EFA_SEPARATE_AR) { 19944: XEiJ.mpuCycleCount += 8; 19945: return XEiJ.regRn[ 8]; 19946: } 19947: //fallthrough 19948: case 0b010_001: //(A1) 19949: if (XEiJ.EFA_SEPARATE_AR) { 19950: XEiJ.mpuCycleCount += 8; 19951: return XEiJ.regRn[ 9]; 19952: } 19953: //fallthrough 19954: case 0b010_010: //(A2) 19955: if (XEiJ.EFA_SEPARATE_AR) { 19956: XEiJ.mpuCycleCount += 8; 19957: return XEiJ.regRn[10]; 19958: } 19959: //fallthrough 19960: case 0b010_011: //(A3) 19961: if (XEiJ.EFA_SEPARATE_AR) { 19962: XEiJ.mpuCycleCount += 8; 19963: return XEiJ.regRn[11]; 19964: } 19965: //fallthrough 19966: case 0b010_100: //(A4) 19967: if (XEiJ.EFA_SEPARATE_AR) { 19968: XEiJ.mpuCycleCount += 8; 19969: return XEiJ.regRn[12]; 19970: } 19971: //fallthrough 19972: case 0b010_101: //(A5) 19973: if (XEiJ.EFA_SEPARATE_AR) { 19974: XEiJ.mpuCycleCount += 8; 19975: return XEiJ.regRn[13]; 19976: } 19977: //fallthrough 19978: case 0b010_110: //(A6) 19979: if (XEiJ.EFA_SEPARATE_AR) { 19980: XEiJ.mpuCycleCount += 8; 19981: return XEiJ.regRn[14]; 19982: } 19983: //fallthrough 19984: case 0b010_111: //(A7) 19985: if (XEiJ.EFA_SEPARATE_AR) { 19986: XEiJ.mpuCycleCount += 8; 19987: return XEiJ.regRn[15]; 19988: } else { 19989: XEiJ.mpuCycleCount += 8; 19990: return XEiJ.regRn[ea - (0b010_000 - 8)]; 19991: } 19992: case 0b011_000: //(A0)+ 19993: if (XEiJ.EFA_SEPARATE_AR) { 19994: XEiJ.mpuCycleCount += 8; 19995: return (XEiJ.regRn[ 8] += 4) - 4; 19996: } 19997: //fallthrough 19998: case 0b011_001: //(A1)+ 19999: if (XEiJ.EFA_SEPARATE_AR) { 20000: XEiJ.mpuCycleCount += 8; 20001: return (XEiJ.regRn[ 9] += 4) - 4; 20002: } 20003: //fallthrough 20004: case 0b011_010: //(A2)+ 20005: if (XEiJ.EFA_SEPARATE_AR) { 20006: XEiJ.mpuCycleCount += 8; 20007: return (XEiJ.regRn[10] += 4) - 4; 20008: } 20009: //fallthrough 20010: case 0b011_011: //(A3)+ 20011: if (XEiJ.EFA_SEPARATE_AR) { 20012: XEiJ.mpuCycleCount += 8; 20013: return (XEiJ.regRn[11] += 4) - 4; 20014: } 20015: //fallthrough 20016: case 0b011_100: //(A4)+ 20017: if (XEiJ.EFA_SEPARATE_AR) { 20018: XEiJ.mpuCycleCount += 8; 20019: return (XEiJ.regRn[12] += 4) - 4; 20020: } 20021: //fallthrough 20022: case 0b011_101: //(A5)+ 20023: if (XEiJ.EFA_SEPARATE_AR) { 20024: XEiJ.mpuCycleCount += 8; 20025: return (XEiJ.regRn[13] += 4) - 4; 20026: } 20027: //fallthrough 20028: case 0b011_110: //(A6)+ 20029: if (XEiJ.EFA_SEPARATE_AR) { 20030: XEiJ.mpuCycleCount += 8; 20031: return (XEiJ.regRn[14] += 4) - 4; 20032: } 20033: //fallthrough 20034: case 0b011_111: //(A7)+ 20035: if (XEiJ.EFA_SEPARATE_AR) { 20036: XEiJ.mpuCycleCount += 8; 20037: return (XEiJ.regRn[15] += 4) - 4; 20038: } else { 20039: XEiJ.mpuCycleCount += 8; 20040: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4; 20041: } 20042: case 0b100_000: //-(A0) 20043: if (XEiJ.EFA_SEPARATE_AR) { 20044: XEiJ.mpuCycleCount += 10; 20045: return XEiJ.regRn[ 8] -= 4; 20046: } 20047: //fallthrough 20048: case 0b100_001: //-(A1) 20049: if (XEiJ.EFA_SEPARATE_AR) { 20050: XEiJ.mpuCycleCount += 10; 20051: return XEiJ.regRn[ 9] -= 4; 20052: } 20053: //fallthrough 20054: case 0b100_010: //-(A2) 20055: if (XEiJ.EFA_SEPARATE_AR) { 20056: XEiJ.mpuCycleCount += 10; 20057: return XEiJ.regRn[10] -= 4; 20058: } 20059: //fallthrough 20060: case 0b100_011: //-(A3) 20061: if (XEiJ.EFA_SEPARATE_AR) { 20062: XEiJ.mpuCycleCount += 10; 20063: return XEiJ.regRn[11] -= 4; 20064: } 20065: //fallthrough 20066: case 0b100_100: //-(A4) 20067: if (XEiJ.EFA_SEPARATE_AR) { 20068: XEiJ.mpuCycleCount += 10; 20069: return XEiJ.regRn[12] -= 4; 20070: } 20071: //fallthrough 20072: case 0b100_101: //-(A5) 20073: if (XEiJ.EFA_SEPARATE_AR) { 20074: XEiJ.mpuCycleCount += 10; 20075: return XEiJ.regRn[13] -= 4; 20076: } 20077: //fallthrough 20078: case 0b100_110: //-(A6) 20079: if (XEiJ.EFA_SEPARATE_AR) { 20080: XEiJ.mpuCycleCount += 10; 20081: return XEiJ.regRn[14] -= 4; 20082: } 20083: //fallthrough 20084: case 0b100_111: //-(A7) 20085: if (XEiJ.EFA_SEPARATE_AR) { 20086: XEiJ.mpuCycleCount += 10; 20087: return XEiJ.regRn[15] -= 4; 20088: } else { 20089: XEiJ.mpuCycleCount += 10; 20090: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4; 20091: } 20092: case 0b101_000: //(d16,A0) 20093: case 0b101_001: //(d16,A1) 20094: case 0b101_010: //(d16,A2) 20095: case 0b101_011: //(d16,A3) 20096: case 0b101_100: //(d16,A4) 20097: case 0b101_101: //(d16,A5) 20098: case 0b101_110: //(d16,A6) 20099: case 0b101_111: //(d16,A7) 20100: XEiJ.mpuCycleCount += 12; 20101: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20102: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20103: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20104: } else { 20105: t = XEiJ.regPC; 20106: XEiJ.regPC = t + 2; 20107: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20108: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20109: } 20110: case 0b110_000: //(d8,A0,Rn.wl) 20111: case 0b110_001: //(d8,A1,Rn.wl) 20112: case 0b110_010: //(d8,A2,Rn.wl) 20113: case 0b110_011: //(d8,A3,Rn.wl) 20114: case 0b110_100: //(d8,A4,Rn.wl) 20115: case 0b110_101: //(d8,A5,Rn.wl) 20116: case 0b110_110: //(d8,A6,Rn.wl) 20117: case 0b110_111: //(d8,A7,Rn.wl) 20118: XEiJ.mpuCycleCount += 14; 20119: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20120: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20121: } else { 20122: w = XEiJ.regPC; 20123: XEiJ.regPC = w + 2; 20124: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20125: } 20126: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20127: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20128: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20129: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20130: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20131: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20132: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20133: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20134: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20135: XEiJ.regRn[w >> 12]) //ロングインデックス 20136: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20137: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20138: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20139: XEiJ.busRls (t) + x) //ポストインデックス 20140: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20141: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20142: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20143: case 0b111_000: //(xxx).W 20144: XEiJ.mpuCycleCount += 12; 20145: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20146: case 0b111_001: //(xxx).L 20147: XEiJ.mpuCycleCount += 16; 20148: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20149: case 0b111_010: //(d16,PC) 20150: XEiJ.mpuCycleCount += 12; 20151: t = XEiJ.regPC; 20152: XEiJ.regPC = t + 2; 20153: return (t //ベースレジスタ 20154: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20155: case 0b111_011: //(d8,PC,Rn.wl) 20156: XEiJ.mpuCycleCount += 14; 20157: t = XEiJ.regPC; 20158: XEiJ.regPC = t + 2; 20159: w = XEiJ.busRwze (t); //pcwz。拡張ワード 20160: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20161: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20162: t) //ベースレジスタ 20163: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20164: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20165: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20166: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20167: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20168: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20169: XEiJ.regRn[w >> 12]) //ロングインデックス 20170: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20171: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20172: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20173: XEiJ.busRls (t) + x) //ポストインデックス 20174: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20175: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20176: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20177: case 0b111_100: //#<data> 20178: XEiJ.mpuCycleCount += 8; 20179: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20180: return (XEiJ.regPC += 4) - 4; 20181: } else { 20182: t = XEiJ.regPC; 20183: XEiJ.regPC = t + 4; 20184: return t; 20185: } 20186: } //switch 20187: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20188: throw M68kException.m6eSignal; 20189: } //efaAnyLong 20190: 20191: //a = efaMemLong (ea) //| M+-WXZP | 20192: // メモリモードのロングオペランドの実効アドレスを求める 20193: // efaAnyLongとの違いは#<data>がないこと 20194: @SuppressWarnings ("fallthrough") public static int efaMemLong (int ea) throws M68kException { 20195: int t, w, x; 20196: switch (ea) { 20197: case 0b010_000: //(A0) 20198: if (XEiJ.EFA_SEPARATE_AR) { 20199: XEiJ.mpuCycleCount += 8; 20200: return XEiJ.regRn[ 8]; 20201: } 20202: //fallthrough 20203: case 0b010_001: //(A1) 20204: if (XEiJ.EFA_SEPARATE_AR) { 20205: XEiJ.mpuCycleCount += 8; 20206: return XEiJ.regRn[ 9]; 20207: } 20208: //fallthrough 20209: case 0b010_010: //(A2) 20210: if (XEiJ.EFA_SEPARATE_AR) { 20211: XEiJ.mpuCycleCount += 8; 20212: return XEiJ.regRn[10]; 20213: } 20214: //fallthrough 20215: case 0b010_011: //(A3) 20216: if (XEiJ.EFA_SEPARATE_AR) { 20217: XEiJ.mpuCycleCount += 8; 20218: return XEiJ.regRn[11]; 20219: } 20220: //fallthrough 20221: case 0b010_100: //(A4) 20222: if (XEiJ.EFA_SEPARATE_AR) { 20223: XEiJ.mpuCycleCount += 8; 20224: return XEiJ.regRn[12]; 20225: } 20226: //fallthrough 20227: case 0b010_101: //(A5) 20228: if (XEiJ.EFA_SEPARATE_AR) { 20229: XEiJ.mpuCycleCount += 8; 20230: return XEiJ.regRn[13]; 20231: } 20232: //fallthrough 20233: case 0b010_110: //(A6) 20234: if (XEiJ.EFA_SEPARATE_AR) { 20235: XEiJ.mpuCycleCount += 8; 20236: return XEiJ.regRn[14]; 20237: } 20238: //fallthrough 20239: case 0b010_111: //(A7) 20240: if (XEiJ.EFA_SEPARATE_AR) { 20241: XEiJ.mpuCycleCount += 8; 20242: return XEiJ.regRn[15]; 20243: } else { 20244: XEiJ.mpuCycleCount += 8; 20245: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20246: } 20247: case 0b011_000: //(A0)+ 20248: if (XEiJ.EFA_SEPARATE_AR) { 20249: XEiJ.mpuCycleCount += 8; 20250: return (XEiJ.regRn[ 8] += 4) - 4; 20251: } 20252: //fallthrough 20253: case 0b011_001: //(A1)+ 20254: if (XEiJ.EFA_SEPARATE_AR) { 20255: XEiJ.mpuCycleCount += 8; 20256: return (XEiJ.regRn[ 9] += 4) - 4; 20257: } 20258: //fallthrough 20259: case 0b011_010: //(A2)+ 20260: if (XEiJ.EFA_SEPARATE_AR) { 20261: XEiJ.mpuCycleCount += 8; 20262: return (XEiJ.regRn[10] += 4) - 4; 20263: } 20264: //fallthrough 20265: case 0b011_011: //(A3)+ 20266: if (XEiJ.EFA_SEPARATE_AR) { 20267: XEiJ.mpuCycleCount += 8; 20268: return (XEiJ.regRn[11] += 4) - 4; 20269: } 20270: //fallthrough 20271: case 0b011_100: //(A4)+ 20272: if (XEiJ.EFA_SEPARATE_AR) { 20273: XEiJ.mpuCycleCount += 8; 20274: return (XEiJ.regRn[12] += 4) - 4; 20275: } 20276: //fallthrough 20277: case 0b011_101: //(A5)+ 20278: if (XEiJ.EFA_SEPARATE_AR) { 20279: XEiJ.mpuCycleCount += 8; 20280: return (XEiJ.regRn[13] += 4) - 4; 20281: } 20282: //fallthrough 20283: case 0b011_110: //(A6)+ 20284: if (XEiJ.EFA_SEPARATE_AR) { 20285: XEiJ.mpuCycleCount += 8; 20286: return (XEiJ.regRn[14] += 4) - 4; 20287: } 20288: //fallthrough 20289: case 0b011_111: //(A7)+ 20290: if (XEiJ.EFA_SEPARATE_AR) { 20291: XEiJ.mpuCycleCount += 8; 20292: return (XEiJ.regRn[15] += 4) - 4; 20293: } else { 20294: XEiJ.mpuCycleCount += 8; 20295: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4; 20296: } 20297: case 0b100_000: //-(A0) 20298: if (XEiJ.EFA_SEPARATE_AR) { 20299: XEiJ.mpuCycleCount += 10; 20300: return XEiJ.regRn[ 8] -= 4; 20301: } 20302: //fallthrough 20303: case 0b100_001: //-(A1) 20304: if (XEiJ.EFA_SEPARATE_AR) { 20305: XEiJ.mpuCycleCount += 10; 20306: return XEiJ.regRn[ 9] -= 4; 20307: } 20308: //fallthrough 20309: case 0b100_010: //-(A2) 20310: if (XEiJ.EFA_SEPARATE_AR) { 20311: XEiJ.mpuCycleCount += 10; 20312: return XEiJ.regRn[10] -= 4; 20313: } 20314: //fallthrough 20315: case 0b100_011: //-(A3) 20316: if (XEiJ.EFA_SEPARATE_AR) { 20317: XEiJ.mpuCycleCount += 10; 20318: return XEiJ.regRn[11] -= 4; 20319: } 20320: //fallthrough 20321: case 0b100_100: //-(A4) 20322: if (XEiJ.EFA_SEPARATE_AR) { 20323: XEiJ.mpuCycleCount += 10; 20324: return XEiJ.regRn[12] -= 4; 20325: } 20326: //fallthrough 20327: case 0b100_101: //-(A5) 20328: if (XEiJ.EFA_SEPARATE_AR) { 20329: XEiJ.mpuCycleCount += 10; 20330: return XEiJ.regRn[13] -= 4; 20331: } 20332: //fallthrough 20333: case 0b100_110: //-(A6) 20334: if (XEiJ.EFA_SEPARATE_AR) { 20335: XEiJ.mpuCycleCount += 10; 20336: return XEiJ.regRn[14] -= 4; 20337: } 20338: //fallthrough 20339: case 0b100_111: //-(A7) 20340: if (XEiJ.EFA_SEPARATE_AR) { 20341: XEiJ.mpuCycleCount += 10; 20342: return XEiJ.regRn[15] -= 4; 20343: } else { 20344: XEiJ.mpuCycleCount += 10; 20345: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4; 20346: } 20347: case 0b101_000: //(d16,A0) 20348: case 0b101_001: //(d16,A1) 20349: case 0b101_010: //(d16,A2) 20350: case 0b101_011: //(d16,A3) 20351: case 0b101_100: //(d16,A4) 20352: case 0b101_101: //(d16,A5) 20353: case 0b101_110: //(d16,A6) 20354: case 0b101_111: //(d16,A7) 20355: XEiJ.mpuCycleCount += 12; 20356: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20357: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20358: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20359: } else { 20360: t = XEiJ.regPC; 20361: XEiJ.regPC = t + 2; 20362: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20363: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20364: } 20365: case 0b110_000: //(d8,A0,Rn.wl) 20366: case 0b110_001: //(d8,A1,Rn.wl) 20367: case 0b110_010: //(d8,A2,Rn.wl) 20368: case 0b110_011: //(d8,A3,Rn.wl) 20369: case 0b110_100: //(d8,A4,Rn.wl) 20370: case 0b110_101: //(d8,A5,Rn.wl) 20371: case 0b110_110: //(d8,A6,Rn.wl) 20372: case 0b110_111: //(d8,A7,Rn.wl) 20373: XEiJ.mpuCycleCount += 14; 20374: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20375: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20376: } else { 20377: w = XEiJ.regPC; 20378: XEiJ.regPC = w + 2; 20379: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20380: } 20381: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20382: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20383: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20384: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20385: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20386: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20387: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20388: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20389: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20390: XEiJ.regRn[w >> 12]) //ロングインデックス 20391: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20392: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20393: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20394: XEiJ.busRls (t) + x) //ポストインデックス 20395: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20396: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20397: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20398: case 0b111_000: //(xxx).W 20399: XEiJ.mpuCycleCount += 12; 20400: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20401: case 0b111_001: //(xxx).L 20402: XEiJ.mpuCycleCount += 16; 20403: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20404: case 0b111_010: //(d16,PC) 20405: XEiJ.mpuCycleCount += 12; 20406: t = XEiJ.regPC; 20407: XEiJ.regPC = t + 2; 20408: return (t //ベースレジスタ 20409: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20410: case 0b111_011: //(d8,PC,Rn.wl) 20411: XEiJ.mpuCycleCount += 14; 20412: t = XEiJ.regPC; 20413: XEiJ.regPC = t + 2; 20414: w = XEiJ.busRwze (t); //pcwz。拡張ワード 20415: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20416: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20417: t) //ベースレジスタ 20418: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20419: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20420: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20421: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20422: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20423: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20424: XEiJ.regRn[w >> 12]) //ロングインデックス 20425: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20426: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20427: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20428: XEiJ.busRls (t) + x) //ポストインデックス 20429: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20430: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20431: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20432: } //switch 20433: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20434: throw M68kException.m6eSignal; 20435: } //efaMemLong 20436: 20437: //a = efaMltLong (ea) //| M+-WXZ | 20438: // メモリ可変モードのロングオペランドの実効アドレスを求める 20439: // efaMemLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 20440: @SuppressWarnings ("fallthrough") public static int efaMltLong (int ea) throws M68kException { 20441: int t, w, x; 20442: switch (ea) { 20443: case 0b010_000: //(A0) 20444: if (XEiJ.EFA_SEPARATE_AR) { 20445: XEiJ.mpuCycleCount += 8; 20446: return XEiJ.regRn[ 8]; 20447: } 20448: //fallthrough 20449: case 0b010_001: //(A1) 20450: if (XEiJ.EFA_SEPARATE_AR) { 20451: XEiJ.mpuCycleCount += 8; 20452: return XEiJ.regRn[ 9]; 20453: } 20454: //fallthrough 20455: case 0b010_010: //(A2) 20456: if (XEiJ.EFA_SEPARATE_AR) { 20457: XEiJ.mpuCycleCount += 8; 20458: return XEiJ.regRn[10]; 20459: } 20460: //fallthrough 20461: case 0b010_011: //(A3) 20462: if (XEiJ.EFA_SEPARATE_AR) { 20463: XEiJ.mpuCycleCount += 8; 20464: return XEiJ.regRn[11]; 20465: } 20466: //fallthrough 20467: case 0b010_100: //(A4) 20468: if (XEiJ.EFA_SEPARATE_AR) { 20469: XEiJ.mpuCycleCount += 8; 20470: return XEiJ.regRn[12]; 20471: } 20472: //fallthrough 20473: case 0b010_101: //(A5) 20474: if (XEiJ.EFA_SEPARATE_AR) { 20475: XEiJ.mpuCycleCount += 8; 20476: return XEiJ.regRn[13]; 20477: } 20478: //fallthrough 20479: case 0b010_110: //(A6) 20480: if (XEiJ.EFA_SEPARATE_AR) { 20481: XEiJ.mpuCycleCount += 8; 20482: return XEiJ.regRn[14]; 20483: } 20484: //fallthrough 20485: case 0b010_111: //(A7) 20486: if (XEiJ.EFA_SEPARATE_AR) { 20487: XEiJ.mpuCycleCount += 8; 20488: return XEiJ.regRn[15]; 20489: } else { 20490: XEiJ.mpuCycleCount += 8; 20491: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20492: } 20493: case 0b011_000: //(A0)+ 20494: if (XEiJ.EFA_SEPARATE_AR) { 20495: XEiJ.mpuCycleCount += 8; 20496: return (XEiJ.regRn[ 8] += 4) - 4; 20497: } 20498: //fallthrough 20499: case 0b011_001: //(A1)+ 20500: if (XEiJ.EFA_SEPARATE_AR) { 20501: XEiJ.mpuCycleCount += 8; 20502: return (XEiJ.regRn[ 9] += 4) - 4; 20503: } 20504: //fallthrough 20505: case 0b011_010: //(A2)+ 20506: if (XEiJ.EFA_SEPARATE_AR) { 20507: XEiJ.mpuCycleCount += 8; 20508: return (XEiJ.regRn[10] += 4) - 4; 20509: } 20510: //fallthrough 20511: case 0b011_011: //(A3)+ 20512: if (XEiJ.EFA_SEPARATE_AR) { 20513: XEiJ.mpuCycleCount += 8; 20514: return (XEiJ.regRn[11] += 4) - 4; 20515: } 20516: //fallthrough 20517: case 0b011_100: //(A4)+ 20518: if (XEiJ.EFA_SEPARATE_AR) { 20519: XEiJ.mpuCycleCount += 8; 20520: return (XEiJ.regRn[12] += 4) - 4; 20521: } 20522: //fallthrough 20523: case 0b011_101: //(A5)+ 20524: if (XEiJ.EFA_SEPARATE_AR) { 20525: XEiJ.mpuCycleCount += 8; 20526: return (XEiJ.regRn[13] += 4) - 4; 20527: } 20528: //fallthrough 20529: case 0b011_110: //(A6)+ 20530: if (XEiJ.EFA_SEPARATE_AR) { 20531: XEiJ.mpuCycleCount += 8; 20532: return (XEiJ.regRn[14] += 4) - 4; 20533: } 20534: //fallthrough 20535: case 0b011_111: //(A7)+ 20536: if (XEiJ.EFA_SEPARATE_AR) { 20537: XEiJ.mpuCycleCount += 8; 20538: return (XEiJ.regRn[15] += 4) - 4; 20539: } else { 20540: XEiJ.mpuCycleCount += 8; 20541: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 4) - 4; 20542: } 20543: case 0b100_000: //-(A0) 20544: if (XEiJ.EFA_SEPARATE_AR) { 20545: XEiJ.mpuCycleCount += 10; 20546: return XEiJ.regRn[ 8] -= 4; 20547: } 20548: //fallthrough 20549: case 0b100_001: //-(A1) 20550: if (XEiJ.EFA_SEPARATE_AR) { 20551: XEiJ.mpuCycleCount += 10; 20552: return XEiJ.regRn[ 9] -= 4; 20553: } 20554: //fallthrough 20555: case 0b100_010: //-(A2) 20556: if (XEiJ.EFA_SEPARATE_AR) { 20557: XEiJ.mpuCycleCount += 10; 20558: return XEiJ.regRn[10] -= 4; 20559: } 20560: //fallthrough 20561: case 0b100_011: //-(A3) 20562: if (XEiJ.EFA_SEPARATE_AR) { 20563: XEiJ.mpuCycleCount += 10; 20564: return XEiJ.regRn[11] -= 4; 20565: } 20566: //fallthrough 20567: case 0b100_100: //-(A4) 20568: if (XEiJ.EFA_SEPARATE_AR) { 20569: XEiJ.mpuCycleCount += 10; 20570: return XEiJ.regRn[12] -= 4; 20571: } 20572: //fallthrough 20573: case 0b100_101: //-(A5) 20574: if (XEiJ.EFA_SEPARATE_AR) { 20575: XEiJ.mpuCycleCount += 10; 20576: return XEiJ.regRn[13] -= 4; 20577: } 20578: //fallthrough 20579: case 0b100_110: //-(A6) 20580: if (XEiJ.EFA_SEPARATE_AR) { 20581: XEiJ.mpuCycleCount += 10; 20582: return XEiJ.regRn[14] -= 4; 20583: } 20584: //fallthrough 20585: case 0b100_111: //-(A7) 20586: if (XEiJ.EFA_SEPARATE_AR) { 20587: XEiJ.mpuCycleCount += 10; 20588: return XEiJ.regRn[15] -= 4; 20589: } else { 20590: XEiJ.mpuCycleCount += 10; 20591: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 4; 20592: } 20593: case 0b101_000: //(d16,A0) 20594: case 0b101_001: //(d16,A1) 20595: case 0b101_010: //(d16,A2) 20596: case 0b101_011: //(d16,A3) 20597: case 0b101_100: //(d16,A4) 20598: case 0b101_101: //(d16,A5) 20599: case 0b101_110: //(d16,A6) 20600: case 0b101_111: //(d16,A7) 20601: XEiJ.mpuCycleCount += 12; 20602: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20603: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20604: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20605: } else { 20606: t = XEiJ.regPC; 20607: XEiJ.regPC = t + 2; 20608: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20609: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20610: } 20611: case 0b110_000: //(d8,A0,Rn.wl) 20612: case 0b110_001: //(d8,A1,Rn.wl) 20613: case 0b110_010: //(d8,A2,Rn.wl) 20614: case 0b110_011: //(d8,A3,Rn.wl) 20615: case 0b110_100: //(d8,A4,Rn.wl) 20616: case 0b110_101: //(d8,A5,Rn.wl) 20617: case 0b110_110: //(d8,A6,Rn.wl) 20618: case 0b110_111: //(d8,A7,Rn.wl) 20619: XEiJ.mpuCycleCount += 14; 20620: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20621: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20622: } else { 20623: w = XEiJ.regPC; 20624: XEiJ.regPC = w + 2; 20625: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20626: } 20627: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20628: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20629: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20630: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20631: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20632: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20633: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20634: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20635: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20636: XEiJ.regRn[w >> 12]) //ロングインデックス 20637: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20638: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20639: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20640: XEiJ.busRls (t) + x) //ポストインデックス 20641: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20642: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20643: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20644: case 0b111_000: //(xxx).W 20645: XEiJ.mpuCycleCount += 12; 20646: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20647: case 0b111_001: //(xxx).L 20648: XEiJ.mpuCycleCount += 16; 20649: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20650: } //switch 20651: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20652: throw M68kException.m6eSignal; 20653: } //efaMltLong 20654: 20655: //a = efaCntLong (ea) //| M WXZP | 20656: // 制御モードのロングオペランドの実効アドレスを求める 20657: // efaMemLongとの違いは(Ar)+と-(Ar)がないこと 20658: @SuppressWarnings ("fallthrough") public static int efaCntLong (int ea) throws M68kException { 20659: int t, w, x; 20660: switch (ea) { 20661: case 0b010_000: //(A0) 20662: if (XEiJ.EFA_SEPARATE_AR) { 20663: XEiJ.mpuCycleCount += 8; 20664: return XEiJ.regRn[ 8]; 20665: } 20666: //fallthrough 20667: case 0b010_001: //(A1) 20668: if (XEiJ.EFA_SEPARATE_AR) { 20669: XEiJ.mpuCycleCount += 8; 20670: return XEiJ.regRn[ 9]; 20671: } 20672: //fallthrough 20673: case 0b010_010: //(A2) 20674: if (XEiJ.EFA_SEPARATE_AR) { 20675: XEiJ.mpuCycleCount += 8; 20676: return XEiJ.regRn[10]; 20677: } 20678: //fallthrough 20679: case 0b010_011: //(A3) 20680: if (XEiJ.EFA_SEPARATE_AR) { 20681: XEiJ.mpuCycleCount += 8; 20682: return XEiJ.regRn[11]; 20683: } 20684: //fallthrough 20685: case 0b010_100: //(A4) 20686: if (XEiJ.EFA_SEPARATE_AR) { 20687: XEiJ.mpuCycleCount += 8; 20688: return XEiJ.regRn[12]; 20689: } 20690: //fallthrough 20691: case 0b010_101: //(A5) 20692: if (XEiJ.EFA_SEPARATE_AR) { 20693: XEiJ.mpuCycleCount += 8; 20694: return XEiJ.regRn[13]; 20695: } 20696: //fallthrough 20697: case 0b010_110: //(A6) 20698: if (XEiJ.EFA_SEPARATE_AR) { 20699: XEiJ.mpuCycleCount += 8; 20700: return XEiJ.regRn[14]; 20701: } 20702: //fallthrough 20703: case 0b010_111: //(A7) 20704: if (XEiJ.EFA_SEPARATE_AR) { 20705: XEiJ.mpuCycleCount += 8; 20706: return XEiJ.regRn[15]; 20707: } else { 20708: XEiJ.mpuCycleCount += 8; 20709: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20710: } 20711: case 0b101_000: //(d16,A0) 20712: case 0b101_001: //(d16,A1) 20713: case 0b101_010: //(d16,A2) 20714: case 0b101_011: //(d16,A3) 20715: case 0b101_100: //(d16,A4) 20716: case 0b101_101: //(d16,A5) 20717: case 0b101_110: //(d16,A6) 20718: case 0b101_111: //(d16,A7) 20719: XEiJ.mpuCycleCount += 12; 20720: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20721: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20722: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20723: } else { 20724: t = XEiJ.regPC; 20725: XEiJ.regPC = t + 2; 20726: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20727: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20728: } 20729: case 0b110_000: //(d8,A0,Rn.wl) 20730: case 0b110_001: //(d8,A1,Rn.wl) 20731: case 0b110_010: //(d8,A2,Rn.wl) 20732: case 0b110_011: //(d8,A3,Rn.wl) 20733: case 0b110_100: //(d8,A4,Rn.wl) 20734: case 0b110_101: //(d8,A5,Rn.wl) 20735: case 0b110_110: //(d8,A6,Rn.wl) 20736: case 0b110_111: //(d8,A7,Rn.wl) 20737: XEiJ.mpuCycleCount += 14; 20738: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20739: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20740: } else { 20741: w = XEiJ.regPC; 20742: XEiJ.regPC = w + 2; 20743: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20744: } 20745: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20746: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20747: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20748: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20749: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20750: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20751: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20752: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20753: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20754: XEiJ.regRn[w >> 12]) //ロングインデックス 20755: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20756: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20757: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20758: XEiJ.busRls (t) + x) //ポストインデックス 20759: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20760: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20761: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20762: case 0b111_000: //(xxx).W 20763: XEiJ.mpuCycleCount += 12; 20764: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20765: case 0b111_001: //(xxx).L 20766: XEiJ.mpuCycleCount += 16; 20767: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20768: case 0b111_010: //(d16,PC) 20769: XEiJ.mpuCycleCount += 12; 20770: t = XEiJ.regPC; 20771: XEiJ.regPC = t + 2; 20772: return (t //ベースレジスタ 20773: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20774: case 0b111_011: //(d8,PC,Rn.wl) 20775: XEiJ.mpuCycleCount += 14; 20776: t = XEiJ.regPC; 20777: XEiJ.regPC = t + 2; 20778: w = XEiJ.busRwze (t); //pcwz。拡張ワード 20779: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20780: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20781: t) //ベースレジスタ 20782: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20783: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20784: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20785: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20786: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20787: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20788: XEiJ.regRn[w >> 12]) //ロングインデックス 20789: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20790: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20791: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20792: XEiJ.busRls (t) + x) //ポストインデックス 20793: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20794: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20795: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20796: } //switch 20797: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20798: throw M68kException.m6eSignal; 20799: } //efaCntLong 20800: 20801: //a = efaCltLong (ea) //| M WXZ | 20802: // 制御可変モードのワードオペランドの実効アドレスを求める 20803: // efaCntLongとの違いは(d16,PC)と(d8,PC,Rn.wl)がないこと 20804: @SuppressWarnings ("fallthrough") public static int efaCltLong (int ea) throws M68kException { 20805: int t, w, x; 20806: switch (ea) { 20807: case 0b010_000: //(A0) 20808: if (XEiJ.EFA_SEPARATE_AR) { 20809: XEiJ.mpuCycleCount += 8; 20810: return XEiJ.regRn[ 8]; 20811: } 20812: //fallthrough 20813: case 0b010_001: //(A1) 20814: if (XEiJ.EFA_SEPARATE_AR) { 20815: XEiJ.mpuCycleCount += 8; 20816: return XEiJ.regRn[ 9]; 20817: } 20818: //fallthrough 20819: case 0b010_010: //(A2) 20820: if (XEiJ.EFA_SEPARATE_AR) { 20821: XEiJ.mpuCycleCount += 8; 20822: return XEiJ.regRn[10]; 20823: } 20824: //fallthrough 20825: case 0b010_011: //(A3) 20826: if (XEiJ.EFA_SEPARATE_AR) { 20827: XEiJ.mpuCycleCount += 8; 20828: return XEiJ.regRn[11]; 20829: } 20830: //fallthrough 20831: case 0b010_100: //(A4) 20832: if (XEiJ.EFA_SEPARATE_AR) { 20833: XEiJ.mpuCycleCount += 8; 20834: return XEiJ.regRn[12]; 20835: } 20836: //fallthrough 20837: case 0b010_101: //(A5) 20838: if (XEiJ.EFA_SEPARATE_AR) { 20839: XEiJ.mpuCycleCount += 8; 20840: return XEiJ.regRn[13]; 20841: } 20842: //fallthrough 20843: case 0b010_110: //(A6) 20844: if (XEiJ.EFA_SEPARATE_AR) { 20845: XEiJ.mpuCycleCount += 8; 20846: return XEiJ.regRn[14]; 20847: } 20848: //fallthrough 20849: case 0b010_111: //(A7) 20850: if (XEiJ.EFA_SEPARATE_AR) { 20851: XEiJ.mpuCycleCount += 8; 20852: return XEiJ.regRn[15]; 20853: } else { 20854: XEiJ.mpuCycleCount += 8; 20855: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20856: } 20857: case 0b101_000: //(d16,A0) 20858: case 0b101_001: //(d16,A1) 20859: case 0b101_010: //(d16,A2) 20860: case 0b101_011: //(d16,A3) 20861: case 0b101_100: //(d16,A4) 20862: case 0b101_101: //(d16,A5) 20863: case 0b101_110: //(d16,A6) 20864: case 0b101_111: //(d16,A7) 20865: XEiJ.mpuCycleCount += 12; 20866: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20867: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20868: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 20869: } else { 20870: t = XEiJ.regPC; 20871: XEiJ.regPC = t + 2; 20872: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 20873: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 20874: } 20875: case 0b110_000: //(d8,A0,Rn.wl) 20876: case 0b110_001: //(d8,A1,Rn.wl) 20877: case 0b110_010: //(d8,A2,Rn.wl) 20878: case 0b110_011: //(d8,A3,Rn.wl) 20879: case 0b110_100: //(d8,A4,Rn.wl) 20880: case 0b110_101: //(d8,A5,Rn.wl) 20881: case 0b110_110: //(d8,A6,Rn.wl) 20882: case 0b110_111: //(d8,A7,Rn.wl) 20883: XEiJ.mpuCycleCount += 14; 20884: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 20885: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 20886: } else { 20887: w = XEiJ.regPC; 20888: XEiJ.regPC = w + 2; 20889: w = XEiJ.busRwze (w); //pcwz。拡張ワード 20890: } 20891: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 20892: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 20893: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 20894: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 20895: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 20896: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 20897: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 20898: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 20899: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 20900: XEiJ.regRn[w >> 12]) //ロングインデックス 20901: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 20902: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 20903: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 20904: XEiJ.busRls (t) + x) //ポストインデックス 20905: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 20906: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 20907: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 20908: case 0b111_000: //(xxx).W 20909: XEiJ.mpuCycleCount += 12; 20910: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 20911: case 0b111_001: //(xxx).L 20912: XEiJ.mpuCycleCount += 16; 20913: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 20914: } //switch 20915: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 20916: throw M68kException.m6eSignal; 20917: } //efaCltLong 20918: 20919: //a = efaAnyQuad (ea) //| M+-WXZPI| 20920: // 任意のモードのクワッドオペランドの実効アドレスを求める 20921: // efaAnyLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、 20922: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 20923: @SuppressWarnings ("fallthrough") public static int efaAnyQuad (int ea) throws M68kException { 20924: int t, w, x; 20925: switch (ea) { 20926: case 0b010_000: //(A0) 20927: if (XEiJ.EFA_SEPARATE_AR) { 20928: XEiJ.mpuCycleCount += 16; 20929: return XEiJ.regRn[ 8]; 20930: } 20931: //fallthrough 20932: case 0b010_001: //(A1) 20933: if (XEiJ.EFA_SEPARATE_AR) { 20934: XEiJ.mpuCycleCount += 16; 20935: return XEiJ.regRn[ 9]; 20936: } 20937: //fallthrough 20938: case 0b010_010: //(A2) 20939: if (XEiJ.EFA_SEPARATE_AR) { 20940: XEiJ.mpuCycleCount += 16; 20941: return XEiJ.regRn[10]; 20942: } 20943: //fallthrough 20944: case 0b010_011: //(A3) 20945: if (XEiJ.EFA_SEPARATE_AR) { 20946: XEiJ.mpuCycleCount += 16; 20947: return XEiJ.regRn[11]; 20948: } 20949: //fallthrough 20950: case 0b010_100: //(A4) 20951: if (XEiJ.EFA_SEPARATE_AR) { 20952: XEiJ.mpuCycleCount += 16; 20953: return XEiJ.regRn[12]; 20954: } 20955: //fallthrough 20956: case 0b010_101: //(A5) 20957: if (XEiJ.EFA_SEPARATE_AR) { 20958: XEiJ.mpuCycleCount += 16; 20959: return XEiJ.regRn[13]; 20960: } 20961: //fallthrough 20962: case 0b010_110: //(A6) 20963: if (XEiJ.EFA_SEPARATE_AR) { 20964: XEiJ.mpuCycleCount += 16; 20965: return XEiJ.regRn[14]; 20966: } 20967: //fallthrough 20968: case 0b010_111: //(A7) 20969: if (XEiJ.EFA_SEPARATE_AR) { 20970: XEiJ.mpuCycleCount += 16; 20971: return XEiJ.regRn[15]; 20972: } else { 20973: XEiJ.mpuCycleCount += 16; 20974: return XEiJ.regRn[ea - (0b010_000 - 8)]; 20975: } 20976: case 0b011_000: //(A0)+ 20977: if (XEiJ.EFA_SEPARATE_AR) { 20978: XEiJ.mpuCycleCount += 16; 20979: return (XEiJ.regRn[ 8] += 8) - 8; 20980: } 20981: //fallthrough 20982: case 0b011_001: //(A1)+ 20983: if (XEiJ.EFA_SEPARATE_AR) { 20984: XEiJ.mpuCycleCount += 16; 20985: return (XEiJ.regRn[ 9] += 8) - 8; 20986: } 20987: //fallthrough 20988: case 0b011_010: //(A2)+ 20989: if (XEiJ.EFA_SEPARATE_AR) { 20990: XEiJ.mpuCycleCount += 16; 20991: return (XEiJ.regRn[10] += 8) - 8; 20992: } 20993: //fallthrough 20994: case 0b011_011: //(A3)+ 20995: if (XEiJ.EFA_SEPARATE_AR) { 20996: XEiJ.mpuCycleCount += 16; 20997: return (XEiJ.regRn[11] += 8) - 8; 20998: } 20999: //fallthrough 21000: case 0b011_100: //(A4)+ 21001: if (XEiJ.EFA_SEPARATE_AR) { 21002: XEiJ.mpuCycleCount += 16; 21003: return (XEiJ.regRn[12] += 8) - 8; 21004: } 21005: //fallthrough 21006: case 0b011_101: //(A5)+ 21007: if (XEiJ.EFA_SEPARATE_AR) { 21008: XEiJ.mpuCycleCount += 16; 21009: return (XEiJ.regRn[13] += 8) - 8; 21010: } 21011: //fallthrough 21012: case 0b011_110: //(A6)+ 21013: if (XEiJ.EFA_SEPARATE_AR) { 21014: XEiJ.mpuCycleCount += 16; 21015: return (XEiJ.regRn[14] += 8) - 8; 21016: } 21017: //fallthrough 21018: case 0b011_111: //(A7)+ 21019: if (XEiJ.EFA_SEPARATE_AR) { 21020: XEiJ.mpuCycleCount += 16; 21021: return (XEiJ.regRn[15] += 8) - 8; 21022: } else { 21023: XEiJ.mpuCycleCount += 16; 21024: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8; 21025: } 21026: case 0b100_000: //-(A0) 21027: if (XEiJ.EFA_SEPARATE_AR) { 21028: XEiJ.mpuCycleCount += 18; 21029: return XEiJ.regRn[ 8] -= 8; 21030: } 21031: //fallthrough 21032: case 0b100_001: //-(A1) 21033: if (XEiJ.EFA_SEPARATE_AR) { 21034: XEiJ.mpuCycleCount += 18; 21035: return XEiJ.regRn[ 9] -= 8; 21036: } 21037: //fallthrough 21038: case 0b100_010: //-(A2) 21039: if (XEiJ.EFA_SEPARATE_AR) { 21040: XEiJ.mpuCycleCount += 18; 21041: return XEiJ.regRn[10] -= 8; 21042: } 21043: //fallthrough 21044: case 0b100_011: //-(A3) 21045: if (XEiJ.EFA_SEPARATE_AR) { 21046: XEiJ.mpuCycleCount += 18; 21047: return XEiJ.regRn[11] -= 8; 21048: } 21049: //fallthrough 21050: case 0b100_100: //-(A4) 21051: if (XEiJ.EFA_SEPARATE_AR) { 21052: XEiJ.mpuCycleCount += 18; 21053: return XEiJ.regRn[12] -= 8; 21054: } 21055: //fallthrough 21056: case 0b100_101: //-(A5) 21057: if (XEiJ.EFA_SEPARATE_AR) { 21058: XEiJ.mpuCycleCount += 18; 21059: return XEiJ.regRn[13] -= 8; 21060: } 21061: //fallthrough 21062: case 0b100_110: //-(A6) 21063: if (XEiJ.EFA_SEPARATE_AR) { 21064: XEiJ.mpuCycleCount += 18; 21065: return XEiJ.regRn[14] -= 8; 21066: } 21067: //fallthrough 21068: case 0b100_111: //-(A7) 21069: if (XEiJ.EFA_SEPARATE_AR) { 21070: XEiJ.mpuCycleCount += 18; 21071: return XEiJ.regRn[15] -= 8; 21072: } else { 21073: XEiJ.mpuCycleCount += 18; 21074: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8; 21075: } 21076: case 0b101_000: //(d16,A0) 21077: case 0b101_001: //(d16,A1) 21078: case 0b101_010: //(d16,A2) 21079: case 0b101_011: //(d16,A3) 21080: case 0b101_100: //(d16,A4) 21081: case 0b101_101: //(d16,A5) 21082: case 0b101_110: //(d16,A6) 21083: case 0b101_111: //(d16,A7) 21084: XEiJ.mpuCycleCount += 20; 21085: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21086: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21087: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21088: } else { 21089: t = XEiJ.regPC; 21090: XEiJ.regPC = t + 2; 21091: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21092: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21093: } 21094: case 0b110_000: //(d8,A0,Rn.wl) 21095: case 0b110_001: //(d8,A1,Rn.wl) 21096: case 0b110_010: //(d8,A2,Rn.wl) 21097: case 0b110_011: //(d8,A3,Rn.wl) 21098: case 0b110_100: //(d8,A4,Rn.wl) 21099: case 0b110_101: //(d8,A5,Rn.wl) 21100: case 0b110_110: //(d8,A6,Rn.wl) 21101: case 0b110_111: //(d8,A7,Rn.wl) 21102: XEiJ.mpuCycleCount += 22; 21103: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21104: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21105: } else { 21106: w = XEiJ.regPC; 21107: XEiJ.regPC = w + 2; 21108: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21109: } 21110: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21111: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21112: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21113: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21114: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21115: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21116: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21117: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21118: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21119: XEiJ.regRn[w >> 12]) //ロングインデックス 21120: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21121: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21122: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21123: XEiJ.busRls (t) + x) //ポストインデックス 21124: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21125: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21126: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21127: case 0b111_000: //(xxx).W 21128: XEiJ.mpuCycleCount += 20; 21129: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21130: case 0b111_001: //(xxx).L 21131: XEiJ.mpuCycleCount += 24; 21132: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21133: case 0b111_010: //(d16,PC) 21134: XEiJ.mpuCycleCount += 20; 21135: t = XEiJ.regPC; 21136: XEiJ.regPC = t + 2; 21137: return (t //ベースレジスタ 21138: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21139: case 0b111_011: //(d8,PC,Rn.wl) 21140: XEiJ.mpuCycleCount += 22; 21141: t = XEiJ.regPC; 21142: XEiJ.regPC = t + 2; 21143: w = XEiJ.busRwze (t); //pcwz。拡張ワード 21144: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21145: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21146: t) //ベースレジスタ 21147: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21148: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21149: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21150: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21151: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21152: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21153: XEiJ.regRn[w >> 12]) //ロングインデックス 21154: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21155: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21156: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21157: XEiJ.busRls (t) + x) //ポストインデックス 21158: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21159: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21160: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21161: case 0b111_100: //#<data> 21162: XEiJ.mpuCycleCount += 16; 21163: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21164: return (XEiJ.regPC += 8) - 8; 21165: } else { 21166: t = XEiJ.regPC; 21167: XEiJ.regPC = t + 8; 21168: return t; 21169: } 21170: } //switch 21171: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21172: throw M68kException.m6eSignal; 21173: } //efaAnyQuad 21174: 21175: //a = efaMltQuad (ea) //| M+-WXZ | 21176: // メモリ可変モードのクワッドオペランドの実効アドレスを求める 21177: // efaMltLongとの違いは(Ar)+と-(Ar)がArを8変化させることと、#<data>がPCを8変化させることと、 21178: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 21179: @SuppressWarnings ("fallthrough") public static int efaMltQuad (int ea) throws M68kException { 21180: int t, w, x; 21181: switch (ea) { 21182: case 0b010_000: //(A0) 21183: if (XEiJ.EFA_SEPARATE_AR) { 21184: XEiJ.mpuCycleCount += 16; 21185: return XEiJ.regRn[ 8]; 21186: } 21187: //fallthrough 21188: case 0b010_001: //(A1) 21189: if (XEiJ.EFA_SEPARATE_AR) { 21190: XEiJ.mpuCycleCount += 16; 21191: return XEiJ.regRn[ 9]; 21192: } 21193: //fallthrough 21194: case 0b010_010: //(A2) 21195: if (XEiJ.EFA_SEPARATE_AR) { 21196: XEiJ.mpuCycleCount += 16; 21197: return XEiJ.regRn[10]; 21198: } 21199: //fallthrough 21200: case 0b010_011: //(A3) 21201: if (XEiJ.EFA_SEPARATE_AR) { 21202: XEiJ.mpuCycleCount += 16; 21203: return XEiJ.regRn[11]; 21204: } 21205: //fallthrough 21206: case 0b010_100: //(A4) 21207: if (XEiJ.EFA_SEPARATE_AR) { 21208: XEiJ.mpuCycleCount += 16; 21209: return XEiJ.regRn[12]; 21210: } 21211: //fallthrough 21212: case 0b010_101: //(A5) 21213: if (XEiJ.EFA_SEPARATE_AR) { 21214: XEiJ.mpuCycleCount += 16; 21215: return XEiJ.regRn[13]; 21216: } 21217: //fallthrough 21218: case 0b010_110: //(A6) 21219: if (XEiJ.EFA_SEPARATE_AR) { 21220: XEiJ.mpuCycleCount += 16; 21221: return XEiJ.regRn[14]; 21222: } 21223: //fallthrough 21224: case 0b010_111: //(A7) 21225: if (XEiJ.EFA_SEPARATE_AR) { 21226: XEiJ.mpuCycleCount += 16; 21227: return XEiJ.regRn[15]; 21228: } else { 21229: XEiJ.mpuCycleCount += 16; 21230: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21231: } 21232: case 0b011_000: //(A0)+ 21233: if (XEiJ.EFA_SEPARATE_AR) { 21234: XEiJ.mpuCycleCount += 16; 21235: return (XEiJ.regRn[ 8] += 8) - 8; 21236: } 21237: //fallthrough 21238: case 0b011_001: //(A1)+ 21239: if (XEiJ.EFA_SEPARATE_AR) { 21240: XEiJ.mpuCycleCount += 16; 21241: return (XEiJ.regRn[ 9] += 8) - 8; 21242: } 21243: //fallthrough 21244: case 0b011_010: //(A2)+ 21245: if (XEiJ.EFA_SEPARATE_AR) { 21246: XEiJ.mpuCycleCount += 16; 21247: return (XEiJ.regRn[10] += 8) - 8; 21248: } 21249: //fallthrough 21250: case 0b011_011: //(A3)+ 21251: if (XEiJ.EFA_SEPARATE_AR) { 21252: XEiJ.mpuCycleCount += 16; 21253: return (XEiJ.regRn[11] += 8) - 8; 21254: } 21255: //fallthrough 21256: case 0b011_100: //(A4)+ 21257: if (XEiJ.EFA_SEPARATE_AR) { 21258: XEiJ.mpuCycleCount += 16; 21259: return (XEiJ.regRn[12] += 8) - 8; 21260: } 21261: //fallthrough 21262: case 0b011_101: //(A5)+ 21263: if (XEiJ.EFA_SEPARATE_AR) { 21264: XEiJ.mpuCycleCount += 16; 21265: return (XEiJ.regRn[13] += 8) - 8; 21266: } 21267: //fallthrough 21268: case 0b011_110: //(A6)+ 21269: if (XEiJ.EFA_SEPARATE_AR) { 21270: XEiJ.mpuCycleCount += 16; 21271: return (XEiJ.regRn[14] += 8) - 8; 21272: } 21273: //fallthrough 21274: case 0b011_111: //(A7)+ 21275: if (XEiJ.EFA_SEPARATE_AR) { 21276: XEiJ.mpuCycleCount += 16; 21277: return (XEiJ.regRn[15] += 8) - 8; 21278: } else { 21279: XEiJ.mpuCycleCount += 16; 21280: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 8) - 8; 21281: } 21282: case 0b100_000: //-(A0) 21283: if (XEiJ.EFA_SEPARATE_AR) { 21284: XEiJ.mpuCycleCount += 18; 21285: return XEiJ.regRn[ 8] -= 8; 21286: } 21287: //fallthrough 21288: case 0b100_001: //-(A1) 21289: if (XEiJ.EFA_SEPARATE_AR) { 21290: XEiJ.mpuCycleCount += 18; 21291: return XEiJ.regRn[ 9] -= 8; 21292: } 21293: //fallthrough 21294: case 0b100_010: //-(A2) 21295: if (XEiJ.EFA_SEPARATE_AR) { 21296: XEiJ.mpuCycleCount += 18; 21297: return XEiJ.regRn[10] -= 8; 21298: } 21299: //fallthrough 21300: case 0b100_011: //-(A3) 21301: if (XEiJ.EFA_SEPARATE_AR) { 21302: XEiJ.mpuCycleCount += 18; 21303: return XEiJ.regRn[11] -= 8; 21304: } 21305: //fallthrough 21306: case 0b100_100: //-(A4) 21307: if (XEiJ.EFA_SEPARATE_AR) { 21308: XEiJ.mpuCycleCount += 18; 21309: return XEiJ.regRn[12] -= 8; 21310: } 21311: //fallthrough 21312: case 0b100_101: //-(A5) 21313: if (XEiJ.EFA_SEPARATE_AR) { 21314: XEiJ.mpuCycleCount += 18; 21315: return XEiJ.regRn[13] -= 8; 21316: } 21317: //fallthrough 21318: case 0b100_110: //-(A6) 21319: if (XEiJ.EFA_SEPARATE_AR) { 21320: XEiJ.mpuCycleCount += 18; 21321: return XEiJ.regRn[14] -= 8; 21322: } 21323: //fallthrough 21324: case 0b100_111: //-(A7) 21325: if (XEiJ.EFA_SEPARATE_AR) { 21326: XEiJ.mpuCycleCount += 18; 21327: return XEiJ.regRn[15] -= 8; 21328: } else { 21329: XEiJ.mpuCycleCount += 18; 21330: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 8; 21331: } 21332: case 0b101_000: //(d16,A0) 21333: case 0b101_001: //(d16,A1) 21334: case 0b101_010: //(d16,A2) 21335: case 0b101_011: //(d16,A3) 21336: case 0b101_100: //(d16,A4) 21337: case 0b101_101: //(d16,A5) 21338: case 0b101_110: //(d16,A6) 21339: case 0b101_111: //(d16,A7) 21340: XEiJ.mpuCycleCount += 20; 21341: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21342: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21343: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21344: } else { 21345: t = XEiJ.regPC; 21346: XEiJ.regPC = t + 2; 21347: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21348: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21349: } 21350: case 0b110_000: //(d8,A0,Rn.wl) 21351: case 0b110_001: //(d8,A1,Rn.wl) 21352: case 0b110_010: //(d8,A2,Rn.wl) 21353: case 0b110_011: //(d8,A3,Rn.wl) 21354: case 0b110_100: //(d8,A4,Rn.wl) 21355: case 0b110_101: //(d8,A5,Rn.wl) 21356: case 0b110_110: //(d8,A6,Rn.wl) 21357: case 0b110_111: //(d8,A7,Rn.wl) 21358: XEiJ.mpuCycleCount += 22; 21359: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21360: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21361: } else { 21362: w = XEiJ.regPC; 21363: XEiJ.regPC = w + 2; 21364: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21365: } 21366: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21367: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21368: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21369: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21370: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21371: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21372: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21373: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21374: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21375: XEiJ.regRn[w >> 12]) //ロングインデックス 21376: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21377: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21378: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21379: XEiJ.busRls (t) + x) //ポストインデックス 21380: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21381: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21382: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21383: case 0b111_000: //(xxx).W 21384: XEiJ.mpuCycleCount += 20; 21385: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21386: case 0b111_001: //(xxx).L 21387: XEiJ.mpuCycleCount += 24; 21388: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21389: } //switch 21390: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21391: throw M68kException.m6eSignal; 21392: } //efaMltQuad 21393: 21394: //a = efaAnyExtd (ea) //| M+-WXZPI| 21395: // 任意のモードのエクステンデッドオペランドの実効アドレスを求める 21396: // efaAnyQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、 21397: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 21398: @SuppressWarnings ("fallthrough") public static int efaAnyExtd (int ea) throws M68kException { 21399: int t, w, x; 21400: switch (ea) { 21401: case 0b010_000: //(A0) 21402: if (XEiJ.EFA_SEPARATE_AR) { 21403: XEiJ.mpuCycleCount += 24; 21404: return XEiJ.regRn[ 8]; 21405: } 21406: //fallthrough 21407: case 0b010_001: //(A1) 21408: if (XEiJ.EFA_SEPARATE_AR) { 21409: XEiJ.mpuCycleCount += 24; 21410: return XEiJ.regRn[ 9]; 21411: } 21412: //fallthrough 21413: case 0b010_010: //(A2) 21414: if (XEiJ.EFA_SEPARATE_AR) { 21415: XEiJ.mpuCycleCount += 24; 21416: return XEiJ.regRn[10]; 21417: } 21418: //fallthrough 21419: case 0b010_011: //(A3) 21420: if (XEiJ.EFA_SEPARATE_AR) { 21421: XEiJ.mpuCycleCount += 24; 21422: return XEiJ.regRn[11]; 21423: } 21424: //fallthrough 21425: case 0b010_100: //(A4) 21426: if (XEiJ.EFA_SEPARATE_AR) { 21427: XEiJ.mpuCycleCount += 24; 21428: return XEiJ.regRn[12]; 21429: } 21430: //fallthrough 21431: case 0b010_101: //(A5) 21432: if (XEiJ.EFA_SEPARATE_AR) { 21433: XEiJ.mpuCycleCount += 24; 21434: return XEiJ.regRn[13]; 21435: } 21436: //fallthrough 21437: case 0b010_110: //(A6) 21438: if (XEiJ.EFA_SEPARATE_AR) { 21439: XEiJ.mpuCycleCount += 24; 21440: return XEiJ.regRn[14]; 21441: } 21442: //fallthrough 21443: case 0b010_111: //(A7) 21444: if (XEiJ.EFA_SEPARATE_AR) { 21445: XEiJ.mpuCycleCount += 24; 21446: return XEiJ.regRn[15]; 21447: } else { 21448: XEiJ.mpuCycleCount += 24; 21449: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21450: } 21451: case 0b011_000: //(A0)+ 21452: if (XEiJ.EFA_SEPARATE_AR) { 21453: XEiJ.mpuCycleCount += 24; 21454: return (XEiJ.regRn[ 8] += 12) - 12; 21455: } 21456: //fallthrough 21457: case 0b011_001: //(A1)+ 21458: if (XEiJ.EFA_SEPARATE_AR) { 21459: XEiJ.mpuCycleCount += 24; 21460: return (XEiJ.regRn[ 9] += 12) - 12; 21461: } 21462: //fallthrough 21463: case 0b011_010: //(A2)+ 21464: if (XEiJ.EFA_SEPARATE_AR) { 21465: XEiJ.mpuCycleCount += 24; 21466: return (XEiJ.regRn[10] += 12) - 12; 21467: } 21468: //fallthrough 21469: case 0b011_011: //(A3)+ 21470: if (XEiJ.EFA_SEPARATE_AR) { 21471: XEiJ.mpuCycleCount += 24; 21472: return (XEiJ.regRn[11] += 12) - 12; 21473: } 21474: //fallthrough 21475: case 0b011_100: //(A4)+ 21476: if (XEiJ.EFA_SEPARATE_AR) { 21477: XEiJ.mpuCycleCount += 24; 21478: return (XEiJ.regRn[12] += 12) - 12; 21479: } 21480: //fallthrough 21481: case 0b011_101: //(A5)+ 21482: if (XEiJ.EFA_SEPARATE_AR) { 21483: XEiJ.mpuCycleCount += 24; 21484: return (XEiJ.regRn[13] += 12) - 12; 21485: } 21486: //fallthrough 21487: case 0b011_110: //(A6)+ 21488: if (XEiJ.EFA_SEPARATE_AR) { 21489: XEiJ.mpuCycleCount += 24; 21490: return (XEiJ.regRn[14] += 12) - 12; 21491: } 21492: //fallthrough 21493: case 0b011_111: //(A7)+ 21494: if (XEiJ.EFA_SEPARATE_AR) { 21495: XEiJ.mpuCycleCount += 24; 21496: return (XEiJ.regRn[15] += 12) - 12; 21497: } else { 21498: XEiJ.mpuCycleCount += 24; 21499: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12; 21500: } 21501: case 0b100_000: //-(A0) 21502: if (XEiJ.EFA_SEPARATE_AR) { 21503: XEiJ.mpuCycleCount += 26; 21504: return XEiJ.regRn[ 8] -= 12; 21505: } 21506: //fallthrough 21507: case 0b100_001: //-(A1) 21508: if (XEiJ.EFA_SEPARATE_AR) { 21509: XEiJ.mpuCycleCount += 26; 21510: return XEiJ.regRn[ 9] -= 12; 21511: } 21512: //fallthrough 21513: case 0b100_010: //-(A2) 21514: if (XEiJ.EFA_SEPARATE_AR) { 21515: XEiJ.mpuCycleCount += 26; 21516: return XEiJ.regRn[10] -= 12; 21517: } 21518: //fallthrough 21519: case 0b100_011: //-(A3) 21520: if (XEiJ.EFA_SEPARATE_AR) { 21521: XEiJ.mpuCycleCount += 26; 21522: return XEiJ.regRn[11] -= 12; 21523: } 21524: //fallthrough 21525: case 0b100_100: //-(A4) 21526: if (XEiJ.EFA_SEPARATE_AR) { 21527: XEiJ.mpuCycleCount += 26; 21528: return XEiJ.regRn[12] -= 12; 21529: } 21530: //fallthrough 21531: case 0b100_101: //-(A5) 21532: if (XEiJ.EFA_SEPARATE_AR) { 21533: XEiJ.mpuCycleCount += 26; 21534: return XEiJ.regRn[13] -= 12; 21535: } 21536: //fallthrough 21537: case 0b100_110: //-(A6) 21538: if (XEiJ.EFA_SEPARATE_AR) { 21539: XEiJ.mpuCycleCount += 26; 21540: return XEiJ.regRn[14] -= 12; 21541: } 21542: //fallthrough 21543: case 0b100_111: //-(A7) 21544: if (XEiJ.EFA_SEPARATE_AR) { 21545: XEiJ.mpuCycleCount += 26; 21546: return XEiJ.regRn[15] -= 12; 21547: } else { 21548: XEiJ.mpuCycleCount += 26; 21549: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12; 21550: } 21551: case 0b101_000: //(d16,A0) 21552: case 0b101_001: //(d16,A1) 21553: case 0b101_010: //(d16,A2) 21554: case 0b101_011: //(d16,A3) 21555: case 0b101_100: //(d16,A4) 21556: case 0b101_101: //(d16,A5) 21557: case 0b101_110: //(d16,A6) 21558: case 0b101_111: //(d16,A7) 21559: XEiJ.mpuCycleCount += 28; 21560: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21561: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21562: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21563: } else { 21564: t = XEiJ.regPC; 21565: XEiJ.regPC = t + 2; 21566: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21567: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21568: } 21569: case 0b110_000: //(d8,A0,Rn.wl) 21570: case 0b110_001: //(d8,A1,Rn.wl) 21571: case 0b110_010: //(d8,A2,Rn.wl) 21572: case 0b110_011: //(d8,A3,Rn.wl) 21573: case 0b110_100: //(d8,A4,Rn.wl) 21574: case 0b110_101: //(d8,A5,Rn.wl) 21575: case 0b110_110: //(d8,A6,Rn.wl) 21576: case 0b110_111: //(d8,A7,Rn.wl) 21577: XEiJ.mpuCycleCount += 30; 21578: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21579: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21580: } else { 21581: w = XEiJ.regPC; 21582: XEiJ.regPC = w + 2; 21583: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21584: } 21585: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21586: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21587: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21588: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21589: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21590: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21591: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21592: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21593: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21594: XEiJ.regRn[w >> 12]) //ロングインデックス 21595: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21596: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21597: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21598: XEiJ.busRls (t) + x) //ポストインデックス 21599: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21600: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21601: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21602: case 0b111_000: //(xxx).W 21603: XEiJ.mpuCycleCount += 28; 21604: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21605: case 0b111_001: //(xxx).L 21606: XEiJ.mpuCycleCount += 32; 21607: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21608: case 0b111_010: //(d16,PC) 21609: XEiJ.mpuCycleCount += 28; 21610: t = XEiJ.regPC; 21611: XEiJ.regPC = t + 2; 21612: return (t //ベースレジスタ 21613: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21614: case 0b111_011: //(d8,PC,Rn.wl) 21615: XEiJ.mpuCycleCount += 30; 21616: t = XEiJ.regPC; 21617: XEiJ.regPC = t + 2; 21618: w = XEiJ.busRwze (t); //pcwz。拡張ワード 21619: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21620: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21621: t) //ベースレジスタ 21622: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21623: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21624: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21625: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21626: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21627: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21628: XEiJ.regRn[w >> 12]) //ロングインデックス 21629: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21630: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21631: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21632: XEiJ.busRls (t) + x) //ポストインデックス 21633: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21634: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21635: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21636: case 0b111_100: //#<data> 21637: XEiJ.mpuCycleCount += 24; 21638: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21639: return (XEiJ.regPC += 12) - 12; 21640: } else { 21641: t = XEiJ.regPC; 21642: XEiJ.regPC = t + 12; 21643: return t; 21644: } 21645: } //switch 21646: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21647: throw M68kException.m6eSignal; 21648: } //efaAnyExtd 21649: 21650: //a = efaMltExtd (ea) //| M+-WXZ | 21651: // メモリ可変モードのエクステンデッドオペランドの実効アドレスを求める 21652: // efaMltQuadとの違いは(Ar)+と-(Ar)がArを12変化させることと、#<data>がPCを12変化させることと、 21653: // オペランドのアクセスが2ワード増える分の8サイクルが追加されていること 21654: @SuppressWarnings ("fallthrough") public static int efaMltExtd (int ea) throws M68kException { 21655: int t, w, x; 21656: switch (ea) { 21657: case 0b010_000: //(A0) 21658: if (XEiJ.EFA_SEPARATE_AR) { 21659: XEiJ.mpuCycleCount += 24; 21660: return XEiJ.regRn[ 8]; 21661: } 21662: //fallthrough 21663: case 0b010_001: //(A1) 21664: if (XEiJ.EFA_SEPARATE_AR) { 21665: XEiJ.mpuCycleCount += 24; 21666: return XEiJ.regRn[ 9]; 21667: } 21668: //fallthrough 21669: case 0b010_010: //(A2) 21670: if (XEiJ.EFA_SEPARATE_AR) { 21671: XEiJ.mpuCycleCount += 24; 21672: return XEiJ.regRn[10]; 21673: } 21674: //fallthrough 21675: case 0b010_011: //(A3) 21676: if (XEiJ.EFA_SEPARATE_AR) { 21677: XEiJ.mpuCycleCount += 24; 21678: return XEiJ.regRn[11]; 21679: } 21680: //fallthrough 21681: case 0b010_100: //(A4) 21682: if (XEiJ.EFA_SEPARATE_AR) { 21683: XEiJ.mpuCycleCount += 24; 21684: return XEiJ.regRn[12]; 21685: } 21686: //fallthrough 21687: case 0b010_101: //(A5) 21688: if (XEiJ.EFA_SEPARATE_AR) { 21689: XEiJ.mpuCycleCount += 24; 21690: return XEiJ.regRn[13]; 21691: } 21692: //fallthrough 21693: case 0b010_110: //(A6) 21694: if (XEiJ.EFA_SEPARATE_AR) { 21695: XEiJ.mpuCycleCount += 24; 21696: return XEiJ.regRn[14]; 21697: } 21698: //fallthrough 21699: case 0b010_111: //(A7) 21700: if (XEiJ.EFA_SEPARATE_AR) { 21701: XEiJ.mpuCycleCount += 24; 21702: return XEiJ.regRn[15]; 21703: } else { 21704: XEiJ.mpuCycleCount += 24; 21705: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21706: } 21707: case 0b011_000: //(A0)+ 21708: if (XEiJ.EFA_SEPARATE_AR) { 21709: XEiJ.mpuCycleCount += 24; 21710: return (XEiJ.regRn[ 8] += 12) - 12; 21711: } 21712: //fallthrough 21713: case 0b011_001: //(A1)+ 21714: if (XEiJ.EFA_SEPARATE_AR) { 21715: XEiJ.mpuCycleCount += 24; 21716: return (XEiJ.regRn[ 9] += 12) - 12; 21717: } 21718: //fallthrough 21719: case 0b011_010: //(A2)+ 21720: if (XEiJ.EFA_SEPARATE_AR) { 21721: XEiJ.mpuCycleCount += 24; 21722: return (XEiJ.regRn[10] += 12) - 12; 21723: } 21724: //fallthrough 21725: case 0b011_011: //(A3)+ 21726: if (XEiJ.EFA_SEPARATE_AR) { 21727: XEiJ.mpuCycleCount += 24; 21728: return (XEiJ.regRn[11] += 12) - 12; 21729: } 21730: //fallthrough 21731: case 0b011_100: //(A4)+ 21732: if (XEiJ.EFA_SEPARATE_AR) { 21733: XEiJ.mpuCycleCount += 24; 21734: return (XEiJ.regRn[12] += 12) - 12; 21735: } 21736: //fallthrough 21737: case 0b011_101: //(A5)+ 21738: if (XEiJ.EFA_SEPARATE_AR) { 21739: XEiJ.mpuCycleCount += 24; 21740: return (XEiJ.regRn[13] += 12) - 12; 21741: } 21742: //fallthrough 21743: case 0b011_110: //(A6)+ 21744: if (XEiJ.EFA_SEPARATE_AR) { 21745: XEiJ.mpuCycleCount += 24; 21746: return (XEiJ.regRn[14] += 12) - 12; 21747: } 21748: //fallthrough 21749: case 0b011_111: //(A7)+ 21750: if (XEiJ.EFA_SEPARATE_AR) { 21751: XEiJ.mpuCycleCount += 24; 21752: return (XEiJ.regRn[15] += 12) - 12; 21753: } else { 21754: XEiJ.mpuCycleCount += 24; 21755: return (XEiJ.regRn[ea - (0b011_000 - 8)] += 12) - 12; 21756: } 21757: case 0b100_000: //-(A0) 21758: case 0b100_001: //-(A1) 21759: case 0b100_010: //-(A2) 21760: case 0b100_011: //-(A3) 21761: case 0b100_100: //-(A4) 21762: case 0b100_101: //-(A5) 21763: case 0b100_110: //-(A6) 21764: case 0b100_111: //-(A7) 21765: XEiJ.mpuCycleCount += 26; 21766: return XEiJ.regRn[ea - (0b100_000 - 8)] -= 12; 21767: case 0b101_000: //(d16,A0) 21768: case 0b101_001: //(d16,A1) 21769: case 0b101_010: //(d16,A2) 21770: case 0b101_011: //(d16,A3) 21771: case 0b101_100: //(d16,A4) 21772: case 0b101_101: //(d16,A5) 21773: case 0b101_110: //(d16,A6) 21774: case 0b101_111: //(d16,A7) 21775: XEiJ.mpuCycleCount += 28; 21776: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21777: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21778: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21779: } else { 21780: t = XEiJ.regPC; 21781: XEiJ.regPC = t + 2; 21782: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21783: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21784: } 21785: case 0b110_000: //(d8,A0,Rn.wl) 21786: case 0b110_001: //(d8,A1,Rn.wl) 21787: case 0b110_010: //(d8,A2,Rn.wl) 21788: case 0b110_011: //(d8,A3,Rn.wl) 21789: case 0b110_100: //(d8,A4,Rn.wl) 21790: case 0b110_101: //(d8,A5,Rn.wl) 21791: case 0b110_110: //(d8,A6,Rn.wl) 21792: case 0b110_111: //(d8,A7,Rn.wl) 21793: XEiJ.mpuCycleCount += 30; 21794: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21795: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21796: } else { 21797: w = XEiJ.regPC; 21798: XEiJ.regPC = w + 2; 21799: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21800: } 21801: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21802: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21803: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21804: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21805: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21806: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21807: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21808: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21809: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21810: XEiJ.regRn[w >> 12]) //ロングインデックス 21811: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21812: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21813: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21814: XEiJ.busRls (t) + x) //ポストインデックス 21815: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21816: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21817: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21818: case 0b111_000: //(xxx).W 21819: XEiJ.mpuCycleCount += 28; 21820: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21821: case 0b111_001: //(xxx).L 21822: XEiJ.mpuCycleCount += 32; 21823: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21824: } //switch 21825: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21826: throw M68kException.m6eSignal; 21827: } //efaMltExtd 21828: 21829: //a = efaLeaPea (ea) //| M WXZP | 21830: // LEA命令とPEA命令のオペランドの実効アドレスを求める 21831: // efaCntWordとの違いはサイクル数のみ 21832: // LEA命令のベースサイクル数4を含んでいるのでLEA命令ではベースサイクル数を加えなくてよい 21833: // PEA命令のベースサイクル数は12-4=8 21834: @SuppressWarnings ("fallthrough") public static int efaLeaPea (int ea) throws M68kException { 21835: int t, w, x; 21836: switch (ea) { 21837: case 0b010_000: //(A0) 21838: if (XEiJ.EFA_SEPARATE_AR) { 21839: XEiJ.mpuCycleCount += 4; 21840: return XEiJ.regRn[ 8]; 21841: } 21842: //fallthrough 21843: case 0b010_001: //(A1) 21844: if (XEiJ.EFA_SEPARATE_AR) { 21845: XEiJ.mpuCycleCount += 4; 21846: return XEiJ.regRn[ 9]; 21847: } 21848: //fallthrough 21849: case 0b010_010: //(A2) 21850: if (XEiJ.EFA_SEPARATE_AR) { 21851: XEiJ.mpuCycleCount += 4; 21852: return XEiJ.regRn[10]; 21853: } 21854: //fallthrough 21855: case 0b010_011: //(A3) 21856: if (XEiJ.EFA_SEPARATE_AR) { 21857: XEiJ.mpuCycleCount += 4; 21858: return XEiJ.regRn[11]; 21859: } 21860: //fallthrough 21861: case 0b010_100: //(A4) 21862: if (XEiJ.EFA_SEPARATE_AR) { 21863: XEiJ.mpuCycleCount += 4; 21864: return XEiJ.regRn[12]; 21865: } 21866: //fallthrough 21867: case 0b010_101: //(A5) 21868: if (XEiJ.EFA_SEPARATE_AR) { 21869: XEiJ.mpuCycleCount += 4; 21870: return XEiJ.regRn[13]; 21871: } 21872: //fallthrough 21873: case 0b010_110: //(A6) 21874: if (XEiJ.EFA_SEPARATE_AR) { 21875: XEiJ.mpuCycleCount += 4; 21876: return XEiJ.regRn[14]; 21877: } 21878: //fallthrough 21879: case 0b010_111: //(A7) 21880: if (XEiJ.EFA_SEPARATE_AR) { 21881: XEiJ.mpuCycleCount += 4; 21882: return XEiJ.regRn[15]; 21883: } else { 21884: XEiJ.mpuCycleCount += 4; 21885: return XEiJ.regRn[ea - (0b010_000 - 8)]; 21886: } 21887: case 0b101_000: //(d16,A0) 21888: case 0b101_001: //(d16,A1) 21889: case 0b101_010: //(d16,A2) 21890: case 0b101_011: //(d16,A3) 21891: case 0b101_100: //(d16,A4) 21892: case 0b101_101: //(d16,A5) 21893: case 0b101_110: //(d16,A6) 21894: case 0b101_111: //(d16,A7) 21895: XEiJ.mpuCycleCount += 8; 21896: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21897: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21898: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 21899: } else { 21900: t = XEiJ.regPC; 21901: XEiJ.regPC = t + 2; 21902: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 21903: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21904: } 21905: case 0b110_000: //(d8,A0,Rn.wl) 21906: case 0b110_001: //(d8,A1,Rn.wl) 21907: case 0b110_010: //(d8,A2,Rn.wl) 21908: case 0b110_011: //(d8,A3,Rn.wl) 21909: case 0b110_100: //(d8,A4,Rn.wl) 21910: case 0b110_101: //(d8,A5,Rn.wl) 21911: case 0b110_110: //(d8,A6,Rn.wl) 21912: case 0b110_111: //(d8,A7,Rn.wl) 21913: XEiJ.mpuCycleCount += 12; 21914: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 21915: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 21916: } else { 21917: w = XEiJ.regPC; 21918: XEiJ.regPC = w + 2; 21919: w = XEiJ.busRwze (w); //pcwz。拡張ワード 21920: } 21921: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21922: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21923: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 21924: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21925: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21926: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21927: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21928: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21929: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21930: XEiJ.regRn[w >> 12]) //ロングインデックス 21931: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21932: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21933: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21934: XEiJ.busRls (t) + x) //ポストインデックス 21935: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21936: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21937: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21938: case 0b111_000: //(xxx).W 21939: XEiJ.mpuCycleCount += 8; 21940: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 21941: case 0b111_001: //(xxx).L 21942: XEiJ.mpuCycleCount += 12; 21943: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 21944: case 0b111_010: //(d16,PC) 21945: XEiJ.mpuCycleCount += 8; 21946: t = XEiJ.regPC; 21947: XEiJ.regPC = t + 2; 21948: return (t //ベースレジスタ 21949: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 21950: case 0b111_011: //(d8,PC,Rn.wl) 21951: XEiJ.mpuCycleCount += 12; 21952: t = XEiJ.regPC; 21953: XEiJ.regPC = t + 2; 21954: w = XEiJ.busRwze (t); //pcwz。拡張ワード 21955: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 21956: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 21957: t) //ベースレジスタ 21958: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 21959: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 21960: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 21961: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 21962: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 21963: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 21964: XEiJ.regRn[w >> 12]) //ロングインデックス 21965: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 21966: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 21967: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 21968: XEiJ.busRls (t) + x) //ポストインデックス 21969: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 21970: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 21971: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 21972: } //switch 21973: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 21974: throw M68kException.m6eSignal; 21975: } //efaLeaPea 21976: 21977: //a = efaJmpJsr (ea) //| M WXZP | 21978: // JMP命令とJSR命令のオペランドの実効アドレスを求める 21979: // efaCntWordとの違いはサイクル数のみ 21980: // JMP命令のベースサイクル数8を含んでいるのでJMP命令ではベースサイクル数を加えなくてよい 21981: // JSR命令のベースサイクル数は16-8=8 21982: @SuppressWarnings ("fallthrough") public static int efaJmpJsr (int ea) throws M68kException { 21983: int t, w, x; 21984: switch (ea) { 21985: case 0b010_000: //(A0) 21986: if (XEiJ.EFA_SEPARATE_AR) { 21987: XEiJ.mpuCycleCount += 8; 21988: return XEiJ.regRn[ 8]; 21989: } 21990: //fallthrough 21991: case 0b010_001: //(A1) 21992: if (XEiJ.EFA_SEPARATE_AR) { 21993: XEiJ.mpuCycleCount += 8; 21994: return XEiJ.regRn[ 9]; 21995: } 21996: //fallthrough 21997: case 0b010_010: //(A2) 21998: if (XEiJ.EFA_SEPARATE_AR) { 21999: XEiJ.mpuCycleCount += 8; 22000: return XEiJ.regRn[10]; 22001: } 22002: //fallthrough 22003: case 0b010_011: //(A3) 22004: if (XEiJ.EFA_SEPARATE_AR) { 22005: XEiJ.mpuCycleCount += 8; 22006: return XEiJ.regRn[11]; 22007: } 22008: //fallthrough 22009: case 0b010_100: //(A4) 22010: if (XEiJ.EFA_SEPARATE_AR) { 22011: XEiJ.mpuCycleCount += 8; 22012: return XEiJ.regRn[12]; 22013: } 22014: //fallthrough 22015: case 0b010_101: //(A5) 22016: if (XEiJ.EFA_SEPARATE_AR) { 22017: XEiJ.mpuCycleCount += 8; 22018: return XEiJ.regRn[13]; 22019: } 22020: //fallthrough 22021: case 0b010_110: //(A6) 22022: if (XEiJ.EFA_SEPARATE_AR) { 22023: XEiJ.mpuCycleCount += 8; 22024: return XEiJ.regRn[14]; 22025: } 22026: //fallthrough 22027: case 0b010_111: //(A7) 22028: if (XEiJ.EFA_SEPARATE_AR) { 22029: XEiJ.mpuCycleCount += 8; 22030: return XEiJ.regRn[15]; 22031: } else { 22032: XEiJ.mpuCycleCount += 8; 22033: return XEiJ.regRn[ea - (0b010_000 - 8)]; 22034: } 22035: case 0b101_000: //(d16,A0) 22036: case 0b101_001: //(d16,A1) 22037: case 0b101_010: //(d16,A2) 22038: case 0b101_011: //(d16,A3) 22039: case 0b101_100: //(d16,A4) 22040: case 0b101_101: //(d16,A5) 22041: case 0b101_110: //(d16,A6) 22042: case 0b101_111: //(d16,A7) 22043: XEiJ.mpuCycleCount += 10; 22044: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 22045: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 22046: + XEiJ.busRwse ((XEiJ.regPC += 2) - 2)); //pcws。ワードディスプレースメント 22047: } else { 22048: t = XEiJ.regPC; 22049: XEiJ.regPC = t + 2; 22050: return (XEiJ.regRn[ea - (0b101_000 - 8)] //ベースレジスタ 22051: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 22052: } 22053: case 0b110_000: //(d8,A0,Rn.wl) 22054: case 0b110_001: //(d8,A1,Rn.wl) 22055: case 0b110_010: //(d8,A2,Rn.wl) 22056: case 0b110_011: //(d8,A3,Rn.wl) 22057: case 0b110_100: //(d8,A4,Rn.wl) 22058: case 0b110_101: //(d8,A5,Rn.wl) 22059: case 0b110_110: //(d8,A6,Rn.wl) 22060: case 0b110_111: //(d8,A7,Rn.wl) 22061: XEiJ.mpuCycleCount += 14; 22062: if (XEiJ.MPU_COMPOUND_POSTINCREMENT) { 22063: w = XEiJ.busRwze ((XEiJ.regPC += 2) - 2); //pcwz。拡張ワード 22064: } else { 22065: w = XEiJ.regPC; 22066: XEiJ.regPC = w + 2; 22067: w = XEiJ.busRwze (w); //pcwz。拡張ワード 22068: } 22069: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 22070: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 22071: XEiJ.regRn[ea - (0b110_000 - 8)]) //ベースレジスタ 22072: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 22073: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 22074: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 22075: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 22076: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 22077: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 22078: XEiJ.regRn[w >> 12]) //ロングインデックス 22079: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 22080: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 22081: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 22082: XEiJ.busRls (t) + x) //ポストインデックス 22083: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 22084: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 22085: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 22086: case 0b111_000: //(xxx).W 22087: XEiJ.mpuCycleCount += 10; 22088: return XEiJ.busRwse ((XEiJ.regPC += 2) - 2); //pcws 22089: case 0b111_001: //(xxx).L 22090: XEiJ.mpuCycleCount += 12; 22091: return XEiJ.busRlse ((XEiJ.regPC += 4) - 4); //pcls 22092: case 0b111_010: //(d16,PC) 22093: XEiJ.mpuCycleCount += 10; 22094: t = XEiJ.regPC; 22095: XEiJ.regPC = t + 2; 22096: return (t //ベースレジスタ 22097: + XEiJ.busRwse (t)); //pcws。ワードディスプレースメント 22098: case 0b111_011: //(d8,PC,Rn.wl) 22099: XEiJ.mpuCycleCount += 14; 22100: t = XEiJ.regPC; 22101: XEiJ.regPC = t + 2; 22102: w = XEiJ.busRwze (t); //pcwz。拡張ワード 22103: XEiJ.mpuCycleCount += XEiJ.EFA_EXTENSION_CLK[w & 511]; 22104: t = (((~w & 0x0180) == 0 ? 0 : //ベースレジスタサプレス 22105: t) //ベースレジスタ 22106: + (w << 31 - 8 >= 0 ? (byte) w : //バイトディスプレースメント 22107: w << 31 - 5 >= 0 ? 0 : //ヌルベースディスプレースメント 22108: w << 31 - 4 >= 0 ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードベースディスプレースメント 22109: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングベースディスプレースメント 22110: x = ((~w & 0x0140) == 0 ? 0 : //インデックスサプレス 22111: (w << 31 - 11 >= 0 ? (short) XEiJ.regRn[w >> 12] : //ワードインデックス 22112: XEiJ.regRn[w >> 12]) //ロングインデックス 22113: << (w >> 9 & 3)); //スケールファクタ。ワードインデックスのときは符号拡張してから掛ける 22114: return ((w & 0x0103) <= 0x0100 ? t + x : //メモリ間接なし 22115: ((XEiJ.TEST_BIT_2_SHIFT ? w << 31 - 2 >= 0 : (w & 4) == 0) ? XEiJ.busRls (t + x) : //プリインデックス 22116: XEiJ.busRls (t) + x) //ポストインデックス 22117: + ((XEiJ.TEST_BIT_1_SHIFT ? w << 31 - 1 >= 0 : (w & 2) == 0) ? 0 : //ヌルアウタディスプレースメント 22118: (XEiJ.TEST_BIT_0_SHIFT ? w << 31 - 0 >= 0 : (w & 1) == 0) ? XEiJ.busRwse ((XEiJ.regPC += 2) - 2) : //pcws。ワードアウタディスプレースメント 22119: XEiJ.busRlse ((XEiJ.regPC += 4) - 4))); //pcls。ロングアウタディスプレースメント 22120: } //switch 22121: M68kException.m6eNumber = M68kException.M6E_ILLEGAL_INSTRUCTION; 22122: throw M68kException.m6eSignal; 22123: } //efaJmpJsr 22124: 22125: 22126: 22127: } //class MC68EC030 22128: 22129: 22130: